2 * This file is provided under a dual BSD/GPLv2 license. When using or
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10 * it under the terms of version 2 of the GNU General Public License as
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15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
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56 #include <linux/device.h>
57 #include "scic_controller.h"
59 #include "scic_port.h"
60 #include "scic_remote_device.h"
61 #include "scic_sds_controller.h"
62 #include "scic_sds_controller_registers.h"
63 #include "scic_sds_pci.h"
64 #include "scic_sds_phy.h"
65 #include "scic_sds_port_configuration_agent.h"
66 #include "scic_sds_port.h"
67 #include "scic_sds_remote_device.h"
68 #include "scic_sds_request.h"
69 #include "scic_user_callback.h"
70 #include "sci_environment.h"
72 #include "scu_completion_codes.h"
73 #include "scu_constants.h"
74 #include "scu_event_codes.h"
75 #include "scu_remote_node_context.h"
76 #include "scu_task_context.h"
77 #include "scu_unsolicited_frame.h"
79 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
82 * smu_dcc_get_max_ports() -
84 * This macro returns the maximum number of logical ports supported by the
85 * hardware. The caller passes in the value read from the device context
86 * capacity register and this macro will mash and shift the value appropriately.
88 #define smu_dcc_get_max_ports(dcc_value) \
90 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
91 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
95 * smu_dcc_get_max_task_context() -
97 * This macro returns the maximum number of task contexts supported by the
98 * hardware. The caller passes in the value read from the device context
99 * capacity register and this macro will mash and shift the value appropriately.
101 #define smu_dcc_get_max_task_context(dcc_value) \
103 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
104 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
108 * smu_dcc_get_max_remote_node_context() -
110 * This macro returns the maximum number of remote node contexts supported by
111 * the hardware. The caller passes in the value read from the device context
112 * capacity register and this macro will mash and shift the value appropriately.
114 #define smu_dcc_get_max_remote_node_context(dcc_value) \
116 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
117 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
121 static void scic_sds_controller_power_control_timer_handler(
123 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
124 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
129 * The number of milliseconds to wait for a phy to start.
131 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
136 * The number of milliseconds to wait while a given phy is consuming power
137 * before allowing another set of phys to consume power. Ultimately, this will
138 * be specified by OEM parameter.
140 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
143 * COMPLETION_QUEUE_CYCLE_BIT() -
145 * This macro will return the cycle bit of the completion queue entry
147 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
150 * NORMALIZE_GET_POINTER() -
152 * This macro will normalize the completion queue get pointer so its value can
153 * be used as an index into an array
155 #define NORMALIZE_GET_POINTER(x) \
156 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
159 * NORMALIZE_PUT_POINTER() -
161 * This macro will normalize the completion queue put pointer so its value can
162 * be used as an array inde
164 #define NORMALIZE_PUT_POINTER(x) \
165 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
169 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
171 * This macro will normalize the completion queue cycle pointer so it matches
172 * the completion queue cycle bit
174 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
175 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
178 * NORMALIZE_EVENT_POINTER() -
180 * This macro will normalize the completion queue event entry so its value can
181 * be used as an index.
183 #define NORMALIZE_EVENT_POINTER(x) \
185 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
186 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
190 * INCREMENT_COMPLETION_QUEUE_GET() -
192 * This macro will increment the controllers completion queue index value and
193 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
195 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
196 INCREMENT_QUEUE_GET(\
199 (controller)->completion_queue_entries, \
204 * INCREMENT_EVENT_QUEUE_GET() -
206 * This macro will increment the controllers event queue index value and
207 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
209 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
210 INCREMENT_QUEUE_GET(\
213 (controller)->completion_event_entries, \
214 SMU_CQGR_EVENT_CYCLE_BIT \
217 struct sci_base_memory_descriptor_list *
218 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
220 return &scic->parent.mdl;
224 * ****************************************************************************-
225 * * SCIC SDS Controller Initialization Methods
226 * ****************************************************************************- */
229 * This timer is used to start another phy after we have given up on the
230 * previous phy to transition to the ready state.
234 static void scic_sds_controller_phy_startup_timeout_handler(
237 enum sci_status status;
238 struct scic_sds_controller *this_controller;
240 this_controller = (struct scic_sds_controller *)controller;
242 this_controller->phy_startup_timer_pending = false;
244 status = SCI_FAILURE;
246 while (status != SCI_SUCCESS) {
247 status = scic_sds_controller_start_next_phy(this_controller);
254 * This method initializes the phy startup operations for controller start.
256 void scic_sds_controller_initialize_phy_startup(
257 struct scic_sds_controller *this_controller)
259 this_controller->phy_startup_timer = scic_cb_timer_create(
261 scic_sds_controller_phy_startup_timeout_handler,
265 this_controller->next_phy_to_start = 0;
266 this_controller->phy_startup_timer_pending = false;
272 * This method initializes the power control operations for the controller
275 void scic_sds_controller_initialize_power_control(
276 struct scic_sds_controller *this_controller)
278 this_controller->power_control.timer = scic_cb_timer_create(
280 scic_sds_controller_power_control_timer_handler,
285 this_controller->power_control.requesters,
287 sizeof(this_controller->power_control.requesters)
290 this_controller->power_control.phys_waiting = 0;
293 /* --------------------------------------------------------------------------- */
295 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT (32)
296 #define SCU_TASK_CONTEXT_ALIGNMENT (256)
297 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
298 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT (1024)
299 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT (64)
301 /* --------------------------------------------------------------------------- */
304 * This method builds the memory descriptor table for this controller.
305 * @this_controller: This parameter specifies the controller object for which
306 * to build the memory table.
309 static void scic_sds_controller_build_memory_descriptor_table(
310 struct scic_sds_controller *this_controller)
312 sci_base_mde_construct(
313 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
314 SCU_COMPLETION_RAM_ALIGNMENT,
315 (sizeof(u32) * this_controller->completion_queue_entries),
316 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
319 sci_base_mde_construct(
320 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
321 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
322 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
323 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
326 sci_base_mde_construct(
327 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
328 SCU_TASK_CONTEXT_ALIGNMENT,
329 this_controller->task_context_entries * sizeof(struct scu_task_context),
330 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
334 * The UF buffer address table size must be programmed to a power
335 * of 2. Find the first power of 2 that is equal to or greater then
336 * the number of unsolicited frame buffers to be utilized. */
337 scic_sds_unsolicited_frame_control_set_address_table_count(
338 &this_controller->uf_control
341 sci_base_mde_construct(
342 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
343 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
344 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
345 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
350 * This method validates the driver supplied memory descriptor table.
355 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
356 struct scic_sds_controller *this_controller)
360 mde_list_valid = sci_base_mde_is_valid(
361 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
362 SCU_COMPLETION_RAM_ALIGNMENT,
363 (sizeof(u32) * this_controller->completion_queue_entries),
364 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
367 if (mde_list_valid == false)
368 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
370 mde_list_valid = sci_base_mde_is_valid(
371 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
372 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
373 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
374 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
377 if (mde_list_valid == false)
378 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
380 mde_list_valid = sci_base_mde_is_valid(
381 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
382 SCU_TASK_CONTEXT_ALIGNMENT,
383 this_controller->task_context_entries * sizeof(struct scu_task_context),
384 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
387 if (mde_list_valid == false)
388 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
390 mde_list_valid = sci_base_mde_is_valid(
391 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
392 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
393 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
394 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
397 if (mde_list_valid == false)
398 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
404 * This method initializes the controller with the physical memory addresses
405 * that are used to communicate with the driver.
409 void scic_sds_controller_ram_initialization(
410 struct scic_sds_controller *this_controller)
412 struct sci_physical_memory_descriptor *mde;
415 * The completion queue is actually placed in cacheable memory
416 * Therefore it no longer comes out of memory in the MDL. */
417 mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
418 this_controller->completion_queue = (u32 *)mde->virtual_address;
419 SMU_CQBAR_WRITE(this_controller, mde->physical_address);
422 * Program the location of the Remote Node Context table
424 mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
425 this_controller->remote_node_context_table = (union scu_remote_node_context *)
426 mde->virtual_address;
427 SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
429 /* Program the location of the Task Context table into the SCU. */
430 mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
431 this_controller->task_context_table = (struct scu_task_context *)
432 mde->virtual_address;
433 SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
435 mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
436 scic_sds_unsolicited_frame_control_construct(
437 &this_controller->uf_control, mde, this_controller
441 * Inform the silicon as to the location of the UF headers and
445 this_controller->uf_control.headers.physical_address);
448 this_controller->uf_control.address_table.physical_address);
452 * This method initializes the task context data for the controller.
456 void scic_sds_controller_assign_task_entries(
457 struct scic_sds_controller *this_controller)
462 * Assign all the TCs to function 0
463 * TODO: Do we actually need to read this register to write it back? */
464 task_assignment = SMU_TCA_READ(this_controller, 0);
469 | (SMU_TCA_GEN_VAL(STARTING, 0))
470 | (SMU_TCA_GEN_VAL(ENDING, this_controller->task_context_entries - 1))
471 | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
474 SMU_TCA_WRITE(this_controller, 0, task_assignment);
478 * This method initializes the hardware completion queue.
482 void scic_sds_controller_initialize_completion_queue(
483 struct scic_sds_controller *this_controller)
486 u32 completion_queue_control_value;
487 u32 completion_queue_get_value;
488 u32 completion_queue_put_value;
490 this_controller->completion_queue_get = 0;
492 completion_queue_control_value = (
493 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
494 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
497 SMU_CQC_WRITE(this_controller, completion_queue_control_value);
499 /* Set the completion queue get pointer and enable the queue */
500 completion_queue_get_value = (
501 (SMU_CQGR_GEN_VAL(POINTER, 0))
502 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
503 | (SMU_CQGR_GEN_BIT(ENABLE))
504 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
507 SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
509 /* Set the completion queue put pointer */
510 completion_queue_put_value = (
511 (SMU_CQPR_GEN_VAL(POINTER, 0))
512 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
515 SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
517 /* Initialize the cycle bit of the completion queue entries */
518 for (index = 0; index < this_controller->completion_queue_entries; index++) {
520 * If get.cycle_bit != completion_queue.cycle_bit
521 * its not a valid completion queue entry
522 * so at system start all entries are invalid */
523 this_controller->completion_queue[index] = 0x80000000;
528 * This method initializes the hardware unsolicited frame queue.
532 void scic_sds_controller_initialize_unsolicited_frame_queue(
533 struct scic_sds_controller *this_controller)
535 u32 frame_queue_control_value;
536 u32 frame_queue_get_value;
537 u32 frame_queue_put_value;
539 /* Write the queue size */
540 frame_queue_control_value =
541 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
543 SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
545 /* Setup the get pointer for the unsolicited frame queue */
546 frame_queue_get_value = (
547 SCU_UFQGP_GEN_VAL(POINTER, 0)
548 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
551 SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
553 /* Setup the put pointer for the unsolicited frame queue */
554 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
556 SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
560 * This method enables the hardware port task scheduler.
564 void scic_sds_controller_enable_port_task_scheduler(
565 struct scic_sds_controller *this_controller)
567 u32 port_task_scheduler_value;
569 port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
571 port_task_scheduler_value |=
572 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
574 SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
577 /* --------------------------------------------------------------------------- */
582 * This macro is used to delay between writes to the AFE registers during AFE
585 #define AFE_REGISTER_WRITE_DELAY 10
587 static bool is_a0(void)
589 return isci_si_rev == ISCI_SI_REVA0;
592 static bool is_a2(void)
594 return isci_si_rev == ISCI_SI_REVA2;
597 static bool is_b0(void)
599 return isci_si_rev > ISCI_SI_REVA2;
602 /* Initialize the AFE for this phy index. We need to read the AFE setup from
603 * the OEM parameters none
605 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
610 /* Clear DFX Status registers */
611 scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
612 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
614 /* Configure bias currents to normal */
616 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
618 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
621 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
625 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
627 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
629 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
631 /* Wait for the PLL to lock */
633 afe_status = scu_afe_register_read(
634 scic, afe_common_block_status);
635 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
636 } while ((afe_status & 0x00001000) == 0);
639 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
640 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
641 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
644 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
646 /* Configure transmitter SSC parameters */
647 scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
648 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
651 * All defaults, except the Receive Word Alignament/Comma Detect
652 * Enable....(0xe800) */
653 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
654 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
656 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
657 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
661 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
662 * & increase TX int & ext bias 20%....(0xe85c) */
664 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
666 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
668 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
669 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
670 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
673 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
674 * & increase TX int & ext bias 20%....(0xe85c) */
675 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
677 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
679 if (is_a0() || is_a2()) {
680 /* Enable TX equalization (0xe824) */
681 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
682 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
686 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
687 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
688 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
689 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
691 /* Leave DFE/FFE on */
693 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
695 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
697 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
698 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
699 /* Enable TX equalization (0xe824) */
700 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
702 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
704 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
705 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
707 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
708 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
710 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
711 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
713 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
714 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
717 /* Transfer control to the PEs */
718 scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
719 scic_cb_stall_execution(AFE_REGISTER_WRITE_DELAY);
723 * ****************************************************************************-
724 * * SCIC SDS Controller Internal Start/Stop Routines
725 * ****************************************************************************- */
729 * This method will attempt to transition into the ready state for the
730 * controller and indicate that the controller start operation has completed
731 * if all criteria are met.
732 * @this_controller: This parameter indicates the controller object for which
733 * to transition to ready.
734 * @status: This parameter indicates the status value to be pass into the call
735 * to scic_cb_controller_start_complete().
739 static void scic_sds_controller_transition_to_ready(
740 struct scic_sds_controller *this_controller,
741 enum sci_status status)
743 if (this_controller->parent.state_machine.current_state_id
744 == SCI_BASE_CONTROLLER_STATE_STARTING) {
746 * We move into the ready state, because some of the phys/ports
747 * may be up and operational. */
748 sci_base_state_machine_change_state(
749 scic_sds_controller_get_base_state_machine(this_controller),
750 SCI_BASE_CONTROLLER_STATE_READY
753 scic_cb_controller_start_complete(this_controller, status);
758 * This method is the general timeout handler for the controller. It will take
759 * the correct timetout action based on the current controller state
761 void scic_sds_controller_timeout_handler(
762 struct scic_sds_controller *scic)
764 enum sci_base_controller_states current_state;
766 current_state = sci_base_state_machine_get_state(
767 scic_sds_controller_get_base_state_machine(scic));
769 if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
770 scic_sds_controller_transition_to_ready(
771 scic, SCI_FAILURE_TIMEOUT);
772 } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
773 sci_base_state_machine_change_state(
774 scic_sds_controller_get_base_state_machine(scic),
775 SCI_BASE_CONTROLLER_STATE_FAILED);
776 scic_cb_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
777 } else /* / @todo Now what do we want to do in this case? */
778 dev_err(scic_to_dev(scic),
779 "%s: Controller timer fired when controller was not "
780 "in a state being timed.\n",
785 * scic_sds_controller_get_port_configuration_mode
786 * @this_controller: This is the controller to use to determine if we are using
787 * manual or automatic port configuration.
789 * SCIC_PORT_CONFIGURATION_MODE
791 enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
792 struct scic_sds_controller *this_controller)
795 enum SCIC_PORT_CONFIGURATION_MODE mode;
797 mode = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
799 for (index = 0; index < SCI_MAX_PORTS; index++) {
800 if (this_controller->oem_parameters.sds1.ports[index].phy_mask != 0) {
801 mode = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
809 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
812 enum sci_status port_status;
813 enum sci_status status = SCI_SUCCESS;
815 for (index = 0; index < scic->logical_port_entries; index++) {
816 port_status = scic_port_stop(&scic->port_table[index]);
818 if ((port_status != SCI_SUCCESS) &&
819 (port_status != SCI_FAILURE_INVALID_STATE)) {
820 status = SCI_FAILURE;
822 dev_warn(scic_to_dev(scic),
823 "%s: Controller stop operation failed to "
824 "stop port %d because of status %d.\n",
826 scic->port_table[index].logical_port_index,
839 static void scic_sds_controller_phy_timer_start(
840 struct scic_sds_controller *this_controller)
844 this_controller->phy_startup_timer,
845 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
848 this_controller->phy_startup_timer_pending = true;
856 void scic_sds_controller_phy_timer_stop(
857 struct scic_sds_controller *this_controller)
861 this_controller->phy_startup_timer
864 this_controller->phy_startup_timer_pending = false;
868 * This method is called internally by the controller object to start the next
869 * phy on the controller. If all the phys have been starte, then this
870 * method will attempt to transition the controller to the READY state and
871 * inform the user (scic_cb_controller_start_complete()).
872 * @this_controller: This parameter specifies the controller object for which
873 * to start the next phy.
877 enum sci_status scic_sds_controller_start_next_phy(
878 struct scic_sds_controller *this_controller)
880 enum sci_status status;
882 status = SCI_SUCCESS;
884 if (this_controller->phy_startup_timer_pending == false) {
885 if (this_controller->next_phy_to_start == SCI_MAX_PHYS) {
886 bool is_controller_start_complete = true;
887 struct scic_sds_phy *the_phy;
890 for (index = 0; index < SCI_MAX_PHYS; index++) {
891 the_phy = &this_controller->phy_table[index];
893 if (scic_sds_phy_get_port(the_phy) != SCI_INVALID_HANDLE) {
895 * The controller start operation is complete if and only
897 * - all links have been given an opportunity to start
898 * - have no indication of a connected device
899 * - have an indication of a connected device and it has
900 * finished the link training process.
904 (the_phy->is_in_link_training == false)
905 && (the_phy->parent.state_machine.current_state_id
906 == SCI_BASE_PHY_STATE_INITIAL)
909 (the_phy->is_in_link_training == false)
910 && (the_phy->parent.state_machine.current_state_id
911 == SCI_BASE_PHY_STATE_STOPPED)
914 (the_phy->is_in_link_training == true)
915 && (the_phy->parent.state_machine.current_state_id
916 == SCI_BASE_PHY_STATE_STARTING)
919 is_controller_start_complete = false;
926 * The controller has successfully finished the start process.
927 * Inform the SCI Core user and transition to the READY state. */
928 if (is_controller_start_complete == true) {
929 scic_sds_controller_transition_to_ready(
930 this_controller, SCI_SUCCESS
932 scic_sds_controller_phy_timer_stop(this_controller);
935 struct scic_sds_phy *the_phy;
937 the_phy = &this_controller->phy_table[this_controller->next_phy_to_start];
940 scic_sds_controller_get_port_configuration_mode(this_controller)
941 == SCIC_PORT_MANUAL_CONFIGURATION_MODE
943 if (scic_sds_phy_get_port(the_phy) == SCI_INVALID_HANDLE) {
944 this_controller->next_phy_to_start++;
947 * Caution recursion ahead be forwarned
949 * The PHY was never added to a PORT in MPC mode so start the next phy in sequence
950 * This phy will never go link up and will not draw power the OEM parameters either
951 * configured the phy incorrectly for the PORT or it was never assigned to a PORT */
952 return scic_sds_controller_start_next_phy(this_controller);
956 status = scic_sds_phy_start(the_phy);
958 if (status == SCI_SUCCESS) {
959 scic_sds_controller_phy_timer_start(this_controller);
961 dev_warn(scic_to_dev(this_controller),
962 "%s: Controller stop operation failed "
963 "to stop phy %d because of status "
966 this_controller->phy_table[this_controller->next_phy_to_start].phy_index,
970 this_controller->next_phy_to_start++;
983 enum sci_status scic_sds_controller_stop_phys(
984 struct scic_sds_controller *this_controller)
987 enum sci_status status;
988 enum sci_status phy_status;
990 status = SCI_SUCCESS;
992 for (index = 0; index < SCI_MAX_PHYS; index++) {
993 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
996 (phy_status != SCI_SUCCESS)
997 && (phy_status != SCI_FAILURE_INVALID_STATE)
999 status = SCI_FAILURE;
1001 dev_warn(scic_to_dev(this_controller),
1002 "%s: Controller stop operation failed to stop "
1003 "phy %d because of status %d.\n",
1005 this_controller->phy_table[index].phy_index, phy_status);
1018 enum sci_status scic_sds_controller_stop_devices(
1019 struct scic_sds_controller *this_controller)
1022 enum sci_status status;
1023 enum sci_status device_status;
1025 status = SCI_SUCCESS;
1027 for (index = 0; index < this_controller->remote_node_entries; index++) {
1028 if (this_controller->device_table[index] != SCI_INVALID_HANDLE) {
1029 /* / @todo What timeout value do we want to provide to this request? */
1030 device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
1032 if ((device_status != SCI_SUCCESS) &&
1033 (device_status != SCI_FAILURE_INVALID_STATE)) {
1034 dev_warn(scic_to_dev(this_controller),
1035 "%s: Controller stop operation failed "
1036 "to stop device 0x%p because of "
1039 this_controller->device_table[index], device_status);
1048 * ****************************************************************************-
1049 * * SCIC SDS Controller Power Control (Staggered Spinup)
1050 * ****************************************************************************- */
1055 * This method starts the power control timer for this controller object.
1057 static void scic_sds_controller_power_control_timer_start(
1058 struct scic_sds_controller *this_controller)
1060 scic_cb_timer_start(
1061 this_controller, this_controller->power_control.timer,
1062 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1065 this_controller->power_control.timer_started = true;
1073 static void scic_sds_controller_power_control_timer_handler(
1076 struct scic_sds_controller *this_controller;
1078 this_controller = (struct scic_sds_controller *)controller;
1080 if (this_controller->power_control.phys_waiting == 0) {
1081 this_controller->power_control.timer_started = false;
1083 struct scic_sds_phy *the_phy = NULL;
1088 && (this_controller->power_control.phys_waiting != 0);
1090 if (this_controller->power_control.requesters[i] != NULL) {
1091 the_phy = this_controller->power_control.requesters[i];
1092 this_controller->power_control.requesters[i] = NULL;
1093 this_controller->power_control.phys_waiting--;
1099 * It doesn't matter if the power list is empty, we need to start the
1100 * timer in case another phy becomes ready. */
1101 scic_sds_controller_power_control_timer_start(this_controller);
1103 scic_sds_phy_consume_power_handler(the_phy);
1108 * This method inserts the phy in the stagger spinup control queue.
1113 void scic_sds_controller_power_control_queue_insert(
1114 struct scic_sds_controller *this_controller,
1115 struct scic_sds_phy *the_phy)
1117 BUG_ON(the_phy == NULL);
1120 (this_controller->power_control.timer_started)
1121 && (this_controller->power_control.requesters[the_phy->phy_index] == NULL)
1123 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1124 this_controller->power_control.phys_waiting++;
1126 scic_sds_controller_power_control_timer_start(this_controller);
1127 scic_sds_phy_consume_power_handler(the_phy);
1132 * This method removes the phy from the stagger spinup control queue.
1137 void scic_sds_controller_power_control_queue_remove(
1138 struct scic_sds_controller *this_controller,
1139 struct scic_sds_phy *the_phy)
1141 BUG_ON(the_phy == NULL);
1143 if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1144 this_controller->power_control.phys_waiting--;
1147 this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1151 * ****************************************************************************-
1152 * * SCIC SDS Controller Completion Routines
1153 * ****************************************************************************- */
1156 * This method returns a true value if the completion queue has entries that
1160 * bool true if the completion queue has entries to process false if the
1161 * completion queue has no entries to process
1163 static bool scic_sds_controller_completion_queue_has_entries(
1164 struct scic_sds_controller *this_controller)
1166 u32 get_value = this_controller->completion_queue_get;
1167 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1170 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1171 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1179 /* --------------------------------------------------------------------------- */
1182 * This method processes a task completion notification. This is called from
1183 * within the controller completion handler.
1185 * @completion_entry:
1188 static void scic_sds_controller_task_completion(
1189 struct scic_sds_controller *this_controller,
1190 u32 completion_entry)
1193 struct scic_sds_request *io_request;
1195 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1196 io_request = this_controller->io_request_table[index];
1198 /* Make sure that we really want to process this IO request */
1200 (io_request != SCI_INVALID_HANDLE)
1201 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1203 scic_sds_io_tag_get_sequence(io_request->io_tag)
1204 == this_controller->io_request_sequence[index]
1207 /* Yep this is a valid io request pass it along to the io request handler */
1208 scic_sds_io_request_tc_completion(io_request, completion_entry);
1213 * This method processes an SDMA completion event. This is called from within
1214 * the controller completion handler.
1216 * @completion_entry:
1219 static void scic_sds_controller_sdma_completion(
1220 struct scic_sds_controller *this_controller,
1221 u32 completion_entry)
1224 struct scic_sds_request *io_request;
1225 struct scic_sds_remote_device *device;
1227 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1229 switch (scu_get_command_request_type(completion_entry)) {
1230 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1231 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1232 io_request = this_controller->io_request_table[index];
1233 dev_warn(scic_to_dev(this_controller),
1234 "%s: SCIC SDS Completion type SDMA %x for io request "
1239 /* @todo For a post TC operation we need to fail the IO
1244 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1245 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1246 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1247 device = this_controller->device_table[index];
1248 dev_warn(scic_to_dev(this_controller),
1249 "%s: SCIC SDS Completion type SDMA %x for remote "
1254 /* @todo For a port RNC operation we need to fail the
1260 dev_warn(scic_to_dev(this_controller),
1261 "%s: SCIC SDS Completion unknown SDMA completion "
1273 * @completion_entry:
1275 * This method processes an unsolicited frame message. This is called from
1276 * within the controller completion handler. none
1278 static void scic_sds_controller_unsolicited_frame(
1279 struct scic_sds_controller *this_controller,
1280 u32 completion_entry)
1285 struct scu_unsolicited_frame_header *frame_header;
1286 struct scic_sds_phy *phy;
1287 struct scic_sds_remote_device *device;
1289 enum sci_status result = SCI_FAILURE;
1291 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1294 = this_controller->uf_control.buffers.array[frame_index].header;
1295 this_controller->uf_control.buffers.array[frame_index].state
1296 = UNSOLICITED_FRAME_IN_USE;
1298 if (SCU_GET_FRAME_ERROR(completion_entry)) {
1300 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1301 * / this cause a problem? We expect the phy initialization will
1302 * / fail if there is an error in the frame. */
1303 scic_sds_controller_release_frame(this_controller, frame_index);
1307 if (frame_header->is_address_frame) {
1308 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1309 phy = &this_controller->phy_table[index];
1311 result = scic_sds_phy_frame_handler(phy, frame_index);
1315 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1317 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1319 * This is a signature fis or a frame from a direct attached SATA
1320 * device that has not yet been created. In either case forwared
1321 * the frame to the PE and let it take care of the frame data. */
1322 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1323 phy = &this_controller->phy_table[index];
1324 result = scic_sds_phy_frame_handler(phy, frame_index);
1326 if (index < this_controller->remote_node_entries)
1327 device = this_controller->device_table[index];
1332 result = scic_sds_remote_device_frame_handler(device, frame_index);
1334 scic_sds_controller_release_frame(this_controller, frame_index);
1338 if (result != SCI_SUCCESS) {
1340 * / @todo Is there any reason to report some additional error message
1341 * / when we get this failure notifiction? */
1346 * This method processes an event completion entry. This is called from within
1347 * the controller completion handler.
1349 * @completion_entry:
1352 static void scic_sds_controller_event_completion(
1353 struct scic_sds_controller *this_controller,
1354 u32 completion_entry)
1357 struct scic_sds_request *io_request;
1358 struct scic_sds_remote_device *device;
1359 struct scic_sds_phy *phy;
1361 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1363 switch (scu_get_event_type(completion_entry)) {
1364 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1365 /* / @todo The driver did something wrong and we need to fix the condtion. */
1366 dev_err(scic_to_dev(this_controller),
1367 "%s: SCIC Controller 0x%p received SMU command error "
1374 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1375 case SCU_EVENT_TYPE_SMU_ERROR:
1376 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1378 * / @todo This is a hardware failure and its likely that we want to
1379 * / reset the controller. */
1380 dev_err(scic_to_dev(this_controller),
1381 "%s: SCIC Controller 0x%p received fatal controller "
1388 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1389 io_request = this_controller->io_request_table[index];
1390 scic_sds_io_request_event_handler(io_request, completion_entry);
1393 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1394 switch (scu_get_event_specifier(completion_entry)) {
1395 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1396 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1397 io_request = this_controller->io_request_table[index];
1398 if (io_request != SCI_INVALID_HANDLE)
1399 scic_sds_io_request_event_handler(io_request, completion_entry);
1401 dev_warn(scic_to_dev(this_controller),
1402 "%s: SCIC Controller 0x%p received "
1403 "event 0x%x for io request object "
1404 "that doesnt exist.\n",
1411 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1412 device = this_controller->device_table[index];
1413 if (device != SCI_INVALID_HANDLE)
1414 scic_sds_remote_device_event_handler(device, completion_entry);
1416 dev_warn(scic_to_dev(this_controller),
1417 "%s: SCIC Controller 0x%p received "
1418 "event 0x%x for remote device object "
1419 "that doesnt exist.\n",
1428 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1430 * direct the broadcast change event to the phy first and then let
1431 * the phy redirect the broadcast change to the port object */
1432 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1434 * direct error counter event to the phy object since that is where
1435 * we get the event notification. This is a type 4 event. */
1436 case SCU_EVENT_TYPE_OSSP_EVENT:
1437 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1438 phy = &this_controller->phy_table[index];
1439 scic_sds_phy_event_handler(phy, completion_entry);
1442 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1443 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1444 case SCU_EVENT_TYPE_RNC_OPS_MISC:
1445 if (index < this_controller->remote_node_entries) {
1446 device = this_controller->device_table[index];
1449 scic_sds_remote_device_event_handler(device, completion_entry);
1451 dev_err(scic_to_dev(this_controller),
1452 "%s: SCIC Controller 0x%p received event 0x%x "
1453 "for remote device object 0x%0x that doesnt "
1463 dev_warn(scic_to_dev(this_controller),
1464 "%s: SCIC Controller received unknown event code %x\n",
1472 * This method is a private routine for processing the completion queue entries.
1476 static void scic_sds_controller_process_completions(
1477 struct scic_sds_controller *this_controller)
1479 u32 completion_count = 0;
1480 u32 completion_entry;
1486 dev_dbg(scic_to_dev(this_controller),
1487 "%s: completion queue begining get:0x%08x\n",
1489 this_controller->completion_queue_get);
1491 /* Get the component parts of the completion queue */
1492 get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1493 get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1495 event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1496 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1499 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1500 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1504 completion_entry = this_controller->completion_queue[get_index];
1505 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1507 dev_dbg(scic_to_dev(this_controller),
1508 "%s: completion queue entry:0x%08x\n",
1512 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1513 case SCU_COMPLETION_TYPE_TASK:
1514 scic_sds_controller_task_completion(this_controller, completion_entry);
1517 case SCU_COMPLETION_TYPE_SDMA:
1518 scic_sds_controller_sdma_completion(this_controller, completion_entry);
1521 case SCU_COMPLETION_TYPE_UFI:
1522 scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1525 case SCU_COMPLETION_TYPE_EVENT:
1526 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1527 scic_sds_controller_event_completion(this_controller, completion_entry);
1530 case SCU_COMPLETION_TYPE_NOTIFY:
1532 * Presently we do the same thing with a notify event that we do with the
1533 * other event codes. */
1534 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1535 scic_sds_controller_event_completion(this_controller, completion_entry);
1539 dev_warn(scic_to_dev(this_controller),
1540 "%s: SCIC Controller received unknown "
1541 "completion type %x\n",
1548 /* Update the get register if we completed one or more entries */
1549 if (completion_count > 0) {
1550 this_controller->completion_queue_get =
1551 SMU_CQGR_GEN_BIT(ENABLE)
1552 | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1553 | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1554 | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index);
1556 SMU_CQGR_WRITE(this_controller,
1557 this_controller->completion_queue_get);
1560 dev_dbg(scic_to_dev(this_controller),
1561 "%s: completion queue ending get:0x%08x\n",
1563 this_controller->completion_queue_get);
1568 * This method is a private routine for processing the completion queue entries.
1572 static void scic_sds_controller_transitioned_process_completions(
1573 struct scic_sds_controller *this_controller)
1575 u32 completion_count = 0;
1576 u32 completion_entry;
1582 dev_dbg(scic_to_dev(this_controller),
1583 "%s: completion queue begining get:0x%08x\n",
1585 this_controller->completion_queue_get);
1587 /* Get the component parts of the completion queue */
1588 get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1589 get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1591 event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1592 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1595 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1596 == COMPLETION_QUEUE_CYCLE_BIT(
1597 this_controller->completion_queue[get_index])
1601 completion_entry = this_controller->completion_queue[get_index];
1602 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1604 dev_dbg(scic_to_dev(this_controller),
1605 "%s: completion queue entry:0x%08x\n",
1609 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1610 case SCU_COMPLETION_TYPE_TASK:
1611 scic_sds_controller_task_completion(this_controller, completion_entry);
1614 case SCU_COMPLETION_TYPE_NOTIFY:
1615 case SCU_COMPLETION_TYPE_EVENT:
1617 * Presently we do the same thing with a notify event that we
1618 * do with the other event codes. */
1619 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1622 case SCU_COMPLETION_TYPE_SDMA:
1623 case SCU_COMPLETION_TYPE_UFI:
1625 dev_warn(scic_to_dev(this_controller),
1626 "%s: SCIC Controller ignoring completion type "
1634 /* Update the get register if we completed one or more entries */
1635 if (completion_count > 0) {
1636 this_controller->completion_queue_get =
1637 SMU_CQGR_GEN_BIT(ENABLE)
1638 | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1639 | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1640 | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index);
1642 SMU_CQGR_WRITE(this_controller, this_controller->completion_queue_get);
1645 dev_dbg(scic_to_dev(this_controller),
1646 "%s: completion queue ending get:0x%08x\n",
1648 this_controller->completion_queue_get);
1652 * ****************************************************************************-
1653 * * SCIC SDS Controller Interrupt and Completion functions
1654 * ****************************************************************************- */
1657 * This method provides standard (common) processing of interrupts for polling
1658 * and legacy based interrupts.
1660 * @interrupt_status:
1662 * This method returns a boolean (bool) indication as to whether an completions
1663 * are pending to be processed. true if an interrupt is to be processed false
1664 * if no interrupt was pending
1666 static bool scic_sds_controller_standard_interrupt_handler(
1667 struct scic_sds_controller *this_controller,
1668 u32 interrupt_status)
1670 bool is_completion_needed = false;
1672 if ((interrupt_status & SMU_ISR_QUEUE_ERROR) ||
1673 ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1674 (!scic_sds_controller_completion_queue_has_entries(
1675 this_controller)))) {
1677 * We have a fatal error on the read of the completion queue bar
1679 * We have a fatal error there is nothing in the completion queue
1680 * but we have a report from the hardware that the queue is full
1681 * / @todo how do we request the a controller reset */
1682 is_completion_needed = true;
1683 this_controller->encountered_fatal_error = true;
1686 if (scic_sds_controller_completion_queue_has_entries(this_controller)) {
1687 is_completion_needed = true;
1690 return is_completion_needed;
1694 * This is the method provided to handle polling for interrupts for the
1695 * controller object.
1697 * bool true if an interrupt is to be processed false if no interrupt was
1700 static bool scic_sds_controller_polling_interrupt_handler(
1701 struct scic_sds_controller *scic)
1703 u32 interrupt_status;
1706 * In INTERRUPT_POLLING_MODE we exit the interrupt handler if the
1707 * hardware indicates nothing is pending. Since we are not being
1708 * called from a real interrupt, we don't want to confuse the hardware
1709 * by servicing the completion queue before the hardware indicates it
1710 * is ready. We'll simply wait for another polling interval and check
1713 interrupt_status = SMU_ISR_READ(scic);
1714 if ((interrupt_status &
1715 (SMU_ISR_COMPLETION |
1716 SMU_ISR_QUEUE_ERROR |
1717 SMU_ISR_QUEUE_SUSPEND)) == 0) {
1721 return scic_sds_controller_standard_interrupt_handler(
1722 scic, interrupt_status);
1726 * This is the method provided to handle completions when interrupt polling is
1729 static void scic_sds_controller_polling_completion_handler(
1730 struct scic_sds_controller *scic)
1732 if (scic->encountered_fatal_error == true) {
1733 dev_err(scic_to_dev(scic),
1734 "%s: SCIC Controller has encountered a fatal error.\n",
1737 sci_base_state_machine_change_state(
1738 scic_sds_controller_get_base_state_machine(scic),
1739 SCI_BASE_CONTROLLER_STATE_FAILED);
1740 } else if (scic_sds_controller_completion_queue_has_entries(scic)) {
1741 if (scic->restrict_completions == false)
1742 scic_sds_controller_process_completions(scic);
1744 scic_sds_controller_transitioned_process_completions(
1749 * The interrupt handler does not adjust the CQ's
1750 * get pointer. So, SCU's INTx pin stays asserted during the
1751 * interrupt handler even though it tries to clear the interrupt
1752 * source. Therefore, the completion handler must ensure that the
1753 * interrupt source is cleared. Otherwise, we get a spurious
1754 * interrupt for which the interrupt handler will not issue a
1755 * corresponding completion event. Also, we unmask interrupts.
1759 (u32)(SMU_ISR_COMPLETION | SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)
1764 * This is the method provided to handle legacy interrupts for the controller
1767 * bool true if an interrupt is processed false if no interrupt was processed
1769 static bool scic_sds_controller_legacy_interrupt_handler(
1770 struct scic_sds_controller *scic)
1772 u32 interrupt_status;
1773 bool is_completion_needed;
1775 interrupt_status = SMU_ISR_READ(scic);
1776 is_completion_needed = scic_sds_controller_standard_interrupt_handler(
1777 scic, interrupt_status);
1779 return is_completion_needed;
1784 * This is the method provided to handle legacy completions it is expected that
1785 * the SCI User will call this completion handler anytime the interrupt
1786 * handler reports that it has handled an interrupt.
1788 static void scic_sds_controller_legacy_completion_handler(
1789 struct scic_sds_controller *scic)
1791 scic_sds_controller_polling_completion_handler(scic);
1792 SMU_IMR_WRITE(scic, 0x00000000);
1796 * This is the method provided to handle an MSIX interrupt message when there
1797 * is just a single MSIX message being provided by the hardware. This mode
1798 * of operation is single vector mode.
1800 * bool true if an interrupt is processed false if no interrupt was processed
1802 static bool scic_sds_controller_single_vector_interrupt_handler(
1803 struct scic_sds_controller *scic)
1805 u32 interrupt_status;
1808 * Mask the interrupts
1809 * There is a race in the hardware that could cause us not to be notified
1810 * of an interrupt completion if we do not take this step. We will unmask
1811 * the interrupts in the completion routine. */
1812 SMU_IMR_WRITE(scic, 0xFFFFFFFF);
1814 interrupt_status = SMU_ISR_READ(scic);
1815 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1817 if ((interrupt_status == 0) &&
1818 scic_sds_controller_completion_queue_has_entries(scic)) {
1820 * There is at least one completion queue entry to process so we can
1821 * return a success and ignore for now the case of an error interrupt */
1822 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1826 if (interrupt_status != 0) {
1828 * There is an error interrupt pending so let it through and handle
1829 * in the callback */
1834 * Clear any offending interrupts since we could not find any to handle
1835 * and unmask them all */
1836 SMU_ISR_WRITE(scic, 0x00000000);
1837 SMU_IMR_WRITE(scic, 0x00000000);
1843 * This is the method provided to handle completions for a single MSIX message.
1845 static void scic_sds_controller_single_vector_completion_handler(
1846 struct scic_sds_controller *scic)
1848 u32 interrupt_status;
1850 interrupt_status = SMU_ISR_READ(scic);
1851 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1853 if (interrupt_status & SMU_ISR_QUEUE_ERROR) {
1854 dev_err(scic_to_dev(scic),
1855 "%s: SCIC Controller has encountered a fatal error.\n",
1859 * We have a fatal condition and must reset the controller
1860 * Leave the interrupt mask in place and get the controller reset */
1861 sci_base_state_machine_change_state(
1862 scic_sds_controller_get_base_state_machine(scic),
1863 SCI_BASE_CONTROLLER_STATE_FAILED);
1867 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1868 !scic_sds_controller_completion_queue_has_entries(scic)) {
1869 dev_err(scic_to_dev(scic),
1870 "%s: SCIC Controller has encountered a fatal error.\n",
1874 * We have a fatal condtion and must reset the controller
1875 * Leave the interrupt mask in place and get the controller reset */
1876 sci_base_state_machine_change_state(
1877 scic_sds_controller_get_base_state_machine(scic),
1878 SCI_BASE_CONTROLLER_STATE_FAILED);
1882 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1883 scic_sds_controller_process_completions(scic);
1886 * We dont care which interrupt got us to processing the completion queu
1887 * so clear them both. */
1890 (SMU_ISR_COMPLETION | SMU_ISR_QUEUE_SUSPEND));
1893 SMU_IMR_WRITE(scic, 0x00000000);
1897 * This is the method provided to handle a MSIX message for a normal completion.
1899 * bool true if an interrupt is processed false if no interrupt was processed
1901 static bool scic_sds_controller_normal_vector_interrupt_handler(
1902 struct scic_sds_controller *scic)
1904 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1908 * we have a spurious interrupt it could be that we have already
1909 * emptied the completion queue from a previous interrupt */
1910 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1913 * There is a race in the hardware that could cause us not to be notified
1914 * of an interrupt completion if we do not take this step. We will mask
1915 * then unmask the interrupts so if there is another interrupt pending
1916 * the clearing of the interrupt source we get the next interrupt message. */
1917 SMU_IMR_WRITE(scic, 0xFF000000);
1918 SMU_IMR_WRITE(scic, 0x00000000);
1925 * This is the method provided to handle the completions for a normal MSIX
1928 static void scic_sds_controller_normal_vector_completion_handler(
1929 struct scic_sds_controller *scic)
1931 /* Empty out the completion queue */
1932 if (scic_sds_controller_completion_queue_has_entries(scic))
1933 scic_sds_controller_process_completions(scic);
1935 /* Clear the interrupt and enable all interrupts again */
1936 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1937 /* Could we write the value of SMU_ISR_COMPLETION? */
1938 SMU_IMR_WRITE(scic, 0xFF000000);
1939 SMU_IMR_WRITE(scic, 0x00000000);
1943 * This is the method provided to handle the error MSIX message interrupt.
1944 * This is the normal operating mode for the hardware if MSIX is enabled.
1946 * bool true if an interrupt is processed false if no interrupt was processed
1948 static bool scic_sds_controller_error_vector_interrupt_handler(
1949 struct scic_sds_controller *scic)
1951 u32 interrupt_status;
1953 interrupt_status = SMU_ISR_READ(scic);
1954 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1956 if (interrupt_status != 0) {
1958 * There is an error interrupt pending so let it through and handle
1959 * in the callback */
1964 * There is a race in the hardware that could cause us not to be notified
1965 * of an interrupt completion if we do not take this step. We will mask
1966 * then unmask the error interrupts so if there was another interrupt
1967 * pending we will be notified.
1968 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1969 SMU_IMR_WRITE(scic, 0x000000FF);
1970 SMU_IMR_WRITE(scic, 0x00000000);
1976 * This is the method provided to handle the error completions when the
1977 * hardware is using two MSIX messages.
1979 static void scic_sds_controller_error_vector_completion_handler(
1980 struct scic_sds_controller *scic)
1982 u32 interrupt_status;
1984 interrupt_status = SMU_ISR_READ(scic);
1986 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1987 scic_sds_controller_completion_queue_has_entries(scic)) {
1989 scic_sds_controller_process_completions(scic);
1990 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1993 dev_err(scic_to_dev(scic),
1994 "%s: SCIC Controller reports CRC error on completion "
1999 sci_base_state_machine_change_state(
2000 scic_sds_controller_get_base_state_machine(scic),
2001 SCI_BASE_CONTROLLER_STATE_FAILED);
2007 * If we dont process any completions I am not sure that we want to do this.
2008 * We are in the middle of a hardware fault and should probably be reset. */
2009 SMU_IMR_WRITE(scic, 0x00000000);
2014 * ****************************************************************************-
2015 * * SCIC SDS Controller External Methods
2016 * ****************************************************************************- */
2019 * This method returns the sizeof the SCIC SDS Controller Object
2021 u32 scic_sds_controller_get_object_size(void)
2023 return sizeof(struct scic_sds_controller);
2027 void scic_sds_controller_link_up(
2028 struct scic_sds_controller *scic,
2029 struct scic_sds_port *sci_port,
2030 struct scic_sds_phy *sci_phy)
2032 scic_sds_controller_phy_handler_t link_up;
2035 state = scic->parent.state_machine.current_state_id;
2036 link_up = scic_sds_controller_state_handler_table[state].link_up;
2039 link_up(scic, sci_port, sci_phy);
2041 dev_warn(scic_to_dev(scic),
2042 "%s: SCIC Controller linkup event from phy %d in "
2043 "unexpected state %d\n",
2046 sci_base_state_machine_get_state(
2047 scic_sds_controller_get_base_state_machine(
2052 void scic_sds_controller_link_down(
2053 struct scic_sds_controller *scic,
2054 struct scic_sds_port *sci_port,
2055 struct scic_sds_phy *sci_phy)
2058 scic_sds_controller_phy_handler_t link_down;
2060 state = scic->parent.state_machine.current_state_id;
2061 link_down = scic_sds_controller_state_handler_table[state].link_down;
2064 link_down(scic, sci_port, sci_phy);
2066 dev_warn(scic_to_dev(scic),
2067 "%s: SCIC Controller linkdown event from phy %d in "
2068 "unexpected state %d\n",
2071 sci_base_state_machine_get_state(
2072 scic_sds_controller_get_base_state_machine(
2077 * This method will write to the SCU PCP register the request value. The method
2078 * is used to suspend/resume ports, devices, and phys.
2083 void scic_sds_controller_post_request(
2084 struct scic_sds_controller *this_controller,
2087 dev_dbg(scic_to_dev(this_controller),
2088 "%s: SCIC Controller 0x%p post request 0x%08x\n",
2093 SMU_PCP_WRITE(this_controller, request);
2097 * This method will copy the soft copy of the task context into the physical
2098 * memory accessible by the controller.
2099 * @this_controller: This parameter specifies the controller for which to copy
2101 * @this_request: This parameter specifies the request for which the task
2102 * context is being copied.
2104 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
2105 * the physical memory version of the task context. Thus, all subsequent
2106 * updates to the task context are performed in the TC table (i.e. DMAable
2109 void scic_sds_controller_copy_task_context(
2110 struct scic_sds_controller *this_controller,
2111 struct scic_sds_request *this_request)
2113 struct scu_task_context *task_context_buffer;
2115 task_context_buffer = scic_sds_controller_get_task_context_buffer(
2116 this_controller, this_request->io_tag
2120 task_context_buffer,
2121 this_request->task_context_buffer,
2122 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
2126 * Now that the soft copy of the TC has been copied into the TC
2127 * table accessible by the silicon. Thus, any further changes to
2128 * the TC (e.g. TC termination) occur in the appropriate location. */
2129 this_request->task_context_buffer = task_context_buffer;
2133 * This method returns the task context buffer for the given io tag.
2137 * struct scu_task_context*
2139 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
2140 struct scic_sds_controller *this_controller,
2143 u16 task_index = scic_sds_io_tag_get_index(io_tag);
2145 if (task_index < this_controller->task_context_entries) {
2146 return &this_controller->task_context_table[task_index];
2153 * This method returnst the sequence value from the io tag value
2161 * This method returns the IO request associated with the tag value
2165 * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
2167 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
2168 struct scic_sds_controller *this_controller,
2174 task_index = scic_sds_io_tag_get_index(io_tag);
2176 if (task_index < this_controller->task_context_entries) {
2177 if (this_controller->io_request_table[task_index] != SCI_INVALID_HANDLE) {
2178 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
2180 if (task_sequence == this_controller->io_request_sequence[task_index]) {
2181 return this_controller->io_request_table[task_index];
2186 return SCI_INVALID_HANDLE;
2190 * This method allocates remote node index and the reserves the remote node
2191 * context space for use. This method can fail if there are no more remote
2192 * node index available.
2193 * @this_controller: This is the controller object which contains the set of
2194 * free remote node ids
2195 * @the_devce: This is the device object which is requesting the a remote node
2197 * @node_id: This is the remote node id that is assinged to the device if one
2200 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
2201 * node index available.
2203 enum sci_status scic_sds_controller_allocate_remote_node_context(
2204 struct scic_sds_controller *this_controller,
2205 struct scic_sds_remote_device *the_device,
2209 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
2211 node_index = scic_sds_remote_node_table_allocate_remote_node(
2212 &this_controller->available_remote_nodes, remote_node_count
2215 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
2216 this_controller->device_table[node_index] = the_device;
2218 *node_id = node_index;
2223 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
2227 * This method frees the remote node index back to the available pool. Once
2228 * this is done the remote node context buffer is no longer valid and can
2235 void scic_sds_controller_free_remote_node_context(
2236 struct scic_sds_controller *this_controller,
2237 struct scic_sds_remote_device *the_device,
2240 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
2242 if (this_controller->device_table[node_id] == the_device) {
2243 this_controller->device_table[node_id] = SCI_INVALID_HANDLE;
2245 scic_sds_remote_node_table_release_remote_node_index(
2246 &this_controller->available_remote_nodes, remote_node_count, node_id
2252 * This method returns the union scu_remote_node_context for the specified remote
2257 * union scu_remote_node_context*
2259 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
2260 struct scic_sds_controller *this_controller,
2264 (node_id < this_controller->remote_node_entries)
2265 && (this_controller->device_table[node_id] != SCI_INVALID_HANDLE)
2267 return &this_controller->remote_node_context_table[node_id];
2275 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
2277 * @frame_header: This is the frame header returned by the hardware.
2278 * @frame_buffer: This is the frame buffer returned by the hardware.
2280 * This method will combind the frame header and frame buffer to create a SATA
2281 * D2H register FIS none
2283 void scic_sds_controller_copy_sata_response(
2284 void *response_buffer,
2295 (char *)((char *)response_buffer + sizeof(u32)),
2297 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
2302 * This method releases the frame once this is done the frame is available for
2303 * re-use by the hardware. The data contained in the frame header and frame
2304 * buffer is no longer valid. The UF queue get pointer is only updated if UF
2305 * control indicates this is appropriate.
2310 void scic_sds_controller_release_frame(
2311 struct scic_sds_controller *this_controller,
2314 if (scic_sds_unsolicited_frame_control_release_frame(
2315 &this_controller->uf_control, frame_index) == true)
2316 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
2320 * This method sets user parameters and OEM parameters to default values.
2321 * Users can override these values utilizing the scic_user_parameters_set()
2322 * and scic_oem_parameters_set() methods.
2323 * @controller: This parameter specifies the controller for which to set the
2324 * configuration parameters to their default values.
2327 static void scic_sds_controller_set_default_config_parameters(
2328 struct scic_sds_controller *this_controller)
2332 /* Default to no SSC operation. */
2333 this_controller->oem_parameters.sds1.controller.do_enable_ssc = false;
2335 /* Initialize all of the port parameter information to narrow ports. */
2336 for (index = 0; index < SCI_MAX_PORTS; index++) {
2337 this_controller->oem_parameters.sds1.ports[index].phy_mask = 0;
2340 /* Initialize all of the phy parameter information. */
2341 for (index = 0; index < SCI_MAX_PHYS; index++) {
2343 * Default to 3G (i.e. Gen 2) for now. User can override if
2345 this_controller->user_parameters.sds1.phys[index].max_speed_generation = 2;
2348 * Previous Vitesse based expanders had a arbitration issue that
2349 * is worked around by having the upper 32-bits of SAS address
2350 * with a value greater then the Vitesse company identifier.
2351 * Hence, usage of 0x5FCFFFFF. */
2352 this_controller->oem_parameters.sds1.phys[index].sas_address.low
2354 this_controller->oem_parameters.sds1.phys[index].sas_address.high
2358 this_controller->user_parameters.sds1.stp_inactivity_timeout = 5;
2359 this_controller->user_parameters.sds1.ssp_inactivity_timeout = 5;
2360 this_controller->user_parameters.sds1.stp_max_occupancy_timeout = 5;
2361 this_controller->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
2362 this_controller->user_parameters.sds1.no_outbound_task_timeout = 5;
2367 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
2368 void __iomem *scu_base,
2369 void __iomem *smu_base)
2373 sci_base_controller_construct(
2374 &controller->parent,
2375 scic_sds_controller_state_table,
2376 controller->memory_descriptors,
2377 ARRAY_SIZE(controller->memory_descriptors),
2381 controller->scu_registers = scu_base;
2382 controller->smu_registers = smu_base;
2384 scic_sds_port_configuration_agent_construct(&controller->port_agent);
2386 /* Construct the ports for this controller */
2387 for (index = 0; index < SCI_MAX_PORTS; index++)
2388 scic_sds_port_construct(&controller->port_table[index],
2390 scic_sds_port_construct(&controller->port_table[index],
2391 SCIC_SDS_DUMMY_PORT, controller);
2393 /* Construct the phys for this controller */
2394 for (index = 0; index < SCI_MAX_PHYS; index++) {
2395 /* Add all the PHYs to the dummy port */
2396 scic_sds_phy_construct(
2397 &controller->phy_table[index],
2398 &controller->port_table[SCI_MAX_PORTS],
2403 controller->invalid_phy_mask = 0;
2405 /* Set the default maximum values */
2406 controller->completion_event_entries = SCU_EVENT_COUNT;
2407 controller->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
2408 controller->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2409 controller->logical_port_entries = SCI_MAX_PORTS;
2410 controller->task_context_entries = SCU_IO_REQUEST_COUNT;
2411 controller->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
2412 controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2414 /* Initialize the User and OEM parameters to default values. */
2415 scic_sds_controller_set_default_config_parameters(controller);
2420 /* --------------------------------------------------------------------------- */
2422 enum sci_status scic_controller_initialize(
2423 struct scic_sds_controller *scic)
2425 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2426 sci_base_controller_handler_t initialize;
2429 state = scic->parent.state_machine.current_state_id;
2430 initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2433 status = initialize(&scic->parent);
2435 dev_warn(scic_to_dev(scic),
2436 "%s: SCIC Controller initialize operation requested "
2437 "in invalid state %d\n",
2439 sci_base_state_machine_get_state(
2440 scic_sds_controller_get_base_state_machine(
2446 /* --------------------------------------------------------------------------- */
2448 u32 scic_controller_get_suggested_start_timeout(
2449 struct scic_sds_controller *sc)
2451 /* Validate the user supplied parameters. */
2452 if (sc == SCI_INVALID_HANDLE)
2456 * The suggested minimum timeout value for a controller start operation:
2458 * Signature FIS Timeout
2459 * + Phy Start Timeout
2460 * + Number of Phy Spin Up Intervals
2461 * ---------------------------------
2462 * Number of milliseconds for the controller start operation.
2464 * NOTE: The number of phy spin up intervals will be equivalent
2465 * to the number of phys divided by the number phys allowed
2466 * per interval - 1 (once OEM parameters are supported).
2467 * Currently we assume only 1 phy per interval. */
2469 return (SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2470 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2471 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL));
2474 /* --------------------------------------------------------------------------- */
2476 enum sci_status scic_controller_start(
2477 struct scic_sds_controller *scic,
2480 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2481 sci_base_controller_timed_handler_t start;
2484 state = scic->parent.state_machine.current_state_id;
2485 start = scic_sds_controller_state_handler_table[state].base.start;
2488 status = start(&scic->parent, timeout);
2490 dev_warn(scic_to_dev(scic),
2491 "%s: SCIC Controller start operation requested in "
2492 "invalid state %d\n",
2494 sci_base_state_machine_get_state(
2495 scic_sds_controller_get_base_state_machine(
2501 /* --------------------------------------------------------------------------- */
2503 enum sci_status scic_controller_stop(
2504 struct scic_sds_controller *scic,
2507 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2508 sci_base_controller_timed_handler_t stop;
2511 state = scic->parent.state_machine.current_state_id;
2512 stop = scic_sds_controller_state_handler_table[state].base.stop;
2515 status = stop(&scic->parent, timeout);
2517 dev_warn(scic_to_dev(scic),
2518 "%s: SCIC Controller stop operation requested in "
2519 "invalid state %d\n",
2521 sci_base_state_machine_get_state(
2522 scic_sds_controller_get_base_state_machine(
2528 /* --------------------------------------------------------------------------- */
2530 enum sci_status scic_controller_reset(
2531 struct scic_sds_controller *scic)
2533 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2534 sci_base_controller_handler_t reset;
2537 state = scic->parent.state_machine.current_state_id;
2538 reset = scic_sds_controller_state_handler_table[state].base.reset;
2541 status = reset(&scic->parent);
2543 dev_warn(scic_to_dev(scic),
2544 "%s: SCIC Controller reset operation requested in "
2545 "invalid state %d\n",
2547 sci_base_state_machine_get_state(
2548 scic_sds_controller_get_base_state_machine(
2554 /* --------------------------------------------------------------------------- */
2556 enum sci_status scic_controller_get_handler_methods(
2557 enum scic_interrupt_type interrupt_type,
2559 struct scic_controller_handler_methods *handler_methods)
2561 enum sci_status status = SCI_FAILURE_UNSUPPORTED_MESSAGE_COUNT;
2563 switch (interrupt_type) {
2564 case SCIC_LEGACY_LINE_INTERRUPT_TYPE:
2565 if (message_count == 0) {
2566 handler_methods[0].interrupt_handler
2567 = scic_sds_controller_legacy_interrupt_handler;
2568 handler_methods[0].completion_handler
2569 = scic_sds_controller_legacy_completion_handler;
2571 status = SCI_SUCCESS;
2575 case SCIC_MSIX_INTERRUPT_TYPE:
2576 if (message_count == 1) {
2577 handler_methods[0].interrupt_handler
2578 = scic_sds_controller_single_vector_interrupt_handler;
2579 handler_methods[0].completion_handler
2580 = scic_sds_controller_single_vector_completion_handler;
2582 status = SCI_SUCCESS;
2583 } else if (message_count == 2) {
2584 handler_methods[0].interrupt_handler
2585 = scic_sds_controller_normal_vector_interrupt_handler;
2586 handler_methods[0].completion_handler
2587 = scic_sds_controller_normal_vector_completion_handler;
2589 handler_methods[1].interrupt_handler
2590 = scic_sds_controller_error_vector_interrupt_handler;
2591 handler_methods[1].completion_handler
2592 = scic_sds_controller_error_vector_completion_handler;
2594 status = SCI_SUCCESS;
2598 case SCIC_NO_INTERRUPTS:
2599 if (message_count == 0) {
2601 handler_methods[0].interrupt_handler
2602 = scic_sds_controller_polling_interrupt_handler;
2603 handler_methods[0].completion_handler
2604 = scic_sds_controller_polling_completion_handler;
2606 status = SCI_SUCCESS;
2611 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2618 /* --------------------------------------------------------------------------- */
2620 enum sci_io_status scic_controller_start_io(
2621 struct scic_sds_controller *scic,
2622 struct scic_sds_remote_device *remote_device,
2623 struct scic_sds_request *io_request,
2627 sci_base_controller_start_request_handler_t start_io;
2629 state = scic->parent.state_machine.current_state_id;
2630 start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2632 return start_io(&scic->parent,
2633 (struct sci_base_remote_device *) remote_device,
2634 (struct sci_base_request *)io_request, io_tag);
2637 /* --------------------------------------------------------------------------- */
2639 enum sci_status scic_controller_terminate_request(
2640 struct scic_sds_controller *scic,
2641 struct scic_sds_remote_device *remote_device,
2642 struct scic_sds_request *request)
2644 sci_base_controller_request_handler_t terminate_request;
2647 state = scic->parent.state_machine.current_state_id;
2648 terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2650 return terminate_request(&scic->parent,
2651 (struct sci_base_remote_device *)remote_device,
2652 (struct sci_base_request *)request);
2655 /* --------------------------------------------------------------------------- */
2657 enum sci_status scic_controller_complete_io(
2658 struct scic_sds_controller *scic,
2659 struct scic_sds_remote_device *remote_device,
2660 struct scic_sds_request *io_request)
2663 sci_base_controller_request_handler_t complete_io;
2665 state = scic->parent.state_machine.current_state_id;
2666 complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2668 return complete_io(&scic->parent,
2669 (struct sci_base_remote_device *)remote_device,
2670 (struct sci_base_request *)io_request);
2673 /* --------------------------------------------------------------------------- */
2676 enum sci_task_status scic_controller_start_task(
2677 struct scic_sds_controller *scic,
2678 struct scic_sds_remote_device *remote_device,
2679 struct scic_sds_request *task_request,
2683 sci_base_controller_start_request_handler_t start_task;
2684 enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2686 state = scic->parent.state_machine.current_state_id;
2687 start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2690 status = start_task(&scic->parent,
2691 (struct sci_base_remote_device *)remote_device,
2692 (struct sci_base_request *)task_request,
2695 dev_warn(scic_to_dev(scic),
2696 "%s: SCIC Controller starting task from invalid "
2703 /* --------------------------------------------------------------------------- */
2705 enum sci_status scic_controller_complete_task(
2706 struct scic_sds_controller *scic,
2707 struct scic_sds_remote_device *remote_device,
2708 struct scic_sds_request *task_request)
2711 sci_base_controller_request_handler_t complete_task;
2712 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2714 state = scic->parent.state_machine.current_state_id;
2715 complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2718 status = complete_task(&scic->parent,
2719 (struct sci_base_remote_device *)remote_device,
2720 (struct sci_base_request *)task_request);
2722 dev_warn(scic_to_dev(scic),
2723 "%s: SCIC Controller completing task from invalid "
2731 /* --------------------------------------------------------------------------- */
2733 enum sci_status scic_controller_get_port_handle(
2734 struct scic_sds_controller *scic,
2736 struct scic_sds_port **port_handle)
2738 if (port_index < scic->logical_port_entries) {
2739 *port_handle = &scic->port_table[port_index];
2744 return SCI_FAILURE_INVALID_PORT;
2747 /* --------------------------------------------------------------------------- */
2749 enum sci_status scic_controller_get_phy_handle(
2750 struct scic_sds_controller *scic,
2752 struct scic_sds_phy **phy_handle)
2754 if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2755 *phy_handle = &scic->phy_table[phy_index];
2760 dev_err(scic_to_dev(scic),
2761 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2762 __func__, scic, phy_index);
2764 return SCI_FAILURE_INVALID_PHY;
2767 /* --------------------------------------------------------------------------- */
2769 u16 scic_controller_allocate_io_tag(
2770 struct scic_sds_controller *scic)
2775 if (!sci_pool_empty(scic->tci_pool)) {
2776 sci_pool_get(scic->tci_pool, task_context);
2778 sequence_count = scic->io_request_sequence[task_context];
2780 return scic_sds_io_tag_construct(sequence_count, task_context);
2783 return SCI_CONTROLLER_INVALID_IO_TAG;
2786 /* --------------------------------------------------------------------------- */
2788 enum sci_status scic_controller_free_io_tag(
2789 struct scic_sds_controller *scic,
2795 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2797 sequence = scic_sds_io_tag_get_sequence(io_tag);
2798 index = scic_sds_io_tag_get_index(io_tag);
2800 if (!sci_pool_full(scic->tci_pool)) {
2801 if (sequence == scic->io_request_sequence[index]) {
2802 scic_sds_io_sequence_increment(
2803 scic->io_request_sequence[index]);
2805 sci_pool_put(scic->tci_pool, index);
2811 return SCI_FAILURE_INVALID_IO_TAG;
2814 /* --------------------------------------------------------------------------- */
2816 void scic_controller_enable_interrupts(
2817 struct scic_sds_controller *scic)
2819 BUG_ON(scic->smu_registers == NULL);
2820 SMU_IMR_WRITE(scic, 0x00000000);
2823 /* --------------------------------------------------------------------------- */
2825 void scic_controller_disable_interrupts(
2826 struct scic_sds_controller *scic)
2828 BUG_ON(scic->smu_registers == NULL);
2829 SMU_IMR_WRITE(scic, 0xffffffff);
2832 /* --------------------------------------------------------------------------- */
2834 enum sci_status scic_controller_set_mode(
2835 struct scic_sds_controller *scic,
2836 enum sci_controller_mode operating_mode)
2838 enum sci_status status = SCI_SUCCESS;
2840 if ((scic->parent.state_machine.current_state_id ==
2841 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2842 (scic->parent.state_machine.current_state_id ==
2843 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2844 switch (operating_mode) {
2845 case SCI_MODE_SPEED:
2846 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2847 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2848 scic->uf_control.buffers.count =
2849 SCU_UNSOLICITED_FRAME_COUNT;
2850 scic->completion_event_entries = SCU_EVENT_COUNT;
2851 scic->completion_queue_entries =
2852 SCU_COMPLETION_QUEUE_COUNT;
2853 scic_sds_controller_build_memory_descriptor_table(scic);
2857 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2858 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2859 scic->uf_control.buffers.count =
2860 SCU_MIN_UNSOLICITED_FRAMES;
2861 scic->completion_event_entries = SCU_MIN_EVENTS;
2862 scic->completion_queue_entries =
2863 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2864 scic_sds_controller_build_memory_descriptor_table(scic);
2868 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2872 status = SCI_FAILURE_INVALID_STATE;
2878 * scic_sds_controller_reset_hardware() -
2880 * This method will reset the controller hardware.
2882 void scic_sds_controller_reset_hardware(
2883 struct scic_sds_controller *scic)
2885 /* Disable interrupts so we dont take any spurious interrupts */
2886 scic_controller_disable_interrupts(scic);
2889 SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2891 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2892 scic_cb_stall_execution(1000);
2894 /* The write to the CQGR clears the CQP */
2895 SMU_CQGR_WRITE(scic, 0x00000000);
2897 /* The write to the UFQGP clears the UFQPR */
2898 SCU_UFQGP_WRITE(scic, 0x00000000);
2901 /* --------------------------------------------------------------------------- */
2903 enum sci_status scic_user_parameters_set(
2904 struct scic_sds_controller *scic,
2905 union scic_user_parameters *scic_parms)
2908 (scic->parent.state_machine.current_state_id
2909 == SCI_BASE_CONTROLLER_STATE_RESET)
2910 || (scic->parent.state_machine.current_state_id
2911 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2912 || (scic->parent.state_machine.current_state_id
2913 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2918 * Validate the user parameters. If they are not legal, then
2919 * return a failure. */
2920 for (index = 0; index < SCI_MAX_PHYS; index++) {
2922 (scic_parms->sds1.phys[index].max_speed_generation
2923 <= SCIC_SDS_PARM_MAX_SPEED
2924 && scic_parms->sds1.phys[index].max_speed_generation
2925 > SCIC_SDS_PARM_NO_SPEED
2928 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2931 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2936 return SCI_FAILURE_INVALID_STATE;
2939 /* --------------------------------------------------------------------------- */
2941 void scic_user_parameters_get(
2942 struct scic_sds_controller *scic,
2943 union scic_user_parameters *scic_parms)
2945 memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2948 /* --------------------------------------------------------------------------- */
2950 enum sci_status scic_oem_parameters_set(
2951 struct scic_sds_controller *scic,
2952 union scic_oem_parameters *scic_parms)
2955 (scic->parent.state_machine.current_state_id
2956 == SCI_BASE_CONTROLLER_STATE_RESET)
2957 || (scic->parent.state_machine.current_state_id
2958 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2959 || (scic->parent.state_machine.current_state_id
2960 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2965 * Validate the oem parameters. If they are not legal, then
2966 * return a failure. */
2967 for (index = 0; index < SCI_MAX_PORTS; index++) {
2968 if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2969 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2973 for (index = 0; index < SCI_MAX_PHYS; index++) {
2975 scic_parms->sds1.phys[index].sas_address.high == 0
2976 && scic_parms->sds1.phys[index].sas_address.low == 0
2978 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2982 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2986 return SCI_FAILURE_INVALID_STATE;
2989 /* --------------------------------------------------------------------------- */
2991 void scic_oem_parameters_get(
2992 struct scic_sds_controller *scic,
2993 union scic_oem_parameters *scic_parms)
2995 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2998 /* --------------------------------------------------------------------------- */
3001 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
3002 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
3003 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
3004 #define INTERRUPT_COALESCE_NUMBER_MAX 256
3005 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
3006 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
3008 enum sci_status scic_controller_set_interrupt_coalescence(
3009 struct scic_sds_controller *scic_controller,
3010 u32 coalesce_number,
3011 u32 coalesce_timeout)
3013 u8 timeout_encode = 0;
3017 /* Check if the input parameters fall in the range. */
3018 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
3019 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
3022 * Defined encoding for interrupt coalescing timeout:
3023 * Value Min Max Units
3024 * ----- --- --- -----
3054 * Others Undefined */
3057 * Use the table above to decide the encode of interrupt coalescing timeout
3058 * value for register writing. */
3059 if (coalesce_timeout == 0)
3062 /* make the timeout value in unit of (10 ns). */
3063 coalesce_timeout = coalesce_timeout * 100;
3064 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
3065 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
3067 /* get the encode of timeout for register writing. */
3068 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
3069 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
3071 if (min <= coalesce_timeout && max > coalesce_timeout)
3073 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
3074 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
3075 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
3087 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
3088 /* the value is out of range. */
3089 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
3094 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
3095 SMU_ICC_GEN_VAL(TIMER, timeout_encode))
3098 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
3099 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
3105 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
3107 return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
3111 * *****************************************************************************
3112 * * DEFAULT STATE HANDLERS
3113 * ***************************************************************************** */
3117 * @controller: This is struct sci_base_controller object which is cast into a
3118 * struct scic_sds_controller object.
3119 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
3120 * be cast to a struct scic_sds_remote_device.
3121 * @io_request: This is the struct sci_base_request which, if it was used, would be
3122 * cast to a SCIC_SDS_IO_REQUEST.
3123 * @io_tag: This is the IO tag to be assigned to the IO request or
3124 * SCI_CONTROLLER_INVALID_IO_TAG.
3126 * This method is called when the struct scic_sds_controller default start io/task
3127 * handler is in place. - Issue a warning message enum sci_status
3128 * SCI_FAILURE_INVALID_STATE
3130 static enum sci_status scic_sds_controller_default_start_operation_handler(
3131 struct sci_base_controller *controller,
3132 struct sci_base_remote_device *remote_device,
3133 struct sci_base_request *io_request,
3136 struct scic_sds_controller *this_controller;
3138 this_controller = (struct scic_sds_controller *)controller;
3140 dev_warn(scic_to_dev(this_controller),
3141 "%s: SCIC Controller requested to start an io/task from "
3142 "invalid state %d\n",
3144 sci_base_state_machine_get_state(
3145 scic_sds_controller_get_base_state_machine(
3148 return SCI_FAILURE_INVALID_STATE;
3153 * @controller: This is struct sci_base_controller object which is cast into a
3154 * struct scic_sds_controller object.
3155 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
3156 * be cast to a struct scic_sds_remote_device.
3157 * @io_request: This is the struct sci_base_request which, if it was used, would be
3158 * cast to a SCIC_SDS_IO_REQUEST.
3160 * This method is called when the struct scic_sds_controller default request handler
3161 * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
3163 static enum sci_status scic_sds_controller_default_request_handler(
3164 struct sci_base_controller *controller,
3165 struct sci_base_remote_device *remote_device,
3166 struct sci_base_request *io_request)
3168 struct scic_sds_controller *this_controller;
3170 this_controller = (struct scic_sds_controller *)controller;
3172 dev_warn(scic_to_dev(this_controller),
3173 "%s: SCIC Controller request operation from invalid state %d\n",
3175 sci_base_state_machine_get_state(
3176 scic_sds_controller_get_base_state_machine(
3179 return SCI_FAILURE_INVALID_STATE;
3183 * *****************************************************************************
3184 * * GENERAL (COMMON) STATE HANDLERS
3185 * ***************************************************************************** */
3189 * @controller: The struct sci_base_controller object which is cast into a
3190 * struct scic_sds_controller object.
3192 * This method is called when the struct scic_sds_controller is in the ready state
3193 * reset handler is in place. - Transition to
3194 * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
3196 static enum sci_status scic_sds_controller_general_reset_handler(
3197 struct sci_base_controller *controller)
3199 struct scic_sds_controller *this_controller;
3201 this_controller = (struct scic_sds_controller *)controller;
3204 * The reset operation is not a graceful cleanup just perform the state
3206 sci_base_state_machine_change_state(
3207 scic_sds_controller_get_base_state_machine(this_controller),
3208 SCI_BASE_CONTROLLER_STATE_RESETTING
3215 * *****************************************************************************
3216 * * RESET STATE HANDLERS
3217 * ***************************************************************************** */
3221 * @controller: This is the struct sci_base_controller object which is cast into a
3222 * struct scic_sds_controller object.
3224 * This method is the struct scic_sds_controller initialize handler for the reset
3225 * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
3226 * function is not yet implemented and is a valid request from the reset state.
3228 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
3229 struct sci_base_controller *controller)
3232 enum sci_status result = SCI_SUCCESS;
3233 struct scic_sds_controller *this_controller;
3235 this_controller = (struct scic_sds_controller *)controller;
3237 sci_base_state_machine_change_state(
3238 scic_sds_controller_get_base_state_machine(this_controller),
3239 SCI_BASE_CONTROLLER_STATE_INITIALIZING
3242 this_controller->timeout_timer = scic_cb_timer_create(
3244 (void (*)(void *))scic_sds_controller_timeout_handler,
3245 (void (*)(void *))controller);
3247 scic_sds_controller_initialize_phy_startup(this_controller);
3249 scic_sds_controller_initialize_power_control(this_controller);
3252 * There is nothing to do here for B0 since we do not have to
3253 * program the AFE registers.
3254 * / @todo The AFE settings are supposed to be correct for the B0 but
3255 * / presently they seem to be wrong. */
3256 scic_sds_controller_afe_initialization(this_controller);
3258 if (SCI_SUCCESS == result) {
3262 /* Take the hardware out of reset */
3263 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
3266 * / @todo Provide meaningfull error code for hardware failure
3267 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
3268 result = SCI_FAILURE;
3269 terminate_loop = 100;
3271 while (terminate_loop-- && (result != SCI_SUCCESS)) {
3272 /* Loop until the hardware reports success */
3273 scic_cb_stall_execution(SCU_CONTEXT_RAM_INIT_STALL_TIME);
3274 status = SMU_SMUCSR_READ(this_controller);
3276 if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
3277 result = SCI_SUCCESS;
3282 if (result == SCI_SUCCESS) {
3283 u32 max_supported_ports;
3284 u32 max_supported_devices;
3285 u32 max_supported_io_requests;
3286 u32 device_context_capacity;
3289 * Determine what are the actaul device capacities that the
3290 * hardware will support */
3291 device_context_capacity = SMU_DCC_READ(this_controller);
3293 max_supported_ports =
3294 smu_dcc_get_max_ports(device_context_capacity);
3295 max_supported_devices =
3296 smu_dcc_get_max_remote_node_context(device_context_capacity);
3297 max_supported_io_requests =
3298 smu_dcc_get_max_task_context(device_context_capacity);
3300 /* Make all PEs that are unassigned match up with the logical ports */
3301 for (index = 0; index < max_supported_ports; index++) {
3304 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
3309 /* Record the smaller of the two capacity values */
3310 this_controller->logical_port_entries =
3311 min(max_supported_ports, this_controller->logical_port_entries);
3313 this_controller->task_context_entries =
3314 min(max_supported_io_requests, this_controller->task_context_entries);
3316 this_controller->remote_node_entries =
3317 min(max_supported_devices, this_controller->remote_node_entries);
3320 * Now that we have the correct hardware reported minimum values
3321 * build the MDL for the controller. Default to a performance
3323 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
3326 /* Initialize hardware PCI Relaxed ordering in DMA engines */
3327 if (result == SCI_SUCCESS) {
3328 u32 dma_configuration;
3330 /* Configure the payload DMA */
3331 dma_configuration = SCU_PDMACR_READ(this_controller);
3332 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
3333 SCU_PDMACR_WRITE(this_controller, dma_configuration);
3335 /* Configure the control DMA */
3336 dma_configuration = SCU_CDMACR_READ(this_controller);
3337 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
3338 SCU_CDMACR_WRITE(this_controller, dma_configuration);
3342 * Initialize the PHYs before the PORTs because the PHY registers
3343 * are accessed during the port initialization. */
3344 if (result == SCI_SUCCESS) {
3345 /* Initialize the phys */
3347 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
3349 result = scic_sds_phy_initialize(
3350 &this_controller->phy_table[index],
3351 &this_controller->scu_registers->peg0.pe[index].ll
3356 if (result == SCI_SUCCESS) {
3357 /* Initialize the logical ports */
3359 (index < this_controller->logical_port_entries)
3360 && (result == SCI_SUCCESS);
3362 result = scic_sds_port_initialize(
3363 &this_controller->port_table[index],
3364 &this_controller->scu_registers->peg0.pe[index].tl,
3365 &this_controller->scu_registers->peg0.ptsg.port[index],
3366 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
3367 &this_controller->scu_registers->peg0.viit[index]
3372 if (SCI_SUCCESS == result) {
3373 result = scic_sds_port_configuration_agent_initialize(
3375 &this_controller->port_agent
3379 /* Advance the controller state machine */
3380 if (result == SCI_SUCCESS) {
3381 sci_base_state_machine_change_state(
3382 scic_sds_controller_get_base_state_machine(this_controller),
3383 SCI_BASE_CONTROLLER_STATE_INITIALIZED
3386 sci_base_state_machine_change_state(
3387 scic_sds_controller_get_base_state_machine(this_controller),
3388 SCI_BASE_CONTROLLER_STATE_FAILED
3396 * *****************************************************************************
3397 * * INITIALIZED STATE HANDLERS
3398 * ***************************************************************************** */
3402 * @controller: This is the struct sci_base_controller object which is cast into a
3403 * struct scic_sds_controller object.
3404 * @timeout: This is the allowed time for the controller object to reach the
3407 * This method is the struct scic_sds_controller start handler for the initialized
3408 * state. - Validate we have a good memory descriptor table - Initialze the
3409 * physical memory before programming the hardware - Program the SCU hardware
3410 * with the physical memory addresses passed in the memory descriptor table. -
3411 * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
3412 * completion queue - Initialize the unsolicited frame data - Take the SCU port
3413 * task scheduler out of reset - Start the first phy object. - Transition to
3414 * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
3415 * controller start operations complete
3416 * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
3417 * descriptor fields is invalid.
3419 static enum sci_status scic_sds_controller_initialized_state_start_handler(
3420 struct sci_base_controller *controller,
3424 enum sci_status result;
3425 struct scic_sds_controller *this_controller;
3427 this_controller = (struct scic_sds_controller *)controller;
3429 /* Make sure that the SCI User filled in the memory descriptor table correctly */
3430 result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3432 if (result == SCI_SUCCESS) {
3433 /* The memory descriptor list looks good so program the hardware */
3434 scic_sds_controller_ram_initialization(this_controller);
3437 if (SCI_SUCCESS == result) {
3438 /* Build the TCi free pool */
3439 sci_pool_initialize(this_controller->tci_pool);
3440 for (index = 0; index < this_controller->task_context_entries; index++) {
3441 sci_pool_put(this_controller->tci_pool, index);
3444 /* Build the RNi free pool */
3445 scic_sds_remote_node_table_initialize(
3446 &this_controller->available_remote_nodes,
3447 this_controller->remote_node_entries
3451 if (SCI_SUCCESS == result) {
3453 * Before anything else lets make sure we will not be interrupted
3454 * by the hardware. */
3455 scic_controller_disable_interrupts(this_controller);
3457 /* Enable the port task scheduler */
3458 scic_sds_controller_enable_port_task_scheduler(this_controller);
3460 /* Assign all the task entries to this controller physical function */
3461 scic_sds_controller_assign_task_entries(this_controller);
3463 /* Now initialze the completion queue */
3464 scic_sds_controller_initialize_completion_queue(this_controller);
3466 /* Initialize the unsolicited frame queue for use */
3467 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3470 if (SCI_SUCCESS == result) {
3471 scic_sds_controller_start_next_phy(this_controller);
3473 scic_cb_timer_start(this_controller,
3474 this_controller->timeout_timer,
3477 sci_base_state_machine_change_state(
3478 scic_sds_controller_get_base_state_machine(this_controller),
3479 SCI_BASE_CONTROLLER_STATE_STARTING
3487 * *****************************************************************************
3488 * * INITIALIZED STATE HANDLERS
3489 * ***************************************************************************** */
3493 * @controller: This is struct scic_sds_controller which receives the link up
3495 * @port: This is struct scic_sds_port with which the phy is associated.
3496 * @phy: This is the struct scic_sds_phy which has gone link up.
3498 * This method is called when the struct scic_sds_controller is in the starting state
3499 * link up handler is called. This method will perform the following: - Stop
3500 * the phy timer - Start the next phy - Report the link up condition to the
3503 static void scic_sds_controller_starting_state_link_up_handler(
3504 struct scic_sds_controller *this_controller,
3505 struct scic_sds_port *port,
3506 struct scic_sds_phy *phy)
3508 scic_sds_controller_phy_timer_stop(this_controller);
3510 this_controller->port_agent.link_up_handler(
3511 this_controller, &this_controller->port_agent, port, phy
3513 /* scic_sds_port_link_up(port, phy); */
3515 scic_sds_controller_start_next_phy(this_controller);
3520 * @controller: This is struct scic_sds_controller which receives the link down
3522 * @port: This is struct scic_sds_port with which the phy is associated.
3523 * @phy: This is the struct scic_sds_phy which has gone link down.
3525 * This method is called when the struct scic_sds_controller is in the starting state
3526 * link down handler is called. - Report the link down condition to the port
3529 static void scic_sds_controller_starting_state_link_down_handler(
3530 struct scic_sds_controller *this_controller,
3531 struct scic_sds_port *port,
3532 struct scic_sds_phy *phy)
3534 this_controller->port_agent.link_down_handler(
3535 this_controller, &this_controller->port_agent, port, phy
3537 /* scic_sds_port_link_down(port, phy); */
3541 * *****************************************************************************
3542 * * READY STATE HANDLERS
3543 * ***************************************************************************** */
3547 * @controller: The struct sci_base_controller object which is cast into a
3548 * struct scic_sds_controller object.
3549 * @timeout: The timeout for when the stop operation should report a failure.
3551 * This method is called when the struct scic_sds_controller is in the ready state
3552 * stop handler is called. - Start the timeout timer - Transition to
3553 * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3555 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3556 struct sci_base_controller *controller,
3559 struct scic_sds_controller *this_controller;
3561 this_controller = (struct scic_sds_controller *)controller;
3563 scic_cb_timer_start(this_controller,
3564 this_controller->timeout_timer,
3567 sci_base_state_machine_change_state(
3568 scic_sds_controller_get_base_state_machine(this_controller),
3569 SCI_BASE_CONTROLLER_STATE_STOPPING
3577 * @controller: This is struct sci_base_controller object which is cast into a
3578 * struct scic_sds_controller object.
3579 * @remote_device: This is struct sci_base_remote_device which is cast to a
3580 * struct scic_sds_remote_device object.
3581 * @io_request: This is the struct sci_base_request which is cast to a
3582 * SCIC_SDS_IO_REQUEST object.
3583 * @io_tag: This is the IO tag to be assigned to the IO request or
3584 * SCI_CONTROLLER_INVALID_IO_TAG.
3586 * This method is called when the struct scic_sds_controller is in the ready state and
3587 * the start io handler is called. - Start the io request on the remote device
3588 * - if successful - assign the io_request to the io_request_table - post the
3589 * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3590 * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3591 * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3592 * objects are not in a valid state to accept io requests. How does the io_tag
3593 * parameter get assigned to the io request?
3595 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3596 struct sci_base_controller *controller,
3597 struct sci_base_remote_device *remote_device,
3598 struct sci_base_request *io_request,
3601 enum sci_status status;
3603 struct scic_sds_controller *this_controller;
3604 struct scic_sds_request *the_request;
3605 struct scic_sds_remote_device *the_device;
3607 this_controller = (struct scic_sds_controller *)controller;
3608 the_request = (struct scic_sds_request *)io_request;
3609 the_device = (struct scic_sds_remote_device *)remote_device;
3611 status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3613 if (status == SCI_SUCCESS) {
3614 this_controller->io_request_table[
3615 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3617 scic_sds_controller_post_request(
3619 scic_sds_request_get_post_context(the_request)
3628 * @controller: This is struct sci_base_controller object which is cast into a
3629 * struct scic_sds_controller object.
3630 * @remote_device: This is struct sci_base_remote_device which is cast to a
3631 * struct scic_sds_remote_device object.
3632 * @io_request: This is the struct sci_base_request which is cast to a
3633 * SCIC_SDS_IO_REQUEST object.
3635 * This method is called when the struct scic_sds_controller is in the ready state and
3636 * the complete io handler is called. - Complete the io request on the remote
3637 * device - if successful - remove the io_request to the io_request_table
3638 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3639 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3640 * accept io requests.
3642 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3643 struct sci_base_controller *controller,
3644 struct sci_base_remote_device *remote_device,
3645 struct sci_base_request *io_request)
3648 enum sci_status status;
3649 struct scic_sds_controller *this_controller;
3650 struct scic_sds_request *the_request;
3651 struct scic_sds_remote_device *the_device;
3653 this_controller = (struct scic_sds_controller *)controller;
3654 the_request = (struct scic_sds_request *)io_request;
3655 the_device = (struct scic_sds_remote_device *)remote_device;
3657 status = scic_sds_remote_device_complete_io(
3658 this_controller, the_device, the_request);
3660 if (status == SCI_SUCCESS) {
3661 index = scic_sds_io_tag_get_index(the_request->io_tag);
3662 this_controller->io_request_table[index] = SCI_INVALID_HANDLE;
3670 * @controller: This is struct sci_base_controller object which is cast into a
3671 * struct scic_sds_controller object.
3672 * @remote_device: This is struct sci_base_remote_device which is cast to a
3673 * struct scic_sds_remote_device object.
3674 * @io_request: This is the struct sci_base_request which is cast to a
3675 * SCIC_SDS_IO_REQUEST object.
3677 * This method is called when the struct scic_sds_controller is in the ready state and
3678 * the continue io handler is called. enum sci_status
3680 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3681 struct sci_base_controller *controller,
3682 struct sci_base_remote_device *remote_device,
3683 struct sci_base_request *io_request)
3685 struct scic_sds_controller *this_controller;
3686 struct scic_sds_request *the_request;
3688 the_request = (struct scic_sds_request *)io_request;
3689 this_controller = (struct scic_sds_controller *)controller;
3691 this_controller->io_request_table[
3692 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3694 scic_sds_controller_post_request(
3696 scic_sds_request_get_post_context(the_request)
3704 * @controller: This is struct sci_base_controller object which is cast into a
3705 * struct scic_sds_controller object.
3706 * @remote_device: This is struct sci_base_remote_device which is cast to a
3707 * struct scic_sds_remote_device object.
3708 * @io_request: This is the struct sci_base_request which is cast to a
3709 * SCIC_SDS_IO_REQUEST object.
3710 * @task_tag: This is the task tag to be assigned to the task request or
3711 * SCI_CONTROLLER_INVALID_IO_TAG.
3713 * This method is called when the struct scic_sds_controller is in the ready state and
3714 * the start task handler is called. - The remote device is requested to start
3715 * the task request - if successful - assign the task to the io_request_table -
3716 * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3717 * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3718 * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3719 * more objects are not in a valid state to accept io requests. How does the io
3720 * tag get assigned in this code path?
3722 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3723 struct sci_base_controller *controller,
3724 struct sci_base_remote_device *remote_device,
3725 struct sci_base_request *io_request,
3728 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3730 struct scic_sds_request *the_request = (struct scic_sds_request *)
3732 struct scic_sds_remote_device *the_device = (struct scic_sds_remote_device *)
3734 enum sci_status status;
3736 status = scic_sds_remote_device_start_task(
3737 this_controller, the_device, the_request
3740 if (status == SCI_SUCCESS) {
3741 this_controller->io_request_table[
3742 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3744 scic_sds_controller_post_request(
3746 scic_sds_request_get_post_context(the_request)
3748 } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3749 this_controller->io_request_table[
3750 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3753 * We will let framework know this task request started successfully,
3754 * although core is still woring on starting the request (to post tc when
3755 * RNC is resumed.) */
3756 status = SCI_SUCCESS;
3763 * @controller: This is struct sci_base_controller object which is cast into a
3764 * struct scic_sds_controller object.
3765 * @remote_device: This is struct sci_base_remote_device which is cast to a
3766 * struct scic_sds_remote_device object.
3767 * @io_request: This is the struct sci_base_request which is cast to a
3768 * SCIC_SDS_IO_REQUEST object.
3770 * This method is called when the struct scic_sds_controller is in the ready state and
3771 * the terminate request handler is called. - call the io request terminate
3772 * function - if successful - post the terminate request to the SCU hardware
3773 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3774 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3775 * accept io requests.
3777 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3778 struct sci_base_controller *controller,
3779 struct sci_base_remote_device *remote_device,
3780 struct sci_base_request *io_request)
3782 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3784 struct scic_sds_request *the_request = (struct scic_sds_request *)
3786 enum sci_status status;
3788 status = scic_sds_io_request_terminate(the_request);
3789 if (status == SCI_SUCCESS) {
3791 * Utilize the original post context command and or in the POST_TC_ABORT
3792 * request sub-type. */
3793 scic_sds_controller_post_request(
3795 scic_sds_request_get_post_context(the_request)
3796 | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3805 * @controller: This is struct scic_sds_controller which receives the link up
3807 * @port: This is struct scic_sds_port with which the phy is associated.
3808 * @phy: This is the struct scic_sds_phy which has gone link up.
3810 * This method is called when the struct scic_sds_controller is in the starting state
3811 * link up handler is called. This method will perform the following: - Stop
3812 * the phy timer - Start the next phy - Report the link up condition to the
3815 static void scic_sds_controller_ready_state_link_up_handler(
3816 struct scic_sds_controller *this_controller,
3817 struct scic_sds_port *port,
3818 struct scic_sds_phy *phy)
3820 this_controller->port_agent.link_up_handler(
3821 this_controller, &this_controller->port_agent, port, phy
3827 * @controller: This is struct scic_sds_controller which receives the link down
3829 * @port: This is struct scic_sds_port with which the phy is associated.
3830 * @phy: This is the struct scic_sds_phy which has gone link down.
3832 * This method is called when the struct scic_sds_controller is in the starting state
3833 * link down handler is called. - Report the link down condition to the port
3836 static void scic_sds_controller_ready_state_link_down_handler(
3837 struct scic_sds_controller *this_controller,
3838 struct scic_sds_port *port,
3839 struct scic_sds_phy *phy)
3841 this_controller->port_agent.link_down_handler(
3842 this_controller, &this_controller->port_agent, port, phy
3847 * *****************************************************************************
3848 * * STOPPING STATE HANDLERS
3849 * ***************************************************************************** */
3853 * @controller: This is struct sci_base_controller object which is cast into a
3854 * struct scic_sds_controller object.
3855 * @remote_device: This is struct sci_base_remote_device which is cast to a
3856 * struct scic_sds_remote_device object.
3857 * @io_request: This is the struct sci_base_request which is cast to a
3858 * SCIC_SDS_IO_REQUEST object.
3860 * This method is called when the struct scic_sds_controller is in a stopping state
3861 * and the complete io handler is called. - This function is not yet
3862 * implemented enum sci_status SCI_FAILURE
3864 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3865 struct sci_base_controller *controller,
3866 struct sci_base_remote_device *remote_device,
3867 struct sci_base_request *io_request)
3869 struct scic_sds_controller *this_controller;
3871 this_controller = (struct scic_sds_controller *)controller;
3873 /* / @todo Implement this function */
3879 * @controller: This is struct sci_base_controller object which is cast into a
3880 * struct scic_sds_controller object.
3881 * @remote_device: This is struct sci_base_remote_device which is cast to a
3882 * struct scic_sds_remote_device object.
3883 * @io_request: This is the struct sci_base_request which is cast to a
3884 * SCIC_SDS_IO_REQUEST object.
3886 * This method is called when the struct scic_sds_controller is in a stopping state
3887 * and the complete task handler is called. - This function is not yet
3888 * implemented enum sci_status SCI_FAILURE
3892 * *****************************************************************************
3893 * * STOPPED STATE HANDLERS
3894 * ***************************************************************************** */
3897 * *****************************************************************************
3898 * * FAILED STATE HANDLERS
3899 * ***************************************************************************** */
3901 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3902 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3903 .base.start_io = scic_sds_controller_default_start_operation_handler,
3904 .base.complete_io = scic_sds_controller_default_request_handler,
3905 .base.continue_io = scic_sds_controller_default_request_handler,
3906 .terminate_request = scic_sds_controller_default_request_handler,
3908 [SCI_BASE_CONTROLLER_STATE_RESET] = {
3909 .base.initialize = scic_sds_controller_reset_state_initialize_handler,
3910 .base.start_io = scic_sds_controller_default_start_operation_handler,
3911 .base.complete_io = scic_sds_controller_default_request_handler,
3912 .base.continue_io = scic_sds_controller_default_request_handler,
3913 .terminate_request = scic_sds_controller_default_request_handler,
3915 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3916 .base.start_io = scic_sds_controller_default_start_operation_handler,
3917 .base.complete_io = scic_sds_controller_default_request_handler,
3918 .base.continue_io = scic_sds_controller_default_request_handler,
3919 .terminate_request = scic_sds_controller_default_request_handler,
3921 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3922 .base.start = scic_sds_controller_initialized_state_start_handler,
3923 .base.start_io = scic_sds_controller_default_start_operation_handler,
3924 .base.complete_io = scic_sds_controller_default_request_handler,
3925 .base.continue_io = scic_sds_controller_default_request_handler,
3926 .terminate_request = scic_sds_controller_default_request_handler,
3928 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3929 .base.start_io = scic_sds_controller_default_start_operation_handler,
3930 .base.complete_io = scic_sds_controller_default_request_handler,
3931 .base.continue_io = scic_sds_controller_default_request_handler,
3932 .terminate_request = scic_sds_controller_default_request_handler,
3933 .link_up = scic_sds_controller_starting_state_link_up_handler,
3934 .link_down = scic_sds_controller_starting_state_link_down_handler
3936 [SCI_BASE_CONTROLLER_STATE_READY] = {
3937 .base.stop = scic_sds_controller_ready_state_stop_handler,
3938 .base.reset = scic_sds_controller_general_reset_handler,
3939 .base.start_io = scic_sds_controller_ready_state_start_io_handler,
3940 .base.complete_io = scic_sds_controller_ready_state_complete_io_handler,
3941 .base.continue_io = scic_sds_controller_ready_state_continue_io_handler,
3942 .base.start_task = scic_sds_controller_ready_state_start_task_handler,
3943 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3944 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3945 .link_up = scic_sds_controller_ready_state_link_up_handler,
3946 .link_down = scic_sds_controller_ready_state_link_down_handler
3948 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3949 .base.start_io = scic_sds_controller_default_start_operation_handler,
3950 .base.complete_io = scic_sds_controller_default_request_handler,
3951 .base.continue_io = scic_sds_controller_default_request_handler,
3952 .terminate_request = scic_sds_controller_default_request_handler,
3954 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3955 .base.start_io = scic_sds_controller_default_start_operation_handler,
3956 .base.complete_io = scic_sds_controller_stopping_state_complete_io_handler,
3957 .base.continue_io = scic_sds_controller_default_request_handler,
3958 .terminate_request = scic_sds_controller_default_request_handler,
3960 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3961 .base.reset = scic_sds_controller_general_reset_handler,
3962 .base.start_io = scic_sds_controller_default_start_operation_handler,
3963 .base.complete_io = scic_sds_controller_default_request_handler,
3964 .base.continue_io = scic_sds_controller_default_request_handler,
3965 .terminate_request = scic_sds_controller_default_request_handler,
3967 [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3968 .base.reset = scic_sds_controller_general_reset_handler,
3969 .base.start_io = scic_sds_controller_default_start_operation_handler,
3970 .base.complete_io = scic_sds_controller_default_request_handler,
3971 .base.continue_io = scic_sds_controller_default_request_handler,
3972 .terminate_request = scic_sds_controller_default_request_handler,
3978 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3981 * This method implements the actions taken by the struct scic_sds_controller on entry
3982 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3983 * controllers initial state. none This function should initialze the
3984 * controller object.
3986 static void scic_sds_controller_initial_state_enter(
3987 struct sci_base_object *object)
3989 struct scic_sds_controller *this_controller;
3991 this_controller = (struct scic_sds_controller *)object;
3993 sci_base_state_machine_change_state(
3994 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3999 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4002 * This method implements the actions taken by the struct scic_sds_controller on exit
4003 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
4004 * controller starting timeout timer. none
4006 static void scic_sds_controller_starting_state_exit(
4007 struct sci_base_object *object)
4009 struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
4011 scic_cb_timer_stop(scic, scic->timeout_timer);
4016 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4019 * This method implements the actions taken by the struct scic_sds_controller on entry
4020 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
4021 * controllers ready state. none
4023 static void scic_sds_controller_ready_state_enter(
4024 struct sci_base_object *object)
4026 struct scic_sds_controller *this_controller;
4028 this_controller = (struct scic_sds_controller *)object;
4030 /* set the default interrupt coalescence number and timeout value. */
4031 scic_controller_set_interrupt_coalescence(
4032 this_controller, 0x10, 250);
4037 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4040 * This method implements the actions taken by the struct scic_sds_controller on exit
4041 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
4043 static void scic_sds_controller_ready_state_exit(
4044 struct sci_base_object *object)
4046 struct scic_sds_controller *this_controller;
4048 this_controller = (struct scic_sds_controller *)object;
4050 /* disable interrupt coalescence. */
4051 scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
4056 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4059 * This method implements the actions taken by the struct scic_sds_controller on entry
4060 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
4061 * controllers ready state. - Stop the phys on this controller - Stop the ports
4062 * on this controller - Stop all of the remote devices on this controller none
4064 static void scic_sds_controller_stopping_state_enter(
4065 struct sci_base_object *object)
4067 struct scic_sds_controller *this_controller;
4069 this_controller = (struct scic_sds_controller *)object;
4071 /* Stop all of the components for this controller */
4072 scic_sds_controller_stop_phys(this_controller);
4073 scic_sds_controller_stop_ports(this_controller);
4074 scic_sds_controller_stop_devices(this_controller);
4079 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4082 * This method implements the actions taken by the struct scic_sds_controller on exit
4083 * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
4084 * controller stopping timeout timer. none
4086 static void scic_sds_controller_stopping_state_exit(
4087 struct sci_base_object *object)
4089 struct scic_sds_controller *this_controller;
4091 this_controller = (struct scic_sds_controller *)object;
4093 scic_cb_timer_stop(this_controller, this_controller->timeout_timer);
4098 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
4101 * This method implements the actions taken by the struct scic_sds_controller on entry
4102 * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
4103 * controllers resetting state. - Write to the SCU hardware reset register to
4104 * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
4106 static void scic_sds_controller_resetting_state_enter(
4107 struct sci_base_object *object)
4109 struct scic_sds_controller *this_controller;
4111 this_controller = (struct scic_sds_controller *)object;
4113 scic_sds_controller_reset_hardware(this_controller);
4115 sci_base_state_machine_change_state(
4116 scic_sds_controller_get_base_state_machine(this_controller),
4117 SCI_BASE_CONTROLLER_STATE_RESET
4121 /* --------------------------------------------------------------------------- */
4123 const struct sci_base_state scic_sds_controller_state_table[] = {
4124 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
4125 .enter_state = scic_sds_controller_initial_state_enter,
4127 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
4128 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
4129 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
4130 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
4131 .exit_state = scic_sds_controller_starting_state_exit,
4133 [SCI_BASE_CONTROLLER_STATE_READY] = {
4134 .enter_state = scic_sds_controller_ready_state_enter,
4135 .exit_state = scic_sds_controller_ready_state_exit,
4137 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
4138 .enter_state = scic_sds_controller_resetting_state_enter,
4140 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
4141 .enter_state = scic_sds_controller_stopping_state_enter,
4142 .exit_state = scic_sds_controller_stopping_state_exit,
4144 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
4145 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}