drivers/scsi/isci/core/scic_sds_controller.c

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
  35  *   * Redistributions in binary form must reproduce the above copyright
  36  *     notice, this list of conditions and the following disclaimer in
  37  *     the documentation and/or other materials provided with the
  38  *     distribution.
  39  *   * Neither the name of Intel Corporation nor the names of its
  40  *     contributors may be used to endorse or promote products derived
  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55
  56 #include <linux/device.h>
  57 #include "scic_controller.h"
  58 #include "scic_phy.h"
  59 #include "scic_port.h"
  60 #include "scic_remote_device.h"
  61 #include "scic_sds_controller.h"
  62 #include "scic_sds_controller_registers.h"
  63 #include "scic_sds_pci.h"
  64 #include "scic_sds_phy.h"
  65 #include "scic_sds_port_configuration_agent.h"
  66 #include "scic_sds_port.h"
  67 #include "scic_sds_remote_device.h"
  68 #include "scic_sds_request.h"
  69 #include "sci_environment.h"
  70 #include "sci_util.h"
  71 #include "scu_completion_codes.h"
  72 #include "scu_constants.h"
  73 #include "scu_event_codes.h"
  74 #include "scu_remote_node_context.h"
  75 #include "scu_task_context.h"
  76 #include "scu_unsolicited_frame.h"
  77
  78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME      200
  79
  80 /**
  81  * smu_dcc_get_max_ports() -
  82  *
  83  * This macro returns the maximum number of logical ports supported by the
  84  * hardware. The caller passes in the value read from the device context
  85  * capacity register and this macro will mash and shift the value appropriately.
  86  */
  87 #define smu_dcc_get_max_ports(dcc_value) \
  88         (\
  89                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
  90                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
  91         )
  92
  93 /**
  94  * smu_dcc_get_max_task_context() -
  95  *
  96  * This macro returns the maximum number of task contexts supported by the
  97  * hardware. The caller passes in the value read from the device context
  98  * capacity register and this macro will mash and shift the value appropriately.
  99  */
 100 #define smu_dcc_get_max_task_context(dcc_value) \
 101         (\
 102                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
 103                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
 104         )
 105
 106 /**
 107  * smu_dcc_get_max_remote_node_context() -
 108  *
 109  * This macro returns the maximum number of remote node contexts supported by
 110  * the hardware. The caller passes in the value read from the device context
 111  * capacity register and this macro will mash and shift the value appropriately.
 112  */
 113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
 114         (\
 115                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
 116                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
 117         )
 118
 119
 120 static void scic_sds_controller_power_control_timer_handler(
 121         void *controller);
 122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT  3
 123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT  3
 124
 125 /**
 126  *
 127  *
 128  * The number of milliseconds to wait for a phy to start.
 129  */
 130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT      100
 131
 132 /**
 133  *
 134  *
 135  * The number of milliseconds to wait while a given phy is consuming power
 136  * before allowing another set of phys to consume power. Ultimately, this will
 137  * be specified by OEM parameter.
 138  */
 139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
 140
 141 /**
 142  * COMPLETION_QUEUE_CYCLE_BIT() -
 143  *
 144  * This macro will return the cycle bit of the completion queue entry
 145  */
 146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
 147
 148 /**
 149  * NORMALIZE_GET_POINTER() -
 150  *
 151  * This macro will normalize the completion queue get pointer so its value can
 152  * be used as an index into an array
 153  */
 154 #define NORMALIZE_GET_POINTER(x) \
 155         ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
 156
 157 /**
 158  * NORMALIZE_PUT_POINTER() -
 159  *
 160  * This macro will normalize the completion queue put pointer so its value can
 161  * be used as an array inde
 162  */
 163 #define NORMALIZE_PUT_POINTER(x) \
 164         ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
 165
 166
 167 /**
 168  * NORMALIZE_GET_POINTER_CYCLE_BIT() -
 169  *
 170  * This macro will normalize the completion queue cycle pointer so it matches
 171  * the completion queue cycle bit
 172  */
 173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
 174         ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
 175
 176 /**
 177  * NORMALIZE_EVENT_POINTER() -
 178  *
 179  * This macro will normalize the completion queue event entry so its value can
 180  * be used as an index.
 181  */
 182 #define NORMALIZE_EVENT_POINTER(x) \
 183         (\
 184                 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
 185                 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
 186         )
 187
 188 /**
 189  * INCREMENT_COMPLETION_QUEUE_GET() -
 190  *
 191  * This macro will increment the controllers completion queue index value and
 192  * possibly toggle the cycle bit if the completion queue index wraps back to 0.
 193  */
 194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
 195         INCREMENT_QUEUE_GET(\
 196                 (index), \
 197                 (cycle), \
 198                 (controller)->completion_queue_entries, \
 199                 SMU_CQGR_CYCLE_BIT \
 200                 )
 201
 202 /**
 203  * INCREMENT_EVENT_QUEUE_GET() -
 204  *
 205  * This macro will increment the controllers event queue index value and
 206  * possibly toggle the event cycle bit if the event queue index wraps back to 0.
 207  */
 208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
 209         INCREMENT_QUEUE_GET(\
 210                 (index), \
 211                 (cycle), \
 212                 (controller)->completion_event_entries, \
 213                 SMU_CQGR_EVENT_CYCLE_BIT \
 214                 )
 215
 216 struct sci_base_memory_descriptor_list *
 217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
 218 {
 219        return &scic->parent.mdl;
 220 }
 221
 222 /*
 223  * ****************************************************************************-
 224  * * SCIC SDS Controller Initialization Methods
 225  * ****************************************************************************- */
 226
 227 /**
 228  * This timer is used to start another phy after we have given up on the
 229  *    previous phy to transition to the ready state.
 230  *
 231  *
 232  */
 233 static void scic_sds_controller_phy_startup_timeout_handler(
 234         void *controller)
 235 {
 236         enum sci_status status;
 237         struct scic_sds_controller *this_controller;
 238
 239         this_controller = (struct scic_sds_controller *)controller;
 240
 241         this_controller->phy_startup_timer_pending = false;
 242
 243         status = SCI_FAILURE;
 244
 245         while (status != SCI_SUCCESS) {
 246                 status = scic_sds_controller_start_next_phy(this_controller);
 247         }
 248 }
 249
 250 /**
 251  *
 252  *
 253  * This method initializes the phy startup operations for controller start.
 254  */
 255 enum sci_status scic_sds_controller_initialize_phy_startup(
 256         struct scic_sds_controller *this_controller)
 257 {
 258         this_controller->phy_startup_timer = isci_event_timer_create(
 259                 this_controller,
 260                 scic_sds_controller_phy_startup_timeout_handler,
 261                 this_controller
 262                 );
 263
 264         if (this_controller->phy_startup_timer == NULL) {
 265                 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
 266         } else {
 267                 this_controller->next_phy_to_start = 0;
 268                 this_controller->phy_startup_timer_pending = false;
 269         }
 270
 271         return SCI_SUCCESS;
 272 }
 273
 274 /**
 275  *
 276  *
 277  * This method initializes the power control operations for the controller
 278  * object.
 279  */
 280 void scic_sds_controller_initialize_power_control(
 281         struct scic_sds_controller *this_controller)
 282 {
 283         this_controller->power_control.timer = isci_event_timer_create(
 284                 this_controller,
 285                 scic_sds_controller_power_control_timer_handler,
 286                 this_controller
 287                 );
 288
 289         memset(
 290                 this_controller->power_control.requesters,
 291                 0,
 292                 sizeof(this_controller->power_control.requesters)
 293                 );
 294
 295         this_controller->power_control.phys_waiting = 0;
 296         this_controller->power_control.phys_granted_power = 0;
 297 }
 298
 299 /* --------------------------------------------------------------------------- */
 300
 301 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT       (32)
 302 #define SCU_TASK_CONTEXT_ALIGNMENT              (256)
 303 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
 304 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT  (1024)
 305 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT  (64)
 306
 307 /* --------------------------------------------------------------------------- */
 308
 309 /**
 310  * This method builds the memory descriptor table for this controller.
 311  * @this_controller: This parameter specifies the controller object for which
 312  *    to build the memory table.
 313  *
 314  */
 315 void scic_sds_controller_build_memory_descriptor_table(
 316         struct scic_sds_controller *this_controller)
 317 {
 318         sci_base_mde_construct(
 319                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 320                 SCU_COMPLETION_RAM_ALIGNMENT,
 321                 (sizeof(u32) * this_controller->completion_queue_entries),
 322                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 323                 );
 324
 325         sci_base_mde_construct(
 326                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 327                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 328                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 329                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 330                 );
 331
 332         sci_base_mde_construct(
 333                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 334                 SCU_TASK_CONTEXT_ALIGNMENT,
 335                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 336                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 337                 );
 338
 339         /*
 340          * The UF buffer address table size must be programmed to a power
 341          * of 2.  Find the first power of 2 that is equal to or greater then
 342          * the number of unsolicited frame buffers to be utilized. */
 343         scic_sds_unsolicited_frame_control_set_address_table_count(
 344                 &this_controller->uf_control
 345                 );
 346
 347         sci_base_mde_construct(
 348                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 349                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 350                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 351                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 352                 );
 353 }
 354
 355 /**
 356  * This method validates the driver supplied memory descriptor table.
 357  * @this_controller:
 358  *
 359  * enum sci_status
 360  */
 361 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
 362         struct scic_sds_controller *this_controller)
 363 {
 364         bool mde_list_valid;
 365
 366         mde_list_valid = sci_base_mde_is_valid(
 367                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 368                 SCU_COMPLETION_RAM_ALIGNMENT,
 369                 (sizeof(u32) * this_controller->completion_queue_entries),
 370                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 371                 );
 372
 373         if (mde_list_valid == false)
 374                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 375
 376         mde_list_valid = sci_base_mde_is_valid(
 377                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 378                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 379                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 380                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 381                 );
 382
 383         if (mde_list_valid == false)
 384                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 385
 386         mde_list_valid = sci_base_mde_is_valid(
 387                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 388                 SCU_TASK_CONTEXT_ALIGNMENT,
 389                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 390                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 391                 );
 392
 393         if (mde_list_valid == false)
 394                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 395
 396         mde_list_valid = sci_base_mde_is_valid(
 397                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 398                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 399                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 400                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 401                 );
 402
 403         if (mde_list_valid == false)
 404                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 405
 406         return SCI_SUCCESS;
 407 }
 408
 409 /**
 410  * This method initializes the controller with the physical memory addresses
 411  *    that are used to communicate with the driver.
 412  * @this_controller:
 413  *
 414  */
 415 void scic_sds_controller_ram_initialization(
 416         struct scic_sds_controller *this_controller)
 417 {
 418         struct sci_physical_memory_descriptor *mde;
 419
 420         /*
 421          * The completion queue is actually placed in cacheable memory
 422          * Therefore it no longer comes out of memory in the MDL. */
 423         mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
 424         this_controller->completion_queue = (u32 *)mde->virtual_address;
 425         SMU_CQBAR_WRITE(this_controller, mde->physical_address);
 426
 427         /*
 428          * Program the location of the Remote Node Context table
 429          * into the SCU. */
 430         mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
 431         this_controller->remote_node_context_table = (union scu_remote_node_context *)
 432                                                      mde->virtual_address;
 433         SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
 434
 435         /* Program the location of the Task Context table into the SCU. */
 436         mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
 437         this_controller->task_context_table = (struct scu_task_context *)
 438                                               mde->virtual_address;
 439         SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
 440
 441         mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
 442         scic_sds_unsolicited_frame_control_construct(
 443                 &this_controller->uf_control, mde, this_controller
 444                 );
 445
 446         /*
 447          * Inform the silicon as to the location of the UF headers and
 448          * address table. */
 449         SCU_UFHBAR_WRITE(
 450                 this_controller,
 451                 this_controller->uf_control.headers.physical_address);
 452         SCU_PUFATHAR_WRITE(
 453                 this_controller,
 454                 this_controller->uf_control.address_table.physical_address);
 455 }
 456
 457 /**
 458  * This method initializes the task context data for the controller.
 459  * @this_controller:
 460  *
 461  */
 462 void scic_sds_controller_assign_task_entries(
 463         struct scic_sds_controller *this_controller)
 464 {
 465         u32 task_assignment;
 466
 467         /*
 468          * Assign all the TCs to function 0
 469          * TODO: Do we actually need to read this register to write it back? */
 470         task_assignment = SMU_TCA_READ(this_controller, 0);
 471
 472         task_assignment =
 473                 (
 474                         task_assignment
 475                         | (SMU_TCA_GEN_VAL(STARTING, 0))
 476                         | (SMU_TCA_GEN_VAL(ENDING,  this_controller->task_context_entries - 1))
 477                         | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
 478                 );
 479
 480         SMU_TCA_WRITE(this_controller, 0, task_assignment);
 481 }
 482
 483 /**
 484  * This method initializes the hardware completion queue.
 485  *
 486  *
 487  */
 488 void scic_sds_controller_initialize_completion_queue(
 489         struct scic_sds_controller *this_controller)
 490 {
 491         u32 index;
 492         u32 completion_queue_control_value;
 493         u32 completion_queue_get_value;
 494         u32 completion_queue_put_value;
 495
 496         this_controller->completion_queue_get = 0;
 497
 498         completion_queue_control_value = (
 499                 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
 500                 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
 501                 );
 502
 503         SMU_CQC_WRITE(this_controller, completion_queue_control_value);
 504
 505         /* Set the completion queue get pointer and enable the queue */
 506         completion_queue_get_value = (
 507                 (SMU_CQGR_GEN_VAL(POINTER, 0))
 508                 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
 509                 | (SMU_CQGR_GEN_BIT(ENABLE))
 510                 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
 511                 );
 512
 513         SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
 514
 515         /* Set the completion queue put pointer */
 516         completion_queue_put_value = (
 517                 (SMU_CQPR_GEN_VAL(POINTER, 0))
 518                 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
 519                 );
 520
 521         SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
 522
 523         /* Initialize the cycle bit of the completion queue entries */
 524         for (index = 0; index < this_controller->completion_queue_entries; index++) {
 525                 /*
 526                  * If get.cycle_bit != completion_queue.cycle_bit
 527                  * its not a valid completion queue entry
 528                  * so at system start all entries are invalid */
 529                 this_controller->completion_queue[index] = 0x80000000;
 530         }
 531 }
 532
 533 /**
 534  * This method initializes the hardware unsolicited frame queue.
 535  *
 536  *
 537  */
 538 void scic_sds_controller_initialize_unsolicited_frame_queue(
 539         struct scic_sds_controller *this_controller)
 540 {
 541         u32 frame_queue_control_value;
 542         u32 frame_queue_get_value;
 543         u32 frame_queue_put_value;
 544
 545         /* Write the queue size */
 546         frame_queue_control_value =
 547                 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
 548
 549         SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
 550
 551         /* Setup the get pointer for the unsolicited frame queue */
 552         frame_queue_get_value = (
 553                 SCU_UFQGP_GEN_VAL(POINTER, 0)
 554                 |  SCU_UFQGP_GEN_BIT(ENABLE_BIT)
 555                 );
 556
 557         SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
 558
 559         /* Setup the put pointer for the unsolicited frame queue */
 560         frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
 561
 562         SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
 563 }
 564
 565 /**
 566  * This method enables the hardware port task scheduler.
 567  *
 568  *
 569  */
 570 void scic_sds_controller_enable_port_task_scheduler(
 571         struct scic_sds_controller *this_controller)
 572 {
 573         u32 port_task_scheduler_value;
 574
 575         port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
 576
 577         port_task_scheduler_value |=
 578                 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
 579
 580         SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
 581 }
 582
 583 /* --------------------------------------------------------------------------- */
 584
 585 /**
 586  *
 587  *
 588  * This macro is used to delay between writes to the AFE registers during AFE
 589  * initialization.
 590  */
 591 #define AFE_REGISTER_WRITE_DELAY 10
 592
 593 /* Initialize the AFE for this phy index. We need to read the AFE setup from
 594  * the OEM parameters none
 595  */
 596 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
 597 {
 598         u32 afe_status;
 599         u32 phy_id;
 600
 601         /* Clear DFX Status registers */
 602         scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
 603         udelay(AFE_REGISTER_WRITE_DELAY);
 604
 605         /* Configure bias currents to normal */
 606         if (is_a0())
 607                 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
 608         else
 609                 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
 610
 611         udelay(AFE_REGISTER_WRITE_DELAY);
 612
 613         /* Enable PLL */
 614         if (is_b0())
 615                 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
 616         else
 617                 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
 618
 619         udelay(AFE_REGISTER_WRITE_DELAY);
 620
 621         /* Wait for the PLL to lock */
 622         do {
 623                 afe_status = scu_afe_register_read(
 624                         scic, afe_common_block_status);
 625                 udelay(AFE_REGISTER_WRITE_DELAY);
 626         } while ((afe_status & 0x00001000) == 0);
 627
 628         if (is_b0()) {
 629                 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
 630                 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
 631                 udelay(AFE_REGISTER_WRITE_DELAY);
 632         }
 633
 634         for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
 635                 if (is_b0()) {
 636                          /* Configure transmitter SSC parameters */
 637                         scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
 638                         udelay(AFE_REGISTER_WRITE_DELAY);
 639                 } else {
 640                         /*
 641                          * All defaults, except the Receive Word Alignament/Comma Detect
 642                          * Enable....(0xe800) */
 643                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
 644                         udelay(AFE_REGISTER_WRITE_DELAY);
 645
 646                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
 647                         udelay(AFE_REGISTER_WRITE_DELAY);
 648                 }
 649
 650                 /*
 651                  * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 652                  * & increase TX int & ext bias 20%....(0xe85c) */
 653                 if (is_a0())
 654                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
 655                 else if (is_a2())
 656                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
 657                 else {
 658                          /* Power down TX and RX (PWRDNTX and PWRDNRX) */
 659                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
 660                         udelay(AFE_REGISTER_WRITE_DELAY);
 661
 662                         /*
 663                          * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 664                          * & increase TX int & ext bias 20%....(0xe85c) */
 665                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
 666                 }
 667                 udelay(AFE_REGISTER_WRITE_DELAY);
 668
 669                 if (is_a0() || is_a2()) {
 670                         /* Enable TX equalization (0xe824) */
 671                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 672                         udelay(AFE_REGISTER_WRITE_DELAY);
 673                 }
 674
 675                 /*
 676                  * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
 677                  * RDD=0x0(RX Detect Enabled) ....(0xe800) */
 678                 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
 679                 udelay(AFE_REGISTER_WRITE_DELAY);
 680
 681                 /* Leave DFE/FFE on */
 682                 if (is_a0())
 683                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
 684                 else if (is_a2())
 685                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 686                 else {
 687                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 688                         udelay(AFE_REGISTER_WRITE_DELAY);
 689                         /* Enable TX equalization (0xe824) */
 690                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 691                 }
 692                 udelay(AFE_REGISTER_WRITE_DELAY);
 693
 694                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
 695                 udelay(AFE_REGISTER_WRITE_DELAY);
 696
 697                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
 698                 udelay(AFE_REGISTER_WRITE_DELAY);
 699
 700                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
 701                 udelay(AFE_REGISTER_WRITE_DELAY);
 702
 703                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
 704                 udelay(AFE_REGISTER_WRITE_DELAY);
 705         }
 706
 707         /* Transfer control to the PEs */
 708         scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
 709         udelay(AFE_REGISTER_WRITE_DELAY);
 710 }
 711
 712 /*
 713  * ****************************************************************************-
 714  * * SCIC SDS Controller Internal Start/Stop Routines
 715  * ****************************************************************************- */
 716
 717
 718 /**
 719  * This method will attempt to transition into the ready state for the
 720  *    controller and indicate that the controller start operation has completed
 721  *    if all criteria are met.
 722  * @this_controller: This parameter indicates the controller object for which
 723  *    to transition to ready.
 724  * @status: This parameter indicates the status value to be pass into the call
 725  *    to scic_cb_controller_start_complete().
 726  *
 727  * none.
 728  */
 729 static void scic_sds_controller_transition_to_ready(
 730         struct scic_sds_controller *this_controller,
 731         enum sci_status status)
 732 {
 733         if (this_controller->parent.state_machine.current_state_id
 734             == SCI_BASE_CONTROLLER_STATE_STARTING) {
 735                 /*
 736                  * We move into the ready state, because some of the phys/ports
 737                  * may be up and operational. */
 738                 sci_base_state_machine_change_state(
 739                         scic_sds_controller_get_base_state_machine(this_controller),
 740                         SCI_BASE_CONTROLLER_STATE_READY
 741                         );
 742
 743                 isci_event_controller_start_complete(this_controller, status);
 744         }
 745 }
 746
 747 /**
 748  * This method is the general timeout handler for the controller. It will take
 749  *    the correct timetout action based on the current controller state
 750  */
 751 void scic_sds_controller_timeout_handler(
 752         struct scic_sds_controller *scic)
 753 {
 754         enum sci_base_controller_states current_state;
 755
 756         current_state = sci_base_state_machine_get_state(
 757                 scic_sds_controller_get_base_state_machine(scic));
 758
 759         if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
 760                 scic_sds_controller_transition_to_ready(
 761                         scic, SCI_FAILURE_TIMEOUT);
 762         } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
 763                 sci_base_state_machine_change_state(
 764                         scic_sds_controller_get_base_state_machine(scic),
 765                         SCI_BASE_CONTROLLER_STATE_FAILED);
 766                 isci_event_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
 767         } else  /* / @todo Now what do we want to do in this case? */
 768                 dev_err(scic_to_dev(scic),
 769                         "%s: Controller timer fired when controller was not "
 770                         "in a state being timed.\n",
 771                         __func__);
 772 }
 773
 774 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
 775 {
 776         u32 index;
 777         enum sci_status port_status;
 778         enum sci_status status = SCI_SUCCESS;
 779
 780         for (index = 0; index < scic->logical_port_entries; index++) {
 781                 struct scic_sds_port *sci_port = &scic->port_table[index];
 782                 SCI_BASE_PORT_HANDLER_T stop;
 783
 784                 stop = sci_port->state_handlers->parent.stop_handler;
 785                 port_status = stop(&sci_port->parent);
 786
 787                 if ((port_status != SCI_SUCCESS) &&
 788                     (port_status != SCI_FAILURE_INVALID_STATE)) {
 789                         status = SCI_FAILURE;
 790
 791                         dev_warn(scic_to_dev(scic),
 792                                  "%s: Controller stop operation failed to "
 793                                  "stop port %d because of status %d.\n",
 794                                  __func__,
 795                                  sci_port->logical_port_index,
 796                                  port_status);
 797                 }
 798         }
 799
 800         return status;
 801 }
 802
 803 /**
 804  *
 805  *
 806  *
 807  */
 808 static void scic_sds_controller_phy_timer_start(
 809         struct scic_sds_controller *this_controller)
 810 {
 811         isci_event_timer_start(
 812                 this_controller,
 813                 this_controller->phy_startup_timer,
 814                 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
 815                 );
 816
 817         this_controller->phy_startup_timer_pending = true;
 818 }
 819
 820 /**
 821  *
 822  *
 823  *
 824  */
 825 void scic_sds_controller_phy_timer_stop(
 826         struct scic_sds_controller *this_controller)
 827 {
 828         isci_event_timer_stop(
 829                 this_controller,
 830                 this_controller->phy_startup_timer
 831                 );
 832
 833         this_controller->phy_startup_timer_pending = false;
 834 }
 835
 836 /**
 837  * This method is called internally by the controller object to start the next
 838  *    phy on the controller.  If all the phys have been started, then this
 839  *    method will attempt to transition the controller to the READY state and
 840  *    inform the user (scic_cb_controller_start_complete()).
 841  * @this_controller: This parameter specifies the controller object for which
 842  *    to start the next phy.
 843  *
 844  * enum sci_status
 845  */
 846 enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic)
 847 {
 848         struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
 849         struct scic_sds_phy *sci_phy;
 850         enum sci_status status;
 851
 852         status = SCI_SUCCESS;
 853
 854         if (scic->phy_startup_timer_pending)
 855                 return status;
 856
 857         if (scic->next_phy_to_start >= SCI_MAX_PHYS) {
 858                 bool is_controller_start_complete = true;
 859                 u32 state;
 860                 u8 index;
 861
 862                 for (index = 0; index < SCI_MAX_PHYS; index++) {
 863                         sci_phy = &scic->phy_table[index];
 864                         state = sci_phy->parent.state_machine.current_state_id;
 865
 866                         if (!scic_sds_phy_get_port(sci_phy))
 867                                 continue;
 868
 869                         /* The controller start operation is complete iff:
 870                          * - all links have been given an opportunity to start
 871                          * - have no indication of a connected device
 872                          * - have an indication of a connected device and it has
 873                          *   finished the link training process.
 874                          */
 875                         if ((sci_phy->is_in_link_training == false &&
 876                              state == SCI_BASE_PHY_STATE_INITIAL) ||
 877                             (sci_phy->is_in_link_training == false &&
 878                              state == SCI_BASE_PHY_STATE_STOPPED) ||
 879                             (sci_phy->is_in_link_training == true &&
 880                              state == SCI_BASE_PHY_STATE_STARTING)) {
 881                                 is_controller_start_complete = false;
 882                                 break;
 883                         }
 884                 }
 885
 886                 /*
 887                  * The controller has successfully finished the start process.
 888                  * Inform the SCI Core user and transition to the READY state. */
 889                 if (is_controller_start_complete == true) {
 890                         scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS);
 891                         scic_sds_controller_phy_timer_stop(scic);
 892                 }
 893         } else {
 894                 sci_phy = &scic->phy_table[scic->next_phy_to_start];
 895
 896                 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
 897                         if (scic_sds_phy_get_port(sci_phy) == NULL) {
 898                                 scic->next_phy_to_start++;
 899
 900                                 /* Caution recursion ahead be forwarned
 901                                  *
 902                                  * The PHY was never added to a PORT in MPC mode
 903                                  * so start the next phy in sequence This phy
 904                                  * will never go link up and will not draw power
 905                                  * the OEM parameters either configured the phy
 906                                  * incorrectly for the PORT or it was never
 907                                  * assigned to a PORT
 908                                  */
 909                                 return scic_sds_controller_start_next_phy(scic);
 910                         }
 911                 }
 912
 913                 status = scic_sds_phy_start(sci_phy);
 914
 915                 if (status == SCI_SUCCESS) {
 916                         scic_sds_controller_phy_timer_start(scic);
 917                 } else {
 918                         dev_warn(scic_to_dev(scic),
 919                                  "%s: Controller stop operation failed "
 920                                  "to stop phy %d because of status "
 921                                  "%d.\n",
 922                                  __func__,
 923                                  scic->phy_table[scic->next_phy_to_start].phy_index,
 924                                  status);
 925                 }
 926
 927                 scic->next_phy_to_start++;
 928         }
 929
 930         return status;
 931 }
 932
 933 /**
 934  *
 935  * @this_controller:
 936  *
 937  * enum sci_status
 938  */
 939 enum sci_status scic_sds_controller_stop_phys(
 940         struct scic_sds_controller *this_controller)
 941 {
 942         u32 index;
 943         enum sci_status status;
 944         enum sci_status phy_status;
 945
 946         status = SCI_SUCCESS;
 947
 948         for (index = 0; index < SCI_MAX_PHYS; index++) {
 949                 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
 950
 951                 if (
 952                         (phy_status != SCI_SUCCESS)
 953                         && (phy_status != SCI_FAILURE_INVALID_STATE)
 954                         ) {
 955                         status = SCI_FAILURE;
 956
 957                         dev_warn(scic_to_dev(this_controller),
 958                                  "%s: Controller stop operation failed to stop "
 959                                  "phy %d because of status %d.\n",
 960                                  __func__,
 961                                  this_controller->phy_table[index].phy_index, phy_status);
 962                 }
 963         }
 964
 965         return status;
 966 }
 967
 968 /**
 969  *
 970  * @this_controller:
 971  *
 972  * enum sci_status
 973  */
 974 enum sci_status scic_sds_controller_stop_devices(
 975         struct scic_sds_controller *this_controller)
 976 {
 977         u32 index;
 978         enum sci_status status;
 979         enum sci_status device_status;
 980
 981         status = SCI_SUCCESS;
 982
 983         for (index = 0; index < this_controller->remote_node_entries; index++) {
 984                 if (this_controller->device_table[index] != NULL) {
 985                         /* / @todo What timeout value do we want to provide to this request? */
 986                         device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
 987
 988                         if ((device_status != SCI_SUCCESS) &&
 989                             (device_status != SCI_FAILURE_INVALID_STATE)) {
 990                                 dev_warn(scic_to_dev(this_controller),
 991                                          "%s: Controller stop operation failed "
 992                                          "to stop device 0x%p because of "
 993                                          "status %d.\n",
 994                                          __func__,
 995                                          this_controller->device_table[index], device_status);
 996                         }
 997                 }
 998         }
 999
1000         return status;
1001 }
1002
1003 /*
1004  * ****************************************************************************-
1005  * * SCIC SDS Controller Power Control (Staggered Spinup)
1006  * ****************************************************************************- */
1007
1008 /**
1009  *
1010  *
1011  * This method starts the power control timer for this controller object.
1012  */
1013 static void scic_sds_controller_power_control_timer_start(
1014         struct scic_sds_controller *this_controller)
1015 {
1016         isci_event_timer_start(
1017                 this_controller, this_controller->power_control.timer,
1018                 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1019                 );
1020
1021         this_controller->power_control.timer_started = true;
1022 }
1023
1024 /**
1025  * This method stops the power control timer for this controller object.
1026  *
1027  * @param scic
1028  */
1029 void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller *scic)
1030 {
1031         if (scic->power_control.timer_started) {
1032                 isci_event_timer_stop(scic, scic->power_control.timer);
1033                 scic->power_control.timer_started = false;
1034         }
1035 }
1036
1037 /**
1038  * This method stops and starts the power control timer for this controller object.
1039  *
1040  * @param scic
1041  */
1042 void scic_sds_controller_power_control_timer_restart(
1043         struct scic_sds_controller *scic)
1044 {
1045         scic_sds_controller_power_control_timer_stop(scic);
1046         scic_sds_controller_power_control_timer_start(scic);
1047 }
1048
1049 /**
1050  *
1051  *
1052  *
1053  */
1054 static void scic_sds_controller_power_control_timer_handler(
1055         void *controller)
1056 {
1057         struct scic_sds_controller *this_controller;
1058
1059         this_controller = (struct scic_sds_controller *)controller;
1060
1061         this_controller->power_control.phys_granted_power = 0;
1062
1063         if (this_controller->power_control.phys_waiting == 0) {
1064                 this_controller->power_control.timer_started = false;
1065         } else {
1066                 struct scic_sds_phy *the_phy = NULL;
1067                 u8 i;
1068
1069                 for (i = 0;
1070                      (i < SCI_MAX_PHYS)
1071                      && (this_controller->power_control.phys_waiting != 0);
1072                      i++) {
1073                         if (this_controller->power_control.requesters[i] != NULL) {
1074                                 if (this_controller->power_control.phys_granted_power <
1075                                     this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1076                                         the_phy = this_controller->power_control.requesters[i];
1077                                         this_controller->power_control.requesters[i] = NULL;
1078                                         this_controller->power_control.phys_waiting--;
1079                                         this_controller->power_control.phys_granted_power++;
1080                                         scic_sds_phy_consume_power_handler(the_phy);
1081                                 } else {
1082                                         break;
1083                                 }
1084                         }
1085                 }
1086
1087                 /*
1088                  * It doesn't matter if the power list is empty, we need to start the
1089                  * timer in case another phy becomes ready.
1090                  */
1091                 scic_sds_controller_power_control_timer_start(this_controller);
1092         }
1093 }
1094
1095 /**
1096  * This method inserts the phy in the stagger spinup control queue.
1097  * @this_controller:
1098  *
1099  *
1100  */
1101 void scic_sds_controller_power_control_queue_insert(
1102         struct scic_sds_controller *this_controller,
1103         struct scic_sds_phy *the_phy)
1104 {
1105         BUG_ON(the_phy == NULL);
1106
1107         if (this_controller->power_control.phys_granted_power <
1108             this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1109                 this_controller->power_control.phys_granted_power++;
1110                 scic_sds_phy_consume_power_handler(the_phy);
1111
1112                 /*
1113                  * stop and start the power_control timer. When the timer fires, the
1114                  * no_of_phys_granted_power will be set to 0
1115                  */
1116                 scic_sds_controller_power_control_timer_restart(this_controller);
1117         } else {
1118                 /* Add the phy in the waiting list */
1119                 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1120                 this_controller->power_control.phys_waiting++;
1121         }
1122 }
1123
1124 /**
1125  * This method removes the phy from the stagger spinup control queue.
1126  * @this_controller:
1127  *
1128  *
1129  */
1130 void scic_sds_controller_power_control_queue_remove(
1131         struct scic_sds_controller *this_controller,
1132         struct scic_sds_phy *the_phy)
1133 {
1134         BUG_ON(the_phy == NULL);
1135
1136         if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1137                 this_controller->power_control.phys_waiting--;
1138         }
1139
1140         this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1141 }
1142
1143 /*
1144  * ****************************************************************************-
1145  * * SCIC SDS Controller Completion Routines
1146  * ****************************************************************************- */
1147
1148 /**
1149  * This method returns a true value if the completion queue has entries that
1150  *    can be processed
1151  * @this_controller:
1152  *
1153  * bool true if the completion queue has entries to process false if the
1154  * completion queue has no entries to process
1155  */
1156 static bool scic_sds_controller_completion_queue_has_entries(
1157         struct scic_sds_controller *this_controller)
1158 {
1159         u32 get_value = this_controller->completion_queue_get;
1160         u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1161
1162         if (
1163                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1164                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1165                 ) {
1166                 return true;
1167         }
1168
1169         return false;
1170 }
1171
1172 /* --------------------------------------------------------------------------- */
1173
1174 /**
1175  * This method processes a task completion notification.  This is called from
1176  *    within the controller completion handler.
1177  * @this_controller:
1178  * @completion_entry:
1179  *
1180  */
1181 static void scic_sds_controller_task_completion(
1182         struct scic_sds_controller *this_controller,
1183         u32 completion_entry)
1184 {
1185         u32 index;
1186         struct scic_sds_request *io_request;
1187
1188         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1189         io_request = this_controller->io_request_table[index];
1190
1191         /* Make sure that we really want to process this IO request */
1192         if (
1193                 (io_request != NULL)
1194                 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1195                 && (
1196                         scic_sds_io_tag_get_sequence(io_request->io_tag)
1197                         == this_controller->io_request_sequence[index]
1198                         )
1199                 ) {
1200                 /* Yep this is a valid io request pass it along to the io request handler */
1201                 scic_sds_io_request_tc_completion(io_request, completion_entry);
1202         }
1203 }
1204
1205 /**
1206  * This method processes an SDMA completion event.  This is called from within
1207  *    the controller completion handler.
1208  * @this_controller:
1209  * @completion_entry:
1210  *
1211  */
1212 static void scic_sds_controller_sdma_completion(
1213         struct scic_sds_controller *this_controller,
1214         u32 completion_entry)
1215 {
1216         u32 index;
1217         struct scic_sds_request *io_request;
1218         struct scic_sds_remote_device *device;
1219
1220         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1221
1222         switch (scu_get_command_request_type(completion_entry)) {
1223         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1224         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1225                 io_request = this_controller->io_request_table[index];
1226                 dev_warn(scic_to_dev(this_controller),
1227                          "%s: SCIC SDS Completion type SDMA %x for io request "
1228                          "%p\n",
1229                          __func__,
1230                          completion_entry,
1231                          io_request);
1232                 /* @todo For a post TC operation we need to fail the IO
1233                  * request
1234                  */
1235                 break;
1236
1237         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1238         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1239         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1240                 device = this_controller->device_table[index];
1241                 dev_warn(scic_to_dev(this_controller),
1242                          "%s: SCIC SDS Completion type SDMA %x for remote "
1243                          "device %p\n",
1244                          __func__,
1245                          completion_entry,
1246                          device);
1247                 /* @todo For a port RNC operation we need to fail the
1248                  * device
1249                  */
1250                 break;
1251
1252         default:
1253                 dev_warn(scic_to_dev(this_controller),
1254                          "%s: SCIC SDS Completion unknown SDMA completion "
1255                          "type %x\n",
1256                          __func__,
1257                          completion_entry);
1258                 break;
1259
1260         }
1261 }
1262
1263 /**
1264  *
1265  * @this_controller:
1266  * @completion_entry:
1267  *
1268  * This method processes an unsolicited frame message.  This is called from
1269  * within the controller completion handler. none
1270  */
1271 static void scic_sds_controller_unsolicited_frame(
1272         struct scic_sds_controller *this_controller,
1273         u32 completion_entry)
1274 {
1275         u32 index;
1276         u32 frame_index;
1277
1278         struct scu_unsolicited_frame_header *frame_header;
1279         struct scic_sds_phy *phy;
1280         struct scic_sds_remote_device *device;
1281
1282         enum sci_status result = SCI_FAILURE;
1283
1284         frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1285
1286         frame_header
1287                 = this_controller->uf_control.buffers.array[frame_index].header;
1288         this_controller->uf_control.buffers.array[frame_index].state
1289                 = UNSOLICITED_FRAME_IN_USE;
1290
1291         if (SCU_GET_FRAME_ERROR(completion_entry)) {
1292                 /*
1293                  * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1294                  * /       this cause a problem? We expect the phy initialization will
1295                  * /       fail if there is an error in the frame. */
1296                 scic_sds_controller_release_frame(this_controller, frame_index);
1297                 return;
1298         }
1299
1300         if (frame_header->is_address_frame) {
1301                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1302                 phy = &this_controller->phy_table[index];
1303                 if (phy != NULL) {
1304                         result = scic_sds_phy_frame_handler(phy, frame_index);
1305                 }
1306         } else {
1307
1308                 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1309
1310                 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1311                         /*
1312                          * This is a signature fis or a frame from a direct attached SATA
1313                          * device that has not yet been created.  In either case forwared
1314                          * the frame to the PE and let it take care of the frame data. */
1315                         index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1316                         phy = &this_controller->phy_table[index];
1317                         result = scic_sds_phy_frame_handler(phy, frame_index);
1318                 } else {
1319                         if (index < this_controller->remote_node_entries)
1320                                 device = this_controller->device_table[index];
1321                         else
1322                                 device = NULL;
1323
1324                         if (device != NULL)
1325                                 result = scic_sds_remote_device_frame_handler(device, frame_index);
1326                         else
1327                                 scic_sds_controller_release_frame(this_controller, frame_index);
1328                 }
1329         }
1330
1331         if (result != SCI_SUCCESS) {
1332                 /*
1333                  * / @todo Is there any reason to report some additional error message
1334                  * /       when we get this failure notifiction? */
1335         }
1336 }
1337
1338 /**
1339  * This method processes an event completion entry.  This is called from within
1340  *    the controller completion handler.
1341  * @this_controller:
1342  * @completion_entry:
1343  *
1344  */
1345 static void scic_sds_controller_event_completion(
1346         struct scic_sds_controller *this_controller,
1347         u32 completion_entry)
1348 {
1349         u32 index;
1350         struct scic_sds_request *io_request;
1351         struct scic_sds_remote_device *device;
1352         struct scic_sds_phy *phy;
1353
1354         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1355
1356         switch (scu_get_event_type(completion_entry)) {
1357         case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1358                 /* / @todo The driver did something wrong and we need to fix the condtion. */
1359                 dev_err(scic_to_dev(this_controller),
1360                         "%s: SCIC Controller 0x%p received SMU command error "
1361                         "0x%x\n",
1362                         __func__,
1363                         this_controller,
1364                         completion_entry);
1365                 break;
1366
1367         case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1368         case SCU_EVENT_TYPE_SMU_ERROR:
1369         case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1370                 /*
1371                  * / @todo This is a hardware failure and its likely that we want to
1372                  * /       reset the controller. */
1373                 dev_err(scic_to_dev(this_controller),
1374                         "%s: SCIC Controller 0x%p received fatal controller "
1375                         "event  0x%x\n",
1376                         __func__,
1377                         this_controller,
1378                         completion_entry);
1379                 break;
1380
1381         case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1382                 io_request = this_controller->io_request_table[index];
1383                 scic_sds_io_request_event_handler(io_request, completion_entry);
1384                 break;
1385
1386         case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1387                 switch (scu_get_event_specifier(completion_entry)) {
1388                 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1389                 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1390                         io_request = this_controller->io_request_table[index];
1391                         if (io_request != NULL)
1392                                 scic_sds_io_request_event_handler(io_request, completion_entry);
1393                         else
1394                                 dev_warn(scic_to_dev(this_controller),
1395                                          "%s: SCIC Controller 0x%p received "
1396                                          "event 0x%x for io request object "
1397                                          "that doesnt exist.\n",
1398                                          __func__,
1399                                          this_controller,
1400                                          completion_entry);
1401
1402                         break;
1403
1404                 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1405                         device = this_controller->device_table[index];
1406                         if (device != NULL)
1407                                 scic_sds_remote_device_event_handler(device, completion_entry);
1408                         else
1409                                 dev_warn(scic_to_dev(this_controller),
1410                                          "%s: SCIC Controller 0x%p received "
1411                                          "event 0x%x for remote device object "
1412                                          "that doesnt exist.\n",
1413                                          __func__,
1414                                          this_controller,
1415                                          completion_entry);
1416
1417                         break;
1418                 }
1419                 break;
1420
1421         case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1422         /*
1423          * direct the broadcast change event to the phy first and then let
1424          * the phy redirect the broadcast change to the port object */
1425         case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1426         /*
1427          * direct error counter event to the phy object since that is where
1428          * we get the event notification.  This is a type 4 event. */
1429         case SCU_EVENT_TYPE_OSSP_EVENT:
1430                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1431                 phy = &this_controller->phy_table[index];
1432                 scic_sds_phy_event_handler(phy, completion_entry);
1433                 break;
1434
1435         case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1436         case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1437         case SCU_EVENT_TYPE_RNC_OPS_MISC:
1438                 if (index < this_controller->remote_node_entries) {
1439                         device = this_controller->device_table[index];
1440
1441                         if (device != NULL)
1442                                 scic_sds_remote_device_event_handler(device, completion_entry);
1443                 } else
1444                         dev_err(scic_to_dev(this_controller),
1445                                 "%s: SCIC Controller 0x%p received event 0x%x "
1446                                 "for remote device object 0x%0x that doesnt "
1447                                 "exist.\n",
1448                                 __func__,
1449                                 this_controller,
1450                                 completion_entry,
1451                                 index);
1452
1453                 break;
1454
1455         default:
1456                 dev_warn(scic_to_dev(this_controller),
1457                          "%s: SCIC Controller received unknown event code %x\n",
1458                          __func__,
1459                          completion_entry);
1460                 break;
1461         }
1462 }
1463
1464 /**
1465  * This method is a private routine for processing the completion queue entries.
1466  * @this_controller:
1467  *
1468  */
1469 static void scic_sds_controller_process_completions(
1470         struct scic_sds_controller *this_controller)
1471 {
1472         u32 completion_count = 0;
1473         u32 completion_entry;
1474         u32 get_index;
1475         u32 get_cycle;
1476         u32 event_index;
1477         u32 event_cycle;
1478
1479         dev_dbg(scic_to_dev(this_controller),
1480                 "%s: completion queue begining get:0x%08x\n",
1481                 __func__,
1482                 this_controller->completion_queue_get);
1483
1484         /* Get the component parts of the completion queue */
1485         get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1486         get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1487
1488         event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1489         event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1490
1491         while (
1492                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1493                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1494                 ) {
1495                 completion_count++;
1496
1497                 completion_entry = this_controller->completion_queue[get_index];
1498                 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1499
1500                 dev_dbg(scic_to_dev(this_controller),
1501                         "%s: completion queue entry:0x%08x\n",
1502                         __func__,
1503                         completion_entry);
1504
1505                 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1506                 case SCU_COMPLETION_TYPE_TASK:
1507                         scic_sds_controller_task_completion(this_controller, completion_entry);
1508                         break;
1509
1510                 case SCU_COMPLETION_TYPE_SDMA:
1511                         scic_sds_controller_sdma_completion(this_controller, completion_entry);
1512                         break;
1513
1514                 case SCU_COMPLETION_TYPE_UFI:
1515                         scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1516                         break;
1517
1518                 case SCU_COMPLETION_TYPE_EVENT:
1519                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1520                         scic_sds_controller_event_completion(this_controller, completion_entry);
1521                         break;
1522
1523                 case SCU_COMPLETION_TYPE_NOTIFY:
1524                         /*
1525                          * Presently we do the same thing with a notify event that we do with the
1526                          * other event codes. */
1527                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1528                         scic_sds_controller_event_completion(this_controller, completion_entry);
1529                         break;
1530
1531                 default:
1532                         dev_warn(scic_to_dev(this_controller),
1533                                  "%s: SCIC Controller received unknown "
1534                                  "completion type %x\n",
1535                                  __func__,
1536                                  completion_entry);
1537                         break;
1538                 }
1539         }
1540
1541         /* Update the get register if we completed one or more entries */
1542         if (completion_count > 0) {
1543                 this_controller->completion_queue_get =
1544                         SMU_CQGR_GEN_BIT(ENABLE)
1545                         | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1546                         | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1547                         | get_cycle   | SMU_CQGR_GEN_VAL(POINTER, get_index);
1548
1549                 SMU_CQGR_WRITE(this_controller,
1550                                this_controller->completion_queue_get);
1551         }
1552
1553         dev_dbg(scic_to_dev(this_controller),
1554                 "%s: completion queue ending get:0x%08x\n",
1555                 __func__,
1556                 this_controller->completion_queue_get);
1557
1558 }
1559
1560 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1561 {
1562         if (scic_sds_controller_completion_queue_has_entries(scic)) {
1563                 return true;
1564         } else {
1565                 /*
1566                  * we have a spurious interrupt it could be that we have already
1567                  * emptied the completion queue from a previous interrupt */
1568                 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1569
1570                 /*
1571                  * There is a race in the hardware that could cause us not to be notified
1572                  * of an interrupt completion if we do not take this step.  We will mask
1573                  * then unmask the interrupts so if there is another interrupt pending
1574                  * the clearing of the interrupt source we get the next interrupt message. */
1575                 SMU_IMR_WRITE(scic, 0xFF000000);
1576                 SMU_IMR_WRITE(scic, 0x00000000);
1577         }
1578
1579         return false;
1580 }
1581
1582 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1583 {
1584         /* Empty out the completion queue */
1585         if (scic_sds_controller_completion_queue_has_entries(scic))
1586                 scic_sds_controller_process_completions(scic);
1587
1588         /* Clear the interrupt and enable all interrupts again */
1589         SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1590         /* Could we write the value of SMU_ISR_COMPLETION? */
1591         SMU_IMR_WRITE(scic, 0xFF000000);
1592         SMU_IMR_WRITE(scic, 0x00000000);
1593 }
1594
1595 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1596 {
1597         u32 interrupt_status;
1598
1599         interrupt_status = SMU_ISR_READ(scic);
1600
1601         interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1602
1603         if (interrupt_status != 0) {
1604                 /*
1605                  * There is an error interrupt pending so let it through and handle
1606                  * in the callback */
1607                 return true;
1608         }
1609
1610         /*
1611          * There is a race in the hardware that could cause us not to be notified
1612          * of an interrupt completion if we do not take this step.  We will mask
1613          * then unmask the error interrupts so if there was another interrupt
1614          * pending we will be notified.
1615          * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1616         SMU_IMR_WRITE(scic, 0x000000FF);
1617         SMU_IMR_WRITE(scic, 0x00000000);
1618
1619         return false;
1620 }
1621
1622 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1623 {
1624         u32 interrupt_status;
1625
1626         interrupt_status = SMU_ISR_READ(scic);
1627
1628         if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1629             scic_sds_controller_completion_queue_has_entries(scic)) {
1630
1631                 scic_sds_controller_process_completions(scic);
1632                 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1633
1634         } else {
1635                 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1636                         interrupt_status);
1637
1638                 sci_base_state_machine_change_state(
1639                         scic_sds_controller_get_base_state_machine(scic),
1640                         SCI_BASE_CONTROLLER_STATE_FAILED);
1641
1642                 return;
1643         }
1644
1645         /*
1646          * If we dont process any completions I am not sure that we want to do this.
1647          * We are in the middle of a hardware fault and should probably be reset. */
1648         SMU_IMR_WRITE(scic, 0x00000000);
1649 }
1650
1651
1652 u32 scic_sds_controller_get_object_size(void)
1653 {
1654         return sizeof(struct scic_sds_controller);
1655 }
1656
1657
1658 void scic_sds_controller_link_up(
1659         struct scic_sds_controller *scic,
1660         struct scic_sds_port *sci_port,
1661         struct scic_sds_phy *sci_phy)
1662 {
1663         scic_sds_controller_phy_handler_t link_up;
1664         u32 state;
1665
1666         state = scic->parent.state_machine.current_state_id;
1667         link_up = scic_sds_controller_state_handler_table[state].link_up;
1668
1669         if (link_up)
1670                 link_up(scic, sci_port, sci_phy);
1671         else
1672                 dev_dbg(scic_to_dev(scic),
1673                         "%s: SCIC Controller linkup event from phy %d in "
1674                         "unexpected state %d\n",
1675                         __func__,
1676                         sci_phy->phy_index,
1677                         sci_base_state_machine_get_state(
1678                                 scic_sds_controller_get_base_state_machine(
1679                                         scic)));
1680 }
1681
1682
1683 void scic_sds_controller_link_down(
1684         struct scic_sds_controller *scic,
1685         struct scic_sds_port *sci_port,
1686         struct scic_sds_phy *sci_phy)
1687 {
1688         u32 state;
1689         scic_sds_controller_phy_handler_t link_down;
1690
1691         state = scic->parent.state_machine.current_state_id;
1692         link_down = scic_sds_controller_state_handler_table[state].link_down;
1693
1694         if (link_down)
1695                 link_down(scic, sci_port, sci_phy);
1696         else
1697                 dev_dbg(scic_to_dev(scic),
1698                         "%s: SCIC Controller linkdown event from phy %d in "
1699                         "unexpected state %d\n",
1700                         __func__,
1701                         sci_phy->phy_index, state);
1702 }
1703
1704 /**
1705  * This method is called by the remote device to inform the controller
1706  * that this remote device has started.
1707  *
1708  */
1709
1710 void scic_sds_controller_remote_device_started(struct scic_sds_controller *scic,
1711                                                struct scic_sds_remote_device *sci_dev)
1712 {
1713         u32 state;
1714         scic_sds_controller_device_handler_t started;
1715
1716         state = scic->parent.state_machine.current_state_id;
1717         started = scic_sds_controller_state_handler_table[state].remote_device_started_handler;
1718
1719         if (started)
1720                 started(scic, sci_dev);
1721         else {
1722                 dev_dbg(scic_to_dev(scic),
1723                          "%s: SCIC Controller 0x%p remote device started event "
1724                          "from device 0x%p in unexpected state  %d\n",
1725                          __func__, scic, sci_dev, state);
1726         }
1727 }
1728
1729 /**
1730  * This is a helper method to determine if any remote devices on this
1731  * controller are still in the stopping state.
1732  *
1733  */
1734 bool scic_sds_controller_has_remote_devices_stopping(
1735         struct scic_sds_controller *this_controller)
1736 {
1737         u32 index;
1738
1739         for (index = 0; index < this_controller->remote_node_entries; index++) {
1740                 if ((this_controller->device_table[index] != NULL) &&
1741                    (this_controller->device_table[index]->parent.state_machine.current_state_id
1742                     == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
1743                         return true;
1744         }
1745
1746         return false;
1747 }
1748
1749 /**
1750  * This method is called by the remote device to inform the controller
1751  * object that the remote device has stopped.
1752  *
1753  */
1754
1755 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
1756                                                struct scic_sds_remote_device *sci_dev)
1757 {
1758
1759         u32 state;
1760         scic_sds_controller_device_handler_t stopped;
1761
1762         state = scic->parent.state_machine.current_state_id;
1763         stopped = scic_sds_controller_state_handler_table[state].remote_device_stopped_handler;
1764
1765         if (stopped)
1766                 stopped(scic, sci_dev);
1767         else {
1768                 dev_dbg(scic_to_dev(scic),
1769                         "%s: SCIC Controller 0x%p remote device stopped event "
1770                         "from device 0x%p in unexpected state  %d\n",
1771                         __func__, scic, sci_dev, state);
1772         }
1773 }
1774
1775
1776
1777 /**
1778  * This method will write to the SCU PCP register the request value. The method
1779  *    is used to suspend/resume ports, devices, and phys.
1780  * @this_controller:
1781  *
1782  *
1783  */
1784 void scic_sds_controller_post_request(
1785         struct scic_sds_controller *this_controller,
1786         u32 request)
1787 {
1788         dev_dbg(scic_to_dev(this_controller),
1789                 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1790                 __func__,
1791                 this_controller,
1792                 request);
1793
1794         SMU_PCP_WRITE(this_controller, request);
1795 }
1796
1797 /**
1798  * This method will copy the soft copy of the task context into the physical
1799  *    memory accessible by the controller.
1800  * @this_controller: This parameter specifies the controller for which to copy
1801  *    the task context.
1802  * @this_request: This parameter specifies the request for which the task
1803  *    context is being copied.
1804  *
1805  * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1806  * the physical memory version of the task context. Thus, all subsequent
1807  * updates to the task context are performed in the TC table (i.e. DMAable
1808  * memory). none
1809  */
1810 void scic_sds_controller_copy_task_context(
1811         struct scic_sds_controller *this_controller,
1812         struct scic_sds_request *this_request)
1813 {
1814         struct scu_task_context *task_context_buffer;
1815
1816         task_context_buffer = scic_sds_controller_get_task_context_buffer(
1817                 this_controller, this_request->io_tag
1818                 );
1819
1820         memcpy(
1821                 task_context_buffer,
1822                 this_request->task_context_buffer,
1823                 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1824                 );
1825
1826         /*
1827          * Now that the soft copy of the TC has been copied into the TC
1828          * table accessible by the silicon.  Thus, any further changes to
1829          * the TC (e.g. TC termination) occur in the appropriate location. */
1830         this_request->task_context_buffer = task_context_buffer;
1831 }
1832
1833 /**
1834  * This method returns the task context buffer for the given io tag.
1835  * @this_controller:
1836  * @io_tag:
1837  *
1838  * struct scu_task_context*
1839  */
1840 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1841         struct scic_sds_controller *this_controller,
1842         u16 io_tag
1843         ) {
1844         u16 task_index = scic_sds_io_tag_get_index(io_tag);
1845
1846         if (task_index < this_controller->task_context_entries) {
1847                 return &this_controller->task_context_table[task_index];
1848         }
1849
1850         return NULL;
1851 }
1852
1853 /**
1854  * This method returnst the sequence value from the io tag value
1855  * @this_controller:
1856  * @io_tag:
1857  *
1858  * u16
1859  */
1860
1861 /**
1862  * This method returns the IO request associated with the tag value
1863  * @this_controller:
1864  * @io_tag:
1865  *
1866  * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1867  */
1868 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1869         struct scic_sds_controller *this_controller,
1870         u16 io_tag
1871         ) {
1872         u16 task_index;
1873         u16 task_sequence;
1874
1875         task_index = scic_sds_io_tag_get_index(io_tag);
1876
1877         if (task_index  < this_controller->task_context_entries) {
1878                 if (this_controller->io_request_table[task_index] != NULL) {
1879                         task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1880
1881                         if (task_sequence == this_controller->io_request_sequence[task_index]) {
1882                                 return this_controller->io_request_table[task_index];
1883                         }
1884                 }
1885         }
1886
1887         return NULL;
1888 }
1889
1890 /**
1891  * This method allocates remote node index and the reserves the remote node
1892  *    context space for use. This method can fail if there are no more remote
1893  *    node index available.
1894  * @this_controller: This is the controller object which contains the set of
1895  *    free remote node ids
1896  * @the_devce: This is the device object which is requesting the a remote node
1897  *    id
1898  * @node_id: This is the remote node id that is assinged to the device if one
1899  *    is available
1900  *
1901  * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1902  * node index available.
1903  */
1904 enum sci_status scic_sds_controller_allocate_remote_node_context(
1905         struct scic_sds_controller *this_controller,
1906         struct scic_sds_remote_device *the_device,
1907         u16 *node_id)
1908 {
1909         u16 node_index;
1910         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1911
1912         node_index = scic_sds_remote_node_table_allocate_remote_node(
1913                 &this_controller->available_remote_nodes, remote_node_count
1914                 );
1915
1916         if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1917                 this_controller->device_table[node_index] = the_device;
1918
1919                 *node_id = node_index;
1920
1921                 return SCI_SUCCESS;
1922         }
1923
1924         return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1925 }
1926
1927 /**
1928  * This method frees the remote node index back to the available pool.  Once
1929  *    this is done the remote node context buffer is no longer valid and can
1930  *    not be used.
1931  * @this_controller:
1932  * @the_device:
1933  * @node_id:
1934  *
1935  */
1936 void scic_sds_controller_free_remote_node_context(
1937         struct scic_sds_controller *this_controller,
1938         struct scic_sds_remote_device *the_device,
1939         u16 node_id)
1940 {
1941         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1942
1943         if (this_controller->device_table[node_id] == the_device) {
1944                 this_controller->device_table[node_id] = NULL;
1945
1946                 scic_sds_remote_node_table_release_remote_node_index(
1947                         &this_controller->available_remote_nodes, remote_node_count, node_id
1948                         );
1949         }
1950 }
1951
1952 /**
1953  * This method returns the union scu_remote_node_context for the specified remote
1954  *    node id.
1955  * @this_controller:
1956  * @node_id:
1957  *
1958  * union scu_remote_node_context*
1959  */
1960 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1961         struct scic_sds_controller *this_controller,
1962         u16 node_id
1963         ) {
1964         if (
1965                 (node_id < this_controller->remote_node_entries)
1966                 && (this_controller->device_table[node_id] != NULL)
1967                 ) {
1968                 return &this_controller->remote_node_context_table[node_id];
1969         }
1970
1971         return NULL;
1972 }
1973
1974 /**
1975  *
1976  * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1977  *    constructed.
1978  * @frame_header: This is the frame header returned by the hardware.
1979  * @frame_buffer: This is the frame buffer returned by the hardware.
1980  *
1981  * This method will combind the frame header and frame buffer to create a SATA
1982  * D2H register FIS none
1983  */
1984 void scic_sds_controller_copy_sata_response(
1985         void *response_buffer,
1986         void *frame_header,
1987         void *frame_buffer)
1988 {
1989         memcpy(
1990                 response_buffer,
1991                 frame_header,
1992                 sizeof(u32)
1993                 );
1994
1995         memcpy(
1996                 (char *)((char *)response_buffer + sizeof(u32)),
1997                 frame_buffer,
1998                 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
1999                 );
2000 }
2001
2002 /**
2003  * This method releases the frame once this is done the frame is available for
2004  *    re-use by the hardware.  The data contained in the frame header and frame
2005  *    buffer is no longer valid. The UF queue get pointer is only updated if UF
2006  *    control indicates this is appropriate.
2007  * @this_controller:
2008  * @frame_index:
2009  *
2010  */
2011 void scic_sds_controller_release_frame(
2012         struct scic_sds_controller *this_controller,
2013         u32 frame_index)
2014 {
2015         if (scic_sds_unsolicited_frame_control_release_frame(
2016                     &this_controller->uf_control, frame_index) == true)
2017                 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
2018 }
2019
2020 /**
2021  * This method sets user parameters and OEM parameters to default values.
2022  *    Users can override these values utilizing the scic_user_parameters_set()
2023  *    and scic_oem_parameters_set() methods.
2024  * @scic: This parameter specifies the controller for which to set the
2025  *    configuration parameters to their default values.
2026  *
2027  */
2028 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
2029 {
2030         u16 index;
2031
2032         /* Default to APC mode. */
2033         scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
2034
2035         /* Default to APC mode. */
2036         scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1;
2037
2038         /* Default to no SSC operation. */
2039         scic->oem_parameters.sds1.controller.do_enable_ssc = false;
2040
2041         /* Initialize all of the port parameter information to narrow ports. */
2042         for (index = 0; index < SCI_MAX_PORTS; index++) {
2043                 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
2044         }
2045
2046         /* Initialize all of the phy parameter information. */
2047         for (index = 0; index < SCI_MAX_PHYS; index++) {
2048                 /* Default to 6G (i.e. Gen 3) for now. */
2049                 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
2050
2051                 /* the frequencies cannot be 0 */
2052                 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
2053                 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
2054                 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
2055
2056                 /*
2057                  * Previous Vitesse based expanders had a arbitration issue that
2058                  * is worked around by having the upper 32-bits of SAS address
2059                  * with a value greater then the Vitesse company identifier.
2060                  * Hence, usage of 0x5FCFFFFF. */
2061                 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
2062                 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
2063         }
2064
2065         scic->user_parameters.sds1.stp_inactivity_timeout = 5;
2066         scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
2067         scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
2068         scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
2069         scic->user_parameters.sds1.no_outbound_task_timeout = 20;
2070 }
2071
2072
2073 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
2074                                           void __iomem *scu_base,
2075                                           void __iomem *smu_base)
2076 {
2077         u8 index;
2078
2079         sci_base_controller_construct(
2080                 &controller->parent,
2081                 scic_sds_controller_state_table,
2082                 controller->memory_descriptors,
2083                 ARRAY_SIZE(controller->memory_descriptors),
2084                 NULL
2085                 );
2086
2087         controller->scu_registers = scu_base;
2088         controller->smu_registers = smu_base;
2089
2090         scic_sds_port_configuration_agent_construct(&controller->port_agent);
2091
2092         /* Construct the ports for this controller */
2093         for (index = 0; index < SCI_MAX_PORTS; index++)
2094                 scic_sds_port_construct(&controller->port_table[index],
2095                                         index, controller);
2096         scic_sds_port_construct(&controller->port_table[index],
2097                                 SCIC_SDS_DUMMY_PORT, controller);
2098
2099         /* Construct the phys for this controller */
2100         for (index = 0; index < SCI_MAX_PHYS; index++) {
2101                 /* Add all the PHYs to the dummy port */
2102                 scic_sds_phy_construct(
2103                         &controller->phy_table[index],
2104                         &controller->port_table[SCI_MAX_PORTS],
2105                         index
2106                         );
2107         }
2108
2109         controller->invalid_phy_mask = 0;
2110
2111         /* Set the default maximum values */
2112         controller->completion_event_entries      = SCU_EVENT_COUNT;
2113         controller->completion_queue_entries      = SCU_COMPLETION_QUEUE_COUNT;
2114         controller->remote_node_entries           = SCI_MAX_REMOTE_DEVICES;
2115         controller->logical_port_entries          = SCI_MAX_PORTS;
2116         controller->task_context_entries          = SCU_IO_REQUEST_COUNT;
2117         controller->uf_control.buffers.count      = SCU_UNSOLICITED_FRAME_COUNT;
2118         controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2119
2120         /* Initialize the User and OEM parameters to default values. */
2121         scic_sds_controller_set_default_config_parameters(controller);
2122
2123         return scic_controller_reset(controller);
2124 }
2125
2126 /* --------------------------------------------------------------------------- */
2127
2128 enum sci_status scic_controller_initialize(
2129         struct scic_sds_controller *scic)
2130 {
2131         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2132         sci_base_controller_handler_t initialize;
2133         u32 state;
2134
2135         state = scic->parent.state_machine.current_state_id;
2136         initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2137
2138         if (initialize)
2139                 status = initialize(&scic->parent);
2140         else
2141                 dev_warn(scic_to_dev(scic),
2142                          "%s: SCIC Controller initialize operation requested "
2143                          "in invalid state %d\n",
2144                          __func__,
2145                          sci_base_state_machine_get_state(
2146                                  scic_sds_controller_get_base_state_machine(
2147                                          scic)));
2148
2149         return status;
2150 }
2151
2152 /* --------------------------------------------------------------------------- */
2153
2154 u32 scic_controller_get_suggested_start_timeout(
2155         struct scic_sds_controller *sc)
2156 {
2157         /* Validate the user supplied parameters. */
2158         if (sc == NULL)
2159                 return 0;
2160
2161         /*
2162          * The suggested minimum timeout value for a controller start operation:
2163          *
2164          *     Signature FIS Timeout
2165          *   + Phy Start Timeout
2166          *   + Number of Phy Spin Up Intervals
2167          *   ---------------------------------
2168          *   Number of milliseconds for the controller start operation.
2169          *
2170          * NOTE: The number of phy spin up intervals will be equivalent
2171          *       to the number of phys divided by the number phys allowed
2172          *       per interval - 1 (once OEM parameters are supported).
2173          *       Currently we assume only 1 phy per interval. */
2174
2175         return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2176                 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2177                 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2178 }
2179
2180 /* --------------------------------------------------------------------------- */
2181
2182 enum sci_status scic_controller_start(
2183         struct scic_sds_controller *scic,
2184         u32 timeout)
2185 {
2186         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2187         sci_base_controller_timed_handler_t start;
2188         u32 state;
2189
2190         state = scic->parent.state_machine.current_state_id;
2191         start = scic_sds_controller_state_handler_table[state].base.start;
2192
2193         if (start)
2194                 status = start(&scic->parent, timeout);
2195         else
2196                 dev_warn(scic_to_dev(scic),
2197                          "%s: SCIC Controller start operation requested in "
2198                          "invalid state %d\n",
2199                          __func__,
2200                          sci_base_state_machine_get_state(
2201                                  scic_sds_controller_get_base_state_machine(
2202                                          scic)));
2203
2204         return status;
2205 }
2206
2207 /* --------------------------------------------------------------------------- */
2208
2209 enum sci_status scic_controller_stop(
2210         struct scic_sds_controller *scic,
2211         u32 timeout)
2212 {
2213         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2214         sci_base_controller_timed_handler_t stop;
2215         u32 state;
2216
2217         state = scic->parent.state_machine.current_state_id;
2218         stop = scic_sds_controller_state_handler_table[state].base.stop;
2219
2220         if (stop)
2221                 status = stop(&scic->parent, timeout);
2222         else
2223                 dev_warn(scic_to_dev(scic),
2224                          "%s: SCIC Controller stop operation requested in "
2225                          "invalid state %d\n",
2226                          __func__,
2227                          sci_base_state_machine_get_state(
2228                                  scic_sds_controller_get_base_state_machine(
2229                                          scic)));
2230
2231         return status;
2232 }
2233
2234 /* --------------------------------------------------------------------------- */
2235
2236 enum sci_status scic_controller_reset(
2237         struct scic_sds_controller *scic)
2238 {
2239         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2240         sci_base_controller_handler_t reset;
2241         u32 state;
2242
2243         state = scic->parent.state_machine.current_state_id;
2244         reset = scic_sds_controller_state_handler_table[state].base.reset;
2245
2246         if (reset)
2247                 status = reset(&scic->parent);
2248         else
2249                 dev_warn(scic_to_dev(scic),
2250                          "%s: SCIC Controller reset operation requested in "
2251                          "invalid state %d\n",
2252                          __func__,
2253                          sci_base_state_machine_get_state(
2254                                  scic_sds_controller_get_base_state_machine(
2255                                          scic)));
2256
2257         return status;
2258 }
2259
2260 enum sci_io_status scic_controller_start_io(
2261         struct scic_sds_controller *scic,
2262         struct scic_sds_remote_device *remote_device,
2263         struct scic_sds_request *io_request,
2264         u16 io_tag)
2265 {
2266         u32 state;
2267         sci_base_controller_start_request_handler_t start_io;
2268
2269         state = scic->parent.state_machine.current_state_id;
2270         start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2271
2272         return start_io(&scic->parent,
2273                         (struct sci_base_remote_device *) remote_device,
2274                         (struct sci_base_request *)io_request, io_tag);
2275 }
2276
2277 /* --------------------------------------------------------------------------- */
2278
2279 enum sci_status scic_controller_terminate_request(
2280         struct scic_sds_controller *scic,
2281         struct scic_sds_remote_device *remote_device,
2282         struct scic_sds_request *request)
2283 {
2284         sci_base_controller_request_handler_t terminate_request;
2285         u32 state;
2286
2287         state = scic->parent.state_machine.current_state_id;
2288         terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2289
2290         return terminate_request(&scic->parent,
2291                                  (struct sci_base_remote_device *)remote_device,
2292                                  (struct sci_base_request *)request);
2293 }
2294
2295 /* --------------------------------------------------------------------------- */
2296
2297 enum sci_status scic_controller_complete_io(
2298         struct scic_sds_controller *scic,
2299         struct scic_sds_remote_device *remote_device,
2300         struct scic_sds_request *io_request)
2301 {
2302         u32 state;
2303         sci_base_controller_request_handler_t complete_io;
2304
2305         state = scic->parent.state_machine.current_state_id;
2306         complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2307
2308         return complete_io(&scic->parent,
2309                            (struct sci_base_remote_device *)remote_device,
2310                            (struct sci_base_request *)io_request);
2311 }
2312
2313 /* --------------------------------------------------------------------------- */
2314
2315
2316 enum sci_task_status scic_controller_start_task(
2317         struct scic_sds_controller *scic,
2318         struct scic_sds_remote_device *remote_device,
2319         struct scic_sds_request *task_request,
2320         u16 task_tag)
2321 {
2322         u32 state;
2323         sci_base_controller_start_request_handler_t start_task;
2324         enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2325
2326         state = scic->parent.state_machine.current_state_id;
2327         start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2328
2329         if (start_task)
2330                 status = start_task(&scic->parent,
2331                                     (struct sci_base_remote_device *)remote_device,
2332                                     (struct sci_base_request *)task_request,
2333                                     task_tag);
2334         else
2335                 dev_warn(scic_to_dev(scic),
2336                          "%s: SCIC Controller starting task from invalid "
2337                          "state\n",
2338                          __func__);
2339
2340         return status;
2341 }
2342
2343 /* --------------------------------------------------------------------------- */
2344
2345 enum sci_status scic_controller_complete_task(
2346         struct scic_sds_controller *scic,
2347         struct scic_sds_remote_device *remote_device,
2348         struct scic_sds_request *task_request)
2349 {
2350         u32 state;
2351         sci_base_controller_request_handler_t complete_task;
2352         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2353
2354         state = scic->parent.state_machine.current_state_id;
2355         complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2356
2357         if (complete_task)
2358                 status = complete_task(&scic->parent,
2359                                        (struct sci_base_remote_device *)remote_device,
2360                                        (struct sci_base_request *)task_request);
2361         else
2362                 dev_warn(scic_to_dev(scic),
2363                          "%s: SCIC Controller completing task from invalid "
2364                          "state\n",
2365                          __func__);
2366
2367         return status;
2368 }
2369
2370
2371 /* --------------------------------------------------------------------------- */
2372
2373 enum sci_status scic_controller_get_port_handle(
2374         struct scic_sds_controller *scic,
2375         u8 port_index,
2376         struct scic_sds_port **port_handle)
2377 {
2378         if (port_index < scic->logical_port_entries) {
2379                 *port_handle = &scic->port_table[port_index];
2380
2381                 return SCI_SUCCESS;
2382         }
2383
2384         return SCI_FAILURE_INVALID_PORT;
2385 }
2386
2387 /* --------------------------------------------------------------------------- */
2388
2389 enum sci_status scic_controller_get_phy_handle(
2390         struct scic_sds_controller *scic,
2391         u8 phy_index,
2392         struct scic_sds_phy **phy_handle)
2393 {
2394         if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2395                 *phy_handle = &scic->phy_table[phy_index];
2396
2397                 return SCI_SUCCESS;
2398         }
2399
2400         dev_err(scic_to_dev(scic),
2401                 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2402                 __func__, scic, phy_index);
2403
2404         return SCI_FAILURE_INVALID_PHY;
2405 }
2406
2407 /* --------------------------------------------------------------------------- */
2408
2409 u16 scic_controller_allocate_io_tag(
2410         struct scic_sds_controller *scic)
2411 {
2412         u16 task_context;
2413         u16 sequence_count;
2414
2415         if (!sci_pool_empty(scic->tci_pool)) {
2416                 sci_pool_get(scic->tci_pool, task_context);
2417
2418                 sequence_count = scic->io_request_sequence[task_context];
2419
2420                 return scic_sds_io_tag_construct(sequence_count, task_context);
2421         }
2422
2423         return SCI_CONTROLLER_INVALID_IO_TAG;
2424 }
2425
2426 /* --------------------------------------------------------------------------- */
2427
2428 enum sci_status scic_controller_free_io_tag(
2429         struct scic_sds_controller *scic,
2430         u16 io_tag)
2431 {
2432         u16 sequence;
2433         u16 index;
2434
2435         BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2436
2437         sequence = scic_sds_io_tag_get_sequence(io_tag);
2438         index    = scic_sds_io_tag_get_index(io_tag);
2439
2440         if (!sci_pool_full(scic->tci_pool)) {
2441                 if (sequence == scic->io_request_sequence[index]) {
2442                         scic_sds_io_sequence_increment(
2443                                 scic->io_request_sequence[index]);
2444
2445                         sci_pool_put(scic->tci_pool, index);
2446
2447                         return SCI_SUCCESS;
2448                 }
2449         }
2450
2451         return SCI_FAILURE_INVALID_IO_TAG;
2452 }
2453
2454 /* --------------------------------------------------------------------------- */
2455
2456 void scic_controller_enable_interrupts(
2457         struct scic_sds_controller *scic)
2458 {
2459         BUG_ON(scic->smu_registers == NULL);
2460         SMU_IMR_WRITE(scic, 0x00000000);
2461 }
2462
2463 /* --------------------------------------------------------------------------- */
2464
2465 void scic_controller_disable_interrupts(
2466         struct scic_sds_controller *scic)
2467 {
2468         BUG_ON(scic->smu_registers == NULL);
2469         SMU_IMR_WRITE(scic, 0xffffffff);
2470 }
2471
2472 /* --------------------------------------------------------------------------- */
2473
2474 enum sci_status scic_controller_set_mode(
2475         struct scic_sds_controller *scic,
2476         enum sci_controller_mode operating_mode)
2477 {
2478         enum sci_status status          = SCI_SUCCESS;
2479
2480         if ((scic->parent.state_machine.current_state_id ==
2481                                 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2482             (scic->parent.state_machine.current_state_id ==
2483                                 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2484                 switch (operating_mode) {
2485                 case SCI_MODE_SPEED:
2486                         scic->remote_node_entries      = SCI_MAX_REMOTE_DEVICES;
2487                         scic->task_context_entries     = SCU_IO_REQUEST_COUNT;
2488                         scic->uf_control.buffers.count =
2489                                 SCU_UNSOLICITED_FRAME_COUNT;
2490                         scic->completion_event_entries = SCU_EVENT_COUNT;
2491                         scic->completion_queue_entries =
2492                                 SCU_COMPLETION_QUEUE_COUNT;
2493                         scic_sds_controller_build_memory_descriptor_table(scic);
2494                         break;
2495
2496                 case SCI_MODE_SIZE:
2497                         scic->remote_node_entries      = SCI_MIN_REMOTE_DEVICES;
2498                         scic->task_context_entries     = SCI_MIN_IO_REQUESTS;
2499                         scic->uf_control.buffers.count =
2500                                 SCU_MIN_UNSOLICITED_FRAMES;
2501                         scic->completion_event_entries = SCU_MIN_EVENTS;
2502                         scic->completion_queue_entries =
2503                                 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2504                         scic_sds_controller_build_memory_descriptor_table(scic);
2505                         break;
2506
2507                 default:
2508                         status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2509                         break;
2510                 }
2511         } else
2512                 status = SCI_FAILURE_INVALID_STATE;
2513
2514         return status;
2515 }
2516
2517 /**
2518  * scic_sds_controller_reset_hardware() -
2519  *
2520  * This method will reset the controller hardware.
2521  */
2522 void scic_sds_controller_reset_hardware(
2523         struct scic_sds_controller *scic)
2524 {
2525         /* Disable interrupts so we dont take any spurious interrupts */
2526         scic_controller_disable_interrupts(scic);
2527
2528         /* Reset the SCU */
2529         SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2530
2531         /* Delay for 1ms to before clearing the CQP and UFQPR. */
2532         udelay(1000);
2533
2534         /* The write to the CQGR clears the CQP */
2535         SMU_CQGR_WRITE(scic, 0x00000000);
2536
2537         /* The write to the UFQGP clears the UFQPR */
2538         SCU_UFQGP_WRITE(scic, 0x00000000);
2539 }
2540
2541 /* --------------------------------------------------------------------------- */
2542
2543 enum sci_status scic_user_parameters_set(
2544         struct scic_sds_controller *scic,
2545         union scic_user_parameters *scic_parms)
2546 {
2547         if (
2548                 (scic->parent.state_machine.current_state_id
2549                  == SCI_BASE_CONTROLLER_STATE_RESET)
2550                 || (scic->parent.state_machine.current_state_id
2551                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2552                 || (scic->parent.state_machine.current_state_id
2553                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2554                 ) {
2555                 u16 index;
2556
2557                 /*
2558                  * Validate the user parameters.  If they are not legal, then
2559                  * return a failure. */
2560                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2561                         if (!(scic_parms->sds1.phys[index].max_speed_generation
2562                              <= SCIC_SDS_PARM_MAX_SPEED
2563                              && scic_parms->sds1.phys[index].max_speed_generation
2564                              > SCIC_SDS_PARM_NO_SPEED))
2565                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2566
2567                         if (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3)
2568                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2569                         if (
2570                             (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3) ||
2571                             (scic_parms->sds1.phys[index].align_insertion_frequency == 0) ||
2572                             (scic_parms->sds1.phys[index].notify_enable_spin_up_insertion_frequency == 0)
2573                             )
2574                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2575                 }
2576
2577                 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2578                    (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2579                    (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2580                    (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2581                    (scic_parms->sds1.no_outbound_task_timeout == 0))
2582                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2583
2584                 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2585
2586                 return SCI_SUCCESS;
2587         }
2588
2589         return SCI_FAILURE_INVALID_STATE;
2590 }
2591
2592 /* --------------------------------------------------------------------------- */
2593
2594 void scic_user_parameters_get(
2595         struct scic_sds_controller *scic,
2596         union scic_user_parameters *scic_parms)
2597 {
2598         memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2599 }
2600
2601 /* --------------------------------------------------------------------------- */
2602
2603 enum sci_status scic_oem_parameters_set(
2604         struct scic_sds_controller *scic,
2605         union scic_oem_parameters *scic_parms)
2606 {
2607         if (
2608                 (scic->parent.state_machine.current_state_id
2609                  == SCI_BASE_CONTROLLER_STATE_RESET)
2610                 || (scic->parent.state_machine.current_state_id
2611                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2612                 || (scic->parent.state_machine.current_state_id
2613                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2614                 ) {
2615                 u16 index;
2616                 u8  combined_phy_mask = 0;
2617
2618                 /*
2619                  * Validate the oem parameters.  If they are not legal, then
2620                  * return a failure. */
2621                 for (index = 0; index < SCI_MAX_PORTS; index++) {
2622                         if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2623                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2624                         }
2625                 }
2626
2627                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2628                         if (
2629                                 scic_parms->sds1.phys[index].sas_address.high == 0
2630                                 && scic_parms->sds1.phys[index].sas_address.low  == 0
2631                                 ) {
2632                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2633                         }
2634                 }
2635
2636                 if (scic_parms->sds1.controller.mode_type == SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
2637                         for (index = 0; index < SCI_MAX_PHYS; index++) {
2638                                 if (scic_parms->sds1.ports[index].phy_mask != 0)
2639                                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2640                         }
2641                 } else if (scic_parms->sds1.controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
2642                         for (index = 0; index < SCI_MAX_PHYS; index++)
2643                                 combined_phy_mask |= scic_parms->sds1.ports[index].phy_mask;
2644
2645                         if (combined_phy_mask == 0)
2646                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2647                 } else {
2648                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2649                 }
2650
2651                 if (scic_parms->sds1.controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
2652                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2653
2654                 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2655                 return SCI_SUCCESS;
2656         }
2657
2658         return SCI_FAILURE_INVALID_STATE;
2659 }
2660
2661 /* --------------------------------------------------------------------------- */
2662
2663 void scic_oem_parameters_get(
2664         struct scic_sds_controller *scic,
2665         union scic_oem_parameters *scic_parms)
2666 {
2667         memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2668 }
2669
2670 /* --------------------------------------------------------------------------- */
2671
2672
2673 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2674 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2675 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US                    2700000
2676 #define INTERRUPT_COALESCE_NUMBER_MAX                        256
2677 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN                7
2678 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX                28
2679
2680 enum sci_status scic_controller_set_interrupt_coalescence(
2681         struct scic_sds_controller *scic_controller,
2682         u32 coalesce_number,
2683         u32 coalesce_timeout)
2684 {
2685         u8 timeout_encode = 0;
2686         u32 min = 0;
2687         u32 max = 0;
2688
2689         /* Check if the input parameters fall in the range. */
2690         if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2691                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2692
2693         /*
2694          *  Defined encoding for interrupt coalescing timeout:
2695          *              Value   Min      Max     Units
2696          *              -----   ---      ---     -----
2697          *              0       -        -       Disabled
2698          *              1       13.3     20.0    ns
2699          *              2       26.7     40.0
2700          *              3       53.3     80.0
2701          *              4       106.7    160.0
2702          *              5       213.3    320.0
2703          *              6       426.7    640.0
2704          *              7       853.3    1280.0
2705          *              8       1.7      2.6     us
2706          *              9       3.4      5.1
2707          *              10      6.8      10.2
2708          *              11      13.7     20.5
2709          *              12      27.3     41.0
2710          *              13      54.6     81.9
2711          *              14      109.2    163.8
2712          *              15      218.5    327.7
2713          *              16      436.9    655.4
2714          *              17      873.8    1310.7
2715          *              18      1.7      2.6     ms
2716          *              19      3.5      5.2
2717          *              20      7.0      10.5
2718          *              21      14.0     21.0
2719          *              22      28.0     41.9
2720          *              23      55.9     83.9
2721          *              24      111.8    167.8
2722          *              25      223.7    335.5
2723          *              26      447.4    671.1
2724          *              27      894.8    1342.2
2725          *              28      1.8      2.7     s
2726          *              Others Undefined */
2727
2728         /*
2729          * Use the table above to decide the encode of interrupt coalescing timeout
2730          * value for register writing. */
2731         if (coalesce_timeout == 0)
2732                 timeout_encode = 0;
2733         else{
2734                 /* make the timeout value in unit of (10 ns). */
2735                 coalesce_timeout = coalesce_timeout * 100;
2736                 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2737                 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2738
2739                 /* get the encode of timeout for register writing. */
2740                 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2741                       timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2742                       timeout_encode++) {
2743                         if (min <= coalesce_timeout &&  max > coalesce_timeout)
2744                                 break;
2745                         else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2746                                  && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2747                                 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2748                                         break;
2749                                 else{
2750                                         timeout_encode++;
2751                                         break;
2752                                 }
2753                         } else {
2754                                 max = max * 2;
2755                                 min = min * 2;
2756                         }
2757                 }
2758
2759                 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2760                         /* the value is out of range. */
2761                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2762         }
2763
2764         SMU_ICC_WRITE(
2765                 scic_controller,
2766                 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2767                  SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2768                 );
2769
2770         scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2771         scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2772
2773         return SCI_SUCCESS;
2774 }
2775
2776
2777 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2778 {
2779         return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2780 }
2781
2782 /*
2783  * *****************************************************************************
2784  * * DEFAULT STATE HANDLERS
2785  * ***************************************************************************** */
2786
2787 /**
2788  *
2789  * @controller: This is struct sci_base_controller object which is cast into a
2790  *    struct scic_sds_controller object.
2791  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2792  *    be cast to a struct scic_sds_remote_device.
2793  * @io_request: This is the struct sci_base_request which, if it was used, would be
2794  *    cast to a SCIC_SDS_IO_REQUEST.
2795  * @io_tag: This is the IO tag to be assigned to the IO request or
2796  *    SCI_CONTROLLER_INVALID_IO_TAG.
2797  *
2798  * This method is called when the struct scic_sds_controller default start io/task
2799  * handler is in place. - Issue a warning message enum sci_status
2800  * SCI_FAILURE_INVALID_STATE
2801  */
2802 static enum sci_status scic_sds_controller_default_start_operation_handler(
2803         struct sci_base_controller *controller,
2804         struct sci_base_remote_device *remote_device,
2805         struct sci_base_request *io_request,
2806         u16 io_tag)
2807 {
2808         struct scic_sds_controller *this_controller;
2809
2810         this_controller = (struct scic_sds_controller *)controller;
2811
2812         dev_warn(scic_to_dev(this_controller),
2813                  "%s: SCIC Controller requested to start an io/task from "
2814                  "invalid state %d\n",
2815                  __func__,
2816                  sci_base_state_machine_get_state(
2817                          scic_sds_controller_get_base_state_machine(
2818                                  this_controller)));
2819
2820         return SCI_FAILURE_INVALID_STATE;
2821 }
2822
2823 /**
2824  *
2825  * @controller: This is struct sci_base_controller object which is cast into a
2826  *    struct scic_sds_controller object.
2827  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2828  *    be cast to a struct scic_sds_remote_device.
2829  * @io_request: This is the struct sci_base_request which, if it was used, would be
2830  *    cast to a SCIC_SDS_IO_REQUEST.
2831  *
2832  * This method is called when the struct scic_sds_controller default request handler
2833  * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
2834  */
2835 static enum sci_status scic_sds_controller_default_request_handler(
2836         struct sci_base_controller *controller,
2837         struct sci_base_remote_device *remote_device,
2838         struct sci_base_request *io_request)
2839 {
2840         struct scic_sds_controller *this_controller;
2841
2842         this_controller = (struct scic_sds_controller *)controller;
2843
2844         dev_warn(scic_to_dev(this_controller),
2845                 "%s: SCIC Controller request operation from invalid state %d\n",
2846                 __func__,
2847                 sci_base_state_machine_get_state(
2848                         scic_sds_controller_get_base_state_machine(
2849                                 this_controller)));
2850
2851         return SCI_FAILURE_INVALID_STATE;
2852 }
2853
2854 /*
2855  * *****************************************************************************
2856  * * GENERAL (COMMON) STATE HANDLERS
2857  * ***************************************************************************** */
2858
2859 /**
2860  *
2861  * @controller: The struct sci_base_controller object which is cast into a
2862  *    struct scic_sds_controller object.
2863  *
2864  * This method is called when the struct scic_sds_controller is in the ready state
2865  * reset handler is in place. - Transition to
2866  * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
2867  */
2868 static enum sci_status scic_sds_controller_general_reset_handler(
2869         struct sci_base_controller *controller)
2870 {
2871         struct scic_sds_controller *this_controller;
2872
2873         this_controller = (struct scic_sds_controller *)controller;
2874
2875         /*
2876          * The reset operation is not a graceful cleanup just perform the state
2877          * transition. */
2878         sci_base_state_machine_change_state(
2879                 scic_sds_controller_get_base_state_machine(this_controller),
2880                 SCI_BASE_CONTROLLER_STATE_RESETTING
2881                 );
2882
2883         return SCI_SUCCESS;
2884 }
2885
2886 /*
2887  * *****************************************************************************
2888  * * RESET STATE HANDLERS
2889  * ***************************************************************************** */
2890
2891 /**
2892  *
2893  * @controller: This is the struct sci_base_controller object which is cast into a
2894  *    struct scic_sds_controller object.
2895  *
2896  * This method is the struct scic_sds_controller initialize handler for the reset
2897  * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
2898  * function is not yet implemented and is a valid request from the reset state.
2899  */
2900 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
2901         struct sci_base_controller *controller)
2902 {
2903         u32 index;
2904         enum sci_status result = SCI_SUCCESS;
2905         struct scic_sds_controller *this_controller;
2906
2907         this_controller = (struct scic_sds_controller *)controller;
2908
2909         sci_base_state_machine_change_state(
2910                 scic_sds_controller_get_base_state_machine(this_controller),
2911                 SCI_BASE_CONTROLLER_STATE_INITIALIZING
2912                 );
2913
2914         this_controller->timeout_timer = isci_event_timer_create(
2915                 this_controller,
2916                 (void (*)(void *))scic_sds_controller_timeout_handler,
2917                 (void (*)(void *))controller);
2918
2919         scic_sds_controller_initialize_phy_startup(this_controller);
2920
2921         scic_sds_controller_initialize_power_control(this_controller);
2922
2923         /*
2924          * There is nothing to do here for B0 since we do not have to
2925          * program the AFE registers.
2926          * / @todo The AFE settings are supposed to be correct for the B0 but
2927          * /       presently they seem to be wrong. */
2928         scic_sds_controller_afe_initialization(this_controller);
2929
2930         if (SCI_SUCCESS == result) {
2931                 u32 status;
2932                 u32 terminate_loop;
2933
2934                 /* Take the hardware out of reset */
2935                 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
2936
2937                 /*
2938                  * / @todo Provide meaningfull error code for hardware failure
2939                  * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2940                 result = SCI_FAILURE;
2941                 terminate_loop = 100;
2942
2943                 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2944                         /* Loop until the hardware reports success */
2945                         udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2946                         status = SMU_SMUCSR_READ(this_controller);
2947
2948                         if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
2949                                 result = SCI_SUCCESS;
2950                         }
2951                 }
2952         }
2953
2954         if (result == SCI_SUCCESS) {
2955                 u32 max_supported_ports;
2956                 u32 max_supported_devices;
2957                 u32 max_supported_io_requests;
2958                 u32 device_context_capacity;
2959
2960                 /*
2961                  * Determine what are the actaul device capacities that the
2962                  * hardware will support */
2963                 device_context_capacity = SMU_DCC_READ(this_controller);
2964
2965                 max_supported_ports =
2966                         smu_dcc_get_max_ports(device_context_capacity);
2967                 max_supported_devices =
2968                         smu_dcc_get_max_remote_node_context(device_context_capacity);
2969                 max_supported_io_requests =
2970                         smu_dcc_get_max_task_context(device_context_capacity);
2971
2972                 /* Make all PEs that are unassigned match up with the logical ports */
2973                 for (index = 0; index < max_supported_ports; index++) {
2974                         scu_register_write(
2975                                 this_controller,
2976                                 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
2977                                 index
2978                                 );
2979                 }
2980
2981                 /* Record the smaller of the two capacity values */
2982                 this_controller->logical_port_entries =
2983                         min(max_supported_ports, this_controller->logical_port_entries);
2984
2985                 this_controller->task_context_entries =
2986                         min(max_supported_io_requests, this_controller->task_context_entries);
2987
2988                 this_controller->remote_node_entries =
2989                         min(max_supported_devices, this_controller->remote_node_entries);
2990
2991                 /*
2992                  * Now that we have the correct hardware reported minimum values
2993                  * build the MDL for the controller.  Default to a performance
2994                  * configuration. */
2995                 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
2996         }
2997
2998         /* Initialize hardware PCI Relaxed ordering in DMA engines */
2999         if (result == SCI_SUCCESS) {
3000                 u32 dma_configuration;
3001
3002                 /* Configure the payload DMA */
3003                 dma_configuration = SCU_PDMACR_READ(this_controller);
3004                 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
3005                 SCU_PDMACR_WRITE(this_controller, dma_configuration);
3006
3007                 /* Configure the control DMA */
3008                 dma_configuration = SCU_CDMACR_READ(this_controller);
3009                 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
3010                 SCU_CDMACR_WRITE(this_controller, dma_configuration);
3011         }
3012
3013         /*
3014          * Initialize the PHYs before the PORTs because the PHY registers
3015          * are accessed during the port initialization. */
3016         if (result == SCI_SUCCESS) {
3017                 /* Initialize the phys */
3018                 for (index = 0;
3019                      (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
3020                      index++) {
3021                         result = scic_sds_phy_initialize(
3022                                 &this_controller->phy_table[index],
3023                                 &this_controller->scu_registers->peg0.pe[index].tl,
3024                                 &this_controller->scu_registers->peg0.pe[index].ll
3025                                 );
3026                 }
3027         }
3028
3029         if (result == SCI_SUCCESS) {
3030                 /* Initialize the logical ports */
3031                 for (index = 0;
3032                      (index < this_controller->logical_port_entries)
3033                      && (result == SCI_SUCCESS);
3034                      index++) {
3035                         result = scic_sds_port_initialize(
3036                                 &this_controller->port_table[index],
3037                                 &this_controller->scu_registers->peg0.ptsg.port[index],
3038                                 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
3039                                 &this_controller->scu_registers->peg0.viit[index]
3040                                 );
3041                 }
3042         }
3043
3044         if (SCI_SUCCESS == result) {
3045                 result = scic_sds_port_configuration_agent_initialize(
3046                         this_controller,
3047                         &this_controller->port_agent
3048                         );
3049         }
3050
3051         /* Advance the controller state machine */
3052         if (result == SCI_SUCCESS) {
3053                 sci_base_state_machine_change_state(
3054                         scic_sds_controller_get_base_state_machine(this_controller),
3055                         SCI_BASE_CONTROLLER_STATE_INITIALIZED
3056                         );
3057         } else {
3058                 sci_base_state_machine_change_state(
3059                         scic_sds_controller_get_base_state_machine(this_controller),
3060                         SCI_BASE_CONTROLLER_STATE_FAILED
3061                         );
3062         }
3063
3064         return result;
3065 }
3066
3067 /*
3068  * *****************************************************************************
3069  * * INITIALIZED STATE HANDLERS
3070  * ***************************************************************************** */
3071
3072 /**
3073  *
3074  * @controller: This is the struct sci_base_controller object which is cast into a
3075  *    struct scic_sds_controller object.
3076  * @timeout: This is the allowed time for the controller object to reach the
3077  *    started state.
3078  *
3079  * This method is the struct scic_sds_controller start handler for the initialized
3080  * state. - Validate we have a good memory descriptor table - Initialze the
3081  * physical memory before programming the hardware - Program the SCU hardware
3082  * with the physical memory addresses passed in the memory descriptor table. -
3083  * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
3084  * completion queue - Initialize the unsolicited frame data - Take the SCU port
3085  * task scheduler out of reset - Start the first phy object. - Transition to
3086  * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
3087  * controller start operations complete
3088  * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
3089  * descriptor fields is invalid.
3090  */
3091 static enum sci_status scic_sds_controller_initialized_state_start_handler(
3092         struct sci_base_controller *controller,
3093         u32 timeout)
3094 {
3095         u16 index;
3096         enum sci_status result;
3097         struct scic_sds_controller *this_controller;
3098
3099         this_controller = (struct scic_sds_controller *)controller;
3100
3101         /* Make sure that the SCI User filled in the memory descriptor table correctly */
3102         result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3103
3104         if (result == SCI_SUCCESS) {
3105                 /* The memory descriptor list looks good so program the hardware */
3106                 scic_sds_controller_ram_initialization(this_controller);
3107         }
3108
3109         if (result == SCI_SUCCESS) {
3110                 /* Build the TCi free pool */
3111                 sci_pool_initialize(this_controller->tci_pool);
3112                 for (index = 0; index < this_controller->task_context_entries; index++) {
3113                         sci_pool_put(this_controller->tci_pool, index);
3114                 }
3115
3116                 /* Build the RNi free pool */
3117                 scic_sds_remote_node_table_initialize(
3118                         &this_controller->available_remote_nodes,
3119                         this_controller->remote_node_entries
3120                         );
3121         }
3122
3123         if (result == SCI_SUCCESS) {
3124                 /*
3125                  * Before anything else lets make sure we will not be interrupted
3126                  * by the hardware. */
3127                 scic_controller_disable_interrupts(this_controller);
3128
3129                 /* Enable the port task scheduler */
3130                 scic_sds_controller_enable_port_task_scheduler(this_controller);
3131
3132                 /* Assign all the task entries to this controller physical function */
3133                 scic_sds_controller_assign_task_entries(this_controller);
3134
3135                 /* Now initialze the completion queue */
3136                 scic_sds_controller_initialize_completion_queue(this_controller);
3137
3138                 /* Initialize the unsolicited frame queue for use */
3139                 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3140         }
3141
3142         /* Start all of the ports on this controller */
3143         for (index = 0; index < this_controller->logical_port_entries &&
3144                         result == SCI_SUCCESS; index++) {
3145                 struct scic_sds_port *sci_port = &this_controller->port_table[index];
3146
3147                 result = sci_port->state_handlers->parent.start_handler(&sci_port->parent);
3148         }
3149
3150         if (result == SCI_SUCCESS) {
3151                 scic_sds_controller_start_next_phy(this_controller);
3152
3153                 isci_event_timer_start(this_controller,
3154                                     this_controller->timeout_timer,
3155                                     timeout);
3156
3157                 sci_base_state_machine_change_state(
3158                         scic_sds_controller_get_base_state_machine(this_controller),
3159                         SCI_BASE_CONTROLLER_STATE_STARTING
3160                         );
3161         }
3162
3163         return result;
3164 }
3165
3166 /*
3167  * *****************************************************************************
3168  * * INITIALIZED STATE HANDLERS
3169  * ***************************************************************************** */
3170
3171 /**
3172  *
3173  * @controller: This is struct scic_sds_controller which receives the link up
3174  *    notification.
3175  * @port: This is struct scic_sds_port with which the phy is associated.
3176  * @phy: This is the struct scic_sds_phy which has gone link up.
3177  *
3178  * This method is called when the struct scic_sds_controller is in the starting state
3179  * link up handler is called.  This method will perform the following: - Stop
3180  * the phy timer - Start the next phy - Report the link up condition to the
3181  * port object none
3182  */
3183 static void scic_sds_controller_starting_state_link_up_handler(
3184         struct scic_sds_controller *this_controller,
3185         struct scic_sds_port *port,
3186         struct scic_sds_phy *phy)
3187 {
3188         scic_sds_controller_phy_timer_stop(this_controller);
3189
3190         this_controller->port_agent.link_up_handler(
3191                 this_controller, &this_controller->port_agent, port, phy
3192                 );
3193         /* scic_sds_port_link_up(port, phy); */
3194
3195         scic_sds_controller_start_next_phy(this_controller);
3196 }
3197
3198 /**
3199  *
3200  * @controller: This is struct scic_sds_controller which receives the link down
3201  *    notification.
3202  * @port: This is struct scic_sds_port with which the phy is associated.
3203  * @phy: This is the struct scic_sds_phy which has gone link down.
3204  *
3205  * This method is called when the struct scic_sds_controller is in the starting state
3206  * link down handler is called. - Report the link down condition to the port
3207  * object none
3208  */
3209 static void scic_sds_controller_starting_state_link_down_handler(
3210         struct scic_sds_controller *this_controller,
3211         struct scic_sds_port *port,
3212         struct scic_sds_phy *phy)
3213 {
3214         this_controller->port_agent.link_down_handler(
3215                 this_controller, &this_controller->port_agent, port, phy
3216                 );
3217         /* scic_sds_port_link_down(port, phy); */
3218 }
3219
3220 /*
3221  * *****************************************************************************
3222  * * READY STATE HANDLERS
3223  * ***************************************************************************** */
3224
3225 /**
3226  *
3227  * @controller: The struct sci_base_controller object which is cast into a
3228  *    struct scic_sds_controller object.
3229  * @timeout: The timeout for when the stop operation should report a failure.
3230  *
3231  * This method is called when the struct scic_sds_controller is in the ready state
3232  * stop handler is called. - Start the timeout timer - Transition to
3233  * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3234  */
3235 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3236         struct sci_base_controller *controller,
3237         u32 timeout)
3238 {
3239         struct scic_sds_controller *this_controller;
3240
3241         this_controller = (struct scic_sds_controller *)controller;
3242
3243         isci_event_timer_start(this_controller,
3244                             this_controller->timeout_timer,
3245                             timeout);
3246
3247         sci_base_state_machine_change_state(
3248                 scic_sds_controller_get_base_state_machine(this_controller),
3249                 SCI_BASE_CONTROLLER_STATE_STOPPING
3250                 );
3251
3252         return SCI_SUCCESS;
3253 }
3254
3255 /**
3256  *
3257  * @controller: This is struct sci_base_controller object which is cast into a
3258  *    struct scic_sds_controller object.
3259  * @remote_device: This is struct sci_base_remote_device which is cast to a
3260  *    struct scic_sds_remote_device object.
3261  * @io_request: This is the struct sci_base_request which is cast to a
3262  *    SCIC_SDS_IO_REQUEST object.
3263  * @io_tag: This is the IO tag to be assigned to the IO request or
3264  *    SCI_CONTROLLER_INVALID_IO_TAG.
3265  *
3266  * This method is called when the struct scic_sds_controller is in the ready state and
3267  * the start io handler is called. - Start the io request on the remote device
3268  * - if successful - assign the io_request to the io_request_table - post the
3269  * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3270  * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3271  * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3272  * objects are not in a valid state to accept io requests. How does the io_tag
3273  * parameter get assigned to the io request?
3274  */
3275 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3276         struct sci_base_controller *controller,
3277         struct sci_base_remote_device *remote_device,
3278         struct sci_base_request *io_request,
3279         u16 io_tag)
3280 {
3281         enum sci_status status;
3282
3283         struct scic_sds_controller *this_controller;
3284         struct scic_sds_request *the_request;
3285         struct scic_sds_remote_device *the_device;
3286
3287         this_controller = (struct scic_sds_controller *)controller;
3288         the_request = (struct scic_sds_request *)io_request;
3289         the_device = (struct scic_sds_remote_device *)remote_device;
3290
3291         status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3292
3293         if (status == SCI_SUCCESS) {
3294                 this_controller->io_request_table[
3295                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3296
3297                 scic_sds_controller_post_request(
3298                         this_controller,
3299                         scic_sds_request_get_post_context(the_request)
3300                         );
3301         }
3302
3303         return status;
3304 }
3305
3306 /**
3307  *
3308  * @controller: This is struct sci_base_controller object which is cast into a
3309  *    struct scic_sds_controller object.
3310  * @remote_device: This is struct sci_base_remote_device which is cast to a
3311  *    struct scic_sds_remote_device object.
3312  * @io_request: This is the struct sci_base_request which is cast to a
3313  *    SCIC_SDS_IO_REQUEST object.
3314  *
3315  * This method is called when the struct scic_sds_controller is in the ready state and
3316  * the complete io handler is called. - Complete the io request on the remote
3317  * device - if successful - remove the io_request to the io_request_table
3318  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3319  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3320  * accept io requests.
3321  */
3322 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3323         struct sci_base_controller *controller,
3324         struct sci_base_remote_device *remote_device,
3325         struct sci_base_request *io_request)
3326 {
3327         u16 index;
3328         enum sci_status status;
3329         struct scic_sds_controller *this_controller;
3330         struct scic_sds_request *the_request;
3331         struct scic_sds_remote_device *the_device;
3332
3333         this_controller = (struct scic_sds_controller *)controller;
3334         the_request = (struct scic_sds_request *)io_request;
3335         the_device = (struct scic_sds_remote_device *)remote_device;
3336
3337         status = scic_sds_remote_device_complete_io(
3338                 this_controller, the_device, the_request);
3339
3340         if (status == SCI_SUCCESS) {
3341                 index = scic_sds_io_tag_get_index(the_request->io_tag);
3342                 this_controller->io_request_table[index] = NULL;
3343         }
3344
3345         return status;
3346 }
3347
3348 /**
3349  *
3350  * @controller: This is struct sci_base_controller object which is cast into a
3351  *    struct scic_sds_controller object.
3352  * @remote_device: This is struct sci_base_remote_device which is cast to a
3353  *    struct scic_sds_remote_device object.
3354  * @io_request: This is the struct sci_base_request which is cast to a
3355  *    SCIC_SDS_IO_REQUEST object.
3356  *
3357  * This method is called when the struct scic_sds_controller is in the ready state and
3358  * the continue io handler is called. enum sci_status
3359  */
3360 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3361         struct sci_base_controller *controller,
3362         struct sci_base_remote_device *remote_device,
3363         struct sci_base_request *io_request)
3364 {
3365         struct scic_sds_controller *this_controller;
3366         struct scic_sds_request *the_request;
3367
3368         the_request     = (struct scic_sds_request *)io_request;
3369         this_controller = (struct scic_sds_controller *)controller;
3370
3371         this_controller->io_request_table[
3372                 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3373
3374         scic_sds_controller_post_request(
3375                 this_controller,
3376                 scic_sds_request_get_post_context(the_request)
3377                 );
3378
3379         return SCI_SUCCESS;
3380 }
3381
3382 /**
3383  *
3384  * @controller: This is struct sci_base_controller object which is cast into a
3385  *    struct scic_sds_controller object.
3386  * @remote_device: This is struct sci_base_remote_device which is cast to a
3387  *    struct scic_sds_remote_device object.
3388  * @io_request: This is the struct sci_base_request which is cast to a
3389  *    SCIC_SDS_IO_REQUEST object.
3390  * @task_tag: This is the task tag to be assigned to the task request or
3391  *    SCI_CONTROLLER_INVALID_IO_TAG.
3392  *
3393  * This method is called when the struct scic_sds_controller is in the ready state and
3394  * the start task handler is called. - The remote device is requested to start
3395  * the task request - if successful - assign the task to the io_request_table -
3396  * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3397  * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3398  * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3399  * more objects are not in a valid state to accept io requests. How does the io
3400  * tag get assigned in this code path?
3401  */
3402 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3403         struct sci_base_controller *controller,
3404         struct sci_base_remote_device *remote_device,
3405         struct sci_base_request *io_request,
3406         u16 task_tag)
3407 {
3408         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3409                                                  controller;
3410         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3411                                               io_request;
3412         struct scic_sds_remote_device *the_device      = (struct scic_sds_remote_device *)
3413                                                     remote_device;
3414         enum sci_status status;
3415
3416         status = scic_sds_remote_device_start_task(
3417                 this_controller, the_device, the_request
3418                 );
3419
3420         if (status == SCI_SUCCESS) {
3421                 this_controller->io_request_table[
3422                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3423
3424                 scic_sds_controller_post_request(
3425                         this_controller,
3426                         scic_sds_request_get_post_context(the_request)
3427                         );
3428         } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3429                 this_controller->io_request_table[
3430                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3431
3432                 /*
3433                  * We will let framework know this task request started successfully,
3434                  * although core is still woring on starting the request (to post tc when
3435                  * RNC is resumed.) */
3436                 status = SCI_SUCCESS;
3437         }
3438         return status;
3439 }
3440
3441 /**
3442  *
3443  * @controller: This is struct sci_base_controller object which is cast into a
3444  *    struct scic_sds_controller object.
3445  * @remote_device: This is struct sci_base_remote_device which is cast to a
3446  *    struct scic_sds_remote_device object.
3447  * @io_request: This is the struct sci_base_request which is cast to a
3448  *    SCIC_SDS_IO_REQUEST object.
3449  *
3450  * This method is called when the struct scic_sds_controller is in the ready state and
3451  * the terminate request handler is called. - call the io request terminate
3452  * function - if successful - post the terminate request to the SCU hardware
3453  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3454  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3455  * accept io requests.
3456  */
3457 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3458         struct sci_base_controller *controller,
3459         struct sci_base_remote_device *remote_device,
3460         struct sci_base_request *io_request)
3461 {
3462         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3463                                                  controller;
3464         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3465                                               io_request;
3466         enum sci_status status;
3467
3468         status = scic_sds_io_request_terminate(the_request);
3469         if (status == SCI_SUCCESS) {
3470                 /*
3471                  * Utilize the original post context command and or in the POST_TC_ABORT
3472                  * request sub-type. */
3473                 scic_sds_controller_post_request(
3474                         this_controller,
3475                         scic_sds_request_get_post_context(the_request)
3476                         | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3477                         );
3478         }
3479
3480         return status;
3481 }
3482
3483 /**
3484  *
3485  * @controller: This is struct scic_sds_controller which receives the link up
3486  *    notification.
3487  * @port: This is struct scic_sds_port with which the phy is associated.
3488  * @phy: This is the struct scic_sds_phy which has gone link up.
3489  *
3490  * This method is called when the struct scic_sds_controller is in the starting state
3491  * link up handler is called.  This method will perform the following: - Stop
3492  * the phy timer - Start the next phy - Report the link up condition to the
3493  * port object none
3494  */
3495 static void scic_sds_controller_ready_state_link_up_handler(
3496         struct scic_sds_controller *this_controller,
3497         struct scic_sds_port *port,
3498         struct scic_sds_phy *phy)
3499 {
3500         this_controller->port_agent.link_up_handler(
3501                 this_controller, &this_controller->port_agent, port, phy
3502                 );
3503 }
3504
3505 /**
3506  *
3507  * @controller: This is struct scic_sds_controller which receives the link down
3508  *    notification.
3509  * @port: This is struct scic_sds_port with which the phy is associated.
3510  * @phy: This is the struct scic_sds_phy which has gone link down.
3511  *
3512  * This method is called when the struct scic_sds_controller is in the starting state
3513  * link down handler is called. - Report the link down condition to the port
3514  * object none
3515  */
3516 static void scic_sds_controller_ready_state_link_down_handler(
3517         struct scic_sds_controller *this_controller,
3518         struct scic_sds_port *port,
3519         struct scic_sds_phy *phy)
3520 {
3521         this_controller->port_agent.link_down_handler(
3522                 this_controller, &this_controller->port_agent, port, phy
3523                 );
3524 }
3525
3526 /*
3527  * *****************************************************************************
3528  * * STOPPING STATE HANDLERS
3529  * ***************************************************************************** */
3530
3531 /**
3532  *
3533  * @controller: This is struct sci_base_controller object which is cast into a
3534  *    struct scic_sds_controller object.
3535  * @remote_device: This is struct sci_base_remote_device which is cast to a
3536  *    struct scic_sds_remote_device object.
3537  * @io_request: This is the struct sci_base_request which is cast to a
3538  *    SCIC_SDS_IO_REQUEST object.
3539  *
3540  * This method is called when the struct scic_sds_controller is in a stopping state
3541  * and the complete io handler is called. - This function is not yet
3542  * implemented enum sci_status SCI_FAILURE
3543  */
3544 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3545         struct sci_base_controller *controller,
3546         struct sci_base_remote_device *remote_device,
3547         struct sci_base_request *io_request)
3548 {
3549         struct scic_sds_controller *this_controller;
3550
3551         this_controller = (struct scic_sds_controller *)controller;
3552
3553         /* / @todo Implement this function */
3554         return SCI_FAILURE;
3555 }
3556
3557 /**
3558  *
3559  * @controller: This is struct sci_base_controller object which is cast into a
3560  *    struct scic_sds_controller object.
3561  * @remote_device: This is struct sci_base_remote_device which is cast to a
3562  *    struct scic_sds_remote_device object.
3563  *
3564  * This method is called when the struct scic_sds_controller is in a stopping state
3565  * and the remote device has stopped.
3566  **/
3567 void scic_sds_controller_stopping_state_device_stopped_handler(
3568         struct scic_sds_controller *controller,
3569         struct scic_sds_remote_device *remote_device
3570 )
3571 {
3572         if (!scic_sds_controller_has_remote_devices_stopping(controller)) {
3573                 sci_base_state_machine_change_state(
3574                         &controller->parent.state_machine,
3575                         SCI_BASE_CONTROLLER_STATE_STOPPED
3576                 );
3577         }
3578 }
3579
3580 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3581         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3582                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3583                 .base.complete_io  = scic_sds_controller_default_request_handler,
3584                 .base.continue_io  = scic_sds_controller_default_request_handler,
3585                 .terminate_request = scic_sds_controller_default_request_handler,
3586         },
3587         [SCI_BASE_CONTROLLER_STATE_RESET] = {
3588                 .base.reset        = scic_sds_controller_general_reset_handler,
3589                 .base.initialize   = scic_sds_controller_reset_state_initialize_handler,
3590                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3591                 .base.complete_io  = scic_sds_controller_default_request_handler,
3592                 .base.continue_io  = scic_sds_controller_default_request_handler,
3593                 .terminate_request = scic_sds_controller_default_request_handler,
3594         },
3595         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3596                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3597                 .base.complete_io  = scic_sds_controller_default_request_handler,
3598                 .base.continue_io  = scic_sds_controller_default_request_handler,
3599                 .terminate_request = scic_sds_controller_default_request_handler,
3600         },
3601         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3602                 .base.start        = scic_sds_controller_initialized_state_start_handler,
3603                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3604                 .base.complete_io  = scic_sds_controller_default_request_handler,
3605                 .base.continue_io  = scic_sds_controller_default_request_handler,
3606                 .terminate_request = scic_sds_controller_default_request_handler,
3607         },
3608         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3609                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3610                 .base.complete_io  = scic_sds_controller_default_request_handler,
3611                 .base.continue_io  = scic_sds_controller_default_request_handler,
3612                 .terminate_request = scic_sds_controller_default_request_handler,
3613                 .link_up           = scic_sds_controller_starting_state_link_up_handler,
3614                 .link_down         = scic_sds_controller_starting_state_link_down_handler
3615         },
3616         [SCI_BASE_CONTROLLER_STATE_READY] = {
3617                 .base.stop         = scic_sds_controller_ready_state_stop_handler,
3618                 .base.reset        = scic_sds_controller_general_reset_handler,
3619                 .base.start_io     = scic_sds_controller_ready_state_start_io_handler,
3620                 .base.complete_io  = scic_sds_controller_ready_state_complete_io_handler,
3621                 .base.continue_io  = scic_sds_controller_ready_state_continue_io_handler,
3622                 .base.start_task   = scic_sds_controller_ready_state_start_task_handler,
3623                 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3624                 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3625                 .link_up           = scic_sds_controller_ready_state_link_up_handler,
3626                 .link_down         = scic_sds_controller_ready_state_link_down_handler
3627         },
3628         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3629                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3630                 .base.complete_io  = scic_sds_controller_default_request_handler,
3631                 .base.continue_io  = scic_sds_controller_default_request_handler,
3632                 .terminate_request = scic_sds_controller_default_request_handler,
3633         },
3634         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3635                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3636                 .base.complete_io  = scic_sds_controller_stopping_state_complete_io_handler,
3637                 .base.continue_io  = scic_sds_controller_default_request_handler,
3638                 .terminate_request = scic_sds_controller_default_request_handler,
3639                 .remote_device_stopped_handler = scic_sds_controller_stopping_state_device_stopped_handler,
3640         },
3641         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3642                 .base.reset        = scic_sds_controller_general_reset_handler,
3643                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3644                 .base.complete_io  = scic_sds_controller_default_request_handler,
3645                 .base.continue_io  = scic_sds_controller_default_request_handler,
3646                 .terminate_request = scic_sds_controller_default_request_handler,
3647         },
3648         [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3649                 .base.reset        = scic_sds_controller_general_reset_handler,
3650                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3651                 .base.complete_io  = scic_sds_controller_default_request_handler,
3652                 .base.continue_io  = scic_sds_controller_default_request_handler,
3653                 .terminate_request = scic_sds_controller_default_request_handler,
3654         },
3655 };
3656
3657 /**
3658  *
3659  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3660  *    object.
3661  *
3662  * This method implements the actions taken by the struct scic_sds_controller on entry
3663  * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3664  * controllers initial state. none This function should initialze the
3665  * controller object.
3666  */
3667 static void scic_sds_controller_initial_state_enter(
3668         struct sci_base_object *object)
3669 {
3670         struct scic_sds_controller *this_controller;
3671
3672         this_controller = (struct scic_sds_controller *)object;
3673
3674         sci_base_state_machine_change_state(
3675                 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3676 }
3677
3678 /**
3679  *
3680  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3681  *    object.
3682  *
3683  * This method implements the actions taken by the struct scic_sds_controller on exit
3684  * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3685  * controller starting timeout timer. none
3686  */
3687 static void scic_sds_controller_starting_state_exit(
3688         struct sci_base_object *object)
3689 {
3690         struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3691
3692         isci_event_timer_stop(scic, scic->timeout_timer);
3693 }
3694
3695 /**
3696  *
3697  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3698  *    object.
3699  *
3700  * This method implements the actions taken by the struct scic_sds_controller on entry
3701  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3702  * controllers ready state. none
3703  */
3704 static void scic_sds_controller_ready_state_enter(
3705         struct sci_base_object *object)
3706 {
3707         struct scic_sds_controller *this_controller;
3708
3709         this_controller = (struct scic_sds_controller *)object;
3710
3711         /* set the default interrupt coalescence number and timeout value. */
3712         scic_controller_set_interrupt_coalescence(
3713                 this_controller, 0x10, 250);
3714 }
3715
3716 /**
3717  *
3718  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3719  *    object.
3720  *
3721  * This method implements the actions taken by the struct scic_sds_controller on exit
3722  * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3723  */
3724 static void scic_sds_controller_ready_state_exit(
3725         struct sci_base_object *object)
3726 {
3727         struct scic_sds_controller *this_controller;
3728
3729         this_controller = (struct scic_sds_controller *)object;
3730
3731         /* disable interrupt coalescence. */
3732         scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3733 }
3734
3735 /**
3736  *
3737  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3738  *    object.
3739  *
3740  * This method implements the actions taken by the struct scic_sds_controller on entry
3741  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3742  * controllers ready state. - Stop the phys on this controller - Stop the ports
3743  * on this controller - Stop all of the remote devices on this controller none
3744  */
3745 static void scic_sds_controller_stopping_state_enter(
3746         struct sci_base_object *object)
3747 {
3748         struct scic_sds_controller *this_controller;
3749
3750         this_controller = (struct scic_sds_controller *)object;
3751
3752         /* Stop all of the components for this controller */
3753         scic_sds_controller_stop_phys(this_controller);
3754         scic_sds_controller_stop_ports(this_controller);
3755         scic_sds_controller_stop_devices(this_controller);
3756 }
3757
3758 /**
3759  *
3760  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3761  *    object.
3762  *
3763  * This method implements the actions taken by the struct scic_sds_controller on exit
3764  * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
3765  * controller stopping timeout timer. none
3766  */
3767 static void scic_sds_controller_stopping_state_exit(
3768         struct sci_base_object *object)
3769 {
3770         struct scic_sds_controller *this_controller;
3771
3772         this_controller = (struct scic_sds_controller *)object;
3773
3774         isci_event_timer_stop(this_controller, this_controller->timeout_timer);
3775 }
3776
3777 /**
3778  *
3779  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3780  *    object.
3781  *
3782  * This method implements the actions taken by the struct scic_sds_controller on entry
3783  * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
3784  * controllers resetting state. - Write to the SCU hardware reset register to
3785  * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
3786  */
3787 static void scic_sds_controller_resetting_state_enter(
3788         struct sci_base_object *object)
3789 {
3790         struct scic_sds_controller *this_controller;
3791
3792         this_controller = (struct scic_sds_controller *)object;
3793
3794         scic_sds_controller_reset_hardware(this_controller);
3795
3796         sci_base_state_machine_change_state(
3797                 scic_sds_controller_get_base_state_machine(this_controller),
3798                 SCI_BASE_CONTROLLER_STATE_RESET
3799                 );
3800 }
3801
3802 /* --------------------------------------------------------------------------- */
3803
3804 const struct sci_base_state scic_sds_controller_state_table[] = {
3805         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3806                 .enter_state = scic_sds_controller_initial_state_enter,
3807         },
3808         [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3809         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3810         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3811         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3812                 .exit_state  = scic_sds_controller_starting_state_exit,
3813         },
3814         [SCI_BASE_CONTROLLER_STATE_READY] = {
3815                 .enter_state = scic_sds_controller_ready_state_enter,
3816                 .exit_state  = scic_sds_controller_ready_state_exit,
3817         },
3818         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3819                 .enter_state = scic_sds_controller_resetting_state_enter,
3820         },
3821         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3822                 .enter_state = scic_sds_controller_stopping_state_enter,
3823                 .exit_state = scic_sds_controller_stopping_state_exit,
3824         },
3825         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3826         [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
3827 };
3828