drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2014-2015 PMC-Sierra, Inc.
   4  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; version 2 of the License.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    Questions/Comments/Bugfixes to storagedev@pmcs.com
  16  *
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/types.h>
  22 #include <linux/pci.h>
  23 #include <linux/pci-aspm.h>
  24 #include <linux/kernel.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/fs.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/compat.h>
  32 #include <linux/blktrace_api.h>
  33 #include <linux/uaccess.h>
  34 #include <linux/io.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/completion.h>
  37 #include <linux/moduleparam.h>
  38 #include <scsi/scsi.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi_tcq.h>
  43 #include <scsi/scsi_eh.h>
  44 #include <scsi/scsi_dbg.h>
  45 #include <linux/cciss_ioctl.h>
  46 #include <linux/string.h>
  47 #include <linux/bitmap.h>
  48 #include <linux/atomic.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/percpu-defs.h>
  51 #include <linux/percpu.h>
  52 #include <asm/unaligned.h>
  53 #include <asm/div64.h>
  54 #include "hpsa_cmd.h"
  55 #include "hpsa.h"
  56
  57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  58 #define HPSA_DRIVER_VERSION "3.4.10-0"
  59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  60 #define HPSA "hpsa"
  61
  62 /* How long to wait for CISS doorbell communication */
  63 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  64 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  65 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  66 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  67 #define MAX_IOCTL_CONFIG_WAIT 1000
  68
  69 /*define how many times we will try a command because of bus resets */
  70 #define MAX_CMD_RETRIES 3
  71
  72 /* Embedded module documentation macros - see modules.h */
  73 MODULE_AUTHOR("Hewlett-Packard Company");
  74 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  75         HPSA_DRIVER_VERSION);
  76 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  77 MODULE_VERSION(HPSA_DRIVER_VERSION);
  78 MODULE_LICENSE("GPL");
  79
  80 static int hpsa_allow_any;
  81 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(hpsa_allow_any,
  83                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  84 static int hpsa_simple_mode;
  85 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  86 MODULE_PARM_DESC(hpsa_simple_mode,
  87         "Use 'simple mode' rather than 'performant mode'");
  88
  89 /* define the PCI info for the cards we can control */
  90 static const struct pci_device_id hpsa_pci_device_id[] = {
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 131         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
 132         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
 133         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
 134         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
 135         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
 136         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
 137         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 138         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 139         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 140         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 141         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 142         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 143                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 144         {0,}
 145 };
 146
 147 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 148
 149 /*  board_id = Subsystem Device ID & Vendor ID
 150  *  product = Marketing Name for the board
 151  *  access = Address of the struct of function pointers
 152  */
 153 static struct board_type products[] = {
 154         {0x3241103C, "Smart Array P212", &SA5_access},
 155         {0x3243103C, "Smart Array P410", &SA5_access},
 156         {0x3245103C, "Smart Array P410i", &SA5_access},
 157         {0x3247103C, "Smart Array P411", &SA5_access},
 158         {0x3249103C, "Smart Array P812", &SA5_access},
 159         {0x324A103C, "Smart Array P712m", &SA5_access},
 160         {0x324B103C, "Smart Array P711m", &SA5_access},
 161         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 162         {0x3350103C, "Smart Array P222", &SA5_access},
 163         {0x3351103C, "Smart Array P420", &SA5_access},
 164         {0x3352103C, "Smart Array P421", &SA5_access},
 165         {0x3353103C, "Smart Array P822", &SA5_access},
 166         {0x3354103C, "Smart Array P420i", &SA5_access},
 167         {0x3355103C, "Smart Array P220i", &SA5_access},
 168         {0x3356103C, "Smart Array P721m", &SA5_access},
 169         {0x1921103C, "Smart Array P830i", &SA5_access},
 170         {0x1922103C, "Smart Array P430", &SA5_access},
 171         {0x1923103C, "Smart Array P431", &SA5_access},
 172         {0x1924103C, "Smart Array P830", &SA5_access},
 173         {0x1926103C, "Smart Array P731m", &SA5_access},
 174         {0x1928103C, "Smart Array P230i", &SA5_access},
 175         {0x1929103C, "Smart Array P530", &SA5_access},
 176         {0x21BD103C, "Smart Array P244br", &SA5_access},
 177         {0x21BE103C, "Smart Array P741m", &SA5_access},
 178         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 179         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 180         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 181         {0x21C2103C, "Smart Array P440", &SA5_access},
 182         {0x21C3103C, "Smart Array P441", &SA5_access},
 183         {0x21C4103C, "Smart Array", &SA5_access},
 184         {0x21C5103C, "Smart Array P841", &SA5_access},
 185         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 186         {0x21C7103C, "Smart HBA H240", &SA5_access},
 187         {0x21C8103C, "Smart HBA H241", &SA5_access},
 188         {0x21C9103C, "Smart Array", &SA5_access},
 189         {0x21CA103C, "Smart Array P246br", &SA5_access},
 190         {0x21CB103C, "Smart Array P840", &SA5_access},
 191         {0x21CC103C, "Smart Array", &SA5_access},
 192         {0x21CD103C, "Smart Array", &SA5_access},
 193         {0x21CE103C, "Smart HBA", &SA5_access},
 194         {0x05809005, "SmartHBA-SA", &SA5_access},
 195         {0x05819005, "SmartHBA-SA 8i", &SA5_access},
 196         {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
 197         {0x05839005, "SmartHBA-SA 8e", &SA5_access},
 198         {0x05849005, "SmartHBA-SA 16i", &SA5_access},
 199         {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
 200         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 201         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 202         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 203         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 204         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 205         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 206 };
 207
 208 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
 209 static const struct scsi_cmnd hpsa_cmd_busy;
 210 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
 211 static const struct scsi_cmnd hpsa_cmd_idle;
 212 static int number_of_controllers;
 213
 214 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 215 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 216 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 217
 218 #ifdef CONFIG_COMPAT
 219 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 220         void __user *arg);
 221 #endif
 222
 223 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 224 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 225 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
 226 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
 227                                             struct scsi_cmnd *scmd);
 228 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 229         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 230         int cmd_type);
 231 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 232 #define VPD_PAGE (1 << 8)
 233 #define HPSA_SIMPLE_ERROR_BITS 0x03
 234
 235 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 236 static void hpsa_scan_start(struct Scsi_Host *);
 237 static int hpsa_scan_finished(struct Scsi_Host *sh,
 238         unsigned long elapsed_time);
 239 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 240
 241 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 242 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 243 static int hpsa_slave_alloc(struct scsi_device *sdev);
 244 static int hpsa_slave_configure(struct scsi_device *sdev);
 245 static void hpsa_slave_destroy(struct scsi_device *sdev);
 246
 247 static void hpsa_update_scsi_devices(struct ctlr_info *h);
 248 static int check_for_unit_attention(struct ctlr_info *h,
 249         struct CommandList *c);
 250 static void check_ioctl_unit_attention(struct ctlr_info *h,
 251         struct CommandList *c);
 252 /* performant mode helper functions */
 253 static void calc_bucket_map(int *bucket, int num_buckets,
 254         int nsgs, int min_blocks, u32 *bucket_map);
 255 static void hpsa_free_performant_mode(struct ctlr_info *h);
 256 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 257 static inline u32 next_command(struct ctlr_info *h, u8 q);
 258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 259                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 260                                u64 *cfg_offset);
 261 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 262                                     unsigned long *memory_bar);
 263 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 264 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 265                                      int wait_for_ready);
 266 static inline void finish_cmd(struct CommandList *c);
 267 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 268 #define BOARD_NOT_READY 0
 269 #define BOARD_READY 1
 270 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 271 static void hpsa_flush_cache(struct ctlr_info *h);
 272 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 273         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 274         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 275 static void hpsa_command_resubmit_worker(struct work_struct *work);
 276 static u32 lockup_detected(struct ctlr_info *h);
 277 static int detect_controller_lockup(struct ctlr_info *h);
 278 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device);
 279
 280 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 281 {
 282         unsigned long *priv = shost_priv(sdev->host);
 283         return (struct ctlr_info *) *priv;
 284 }
 285
 286 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 287 {
 288         unsigned long *priv = shost_priv(sh);
 289         return (struct ctlr_info *) *priv;
 290 }
 291
 292 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
 293 {
 294         return c->scsi_cmd == SCSI_CMD_IDLE;
 295 }
 296
 297 static inline bool hpsa_is_pending_event(struct CommandList *c)
 298 {
 299         return c->abort_pending || c->reset_pending;
 300 }
 301
 302 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 303 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 304                         u8 *sense_key, u8 *asc, u8 *ascq)
 305 {
 306         struct scsi_sense_hdr sshdr;
 307         bool rc;
 308
 309         *sense_key = -1;
 310         *asc = -1;
 311         *ascq = -1;
 312
 313         if (sense_data_len < 1)
 314                 return;
 315
 316         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 317         if (rc) {
 318                 *sense_key = sshdr.sense_key;
 319                 *asc = sshdr.asc;
 320                 *ascq = sshdr.ascq;
 321         }
 322 }
 323
 324 static int check_for_unit_attention(struct ctlr_info *h,
 325         struct CommandList *c)
 326 {
 327         u8 sense_key, asc, ascq;
 328         int sense_len;
 329
 330         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 331                 sense_len = sizeof(c->err_info->SenseInfo);
 332         else
 333                 sense_len = c->err_info->SenseLen;
 334
 335         decode_sense_data(c->err_info->SenseInfo, sense_len,
 336                                 &sense_key, &asc, &ascq);
 337         if (sense_key != UNIT_ATTENTION || asc == 0xff)
 338                 return 0;
 339
 340         switch (asc) {
 341         case STATE_CHANGED:
 342                 dev_warn(&h->pdev->dev,
 343                         "%s: a state change detected, command retried\n",
 344                         h->devname);
 345                 break;
 346         case LUN_FAILED:
 347                 dev_warn(&h->pdev->dev,
 348                         "%s: LUN failure detected\n", h->devname);
 349                 break;
 350         case REPORT_LUNS_CHANGED:
 351                 dev_warn(&h->pdev->dev,
 352                         "%s: report LUN data changed\n", h->devname);
 353         /*
 354          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 355          * target (array) devices.
 356          */
 357                 break;
 358         case POWER_OR_RESET:
 359                 dev_warn(&h->pdev->dev,
 360                         "%s: a power on or device reset detected\n",
 361                         h->devname);
 362                 break;
 363         case UNIT_ATTENTION_CLEARED:
 364                 dev_warn(&h->pdev->dev,
 365                         "%s: unit attention cleared by another initiator\n",
 366                         h->devname);
 367                 break;
 368         default:
 369                 dev_warn(&h->pdev->dev,
 370                         "%s: unknown unit attention detected\n",
 371                         h->devname);
 372                 break;
 373         }
 374         return 1;
 375 }
 376
 377 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 378 {
 379         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 380                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 381                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 382                 return 0;
 383         dev_warn(&h->pdev->dev, HPSA "device busy");
 384         return 1;
 385 }
 386
 387 static u32 lockup_detected(struct ctlr_info *h);
 388 static ssize_t host_show_lockup_detected(struct device *dev,
 389                 struct device_attribute *attr, char *buf)
 390 {
 391         int ld;
 392         struct ctlr_info *h;
 393         struct Scsi_Host *shost = class_to_shost(dev);
 394
 395         h = shost_to_hba(shost);
 396         ld = lockup_detected(h);
 397
 398         return sprintf(buf, "ld=%d\n", ld);
 399 }
 400
 401 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 402                                          struct device_attribute *attr,
 403                                          const char *buf, size_t count)
 404 {
 405         int status, len;
 406         struct ctlr_info *h;
 407         struct Scsi_Host *shost = class_to_shost(dev);
 408         char tmpbuf[10];
 409
 410         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 411                 return -EACCES;
 412         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 413         strncpy(tmpbuf, buf, len);
 414         tmpbuf[len] = '\0';
 415         if (sscanf(tmpbuf, "%d", &status) != 1)
 416                 return -EINVAL;
 417         h = shost_to_hba(shost);
 418         h->acciopath_status = !!status;
 419         dev_warn(&h->pdev->dev,
 420                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 421                 h->acciopath_status ? "enabled" : "disabled");
 422         return count;
 423 }
 424
 425 static ssize_t host_store_raid_offload_debug(struct device *dev,
 426                                          struct device_attribute *attr,
 427                                          const char *buf, size_t count)
 428 {
 429         int debug_level, len;
 430         struct ctlr_info *h;
 431         struct Scsi_Host *shost = class_to_shost(dev);
 432         char tmpbuf[10];
 433
 434         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 435                 return -EACCES;
 436         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 437         strncpy(tmpbuf, buf, len);
 438         tmpbuf[len] = '\0';
 439         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 440                 return -EINVAL;
 441         if (debug_level < 0)
 442                 debug_level = 0;
 443         h = shost_to_hba(shost);
 444         h->raid_offload_debug = debug_level;
 445         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 446                 h->raid_offload_debug);
 447         return count;
 448 }
 449
 450 static ssize_t host_store_rescan(struct device *dev,
 451                                  struct device_attribute *attr,
 452                                  const char *buf, size_t count)
 453 {
 454         struct ctlr_info *h;
 455         struct Scsi_Host *shost = class_to_shost(dev);
 456         h = shost_to_hba(shost);
 457         hpsa_scan_start(h->scsi_host);
 458         return count;
 459 }
 460
 461 static ssize_t host_show_firmware_revision(struct device *dev,
 462              struct device_attribute *attr, char *buf)
 463 {
 464         struct ctlr_info *h;
 465         struct Scsi_Host *shost = class_to_shost(dev);
 466         unsigned char *fwrev;
 467
 468         h = shost_to_hba(shost);
 469         if (!h->hba_inquiry_data)
 470                 return 0;
 471         fwrev = &h->hba_inquiry_data[32];
 472         return snprintf(buf, 20, "%c%c%c%c\n",
 473                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 474 }
 475
 476 static ssize_t host_show_commands_outstanding(struct device *dev,
 477              struct device_attribute *attr, char *buf)
 478 {
 479         struct Scsi_Host *shost = class_to_shost(dev);
 480         struct ctlr_info *h = shost_to_hba(shost);
 481
 482         return snprintf(buf, 20, "%d\n",
 483                         atomic_read(&h->commands_outstanding));
 484 }
 485
 486 static ssize_t host_show_transport_mode(struct device *dev,
 487         struct device_attribute *attr, char *buf)
 488 {
 489         struct ctlr_info *h;
 490         struct Scsi_Host *shost = class_to_shost(dev);
 491
 492         h = shost_to_hba(shost);
 493         return snprintf(buf, 20, "%s\n",
 494                 h->transMethod & CFGTBL_Trans_Performant ?
 495                         "performant" : "simple");
 496 }
 497
 498 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 499         struct device_attribute *attr, char *buf)
 500 {
 501         struct ctlr_info *h;
 502         struct Scsi_Host *shost = class_to_shost(dev);
 503
 504         h = shost_to_hba(shost);
 505         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 506                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 507 }
 508
 509 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 510 static u32 unresettable_controller[] = {
 511         0x324a103C, /* Smart Array P712m */
 512         0x324b103C, /* Smart Array P711m */
 513         0x3223103C, /* Smart Array P800 */
 514         0x3234103C, /* Smart Array P400 */
 515         0x3235103C, /* Smart Array P400i */
 516         0x3211103C, /* Smart Array E200i */
 517         0x3212103C, /* Smart Array E200 */
 518         0x3213103C, /* Smart Array E200i */
 519         0x3214103C, /* Smart Array E200i */
 520         0x3215103C, /* Smart Array E200i */
 521         0x3237103C, /* Smart Array E500 */
 522         0x323D103C, /* Smart Array P700m */
 523         0x40800E11, /* Smart Array 5i */
 524         0x409C0E11, /* Smart Array 6400 */
 525         0x409D0E11, /* Smart Array 6400 EM */
 526         0x40700E11, /* Smart Array 5300 */
 527         0x40820E11, /* Smart Array 532 */
 528         0x40830E11, /* Smart Array 5312 */
 529         0x409A0E11, /* Smart Array 641 */
 530         0x409B0E11, /* Smart Array 642 */
 531         0x40910E11, /* Smart Array 6i */
 532 };
 533
 534 /* List of controllers which cannot even be soft reset */
 535 static u32 soft_unresettable_controller[] = {
 536         0x40800E11, /* Smart Array 5i */
 537         0x40700E11, /* Smart Array 5300 */
 538         0x40820E11, /* Smart Array 532 */
 539         0x40830E11, /* Smart Array 5312 */
 540         0x409A0E11, /* Smart Array 641 */
 541         0x409B0E11, /* Smart Array 642 */
 542         0x40910E11, /* Smart Array 6i */
 543         /* Exclude 640x boards.  These are two pci devices in one slot
 544          * which share a battery backed cache module.  One controls the
 545          * cache, the other accesses the cache through the one that controls
 546          * it.  If we reset the one controlling the cache, the other will
 547          * likely not be happy.  Just forbid resetting this conjoined mess.
 548          * The 640x isn't really supported by hpsa anyway.
 549          */
 550         0x409C0E11, /* Smart Array 6400 */
 551         0x409D0E11, /* Smart Array 6400 EM */
 552 };
 553
 554 static u32 needs_abort_tags_swizzled[] = {
 555         0x323D103C, /* Smart Array P700m */
 556         0x324a103C, /* Smart Array P712m */
 557         0x324b103C, /* SmartArray P711m */
 558 };
 559
 560 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 561 {
 562         int i;
 563
 564         for (i = 0; i < nelems; i++)
 565                 if (a[i] == board_id)
 566                         return 1;
 567         return 0;
 568 }
 569
 570 static int ctlr_is_hard_resettable(u32 board_id)
 571 {
 572         return !board_id_in_array(unresettable_controller,
 573                         ARRAY_SIZE(unresettable_controller), board_id);
 574 }
 575
 576 static int ctlr_is_soft_resettable(u32 board_id)
 577 {
 578         return !board_id_in_array(soft_unresettable_controller,
 579                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 580 }
 581
 582 static int ctlr_is_resettable(u32 board_id)
 583 {
 584         return ctlr_is_hard_resettable(board_id) ||
 585                 ctlr_is_soft_resettable(board_id);
 586 }
 587
 588 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 589 {
 590         return board_id_in_array(needs_abort_tags_swizzled,
 591                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 592 }
 593
 594 static ssize_t host_show_resettable(struct device *dev,
 595         struct device_attribute *attr, char *buf)
 596 {
 597         struct ctlr_info *h;
 598         struct Scsi_Host *shost = class_to_shost(dev);
 599
 600         h = shost_to_hba(shost);
 601         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 602 }
 603
 604 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 605 {
 606         return (scsi3addr[3] & 0xC0) == 0x40;
 607 }
 608
 609 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 610         "1(+0)ADM", "UNKNOWN"
 611 };
 612 #define HPSA_RAID_0     0
 613 #define HPSA_RAID_4     1
 614 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 615 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 616 #define HPSA_RAID_51    4
 617 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 618 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 619 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 620
 621 static ssize_t raid_level_show(struct device *dev,
 622              struct device_attribute *attr, char *buf)
 623 {
 624         ssize_t l = 0;
 625         unsigned char rlevel;
 626         struct ctlr_info *h;
 627         struct scsi_device *sdev;
 628         struct hpsa_scsi_dev_t *hdev;
 629         unsigned long flags;
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639
 640         /* Is this even a logical drive? */
 641         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 642                 spin_unlock_irqrestore(&h->lock, flags);
 643                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 644                 return l;
 645         }
 646
 647         rlevel = hdev->raid_level;
 648         spin_unlock_irqrestore(&h->lock, flags);
 649         if (rlevel > RAID_UNKNOWN)
 650                 rlevel = RAID_UNKNOWN;
 651         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 652         return l;
 653 }
 654
 655 static ssize_t lunid_show(struct device *dev,
 656              struct device_attribute *attr, char *buf)
 657 {
 658         struct ctlr_info *h;
 659         struct scsi_device *sdev;
 660         struct hpsa_scsi_dev_t *hdev;
 661         unsigned long flags;
 662         unsigned char lunid[8];
 663
 664         sdev = to_scsi_device(dev);
 665         h = sdev_to_hba(sdev);
 666         spin_lock_irqsave(&h->lock, flags);
 667         hdev = sdev->hostdata;
 668         if (!hdev) {
 669                 spin_unlock_irqrestore(&h->lock, flags);
 670                 return -ENODEV;
 671         }
 672         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 673         spin_unlock_irqrestore(&h->lock, flags);
 674         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 675                 lunid[0], lunid[1], lunid[2], lunid[3],
 676                 lunid[4], lunid[5], lunid[6], lunid[7]);
 677 }
 678
 679 static ssize_t unique_id_show(struct device *dev,
 680              struct device_attribute *attr, char *buf)
 681 {
 682         struct ctlr_info *h;
 683         struct scsi_device *sdev;
 684         struct hpsa_scsi_dev_t *hdev;
 685         unsigned long flags;
 686         unsigned char sn[16];
 687
 688         sdev = to_scsi_device(dev);
 689         h = sdev_to_hba(sdev);
 690         spin_lock_irqsave(&h->lock, flags);
 691         hdev = sdev->hostdata;
 692         if (!hdev) {
 693                 spin_unlock_irqrestore(&h->lock, flags);
 694                 return -ENODEV;
 695         }
 696         memcpy(sn, hdev->device_id, sizeof(sn));
 697         spin_unlock_irqrestore(&h->lock, flags);
 698         return snprintf(buf, 16 * 2 + 2,
 699                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 700                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 701                         sn[0], sn[1], sn[2], sn[3],
 702                         sn[4], sn[5], sn[6], sn[7],
 703                         sn[8], sn[9], sn[10], sn[11],
 704                         sn[12], sn[13], sn[14], sn[15]);
 705 }
 706
 707 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 708              struct device_attribute *attr, char *buf)
 709 {
 710         struct ctlr_info *h;
 711         struct scsi_device *sdev;
 712         struct hpsa_scsi_dev_t *hdev;
 713         unsigned long flags;
 714         int offload_enabled;
 715
 716         sdev = to_scsi_device(dev);
 717         h = sdev_to_hba(sdev);
 718         spin_lock_irqsave(&h->lock, flags);
 719         hdev = sdev->hostdata;
 720         if (!hdev) {
 721                 spin_unlock_irqrestore(&h->lock, flags);
 722                 return -ENODEV;
 723         }
 724         offload_enabled = hdev->offload_enabled;
 725         spin_unlock_irqrestore(&h->lock, flags);
 726         return snprintf(buf, 20, "%d\n", offload_enabled);
 727 }
 728
 729 #define MAX_PATHS 8
 730 #define PATH_STRING_LEN 50
 731
 732 static ssize_t path_info_show(struct device *dev,
 733              struct device_attribute *attr, char *buf)
 734 {
 735         struct ctlr_info *h;
 736         struct scsi_device *sdev;
 737         struct hpsa_scsi_dev_t *hdev;
 738         unsigned long flags;
 739         int i;
 740         int output_len = 0;
 741         u8 box;
 742         u8 bay;
 743         u8 path_map_index = 0;
 744         char *active;
 745         unsigned char phys_connector[2];
 746         unsigned char path[MAX_PATHS][PATH_STRING_LEN];
 747
 748         memset(path, 0, MAX_PATHS * PATH_STRING_LEN);
 749         sdev = to_scsi_device(dev);
 750         h = sdev_to_hba(sdev);
 751         spin_lock_irqsave(&h->devlock, flags);
 752         hdev = sdev->hostdata;
 753         if (!hdev) {
 754                 spin_unlock_irqrestore(&h->devlock, flags);
 755                 return -ENODEV;
 756         }
 757
 758         bay = hdev->bay;
 759         for (i = 0; i < MAX_PATHS; i++) {
 760                 path_map_index = 1<<i;
 761                 if (i == hdev->active_path_index)
 762                         active = "Active";
 763                 else if (hdev->path_map & path_map_index)
 764                         active = "Inactive";
 765                 else
 766                         continue;
 767
 768                 output_len = snprintf(path[i],
 769                                 PATH_STRING_LEN, "[%d:%d:%d:%d] %20.20s ",
 770                                 h->scsi_host->host_no,
 771                                 hdev->bus, hdev->target, hdev->lun,
 772                                 scsi_device_type(hdev->devtype));
 773
 774                 if (is_ext_target(h, hdev) ||
 775                         (hdev->devtype == TYPE_RAID) ||
 776                         is_logical_dev_addr_mode(hdev->scsi3addr)) {
 777                         output_len += snprintf(path[i] + output_len,
 778                                                 PATH_STRING_LEN, "%s\n",
 779                                                 active);
 780                         continue;
 781                 }
 782
 783                 box = hdev->box[i];
 784                 memcpy(&phys_connector, &hdev->phys_connector[i],
 785                         sizeof(phys_connector));
 786                 if (phys_connector[0] < '0')
 787                         phys_connector[0] = '0';
 788                 if (phys_connector[1] < '0')
 789                         phys_connector[1] = '0';
 790                 if (hdev->phys_connector[i] > 0)
 791                         output_len += snprintf(path[i] + output_len,
 792                                 PATH_STRING_LEN,
 793                                 "PORT: %.2s ",
 794                                 phys_connector);
 795                 if (hdev->devtype == TYPE_DISK &&
 796                         hdev->expose_state != HPSA_DO_NOT_EXPOSE) {
 797                         if (box == 0 || box == 0xFF) {
 798                                 output_len += snprintf(path[i] + output_len,
 799                                         PATH_STRING_LEN,
 800                                         "BAY: %hhu %s\n",
 801                                         bay, active);
 802                         } else {
 803                                 output_len += snprintf(path[i] + output_len,
 804                                         PATH_STRING_LEN,
 805                                         "BOX: %hhu BAY: %hhu %s\n",
 806                                         box, bay, active);
 807                         }
 808                 } else if (box != 0 && box != 0xFF) {
 809                         output_len += snprintf(path[i] + output_len,
 810                                 PATH_STRING_LEN, "BOX: %hhu %s\n",
 811                                 box, active);
 812                 } else
 813                         output_len += snprintf(path[i] + output_len,
 814                                 PATH_STRING_LEN, "%s\n", active);
 815         }
 816
 817         spin_unlock_irqrestore(&h->devlock, flags);
 818         return snprintf(buf, output_len+1, "%s%s%s%s%s%s%s%s",
 819                 path[0], path[1], path[2], path[3],
 820                 path[4], path[5], path[6], path[7]);
 821 }
 822
 823 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 824 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 825 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 826 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 827 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 828                         host_show_hp_ssd_smart_path_enabled, NULL);
 829 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
 830 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 831                 host_show_hp_ssd_smart_path_status,
 832                 host_store_hp_ssd_smart_path_status);
 833 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 834                         host_store_raid_offload_debug);
 835 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 836         host_show_firmware_revision, NULL);
 837 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 838         host_show_commands_outstanding, NULL);
 839 static DEVICE_ATTR(transport_mode, S_IRUGO,
 840         host_show_transport_mode, NULL);
 841 static DEVICE_ATTR(resettable, S_IRUGO,
 842         host_show_resettable, NULL);
 843 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 844         host_show_lockup_detected, NULL);
 845
 846 static struct device_attribute *hpsa_sdev_attrs[] = {
 847         &dev_attr_raid_level,
 848         &dev_attr_lunid,
 849         &dev_attr_unique_id,
 850         &dev_attr_hp_ssd_smart_path_enabled,
 851         &dev_attr_path_info,
 852         &dev_attr_lockup_detected,
 853         NULL,
 854 };
 855
 856 static struct device_attribute *hpsa_shost_attrs[] = {
 857         &dev_attr_rescan,
 858         &dev_attr_firmware_revision,
 859         &dev_attr_commands_outstanding,
 860         &dev_attr_transport_mode,
 861         &dev_attr_resettable,
 862         &dev_attr_hp_ssd_smart_path_status,
 863         &dev_attr_raid_offload_debug,
 864         NULL,
 865 };
 866
 867 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 868                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 869
 870 static struct scsi_host_template hpsa_driver_template = {
 871         .module                 = THIS_MODULE,
 872         .name                   = HPSA,
 873         .proc_name              = HPSA,
 874         .queuecommand           = hpsa_scsi_queue_command,
 875         .scan_start             = hpsa_scan_start,
 876         .scan_finished          = hpsa_scan_finished,
 877         .change_queue_depth     = hpsa_change_queue_depth,
 878         .this_id                = -1,
 879         .use_clustering         = ENABLE_CLUSTERING,
 880         .eh_abort_handler       = hpsa_eh_abort_handler,
 881         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 882         .ioctl                  = hpsa_ioctl,
 883         .slave_alloc            = hpsa_slave_alloc,
 884         .slave_configure        = hpsa_slave_configure,
 885         .slave_destroy          = hpsa_slave_destroy,
 886 #ifdef CONFIG_COMPAT
 887         .compat_ioctl           = hpsa_compat_ioctl,
 888 #endif
 889         .sdev_attrs = hpsa_sdev_attrs,
 890         .shost_attrs = hpsa_shost_attrs,
 891         .max_sectors = 8192,
 892         .no_write_same = 1,
 893 };
 894
 895 static inline u32 next_command(struct ctlr_info *h, u8 q)
 896 {
 897         u32 a;
 898         struct reply_queue_buffer *rq = &h->reply_queue[q];
 899
 900         if (h->transMethod & CFGTBL_Trans_io_accel1)
 901                 return h->access.command_completed(h, q);
 902
 903         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 904                 return h->access.command_completed(h, q);
 905
 906         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 907                 a = rq->head[rq->current_entry];
 908                 rq->current_entry++;
 909                 atomic_dec(&h->commands_outstanding);
 910         } else {
 911                 a = FIFO_EMPTY;
 912         }
 913         /* Check for wraparound */
 914         if (rq->current_entry == h->max_commands) {
 915                 rq->current_entry = 0;
 916                 rq->wraparound ^= 1;
 917         }
 918         return a;
 919 }
 920
 921 /*
 922  * There are some special bits in the bus address of the
 923  * command that we have to set for the controller to know
 924  * how to process the command:
 925  *
 926  * Normal performant mode:
 927  * bit 0: 1 means performant mode, 0 means simple mode.
 928  * bits 1-3 = block fetch table entry
 929  * bits 4-6 = command type (== 0)
 930  *
 931  * ioaccel1 mode:
 932  * bit 0 = "performant mode" bit.
 933  * bits 1-3 = block fetch table entry
 934  * bits 4-6 = command type (== 110)
 935  * (command type is needed because ioaccel1 mode
 936  * commands are submitted through the same register as normal
 937  * mode commands, so this is how the controller knows whether
 938  * the command is normal mode or ioaccel1 mode.)
 939  *
 940  * ioaccel2 mode:
 941  * bit 0 = "performant mode" bit.
 942  * bits 1-4 = block fetch table entry (note extra bit)
 943  * bits 4-6 = not needed, because ioaccel2 mode has
 944  * a separate special register for submitting commands.
 945  */
 946
 947 /*
 948  * set_performant_mode: Modify the tag for cciss performant
 949  * set bit 0 for pull model, bits 3-1 for block fetch
 950  * register number
 951  */
 952 #define DEFAULT_REPLY_QUEUE (-1)
 953 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 954                                         int reply_queue)
 955 {
 956         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 957                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 958                 if (unlikely(!h->msix_vector))
 959                         return;
 960                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 961                         c->Header.ReplyQueue =
 962                                 raw_smp_processor_id() % h->nreply_queues;
 963                 else
 964                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 965         }
 966 }
 967
 968 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 969                                                 struct CommandList *c,
 970                                                 int reply_queue)
 971 {
 972         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 973
 974         /*
 975          * Tell the controller to post the reply to the queue for this
 976          * processor.  This seems to give the best I/O throughput.
 977          */
 978         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 979                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 980         else
 981                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 982         /*
 983          * Set the bits in the address sent down to include:
 984          *  - performant mode bit (bit 0)
 985          *  - pull count (bits 1-3)
 986          *  - command type (bits 4-6)
 987          */
 988         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 989                                         IOACCEL1_BUSADDR_CMDTYPE;
 990 }
 991
 992 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
 993                                                 struct CommandList *c,
 994                                                 int reply_queue)
 995 {
 996         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
 997                 &h->ioaccel2_cmd_pool[c->cmdindex];
 998
 999         /* Tell the controller to post the reply to the queue for this
1000          * processor.  This seems to give the best I/O throughput.
1001          */
1002         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1003                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1004         else
1005                 cp->reply_queue = reply_queue % h->nreply_queues;
1006         /* Set the bits in the address sent down to include:
1007          *  - performant mode bit not used in ioaccel mode 2
1008          *  - pull count (bits 0-3)
1009          *  - command type isn't needed for ioaccel2
1010          */
1011         c->busaddr |= h->ioaccel2_blockFetchTable[0];
1012 }
1013
1014 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1015                                                 struct CommandList *c,
1016                                                 int reply_queue)
1017 {
1018         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1019
1020         /*
1021          * Tell the controller to post the reply to the queue for this
1022          * processor.  This seems to give the best I/O throughput.
1023          */
1024         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1026         else
1027                 cp->reply_queue = reply_queue % h->nreply_queues;
1028         /*
1029          * Set the bits in the address sent down to include:
1030          *  - performant mode bit not used in ioaccel mode 2
1031          *  - pull count (bits 0-3)
1032          *  - command type isn't needed for ioaccel2
1033          */
1034         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1035 }
1036
1037 static int is_firmware_flash_cmd(u8 *cdb)
1038 {
1039         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1040 }
1041
1042 /*
1043  * During firmware flash, the heartbeat register may not update as frequently
1044  * as it should.  So we dial down lockup detection during firmware flash. and
1045  * dial it back up when firmware flash completes.
1046  */
1047 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1048 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1049 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1050                 struct CommandList *c)
1051 {
1052         if (!is_firmware_flash_cmd(c->Request.CDB))
1053                 return;
1054         atomic_inc(&h->firmware_flash_in_progress);
1055         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1056 }
1057
1058 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1059                 struct CommandList *c)
1060 {
1061         if (is_firmware_flash_cmd(c->Request.CDB) &&
1062                 atomic_dec_and_test(&h->firmware_flash_in_progress))
1063                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1064 }
1065
1066 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1067         struct CommandList *c, int reply_queue)
1068 {
1069         dial_down_lockup_detection_during_fw_flash(h, c);
1070         atomic_inc(&h->commands_outstanding);
1071         switch (c->cmd_type) {
1072         case CMD_IOACCEL1:
1073                 set_ioaccel1_performant_mode(h, c, reply_queue);
1074                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1075                 break;
1076         case CMD_IOACCEL2:
1077                 set_ioaccel2_performant_mode(h, c, reply_queue);
1078                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1079                 break;
1080         case IOACCEL2_TMF:
1081                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1082                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1083                 break;
1084         default:
1085                 set_performant_mode(h, c, reply_queue);
1086                 h->access.submit_command(h, c);
1087         }
1088 }
1089
1090 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1091 {
1092         if (unlikely(hpsa_is_pending_event(c)))
1093                 return finish_cmd(c);
1094
1095         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1096 }
1097
1098 static inline int is_hba_lunid(unsigned char scsi3addr[])
1099 {
1100         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1101 }
1102
1103 static inline int is_scsi_rev_5(struct ctlr_info *h)
1104 {
1105         if (!h->hba_inquiry_data)
1106                 return 0;
1107         if ((h->hba_inquiry_data[2] & 0x07) == 5)
1108                 return 1;
1109         return 0;
1110 }
1111
1112 static int hpsa_find_target_lun(struct ctlr_info *h,
1113         unsigned char scsi3addr[], int bus, int *target, int *lun)
1114 {
1115         /* finds an unused bus, target, lun for a new physical device
1116          * assumes h->devlock is held
1117          */
1118         int i, found = 0;
1119         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1120
1121         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1122
1123         for (i = 0; i < h->ndevices; i++) {
1124                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1125                         __set_bit(h->dev[i]->target, lun_taken);
1126         }
1127
1128         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1129         if (i < HPSA_MAX_DEVICES) {
1130                 /* *bus = 1; */
1131                 *target = i;
1132                 *lun = 0;
1133                 found = 1;
1134         }
1135         return !found;
1136 }
1137
1138 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1139         struct hpsa_scsi_dev_t *dev, char *description)
1140 {
1141         if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1142                 return;
1143
1144         dev_printk(level, &h->pdev->dev,
1145                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
1146                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1147                         description,
1148                         scsi_device_type(dev->devtype),
1149                         dev->vendor,
1150                         dev->model,
1151                         dev->raid_level > RAID_UNKNOWN ?
1152                                 "RAID-?" : raid_label[dev->raid_level],
1153                         dev->offload_config ? '+' : '-',
1154                         dev->offload_enabled ? '+' : '-',
1155                         dev->expose_state);
1156 }
1157
1158 /* Add an entry into h->dev[] array. */
1159 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1160                 struct hpsa_scsi_dev_t *device,
1161                 struct hpsa_scsi_dev_t *added[], int *nadded)
1162 {
1163         /* assumes h->devlock is held */
1164         int n = h->ndevices;
1165         int i;
1166         unsigned char addr1[8], addr2[8];
1167         struct hpsa_scsi_dev_t *sd;
1168
1169         if (n >= HPSA_MAX_DEVICES) {
1170                 dev_err(&h->pdev->dev, "too many devices, some will be "
1171                         "inaccessible.\n");
1172                 return -1;
1173         }
1174
1175         /* physical devices do not have lun or target assigned until now. */
1176         if (device->lun != -1)
1177                 /* Logical device, lun is already assigned. */
1178                 goto lun_assigned;
1179
1180         /* If this device a non-zero lun of a multi-lun device
1181          * byte 4 of the 8-byte LUN addr will contain the logical
1182          * unit no, zero otherwise.
1183          */
1184         if (device->scsi3addr[4] == 0) {
1185                 /* This is not a non-zero lun of a multi-lun device */
1186                 if (hpsa_find_target_lun(h, device->scsi3addr,
1187                         device->bus, &device->target, &device->lun) != 0)
1188                         return -1;
1189                 goto lun_assigned;
1190         }
1191
1192         /* This is a non-zero lun of a multi-lun device.
1193          * Search through our list and find the device which
1194          * has the same 8 byte LUN address, excepting byte 4 and 5.
1195          * Assign the same bus and target for this new LUN.
1196          * Use the logical unit number from the firmware.
1197          */
1198         memcpy(addr1, device->scsi3addr, 8);
1199         addr1[4] = 0;
1200         addr1[5] = 0;
1201         for (i = 0; i < n; i++) {
1202                 sd = h->dev[i];
1203                 memcpy(addr2, sd->scsi3addr, 8);
1204                 addr2[4] = 0;
1205                 addr2[5] = 0;
1206                 /* differ only in byte 4 and 5? */
1207                 if (memcmp(addr1, addr2, 8) == 0) {
1208                         device->bus = sd->bus;
1209                         device->target = sd->target;
1210                         device->lun = device->scsi3addr[4];
1211                         break;
1212                 }
1213         }
1214         if (device->lun == -1) {
1215                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1216                         " suspect firmware bug or unsupported hardware "
1217                         "configuration.\n");
1218                         return -1;
1219         }
1220
1221 lun_assigned:
1222
1223         h->dev[n] = device;
1224         h->ndevices++;
1225         added[*nadded] = device;
1226         (*nadded)++;
1227         hpsa_show_dev_msg(KERN_INFO, h, device,
1228                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1229         device->offload_to_be_enabled = device->offload_enabled;
1230         device->offload_enabled = 0;
1231         return 0;
1232 }
1233
1234 /* Update an entry in h->dev[] array. */
1235 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1236         int entry, struct hpsa_scsi_dev_t *new_entry)
1237 {
1238         int offload_enabled;
1239         /* assumes h->devlock is held */
1240         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1241
1242         /* Raid level changed. */
1243         h->dev[entry]->raid_level = new_entry->raid_level;
1244
1245         /* Raid offload parameters changed.  Careful about the ordering. */
1246         if (new_entry->offload_config && new_entry->offload_enabled) {
1247                 /*
1248                  * if drive is newly offload_enabled, we want to copy the
1249                  * raid map data first.  If previously offload_enabled and
1250                  * offload_config were set, raid map data had better be
1251                  * the same as it was before.  if raid map data is changed
1252                  * then it had better be the case that
1253                  * h->dev[entry]->offload_enabled is currently 0.
1254                  */
1255                 h->dev[entry]->raid_map = new_entry->raid_map;
1256                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1257         }
1258         if (new_entry->hba_ioaccel_enabled) {
1259                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1260                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1261         }
1262         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1263         h->dev[entry]->offload_config = new_entry->offload_config;
1264         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1265         h->dev[entry]->queue_depth = new_entry->queue_depth;
1266
1267         /*
1268          * We can turn off ioaccel offload now, but need to delay turning
1269          * it on until we can update h->dev[entry]->phys_disk[], but we
1270          * can't do that until all the devices are updated.
1271          */
1272         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1273         if (!new_entry->offload_enabled)
1274                 h->dev[entry]->offload_enabled = 0;
1275
1276         offload_enabled = h->dev[entry]->offload_enabled;
1277         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1278         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1279         h->dev[entry]->offload_enabled = offload_enabled;
1280 }
1281
1282 /* Replace an entry from h->dev[] array. */
1283 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1284         int entry, struct hpsa_scsi_dev_t *new_entry,
1285         struct hpsa_scsi_dev_t *added[], int *nadded,
1286         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1287 {
1288         /* assumes h->devlock is held */
1289         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1290         removed[*nremoved] = h->dev[entry];
1291         (*nremoved)++;
1292
1293         /*
1294          * New physical devices won't have target/lun assigned yet
1295          * so we need to preserve the values in the slot we are replacing.
1296          */
1297         if (new_entry->target == -1) {
1298                 new_entry->target = h->dev[entry]->target;
1299                 new_entry->lun = h->dev[entry]->lun;
1300         }
1301
1302         h->dev[entry] = new_entry;
1303         added[*nadded] = new_entry;
1304         (*nadded)++;
1305         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1306         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1307         new_entry->offload_enabled = 0;
1308 }
1309
1310 /* Remove an entry from h->dev[] array. */
1311 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1312         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1313 {
1314         /* assumes h->devlock is held */
1315         int i;
1316         struct hpsa_scsi_dev_t *sd;
1317
1318         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1319
1320         sd = h->dev[entry];
1321         removed[*nremoved] = h->dev[entry];
1322         (*nremoved)++;
1323
1324         for (i = entry; i < h->ndevices-1; i++)
1325                 h->dev[i] = h->dev[i+1];
1326         h->ndevices--;
1327         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1328 }
1329
1330 #define SCSI3ADDR_EQ(a, b) ( \
1331         (a)[7] == (b)[7] && \
1332         (a)[6] == (b)[6] && \
1333         (a)[5] == (b)[5] && \
1334         (a)[4] == (b)[4] && \
1335         (a)[3] == (b)[3] && \
1336         (a)[2] == (b)[2] && \
1337         (a)[1] == (b)[1] && \
1338         (a)[0] == (b)[0])
1339
1340 static void fixup_botched_add(struct ctlr_info *h,
1341         struct hpsa_scsi_dev_t *added)
1342 {
1343         /* called when scsi_add_device fails in order to re-adjust
1344          * h->dev[] to match the mid layer's view.
1345          */
1346         unsigned long flags;
1347         int i, j;
1348
1349         spin_lock_irqsave(&h->lock, flags);
1350         for (i = 0; i < h->ndevices; i++) {
1351                 if (h->dev[i] == added) {
1352                         for (j = i; j < h->ndevices-1; j++)
1353                                 h->dev[j] = h->dev[j+1];
1354                         h->ndevices--;
1355                         break;
1356                 }
1357         }
1358         spin_unlock_irqrestore(&h->lock, flags);
1359         kfree(added);
1360 }
1361
1362 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1363         struct hpsa_scsi_dev_t *dev2)
1364 {
1365         /* we compare everything except lun and target as these
1366          * are not yet assigned.  Compare parts likely
1367          * to differ first
1368          */
1369         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1370                 sizeof(dev1->scsi3addr)) != 0)
1371                 return 0;
1372         if (memcmp(dev1->device_id, dev2->device_id,
1373                 sizeof(dev1->device_id)) != 0)
1374                 return 0;
1375         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1376                 return 0;
1377         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1378                 return 0;
1379         if (dev1->devtype != dev2->devtype)
1380                 return 0;
1381         if (dev1->bus != dev2->bus)
1382                 return 0;
1383         return 1;
1384 }
1385
1386 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1387         struct hpsa_scsi_dev_t *dev2)
1388 {
1389         /* Device attributes that can change, but don't mean
1390          * that the device is a different device, nor that the OS
1391          * needs to be told anything about the change.
1392          */
1393         if (dev1->raid_level != dev2->raid_level)
1394                 return 1;
1395         if (dev1->offload_config != dev2->offload_config)
1396                 return 1;
1397         if (dev1->offload_enabled != dev2->offload_enabled)
1398                 return 1;
1399         if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1400                 if (dev1->queue_depth != dev2->queue_depth)
1401                         return 1;
1402         return 0;
1403 }
1404
1405 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1406  * and return needle location in *index.  If scsi3addr matches, but not
1407  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1408  * location in *index.
1409  * In the case of a minor device attribute change, such as RAID level, just
1410  * return DEVICE_UPDATED, along with the updated device's location in index.
1411  * If needle not found, return DEVICE_NOT_FOUND.
1412  */
1413 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1414         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1415         int *index)
1416 {
1417         int i;
1418 #define DEVICE_NOT_FOUND 0
1419 #define DEVICE_CHANGED 1
1420 #define DEVICE_SAME 2
1421 #define DEVICE_UPDATED 3
1422         if (needle == NULL)
1423                 return DEVICE_NOT_FOUND;
1424
1425         for (i = 0; i < haystack_size; i++) {
1426                 if (haystack[i] == NULL) /* previously removed. */
1427                         continue;
1428                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1429                         *index = i;
1430                         if (device_is_the_same(needle, haystack[i])) {
1431                                 if (device_updated(needle, haystack[i]))
1432                                         return DEVICE_UPDATED;
1433                                 return DEVICE_SAME;
1434                         } else {
1435                                 /* Keep offline devices offline */
1436                                 if (needle->volume_offline)
1437                                         return DEVICE_NOT_FOUND;
1438                                 return DEVICE_CHANGED;
1439                         }
1440                 }
1441         }
1442         *index = -1;
1443         return DEVICE_NOT_FOUND;
1444 }
1445
1446 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1447                                         unsigned char scsi3addr[])
1448 {
1449         struct offline_device_entry *device;
1450         unsigned long flags;
1451
1452         /* Check to see if device is already on the list */
1453         spin_lock_irqsave(&h->offline_device_lock, flags);
1454         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1455                 if (memcmp(device->scsi3addr, scsi3addr,
1456                         sizeof(device->scsi3addr)) == 0) {
1457                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1458                         return;
1459                 }
1460         }
1461         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1462
1463         /* Device is not on the list, add it. */
1464         device = kmalloc(sizeof(*device), GFP_KERNEL);
1465         if (!device) {
1466                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1467                 return;
1468         }
1469         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1470         spin_lock_irqsave(&h->offline_device_lock, flags);
1471         list_add_tail(&device->offline_list, &h->offline_device_list);
1472         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1473 }
1474
1475 /* Print a message explaining various offline volume states */
1476 static void hpsa_show_volume_status(struct ctlr_info *h,
1477         struct hpsa_scsi_dev_t *sd)
1478 {
1479         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1480                 dev_info(&h->pdev->dev,
1481                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1482                         h->scsi_host->host_no,
1483                         sd->bus, sd->target, sd->lun);
1484         switch (sd->volume_offline) {
1485         case HPSA_LV_OK:
1486                 break;
1487         case HPSA_LV_UNDERGOING_ERASE:
1488                 dev_info(&h->pdev->dev,
1489                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1490                         h->scsi_host->host_no,
1491                         sd->bus, sd->target, sd->lun);
1492                 break;
1493         case HPSA_LV_NOT_AVAILABLE:
1494                 dev_info(&h->pdev->dev,
1495                         "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1496                         h->scsi_host->host_no,
1497                         sd->bus, sd->target, sd->lun);
1498                 break;
1499         case HPSA_LV_UNDERGOING_RPI:
1500                 dev_info(&h->pdev->dev,
1501                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1502                         h->scsi_host->host_no,
1503                         sd->bus, sd->target, sd->lun);
1504                 break;
1505         case HPSA_LV_PENDING_RPI:
1506                 dev_info(&h->pdev->dev,
1507                         "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1508                         h->scsi_host->host_no,
1509                         sd->bus, sd->target, sd->lun);
1510                 break;
1511         case HPSA_LV_ENCRYPTED_NO_KEY:
1512                 dev_info(&h->pdev->dev,
1513                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1514                         h->scsi_host->host_no,
1515                         sd->bus, sd->target, sd->lun);
1516                 break;
1517         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1518                 dev_info(&h->pdev->dev,
1519                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1520                         h->scsi_host->host_no,
1521                         sd->bus, sd->target, sd->lun);
1522                 break;
1523         case HPSA_LV_UNDERGOING_ENCRYPTION:
1524                 dev_info(&h->pdev->dev,
1525                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1526                         h->scsi_host->host_no,
1527                         sd->bus, sd->target, sd->lun);
1528                 break;
1529         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1530                 dev_info(&h->pdev->dev,
1531                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1532                         h->scsi_host->host_no,
1533                         sd->bus, sd->target, sd->lun);
1534                 break;
1535         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1536                 dev_info(&h->pdev->dev,
1537                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1538                         h->scsi_host->host_no,
1539                         sd->bus, sd->target, sd->lun);
1540                 break;
1541         case HPSA_LV_PENDING_ENCRYPTION:
1542                 dev_info(&h->pdev->dev,
1543                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1544                         h->scsi_host->host_no,
1545                         sd->bus, sd->target, sd->lun);
1546                 break;
1547         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1548                 dev_info(&h->pdev->dev,
1549                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1550                         h->scsi_host->host_no,
1551                         sd->bus, sd->target, sd->lun);
1552                 break;
1553         }
1554 }
1555
1556 /*
1557  * Figure the list of physical drive pointers for a logical drive with
1558  * raid offload configured.
1559  */
1560 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1561                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1562                                 struct hpsa_scsi_dev_t *logical_drive)
1563 {
1564         struct raid_map_data *map = &logical_drive->raid_map;
1565         struct raid_map_disk_data *dd = &map->data[0];
1566         int i, j;
1567         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1568                                 le16_to_cpu(map->metadata_disks_per_row);
1569         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1570                                 le16_to_cpu(map->layout_map_count) *
1571                                 total_disks_per_row;
1572         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1573                                 total_disks_per_row;
1574         int qdepth;
1575
1576         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1577                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1578
1579         logical_drive->nphysical_disks = nraid_map_entries;
1580
1581         qdepth = 0;
1582         for (i = 0; i < nraid_map_entries; i++) {
1583                 logical_drive->phys_disk[i] = NULL;
1584                 if (!logical_drive->offload_config)
1585                         continue;
1586                 for (j = 0; j < ndevices; j++) {
1587                         if (dev[j] == NULL)
1588                                 continue;
1589                         if (dev[j]->devtype != TYPE_DISK)
1590                                 continue;
1591                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1592                                 continue;
1593                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1594                                 continue;
1595
1596                         logical_drive->phys_disk[i] = dev[j];
1597                         if (i < nphys_disk)
1598                                 qdepth = min(h->nr_cmds, qdepth +
1599                                     logical_drive->phys_disk[i]->queue_depth);
1600                         break;
1601                 }
1602
1603                 /*
1604                  * This can happen if a physical drive is removed and
1605                  * the logical drive is degraded.  In that case, the RAID
1606                  * map data will refer to a physical disk which isn't actually
1607                  * present.  And in that case offload_enabled should already
1608                  * be 0, but we'll turn it off here just in case
1609                  */
1610                 if (!logical_drive->phys_disk[i]) {
1611                         logical_drive->offload_enabled = 0;
1612                         logical_drive->offload_to_be_enabled = 0;
1613                         logical_drive->queue_depth = 8;
1614                 }
1615         }
1616         if (nraid_map_entries)
1617                 /*
1618                  * This is correct for reads, too high for full stripe writes,
1619                  * way too high for partial stripe writes
1620                  */
1621                 logical_drive->queue_depth = qdepth;
1622         else
1623                 logical_drive->queue_depth = h->nr_cmds;
1624 }
1625
1626 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1627                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1628 {
1629         int i;
1630
1631         for (i = 0; i < ndevices; i++) {
1632                 if (dev[i] == NULL)
1633                         continue;
1634                 if (dev[i]->devtype != TYPE_DISK)
1635                         continue;
1636                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1637                         continue;
1638
1639                 /*
1640                  * If offload is currently enabled, the RAID map and
1641                  * phys_disk[] assignment *better* not be changing
1642                  * and since it isn't changing, we do not need to
1643                  * update it.
1644                  */
1645                 if (dev[i]->offload_enabled)
1646                         continue;
1647
1648                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1649         }
1650 }
1651
1652 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1653         struct hpsa_scsi_dev_t *sd[], int nsds)
1654 {
1655         /* sd contains scsi3 addresses and devtypes, and inquiry
1656          * data.  This function takes what's in sd to be the current
1657          * reality and updates h->dev[] to reflect that reality.
1658          */
1659         int i, entry, device_change, changes = 0;
1660         struct hpsa_scsi_dev_t *csd;
1661         unsigned long flags;
1662         struct hpsa_scsi_dev_t **added, **removed;
1663         int nadded, nremoved;
1664         struct Scsi_Host *sh = NULL;
1665
1666         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1667         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1668
1669         if (!added || !removed) {
1670                 dev_warn(&h->pdev->dev, "out of memory in "
1671                         "adjust_hpsa_scsi_table\n");
1672                 goto free_and_out;
1673         }
1674
1675         spin_lock_irqsave(&h->devlock, flags);
1676
1677         /* find any devices in h->dev[] that are not in
1678          * sd[] and remove them from h->dev[], and for any
1679          * devices which have changed, remove the old device
1680          * info and add the new device info.
1681          * If minor device attributes change, just update
1682          * the existing device structure.
1683          */
1684         i = 0;
1685         nremoved = 0;
1686         nadded = 0;
1687         while (i < h->ndevices) {
1688                 csd = h->dev[i];
1689                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1690                 if (device_change == DEVICE_NOT_FOUND) {
1691                         changes++;
1692                         hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1693                         continue; /* remove ^^^, hence i not incremented */
1694                 } else if (device_change == DEVICE_CHANGED) {
1695                         changes++;
1696                         hpsa_scsi_replace_entry(h, i, sd[entry],
1697                                 added, &nadded, removed, &nremoved);
1698                         /* Set it to NULL to prevent it from being freed
1699                          * at the bottom of hpsa_update_scsi_devices()
1700                          */
1701                         sd[entry] = NULL;
1702                 } else if (device_change == DEVICE_UPDATED) {
1703                         hpsa_scsi_update_entry(h, i, sd[entry]);
1704                 }
1705                 i++;
1706         }
1707
1708         /* Now, make sure every device listed in sd[] is also
1709          * listed in h->dev[], adding them if they aren't found
1710          */
1711
1712         for (i = 0; i < nsds; i++) {
1713                 if (!sd[i]) /* if already added above. */
1714                         continue;
1715
1716                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1717                  * as the SCSI mid-layer does not handle such devices well.
1718                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1719                  * at 160Hz, and prevents the system from coming up.
1720                  */
1721                 if (sd[i]->volume_offline) {
1722                         hpsa_show_volume_status(h, sd[i]);
1723                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1724                         continue;
1725                 }
1726
1727                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1728                                         h->ndevices, &entry);
1729                 if (device_change == DEVICE_NOT_FOUND) {
1730                         changes++;
1731                         if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1732                                 break;
1733                         sd[i] = NULL; /* prevent from being freed later. */
1734                 } else if (device_change == DEVICE_CHANGED) {
1735                         /* should never happen... */
1736                         changes++;
1737                         dev_warn(&h->pdev->dev,
1738                                 "device unexpectedly changed.\n");
1739                         /* but if it does happen, we just ignore that device */
1740                 }
1741         }
1742         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1743
1744         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1745          * any logical drives that need it enabled.
1746          */
1747         for (i = 0; i < h->ndevices; i++) {
1748                 if (h->dev[i] == NULL)
1749                         continue;
1750                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1751         }
1752
1753         spin_unlock_irqrestore(&h->devlock, flags);
1754
1755         /* Monitor devices which are in one of several NOT READY states to be
1756          * brought online later. This must be done without holding h->devlock,
1757          * so don't touch h->dev[]
1758          */
1759         for (i = 0; i < nsds; i++) {
1760                 if (!sd[i]) /* if already added above. */
1761                         continue;
1762                 if (sd[i]->volume_offline)
1763                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1764         }
1765
1766         /* Don't notify scsi mid layer of any changes the first time through
1767          * (or if there are no changes) scsi_scan_host will do it later the
1768          * first time through.
1769          */
1770         if (!changes)
1771                 goto free_and_out;
1772
1773         sh = h->scsi_host;
1774         /* Notify scsi mid layer of any removed devices */
1775         for (i = 0; i < nremoved; i++) {
1776                 if (removed[i] == NULL)
1777                         continue;
1778                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1779                         struct scsi_device *sdev =
1780                                 scsi_device_lookup(sh, removed[i]->bus,
1781                                         removed[i]->target, removed[i]->lun);
1782                         if (sdev != NULL) {
1783                                 scsi_remove_device(sdev);
1784                                 scsi_device_put(sdev);
1785                         } else {
1786                                 /*
1787                                  * We don't expect to get here.
1788                                  * future cmds to this device will get selection
1789                                  * timeout as if the device was gone.
1790                                  */
1791                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1792                                         "didn't find device for removal.");
1793                         }
1794                 }
1795                 kfree(removed[i]);
1796                 removed[i] = NULL;
1797         }
1798
1799         /* Notify scsi mid layer of any added devices */
1800         for (i = 0; i < nadded; i++) {
1801                 if (added[i] == NULL)
1802                         continue;
1803                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1804                         continue;
1805                 if (scsi_add_device(sh, added[i]->bus,
1806                         added[i]->target, added[i]->lun) == 0)
1807                         continue;
1808                 dev_warn(&h->pdev->dev, "addition failed, device not added.");
1809                 /* now we have to remove it from h->dev,
1810                  * since it didn't get added to scsi mid layer
1811                  */
1812                 fixup_botched_add(h, added[i]);
1813                 h->drv_req_rescan = 1;
1814         }
1815
1816 free_and_out:
1817         kfree(added);
1818         kfree(removed);
1819 }
1820
1821 /*
1822  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1823  * Assume's h->devlock is held.
1824  */
1825 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1826         int bus, int target, int lun)
1827 {
1828         int i;
1829         struct hpsa_scsi_dev_t *sd;
1830
1831         for (i = 0; i < h->ndevices; i++) {
1832                 sd = h->dev[i];
1833                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1834                         return sd;
1835         }
1836         return NULL;
1837 }
1838
1839 static int hpsa_slave_alloc(struct scsi_device *sdev)
1840 {
1841         struct hpsa_scsi_dev_t *sd;
1842         unsigned long flags;
1843         struct ctlr_info *h;
1844
1845         h = sdev_to_hba(sdev);
1846         spin_lock_irqsave(&h->devlock, flags);
1847         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1848                 sdev_id(sdev), sdev->lun);
1849         if (likely(sd)) {
1850                 atomic_set(&sd->ioaccel_cmds_out, 0);
1851                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1852         } else
1853                 sdev->hostdata = NULL;
1854         spin_unlock_irqrestore(&h->devlock, flags);
1855         return 0;
1856 }
1857
1858 /* configure scsi device based on internal per-device structure */
1859 static int hpsa_slave_configure(struct scsi_device *sdev)
1860 {
1861         struct hpsa_scsi_dev_t *sd;
1862         int queue_depth;
1863
1864         sd = sdev->hostdata;
1865         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1866
1867         if (sd)
1868                 queue_depth = sd->queue_depth != 0 ?
1869                         sd->queue_depth : sdev->host->can_queue;
1870         else
1871                 queue_depth = sdev->host->can_queue;
1872
1873         scsi_change_queue_depth(sdev, queue_depth);
1874
1875         return 0;
1876 }
1877
1878 static void hpsa_slave_destroy(struct scsi_device *sdev)
1879 {
1880         /* nothing to do. */
1881 }
1882
1883 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1884 {
1885         int i;
1886
1887         if (!h->ioaccel2_cmd_sg_list)
1888                 return;
1889         for (i = 0; i < h->nr_cmds; i++) {
1890                 kfree(h->ioaccel2_cmd_sg_list[i]);
1891                 h->ioaccel2_cmd_sg_list[i] = NULL;
1892         }
1893         kfree(h->ioaccel2_cmd_sg_list);
1894         h->ioaccel2_cmd_sg_list = NULL;
1895 }
1896
1897 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1898 {
1899         int i;
1900
1901         if (h->chainsize <= 0)
1902                 return 0;
1903
1904         h->ioaccel2_cmd_sg_list =
1905                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1906                                         GFP_KERNEL);
1907         if (!h->ioaccel2_cmd_sg_list)
1908                 return -ENOMEM;
1909         for (i = 0; i < h->nr_cmds; i++) {
1910                 h->ioaccel2_cmd_sg_list[i] =
1911                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1912                                         h->maxsgentries, GFP_KERNEL);
1913                 if (!h->ioaccel2_cmd_sg_list[i])
1914                         goto clean;
1915         }
1916         return 0;
1917
1918 clean:
1919         hpsa_free_ioaccel2_sg_chain_blocks(h);
1920         return -ENOMEM;
1921 }
1922
1923 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1924 {
1925         int i;
1926
1927         if (!h->cmd_sg_list)
1928                 return;
1929         for (i = 0; i < h->nr_cmds; i++) {
1930                 kfree(h->cmd_sg_list[i]);
1931                 h->cmd_sg_list[i] = NULL;
1932         }
1933         kfree(h->cmd_sg_list);
1934         h->cmd_sg_list = NULL;
1935 }
1936
1937 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
1938 {
1939         int i;
1940
1941         if (h->chainsize <= 0)
1942                 return 0;
1943
1944         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1945                                 GFP_KERNEL);
1946         if (!h->cmd_sg_list) {
1947                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1948                 return -ENOMEM;
1949         }
1950         for (i = 0; i < h->nr_cmds; i++) {
1951                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1952                                                 h->chainsize, GFP_KERNEL);
1953                 if (!h->cmd_sg_list[i]) {
1954                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1955                         goto clean;
1956                 }
1957         }
1958         return 0;
1959
1960 clean:
1961         hpsa_free_sg_chain_blocks(h);
1962         return -ENOMEM;
1963 }
1964
1965 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
1966         struct io_accel2_cmd *cp, struct CommandList *c)
1967 {
1968         struct ioaccel2_sg_element *chain_block;
1969         u64 temp64;
1970         u32 chain_size;
1971
1972         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
1973         chain_size = le32_to_cpu(cp->data_len);
1974         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
1975                                 PCI_DMA_TODEVICE);
1976         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1977                 /* prevent subsequent unmapping */
1978                 cp->sg->address = 0;
1979                 return -1;
1980         }
1981         cp->sg->address = cpu_to_le64(temp64);
1982         return 0;
1983 }
1984
1985 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
1986         struct io_accel2_cmd *cp)
1987 {
1988         struct ioaccel2_sg_element *chain_sg;
1989         u64 temp64;
1990         u32 chain_size;
1991
1992         chain_sg = cp->sg;
1993         temp64 = le64_to_cpu(chain_sg->address);
1994         chain_size = le32_to_cpu(cp->data_len);
1995         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
1996 }
1997
1998 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1999         struct CommandList *c)
2000 {
2001         struct SGDescriptor *chain_sg, *chain_block;
2002         u64 temp64;
2003         u32 chain_len;
2004
2005         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2006         chain_block = h->cmd_sg_list[c->cmdindex];
2007         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2008         chain_len = sizeof(*chain_sg) *
2009                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2010         chain_sg->Len = cpu_to_le32(chain_len);
2011         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2012                                 PCI_DMA_TODEVICE);
2013         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2014                 /* prevent subsequent unmapping */
2015                 chain_sg->Addr = cpu_to_le64(0);
2016                 return -1;
2017         }
2018         chain_sg->Addr = cpu_to_le64(temp64);
2019         return 0;
2020 }
2021
2022 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2023         struct CommandList *c)
2024 {
2025         struct SGDescriptor *chain_sg;
2026
2027         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2028                 return;
2029
2030         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2031         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2032                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2033 }
2034
2035
2036 /* Decode the various types of errors on ioaccel2 path.
2037  * Return 1 for any error that should generate a RAID path retry.
2038  * Return 0 for errors that don't require a RAID path retry.
2039  */
2040 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2041                                         struct CommandList *c,
2042                                         struct scsi_cmnd *cmd,
2043                                         struct io_accel2_cmd *c2)
2044 {
2045         int data_len;
2046         int retry = 0;
2047         u32 ioaccel2_resid = 0;
2048
2049         switch (c2->error_data.serv_response) {
2050         case IOACCEL2_SERV_RESPONSE_COMPLETE:
2051                 switch (c2->error_data.status) {
2052                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2053                         break;
2054                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2055                         cmd->result |= SAM_STAT_CHECK_CONDITION;
2056                         if (c2->error_data.data_present !=
2057                                         IOACCEL2_SENSE_DATA_PRESENT) {
2058                                 memset(cmd->sense_buffer, 0,
2059                                         SCSI_SENSE_BUFFERSIZE);
2060                                 break;
2061                         }
2062                         /* copy the sense data */
2063                         data_len = c2->error_data.sense_data_len;
2064                         if (data_len > SCSI_SENSE_BUFFERSIZE)
2065                                 data_len = SCSI_SENSE_BUFFERSIZE;
2066                         if (data_len > sizeof(c2->error_data.sense_data_buff))
2067                                 data_len =
2068                                         sizeof(c2->error_data.sense_data_buff);
2069                         memcpy(cmd->sense_buffer,
2070                                 c2->error_data.sense_data_buff, data_len);
2071                         retry = 1;
2072                         break;
2073                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2074                         retry = 1;
2075                         break;
2076                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2077                         retry = 1;
2078                         break;
2079                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2080                         retry = 1;
2081                         break;
2082                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2083                         retry = 1;
2084                         break;
2085                 default:
2086                         retry = 1;
2087                         break;
2088                 }
2089                 break;
2090         case IOACCEL2_SERV_RESPONSE_FAILURE:
2091                 switch (c2->error_data.status) {
2092                 case IOACCEL2_STATUS_SR_IO_ERROR:
2093                 case IOACCEL2_STATUS_SR_IO_ABORTED:
2094                 case IOACCEL2_STATUS_SR_OVERRUN:
2095                         retry = 1;
2096                         break;
2097                 case IOACCEL2_STATUS_SR_UNDERRUN:
2098                         cmd->result = (DID_OK << 16);           /* host byte */
2099                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2100                         ioaccel2_resid = get_unaligned_le32(
2101                                                 &c2->error_data.resid_cnt[0]);
2102                         scsi_set_resid(cmd, ioaccel2_resid);
2103                         break;
2104                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2105                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2106                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2107                         /* We will get an event from ctlr to trigger rescan */
2108                         retry = 1;
2109                         break;
2110                 default:
2111                         retry = 1;
2112                 }
2113                 break;
2114         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2115                 break;
2116         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2117                 break;
2118         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2119                 retry = 1;
2120                 break;
2121         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2122                 break;
2123         default:
2124                 retry = 1;
2125                 break;
2126         }
2127
2128         return retry;   /* retry on raid path? */
2129 }
2130
2131 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2132                 struct CommandList *c)
2133 {
2134         bool do_wake = false;
2135
2136         /*
2137          * Prevent the following race in the abort handler:
2138          *
2139          * 1. LLD is requested to abort a SCSI command
2140          * 2. The SCSI command completes
2141          * 3. The struct CommandList associated with step 2 is made available
2142          * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2143          * 5. Abort handler follows scsi_cmnd->host_scribble and
2144          *    finds struct CommandList and tries to aborts it
2145          * Now we have aborted the wrong command.
2146          *
2147          * Reset c->scsi_cmd here so that the abort or reset handler will know
2148          * this command has completed.  Then, check to see if the handler is
2149          * waiting for this command, and, if so, wake it.
2150          */
2151         c->scsi_cmd = SCSI_CMD_IDLE;
2152         mb();   /* Declare command idle before checking for pending events. */
2153         if (c->abort_pending) {
2154                 do_wake = true;
2155                 c->abort_pending = false;
2156         }
2157         if (c->reset_pending) {
2158                 unsigned long flags;
2159                 struct hpsa_scsi_dev_t *dev;
2160
2161                 /*
2162                  * There appears to be a reset pending; lock the lock and
2163                  * reconfirm.  If so, then decrement the count of outstanding
2164                  * commands and wake the reset command if this is the last one.
2165                  */
2166                 spin_lock_irqsave(&h->lock, flags);
2167                 dev = c->reset_pending;         /* Re-fetch under the lock. */
2168                 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2169                         do_wake = true;
2170                 c->reset_pending = NULL;
2171                 spin_unlock_irqrestore(&h->lock, flags);
2172         }
2173
2174         if (do_wake)
2175                 wake_up_all(&h->event_sync_wait_queue);
2176 }
2177
2178 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2179                                       struct CommandList *c)
2180 {
2181         hpsa_cmd_resolve_events(h, c);
2182         cmd_tagged_free(h, c);
2183 }
2184
2185 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2186                 struct CommandList *c, struct scsi_cmnd *cmd)
2187 {
2188         hpsa_cmd_resolve_and_free(h, c);
2189         cmd->scsi_done(cmd);
2190 }
2191
2192 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2193 {
2194         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2195         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2196 }
2197
2198 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2199 {
2200         cmd->result = DID_ABORT << 16;
2201 }
2202
2203 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2204                                     struct scsi_cmnd *cmd)
2205 {
2206         hpsa_set_scsi_cmd_aborted(cmd);
2207         dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2208                          c->Request.CDB, c->err_info->ScsiStatus);
2209         hpsa_cmd_resolve_and_free(h, c);
2210 }
2211
2212 static void process_ioaccel2_completion(struct ctlr_info *h,
2213                 struct CommandList *c, struct scsi_cmnd *cmd,
2214                 struct hpsa_scsi_dev_t *dev)
2215 {
2216         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2217
2218         /* check for good status */
2219         if (likely(c2->error_data.serv_response == 0 &&
2220                         c2->error_data.status == 0))
2221                 return hpsa_cmd_free_and_done(h, c, cmd);
2222
2223         /*
2224          * Any RAID offload error results in retry which will use
2225          * the normal I/O path so the controller can handle whatever's
2226          * wrong.
2227          */
2228         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
2229                 c2->error_data.serv_response ==
2230                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2231                 if (c2->error_data.status ==
2232                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2233                         dev->offload_enabled = 0;
2234
2235                 return hpsa_retry_cmd(h, c);
2236         }
2237
2238         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2239                 return hpsa_retry_cmd(h, c);
2240
2241         return hpsa_cmd_free_and_done(h, c, cmd);
2242 }
2243
2244 /* Returns 0 on success, < 0 otherwise. */
2245 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2246                                         struct CommandList *cp)
2247 {
2248         u8 tmf_status = cp->err_info->ScsiStatus;
2249
2250         switch (tmf_status) {
2251         case CISS_TMF_COMPLETE:
2252                 /*
2253                  * CISS_TMF_COMPLETE never happens, instead,
2254                  * ei->CommandStatus == 0 for this case.
2255                  */
2256         case CISS_TMF_SUCCESS:
2257                 return 0;
2258         case CISS_TMF_INVALID_FRAME:
2259         case CISS_TMF_NOT_SUPPORTED:
2260         case CISS_TMF_FAILED:
2261         case CISS_TMF_WRONG_LUN:
2262         case CISS_TMF_OVERLAPPED_TAG:
2263                 break;
2264         default:
2265                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2266                                 tmf_status);
2267                 break;
2268         }
2269         return -tmf_status;
2270 }
2271
2272 static void complete_scsi_command(struct CommandList *cp)
2273 {
2274         struct scsi_cmnd *cmd;
2275         struct ctlr_info *h;
2276         struct ErrorInfo *ei;
2277         struct hpsa_scsi_dev_t *dev;
2278         struct io_accel2_cmd *c2;
2279
2280         u8 sense_key;
2281         u8 asc;      /* additional sense code */
2282         u8 ascq;     /* additional sense code qualifier */
2283         unsigned long sense_data_size;
2284
2285         ei = cp->err_info;
2286         cmd = cp->scsi_cmd;
2287         h = cp->h;
2288         dev = cmd->device->hostdata;
2289         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2290
2291         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2292         if ((cp->cmd_type == CMD_SCSI) &&
2293                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2294                 hpsa_unmap_sg_chain_block(h, cp);
2295
2296         if ((cp->cmd_type == CMD_IOACCEL2) &&
2297                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2298                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2299
2300         cmd->result = (DID_OK << 16);           /* host byte */
2301         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2302
2303         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2304                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2305
2306         /*
2307          * We check for lockup status here as it may be set for
2308          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2309          * fail_all_oustanding_cmds()
2310          */
2311         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2312                 /* DID_NO_CONNECT will prevent a retry */
2313                 cmd->result = DID_NO_CONNECT << 16;
2314                 return hpsa_cmd_free_and_done(h, cp, cmd);
2315         }
2316
2317         if ((unlikely(hpsa_is_pending_event(cp)))) {
2318                 if (cp->reset_pending)
2319                         return hpsa_cmd_resolve_and_free(h, cp);
2320                 if (cp->abort_pending)
2321                         return hpsa_cmd_abort_and_free(h, cp, cmd);
2322         }
2323
2324         if (cp->cmd_type == CMD_IOACCEL2)
2325                 return process_ioaccel2_completion(h, cp, cmd, dev);
2326
2327         scsi_set_resid(cmd, ei->ResidualCnt);
2328         if (ei->CommandStatus == 0)
2329                 return hpsa_cmd_free_and_done(h, cp, cmd);
2330
2331         /* For I/O accelerator commands, copy over some fields to the normal
2332          * CISS header used below for error handling.
2333          */
2334         if (cp->cmd_type == CMD_IOACCEL1) {
2335                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2336                 cp->Header.SGList = scsi_sg_count(cmd);
2337                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2338                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2339                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2340                 cp->Header.tag = c->tag;
2341                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2342                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2343
2344                 /* Any RAID offload error results in retry which will use
2345                  * the normal I/O path so the controller can handle whatever's
2346                  * wrong.
2347                  */
2348                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2349                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2350                                 dev->offload_enabled = 0;
2351                         return hpsa_retry_cmd(h, cp);
2352                 }
2353         }
2354
2355         /* an error has occurred */
2356         switch (ei->CommandStatus) {
2357
2358         case CMD_TARGET_STATUS:
2359                 cmd->result |= ei->ScsiStatus;
2360                 /* copy the sense data */
2361                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2362                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2363                 else
2364                         sense_data_size = sizeof(ei->SenseInfo);
2365                 if (ei->SenseLen < sense_data_size)
2366                         sense_data_size = ei->SenseLen;
2367                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2368                 if (ei->ScsiStatus)
2369                         decode_sense_data(ei->SenseInfo, sense_data_size,
2370                                 &sense_key, &asc, &ascq);
2371                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2372                         if (sense_key == ABORTED_COMMAND) {
2373                                 cmd->result |= DID_SOFT_ERROR << 16;
2374                                 break;
2375                         }
2376                         break;
2377                 }
2378                 /* Problem was not a check condition
2379                  * Pass it up to the upper layers...
2380                  */
2381                 if (ei->ScsiStatus) {
2382                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2383                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2384                                 "Returning result: 0x%x\n",
2385                                 cp, ei->ScsiStatus,
2386                                 sense_key, asc, ascq,
2387                                 cmd->result);
2388                 } else {  /* scsi status is zero??? How??? */
2389                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2390                                 "Returning no connection.\n", cp),
2391
2392                         /* Ordinarily, this case should never happen,
2393                          * but there is a bug in some released firmware
2394                          * revisions that allows it to happen if, for
2395                          * example, a 4100 backplane loses power and
2396                          * the tape drive is in it.  We assume that
2397                          * it's a fatal error of some kind because we
2398                          * can't show that it wasn't. We will make it
2399                          * look like selection timeout since that is
2400                          * the most common reason for this to occur,
2401                          * and it's severe enough.
2402                          */
2403
2404                         cmd->result = DID_NO_CONNECT << 16;
2405                 }
2406                 break;
2407
2408         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2409                 break;
2410         case CMD_DATA_OVERRUN:
2411                 dev_warn(&h->pdev->dev,
2412                         "CDB %16phN data overrun\n", cp->Request.CDB);
2413                 break;
2414         case CMD_INVALID: {
2415                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2416                 print_cmd(cp); */
2417                 /* We get CMD_INVALID if you address a non-existent device
2418                  * instead of a selection timeout (no response).  You will
2419                  * see this if you yank out a drive, then try to access it.
2420                  * This is kind of a shame because it means that any other
2421                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2422                  * missing target. */
2423                 cmd->result = DID_NO_CONNECT << 16;
2424         }
2425                 break;
2426         case CMD_PROTOCOL_ERR:
2427                 cmd->result = DID_ERROR << 16;
2428                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2429                                 cp->Request.CDB);
2430                 break;
2431         case CMD_HARDWARE_ERR:
2432                 cmd->result = DID_ERROR << 16;
2433                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2434                         cp->Request.CDB);
2435                 break;
2436         case CMD_CONNECTION_LOST:
2437                 cmd->result = DID_ERROR << 16;
2438                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2439                         cp->Request.CDB);
2440                 break;
2441         case CMD_ABORTED:
2442                 /* Return now to avoid calling scsi_done(). */
2443                 return hpsa_cmd_abort_and_free(h, cp, cmd);
2444         case CMD_ABORT_FAILED:
2445                 cmd->result = DID_ERROR << 16;
2446                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2447                         cp->Request.CDB);
2448                 break;
2449         case CMD_UNSOLICITED_ABORT:
2450                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2451                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2452                         cp->Request.CDB);
2453                 break;
2454         case CMD_TIMEOUT:
2455                 cmd->result = DID_TIME_OUT << 16;
2456                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2457                         cp->Request.CDB);
2458                 break;
2459         case CMD_UNABORTABLE:
2460                 cmd->result = DID_ERROR << 16;
2461                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2462                 break;
2463         case CMD_TMF_STATUS:
2464                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2465                         cmd->result = DID_ERROR << 16;
2466                 break;
2467         case CMD_IOACCEL_DISABLED:
2468                 /* This only handles the direct pass-through case since RAID
2469                  * offload is handled above.  Just attempt a retry.
2470                  */
2471                 cmd->result = DID_SOFT_ERROR << 16;
2472                 dev_warn(&h->pdev->dev,
2473                                 "cp %p had HP SSD Smart Path error\n", cp);
2474                 break;
2475         default:
2476                 cmd->result = DID_ERROR << 16;
2477                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2478                                 cp, ei->CommandStatus);
2479         }
2480
2481         return hpsa_cmd_free_and_done(h, cp, cmd);
2482 }
2483
2484 static void hpsa_pci_unmap(struct pci_dev *pdev,
2485         struct CommandList *c, int sg_used, int data_direction)
2486 {
2487         int i;
2488
2489         for (i = 0; i < sg_used; i++)
2490                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2491                                 le32_to_cpu(c->SG[i].Len),
2492                                 data_direction);
2493 }
2494
2495 static int hpsa_map_one(struct pci_dev *pdev,
2496                 struct CommandList *cp,
2497                 unsigned char *buf,
2498                 size_t buflen,
2499                 int data_direction)
2500 {
2501         u64 addr64;
2502
2503         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2504                 cp->Header.SGList = 0;
2505                 cp->Header.SGTotal = cpu_to_le16(0);
2506                 return 0;
2507         }
2508
2509         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2510         if (dma_mapping_error(&pdev->dev, addr64)) {
2511                 /* Prevent subsequent unmap of something never mapped */
2512                 cp->Header.SGList = 0;
2513                 cp->Header.SGTotal = cpu_to_le16(0);
2514                 return -1;
2515         }
2516         cp->SG[0].Addr = cpu_to_le64(addr64);
2517         cp->SG[0].Len = cpu_to_le32(buflen);
2518         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2519         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2520         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2521         return 0;
2522 }
2523
2524 #define NO_TIMEOUT ((unsigned long) -1)
2525 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2526 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2527         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2528 {
2529         DECLARE_COMPLETION_ONSTACK(wait);
2530
2531         c->waiting = &wait;
2532         __enqueue_cmd_and_start_io(h, c, reply_queue);
2533         if (timeout_msecs == NO_TIMEOUT) {
2534                 /* TODO: get rid of this no-timeout thing */
2535                 wait_for_completion_io(&wait);
2536                 return IO_OK;
2537         }
2538         if (!wait_for_completion_io_timeout(&wait,
2539                                         msecs_to_jiffies(timeout_msecs))) {
2540                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2541                 return -ETIMEDOUT;
2542         }
2543         return IO_OK;
2544 }
2545
2546 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2547                                    int reply_queue, unsigned long timeout_msecs)
2548 {
2549         if (unlikely(lockup_detected(h))) {
2550                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2551                 return IO_OK;
2552         }
2553         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2554 }
2555
2556 static u32 lockup_detected(struct ctlr_info *h)
2557 {
2558         int cpu;
2559         u32 rc, *lockup_detected;
2560
2561         cpu = get_cpu();
2562         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2563         rc = *lockup_detected;
2564         put_cpu();
2565         return rc;
2566 }
2567
2568 #define MAX_DRIVER_CMD_RETRIES 25
2569 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2570         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2571 {
2572         int backoff_time = 10, retry_count = 0;
2573         int rc;
2574
2575         do {
2576                 memset(c->err_info, 0, sizeof(*c->err_info));
2577                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2578                                                   timeout_msecs);
2579                 if (rc)
2580                         break;
2581                 retry_count++;
2582                 if (retry_count > 3) {
2583                         msleep(backoff_time);
2584                         if (backoff_time < 1000)
2585                                 backoff_time *= 2;
2586                 }
2587         } while ((check_for_unit_attention(h, c) ||
2588                         check_for_busy(h, c)) &&
2589                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2590         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2591         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2592                 rc = -EIO;
2593         return rc;
2594 }
2595
2596 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2597                                 struct CommandList *c)
2598 {
2599         const u8 *cdb = c->Request.CDB;
2600         const u8 *lun = c->Header.LUN.LunAddrBytes;
2601
2602         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2603         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2604                 txt, lun[0], lun[1], lun[2], lun[3],
2605                 lun[4], lun[5], lun[6], lun[7],
2606                 cdb[0], cdb[1], cdb[2], cdb[3],
2607                 cdb[4], cdb[5], cdb[6], cdb[7],
2608                 cdb[8], cdb[9], cdb[10], cdb[11],
2609                 cdb[12], cdb[13], cdb[14], cdb[15]);
2610 }
2611
2612 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2613                         struct CommandList *cp)
2614 {
2615         const struct ErrorInfo *ei = cp->err_info;
2616         struct device *d = &cp->h->pdev->dev;
2617         u8 sense_key, asc, ascq;
2618         int sense_len;
2619
2620         switch (ei->CommandStatus) {
2621         case CMD_TARGET_STATUS:
2622                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2623                         sense_len = sizeof(ei->SenseInfo);
2624                 else
2625                         sense_len = ei->SenseLen;
2626                 decode_sense_data(ei->SenseInfo, sense_len,
2627                                         &sense_key, &asc, &ascq);
2628                 hpsa_print_cmd(h, "SCSI status", cp);
2629                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2630                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2631                                 sense_key, asc, ascq);
2632                 else
2633                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2634                 if (ei->ScsiStatus == 0)
2635                         dev_warn(d, "SCSI status is abnormally zero.  "
2636                         "(probably indicates selection timeout "
2637                         "reported incorrectly due to a known "
2638                         "firmware bug, circa July, 2001.)\n");
2639                 break;
2640         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2641                 break;
2642         case CMD_DATA_OVERRUN:
2643                 hpsa_print_cmd(h, "overrun condition", cp);
2644                 break;
2645         case CMD_INVALID: {
2646                 /* controller unfortunately reports SCSI passthru's
2647                  * to non-existent targets as invalid commands.
2648                  */
2649                 hpsa_print_cmd(h, "invalid command", cp);
2650                 dev_warn(d, "probably means device no longer present\n");
2651                 }
2652                 break;
2653         case CMD_PROTOCOL_ERR:
2654                 hpsa_print_cmd(h, "protocol error", cp);
2655                 break;
2656         case CMD_HARDWARE_ERR:
2657                 hpsa_print_cmd(h, "hardware error", cp);
2658                 break;
2659         case CMD_CONNECTION_LOST:
2660                 hpsa_print_cmd(h, "connection lost", cp);
2661                 break;
2662         case CMD_ABORTED:
2663                 hpsa_print_cmd(h, "aborted", cp);
2664                 break;
2665         case CMD_ABORT_FAILED:
2666                 hpsa_print_cmd(h, "abort failed", cp);
2667                 break;
2668         case CMD_UNSOLICITED_ABORT:
2669                 hpsa_print_cmd(h, "unsolicited abort", cp);
2670                 break;
2671         case CMD_TIMEOUT:
2672                 hpsa_print_cmd(h, "timed out", cp);
2673                 break;
2674         case CMD_UNABORTABLE:
2675                 hpsa_print_cmd(h, "unabortable", cp);
2676                 break;
2677         case CMD_CTLR_LOCKUP:
2678                 hpsa_print_cmd(h, "controller lockup detected", cp);
2679                 break;
2680         default:
2681                 hpsa_print_cmd(h, "unknown status", cp);
2682                 dev_warn(d, "Unknown command status %x\n",
2683                                 ei->CommandStatus);
2684         }
2685 }
2686
2687 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2688                         u16 page, unsigned char *buf,
2689                         unsigned char bufsize)
2690 {
2691         int rc = IO_OK;
2692         struct CommandList *c;
2693         struct ErrorInfo *ei;
2694
2695         c = cmd_alloc(h);
2696
2697         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2698                         page, scsi3addr, TYPE_CMD)) {
2699                 rc = -1;
2700                 goto out;
2701         }
2702         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2703                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2704         if (rc)
2705                 goto out;
2706         ei = c->err_info;
2707         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2708                 hpsa_scsi_interpret_error(h, c);
2709                 rc = -1;
2710         }
2711 out:
2712         cmd_free(h, c);
2713         return rc;
2714 }
2715
2716 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2717         u8 reset_type, int reply_queue)
2718 {
2719         int rc = IO_OK;
2720         struct CommandList *c;
2721         struct ErrorInfo *ei;
2722
2723         c = cmd_alloc(h);
2724
2725
2726         /* fill_cmd can't fail here, no data buffer to map. */
2727         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2728                         scsi3addr, TYPE_MSG);
2729         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2730         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2731         if (rc) {
2732                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2733                 goto out;
2734         }
2735         /* no unmap needed here because no data xfer. */
2736
2737         ei = c->err_info;
2738         if (ei->CommandStatus != 0) {
2739                 hpsa_scsi_interpret_error(h, c);
2740                 rc = -1;
2741         }
2742 out:
2743         cmd_free(h, c);
2744         return rc;
2745 }
2746
2747 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2748                                struct hpsa_scsi_dev_t *dev,
2749                                unsigned char *scsi3addr)
2750 {
2751         int i;
2752         bool match = false;
2753         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2754         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2755
2756         if (hpsa_is_cmd_idle(c))
2757                 return false;
2758
2759         switch (c->cmd_type) {
2760         case CMD_SCSI:
2761         case CMD_IOCTL_PEND:
2762                 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2763                                 sizeof(c->Header.LUN.LunAddrBytes));
2764                 break;
2765
2766         case CMD_IOACCEL1:
2767         case CMD_IOACCEL2:
2768                 if (c->phys_disk == dev) {
2769                         /* HBA mode match */
2770                         match = true;
2771                 } else {
2772                         /* Possible RAID mode -- check each phys dev. */
2773                         /* FIXME:  Do we need to take out a lock here?  If
2774                          * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2775                          * instead. */
2776                         for (i = 0; i < dev->nphysical_disks && !match; i++) {
2777                                 /* FIXME: an alternate test might be
2778                                  *
2779                                  * match = dev->phys_disk[i]->ioaccel_handle
2780                                  *              == c2->scsi_nexus;      */
2781                                 match = dev->phys_disk[i] == c->phys_disk;
2782                         }
2783                 }
2784                 break;
2785
2786         case IOACCEL2_TMF:
2787                 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2788                         match = dev->phys_disk[i]->ioaccel_handle ==
2789                                         le32_to_cpu(ac->it_nexus);
2790                 }
2791                 break;
2792
2793         case 0:         /* The command is in the middle of being initialized. */
2794                 match = false;
2795                 break;
2796
2797         default:
2798                 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2799                         c->cmd_type);
2800                 BUG();
2801         }
2802
2803         return match;
2804 }
2805
2806 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2807         unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2808 {
2809         int i;
2810         int rc = 0;
2811
2812         /* We can really only handle one reset at a time */
2813         if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2814                 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2815                 return -EINTR;
2816         }
2817
2818         BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2819
2820         for (i = 0; i < h->nr_cmds; i++) {
2821                 struct CommandList *c = h->cmd_pool + i;
2822                 int refcount = atomic_inc_return(&c->refcount);
2823
2824                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2825                         unsigned long flags;
2826
2827                         /*
2828                          * Mark the target command as having a reset pending,
2829                          * then lock a lock so that the command cannot complete
2830                          * while we're considering it.  If the command is not
2831                          * idle then count it; otherwise revoke the event.
2832                          */
2833                         c->reset_pending = dev;
2834                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
2835                         if (!hpsa_is_cmd_idle(c))
2836                                 atomic_inc(&dev->reset_cmds_out);
2837                         else
2838                                 c->reset_pending = NULL;
2839                         spin_unlock_irqrestore(&h->lock, flags);
2840                 }
2841
2842                 cmd_free(h, c);
2843         }
2844
2845         rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2846         if (!rc)
2847                 wait_event(h->event_sync_wait_queue,
2848                         atomic_read(&dev->reset_cmds_out) == 0 ||
2849                         lockup_detected(h));
2850
2851         if (unlikely(lockup_detected(h))) {
2852                 dev_warn(&h->pdev->dev,
2853                          "Controller lockup detected during reset wait\n");
2854                 rc = -ENODEV;
2855         }
2856
2857         if (unlikely(rc))
2858                 atomic_set(&dev->reset_cmds_out, 0);
2859
2860         mutex_unlock(&h->reset_mutex);
2861         return rc;
2862 }
2863
2864 static void hpsa_get_raid_level(struct ctlr_info *h,
2865         unsigned char *scsi3addr, unsigned char *raid_level)
2866 {
2867         int rc;
2868         unsigned char *buf;
2869
2870         *raid_level = RAID_UNKNOWN;
2871         buf = kzalloc(64, GFP_KERNEL);
2872         if (!buf)
2873                 return;
2874         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2875         if (rc == 0)
2876                 *raid_level = buf[8];
2877         if (*raid_level > RAID_UNKNOWN)
2878                 *raid_level = RAID_UNKNOWN;
2879         kfree(buf);
2880         return;
2881 }
2882
2883 #define HPSA_MAP_DEBUG
2884 #ifdef HPSA_MAP_DEBUG
2885 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2886                                 struct raid_map_data *map_buff)
2887 {
2888         struct raid_map_disk_data *dd = &map_buff->data[0];
2889         int map, row, col;
2890         u16 map_cnt, row_cnt, disks_per_row;
2891
2892         if (rc != 0)
2893                 return;
2894
2895         /* Show details only if debugging has been activated. */
2896         if (h->raid_offload_debug < 2)
2897                 return;
2898
2899         dev_info(&h->pdev->dev, "structure_size = %u\n",
2900                                 le32_to_cpu(map_buff->structure_size));
2901         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2902                         le32_to_cpu(map_buff->volume_blk_size));
2903         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2904                         le64_to_cpu(map_buff->volume_blk_cnt));
2905         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2906                         map_buff->phys_blk_shift);
2907         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2908                         map_buff->parity_rotation_shift);
2909         dev_info(&h->pdev->dev, "strip_size = %u\n",
2910                         le16_to_cpu(map_buff->strip_size));
2911         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2912                         le64_to_cpu(map_buff->disk_starting_blk));
2913         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2914                         le64_to_cpu(map_buff->disk_blk_cnt));
2915         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2916                         le16_to_cpu(map_buff->data_disks_per_row));
2917         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2918                         le16_to_cpu(map_buff->metadata_disks_per_row));
2919         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2920                         le16_to_cpu(map_buff->row_cnt));
2921         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2922                         le16_to_cpu(map_buff->layout_map_count));
2923         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2924                         le16_to_cpu(map_buff->flags));
2925         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2926                         le16_to_cpu(map_buff->flags) &
2927                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2928         dev_info(&h->pdev->dev, "dekindex = %u\n",
2929                         le16_to_cpu(map_buff->dekindex));
2930         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2931         for (map = 0; map < map_cnt; map++) {
2932                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2933                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2934                 for (row = 0; row < row_cnt; row++) {
2935                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2936                         disks_per_row =
2937                                 le16_to_cpu(map_buff->data_disks_per_row);
2938                         for (col = 0; col < disks_per_row; col++, dd++)
2939                                 dev_info(&h->pdev->dev,
2940                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2941                                         col, dd->ioaccel_handle,
2942                                         dd->xor_mult[0], dd->xor_mult[1]);
2943                         disks_per_row =
2944                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2945                         for (col = 0; col < disks_per_row; col++, dd++)
2946                                 dev_info(&h->pdev->dev,
2947                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2948                                         col, dd->ioaccel_handle,
2949                                         dd->xor_mult[0], dd->xor_mult[1]);
2950                 }
2951         }
2952 }
2953 #else
2954 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2955                         __attribute__((unused)) int rc,
2956                         __attribute__((unused)) struct raid_map_data *map_buff)
2957 {
2958 }
2959 #endif
2960
2961 static int hpsa_get_raid_map(struct ctlr_info *h,
2962         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2963 {
2964         int rc = 0;
2965         struct CommandList *c;
2966         struct ErrorInfo *ei;
2967
2968         c = cmd_alloc(h);
2969
2970         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2971                         sizeof(this_device->raid_map), 0,
2972                         scsi3addr, TYPE_CMD)) {
2973                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
2974                 cmd_free(h, c);
2975                 return -1;
2976         }
2977         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2978                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2979         if (rc)
2980                 goto out;
2981         ei = c->err_info;
2982         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2983                 hpsa_scsi_interpret_error(h, c);
2984                 rc = -1;
2985                 goto out;
2986         }
2987         cmd_free(h, c);
2988
2989         /* @todo in the future, dynamically allocate RAID map memory */
2990         if (le32_to_cpu(this_device->raid_map.structure_size) >
2991                                 sizeof(this_device->raid_map)) {
2992                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2993                 rc = -1;
2994         }
2995         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2996         return rc;
2997 out:
2998         cmd_free(h, c);
2999         return rc;
3000 }
3001
3002 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3003                 unsigned char scsi3addr[], u16 bmic_device_index,
3004                 struct bmic_identify_physical_device *buf, size_t bufsize)
3005 {
3006         int rc = IO_OK;
3007         struct CommandList *c;
3008         struct ErrorInfo *ei;
3009
3010         c = cmd_alloc(h);
3011         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3012                 0, RAID_CTLR_LUNID, TYPE_CMD);
3013         if (rc)
3014                 goto out;
3015
3016         c->Request.CDB[2] = bmic_device_index & 0xff;
3017         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3018
3019         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3020                                                 NO_TIMEOUT);
3021         ei = c->err_info;
3022         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3023                 hpsa_scsi_interpret_error(h, c);
3024                 rc = -1;
3025         }
3026 out:
3027         cmd_free(h, c);
3028         return rc;
3029 }
3030
3031 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3032         unsigned char scsi3addr[], u8 page)
3033 {
3034         int rc;
3035         int i;
3036         int pages;
3037         unsigned char *buf, bufsize;
3038
3039         buf = kzalloc(256, GFP_KERNEL);
3040         if (!buf)
3041                 return 0;
3042
3043         /* Get the size of the page list first */
3044         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3045                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3046                                 buf, HPSA_VPD_HEADER_SZ);
3047         if (rc != 0)
3048                 goto exit_unsupported;
3049         pages = buf[3];
3050         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3051                 bufsize = pages + HPSA_VPD_HEADER_SZ;
3052         else
3053                 bufsize = 255;
3054
3055         /* Get the whole VPD page list */
3056         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3057                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3058                                 buf, bufsize);
3059         if (rc != 0)
3060                 goto exit_unsupported;
3061
3062         pages = buf[3];
3063         for (i = 1; i <= pages; i++)
3064                 if (buf[3 + i] == page)
3065                         goto exit_supported;
3066 exit_unsupported:
3067         kfree(buf);
3068         return 0;
3069 exit_supported:
3070         kfree(buf);
3071         return 1;
3072 }
3073
3074 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3075         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3076 {
3077         int rc;
3078         unsigned char *buf;
3079         u8 ioaccel_status;
3080
3081         this_device->offload_config = 0;
3082         this_device->offload_enabled = 0;
3083         this_device->offload_to_be_enabled = 0;
3084
3085         buf = kzalloc(64, GFP_KERNEL);
3086         if (!buf)
3087                 return;
3088         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3089                 goto out;
3090         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3091                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3092         if (rc != 0)
3093                 goto out;
3094
3095 #define IOACCEL_STATUS_BYTE 4
3096 #define OFFLOAD_CONFIGURED_BIT 0x01
3097 #define OFFLOAD_ENABLED_BIT 0x02
3098         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3099         this_device->offload_config =
3100                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3101         if (this_device->offload_config) {
3102                 this_device->offload_enabled =
3103                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3104                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3105                         this_device->offload_enabled = 0;
3106         }
3107         this_device->offload_to_be_enabled = this_device->offload_enabled;
3108 out:
3109         kfree(buf);
3110         return;
3111 }
3112
3113 /* Get the device id from inquiry page 0x83 */
3114 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3115         unsigned char *device_id, int buflen)
3116 {
3117         int rc;
3118         unsigned char *buf;
3119
3120         if (buflen > 16)
3121                 buflen = 16;
3122         buf = kzalloc(64, GFP_KERNEL);
3123         if (!buf)
3124                 return -ENOMEM;
3125         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3126         if (rc == 0)
3127                 memcpy(device_id, &buf[8], buflen);
3128         kfree(buf);
3129         return rc != 0;
3130 }
3131
3132 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3133                 void *buf, int bufsize,
3134                 int extended_response)
3135 {
3136         int rc = IO_OK;
3137         struct CommandList *c;
3138         unsigned char scsi3addr[8];
3139         struct ErrorInfo *ei;
3140
3141         c = cmd_alloc(h);
3142
3143         /* address the controller */
3144         memset(scsi3addr, 0, sizeof(scsi3addr));
3145         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3146                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3147                 rc = -1;
3148                 goto out;
3149         }
3150         if (extended_response)
3151                 c->Request.CDB[1] = extended_response;
3152         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3153                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3154         if (rc)
3155                 goto out;
3156         ei = c->err_info;
3157         if (ei->CommandStatus != 0 &&
3158             ei->CommandStatus != CMD_DATA_UNDERRUN) {
3159                 hpsa_scsi_interpret_error(h, c);
3160                 rc = -1;
3161         } else {
3162                 struct ReportLUNdata *rld = buf;
3163
3164                 if (rld->extended_response_flag != extended_response) {
3165                         dev_err(&h->pdev->dev,
3166                                 "report luns requested format %u, got %u\n",
3167                                 extended_response,
3168                                 rld->extended_response_flag);
3169                         rc = -1;
3170                 }
3171         }
3172 out:
3173         cmd_free(h, c);
3174         return rc;
3175 }
3176
3177 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3178                 struct ReportExtendedLUNdata *buf, int bufsize)
3179 {
3180         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3181                                                 HPSA_REPORT_PHYS_EXTENDED);
3182 }
3183
3184 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3185                 struct ReportLUNdata *buf, int bufsize)
3186 {
3187         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3188 }
3189
3190 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3191         int bus, int target, int lun)
3192 {
3193         device->bus = bus;
3194         device->target = target;
3195         device->lun = lun;
3196 }
3197
3198 /* Use VPD inquiry to get details of volume status */
3199 static int hpsa_get_volume_status(struct ctlr_info *h,
3200                                         unsigned char scsi3addr[])
3201 {
3202         int rc;
3203         int status;
3204         int size;
3205         unsigned char *buf;
3206
3207         buf = kzalloc(64, GFP_KERNEL);
3208         if (!buf)
3209                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3210
3211         /* Does controller have VPD for logical volume status? */
3212         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3213                 goto exit_failed;
3214
3215         /* Get the size of the VPD return buffer */
3216         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3217                                         buf, HPSA_VPD_HEADER_SZ);
3218         if (rc != 0)
3219                 goto exit_failed;
3220         size = buf[3];
3221
3222         /* Now get the whole VPD buffer */
3223         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3224                                         buf, size + HPSA_VPD_HEADER_SZ);
3225         if (rc != 0)
3226                 goto exit_failed;
3227         status = buf[4]; /* status byte */
3228
3229         kfree(buf);
3230         return status;
3231 exit_failed:
3232         kfree(buf);
3233         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3234 }
3235
3236 /* Determine offline status of a volume.
3237  * Return either:
3238  *  0 (not offline)
3239  *  0xff (offline for unknown reasons)
3240  *  # (integer code indicating one of several NOT READY states
3241  *     describing why a volume is to be kept offline)
3242  */
3243 static int hpsa_volume_offline(struct ctlr_info *h,
3244                                         unsigned char scsi3addr[])
3245 {
3246         struct CommandList *c;
3247         unsigned char *sense;
3248         u8 sense_key, asc, ascq;
3249         int sense_len;
3250         int rc, ldstat = 0;
3251         u16 cmd_status;
3252         u8 scsi_status;
3253 #define ASC_LUN_NOT_READY 0x04
3254 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3255 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3256
3257         c = cmd_alloc(h);
3258
3259         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3260         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3261         if (rc) {
3262                 cmd_free(h, c);
3263                 return 0;
3264         }
3265         sense = c->err_info->SenseInfo;
3266         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3267                 sense_len = sizeof(c->err_info->SenseInfo);
3268         else
3269                 sense_len = c->err_info->SenseLen;
3270         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3271         cmd_status = c->err_info->CommandStatus;
3272         scsi_status = c->err_info->ScsiStatus;
3273         cmd_free(h, c);
3274         /* Is the volume 'not ready'? */
3275         if (cmd_status != CMD_TARGET_STATUS ||
3276                 scsi_status != SAM_STAT_CHECK_CONDITION ||
3277                 sense_key != NOT_READY ||
3278                 asc != ASC_LUN_NOT_READY)  {
3279                 return 0;
3280         }
3281
3282         /* Determine the reason for not ready state */
3283         ldstat = hpsa_get_volume_status(h, scsi3addr);
3284
3285         /* Keep volume offline in certain cases: */
3286         switch (ldstat) {
3287         case HPSA_LV_UNDERGOING_ERASE:
3288         case HPSA_LV_NOT_AVAILABLE:
3289         case HPSA_LV_UNDERGOING_RPI:
3290         case HPSA_LV_PENDING_RPI:
3291         case HPSA_LV_ENCRYPTED_NO_KEY:
3292         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3293         case HPSA_LV_UNDERGOING_ENCRYPTION:
3294         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3295         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3296                 return ldstat;
3297         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3298                 /* If VPD status page isn't available,
3299                  * use ASC/ASCQ to determine state
3300                  */
3301                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3302                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3303                         return ldstat;
3304                 break;
3305         default:
3306                 break;
3307         }
3308         return 0;
3309 }
3310
3311 /*
3312  * Find out if a logical device supports aborts by simply trying one.
3313  * Smart Array may claim not to support aborts on logical drives, but
3314  * if a MSA2000 * is connected, the drives on that will be presented
3315  * by the Smart Array as logical drives, and aborts may be sent to
3316  * those devices successfully.  So the simplest way to find out is
3317  * to simply try an abort and see how the device responds.
3318  */
3319 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3320                                         unsigned char *scsi3addr)
3321 {
3322         struct CommandList *c;
3323         struct ErrorInfo *ei;
3324         int rc = 0;
3325
3326         u64 tag = (u64) -1; /* bogus tag */
3327
3328         /* Assume that physical devices support aborts */
3329         if (!is_logical_dev_addr_mode(scsi3addr))
3330                 return 1;
3331
3332         c = cmd_alloc(h);
3333
3334         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3335         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3336         /* no unmap needed here because no data xfer. */
3337         ei = c->err_info;
3338         switch (ei->CommandStatus) {
3339         case CMD_INVALID:
3340                 rc = 0;
3341                 break;
3342         case CMD_UNABORTABLE:
3343         case CMD_ABORT_FAILED:
3344                 rc = 1;
3345                 break;
3346         case CMD_TMF_STATUS:
3347                 rc = hpsa_evaluate_tmf_status(h, c);
3348                 break;
3349         default:
3350                 rc = 0;
3351                 break;
3352         }
3353         cmd_free(h, c);
3354         return rc;
3355 }
3356
3357 static int hpsa_update_device_info(struct ctlr_info *h,
3358         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3359         unsigned char *is_OBDR_device)
3360 {
3361
3362 #define OBDR_SIG_OFFSET 43
3363 #define OBDR_TAPE_SIG "$DR-10"
3364 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3365 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3366
3367         unsigned char *inq_buff;
3368         unsigned char *obdr_sig;
3369         int rc = 0;
3370
3371         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3372         if (!inq_buff) {
3373                 rc = -ENOMEM;
3374                 goto bail_out;
3375         }
3376
3377         /* Do an inquiry to the device to see what it is. */
3378         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3379                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3380                 /* Inquiry failed (msg printed already) */
3381                 dev_err(&h->pdev->dev,
3382                         "hpsa_update_device_info: inquiry failed\n");
3383                 rc = -EIO;
3384                 goto bail_out;
3385         }
3386
3387         this_device->devtype = (inq_buff[0] & 0x1f);
3388         memcpy(this_device->scsi3addr, scsi3addr, 8);
3389         memcpy(this_device->vendor, &inq_buff[8],
3390                 sizeof(this_device->vendor));
3391         memcpy(this_device->model, &inq_buff[16],
3392                 sizeof(this_device->model));
3393         memset(this_device->device_id, 0,
3394                 sizeof(this_device->device_id));
3395         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
3396                 sizeof(this_device->device_id));
3397
3398         if (this_device->devtype == TYPE_DISK &&
3399                 is_logical_dev_addr_mode(scsi3addr)) {
3400                 int volume_offline;
3401
3402                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3403                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3404                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3405                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3406                 if (volume_offline < 0 || volume_offline > 0xff)
3407                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3408                 this_device->volume_offline = volume_offline & 0xff;
3409         } else {
3410                 this_device->raid_level = RAID_UNKNOWN;
3411                 this_device->offload_config = 0;
3412                 this_device->offload_enabled = 0;
3413                 this_device->offload_to_be_enabled = 0;
3414                 this_device->hba_ioaccel_enabled = 0;
3415                 this_device->volume_offline = 0;
3416                 this_device->queue_depth = h->nr_cmds;
3417         }
3418
3419         if (is_OBDR_device) {
3420                 /* See if this is a One-Button-Disaster-Recovery device
3421                  * by looking for "$DR-10" at offset 43 in inquiry data.
3422                  */
3423                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3424                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3425                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3426                                                 OBDR_SIG_LEN) == 0);
3427         }
3428         kfree(inq_buff);
3429         return 0;
3430
3431 bail_out:
3432         kfree(inq_buff);
3433         return rc;
3434 }
3435
3436 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3437                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3438 {
3439         unsigned long flags;
3440         int rc, entry;
3441         /*
3442          * See if this device supports aborts.  If we already know
3443          * the device, we already know if it supports aborts, otherwise
3444          * we have to find out if it supports aborts by trying one.
3445          */
3446         spin_lock_irqsave(&h->devlock, flags);
3447         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3448         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3449                 entry >= 0 && entry < h->ndevices) {
3450                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3451                 spin_unlock_irqrestore(&h->devlock, flags);
3452         } else {
3453                 spin_unlock_irqrestore(&h->devlock, flags);
3454                 dev->supports_aborts =
3455                                 hpsa_device_supports_aborts(h, scsi3addr);
3456                 if (dev->supports_aborts < 0)
3457                         dev->supports_aborts = 0;
3458         }
3459 }
3460
3461 static unsigned char *ext_target_model[] = {
3462         "MSA2012",
3463         "MSA2024",
3464         "MSA2312",
3465         "MSA2324",
3466         "P2000 G3 SAS",
3467         "MSA 2040 SAS",
3468         NULL,
3469 };
3470
3471 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3472 {
3473         int i;
3474
3475         for (i = 0; ext_target_model[i]; i++)
3476                 if (strncmp(device->model, ext_target_model[i],
3477                         strlen(ext_target_model[i])) == 0)
3478                         return 1;
3479         return 0;
3480 }
3481
3482 /* Helper function to assign bus, target, lun mapping of devices.
3483  * Puts non-external target logical volumes on bus 0, external target logical
3484  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3485  * Logical drive target and lun are assigned at this time, but
3486  * physical device lun and target assignment are deferred (assigned
3487  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3488  */
3489 static void figure_bus_target_lun(struct ctlr_info *h,
3490         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3491 {
3492         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3493
3494         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3495                 /* physical device, target and lun filled in later */
3496                 if (is_hba_lunid(lunaddrbytes))
3497                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3498                 else
3499                         /* defer target, lun assignment for physical devices */
3500                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3501                 return;
3502         }
3503         /* It's a logical device */
3504         if (is_ext_target(h, device)) {
3505                 /* external target way, put logicals on bus 1
3506                  * and match target/lun numbers box
3507                  * reports, other smart array, bus 0, target 0, match lunid
3508                  */
3509                 hpsa_set_bus_target_lun(device,
3510                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3511                 return;
3512         }
3513         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3514 }
3515
3516 /*
3517  * If there is no lun 0 on a target, linux won't find any devices.
3518  * For the external targets (arrays), we have to manually detect the enclosure
3519  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3520  * it for some reason.  *tmpdevice is the target we're adding,
3521  * this_device is a pointer into the current element of currentsd[]
3522  * that we're building up in update_scsi_devices(), below.
3523  * lunzerobits is a bitmap that tracks which targets already have a
3524  * lun 0 assigned.
3525  * Returns 1 if an enclosure was added, 0 if not.
3526  */
3527 static int add_ext_target_dev(struct ctlr_info *h,
3528         struct hpsa_scsi_dev_t *tmpdevice,
3529         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3530         unsigned long lunzerobits[], int *n_ext_target_devs)
3531 {
3532         unsigned char scsi3addr[8];
3533
3534         if (test_bit(tmpdevice->target, lunzerobits))
3535                 return 0; /* There is already a lun 0 on this target. */
3536
3537         if (!is_logical_dev_addr_mode(lunaddrbytes))
3538                 return 0; /* It's the logical targets that may lack lun 0. */
3539
3540         if (!is_ext_target(h, tmpdevice))
3541                 return 0; /* Only external target devices have this problem. */
3542
3543         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3544                 return 0;
3545
3546         memset(scsi3addr, 0, 8);
3547         scsi3addr[3] = tmpdevice->target;
3548         if (is_hba_lunid(scsi3addr))
3549                 return 0; /* Don't add the RAID controller here. */
3550
3551         if (is_scsi_rev_5(h))
3552                 return 0; /* p1210m doesn't need to do this. */
3553
3554         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3555                 dev_warn(&h->pdev->dev, "Maximum number of external "
3556                         "target devices exceeded.  Check your hardware "
3557                         "configuration.");
3558                 return 0;
3559         }
3560
3561         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3562                 return 0;
3563         (*n_ext_target_devs)++;
3564         hpsa_set_bus_target_lun(this_device,
3565                                 tmpdevice->bus, tmpdevice->target, 0);
3566         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3567         set_bit(tmpdevice->target, lunzerobits);
3568         return 1;
3569 }
3570
3571 /*
3572  * Get address of physical disk used for an ioaccel2 mode command:
3573  *      1. Extract ioaccel2 handle from the command.
3574  *      2. Find a matching ioaccel2 handle from list of physical disks.
3575  *      3. Return:
3576  *              1 and set scsi3addr to address of matching physical
3577  *              0 if no matching physical disk was found.
3578  */
3579 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3580         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3581 {
3582         struct io_accel2_cmd *c2 =
3583                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3584         unsigned long flags;
3585         int i;
3586
3587         spin_lock_irqsave(&h->devlock, flags);
3588         for (i = 0; i < h->ndevices; i++)
3589                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3590                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3591                                 sizeof(h->dev[i]->scsi3addr));
3592                         spin_unlock_irqrestore(&h->devlock, flags);
3593                         return 1;
3594                 }
3595         spin_unlock_irqrestore(&h->devlock, flags);
3596         return 0;
3597 }
3598
3599 /*
3600  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3601  * logdev.  The number of luns in physdev and logdev are returned in
3602  * *nphysicals and *nlogicals, respectively.
3603  * Returns 0 on success, -1 otherwise.
3604  */
3605 static int hpsa_gather_lun_info(struct ctlr_info *h,
3606         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3607         struct ReportLUNdata *logdev, u32 *nlogicals)
3608 {
3609         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3610                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3611                 return -1;
3612         }
3613         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3614         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3615                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3616                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3617                 *nphysicals = HPSA_MAX_PHYS_LUN;
3618         }
3619         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3620                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3621                 return -1;
3622         }
3623         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3624         /* Reject Logicals in excess of our max capability. */
3625         if (*nlogicals > HPSA_MAX_LUN) {
3626                 dev_warn(&h->pdev->dev,
3627                         "maximum logical LUNs (%d) exceeded.  "
3628                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3629                         *nlogicals - HPSA_MAX_LUN);
3630                         *nlogicals = HPSA_MAX_LUN;
3631         }
3632         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3633                 dev_warn(&h->pdev->dev,
3634                         "maximum logical + physical LUNs (%d) exceeded. "
3635                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3636                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3637                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3638         }
3639         return 0;
3640 }
3641
3642 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3643         int i, int nphysicals, int nlogicals,
3644         struct ReportExtendedLUNdata *physdev_list,
3645         struct ReportLUNdata *logdev_list)
3646 {
3647         /* Helper function, figure out where the LUN ID info is coming from
3648          * given index i, lists of physical and logical devices, where in
3649          * the list the raid controller is supposed to appear (first or last)
3650          */
3651
3652         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3653         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3654
3655         if (i == raid_ctlr_position)
3656                 return RAID_CTLR_LUNID;
3657
3658         if (i < logicals_start)
3659                 return &physdev_list->LUN[i -
3660                                 (raid_ctlr_position == 0)].lunid[0];
3661
3662         if (i < last_device)
3663                 return &logdev_list->LUN[i - nphysicals -
3664                         (raid_ctlr_position == 0)][0];
3665         BUG();
3666         return NULL;
3667 }
3668
3669 /* get physical drive ioaccel handle and queue depth */
3670 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3671                 struct hpsa_scsi_dev_t *dev,
3672                 u8 *lunaddrbytes,
3673                 struct bmic_identify_physical_device *id_phys)
3674 {
3675         int rc;
3676         struct ext_report_lun_entry *rle =
3677                 (struct ext_report_lun_entry *) lunaddrbytes;
3678
3679         dev->ioaccel_handle = rle->ioaccel_handle;
3680         if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
3681                 dev->hba_ioaccel_enabled = 1;
3682         memset(id_phys, 0, sizeof(*id_phys));
3683         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3684                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3685                         sizeof(*id_phys));
3686         if (!rc)
3687                 /* Reserve space for FW operations */
3688 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3689 #define DRIVE_QUEUE_DEPTH 7
3690                 dev->queue_depth =
3691                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3692                                 DRIVE_CMDS_RESERVED_FOR_FW;
3693         else
3694                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3695 }
3696
3697 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3698         u8 *lunaddrbytes,
3699         struct bmic_identify_physical_device *id_phys)
3700 {
3701         if (PHYS_IOACCEL(lunaddrbytes)
3702                 && this_device->ioaccel_handle)
3703                 this_device->hba_ioaccel_enabled = 1;
3704
3705         memcpy(&this_device->active_path_index,
3706                 &id_phys->active_path_number,
3707                 sizeof(this_device->active_path_index));
3708         memcpy(&this_device->path_map,
3709                 &id_phys->redundant_path_present_map,
3710                 sizeof(this_device->path_map));
3711         memcpy(&this_device->box,
3712                 &id_phys->alternate_paths_phys_box_on_port,
3713                 sizeof(this_device->box));
3714         memcpy(&this_device->phys_connector,
3715                 &id_phys->alternate_paths_phys_connector,
3716                 sizeof(this_device->phys_connector));
3717         memcpy(&this_device->bay,
3718                 &id_phys->phys_bay_in_box,
3719                 sizeof(this_device->bay));
3720 }
3721
3722 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3723 {
3724         /* the idea here is we could get notified
3725          * that some devices have changed, so we do a report
3726          * physical luns and report logical luns cmd, and adjust
3727          * our list of devices accordingly.
3728          *
3729          * The scsi3addr's of devices won't change so long as the
3730          * adapter is not reset.  That means we can rescan and
3731          * tell which devices we already know about, vs. new
3732          * devices, vs.  disappearing devices.
3733          */
3734         struct ReportExtendedLUNdata *physdev_list = NULL;
3735         struct ReportLUNdata *logdev_list = NULL;
3736         struct bmic_identify_physical_device *id_phys = NULL;
3737         u32 nphysicals = 0;
3738         u32 nlogicals = 0;
3739         u32 ndev_allocated = 0;
3740         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3741         int ncurrent = 0;
3742         int i, n_ext_target_devs, ndevs_to_allocate;
3743         int raid_ctlr_position;
3744         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3745
3746         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3747         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3748         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3749         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3750         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3751
3752         if (!currentsd || !physdev_list || !logdev_list ||
3753                 !tmpdevice || !id_phys) {
3754                 dev_err(&h->pdev->dev, "out of memory\n");
3755                 goto out;
3756         }
3757         memset(lunzerobits, 0, sizeof(lunzerobits));
3758
3759         h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
3760
3761         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3762                         logdev_list, &nlogicals)) {
3763                 h->drv_req_rescan = 1;
3764                 goto out;
3765         }
3766
3767         /* We might see up to the maximum number of logical and physical disks
3768          * plus external target devices, and a device for the local RAID
3769          * controller.
3770          */
3771         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3772
3773         /* Allocate the per device structures */
3774         for (i = 0; i < ndevs_to_allocate; i++) {
3775                 if (i >= HPSA_MAX_DEVICES) {
3776                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3777                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3778                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3779                         break;
3780                 }
3781
3782                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3783                 if (!currentsd[i]) {
3784                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3785                                 __FILE__, __LINE__);
3786                         h->drv_req_rescan = 1;
3787                         goto out;
3788                 }
3789                 ndev_allocated++;
3790         }
3791
3792         if (is_scsi_rev_5(h))
3793                 raid_ctlr_position = 0;
3794         else
3795                 raid_ctlr_position = nphysicals + nlogicals;
3796
3797         /* adjust our table of devices */
3798         n_ext_target_devs = 0;
3799         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3800                 u8 *lunaddrbytes, is_OBDR = 0;
3801                 int rc = 0;
3802
3803                 /* Figure out where the LUN ID info is coming from */
3804                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3805                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3806
3807                 /* skip masked non-disk devices */
3808                 if (MASKED_DEVICE(lunaddrbytes))
3809                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3810                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3811                                 continue;
3812
3813                 /* Get device type, vendor, model, device id */
3814                 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3815                                                         &is_OBDR);
3816                 if (rc == -ENOMEM) {
3817                         dev_warn(&h->pdev->dev,
3818                                 "Out of memory, rescan deferred.\n");
3819                         h->drv_req_rescan = 1;
3820                         goto out;
3821                 }
3822                 if (rc) {
3823                         dev_warn(&h->pdev->dev,
3824                                 "Inquiry failed, skipping device.\n");
3825                         continue;
3826                 }
3827
3828                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3829                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3830                 this_device = currentsd[ncurrent];
3831
3832                 /*
3833                  * For external target devices, we have to insert a LUN 0 which
3834                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3835                  * is nonetheless an enclosure device there.  We have to
3836                  * present that otherwise linux won't find anything if
3837                  * there is no lun 0.
3838                  */
3839                 if (add_ext_target_dev(h, tmpdevice, this_device,
3840                                 lunaddrbytes, lunzerobits,
3841                                 &n_ext_target_devs)) {
3842                         ncurrent++;
3843                         this_device = currentsd[ncurrent];
3844                 }
3845
3846                 *this_device = *tmpdevice;
3847
3848                 /* do not expose masked devices */
3849                 if (MASKED_DEVICE(lunaddrbytes) &&
3850                         i < nphysicals + (raid_ctlr_position == 0)) {
3851                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3852                 } else {
3853                         this_device->expose_state =
3854                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3855                 }
3856
3857                 switch (this_device->devtype) {
3858                 case TYPE_ROM:
3859                         /* We don't *really* support actual CD-ROM devices,
3860                          * just "One Button Disaster Recovery" tape drive
3861                          * which temporarily pretends to be a CD-ROM drive.
3862                          * So we check that the device is really an OBDR tape
3863                          * device by checking for "$DR-10" in bytes 43-48 of
3864                          * the inquiry data.
3865                          */
3866                         if (is_OBDR)
3867                                 ncurrent++;
3868                         break;
3869                 case TYPE_DISK:
3870                         if (i < nphysicals + (raid_ctlr_position == 0)) {
3871                                 /* The disk is in HBA mode. */
3872                                 /* Never use RAID mapper in HBA mode. */
3873                                 this_device->offload_enabled = 0;
3874                                 hpsa_get_ioaccel_drive_info(h, this_device,
3875                                         lunaddrbytes, id_phys);
3876                                 hpsa_get_path_info(this_device, lunaddrbytes,
3877                                                         id_phys);
3878                         }
3879                         ncurrent++;
3880                         break;
3881                 case TYPE_TAPE:
3882                 case TYPE_MEDIUM_CHANGER:
3883                 case TYPE_ENCLOSURE:
3884                         ncurrent++;
3885                         break;
3886                 case TYPE_RAID:
3887                         /* Only present the Smartarray HBA as a RAID controller.
3888                          * If it's a RAID controller other than the HBA itself
3889                          * (an external RAID controller, MSA500 or similar)
3890                          * don't present it.
3891                          */
3892                         if (!is_hba_lunid(lunaddrbytes))
3893                                 break;
3894                         ncurrent++;
3895                         break;
3896                 default:
3897                         break;
3898                 }
3899                 if (ncurrent >= HPSA_MAX_DEVICES)
3900                         break;
3901         }
3902         adjust_hpsa_scsi_table(h, currentsd, ncurrent);
3903 out:
3904         kfree(tmpdevice);
3905         for (i = 0; i < ndev_allocated; i++)
3906                 kfree(currentsd[i]);
3907         kfree(currentsd);
3908         kfree(physdev_list);
3909         kfree(logdev_list);
3910         kfree(id_phys);
3911 }
3912
3913 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3914                                    struct scatterlist *sg)
3915 {
3916         u64 addr64 = (u64) sg_dma_address(sg);
3917         unsigned int len = sg_dma_len(sg);
3918
3919         desc->Addr = cpu_to_le64(addr64);
3920         desc->Len = cpu_to_le32(len);
3921         desc->Ext = 0;
3922 }
3923
3924 /*
3925  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3926  * dma mapping  and fills in the scatter gather entries of the
3927  * hpsa command, cp.
3928  */
3929 static int hpsa_scatter_gather(struct ctlr_info *h,
3930                 struct CommandList *cp,
3931                 struct scsi_cmnd *cmd)
3932 {
3933         struct scatterlist *sg;
3934         int use_sg, i, sg_limit, chained, last_sg;
3935         struct SGDescriptor *curr_sg;
3936
3937         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3938
3939         use_sg = scsi_dma_map(cmd);
3940         if (use_sg < 0)
3941                 return use_sg;
3942
3943         if (!use_sg)
3944                 goto sglist_finished;
3945
3946         /*
3947          * If the number of entries is greater than the max for a single list,
3948          * then we have a chained list; we will set up all but one entry in the
3949          * first list (the last entry is saved for link information);
3950          * otherwise, we don't have a chained list and we'll set up at each of
3951          * the entries in the one list.
3952          */
3953         curr_sg = cp->SG;
3954         chained = use_sg > h->max_cmd_sg_entries;
3955         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
3956         last_sg = scsi_sg_count(cmd) - 1;
3957         scsi_for_each_sg(cmd, sg, sg_limit, i) {
3958                 hpsa_set_sg_descriptor(curr_sg, sg);
3959                 curr_sg++;
3960         }
3961
3962         if (chained) {
3963                 /*
3964                  * Continue with the chained list.  Set curr_sg to the chained
3965                  * list.  Modify the limit to the total count less the entries
3966                  * we've already set up.  Resume the scan at the list entry
3967                  * where the previous loop left off.
3968                  */
3969                 curr_sg = h->cmd_sg_list[cp->cmdindex];
3970                 sg_limit = use_sg - sg_limit;
3971                 for_each_sg(sg, sg, sg_limit, i) {
3972                         hpsa_set_sg_descriptor(curr_sg, sg);
3973                         curr_sg++;
3974                 }
3975         }
3976
3977         /* Back the pointer up to the last entry and mark it as "last". */
3978         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
3979
3980         if (use_sg + chained > h->maxSG)
3981                 h->maxSG = use_sg + chained;
3982
3983         if (chained) {
3984                 cp->Header.SGList = h->max_cmd_sg_entries;
3985                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3986                 if (hpsa_map_sg_chain_block(h, cp)) {
3987                         scsi_dma_unmap(cmd);
3988                         return -1;
3989                 }
3990                 return 0;
3991         }
3992
3993 sglist_finished:
3994
3995         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3996         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3997         return 0;
3998 }
3999
4000 #define IO_ACCEL_INELIGIBLE (1)
4001 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4002 {
4003         int is_write = 0;
4004         u32 block;
4005         u32 block_cnt;
4006
4007         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4008         switch (cdb[0]) {
4009         case WRITE_6:
4010         case WRITE_12:
4011                 is_write = 1;
4012         case READ_6:
4013         case READ_12:
4014                 if (*cdb_len == 6) {
4015                         block = get_unaligned_be16(&cdb[2]);
4016                         block_cnt = cdb[4];
4017                         if (block_cnt == 0)
4018                                 block_cnt = 256;
4019                 } else {
4020                         BUG_ON(*cdb_len != 12);
4021                         block = get_unaligned_be32(&cdb[2]);
4022                         block_cnt = get_unaligned_be32(&cdb[6]);
4023                 }
4024                 if (block_cnt > 0xffff)
4025                         return IO_ACCEL_INELIGIBLE;
4026
4027                 cdb[0] = is_write ? WRITE_10 : READ_10;
4028                 cdb[1] = 0;
4029                 cdb[2] = (u8) (block >> 24);
4030                 cdb[3] = (u8) (block >> 16);
4031                 cdb[4] = (u8) (block >> 8);
4032                 cdb[5] = (u8) (block);
4033                 cdb[6] = 0;
4034                 cdb[7] = (u8) (block_cnt >> 8);
4035                 cdb[8] = (u8) (block_cnt);
4036                 cdb[9] = 0;
4037                 *cdb_len = 10;
4038                 break;
4039         }
4040         return 0;
4041 }
4042
4043 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4044         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4045         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4046 {
4047         struct scsi_cmnd *cmd = c->scsi_cmd;
4048         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4049         unsigned int len;
4050         unsigned int total_len = 0;
4051         struct scatterlist *sg;
4052         u64 addr64;
4053         int use_sg, i;
4054         struct SGDescriptor *curr_sg;
4055         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4056
4057         /* TODO: implement chaining support */
4058         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4059                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4060                 return IO_ACCEL_INELIGIBLE;
4061         }
4062
4063         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4064
4065         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4066                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4067                 return IO_ACCEL_INELIGIBLE;
4068         }
4069
4070         c->cmd_type = CMD_IOACCEL1;
4071
4072         /* Adjust the DMA address to point to the accelerated command buffer */
4073         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4074                                 (c->cmdindex * sizeof(*cp));
4075         BUG_ON(c->busaddr & 0x0000007F);
4076
4077         use_sg = scsi_dma_map(cmd);
4078         if (use_sg < 0) {
4079                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4080                 return use_sg;
4081         }
4082
4083         if (use_sg) {
4084                 curr_sg = cp->SG;
4085                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4086                         addr64 = (u64) sg_dma_address(sg);
4087                         len  = sg_dma_len(sg);
4088                         total_len += len;
4089                         curr_sg->Addr = cpu_to_le64(addr64);
4090                         curr_sg->Len = cpu_to_le32(len);
4091                         curr_sg->Ext = cpu_to_le32(0);
4092                         curr_sg++;
4093                 }
4094                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4095
4096                 switch (cmd->sc_data_direction) {
4097                 case DMA_TO_DEVICE:
4098                         control |= IOACCEL1_CONTROL_DATA_OUT;
4099                         break;
4100                 case DMA_FROM_DEVICE:
4101                         control |= IOACCEL1_CONTROL_DATA_IN;
4102                         break;
4103                 case DMA_NONE:
4104                         control |= IOACCEL1_CONTROL_NODATAXFER;
4105                         break;
4106                 default:
4107                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4108                         cmd->sc_data_direction);
4109                         BUG();
4110                         break;
4111                 }
4112         } else {
4113                 control |= IOACCEL1_CONTROL_NODATAXFER;
4114         }
4115
4116         c->Header.SGList = use_sg;
4117         /* Fill out the command structure to submit */
4118         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4119         cp->transfer_len = cpu_to_le32(total_len);
4120         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4121                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4122         cp->control = cpu_to_le32(control);
4123         memcpy(cp->CDB, cdb, cdb_len);
4124         memcpy(cp->CISS_LUN, scsi3addr, 8);
4125         /* Tag was already set at init time. */
4126         enqueue_cmd_and_start_io(h, c);
4127         return 0;
4128 }
4129
4130 /*
4131  * Queue a command directly to a device behind the controller using the
4132  * I/O accelerator path.
4133  */
4134 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4135         struct CommandList *c)
4136 {
4137         struct scsi_cmnd *cmd = c->scsi_cmd;
4138         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4139
4140         c->phys_disk = dev;
4141
4142         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4143                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4144 }
4145
4146 /*
4147  * Set encryption parameters for the ioaccel2 request
4148  */
4149 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4150         struct CommandList *c, struct io_accel2_cmd *cp)
4151 {
4152         struct scsi_cmnd *cmd = c->scsi_cmd;
4153         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4154         struct raid_map_data *map = &dev->raid_map;
4155         u64 first_block;
4156
4157         /* Are we doing encryption on this device */
4158         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4159                 return;
4160         /* Set the data encryption key index. */
4161         cp->dekindex = map->dekindex;
4162
4163         /* Set the encryption enable flag, encoded into direction field. */
4164         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4165
4166         /* Set encryption tweak values based on logical block address
4167          * If block size is 512, tweak value is LBA.
4168          * For other block sizes, tweak is (LBA * block size)/ 512)
4169          */
4170         switch (cmd->cmnd[0]) {
4171         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4172         case WRITE_6:
4173         case READ_6:
4174                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4175                 break;
4176         case WRITE_10:
4177         case READ_10:
4178         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4179         case WRITE_12:
4180         case READ_12:
4181                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4182                 break;
4183         case WRITE_16:
4184         case READ_16:
4185                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4186                 break;
4187         default:
4188                 dev_err(&h->pdev->dev,
4189                         "ERROR: %s: size (0x%x) not supported for encryption\n",
4190                         __func__, cmd->cmnd[0]);
4191                 BUG();
4192                 break;
4193         }
4194
4195         if (le32_to_cpu(map->volume_blk_size) != 512)
4196                 first_block = first_block *
4197                                 le32_to_cpu(map->volume_blk_size)/512;
4198
4199         cp->tweak_lower = cpu_to_le32(first_block);
4200         cp->tweak_upper = cpu_to_le32(first_block >> 32);
4201 }
4202
4203 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4204         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4205         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4206 {
4207         struct scsi_cmnd *cmd = c->scsi_cmd;
4208         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4209         struct ioaccel2_sg_element *curr_sg;
4210         int use_sg, i;
4211         struct scatterlist *sg;
4212         u64 addr64;
4213         u32 len;
4214         u32 total_len = 0;
4215
4216         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4217
4218         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4219                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4220                 return IO_ACCEL_INELIGIBLE;
4221         }
4222
4223         c->cmd_type = CMD_IOACCEL2;
4224         /* Adjust the DMA address to point to the accelerated command buffer */
4225         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4226                                 (c->cmdindex * sizeof(*cp));
4227         BUG_ON(c->busaddr & 0x0000007F);
4228
4229         memset(cp, 0, sizeof(*cp));
4230         cp->IU_type = IOACCEL2_IU_TYPE;
4231
4232         use_sg = scsi_dma_map(cmd);
4233         if (use_sg < 0) {
4234                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4235                 return use_sg;
4236         }
4237
4238         if (use_sg) {
4239                 curr_sg = cp->sg;
4240                 if (use_sg > h->ioaccel_maxsg) {
4241                         addr64 = le64_to_cpu(
4242                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4243                         curr_sg->address = cpu_to_le64(addr64);
4244                         curr_sg->length = 0;
4245                         curr_sg->reserved[0] = 0;
4246                         curr_sg->reserved[1] = 0;
4247                         curr_sg->reserved[2] = 0;
4248                         curr_sg->chain_indicator = 0x80;
4249
4250                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4251                 }
4252                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4253                         addr64 = (u64) sg_dma_address(sg);
4254                         len  = sg_dma_len(sg);
4255                         total_len += len;
4256                         curr_sg->address = cpu_to_le64(addr64);
4257                         curr_sg->length = cpu_to_le32(len);
4258                         curr_sg->reserved[0] = 0;
4259                         curr_sg->reserved[1] = 0;
4260                         curr_sg->reserved[2] = 0;
4261                         curr_sg->chain_indicator = 0;
4262                         curr_sg++;
4263                 }
4264
4265                 switch (cmd->sc_data_direction) {
4266                 case DMA_TO_DEVICE:
4267                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4268                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4269                         break;
4270                 case DMA_FROM_DEVICE:
4271                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4272                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4273                         break;
4274                 case DMA_NONE:
4275                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4276                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4277                         break;
4278                 default:
4279                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4280                                 cmd->sc_data_direction);
4281                         BUG();
4282                         break;
4283                 }
4284         } else {
4285                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4286                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4287         }
4288
4289         /* Set encryption parameters, if necessary */
4290         set_encrypt_ioaccel2(h, c, cp);
4291
4292         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4293         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4294         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4295
4296         cp->data_len = cpu_to_le32(total_len);
4297         cp->err_ptr = cpu_to_le64(c->busaddr +
4298                         offsetof(struct io_accel2_cmd, error_data));
4299         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4300
4301         /* fill in sg elements */
4302         if (use_sg > h->ioaccel_maxsg) {
4303                 cp->sg_count = 1;
4304                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4305                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4306                         scsi_dma_unmap(cmd);
4307                         return -1;
4308                 }
4309         } else
4310                 cp->sg_count = (u8) use_sg;
4311
4312         enqueue_cmd_and_start_io(h, c);
4313         return 0;
4314 }
4315
4316 /*
4317  * Queue a command to the correct I/O accelerator path.
4318  */
4319 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4320         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4321         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4322 {
4323         /* Try to honor the device's queue depth */
4324         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4325                                         phys_disk->queue_depth) {
4326                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4327                 return IO_ACCEL_INELIGIBLE;
4328         }
4329         if (h->transMethod & CFGTBL_Trans_io_accel1)
4330                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4331                                                 cdb, cdb_len, scsi3addr,
4332                                                 phys_disk);
4333         else
4334                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4335                                                 cdb, cdb_len, scsi3addr,
4336                                                 phys_disk);
4337 }
4338
4339 static void raid_map_helper(struct raid_map_data *map,
4340                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4341 {
4342         if (offload_to_mirror == 0)  {
4343                 /* use physical disk in the first mirrored group. */
4344                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4345                 return;
4346         }
4347         do {
4348                 /* determine mirror group that *map_index indicates */
4349                 *current_group = *map_index /
4350                         le16_to_cpu(map->data_disks_per_row);
4351                 if (offload_to_mirror == *current_group)
4352                         continue;
4353                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4354                         /* select map index from next group */
4355                         *map_index += le16_to_cpu(map->data_disks_per_row);
4356                         (*current_group)++;
4357                 } else {
4358                         /* select map index from first group */
4359                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4360                         *current_group = 0;
4361                 }
4362         } while (offload_to_mirror != *current_group);
4363 }
4364
4365 /*
4366  * Attempt to perform offload RAID mapping for a logical volume I/O.
4367  */
4368 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4369         struct CommandList *c)
4370 {
4371         struct scsi_cmnd *cmd = c->scsi_cmd;
4372         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4373         struct raid_map_data *map = &dev->raid_map;
4374         struct raid_map_disk_data *dd = &map->data[0];
4375         int is_write = 0;
4376         u32 map_index;
4377         u64 first_block, last_block;
4378         u32 block_cnt;
4379         u32 blocks_per_row;
4380         u64 first_row, last_row;
4381         u32 first_row_offset, last_row_offset;
4382         u32 first_column, last_column;
4383         u64 r0_first_row, r0_last_row;
4384         u32 r5or6_blocks_per_row;
4385         u64 r5or6_first_row, r5or6_last_row;
4386         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4387         u32 r5or6_first_column, r5or6_last_column;
4388         u32 total_disks_per_row;
4389         u32 stripesize;
4390         u32 first_group, last_group, current_group;
4391         u32 map_row;
4392         u32 disk_handle;
4393         u64 disk_block;
4394         u32 disk_block_cnt;
4395         u8 cdb[16];
4396         u8 cdb_len;
4397         u16 strip_size;
4398 #if BITS_PER_LONG == 32
4399         u64 tmpdiv;
4400 #endif
4401         int offload_to_mirror;
4402
4403         /* check for valid opcode, get LBA and block count */
4404         switch (cmd->cmnd[0]) {
4405         case WRITE_6:
4406                 is_write = 1;
4407         case READ_6:
4408                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4409                 block_cnt = cmd->cmnd[4];
4410                 if (block_cnt == 0)
4411                         block_cnt = 256;
4412                 break;
4413         case WRITE_10:
4414                 is_write = 1;
4415         case READ_10:
4416                 first_block =
4417                         (((u64) cmd->cmnd[2]) << 24) |
4418                         (((u64) cmd->cmnd[3]) << 16) |
4419                         (((u64) cmd->cmnd[4]) << 8) |
4420                         cmd->cmnd[5];
4421                 block_cnt =
4422                         (((u32) cmd->cmnd[7]) << 8) |
4423                         cmd->cmnd[8];
4424                 break;
4425         case WRITE_12:
4426                 is_write = 1;
4427         case READ_12:
4428                 first_block =
4429                         (((u64) cmd->cmnd[2]) << 24) |
4430                         (((u64) cmd->cmnd[3]) << 16) |
4431                         (((u64) cmd->cmnd[4]) << 8) |
4432                         cmd->cmnd[5];
4433                 block_cnt =
4434                         (((u32) cmd->cmnd[6]) << 24) |
4435                         (((u32) cmd->cmnd[7]) << 16) |
4436                         (((u32) cmd->cmnd[8]) << 8) |
4437                 cmd->cmnd[9];
4438                 break;
4439         case WRITE_16:
4440                 is_write = 1;
4441         case READ_16:
4442                 first_block =
4443                         (((u64) cmd->cmnd[2]) << 56) |
4444                         (((u64) cmd->cmnd[3]) << 48) |
4445                         (((u64) cmd->cmnd[4]) << 40) |
4446                         (((u64) cmd->cmnd[5]) << 32) |
4447                         (((u64) cmd->cmnd[6]) << 24) |
4448                         (((u64) cmd->cmnd[7]) << 16) |
4449                         (((u64) cmd->cmnd[8]) << 8) |
4450                         cmd->cmnd[9];
4451                 block_cnt =
4452                         (((u32) cmd->cmnd[10]) << 24) |
4453                         (((u32) cmd->cmnd[11]) << 16) |
4454                         (((u32) cmd->cmnd[12]) << 8) |
4455                         cmd->cmnd[13];
4456                 break;
4457         default:
4458                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4459         }
4460         last_block = first_block + block_cnt - 1;
4461
4462         /* check for write to non-RAID-0 */
4463         if (is_write && dev->raid_level != 0)
4464                 return IO_ACCEL_INELIGIBLE;
4465
4466         /* check for invalid block or wraparound */
4467         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4468                 last_block < first_block)
4469                 return IO_ACCEL_INELIGIBLE;
4470
4471         /* calculate stripe information for the request */
4472         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4473                                 le16_to_cpu(map->strip_size);
4474         strip_size = le16_to_cpu(map->strip_size);
4475 #if BITS_PER_LONG == 32
4476         tmpdiv = first_block;
4477         (void) do_div(tmpdiv, blocks_per_row);
4478         first_row = tmpdiv;
4479         tmpdiv = last_block;
4480         (void) do_div(tmpdiv, blocks_per_row);
4481         last_row = tmpdiv;
4482         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4483         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4484         tmpdiv = first_row_offset;
4485         (void) do_div(tmpdiv, strip_size);
4486         first_column = tmpdiv;
4487         tmpdiv = last_row_offset;
4488         (void) do_div(tmpdiv, strip_size);
4489         last_column = tmpdiv;
4490 #else
4491         first_row = first_block / blocks_per_row;
4492         last_row = last_block / blocks_per_row;
4493         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4494         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4495         first_column = first_row_offset / strip_size;
4496         last_column = last_row_offset / strip_size;
4497 #endif
4498
4499         /* if this isn't a single row/column then give to the controller */
4500         if ((first_row != last_row) || (first_column != last_column))
4501                 return IO_ACCEL_INELIGIBLE;
4502
4503         /* proceeding with driver mapping */
4504         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4505                                 le16_to_cpu(map->metadata_disks_per_row);
4506         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4507                                 le16_to_cpu(map->row_cnt);
4508         map_index = (map_row * total_disks_per_row) + first_column;
4509
4510         switch (dev->raid_level) {
4511         case HPSA_RAID_0:
4512                 break; /* nothing special to do */
4513         case HPSA_RAID_1:
4514                 /* Handles load balance across RAID 1 members.
4515                  * (2-drive R1 and R10 with even # of drives.)
4516                  * Appropriate for SSDs, not optimal for HDDs
4517                  */
4518                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4519                 if (dev->offload_to_mirror)
4520                         map_index += le16_to_cpu(map->data_disks_per_row);
4521                 dev->offload_to_mirror = !dev->offload_to_mirror;
4522                 break;
4523         case HPSA_RAID_ADM:
4524                 /* Handles N-way mirrors  (R1-ADM)
4525                  * and R10 with # of drives divisible by 3.)
4526                  */
4527                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4528
4529                 offload_to_mirror = dev->offload_to_mirror;
4530                 raid_map_helper(map, offload_to_mirror,
4531                                 &map_index, &current_group);
4532                 /* set mirror group to use next time */
4533                 offload_to_mirror =
4534                         (offload_to_mirror >=
4535                         le16_to_cpu(map->layout_map_count) - 1)
4536                         ? 0 : offload_to_mirror + 1;
4537                 dev->offload_to_mirror = offload_to_mirror;
4538                 /* Avoid direct use of dev->offload_to_mirror within this
4539                  * function since multiple threads might simultaneously
4540                  * increment it beyond the range of dev->layout_map_count -1.
4541                  */
4542                 break;
4543         case HPSA_RAID_5:
4544         case HPSA_RAID_6:
4545                 if (le16_to_cpu(map->layout_map_count) <= 1)
4546                         break;
4547
4548                 /* Verify first and last block are in same RAID group */
4549                 r5or6_blocks_per_row =
4550                         le16_to_cpu(map->strip_size) *
4551                         le16_to_cpu(map->data_disks_per_row);
4552                 BUG_ON(r5or6_blocks_per_row == 0);
4553                 stripesize = r5or6_blocks_per_row *
4554                         le16_to_cpu(map->layout_map_count);
4555 #if BITS_PER_LONG == 32
4556                 tmpdiv = first_block;
4557                 first_group = do_div(tmpdiv, stripesize);
4558                 tmpdiv = first_group;
4559                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4560                 first_group = tmpdiv;
4561                 tmpdiv = last_block;
4562                 last_group = do_div(tmpdiv, stripesize);
4563                 tmpdiv = last_group;
4564                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4565                 last_group = tmpdiv;
4566 #else
4567                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4568                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4569 #endif
4570                 if (first_group != last_group)
4571                         return IO_ACCEL_INELIGIBLE;
4572
4573                 /* Verify request is in a single row of RAID 5/6 */
4574 #if BITS_PER_LONG == 32
4575                 tmpdiv = first_block;
4576                 (void) do_div(tmpdiv, stripesize);
4577                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4578                 tmpdiv = last_block;
4579                 (void) do_div(tmpdiv, stripesize);
4580                 r5or6_last_row = r0_last_row = tmpdiv;
4581 #else
4582                 first_row = r5or6_first_row = r0_first_row =
4583                                                 first_block / stripesize;
4584                 r5or6_last_row = r0_last_row = last_block / stripesize;
4585 #endif
4586                 if (r5or6_first_row != r5or6_last_row)
4587                         return IO_ACCEL_INELIGIBLE;
4588
4589
4590                 /* Verify request is in a single column */
4591 #if BITS_PER_LONG == 32
4592                 tmpdiv = first_block;
4593                 first_row_offset = do_div(tmpdiv, stripesize);
4594                 tmpdiv = first_row_offset;
4595                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4596                 r5or6_first_row_offset = first_row_offset;
4597                 tmpdiv = last_block;
4598                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4599                 tmpdiv = r5or6_last_row_offset;
4600                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4601                 tmpdiv = r5or6_first_row_offset;
4602                 (void) do_div(tmpdiv, map->strip_size);
4603                 first_column = r5or6_first_column = tmpdiv;
4604                 tmpdiv = r5or6_last_row_offset;
4605                 (void) do_div(tmpdiv, map->strip_size);
4606                 r5or6_last_column = tmpdiv;
4607 #else
4608                 first_row_offset = r5or6_first_row_offset =
4609                         (u32)((first_block % stripesize) %
4610                                                 r5or6_blocks_per_row);
4611
4612                 r5or6_last_row_offset =
4613                         (u32)((last_block % stripesize) %
4614                                                 r5or6_blocks_per_row);
4615
4616                 first_column = r5or6_first_column =
4617                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4618                 r5or6_last_column =
4619                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4620 #endif
4621                 if (r5or6_first_column != r5or6_last_column)
4622                         return IO_ACCEL_INELIGIBLE;
4623
4624                 /* Request is eligible */
4625                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4626                         le16_to_cpu(map->row_cnt);
4627
4628                 map_index = (first_group *
4629                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4630                         (map_row * total_disks_per_row) + first_column;
4631                 break;
4632         default:
4633                 return IO_ACCEL_INELIGIBLE;
4634         }
4635
4636         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4637                 return IO_ACCEL_INELIGIBLE;
4638
4639         c->phys_disk = dev->phys_disk[map_index];
4640
4641         disk_handle = dd[map_index].ioaccel_handle;
4642         disk_block = le64_to_cpu(map->disk_starting_blk) +
4643                         first_row * le16_to_cpu(map->strip_size) +
4644                         (first_row_offset - first_column *
4645                         le16_to_cpu(map->strip_size));
4646         disk_block_cnt = block_cnt;
4647
4648         /* handle differing logical/physical block sizes */
4649         if (map->phys_blk_shift) {
4650                 disk_block <<= map->phys_blk_shift;
4651                 disk_block_cnt <<= map->phys_blk_shift;
4652         }
4653         BUG_ON(disk_block_cnt > 0xffff);
4654
4655         /* build the new CDB for the physical disk I/O */
4656         if (disk_block > 0xffffffff) {
4657                 cdb[0] = is_write ? WRITE_16 : READ_16;
4658                 cdb[1] = 0;
4659                 cdb[2] = (u8) (disk_block >> 56);
4660                 cdb[3] = (u8) (disk_block >> 48);
4661                 cdb[4] = (u8) (disk_block >> 40);
4662                 cdb[5] = (u8) (disk_block >> 32);
4663                 cdb[6] = (u8) (disk_block >> 24);
4664                 cdb[7] = (u8) (disk_block >> 16);
4665                 cdb[8] = (u8) (disk_block >> 8);
4666                 cdb[9] = (u8) (disk_block);
4667                 cdb[10] = (u8) (disk_block_cnt >> 24);
4668                 cdb[11] = (u8) (disk_block_cnt >> 16);
4669                 cdb[12] = (u8) (disk_block_cnt >> 8);
4670                 cdb[13] = (u8) (disk_block_cnt);
4671                 cdb[14] = 0;
4672                 cdb[15] = 0;
4673                 cdb_len = 16;
4674         } else {
4675                 cdb[0] = is_write ? WRITE_10 : READ_10;
4676                 cdb[1] = 0;
4677                 cdb[2] = (u8) (disk_block >> 24);
4678                 cdb[3] = (u8) (disk_block >> 16);
4679                 cdb[4] = (u8) (disk_block >> 8);
4680                 cdb[5] = (u8) (disk_block);
4681                 cdb[6] = 0;
4682                 cdb[7] = (u8) (disk_block_cnt >> 8);
4683                 cdb[8] = (u8) (disk_block_cnt);
4684                 cdb[9] = 0;
4685                 cdb_len = 10;
4686         }
4687         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4688                                                 dev->scsi3addr,
4689                                                 dev->phys_disk[map_index]);
4690 }
4691
4692 /*
4693  * Submit commands down the "normal" RAID stack path
4694  * All callers to hpsa_ciss_submit must check lockup_detected
4695  * beforehand, before (opt.) and after calling cmd_alloc
4696  */
4697 static int hpsa_ciss_submit(struct ctlr_info *h,
4698         struct CommandList *c, struct scsi_cmnd *cmd,
4699         unsigned char scsi3addr[])
4700 {
4701         cmd->host_scribble = (unsigned char *) c;
4702         c->cmd_type = CMD_SCSI;
4703         c->scsi_cmd = cmd;
4704         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4705         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4706         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4707
4708         /* Fill in the request block... */
4709
4710         c->Request.Timeout = 0;
4711         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4712         c->Request.CDBLen = cmd->cmd_len;
4713         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4714         switch (cmd->sc_data_direction) {
4715         case DMA_TO_DEVICE:
4716                 c->Request.type_attr_dir =
4717                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4718                 break;
4719         case DMA_FROM_DEVICE:
4720                 c->Request.type_attr_dir =
4721                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4722                 break;
4723         case DMA_NONE:
4724                 c->Request.type_attr_dir =
4725                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4726                 break;
4727         case DMA_BIDIRECTIONAL:
4728                 /* This can happen if a buggy application does a scsi passthru
4729                  * and sets both inlen and outlen to non-zero. ( see
4730                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4731                  */
4732
4733                 c->Request.type_attr_dir =
4734                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4735                 /* This is technically wrong, and hpsa controllers should
4736                  * reject it with CMD_INVALID, which is the most correct
4737                  * response, but non-fibre backends appear to let it
4738                  * slide by, and give the same results as if this field
4739                  * were set correctly.  Either way is acceptable for
4740                  * our purposes here.
4741                  */
4742
4743                 break;
4744
4745         default:
4746                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4747                         cmd->sc_data_direction);
4748                 BUG();
4749                 break;
4750         }
4751
4752         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4753                 hpsa_cmd_resolve_and_free(h, c);
4754                 return SCSI_MLQUEUE_HOST_BUSY;
4755         }
4756         enqueue_cmd_and_start_io(h, c);
4757         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4758         return 0;
4759 }
4760
4761 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4762                                 struct CommandList *c)
4763 {
4764         dma_addr_t cmd_dma_handle, err_dma_handle;
4765
4766         /* Zero out all of commandlist except the last field, refcount */
4767         memset(c, 0, offsetof(struct CommandList, refcount));
4768         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4769         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4770         c->err_info = h->errinfo_pool + index;
4771         memset(c->err_info, 0, sizeof(*c->err_info));
4772         err_dma_handle = h->errinfo_pool_dhandle
4773             + index * sizeof(*c->err_info);
4774         c->cmdindex = index;
4775         c->busaddr = (u32) cmd_dma_handle;
4776         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4777         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4778         c->h = h;
4779         c->scsi_cmd = SCSI_CMD_IDLE;
4780 }
4781
4782 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4783 {
4784         int i;
4785
4786         for (i = 0; i < h->nr_cmds; i++) {
4787                 struct CommandList *c = h->cmd_pool + i;
4788
4789                 hpsa_cmd_init(h, i, c);
4790                 atomic_set(&c->refcount, 0);
4791         }
4792 }
4793
4794 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4795                                 struct CommandList *c)
4796 {
4797         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4798
4799         BUG_ON(c->cmdindex != index);
4800
4801         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4802         memset(c->err_info, 0, sizeof(*c->err_info));
4803         c->busaddr = (u32) cmd_dma_handle;
4804 }
4805
4806 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4807                 struct CommandList *c, struct scsi_cmnd *cmd,
4808                 unsigned char *scsi3addr)
4809 {
4810         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4811         int rc = IO_ACCEL_INELIGIBLE;
4812
4813         cmd->host_scribble = (unsigned char *) c;
4814
4815         if (dev->offload_enabled) {
4816                 hpsa_cmd_init(h, c->cmdindex, c);
4817                 c->cmd_type = CMD_SCSI;
4818                 c->scsi_cmd = cmd;
4819                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4820                 if (rc < 0)     /* scsi_dma_map failed. */
4821                         rc = SCSI_MLQUEUE_HOST_BUSY;
4822         } else if (dev->hba_ioaccel_enabled) {
4823                 hpsa_cmd_init(h, c->cmdindex, c);
4824                 c->cmd_type = CMD_SCSI;
4825                 c->scsi_cmd = cmd;
4826                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4827                 if (rc < 0)     /* scsi_dma_map failed. */
4828                         rc = SCSI_MLQUEUE_HOST_BUSY;
4829         }
4830         return rc;
4831 }
4832
4833 static void hpsa_command_resubmit_worker(struct work_struct *work)
4834 {
4835         struct scsi_cmnd *cmd;
4836         struct hpsa_scsi_dev_t *dev;
4837         struct CommandList *c = container_of(work, struct CommandList, work);
4838
4839         cmd = c->scsi_cmd;
4840         dev = cmd->device->hostdata;
4841         if (!dev) {
4842                 cmd->result = DID_NO_CONNECT << 16;
4843                 return hpsa_cmd_free_and_done(c->h, c, cmd);
4844         }
4845         if (c->reset_pending)
4846                 return hpsa_cmd_resolve_and_free(c->h, c);
4847         if (c->abort_pending)
4848                 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4849         if (c->cmd_type == CMD_IOACCEL2) {
4850                 struct ctlr_info *h = c->h;
4851                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4852                 int rc;
4853
4854                 if (c2->error_data.serv_response ==
4855                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4856                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4857                         if (rc == 0)
4858                                 return;
4859                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4860                                 /*
4861                                  * If we get here, it means dma mapping failed.
4862                                  * Try again via scsi mid layer, which will
4863                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4864                                  */
4865                                 cmd->result = DID_IMM_RETRY << 16;
4866                                 return hpsa_cmd_free_and_done(h, c, cmd);
4867                         }
4868                         /* else, fall thru and resubmit down CISS path */
4869                 }
4870         }
4871         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4872         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4873                 /*
4874                  * If we get here, it means dma mapping failed. Try
4875                  * again via scsi mid layer, which will then get
4876                  * SCSI_MLQUEUE_HOST_BUSY.
4877                  *
4878                  * hpsa_ciss_submit will have already freed c
4879                  * if it encountered a dma mapping failure.
4880                  */
4881                 cmd->result = DID_IMM_RETRY << 16;
4882                 cmd->scsi_done(cmd);
4883         }
4884 }
4885
4886 /* Running in struct Scsi_Host->host_lock less mode */
4887 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4888 {
4889         struct ctlr_info *h;
4890         struct hpsa_scsi_dev_t *dev;
4891         unsigned char scsi3addr[8];
4892         struct CommandList *c;
4893         int rc = 0;
4894
4895         /* Get the ptr to our adapter structure out of cmd->host. */
4896         h = sdev_to_hba(cmd->device);
4897
4898         BUG_ON(cmd->request->tag < 0);
4899
4900         dev = cmd->device->hostdata;
4901         if (!dev) {
4902                 cmd->result = DID_NO_CONNECT << 16;
4903                 cmd->scsi_done(cmd);
4904                 return 0;
4905         }
4906
4907         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4908
4909         if (unlikely(lockup_detected(h))) {
4910                 cmd->result = DID_NO_CONNECT << 16;
4911                 cmd->scsi_done(cmd);
4912                 return 0;
4913         }
4914         c = cmd_tagged_alloc(h, cmd);
4915
4916         /*
4917          * Call alternate submit routine for I/O accelerated commands.
4918          * Retries always go down the normal I/O path.
4919          */
4920         if (likely(cmd->retries == 0 &&
4921                 cmd->request->cmd_type == REQ_TYPE_FS &&
4922                 h->acciopath_status)) {
4923                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4924                 if (rc == 0)
4925                         return 0;
4926                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4927                         hpsa_cmd_resolve_and_free(h, c);
4928                         return SCSI_MLQUEUE_HOST_BUSY;
4929                 }
4930         }
4931         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4932 }
4933
4934 static void hpsa_scan_complete(struct ctlr_info *h)
4935 {
4936         unsigned long flags;
4937
4938         spin_lock_irqsave(&h->scan_lock, flags);
4939         h->scan_finished = 1;
4940         wake_up_all(&h->scan_wait_queue);
4941         spin_unlock_irqrestore(&h->scan_lock, flags);
4942 }
4943
4944 static void hpsa_scan_start(struct Scsi_Host *sh)
4945 {
4946         struct ctlr_info *h = shost_to_hba(sh);
4947         unsigned long flags;
4948
4949         /*
4950          * Don't let rescans be initiated on a controller known to be locked
4951          * up.  If the controller locks up *during* a rescan, that thread is
4952          * probably hosed, but at least we can prevent new rescan threads from
4953          * piling up on a locked up controller.
4954          */
4955         if (unlikely(lockup_detected(h)))
4956                 return hpsa_scan_complete(h);
4957
4958         /* wait until any scan already in progress is finished. */
4959         while (1) {
4960                 spin_lock_irqsave(&h->scan_lock, flags);
4961                 if (h->scan_finished)
4962                         break;
4963                 spin_unlock_irqrestore(&h->scan_lock, flags);
4964                 wait_event(h->scan_wait_queue, h->scan_finished);
4965                 /* Note: We don't need to worry about a race between this
4966                  * thread and driver unload because the midlayer will
4967                  * have incremented the reference count, so unload won't
4968                  * happen if we're in here.
4969                  */
4970         }
4971         h->scan_finished = 0; /* mark scan as in progress */
4972         spin_unlock_irqrestore(&h->scan_lock, flags);
4973
4974         if (unlikely(lockup_detected(h)))
4975                 return hpsa_scan_complete(h);
4976
4977         hpsa_update_scsi_devices(h);
4978
4979         hpsa_scan_complete(h);
4980 }
4981
4982 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4983 {
4984         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4985
4986         if (!logical_drive)
4987                 return -ENODEV;
4988
4989         if (qdepth < 1)
4990                 qdepth = 1;
4991         else if (qdepth > logical_drive->queue_depth)
4992                 qdepth = logical_drive->queue_depth;
4993
4994         return scsi_change_queue_depth(sdev, qdepth);
4995 }
4996
4997 static int hpsa_scan_finished(struct Scsi_Host *sh,
4998         unsigned long elapsed_time)
4999 {
5000         struct ctlr_info *h = shost_to_hba(sh);
5001         unsigned long flags;
5002         int finished;
5003
5004         spin_lock_irqsave(&h->scan_lock, flags);
5005         finished = h->scan_finished;
5006         spin_unlock_irqrestore(&h->scan_lock, flags);
5007         return finished;
5008 }
5009
5010 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5011 {
5012         struct Scsi_Host *sh;
5013         int error;
5014
5015         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5016         if (sh == NULL) {
5017                 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5018                 return -ENOMEM;
5019         }
5020
5021         sh->io_port = 0;
5022         sh->n_io_port = 0;
5023         sh->this_id = -1;
5024         sh->max_channel = 3;
5025         sh->max_cmd_len = MAX_COMMAND_SIZE;
5026         sh->max_lun = HPSA_MAX_LUN;
5027         sh->max_id = HPSA_MAX_LUN;
5028         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5029         sh->cmd_per_lun = sh->can_queue;
5030         sh->sg_tablesize = h->maxsgentries;
5031         sh->hostdata[0] = (unsigned long) h;
5032         sh->irq = h->intr[h->intr_mode];
5033         sh->unique_id = sh->irq;
5034         error = scsi_init_shared_tag_map(sh, sh->can_queue);
5035         if (error) {
5036                 dev_err(&h->pdev->dev,
5037                         "%s: scsi_init_shared_tag_map failed for controller %d\n",
5038                         __func__, h->ctlr);
5039                         scsi_host_put(sh);
5040                         return error;
5041         }
5042         h->scsi_host = sh;
5043         return 0;
5044 }
5045
5046 static int hpsa_scsi_add_host(struct ctlr_info *h)
5047 {
5048         int rv;
5049
5050         rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5051         if (rv) {
5052                 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5053                 return rv;
5054         }
5055         scsi_scan_host(h->scsi_host);
5056         return 0;
5057 }
5058
5059 /*
5060  * The block layer has already gone to the trouble of picking out a unique,
5061  * small-integer tag for this request.  We use an offset from that value as
5062  * an index to select our command block.  (The offset allows us to reserve the
5063  * low-numbered entries for our own uses.)
5064  */
5065 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5066 {
5067         int idx = scmd->request->tag;
5068
5069         if (idx < 0)
5070                 return idx;
5071
5072         /* Offset to leave space for internal cmds. */
5073         return idx += HPSA_NRESERVED_CMDS;
5074 }
5075
5076 /*
5077  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5078  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5079  */
5080 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5081                                 struct CommandList *c, unsigned char lunaddr[],
5082                                 int reply_queue)
5083 {
5084         int rc;
5085
5086         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5087         (void) fill_cmd(c, TEST_UNIT_READY, h,
5088                         NULL, 0, 0, lunaddr, TYPE_CMD);
5089         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5090         if (rc)
5091                 return rc;
5092         /* no unmap needed here because no data xfer. */
5093
5094         /* Check if the unit is already ready. */
5095         if (c->err_info->CommandStatus == CMD_SUCCESS)
5096                 return 0;
5097
5098         /*
5099          * The first command sent after reset will receive "unit attention" to
5100          * indicate that the LUN has been reset...this is actually what we're
5101          * looking for (but, success is good too).
5102          */
5103         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5104                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5105                         (c->err_info->SenseInfo[2] == NO_SENSE ||
5106                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5107                 return 0;
5108
5109         return 1;
5110 }
5111
5112 /*
5113  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5114  * returns zero when the unit is ready, and non-zero when giving up.
5115  */
5116 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5117                                 struct CommandList *c,
5118                                 unsigned char lunaddr[], int reply_queue)
5119 {
5120         int rc;
5121         int count = 0;
5122         int waittime = 1; /* seconds */
5123
5124         /* Send test unit ready until device ready, or give up. */
5125         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5126
5127                 /*
5128                  * Wait for a bit.  do this first, because if we send
5129                  * the TUR right away, the reset will just abort it.
5130                  */
5131                 msleep(1000 * waittime);
5132
5133                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5134                 if (!rc)
5135                         break;
5136
5137                 /* Increase wait time with each try, up to a point. */
5138                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5139                         waittime *= 2;
5140
5141                 dev_warn(&h->pdev->dev,
5142                          "waiting %d secs for device to become ready.\n",
5143                          waittime);
5144         }
5145
5146         return rc;
5147 }
5148
5149 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5150                                            unsigned char lunaddr[],
5151                                            int reply_queue)
5152 {
5153         int first_queue;
5154         int last_queue;
5155         int rq;
5156         int rc = 0;
5157         struct CommandList *c;
5158
5159         c = cmd_alloc(h);
5160
5161         /*
5162          * If no specific reply queue was requested, then send the TUR
5163          * repeatedly, requesting a reply on each reply queue; otherwise execute
5164          * the loop exactly once using only the specified queue.
5165          */
5166         if (reply_queue == DEFAULT_REPLY_QUEUE) {
5167                 first_queue = 0;
5168                 last_queue = h->nreply_queues - 1;
5169         } else {
5170                 first_queue = reply_queue;
5171                 last_queue = reply_queue;
5172         }
5173
5174         for (rq = first_queue; rq <= last_queue; rq++) {
5175                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5176                 if (rc)
5177                         break;
5178         }
5179
5180         if (rc)
5181                 dev_warn(&h->pdev->dev, "giving up on device.\n");
5182         else
5183                 dev_warn(&h->pdev->dev, "device is ready.\n");
5184
5185         cmd_free(h, c);
5186         return rc;
5187 }
5188
5189 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5190  * complaining.  Doing a host- or bus-reset can't do anything good here.
5191  */
5192 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5193 {
5194         int rc;
5195         struct ctlr_info *h;
5196         struct hpsa_scsi_dev_t *dev;
5197         char msg[48];
5198
5199         /* find the controller to which the command to be aborted was sent */
5200         h = sdev_to_hba(scsicmd->device);
5201         if (h == NULL) /* paranoia */
5202                 return FAILED;
5203
5204         if (lockup_detected(h))
5205                 return FAILED;
5206
5207         dev = scsicmd->device->hostdata;
5208         if (!dev) {
5209                 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5210                 return FAILED;
5211         }
5212
5213         /* if controller locked up, we can guarantee command won't complete */
5214         if (lockup_detected(h)) {
5215                 snprintf(msg, sizeof(msg),
5216                          "cmd %d RESET FAILED, lockup detected",
5217                          hpsa_get_cmd_index(scsicmd));
5218                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5219                 return FAILED;
5220         }
5221
5222         /* this reset request might be the result of a lockup; check */
5223         if (detect_controller_lockup(h)) {
5224                 snprintf(msg, sizeof(msg),
5225                          "cmd %d RESET FAILED, new lockup detected",
5226                          hpsa_get_cmd_index(scsicmd));
5227                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5228                 return FAILED;
5229         }
5230
5231         /* Do not attempt on controller */
5232         if (is_hba_lunid(dev->scsi3addr))
5233                 return SUCCESS;
5234
5235         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
5236
5237         /* send a reset to the SCSI LUN which the command was sent to */
5238         rc = hpsa_do_reset(h, dev, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
5239                            DEFAULT_REPLY_QUEUE);
5240         snprintf(msg, sizeof(msg), "reset %s",
5241                  rc == 0 ? "completed successfully" : "failed");
5242         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5243         return rc == 0 ? SUCCESS : FAILED;
5244 }
5245
5246 static void swizzle_abort_tag(u8 *tag)
5247 {
5248         u8 original_tag[8];
5249
5250         memcpy(original_tag, tag, 8);
5251         tag[0] = original_tag[3];
5252         tag[1] = original_tag[2];
5253         tag[2] = original_tag[1];
5254         tag[3] = original_tag[0];
5255         tag[4] = original_tag[7];
5256         tag[5] = original_tag[6];
5257         tag[6] = original_tag[5];
5258         tag[7] = original_tag[4];
5259 }
5260
5261 static void hpsa_get_tag(struct ctlr_info *h,
5262         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5263 {
5264         u64 tag;
5265         if (c->cmd_type == CMD_IOACCEL1) {
5266                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5267                         &h->ioaccel_cmd_pool[c->cmdindex];
5268                 tag = le64_to_cpu(cm1->tag);
5269                 *tagupper = cpu_to_le32(tag >> 32);
5270                 *taglower = cpu_to_le32(tag);
5271                 return;
5272         }
5273         if (c->cmd_type == CMD_IOACCEL2) {
5274                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5275                         &h->ioaccel2_cmd_pool[c->cmdindex];
5276                 /* upper tag not used in ioaccel2 mode */
5277                 memset(tagupper, 0, sizeof(*tagupper));
5278                 *taglower = cm2->Tag;
5279                 return;
5280         }
5281         tag = le64_to_cpu(c->Header.tag);
5282         *tagupper = cpu_to_le32(tag >> 32);
5283         *taglower = cpu_to_le32(tag);
5284 }
5285
5286 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5287         struct CommandList *abort, int reply_queue)
5288 {
5289         int rc = IO_OK;
5290         struct CommandList *c;
5291         struct ErrorInfo *ei;
5292         __le32 tagupper, taglower;
5293
5294         c = cmd_alloc(h);
5295
5296         /* fill_cmd can't fail here, no buffer to map */
5297         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5298                 0, 0, scsi3addr, TYPE_MSG);
5299         if (h->needs_abort_tags_swizzled)
5300                 swizzle_abort_tag(&c->Request.CDB[4]);
5301         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5302         hpsa_get_tag(h, abort, &taglower, &tagupper);
5303         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5304                 __func__, tagupper, taglower);
5305         /* no unmap needed here because no data xfer. */
5306
5307         ei = c->err_info;
5308         switch (ei->CommandStatus) {
5309         case CMD_SUCCESS:
5310                 break;
5311         case CMD_TMF_STATUS:
5312                 rc = hpsa_evaluate_tmf_status(h, c);
5313                 break;
5314         case CMD_UNABORTABLE: /* Very common, don't make noise. */
5315                 rc = -1;
5316                 break;
5317         default:
5318                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5319                         __func__, tagupper, taglower);
5320                 hpsa_scsi_interpret_error(h, c);
5321                 rc = -1;
5322                 break;
5323         }
5324         cmd_free(h, c);
5325         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5326                 __func__, tagupper, taglower);
5327         return rc;
5328 }
5329
5330 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5331         struct CommandList *command_to_abort, int reply_queue)
5332 {
5333         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5334         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5335         struct io_accel2_cmd *c2a =
5336                 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5337         struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5338         struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5339
5340         /*
5341          * We're overlaying struct hpsa_tmf_struct on top of something which
5342          * was allocated as a struct io_accel2_cmd, so we better be sure it
5343          * actually fits, and doesn't overrun the error info space.
5344          */
5345         BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5346                         sizeof(struct io_accel2_cmd));
5347         BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5348                         offsetof(struct hpsa_tmf_struct, error_len) +
5349                                 sizeof(ac->error_len));
5350
5351         c->cmd_type = IOACCEL2_TMF;
5352         c->scsi_cmd = SCSI_CMD_BUSY;
5353
5354         /* Adjust the DMA address to point to the accelerated command buffer */
5355         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5356                                 (c->cmdindex * sizeof(struct io_accel2_cmd));
5357         BUG_ON(c->busaddr & 0x0000007F);
5358
5359         memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5360         ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5361         ac->reply_queue = reply_queue;
5362         ac->tmf = IOACCEL2_TMF_ABORT;
5363         ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5364         memset(ac->lun_id, 0, sizeof(ac->lun_id));
5365         ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5366         ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5367         ac->error_ptr = cpu_to_le64(c->busaddr +
5368                         offsetof(struct io_accel2_cmd, error_data));
5369         ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5370 }
5371
5372 /* ioaccel2 path firmware cannot handle abort task requests.
5373  * Change abort requests to physical target reset, and send to the
5374  * address of the physical disk used for the ioaccel 2 command.
5375  * Return 0 on success (IO_OK)
5376  *       -1 on failure
5377  */
5378
5379 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5380         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5381 {
5382         int rc = IO_OK;
5383         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5384         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5385         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5386         unsigned char *psa = &phys_scsi3addr[0];
5387
5388         /* Get a pointer to the hpsa logical device. */
5389         scmd = abort->scsi_cmd;
5390         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5391         if (dev == NULL) {
5392                 dev_warn(&h->pdev->dev,
5393                         "Cannot abort: no device pointer for command.\n");
5394                         return -1; /* not abortable */
5395         }
5396
5397         if (h->raid_offload_debug > 0)
5398                 dev_info(&h->pdev->dev,
5399                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5400                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5401                         "Reset as abort",
5402                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5403                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5404
5405         if (!dev->offload_enabled) {
5406                 dev_warn(&h->pdev->dev,
5407                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5408                 return -1; /* not abortable */
5409         }
5410
5411         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5412         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5413                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5414                 return -1; /* not abortable */
5415         }
5416
5417         /* send the reset */
5418         if (h->raid_offload_debug > 0)
5419                 dev_info(&h->pdev->dev,
5420                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5421                         psa[0], psa[1], psa[2], psa[3],
5422                         psa[4], psa[5], psa[6], psa[7]);
5423         rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5424         if (rc != 0) {
5425                 dev_warn(&h->pdev->dev,
5426                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5427                         psa[0], psa[1], psa[2], psa[3],
5428                         psa[4], psa[5], psa[6], psa[7]);
5429                 return rc; /* failed to reset */
5430         }
5431
5432         /* wait for device to recover */
5433         if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5434                 dev_warn(&h->pdev->dev,
5435                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5436                         psa[0], psa[1], psa[2], psa[3],
5437                         psa[4], psa[5], psa[6], psa[7]);
5438                 return -1;  /* failed to recover */
5439         }
5440
5441         /* device recovered */
5442         dev_info(&h->pdev->dev,
5443                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5444                 psa[0], psa[1], psa[2], psa[3],
5445                 psa[4], psa[5], psa[6], psa[7]);
5446
5447         return rc; /* success */
5448 }
5449
5450 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5451         struct CommandList *abort, int reply_queue)
5452 {
5453         int rc = IO_OK;
5454         struct CommandList *c;
5455         __le32 taglower, tagupper;
5456         struct hpsa_scsi_dev_t *dev;
5457         struct io_accel2_cmd *c2;
5458
5459         dev = abort->scsi_cmd->device->hostdata;
5460         if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5461                 return -1;
5462
5463         c = cmd_alloc(h);
5464         setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5465         c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5466         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5467         hpsa_get_tag(h, abort, &taglower, &tagupper);
5468         dev_dbg(&h->pdev->dev,
5469                 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5470                 __func__, tagupper, taglower);
5471         /* no unmap needed here because no data xfer. */
5472
5473         dev_dbg(&h->pdev->dev,
5474                 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5475                 __func__, tagupper, taglower, c2->error_data.serv_response);
5476         switch (c2->error_data.serv_response) {
5477         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5478         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5479                 rc = 0;
5480                 break;
5481         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5482         case IOACCEL2_SERV_RESPONSE_FAILURE:
5483         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5484                 rc = -1;
5485                 break;
5486         default:
5487                 dev_warn(&h->pdev->dev,
5488                         "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5489                         __func__, tagupper, taglower,
5490                         c2->error_data.serv_response);
5491                 rc = -1;
5492         }
5493         cmd_free(h, c);
5494         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5495                 tagupper, taglower);
5496         return rc;
5497 }
5498
5499 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5500         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5501 {
5502         /*
5503          * ioccelerator mode 2 commands should be aborted via the
5504          * accelerated path, since RAID path is unaware of these commands,
5505          * but not all underlying firmware can handle abort TMF.
5506          * Change abort to physical device reset when abort TMF is unsupported.
5507          */
5508         if (abort->cmd_type == CMD_IOACCEL2) {
5509                 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5510                         return hpsa_send_abort_ioaccel2(h, abort,
5511                                                 reply_queue);
5512                 else
5513                         return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5514                                                         abort, reply_queue);
5515         }
5516         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5517 }
5518
5519 /* Find out which reply queue a command was meant to return on */
5520 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5521                                         struct CommandList *c)
5522 {
5523         if (c->cmd_type == CMD_IOACCEL2)
5524                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5525         return c->Header.ReplyQueue;
5526 }
5527
5528 /*
5529  * Limit concurrency of abort commands to prevent
5530  * over-subscription of commands
5531  */
5532 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5533 {
5534 #define ABORT_CMD_WAIT_MSECS 5000
5535         return !wait_event_timeout(h->abort_cmd_wait_queue,
5536                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5537                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5538 }
5539
5540 /* Send an abort for the specified command.
5541  *      If the device and controller support it,
5542  *              send a task abort request.
5543  */
5544 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5545 {
5546
5547         int rc;
5548         struct ctlr_info *h;
5549         struct hpsa_scsi_dev_t *dev;
5550         struct CommandList *abort; /* pointer to command to be aborted */
5551         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
5552         char msg[256];          /* For debug messaging. */
5553         int ml = 0;
5554         __le32 tagupper, taglower;
5555         int refcount, reply_queue;
5556
5557         if (sc == NULL)
5558                 return FAILED;
5559
5560         if (sc->device == NULL)
5561                 return FAILED;
5562
5563         /* Find the controller of the command to be aborted */
5564         h = sdev_to_hba(sc->device);
5565         if (h == NULL)
5566                 return FAILED;
5567
5568         /* Find the device of the command to be aborted */
5569         dev = sc->device->hostdata;
5570         if (!dev) {
5571                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5572                                 msg);
5573                 return FAILED;
5574         }
5575
5576         /* If controller locked up, we can guarantee command won't complete */
5577         if (lockup_detected(h)) {
5578                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5579                                         "ABORT FAILED, lockup detected");
5580                 return FAILED;
5581         }
5582
5583         /* This is a good time to check if controller lockup has occurred */
5584         if (detect_controller_lockup(h)) {
5585                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5586                                         "ABORT FAILED, new lockup detected");
5587                 return FAILED;
5588         }
5589
5590         /* Check that controller supports some kind of task abort */
5591         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5592                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5593                 return FAILED;
5594
5595         memset(msg, 0, sizeof(msg));
5596         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5597                 h->scsi_host->host_no, sc->device->channel,
5598                 sc->device->id, sc->device->lun,
5599                 "Aborting command", sc);
5600
5601         /* Get SCSI command to be aborted */
5602         abort = (struct CommandList *) sc->host_scribble;
5603         if (abort == NULL) {
5604                 /* This can happen if the command already completed. */
5605                 return SUCCESS;
5606         }
5607         refcount = atomic_inc_return(&abort->refcount);
5608         if (refcount == 1) { /* Command is done already. */
5609                 cmd_free(h, abort);
5610                 return SUCCESS;
5611         }
5612
5613         /* Don't bother trying the abort if we know it won't work. */
5614         if (abort->cmd_type != CMD_IOACCEL2 &&
5615                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5616                 cmd_free(h, abort);
5617                 return FAILED;
5618         }
5619
5620         /*
5621          * Check that we're aborting the right command.
5622          * It's possible the CommandList already completed and got re-used.
5623          */
5624         if (abort->scsi_cmd != sc) {
5625                 cmd_free(h, abort);
5626                 return SUCCESS;
5627         }
5628
5629         abort->abort_pending = true;
5630         hpsa_get_tag(h, abort, &taglower, &tagupper);
5631         reply_queue = hpsa_extract_reply_queue(h, abort);
5632         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5633         as  = abort->scsi_cmd;
5634         if (as != NULL)
5635                 ml += sprintf(msg+ml,
5636                         "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5637                         as->cmd_len, as->cmnd[0], as->cmnd[1],
5638                         as->serial_number);
5639         dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5640         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5641
5642         /*
5643          * Command is in flight, or possibly already completed
5644          * by the firmware (but not to the scsi mid layer) but we can't
5645          * distinguish which.  Send the abort down.
5646          */
5647         if (wait_for_available_abort_cmd(h)) {
5648                 dev_warn(&h->pdev->dev,
5649                         "%s FAILED, timeout waiting for an abort command to become available.\n",
5650                         msg);
5651                 cmd_free(h, abort);
5652                 return FAILED;
5653         }
5654         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5655         atomic_inc(&h->abort_cmds_available);
5656         wake_up_all(&h->abort_cmd_wait_queue);
5657         if (rc != 0) {
5658                 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5659                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5660                                 "FAILED to abort command");
5661                 cmd_free(h, abort);
5662                 return FAILED;
5663         }
5664         dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5665         wait_event(h->event_sync_wait_queue,
5666                    abort->scsi_cmd != sc || lockup_detected(h));
5667         cmd_free(h, abort);
5668         return !lockup_detected(h) ? SUCCESS : FAILED;
5669 }
5670
5671 /*
5672  * For operations with an associated SCSI command, a command block is allocated
5673  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5674  * block request tag as an index into a table of entries.  cmd_tagged_free() is
5675  * the complement, although cmd_free() may be called instead.
5676  */
5677 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5678                                             struct scsi_cmnd *scmd)
5679 {
5680         int idx = hpsa_get_cmd_index(scmd);
5681         struct CommandList *c = h->cmd_pool + idx;
5682
5683         if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5684                 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5685                         idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5686                 /* The index value comes from the block layer, so if it's out of
5687                  * bounds, it's probably not our bug.
5688                  */
5689                 BUG();
5690         }
5691
5692         atomic_inc(&c->refcount);
5693         if (unlikely(!hpsa_is_cmd_idle(c))) {
5694                 /*
5695                  * We expect that the SCSI layer will hand us a unique tag
5696                  * value.  Thus, there should never be a collision here between
5697                  * two requests...because if the selected command isn't idle
5698                  * then someone is going to be very disappointed.
5699                  */
5700                 dev_err(&h->pdev->dev,
5701                         "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5702                         idx);
5703                 if (c->scsi_cmd != NULL)
5704                         scsi_print_command(c->scsi_cmd);
5705                 scsi_print_command(scmd);
5706         }
5707
5708         hpsa_cmd_partial_init(h, idx, c);
5709         return c;
5710 }
5711
5712 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5713 {
5714         /*
5715          * Release our reference to the block.  We don't need to do anything
5716          * else to free it, because it is accessed by index.  (There's no point
5717          * in checking the result of the decrement, since we cannot guarantee
5718          * that there isn't a concurrent abort which is also accessing it.)
5719          */
5720         (void)atomic_dec(&c->refcount);
5721 }
5722
5723 /*
5724  * For operations that cannot sleep, a command block is allocated at init,
5725  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5726  * which ones are free or in use.  Lock must be held when calling this.
5727  * cmd_free() is the complement.
5728  * This function never gives up and returns NULL.  If it hangs,
5729  * another thread must call cmd_free() to free some tags.
5730  */
5731
5732 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5733 {
5734         struct CommandList *c;
5735         int refcount, i;
5736         int offset = 0;
5737
5738         /*
5739          * There is some *extremely* small but non-zero chance that that
5740          * multiple threads could get in here, and one thread could
5741          * be scanning through the list of bits looking for a free
5742          * one, but the free ones are always behind him, and other
5743          * threads sneak in behind him and eat them before he can
5744          * get to them, so that while there is always a free one, a
5745          * very unlucky thread might be starved anyway, never able to
5746          * beat the other threads.  In reality, this happens so
5747          * infrequently as to be indistinguishable from never.
5748          *
5749          * Note that we start allocating commands before the SCSI host structure
5750          * is initialized.  Since the search starts at bit zero, this
5751          * all works, since we have at least one command structure available;
5752          * however, it means that the structures with the low indexes have to be
5753          * reserved for driver-initiated requests, while requests from the block
5754          * layer will use the higher indexes.
5755          */
5756
5757         for (;;) {
5758                 i = find_next_zero_bit(h->cmd_pool_bits,
5759                                         HPSA_NRESERVED_CMDS,
5760                                         offset);
5761                 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5762                         offset = 0;
5763                         continue;
5764                 }
5765                 c = h->cmd_pool + i;
5766                 refcount = atomic_inc_return(&c->refcount);
5767                 if (unlikely(refcount > 1)) {
5768                         cmd_free(h, c); /* already in use */
5769                         offset = (i + 1) % HPSA_NRESERVED_CMDS;
5770                         continue;
5771                 }
5772                 set_bit(i & (BITS_PER_LONG - 1),
5773                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5774                 break; /* it's ours now. */
5775         }
5776         hpsa_cmd_partial_init(h, i, c);
5777         return c;
5778 }
5779
5780 /*
5781  * This is the complementary operation to cmd_alloc().  Note, however, in some
5782  * corner cases it may also be used to free blocks allocated by
5783  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
5784  * the clear-bit is harmless.
5785  */
5786 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5787 {
5788         if (atomic_dec_and_test(&c->refcount)) {
5789                 int i;
5790
5791                 i = c - h->cmd_pool;
5792                 clear_bit(i & (BITS_PER_LONG - 1),
5793                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5794         }
5795 }
5796
5797 #ifdef CONFIG_COMPAT
5798
5799 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5800         void __user *arg)
5801 {
5802         IOCTL32_Command_struct __user *arg32 =
5803             (IOCTL32_Command_struct __user *) arg;
5804         IOCTL_Command_struct arg64;
5805         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5806         int err;
5807         u32 cp;
5808
5809         memset(&arg64, 0, sizeof(arg64));
5810         err = 0;
5811         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5812                            sizeof(arg64.LUN_info));
5813         err |= copy_from_user(&arg64.Request, &arg32->Request,
5814                            sizeof(arg64.Request));
5815         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5816                            sizeof(arg64.error_info));
5817         err |= get_user(arg64.buf_size, &arg32->buf_size);
5818         err |= get_user(cp, &arg32->buf);
5819         arg64.buf = compat_ptr(cp);
5820         err |= copy_to_user(p, &arg64, sizeof(arg64));
5821
5822         if (err)
5823                 return -EFAULT;
5824
5825         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5826         if (err)
5827                 return err;
5828         err |= copy_in_user(&arg32->error_info, &p->error_info,
5829                          sizeof(arg32->error_info));
5830         if (err)
5831                 return -EFAULT;
5832         return err;
5833 }
5834
5835 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5836         int cmd, void __user *arg)
5837 {
5838         BIG_IOCTL32_Command_struct __user *arg32 =
5839             (BIG_IOCTL32_Command_struct __user *) arg;
5840         BIG_IOCTL_Command_struct arg64;
5841         BIG_IOCTL_Command_struct __user *p =
5842             compat_alloc_user_space(sizeof(arg64));
5843         int err;
5844         u32 cp;
5845
5846         memset(&arg64, 0, sizeof(arg64));
5847         err = 0;
5848         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5849                            sizeof(arg64.LUN_info));
5850         err |= copy_from_user(&arg64.Request, &arg32->Request,
5851                            sizeof(arg64.Request));
5852         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5853                            sizeof(arg64.error_info));
5854         err |= get_user(arg64.buf_size, &arg32->buf_size);
5855         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5856         err |= get_user(cp, &arg32->buf);
5857         arg64.buf = compat_ptr(cp);
5858         err |= copy_to_user(p, &arg64, sizeof(arg64));
5859
5860         if (err)
5861                 return -EFAULT;
5862
5863         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5864         if (err)
5865                 return err;
5866         err |= copy_in_user(&arg32->error_info, &p->error_info,
5867                          sizeof(arg32->error_info));
5868         if (err)
5869                 return -EFAULT;
5870         return err;
5871 }
5872
5873 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5874 {
5875         switch (cmd) {
5876         case CCISS_GETPCIINFO:
5877         case CCISS_GETINTINFO:
5878         case CCISS_SETINTINFO:
5879         case CCISS_GETNODENAME:
5880         case CCISS_SETNODENAME:
5881         case CCISS_GETHEARTBEAT:
5882         case CCISS_GETBUSTYPES:
5883         case CCISS_GETFIRMVER:
5884         case CCISS_GETDRIVVER:
5885         case CCISS_REVALIDVOLS:
5886         case CCISS_DEREGDISK:
5887         case CCISS_REGNEWDISK:
5888         case CCISS_REGNEWD:
5889         case CCISS_RESCANDISK:
5890         case CCISS_GETLUNINFO:
5891                 return hpsa_ioctl(dev, cmd, arg);
5892
5893         case CCISS_PASSTHRU32:
5894                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5895         case CCISS_BIG_PASSTHRU32:
5896                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5897
5898         default:
5899                 return -ENOIOCTLCMD;
5900         }
5901 }
5902 #endif
5903
5904 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5905 {
5906         struct hpsa_pci_info pciinfo;
5907
5908         if (!argp)
5909                 return -EINVAL;
5910         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5911         pciinfo.bus = h->pdev->bus->number;
5912         pciinfo.dev_fn = h->pdev->devfn;
5913         pciinfo.board_id = h->board_id;
5914         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5915                 return -EFAULT;
5916         return 0;
5917 }
5918
5919 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5920 {
5921         DriverVer_type DriverVer;
5922         unsigned char vmaj, vmin, vsubmin;
5923         int rc;
5924
5925         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5926                 &vmaj, &vmin, &vsubmin);
5927         if (rc != 3) {
5928                 dev_info(&h->pdev->dev, "driver version string '%s' "
5929                         "unrecognized.", HPSA_DRIVER_VERSION);
5930                 vmaj = 0;
5931                 vmin = 0;
5932                 vsubmin = 0;
5933         }
5934         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5935         if (!argp)
5936                 return -EINVAL;
5937         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5938                 return -EFAULT;
5939         return 0;
5940 }
5941
5942 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5943 {
5944         IOCTL_Command_struct iocommand;
5945         struct CommandList *c;
5946         char *buff = NULL;
5947         u64 temp64;
5948         int rc = 0;
5949
5950         if (!argp)
5951                 return -EINVAL;
5952         if (!capable(CAP_SYS_RAWIO))
5953                 return -EPERM;
5954         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5955                 return -EFAULT;
5956         if ((iocommand.buf_size < 1) &&
5957             (iocommand.Request.Type.Direction != XFER_NONE)) {
5958                 return -EINVAL;
5959         }
5960         if (iocommand.buf_size > 0) {
5961                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5962                 if (buff == NULL)
5963                         return -ENOMEM;
5964                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5965                         /* Copy the data into the buffer we created */
5966                         if (copy_from_user(buff, iocommand.buf,
5967                                 iocommand.buf_size)) {
5968                                 rc = -EFAULT;
5969                                 goto out_kfree;
5970                         }
5971                 } else {
5972                         memset(buff, 0, iocommand.buf_size);
5973                 }
5974         }
5975         c = cmd_alloc(h);
5976
5977         /* Fill in the command type */
5978         c->cmd_type = CMD_IOCTL_PEND;
5979         c->scsi_cmd = SCSI_CMD_BUSY;
5980         /* Fill in Command Header */
5981         c->Header.ReplyQueue = 0; /* unused in simple mode */
5982         if (iocommand.buf_size > 0) {   /* buffer to fill */
5983                 c->Header.SGList = 1;
5984                 c->Header.SGTotal = cpu_to_le16(1);
5985         } else  { /* no buffers to fill */
5986                 c->Header.SGList = 0;
5987                 c->Header.SGTotal = cpu_to_le16(0);
5988         }
5989         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5990
5991         /* Fill in Request block */
5992         memcpy(&c->Request, &iocommand.Request,
5993                 sizeof(c->Request));
5994
5995         /* Fill in the scatter gather information */
5996         if (iocommand.buf_size > 0) {
5997                 temp64 = pci_map_single(h->pdev, buff,
5998                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5999                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6000                         c->SG[0].Addr = cpu_to_le64(0);
6001                         c->SG[0].Len = cpu_to_le32(0);
6002                         rc = -ENOMEM;
6003                         goto out;
6004                 }
6005                 c->SG[0].Addr = cpu_to_le64(temp64);
6006                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6007                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6008         }
6009         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6010         if (iocommand.buf_size > 0)
6011                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6012         check_ioctl_unit_attention(h, c);
6013         if (rc) {
6014                 rc = -EIO;
6015                 goto out;
6016         }
6017
6018         /* Copy the error information out */
6019         memcpy(&iocommand.error_info, c->err_info,
6020                 sizeof(iocommand.error_info));
6021         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6022                 rc = -EFAULT;
6023                 goto out;
6024         }
6025         if ((iocommand.Request.Type.Direction & XFER_READ) &&
6026                 iocommand.buf_size > 0) {
6027                 /* Copy the data out of the buffer we created */
6028                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6029                         rc = -EFAULT;
6030                         goto out;
6031                 }
6032         }
6033 out:
6034         cmd_free(h, c);
6035 out_kfree:
6036         kfree(buff);
6037         return rc;
6038 }
6039
6040 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6041 {
6042         BIG_IOCTL_Command_struct *ioc;
6043         struct CommandList *c;
6044         unsigned char **buff = NULL;
6045         int *buff_size = NULL;
6046         u64 temp64;
6047         BYTE sg_used = 0;
6048         int status = 0;
6049         u32 left;
6050         u32 sz;
6051         BYTE __user *data_ptr;
6052
6053         if (!argp)
6054                 return -EINVAL;
6055         if (!capable(CAP_SYS_RAWIO))
6056                 return -EPERM;
6057         ioc = (BIG_IOCTL_Command_struct *)
6058             kmalloc(sizeof(*ioc), GFP_KERNEL);
6059         if (!ioc) {
6060                 status = -ENOMEM;
6061                 goto cleanup1;
6062         }
6063         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6064                 status = -EFAULT;
6065                 goto cleanup1;
6066         }
6067         if ((ioc->buf_size < 1) &&
6068             (ioc->Request.Type.Direction != XFER_NONE)) {
6069                 status = -EINVAL;
6070                 goto cleanup1;
6071         }
6072         /* Check kmalloc limits  using all SGs */
6073         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6074                 status = -EINVAL;
6075                 goto cleanup1;
6076         }
6077         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6078                 status = -EINVAL;
6079                 goto cleanup1;
6080         }
6081         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6082         if (!buff) {
6083                 status = -ENOMEM;
6084                 goto cleanup1;
6085         }
6086         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6087         if (!buff_size) {
6088                 status = -ENOMEM;
6089                 goto cleanup1;
6090         }
6091         left = ioc->buf_size;
6092         data_ptr = ioc->buf;
6093         while (left) {
6094                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6095                 buff_size[sg_used] = sz;
6096                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6097                 if (buff[sg_used] == NULL) {
6098                         status = -ENOMEM;
6099                         goto cleanup1;
6100                 }
6101                 if (ioc->Request.Type.Direction & XFER_WRITE) {
6102                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6103                                 status = -EFAULT;
6104                                 goto cleanup1;
6105                         }
6106                 } else
6107                         memset(buff[sg_used], 0, sz);
6108                 left -= sz;
6109                 data_ptr += sz;
6110                 sg_used++;
6111         }
6112         c = cmd_alloc(h);
6113
6114         c->cmd_type = CMD_IOCTL_PEND;
6115         c->scsi_cmd = SCSI_CMD_BUSY;
6116         c->Header.ReplyQueue = 0;
6117         c->Header.SGList = (u8) sg_used;
6118         c->Header.SGTotal = cpu_to_le16(sg_used);
6119         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6120         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6121         if (ioc->buf_size > 0) {
6122                 int i;
6123                 for (i = 0; i < sg_used; i++) {
6124                         temp64 = pci_map_single(h->pdev, buff[i],
6125                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
6126                         if (dma_mapping_error(&h->pdev->dev,
6127                                                         (dma_addr_t) temp64)) {
6128                                 c->SG[i].Addr = cpu_to_le64(0);
6129                                 c->SG[i].Len = cpu_to_le32(0);
6130                                 hpsa_pci_unmap(h->pdev, c, i,
6131                                         PCI_DMA_BIDIRECTIONAL);
6132                                 status = -ENOMEM;
6133                                 goto cleanup0;
6134                         }
6135                         c->SG[i].Addr = cpu_to_le64(temp64);
6136                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
6137                         c->SG[i].Ext = cpu_to_le32(0);
6138                 }
6139                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6140         }
6141         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6142         if (sg_used)
6143                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6144         check_ioctl_unit_attention(h, c);
6145         if (status) {
6146                 status = -EIO;
6147                 goto cleanup0;
6148         }
6149
6150         /* Copy the error information out */
6151         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6152         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6153                 status = -EFAULT;
6154                 goto cleanup0;
6155         }
6156         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6157                 int i;
6158
6159                 /* Copy the data out of the buffer we created */
6160                 BYTE __user *ptr = ioc->buf;
6161                 for (i = 0; i < sg_used; i++) {
6162                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
6163                                 status = -EFAULT;
6164                                 goto cleanup0;
6165                         }
6166                         ptr += buff_size[i];
6167                 }
6168         }
6169         status = 0;
6170 cleanup0:
6171         cmd_free(h, c);
6172 cleanup1:
6173         if (buff) {
6174                 int i;
6175
6176                 for (i = 0; i < sg_used; i++)
6177                         kfree(buff[i]);
6178                 kfree(buff);
6179         }
6180         kfree(buff_size);
6181         kfree(ioc);
6182         return status;
6183 }
6184
6185 static void check_ioctl_unit_attention(struct ctlr_info *h,
6186         struct CommandList *c)
6187 {
6188         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6189                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6190                 (void) check_for_unit_attention(h, c);
6191 }
6192
6193 /*
6194  * ioctl
6195  */
6196 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6197 {
6198         struct ctlr_info *h;
6199         void __user *argp = (void __user *)arg;
6200         int rc;
6201
6202         h = sdev_to_hba(dev);
6203
6204         switch (cmd) {
6205         case CCISS_DEREGDISK:
6206         case CCISS_REGNEWDISK:
6207         case CCISS_REGNEWD:
6208                 hpsa_scan_start(h->scsi_host);
6209                 return 0;
6210         case CCISS_GETPCIINFO:
6211                 return hpsa_getpciinfo_ioctl(h, argp);
6212         case CCISS_GETDRIVVER:
6213                 return hpsa_getdrivver_ioctl(h, argp);
6214         case CCISS_PASSTHRU:
6215                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6216                         return -EAGAIN;
6217                 rc = hpsa_passthru_ioctl(h, argp);
6218                 atomic_inc(&h->passthru_cmds_avail);
6219                 return rc;
6220         case CCISS_BIG_PASSTHRU:
6221                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6222                         return -EAGAIN;
6223                 rc = hpsa_big_passthru_ioctl(h, argp);
6224                 atomic_inc(&h->passthru_cmds_avail);
6225                 return rc;
6226         default:
6227                 return -ENOTTY;
6228         }
6229 }
6230
6231 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6232                                 u8 reset_type)
6233 {
6234         struct CommandList *c;
6235
6236         c = cmd_alloc(h);
6237
6238         /* fill_cmd can't fail here, no data buffer to map */
6239         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6240                 RAID_CTLR_LUNID, TYPE_MSG);
6241         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6242         c->waiting = NULL;
6243         enqueue_cmd_and_start_io(h, c);
6244         /* Don't wait for completion, the reset won't complete.  Don't free
6245          * the command either.  This is the last command we will send before
6246          * re-initializing everything, so it doesn't matter and won't leak.
6247          */
6248         return;
6249 }
6250
6251 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6252         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6253         int cmd_type)
6254 {
6255         int pci_dir = XFER_NONE;
6256         u64 tag; /* for commands to be aborted */
6257
6258         c->cmd_type = CMD_IOCTL_PEND;
6259         c->scsi_cmd = SCSI_CMD_BUSY;
6260         c->Header.ReplyQueue = 0;
6261         if (buff != NULL && size > 0) {
6262                 c->Header.SGList = 1;
6263                 c->Header.SGTotal = cpu_to_le16(1);
6264         } else {
6265                 c->Header.SGList = 0;
6266                 c->Header.SGTotal = cpu_to_le16(0);
6267         }
6268         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6269
6270         if (cmd_type == TYPE_CMD) {
6271                 switch (cmd) {
6272                 case HPSA_INQUIRY:
6273                         /* are we trying to read a vital product page */
6274                         if (page_code & VPD_PAGE) {
6275                                 c->Request.CDB[1] = 0x01;
6276                                 c->Request.CDB[2] = (page_code & 0xff);
6277                         }
6278                         c->Request.CDBLen = 6;
6279                         c->Request.type_attr_dir =
6280                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6281                         c->Request.Timeout = 0;
6282                         c->Request.CDB[0] = HPSA_INQUIRY;
6283                         c->Request.CDB[4] = size & 0xFF;
6284                         break;
6285                 case HPSA_REPORT_LOG:
6286                 case HPSA_REPORT_PHYS:
6287                         /* Talking to controller so It's a physical command
6288                            mode = 00 target = 0.  Nothing to write.
6289                          */
6290                         c->Request.CDBLen = 12;
6291                         c->Request.type_attr_dir =
6292                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6293                         c->Request.Timeout = 0;
6294                         c->Request.CDB[0] = cmd;
6295                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6296                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6297                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6298                         c->Request.CDB[9] = size & 0xFF;
6299                         break;
6300                 case HPSA_CACHE_FLUSH:
6301                         c->Request.CDBLen = 12;
6302                         c->Request.type_attr_dir =
6303                                         TYPE_ATTR_DIR(cmd_type,
6304                                                 ATTR_SIMPLE, XFER_WRITE);
6305                         c->Request.Timeout = 0;
6306                         c->Request.CDB[0] = BMIC_WRITE;
6307                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6308                         c->Request.CDB[7] = (size >> 8) & 0xFF;
6309                         c->Request.CDB[8] = size & 0xFF;
6310                         break;
6311                 case TEST_UNIT_READY:
6312                         c->Request.CDBLen = 6;
6313                         c->Request.type_attr_dir =
6314                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6315                         c->Request.Timeout = 0;
6316                         break;
6317                 case HPSA_GET_RAID_MAP:
6318                         c->Request.CDBLen = 12;
6319                         c->Request.type_attr_dir =
6320                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6321                         c->Request.Timeout = 0;
6322                         c->Request.CDB[0] = HPSA_CISS_READ;
6323                         c->Request.CDB[1] = cmd;
6324                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6325                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6326                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6327                         c->Request.CDB[9] = size & 0xFF;
6328                         break;
6329                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6330                         c->Request.CDBLen = 10;
6331                         c->Request.type_attr_dir =
6332                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6333                         c->Request.Timeout = 0;
6334                         c->Request.CDB[0] = BMIC_READ;
6335                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6336                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6337                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6338                         break;
6339                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6340                         c->Request.CDBLen = 10;
6341                         c->Request.type_attr_dir =
6342                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6343                         c->Request.Timeout = 0;
6344                         c->Request.CDB[0] = BMIC_READ;
6345                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6346                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6347                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6348                         break;
6349                 default:
6350                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6351                         BUG();
6352                         return -1;
6353                 }
6354         } else if (cmd_type == TYPE_MSG) {
6355                 switch (cmd) {
6356
6357                 case  HPSA_DEVICE_RESET_MSG:
6358                         c->Request.CDBLen = 16;
6359                         c->Request.type_attr_dir =
6360                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6361                         c->Request.Timeout = 0; /* Don't time out */
6362                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6363                         c->Request.CDB[0] =  cmd;
6364                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6365                         /* If bytes 4-7 are zero, it means reset the */
6366                         /* LunID device */
6367                         c->Request.CDB[4] = 0x00;
6368                         c->Request.CDB[5] = 0x00;
6369                         c->Request.CDB[6] = 0x00;
6370                         c->Request.CDB[7] = 0x00;
6371                         break;
6372                 case  HPSA_ABORT_MSG:
6373                         memcpy(&tag, buff, sizeof(tag));
6374                         dev_dbg(&h->pdev->dev,
6375                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6376                                 tag, c->Header.tag);
6377                         c->Request.CDBLen = 16;
6378                         c->Request.type_attr_dir =
6379                                         TYPE_ATTR_DIR(cmd_type,
6380                                                 ATTR_SIMPLE, XFER_WRITE);
6381                         c->Request.Timeout = 0; /* Don't time out */
6382                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6383                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6384                         c->Request.CDB[2] = 0x00; /* reserved */
6385                         c->Request.CDB[3] = 0x00; /* reserved */
6386                         /* Tag to abort goes in CDB[4]-CDB[11] */
6387                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6388                         c->Request.CDB[12] = 0x00; /* reserved */
6389                         c->Request.CDB[13] = 0x00; /* reserved */
6390                         c->Request.CDB[14] = 0x00; /* reserved */
6391                         c->Request.CDB[15] = 0x00; /* reserved */
6392                 break;
6393                 default:
6394                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6395                                 cmd);
6396                         BUG();
6397                 }
6398         } else {
6399                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6400                 BUG();
6401         }
6402
6403         switch (GET_DIR(c->Request.type_attr_dir)) {
6404         case XFER_READ:
6405                 pci_dir = PCI_DMA_FROMDEVICE;
6406                 break;
6407         case XFER_WRITE:
6408                 pci_dir = PCI_DMA_TODEVICE;
6409                 break;
6410         case XFER_NONE:
6411                 pci_dir = PCI_DMA_NONE;
6412                 break;
6413         default:
6414                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6415         }
6416         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6417                 return -1;
6418         return 0;
6419 }
6420
6421 /*
6422  * Map (physical) PCI mem into (virtual) kernel space
6423  */
6424 static void __iomem *remap_pci_mem(ulong base, ulong size)
6425 {
6426         ulong page_base = ((ulong) base) & PAGE_MASK;
6427         ulong page_offs = ((ulong) base) - page_base;
6428         void __iomem *page_remapped = ioremap_nocache(page_base,
6429                 page_offs + size);
6430
6431         return page_remapped ? (page_remapped + page_offs) : NULL;
6432 }
6433
6434 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6435 {
6436         return h->access.command_completed(h, q);
6437 }
6438
6439 static inline bool interrupt_pending(struct ctlr_info *h)
6440 {
6441         return h->access.intr_pending(h);
6442 }
6443
6444 static inline long interrupt_not_for_us(struct ctlr_info *h)
6445 {
6446         return (h->access.intr_pending(h) == 0) ||
6447                 (h->interrupts_enabled == 0);
6448 }
6449
6450 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6451         u32 raw_tag)
6452 {
6453         if (unlikely(tag_index >= h->nr_cmds)) {
6454                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6455                 return 1;
6456         }
6457         return 0;
6458 }
6459
6460 static inline void finish_cmd(struct CommandList *c)
6461 {
6462         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6463         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6464                         || c->cmd_type == CMD_IOACCEL2))
6465                 complete_scsi_command(c);
6466         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6467                 complete(c->waiting);
6468 }
6469
6470 /* process completion of an indexed ("direct lookup") command */
6471 static inline void process_indexed_cmd(struct ctlr_info *h,
6472         u32 raw_tag)
6473 {
6474         u32 tag_index;
6475         struct CommandList *c;
6476
6477         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6478         if (!bad_tag(h, tag_index, raw_tag)) {
6479                 c = h->cmd_pool + tag_index;
6480                 finish_cmd(c);
6481         }
6482 }
6483
6484 /* Some controllers, like p400, will give us one interrupt
6485  * after a soft reset, even if we turned interrupts off.
6486  * Only need to check for this in the hpsa_xxx_discard_completions
6487  * functions.
6488  */
6489 static int ignore_bogus_interrupt(struct ctlr_info *h)
6490 {
6491         if (likely(!reset_devices))
6492                 return 0;
6493
6494         if (likely(h->interrupts_enabled))
6495                 return 0;
6496
6497         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6498                 "(known firmware bug.)  Ignoring.\n");
6499
6500         return 1;
6501 }
6502
6503 /*
6504  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6505  * Relies on (h-q[x] == x) being true for x such that
6506  * 0 <= x < MAX_REPLY_QUEUES.
6507  */
6508 static struct ctlr_info *queue_to_hba(u8 *queue)
6509 {
6510         return container_of((queue - *queue), struct ctlr_info, q[0]);
6511 }
6512
6513 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6514 {
6515         struct ctlr_info *h = queue_to_hba(queue);
6516         u8 q = *(u8 *) queue;
6517         u32 raw_tag;
6518
6519         if (ignore_bogus_interrupt(h))
6520                 return IRQ_NONE;
6521
6522         if (interrupt_not_for_us(h))
6523                 return IRQ_NONE;
6524         h->last_intr_timestamp = get_jiffies_64();
6525         while (interrupt_pending(h)) {
6526                 raw_tag = get_next_completion(h, q);
6527                 while (raw_tag != FIFO_EMPTY)
6528                         raw_tag = next_command(h, q);
6529         }
6530         return IRQ_HANDLED;
6531 }
6532
6533 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6534 {
6535         struct ctlr_info *h = queue_to_hba(queue);
6536         u32 raw_tag;
6537         u8 q = *(u8 *) queue;
6538
6539         if (ignore_bogus_interrupt(h))
6540                 return IRQ_NONE;
6541
6542         h->last_intr_timestamp = get_jiffies_64();
6543         raw_tag = get_next_completion(h, q);
6544         while (raw_tag != FIFO_EMPTY)
6545                 raw_tag = next_command(h, q);
6546         return IRQ_HANDLED;
6547 }
6548
6549 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6550 {
6551         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6552         u32 raw_tag;
6553         u8 q = *(u8 *) queue;
6554
6555         if (interrupt_not_for_us(h))
6556                 return IRQ_NONE;
6557         h->last_intr_timestamp = get_jiffies_64();
6558         while (interrupt_pending(h)) {
6559                 raw_tag = get_next_completion(h, q);
6560                 while (raw_tag != FIFO_EMPTY) {
6561                         process_indexed_cmd(h, raw_tag);
6562                         raw_tag = next_command(h, q);
6563                 }
6564         }
6565         return IRQ_HANDLED;
6566 }
6567
6568 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6569 {
6570         struct ctlr_info *h = queue_to_hba(queue);
6571         u32 raw_tag;
6572         u8 q = *(u8 *) queue;
6573
6574         h->last_intr_timestamp = get_jiffies_64();
6575         raw_tag = get_next_completion(h, q);
6576         while (raw_tag != FIFO_EMPTY) {
6577                 process_indexed_cmd(h, raw_tag);
6578                 raw_tag = next_command(h, q);
6579         }
6580         return IRQ_HANDLED;
6581 }
6582
6583 /* Send a message CDB to the firmware. Careful, this only works
6584  * in simple mode, not performant mode due to the tag lookup.
6585  * We only ever use this immediately after a controller reset.
6586  */
6587 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6588                         unsigned char type)
6589 {
6590         struct Command {
6591                 struct CommandListHeader CommandHeader;
6592                 struct RequestBlock Request;
6593                 struct ErrDescriptor ErrorDescriptor;
6594         };
6595         struct Command *cmd;
6596         static const size_t cmd_sz = sizeof(*cmd) +
6597                                         sizeof(cmd->ErrorDescriptor);
6598         dma_addr_t paddr64;
6599         __le32 paddr32;
6600         u32 tag;
6601         void __iomem *vaddr;
6602         int i, err;
6603
6604         vaddr = pci_ioremap_bar(pdev, 0);
6605         if (vaddr == NULL)
6606                 return -ENOMEM;
6607
6608         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6609          * CCISS commands, so they must be allocated from the lower 4GiB of
6610          * memory.
6611          */
6612         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6613         if (err) {
6614                 iounmap(vaddr);
6615                 return err;
6616         }
6617
6618         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6619         if (cmd == NULL) {
6620                 iounmap(vaddr);
6621                 return -ENOMEM;
6622         }
6623
6624         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6625          * although there's no guarantee, we assume that the address is at
6626          * least 4-byte aligned (most likely, it's page-aligned).
6627          */
6628         paddr32 = cpu_to_le32(paddr64);
6629
6630         cmd->CommandHeader.ReplyQueue = 0;
6631         cmd->CommandHeader.SGList = 0;
6632         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6633         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6634         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6635
6636         cmd->Request.CDBLen = 16;
6637         cmd->Request.type_attr_dir =
6638                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6639         cmd->Request.Timeout = 0; /* Don't time out */
6640         cmd->Request.CDB[0] = opcode;
6641         cmd->Request.CDB[1] = type;
6642         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6643         cmd->ErrorDescriptor.Addr =
6644                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6645         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6646
6647         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6648
6649         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6650                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6651                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6652                         break;
6653                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6654         }
6655
6656         iounmap(vaddr);
6657
6658         /* we leak the DMA buffer here ... no choice since the controller could
6659          *  still complete the command.
6660          */
6661         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6662                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6663                         opcode, type);
6664                 return -ETIMEDOUT;
6665         }
6666
6667         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6668
6669         if (tag & HPSA_ERROR_BIT) {
6670                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6671                         opcode, type);
6672                 return -EIO;
6673         }
6674
6675         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6676                 opcode, type);
6677         return 0;
6678 }
6679
6680 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6681
6682 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6683         void __iomem *vaddr, u32 use_doorbell)
6684 {
6685
6686         if (use_doorbell) {
6687                 /* For everything after the P600, the PCI power state method
6688                  * of resetting the controller doesn't work, so we have this
6689                  * other way using the doorbell register.
6690                  */
6691                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6692                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6693
6694                 /* PMC hardware guys tell us we need a 10 second delay after
6695                  * doorbell reset and before any attempt to talk to the board
6696                  * at all to ensure that this actually works and doesn't fall
6697                  * over in some weird corner cases.
6698                  */
6699                 msleep(10000);
6700         } else { /* Try to do it the PCI power state way */
6701
6702                 /* Quoting from the Open CISS Specification: "The Power
6703                  * Management Control/Status Register (CSR) controls the power
6704                  * state of the device.  The normal operating state is D0,
6705                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6706                  * the controller, place the interface device in D3 then to D0,
6707                  * this causes a secondary PCI reset which will reset the
6708                  * controller." */
6709
6710                 int rc = 0;
6711
6712                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6713
6714                 /* enter the D3hot power management state */
6715                 rc = pci_set_power_state(pdev, PCI_D3hot);
6716                 if (rc)
6717                         return rc;
6718
6719                 msleep(500);
6720
6721                 /* enter the D0 power management state */
6722                 rc = pci_set_power_state(pdev, PCI_D0);
6723                 if (rc)
6724                         return rc;
6725
6726                 /*
6727                  * The P600 requires a small delay when changing states.
6728                  * Otherwise we may think the board did not reset and we bail.
6729                  * This for kdump only and is particular to the P600.
6730                  */
6731                 msleep(500);
6732         }
6733         return 0;
6734 }
6735
6736 static void init_driver_version(char *driver_version, int len)
6737 {
6738         memset(driver_version, 0, len);
6739         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6740 }
6741
6742 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6743 {
6744         char *driver_version;
6745         int i, size = sizeof(cfgtable->driver_version);
6746
6747         driver_version = kmalloc(size, GFP_KERNEL);
6748         if (!driver_version)
6749                 return -ENOMEM;
6750
6751         init_driver_version(driver_version, size);
6752         for (i = 0; i < size; i++)
6753                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6754         kfree(driver_version);
6755         return 0;
6756 }
6757
6758 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6759                                           unsigned char *driver_ver)
6760 {
6761         int i;
6762
6763         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6764                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6765 }
6766
6767 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6768 {
6769
6770         char *driver_ver, *old_driver_ver;
6771         int rc, size = sizeof(cfgtable->driver_version);
6772
6773         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6774         if (!old_driver_ver)
6775                 return -ENOMEM;
6776         driver_ver = old_driver_ver + size;
6777
6778         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6779          * should have been changed, otherwise we know the reset failed.
6780          */
6781         init_driver_version(old_driver_ver, size);
6782         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6783         rc = !memcmp(driver_ver, old_driver_ver, size);
6784         kfree(old_driver_ver);
6785         return rc;
6786 }
6787 /* This does a hard reset of the controller using PCI power management
6788  * states or the using the doorbell register.
6789  */
6790 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6791 {
6792         u64 cfg_offset;
6793         u32 cfg_base_addr;
6794         u64 cfg_base_addr_index;
6795         void __iomem *vaddr;
6796         unsigned long paddr;
6797         u32 misc_fw_support;
6798         int rc;
6799         struct CfgTable __iomem *cfgtable;
6800         u32 use_doorbell;
6801         u16 command_register;
6802
6803         /* For controllers as old as the P600, this is very nearly
6804          * the same thing as
6805          *
6806          * pci_save_state(pci_dev);
6807          * pci_set_power_state(pci_dev, PCI_D3hot);
6808          * pci_set_power_state(pci_dev, PCI_D0);
6809          * pci_restore_state(pci_dev);
6810          *
6811          * For controllers newer than the P600, the pci power state
6812          * method of resetting doesn't work so we have another way
6813          * using the doorbell register.
6814          */
6815
6816         if (!ctlr_is_resettable(board_id)) {
6817                 dev_warn(&pdev->dev, "Controller not resettable\n");
6818                 return -ENODEV;
6819         }
6820
6821         /* if controller is soft- but not hard resettable... */
6822         if (!ctlr_is_hard_resettable(board_id))
6823                 return -ENOTSUPP; /* try soft reset later. */
6824
6825         /* Save the PCI command register */
6826         pci_read_config_word(pdev, 4, &command_register);
6827         pci_save_state(pdev);
6828
6829         /* find the first memory BAR, so we can find the cfg table */
6830         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6831         if (rc)
6832                 return rc;
6833         vaddr = remap_pci_mem(paddr, 0x250);
6834         if (!vaddr)
6835                 return -ENOMEM;
6836
6837         /* find cfgtable in order to check if reset via doorbell is supported */
6838         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6839                                         &cfg_base_addr_index, &cfg_offset);
6840         if (rc)
6841                 goto unmap_vaddr;
6842         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6843                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6844         if (!cfgtable) {
6845                 rc = -ENOMEM;
6846                 goto unmap_vaddr;
6847         }
6848         rc = write_driver_ver_to_cfgtable(cfgtable);
6849         if (rc)
6850                 goto unmap_cfgtable;
6851
6852         /* If reset via doorbell register is supported, use that.
6853          * There are two such methods.  Favor the newest method.
6854          */
6855         misc_fw_support = readl(&cfgtable->misc_fw_support);
6856         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6857         if (use_doorbell) {
6858                 use_doorbell = DOORBELL_CTLR_RESET2;
6859         } else {
6860                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6861                 if (use_doorbell) {
6862                         dev_warn(&pdev->dev,
6863                                 "Soft reset not supported. Firmware update is required.\n");
6864                         rc = -ENOTSUPP; /* try soft reset */
6865                         goto unmap_cfgtable;
6866                 }
6867         }
6868
6869         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6870         if (rc)
6871                 goto unmap_cfgtable;
6872
6873         pci_restore_state(pdev);
6874         pci_write_config_word(pdev, 4, command_register);
6875
6876         /* Some devices (notably the HP Smart Array 5i Controller)
6877            need a little pause here */
6878         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6879
6880         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6881         if (rc) {
6882                 dev_warn(&pdev->dev,
6883                         "Failed waiting for board to become ready after hard reset\n");
6884                 goto unmap_cfgtable;
6885         }
6886
6887         rc = controller_reset_failed(vaddr);
6888         if (rc < 0)
6889                 goto unmap_cfgtable;
6890         if (rc) {
6891                 dev_warn(&pdev->dev, "Unable to successfully reset "
6892                         "controller. Will try soft reset.\n");
6893                 rc = -ENOTSUPP;
6894         } else {
6895                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6896         }
6897
6898 unmap_cfgtable:
6899         iounmap(cfgtable);
6900
6901 unmap_vaddr:
6902         iounmap(vaddr);
6903         return rc;
6904 }
6905
6906 /*
6907  *  We cannot read the structure directly, for portability we must use
6908  *   the io functions.
6909  *   This is for debug only.
6910  */
6911 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6912 {
6913 #ifdef HPSA_DEBUG
6914         int i;
6915         char temp_name[17];
6916
6917         dev_info(dev, "Controller Configuration information\n");
6918         dev_info(dev, "------------------------------------\n");
6919         for (i = 0; i < 4; i++)
6920                 temp_name[i] = readb(&(tb->Signature[i]));
6921         temp_name[4] = '\0';
6922         dev_info(dev, "   Signature = %s\n", temp_name);
6923         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6924         dev_info(dev, "   Transport methods supported = 0x%x\n",
6925                readl(&(tb->TransportSupport)));
6926         dev_info(dev, "   Transport methods active = 0x%x\n",
6927                readl(&(tb->TransportActive)));
6928         dev_info(dev, "   Requested transport Method = 0x%x\n",
6929                readl(&(tb->HostWrite.TransportRequest)));
6930         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6931                readl(&(tb->HostWrite.CoalIntDelay)));
6932         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6933                readl(&(tb->HostWrite.CoalIntCount)));
6934         dev_info(dev, "   Max outstanding commands = %d\n",
6935                readl(&(tb->CmdsOutMax)));
6936         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6937         for (i = 0; i < 16; i++)
6938                 temp_name[i] = readb(&(tb->ServerName[i]));
6939         temp_name[16] = '\0';
6940         dev_info(dev, "   Server Name = %s\n", temp_name);
6941         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6942                 readl(&(tb->HeartBeat)));
6943 #endif                          /* HPSA_DEBUG */
6944 }
6945
6946 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6947 {
6948         int i, offset, mem_type, bar_type;
6949
6950         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6951                 return 0;
6952         offset = 0;
6953         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6954                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6955                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6956                         offset += 4;
6957                 else {
6958                         mem_type = pci_resource_flags(pdev, i) &
6959                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6960                         switch (mem_type) {
6961                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6962                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6963                                 offset += 4;    /* 32 bit */
6964                                 break;
6965                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6966                                 offset += 8;
6967                                 break;
6968                         default:        /* reserved in PCI 2.2 */
6969                                 dev_warn(&pdev->dev,
6970                                        "base address is invalid\n");
6971                                 return -1;
6972                                 break;
6973                         }
6974                 }
6975                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6976                         return i + 1;
6977         }
6978         return -1;
6979 }
6980
6981 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
6982 {
6983         if (h->msix_vector) {
6984                 if (h->pdev->msix_enabled)
6985                         pci_disable_msix(h->pdev);
6986                 h->msix_vector = 0;
6987         } else if (h->msi_vector) {
6988                 if (h->pdev->msi_enabled)
6989                         pci_disable_msi(h->pdev);
6990                 h->msi_vector = 0;
6991         }
6992 }
6993
6994 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6995  * controllers that are capable. If not, we use legacy INTx mode.
6996  */
6997 static void hpsa_interrupt_mode(struct ctlr_info *h)
6998 {
6999 #ifdef CONFIG_PCI_MSI
7000         int err, i;
7001         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7002
7003         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7004                 hpsa_msix_entries[i].vector = 0;
7005                 hpsa_msix_entries[i].entry = i;
7006         }
7007
7008         /* Some boards advertise MSI but don't really support it */
7009         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7010             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7011                 goto default_int_mode;
7012         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7013                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7014                 h->msix_vector = MAX_REPLY_QUEUES;
7015                 if (h->msix_vector > num_online_cpus())
7016                         h->msix_vector = num_online_cpus();
7017                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7018                                             1, h->msix_vector);
7019                 if (err < 0) {
7020                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7021                         h->msix_vector = 0;
7022                         goto single_msi_mode;
7023                 } else if (err < h->msix_vector) {
7024                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7025                                "available\n", err);
7026                 }
7027                 h->msix_vector = err;
7028                 for (i = 0; i < h->msix_vector; i++)
7029                         h->intr[i] = hpsa_msix_entries[i].vector;
7030                 return;
7031         }
7032 single_msi_mode:
7033         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7034                 dev_info(&h->pdev->dev, "MSI capable controller\n");
7035                 if (!pci_enable_msi(h->pdev))
7036                         h->msi_vector = 1;
7037                 else
7038                         dev_warn(&h->pdev->dev, "MSI init failed\n");
7039         }
7040 default_int_mode:
7041 #endif                          /* CONFIG_PCI_MSI */
7042         /* if we get here we're going to use the default interrupt mode */
7043         h->intr[h->intr_mode] = h->pdev->irq;
7044 }
7045
7046 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7047 {
7048         int i;
7049         u32 subsystem_vendor_id, subsystem_device_id;
7050
7051         subsystem_vendor_id = pdev->subsystem_vendor;
7052         subsystem_device_id = pdev->subsystem_device;
7053         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7054                     subsystem_vendor_id;
7055
7056         for (i = 0; i < ARRAY_SIZE(products); i++)
7057                 if (*board_id == products[i].board_id)
7058                         return i;
7059
7060         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7061                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7062                 !hpsa_allow_any) {
7063                 dev_warn(&pdev->dev, "unrecognized board ID: "
7064                         "0x%08x, ignoring.\n", *board_id);
7065                         return -ENODEV;
7066         }
7067         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7068 }
7069
7070 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7071                                     unsigned long *memory_bar)
7072 {
7073         int i;
7074
7075         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7076                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7077                         /* addressing mode bits already removed */
7078                         *memory_bar = pci_resource_start(pdev, i);
7079                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7080                                 *memory_bar);
7081                         return 0;
7082                 }
7083         dev_warn(&pdev->dev, "no memory BAR found\n");
7084         return -ENODEV;
7085 }
7086
7087 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7088                                      int wait_for_ready)
7089 {
7090         int i, iterations;
7091         u32 scratchpad;
7092         if (wait_for_ready)
7093                 iterations = HPSA_BOARD_READY_ITERATIONS;
7094         else
7095                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7096
7097         for (i = 0; i < iterations; i++) {
7098                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7099                 if (wait_for_ready) {
7100                         if (scratchpad == HPSA_FIRMWARE_READY)
7101                                 return 0;
7102                 } else {
7103                         if (scratchpad != HPSA_FIRMWARE_READY)
7104                                 return 0;
7105                 }
7106                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7107         }
7108         dev_warn(&pdev->dev, "board not ready, timed out.\n");
7109         return -ENODEV;
7110 }
7111
7112 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7113                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7114                                u64 *cfg_offset)
7115 {
7116         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7117         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7118         *cfg_base_addr &= (u32) 0x0000ffff;
7119         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7120         if (*cfg_base_addr_index == -1) {
7121                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7122                 return -ENODEV;
7123         }
7124         return 0;
7125 }
7126
7127 static void hpsa_free_cfgtables(struct ctlr_info *h)
7128 {
7129         if (h->transtable) {
7130                 iounmap(h->transtable);
7131                 h->transtable = NULL;
7132         }
7133         if (h->cfgtable) {
7134                 iounmap(h->cfgtable);
7135                 h->cfgtable = NULL;
7136         }
7137 }
7138
7139 /* Find and map CISS config table and transfer table
7140 + * several items must be unmapped (freed) later
7141 + * */
7142 static int hpsa_find_cfgtables(struct ctlr_info *h)
7143 {
7144         u64 cfg_offset;
7145         u32 cfg_base_addr;
7146         u64 cfg_base_addr_index;
7147         u32 trans_offset;
7148         int rc;
7149
7150         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7151                 &cfg_base_addr_index, &cfg_offset);
7152         if (rc)
7153                 return rc;
7154         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7155                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7156         if (!h->cfgtable) {
7157                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7158                 return -ENOMEM;
7159         }
7160         rc = write_driver_ver_to_cfgtable(h->cfgtable);
7161         if (rc)
7162                 return rc;
7163         /* Find performant mode table. */
7164         trans_offset = readl(&h->cfgtable->TransMethodOffset);
7165         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7166                                 cfg_base_addr_index)+cfg_offset+trans_offset,
7167                                 sizeof(*h->transtable));
7168         if (!h->transtable) {
7169                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7170                 hpsa_free_cfgtables(h);
7171                 return -ENOMEM;
7172         }
7173         return 0;
7174 }
7175
7176 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7177 {
7178 #define MIN_MAX_COMMANDS 16
7179         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7180
7181         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7182
7183         /* Limit commands in memory limited kdump scenario. */
7184         if (reset_devices && h->max_commands > 32)
7185                 h->max_commands = 32;
7186
7187         if (h->max_commands < MIN_MAX_COMMANDS) {
7188                 dev_warn(&h->pdev->dev,
7189                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7190                         h->max_commands,
7191                         MIN_MAX_COMMANDS);
7192                 h->max_commands = MIN_MAX_COMMANDS;
7193         }
7194 }
7195
7196 /* If the controller reports that the total max sg entries is greater than 512,
7197  * then we know that chained SG blocks work.  (Original smart arrays did not
7198  * support chained SG blocks and would return zero for max sg entries.)
7199  */
7200 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7201 {
7202         return h->maxsgentries > 512;
7203 }
7204
7205 /* Interrogate the hardware for some limits:
7206  * max commands, max SG elements without chaining, and with chaining,
7207  * SG chain block size, etc.
7208  */
7209 static void hpsa_find_board_params(struct ctlr_info *h)
7210 {
7211         hpsa_get_max_perf_mode_cmds(h);
7212         h->nr_cmds = h->max_commands;
7213         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7214         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7215         if (hpsa_supports_chained_sg_blocks(h)) {
7216                 /* Limit in-command s/g elements to 32 save dma'able memory. */
7217                 h->max_cmd_sg_entries = 32;
7218                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7219                 h->maxsgentries--; /* save one for chain pointer */
7220         } else {
7221                 /*
7222                  * Original smart arrays supported at most 31 s/g entries
7223                  * embedded inline in the command (trying to use more
7224                  * would lock up the controller)
7225                  */
7226                 h->max_cmd_sg_entries = 31;
7227                 h->maxsgentries = 31; /* default to traditional values */
7228                 h->chainsize = 0;
7229         }
7230
7231         /* Find out what task management functions are supported and cache */
7232         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7233         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7234                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7235         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7236                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7237         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7238                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7239 }
7240
7241 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7242 {
7243         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7244                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7245                 return false;
7246         }
7247         return true;
7248 }
7249
7250 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7251 {
7252         u32 driver_support;
7253
7254         driver_support = readl(&(h->cfgtable->driver_support));
7255         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7256 #ifdef CONFIG_X86
7257         driver_support |= ENABLE_SCSI_PREFETCH;
7258 #endif
7259         driver_support |= ENABLE_UNIT_ATTN;
7260         writel(driver_support, &(h->cfgtable->driver_support));
7261 }
7262
7263 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7264  * in a prefetch beyond physical memory.
7265  */
7266 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7267 {
7268         u32 dma_prefetch;
7269
7270         if (h->board_id != 0x3225103C)
7271                 return;
7272         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7273         dma_prefetch |= 0x8000;
7274         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7275 }
7276
7277 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7278 {
7279         int i;
7280         u32 doorbell_value;
7281         unsigned long flags;
7282         /* wait until the clear_event_notify bit 6 is cleared by controller. */
7283         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7284                 spin_lock_irqsave(&h->lock, flags);
7285                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7286                 spin_unlock_irqrestore(&h->lock, flags);
7287                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7288                         goto done;
7289                 /* delay and try again */
7290                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7291         }
7292         return -ENODEV;
7293 done:
7294         return 0;
7295 }
7296
7297 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7298 {
7299         int i;
7300         u32 doorbell_value;
7301         unsigned long flags;
7302
7303         /* under certain very rare conditions, this can take awhile.
7304          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7305          * as we enter this code.)
7306          */
7307         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7308                 if (h->remove_in_progress)
7309                         goto done;
7310                 spin_lock_irqsave(&h->lock, flags);
7311                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7312                 spin_unlock_irqrestore(&h->lock, flags);
7313                 if (!(doorbell_value & CFGTBL_ChangeReq))
7314                         goto done;
7315                 /* delay and try again */
7316                 msleep(MODE_CHANGE_WAIT_INTERVAL);
7317         }
7318         return -ENODEV;
7319 done:
7320         return 0;
7321 }
7322
7323 /* return -ENODEV or other reason on error, 0 on success */
7324 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7325 {
7326         u32 trans_support;
7327
7328         trans_support = readl(&(h->cfgtable->TransportSupport));
7329         if (!(trans_support & SIMPLE_MODE))
7330                 return -ENOTSUPP;
7331
7332         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7333
7334         /* Update the field, and then ring the doorbell */
7335         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7336         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7337         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7338         if (hpsa_wait_for_mode_change_ack(h))
7339                 goto error;
7340         print_cfg_table(&h->pdev->dev, h->cfgtable);
7341         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7342                 goto error;
7343         h->transMethod = CFGTBL_Trans_Simple;
7344         return 0;
7345 error:
7346         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7347         return -ENODEV;
7348 }
7349
7350 /* free items allocated or mapped by hpsa_pci_init */
7351 static void hpsa_free_pci_init(struct ctlr_info *h)
7352 {
7353         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7354         iounmap(h->vaddr);                      /* pci_init 3 */
7355         h->vaddr = NULL;
7356         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7357         /*
7358          * call pci_disable_device before pci_release_regions per
7359          * Documentation/PCI/pci.txt
7360          */
7361         pci_disable_device(h->pdev);            /* pci_init 1 */
7362         pci_release_regions(h->pdev);           /* pci_init 2 */
7363 }
7364
7365 /* several items must be freed later */
7366 static int hpsa_pci_init(struct ctlr_info *h)
7367 {
7368         int prod_index, err;
7369
7370         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7371         if (prod_index < 0)
7372                 return prod_index;
7373         h->product_name = products[prod_index].product_name;
7374         h->access = *(products[prod_index].access);
7375
7376         h->needs_abort_tags_swizzled =
7377                 ctlr_needs_abort_tags_swizzled(h->board_id);
7378
7379         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7380                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7381
7382         err = pci_enable_device(h->pdev);
7383         if (err) {
7384                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7385                 pci_disable_device(h->pdev);
7386                 return err;
7387         }
7388
7389         err = pci_request_regions(h->pdev, HPSA);
7390         if (err) {
7391                 dev_err(&h->pdev->dev,
7392                         "failed to obtain PCI resources\n");
7393                 pci_disable_device(h->pdev);
7394                 return err;
7395         }
7396
7397         pci_set_master(h->pdev);
7398
7399         hpsa_interrupt_mode(h);
7400         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7401         if (err)
7402                 goto clean2;    /* intmode+region, pci */
7403         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7404         if (!h->vaddr) {
7405                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7406                 err = -ENOMEM;
7407                 goto clean2;    /* intmode+region, pci */
7408         }
7409         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7410         if (err)
7411                 goto clean3;    /* vaddr, intmode+region, pci */
7412         err = hpsa_find_cfgtables(h);
7413         if (err)
7414                 goto clean3;    /* vaddr, intmode+region, pci */
7415         hpsa_find_board_params(h);
7416
7417         if (!hpsa_CISS_signature_present(h)) {
7418                 err = -ENODEV;
7419                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7420         }
7421         hpsa_set_driver_support_bits(h);
7422         hpsa_p600_dma_prefetch_quirk(h);
7423         err = hpsa_enter_simple_mode(h);
7424         if (err)
7425                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7426         return 0;
7427
7428 clean4: /* cfgtables, vaddr, intmode+region, pci */
7429         hpsa_free_cfgtables(h);
7430 clean3: /* vaddr, intmode+region, pci */
7431         iounmap(h->vaddr);
7432         h->vaddr = NULL;
7433 clean2: /* intmode+region, pci */
7434         hpsa_disable_interrupt_mode(h);
7435         /*
7436          * call pci_disable_device before pci_release_regions per
7437          * Documentation/PCI/pci.txt
7438          */
7439         pci_disable_device(h->pdev);
7440         pci_release_regions(h->pdev);
7441         return err;
7442 }
7443
7444 static void hpsa_hba_inquiry(struct ctlr_info *h)
7445 {
7446         int rc;
7447
7448 #define HBA_INQUIRY_BYTE_COUNT 64
7449         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7450         if (!h->hba_inquiry_data)
7451                 return;
7452         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7453                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7454         if (rc != 0) {
7455                 kfree(h->hba_inquiry_data);
7456                 h->hba_inquiry_data = NULL;
7457         }
7458 }
7459
7460 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7461 {
7462         int rc, i;
7463         void __iomem *vaddr;
7464
7465         if (!reset_devices)
7466                 return 0;
7467
7468         /* kdump kernel is loading, we don't know in which state is
7469          * the pci interface. The dev->enable_cnt is equal zero
7470          * so we call enable+disable, wait a while and switch it on.
7471          */
7472         rc = pci_enable_device(pdev);
7473         if (rc) {
7474                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7475                 return -ENODEV;
7476         }
7477         pci_disable_device(pdev);
7478         msleep(260);                    /* a randomly chosen number */
7479         rc = pci_enable_device(pdev);
7480         if (rc) {
7481                 dev_warn(&pdev->dev, "failed to enable device.\n");
7482                 return -ENODEV;
7483         }
7484
7485         pci_set_master(pdev);
7486
7487         vaddr = pci_ioremap_bar(pdev, 0);
7488         if (vaddr == NULL) {
7489                 rc = -ENOMEM;
7490                 goto out_disable;
7491         }
7492         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7493         iounmap(vaddr);
7494
7495         /* Reset the controller with a PCI power-cycle or via doorbell */
7496         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7497
7498         /* -ENOTSUPP here means we cannot reset the controller
7499          * but it's already (and still) up and running in
7500          * "performant mode".  Or, it might be 640x, which can't reset
7501          * due to concerns about shared bbwc between 6402/6404 pair.
7502          */
7503         if (rc)
7504                 goto out_disable;
7505
7506         /* Now try to get the controller to respond to a no-op */
7507         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7508         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7509                 if (hpsa_noop(pdev) == 0)
7510                         break;
7511                 else
7512                         dev_warn(&pdev->dev, "no-op failed%s\n",
7513                                         (i < 11 ? "; re-trying" : ""));
7514         }
7515
7516 out_disable:
7517
7518         pci_disable_device(pdev);
7519         return rc;
7520 }
7521
7522 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7523 {
7524         kfree(h->cmd_pool_bits);
7525         h->cmd_pool_bits = NULL;
7526         if (h->cmd_pool) {
7527                 pci_free_consistent(h->pdev,
7528                                 h->nr_cmds * sizeof(struct CommandList),
7529                                 h->cmd_pool,
7530                                 h->cmd_pool_dhandle);
7531                 h->cmd_pool = NULL;
7532                 h->cmd_pool_dhandle = 0;
7533         }
7534         if (h->errinfo_pool) {
7535                 pci_free_consistent(h->pdev,
7536                                 h->nr_cmds * sizeof(struct ErrorInfo),
7537                                 h->errinfo_pool,
7538                                 h->errinfo_pool_dhandle);
7539                 h->errinfo_pool = NULL;
7540                 h->errinfo_pool_dhandle = 0;
7541         }
7542 }
7543
7544 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7545 {
7546         h->cmd_pool_bits = kzalloc(
7547                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7548                 sizeof(unsigned long), GFP_KERNEL);
7549         h->cmd_pool = pci_alloc_consistent(h->pdev,
7550                     h->nr_cmds * sizeof(*h->cmd_pool),
7551                     &(h->cmd_pool_dhandle));
7552         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7553                     h->nr_cmds * sizeof(*h->errinfo_pool),
7554                     &(h->errinfo_pool_dhandle));
7555         if ((h->cmd_pool_bits == NULL)
7556             || (h->cmd_pool == NULL)
7557             || (h->errinfo_pool == NULL)) {
7558                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7559                 goto clean_up;
7560         }
7561         hpsa_preinitialize_commands(h);
7562         return 0;
7563 clean_up:
7564         hpsa_free_cmd_pool(h);
7565         return -ENOMEM;
7566 }
7567
7568 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7569 {
7570         int i, cpu;
7571
7572         cpu = cpumask_first(cpu_online_mask);
7573         for (i = 0; i < h->msix_vector; i++) {
7574                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7575                 cpu = cpumask_next(cpu, cpu_online_mask);
7576         }
7577 }
7578
7579 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7580 static void hpsa_free_irqs(struct ctlr_info *h)
7581 {
7582         int i;
7583
7584         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7585                 /* Single reply queue, only one irq to free */
7586                 i = h->intr_mode;
7587                 irq_set_affinity_hint(h->intr[i], NULL);
7588                 free_irq(h->intr[i], &h->q[i]);
7589                 h->q[i] = 0;
7590                 return;
7591         }
7592
7593         for (i = 0; i < h->msix_vector; i++) {
7594                 irq_set_affinity_hint(h->intr[i], NULL);
7595                 free_irq(h->intr[i], &h->q[i]);
7596                 h->q[i] = 0;
7597         }
7598         for (; i < MAX_REPLY_QUEUES; i++)
7599                 h->q[i] = 0;
7600 }
7601
7602 /* returns 0 on success; cleans up and returns -Enn on error */
7603 static int hpsa_request_irqs(struct ctlr_info *h,
7604         irqreturn_t (*msixhandler)(int, void *),
7605         irqreturn_t (*intxhandler)(int, void *))
7606 {
7607         int rc, i;
7608
7609         /*
7610          * initialize h->q[x] = x so that interrupt handlers know which
7611          * queue to process.
7612          */
7613         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7614                 h->q[i] = (u8) i;
7615
7616         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7617                 /* If performant mode and MSI-X, use multiple reply queues */
7618                 for (i = 0; i < h->msix_vector; i++) {
7619                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7620                         rc = request_irq(h->intr[i], msixhandler,
7621                                         0, h->intrname[i],
7622                                         &h->q[i]);
7623                         if (rc) {
7624                                 int j;
7625
7626                                 dev_err(&h->pdev->dev,
7627                                         "failed to get irq %d for %s\n",
7628                                        h->intr[i], h->devname);
7629                                 for (j = 0; j < i; j++) {
7630                                         free_irq(h->intr[j], &h->q[j]);
7631                                         h->q[j] = 0;
7632                                 }
7633                                 for (; j < MAX_REPLY_QUEUES; j++)
7634                                         h->q[j] = 0;
7635                                 return rc;
7636                         }
7637                 }
7638                 hpsa_irq_affinity_hints(h);
7639         } else {
7640                 /* Use single reply pool */
7641                 if (h->msix_vector > 0 || h->msi_vector) {
7642                         if (h->msix_vector)
7643                                 sprintf(h->intrname[h->intr_mode],
7644                                         "%s-msix", h->devname);
7645                         else
7646                                 sprintf(h->intrname[h->intr_mode],
7647                                         "%s-msi", h->devname);
7648                         rc = request_irq(h->intr[h->intr_mode],
7649                                 msixhandler, 0,
7650                                 h->intrname[h->intr_mode],
7651                                 &h->q[h->intr_mode]);
7652                 } else {
7653                         sprintf(h->intrname[h->intr_mode],
7654                                 "%s-intx", h->devname);
7655                         rc = request_irq(h->intr[h->intr_mode],
7656                                 intxhandler, IRQF_SHARED,
7657                                 h->intrname[h->intr_mode],
7658                                 &h->q[h->intr_mode]);
7659                 }
7660                 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7661         }
7662         if (rc) {
7663                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7664                        h->intr[h->intr_mode], h->devname);
7665                 hpsa_free_irqs(h);
7666                 return -ENODEV;
7667         }
7668         return 0;
7669 }
7670
7671 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7672 {
7673         int rc;
7674         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7675
7676         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7677         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7678         if (rc) {
7679                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7680                 return rc;
7681         }
7682
7683         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7684         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7685         if (rc) {
7686                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7687                         "after soft reset.\n");
7688                 return rc;
7689         }
7690
7691         return 0;
7692 }
7693
7694 static void hpsa_free_reply_queues(struct ctlr_info *h)
7695 {
7696         int i;
7697
7698         for (i = 0; i < h->nreply_queues; i++) {
7699                 if (!h->reply_queue[i].head)
7700                         continue;
7701                 pci_free_consistent(h->pdev,
7702                                         h->reply_queue_size,
7703                                         h->reply_queue[i].head,
7704                                         h->reply_queue[i].busaddr);
7705                 h->reply_queue[i].head = NULL;
7706                 h->reply_queue[i].busaddr = 0;
7707         }
7708         h->reply_queue_size = 0;
7709 }
7710
7711 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7712 {
7713         hpsa_free_performant_mode(h);           /* init_one 7 */
7714         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7715         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7716         hpsa_free_irqs(h);                      /* init_one 4 */
7717         scsi_host_put(h->scsi_host);            /* init_one 3 */
7718         h->scsi_host = NULL;                    /* init_one 3 */
7719         hpsa_free_pci_init(h);                  /* init_one 2_5 */
7720         free_percpu(h->lockup_detected);        /* init_one 2 */
7721         h->lockup_detected = NULL;              /* init_one 2 */
7722         if (h->resubmit_wq) {
7723                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7724                 h->resubmit_wq = NULL;
7725         }
7726         if (h->rescan_ctlr_wq) {
7727                 destroy_workqueue(h->rescan_ctlr_wq);
7728                 h->rescan_ctlr_wq = NULL;
7729         }
7730         kfree(h);                               /* init_one 1 */
7731 }
7732
7733 /* Called when controller lockup detected. */
7734 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7735 {
7736         int i, refcount;
7737         struct CommandList *c;
7738         int failcount = 0;
7739
7740         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7741         for (i = 0; i < h->nr_cmds; i++) {
7742                 c = h->cmd_pool + i;
7743                 refcount = atomic_inc_return(&c->refcount);
7744                 if (refcount > 1) {
7745                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7746                         finish_cmd(c);
7747                         atomic_dec(&h->commands_outstanding);
7748                         failcount++;
7749                 }
7750                 cmd_free(h, c);
7751         }
7752         dev_warn(&h->pdev->dev,
7753                 "failed %d commands in fail_all\n", failcount);
7754 }
7755
7756 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7757 {
7758         int cpu;
7759
7760         for_each_online_cpu(cpu) {
7761                 u32 *lockup_detected;
7762                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7763                 *lockup_detected = value;
7764         }
7765         wmb(); /* be sure the per-cpu variables are out to memory */
7766 }
7767
7768 static void controller_lockup_detected(struct ctlr_info *h)
7769 {
7770         unsigned long flags;
7771         u32 lockup_detected;
7772
7773         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7774         spin_lock_irqsave(&h->lock, flags);
7775         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7776         if (!lockup_detected) {
7777                 /* no heartbeat, but controller gave us a zero. */
7778                 dev_warn(&h->pdev->dev,
7779                         "lockup detected after %d but scratchpad register is zero\n",
7780                         h->heartbeat_sample_interval / HZ);
7781                 lockup_detected = 0xffffffff;
7782         }
7783         set_lockup_detected_for_all_cpus(h, lockup_detected);
7784         spin_unlock_irqrestore(&h->lock, flags);
7785         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7786                         lockup_detected, h->heartbeat_sample_interval / HZ);
7787         pci_disable_device(h->pdev);
7788         fail_all_outstanding_cmds(h);
7789 }
7790
7791 static int detect_controller_lockup(struct ctlr_info *h)
7792 {
7793         u64 now;
7794         u32 heartbeat;
7795         unsigned long flags;
7796
7797         now = get_jiffies_64();
7798         /* If we've received an interrupt recently, we're ok. */
7799         if (time_after64(h->last_intr_timestamp +
7800                                 (h->heartbeat_sample_interval), now))
7801                 return false;
7802
7803         /*
7804          * If we've already checked the heartbeat recently, we're ok.
7805          * This could happen if someone sends us a signal. We
7806          * otherwise don't care about signals in this thread.
7807          */
7808         if (time_after64(h->last_heartbeat_timestamp +
7809                                 (h->heartbeat_sample_interval), now))
7810                 return false;
7811
7812         /* If heartbeat has not changed since we last looked, we're not ok. */
7813         spin_lock_irqsave(&h->lock, flags);
7814         heartbeat = readl(&h->cfgtable->HeartBeat);
7815         spin_unlock_irqrestore(&h->lock, flags);
7816         if (h->last_heartbeat == heartbeat) {
7817                 controller_lockup_detected(h);
7818                 return true;
7819         }
7820
7821         /* We're ok. */
7822         h->last_heartbeat = heartbeat;
7823         h->last_heartbeat_timestamp = now;
7824         return false;
7825 }
7826
7827 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7828 {
7829         int i;
7830         char *event_type;
7831
7832         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7833                 return;
7834
7835         /* Ask the controller to clear the events we're handling. */
7836         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7837                         | CFGTBL_Trans_io_accel2)) &&
7838                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7839                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7840
7841                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7842                         event_type = "state change";
7843                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7844                         event_type = "configuration change";
7845                 /* Stop sending new RAID offload reqs via the IO accelerator */
7846                 scsi_block_requests(h->scsi_host);
7847                 for (i = 0; i < h->ndevices; i++)
7848                         h->dev[i]->offload_enabled = 0;
7849                 hpsa_drain_accel_commands(h);
7850                 /* Set 'accelerator path config change' bit */
7851                 dev_warn(&h->pdev->dev,
7852                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7853                         h->events, event_type);
7854                 writel(h->events, &(h->cfgtable->clear_event_notify));
7855                 /* Set the "clear event notify field update" bit 6 */
7856                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7857                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7858                 hpsa_wait_for_clear_event_notify_ack(h);
7859                 scsi_unblock_requests(h->scsi_host);
7860         } else {
7861                 /* Acknowledge controller notification events. */
7862                 writel(h->events, &(h->cfgtable->clear_event_notify));
7863                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7864                 hpsa_wait_for_clear_event_notify_ack(h);
7865 #if 0
7866                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7867                 hpsa_wait_for_mode_change_ack(h);
7868 #endif
7869         }
7870         return;
7871 }
7872
7873 /* Check a register on the controller to see if there are configuration
7874  * changes (added/changed/removed logical drives, etc.) which mean that
7875  * we should rescan the controller for devices.
7876  * Also check flag for driver-initiated rescan.
7877  */
7878 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7879 {
7880         if (h->drv_req_rescan) {
7881                 h->drv_req_rescan = 0;
7882                 return 1;
7883         }
7884
7885         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7886                 return 0;
7887
7888         h->events = readl(&(h->cfgtable->event_notify));
7889         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7890 }
7891
7892 /*
7893  * Check if any of the offline devices have become ready
7894  */
7895 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7896 {
7897         unsigned long flags;
7898         struct offline_device_entry *d;
7899         struct list_head *this, *tmp;
7900
7901         spin_lock_irqsave(&h->offline_device_lock, flags);
7902         list_for_each_safe(this, tmp, &h->offline_device_list) {
7903                 d = list_entry(this, struct offline_device_entry,
7904                                 offline_list);
7905                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7906                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7907                         spin_lock_irqsave(&h->offline_device_lock, flags);
7908                         list_del(&d->offline_list);
7909                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7910                         return 1;
7911                 }
7912                 spin_lock_irqsave(&h->offline_device_lock, flags);
7913         }
7914         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7915         return 0;
7916 }
7917
7918 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7919 {
7920         unsigned long flags;
7921         struct ctlr_info *h = container_of(to_delayed_work(work),
7922                                         struct ctlr_info, rescan_ctlr_work);
7923
7924
7925         if (h->remove_in_progress)
7926                 return;
7927
7928         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7929                 scsi_host_get(h->scsi_host);
7930                 hpsa_ack_ctlr_events(h);
7931                 hpsa_scan_start(h->scsi_host);
7932                 scsi_host_put(h->scsi_host);
7933         }
7934         spin_lock_irqsave(&h->lock, flags);
7935         if (!h->remove_in_progress)
7936                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7937                                 h->heartbeat_sample_interval);
7938         spin_unlock_irqrestore(&h->lock, flags);
7939 }
7940
7941 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7942 {
7943         unsigned long flags;
7944         struct ctlr_info *h = container_of(to_delayed_work(work),
7945                                         struct ctlr_info, monitor_ctlr_work);
7946
7947         detect_controller_lockup(h);
7948         if (lockup_detected(h))
7949                 return;
7950
7951         spin_lock_irqsave(&h->lock, flags);
7952         if (!h->remove_in_progress)
7953                 schedule_delayed_work(&h->monitor_ctlr_work,
7954                                 h->heartbeat_sample_interval);
7955         spin_unlock_irqrestore(&h->lock, flags);
7956 }
7957
7958 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7959                                                 char *name)
7960 {
7961         struct workqueue_struct *wq = NULL;
7962
7963         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7964         if (!wq)
7965                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7966
7967         return wq;
7968 }
7969
7970 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7971 {
7972         int dac, rc;
7973         struct ctlr_info *h;
7974         int try_soft_reset = 0;
7975         unsigned long flags;
7976         u32 board_id;
7977
7978         if (number_of_controllers == 0)
7979                 printk(KERN_INFO DRIVER_NAME "\n");
7980
7981         rc = hpsa_lookup_board_id(pdev, &board_id);
7982         if (rc < 0) {
7983                 dev_warn(&pdev->dev, "Board ID not found\n");
7984                 return rc;
7985         }
7986
7987         rc = hpsa_init_reset_devices(pdev, board_id);
7988         if (rc) {
7989                 if (rc != -ENOTSUPP)
7990                         return rc;
7991                 /* If the reset fails in a particular way (it has no way to do
7992                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7993                  * a soft reset once we get the controller configured up to the
7994                  * point that it can accept a command.
7995                  */
7996                 try_soft_reset = 1;
7997                 rc = 0;
7998         }
7999
8000 reinit_after_soft_reset:
8001
8002         /* Command structures must be aligned on a 32-byte boundary because
8003          * the 5 lower bits of the address are used by the hardware. and by
8004          * the driver.  See comments in hpsa.h for more info.
8005          */
8006         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8007         h = kzalloc(sizeof(*h), GFP_KERNEL);
8008         if (!h) {
8009                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8010                 return -ENOMEM;
8011         }
8012
8013         h->pdev = pdev;
8014
8015         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8016         INIT_LIST_HEAD(&h->offline_device_list);
8017         spin_lock_init(&h->lock);
8018         spin_lock_init(&h->offline_device_lock);
8019         spin_lock_init(&h->scan_lock);
8020         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8021         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8022
8023         /* Allocate and clear per-cpu variable lockup_detected */
8024         h->lockup_detected = alloc_percpu(u32);
8025         if (!h->lockup_detected) {
8026                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8027                 rc = -ENOMEM;
8028                 goto clean1;    /* aer/h */
8029         }
8030         set_lockup_detected_for_all_cpus(h, 0);
8031
8032         rc = hpsa_pci_init(h);
8033         if (rc)
8034                 goto clean2;    /* lu, aer/h */
8035
8036         /* relies on h-> settings made by hpsa_pci_init, including
8037          * interrupt_mode h->intr */
8038         rc = hpsa_scsi_host_alloc(h);
8039         if (rc)
8040                 goto clean2_5;  /* pci, lu, aer/h */
8041
8042         sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8043         h->ctlr = number_of_controllers;
8044         number_of_controllers++;
8045
8046         /* configure PCI DMA stuff */
8047         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8048         if (rc == 0) {
8049                 dac = 1;
8050         } else {
8051                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8052                 if (rc == 0) {
8053                         dac = 0;
8054                 } else {
8055                         dev_err(&pdev->dev, "no suitable DMA available\n");
8056                         goto clean3;    /* shost, pci, lu, aer/h */
8057                 }
8058         }
8059
8060         /* make sure the board interrupts are off */
8061         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8062
8063         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8064         if (rc)
8065                 goto clean3;    /* shost, pci, lu, aer/h */
8066         rc = hpsa_alloc_cmd_pool(h);
8067         if (rc)
8068                 goto clean4;    /* irq, shost, pci, lu, aer/h */
8069         rc = hpsa_alloc_sg_chain_blocks(h);
8070         if (rc)
8071                 goto clean5;    /* cmd, irq, shost, pci, lu, aer/h */
8072         init_waitqueue_head(&h->scan_wait_queue);
8073         init_waitqueue_head(&h->abort_cmd_wait_queue);
8074         init_waitqueue_head(&h->event_sync_wait_queue);
8075         mutex_init(&h->reset_mutex);
8076         h->scan_finished = 1; /* no scan currently in progress */
8077
8078         pci_set_drvdata(pdev, h);
8079         h->ndevices = 0;
8080
8081         spin_lock_init(&h->devlock);
8082         rc = hpsa_put_ctlr_into_performant_mode(h);
8083         if (rc)
8084                 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8085
8086         /* hook into SCSI subsystem */
8087         rc = hpsa_scsi_add_host(h);
8088         if (rc)
8089                 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8090
8091         /* create the resubmit workqueue */
8092         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8093         if (!h->rescan_ctlr_wq) {
8094                 rc = -ENOMEM;
8095                 goto clean7;
8096         }
8097
8098         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8099         if (!h->resubmit_wq) {
8100                 rc = -ENOMEM;
8101                 goto clean7;    /* aer/h */
8102         }
8103
8104         /*
8105          * At this point, the controller is ready to take commands.
8106          * Now, if reset_devices and the hard reset didn't work, try
8107          * the soft reset and see if that works.
8108          */
8109         if (try_soft_reset) {
8110
8111                 /* This is kind of gross.  We may or may not get a completion
8112                  * from the soft reset command, and if we do, then the value
8113                  * from the fifo may or may not be valid.  So, we wait 10 secs
8114                  * after the reset throwing away any completions we get during
8115                  * that time.  Unregister the interrupt handler and register
8116                  * fake ones to scoop up any residual completions.
8117                  */
8118                 spin_lock_irqsave(&h->lock, flags);
8119                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8120                 spin_unlock_irqrestore(&h->lock, flags);
8121                 hpsa_free_irqs(h);
8122                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8123                                         hpsa_intx_discard_completions);
8124                 if (rc) {
8125                         dev_warn(&h->pdev->dev,
8126                                 "Failed to request_irq after soft reset.\n");
8127                         /*
8128                          * cannot goto clean7 or free_irqs will be called
8129                          * again. Instead, do its work
8130                          */
8131                         hpsa_free_performant_mode(h);   /* clean7 */
8132                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
8133                         hpsa_free_cmd_pool(h);          /* clean5 */
8134                         /*
8135                          * skip hpsa_free_irqs(h) clean4 since that
8136                          * was just called before request_irqs failed
8137                          */
8138                         goto clean3;
8139                 }
8140
8141                 rc = hpsa_kdump_soft_reset(h);
8142                 if (rc)
8143                         /* Neither hard nor soft reset worked, we're hosed. */
8144                         goto clean7;
8145
8146                 dev_info(&h->pdev->dev, "Board READY.\n");
8147                 dev_info(&h->pdev->dev,
8148                         "Waiting for stale completions to drain.\n");
8149                 h->access.set_intr_mask(h, HPSA_INTR_ON);
8150                 msleep(10000);
8151                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8152
8153                 rc = controller_reset_failed(h->cfgtable);
8154                 if (rc)
8155                         dev_info(&h->pdev->dev,
8156                                 "Soft reset appears to have failed.\n");
8157
8158                 /* since the controller's reset, we have to go back and re-init
8159                  * everything.  Easiest to just forget what we've done and do it
8160                  * all over again.
8161                  */
8162                 hpsa_undo_allocations_after_kdump_soft_reset(h);
8163                 try_soft_reset = 0;
8164                 if (rc)
8165                         /* don't goto clean, we already unallocated */
8166                         return -ENODEV;
8167
8168                 goto reinit_after_soft_reset;
8169         }
8170
8171         /* Enable Accelerated IO path at driver layer */
8172         h->acciopath_status = 1;
8173
8174
8175         /* Turn the interrupts on so we can service requests */
8176         h->access.set_intr_mask(h, HPSA_INTR_ON);
8177
8178         hpsa_hba_inquiry(h);
8179
8180         /* Monitor the controller for firmware lockups */
8181         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8182         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8183         schedule_delayed_work(&h->monitor_ctlr_work,
8184                                 h->heartbeat_sample_interval);
8185         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8186         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8187                                 h->heartbeat_sample_interval);
8188         return 0;
8189
8190 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8191         hpsa_free_performant_mode(h);
8192         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8193 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8194         hpsa_free_sg_chain_blocks(h);
8195 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8196         hpsa_free_cmd_pool(h);
8197 clean4: /* irq, shost, pci, lu, aer/h */
8198         hpsa_free_irqs(h);
8199 clean3: /* shost, pci, lu, aer/h */
8200         scsi_host_put(h->scsi_host);
8201         h->scsi_host = NULL;
8202 clean2_5: /* pci, lu, aer/h */
8203         hpsa_free_pci_init(h);
8204 clean2: /* lu, aer/h */
8205         if (h->lockup_detected) {
8206                 free_percpu(h->lockup_detected);
8207                 h->lockup_detected = NULL;
8208         }
8209 clean1: /* wq/aer/h */
8210         if (h->resubmit_wq) {
8211                 destroy_workqueue(h->resubmit_wq);
8212                 h->resubmit_wq = NULL;
8213         }
8214         if (h->rescan_ctlr_wq) {
8215                 destroy_workqueue(h->rescan_ctlr_wq);
8216                 h->rescan_ctlr_wq = NULL;
8217         }
8218         kfree(h);
8219         return rc;
8220 }
8221
8222 static void hpsa_flush_cache(struct ctlr_info *h)
8223 {
8224         char *flush_buf;
8225         struct CommandList *c;
8226         int rc;
8227
8228         if (unlikely(lockup_detected(h)))
8229                 return;
8230         flush_buf = kzalloc(4, GFP_KERNEL);
8231         if (!flush_buf)
8232                 return;
8233
8234         c = cmd_alloc(h);
8235
8236         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8237                 RAID_CTLR_LUNID, TYPE_CMD)) {
8238                 goto out;
8239         }
8240         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8241                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
8242         if (rc)
8243                 goto out;
8244         if (c->err_info->CommandStatus != 0)
8245 out:
8246                 dev_warn(&h->pdev->dev,
8247                         "error flushing cache on controller\n");
8248         cmd_free(h, c);
8249         kfree(flush_buf);
8250 }
8251
8252 static void hpsa_shutdown(struct pci_dev *pdev)
8253 {
8254         struct ctlr_info *h;
8255
8256         h = pci_get_drvdata(pdev);
8257         /* Turn board interrupts off  and send the flush cache command
8258          * sendcmd will turn off interrupt, and send the flush...
8259          * To write all data in the battery backed cache to disks
8260          */
8261         hpsa_flush_cache(h);
8262         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8263         hpsa_free_irqs(h);                      /* init_one 4 */
8264         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
8265 }
8266
8267 static void hpsa_free_device_info(struct ctlr_info *h)
8268 {
8269         int i;
8270
8271         for (i = 0; i < h->ndevices; i++) {
8272                 kfree(h->dev[i]);
8273                 h->dev[i] = NULL;
8274         }
8275 }
8276
8277 static void hpsa_remove_one(struct pci_dev *pdev)
8278 {
8279         struct ctlr_info *h;
8280         unsigned long flags;
8281
8282         if (pci_get_drvdata(pdev) == NULL) {
8283                 dev_err(&pdev->dev, "unable to remove device\n");
8284                 return;
8285         }
8286         h = pci_get_drvdata(pdev);
8287
8288         /* Get rid of any controller monitoring work items */
8289         spin_lock_irqsave(&h->lock, flags);
8290         h->remove_in_progress = 1;
8291         spin_unlock_irqrestore(&h->lock, flags);
8292         cancel_delayed_work_sync(&h->monitor_ctlr_work);
8293         cancel_delayed_work_sync(&h->rescan_ctlr_work);
8294         destroy_workqueue(h->rescan_ctlr_wq);
8295         destroy_workqueue(h->resubmit_wq);
8296
8297         /*
8298          * Call before disabling interrupts.
8299          * scsi_remove_host can trigger I/O operations especially
8300          * when multipath is enabled. There can be SYNCHRONIZE CACHE
8301          * operations which cannot complete and will hang the system.
8302          */
8303         if (h->scsi_host)
8304                 scsi_remove_host(h->scsi_host);         /* init_one 8 */
8305         /* includes hpsa_free_irqs - init_one 4 */
8306         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8307         hpsa_shutdown(pdev);
8308
8309         hpsa_free_device_info(h);               /* scan */
8310
8311         kfree(h->hba_inquiry_data);                     /* init_one 10 */
8312         h->hba_inquiry_data = NULL;                     /* init_one 10 */
8313         hpsa_free_ioaccel2_sg_chain_blocks(h);
8314         hpsa_free_performant_mode(h);                   /* init_one 7 */
8315         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
8316         hpsa_free_cmd_pool(h);                          /* init_one 5 */
8317
8318         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8319
8320         scsi_host_put(h->scsi_host);                    /* init_one 3 */
8321         h->scsi_host = NULL;                            /* init_one 3 */
8322
8323         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8324         hpsa_free_pci_init(h);                          /* init_one 2.5 */
8325
8326         free_percpu(h->lockup_detected);                /* init_one 2 */
8327         h->lockup_detected = NULL;                      /* init_one 2 */
8328         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
8329         kfree(h);                                       /* init_one 1 */
8330 }
8331
8332 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8333         __attribute__((unused)) pm_message_t state)
8334 {
8335         return -ENOSYS;
8336 }
8337
8338 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8339 {
8340         return -ENOSYS;
8341 }
8342
8343 static struct pci_driver hpsa_pci_driver = {
8344         .name = HPSA,
8345         .probe = hpsa_init_one,
8346         .remove = hpsa_remove_one,
8347         .id_table = hpsa_pci_device_id, /* id_table */
8348         .shutdown = hpsa_shutdown,
8349         .suspend = hpsa_suspend,
8350         .resume = hpsa_resume,
8351 };
8352
8353 /* Fill in bucket_map[], given nsgs (the max number of
8354  * scatter gather elements supported) and bucket[],
8355  * which is an array of 8 integers.  The bucket[] array
8356  * contains 8 different DMA transfer sizes (in 16
8357  * byte increments) which the controller uses to fetch
8358  * commands.  This function fills in bucket_map[], which
8359  * maps a given number of scatter gather elements to one of
8360  * the 8 DMA transfer sizes.  The point of it is to allow the
8361  * controller to only do as much DMA as needed to fetch the
8362  * command, with the DMA transfer size encoded in the lower
8363  * bits of the command address.
8364  */
8365 static void  calc_bucket_map(int bucket[], int num_buckets,
8366         int nsgs, int min_blocks, u32 *bucket_map)
8367 {
8368         int i, j, b, size;
8369
8370         /* Note, bucket_map must have nsgs+1 entries. */
8371         for (i = 0; i <= nsgs; i++) {
8372                 /* Compute size of a command with i SG entries */
8373                 size = i + min_blocks;
8374                 b = num_buckets; /* Assume the biggest bucket */
8375                 /* Find the bucket that is just big enough */
8376                 for (j = 0; j < num_buckets; j++) {
8377                         if (bucket[j] >= size) {
8378                                 b = j;
8379                                 break;
8380                         }
8381                 }
8382                 /* for a command with i SG entries, use bucket b. */
8383                 bucket_map[i] = b;
8384         }
8385 }
8386
8387 /*
8388  * return -ENODEV on err, 0 on success (or no action)
8389  * allocates numerous items that must be freed later
8390  */
8391 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8392 {
8393         int i;
8394         unsigned long register_value;
8395         unsigned long transMethod = CFGTBL_Trans_Performant |
8396                         (trans_support & CFGTBL_Trans_use_short_tags) |
8397                                 CFGTBL_Trans_enable_directed_msix |
8398                         (trans_support & (CFGTBL_Trans_io_accel1 |
8399                                 CFGTBL_Trans_io_accel2));
8400         struct access_method access = SA5_performant_access;
8401
8402         /* This is a bit complicated.  There are 8 registers on
8403          * the controller which we write to to tell it 8 different
8404          * sizes of commands which there may be.  It's a way of
8405          * reducing the DMA done to fetch each command.  Encoded into
8406          * each command's tag are 3 bits which communicate to the controller
8407          * which of the eight sizes that command fits within.  The size of
8408          * each command depends on how many scatter gather entries there are.
8409          * Each SG entry requires 16 bytes.  The eight registers are programmed
8410          * with the number of 16-byte blocks a command of that size requires.
8411          * The smallest command possible requires 5 such 16 byte blocks.
8412          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8413          * blocks.  Note, this only extends to the SG entries contained
8414          * within the command block, and does not extend to chained blocks
8415          * of SG elements.   bft[] contains the eight values we write to
8416          * the registers.  They are not evenly distributed, but have more
8417          * sizes for small commands, and fewer sizes for larger commands.
8418          */
8419         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8420 #define MIN_IOACCEL2_BFT_ENTRY 5
8421 #define HPSA_IOACCEL2_HEADER_SZ 4
8422         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8423                         13, 14, 15, 16, 17, 18, 19,
8424                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8425         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8426         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8427         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8428                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8429         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8430         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8431         /*  5 = 1 s/g entry or 4k
8432          *  6 = 2 s/g entry or 8k
8433          *  8 = 4 s/g entry or 16k
8434          * 10 = 6 s/g entry or 24k
8435          */
8436
8437         /* If the controller supports either ioaccel method then
8438          * we can also use the RAID stack submit path that does not
8439          * perform the superfluous readl() after each command submission.
8440          */
8441         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8442                 access = SA5_performant_access_no_read;
8443
8444         /* Controller spec: zero out this buffer. */
8445         for (i = 0; i < h->nreply_queues; i++)
8446                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8447
8448         bft[7] = SG_ENTRIES_IN_CMD + 4;
8449         calc_bucket_map(bft, ARRAY_SIZE(bft),
8450                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8451         for (i = 0; i < 8; i++)
8452                 writel(bft[i], &h->transtable->BlockFetch[i]);
8453
8454         /* size of controller ring buffer */
8455         writel(h->max_commands, &h->transtable->RepQSize);
8456         writel(h->nreply_queues, &h->transtable->RepQCount);
8457         writel(0, &h->transtable->RepQCtrAddrLow32);
8458         writel(0, &h->transtable->RepQCtrAddrHigh32);
8459
8460         for (i = 0; i < h->nreply_queues; i++) {
8461                 writel(0, &h->transtable->RepQAddr[i].upper);
8462                 writel(h->reply_queue[i].busaddr,
8463                         &h->transtable->RepQAddr[i].lower);
8464         }
8465
8466         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8467         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8468         /*
8469          * enable outbound interrupt coalescing in accelerator mode;
8470          */
8471         if (trans_support & CFGTBL_Trans_io_accel1) {
8472                 access = SA5_ioaccel_mode1_access;
8473                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8474                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8475         } else {
8476                 if (trans_support & CFGTBL_Trans_io_accel2) {
8477                         access = SA5_ioaccel_mode2_access;
8478                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8479                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8480                 }
8481         }
8482         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8483         if (hpsa_wait_for_mode_change_ack(h)) {
8484                 dev_err(&h->pdev->dev,
8485                         "performant mode problem - doorbell timeout\n");
8486                 return -ENODEV;
8487         }
8488         register_value = readl(&(h->cfgtable->TransportActive));
8489         if (!(register_value & CFGTBL_Trans_Performant)) {
8490                 dev_err(&h->pdev->dev,
8491                         "performant mode problem - transport not active\n");
8492                 return -ENODEV;
8493         }
8494         /* Change the access methods to the performant access methods */
8495         h->access = access;
8496         h->transMethod = transMethod;
8497
8498         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8499                 (trans_support & CFGTBL_Trans_io_accel2)))
8500                 return 0;
8501
8502         if (trans_support & CFGTBL_Trans_io_accel1) {
8503                 /* Set up I/O accelerator mode */
8504                 for (i = 0; i < h->nreply_queues; i++) {
8505                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8506                         h->reply_queue[i].current_entry =
8507                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8508                 }
8509                 bft[7] = h->ioaccel_maxsg + 8;
8510                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8511                                 h->ioaccel1_blockFetchTable);
8512
8513                 /* initialize all reply queue entries to unused */
8514                 for (i = 0; i < h->nreply_queues; i++)
8515                         memset(h->reply_queue[i].head,
8516                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8517                                 h->reply_queue_size);
8518
8519                 /* set all the constant fields in the accelerator command
8520                  * frames once at init time to save CPU cycles later.
8521                  */
8522                 for (i = 0; i < h->nr_cmds; i++) {
8523                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8524
8525                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8526                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8527                                         (i * sizeof(struct ErrorInfo)));
8528                         cp->err_info_len = sizeof(struct ErrorInfo);
8529                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8530                         cp->host_context_flags =
8531                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8532                         cp->timeout_sec = 0;
8533                         cp->ReplyQueue = 0;
8534                         cp->tag =
8535                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8536                         cp->host_addr =
8537                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8538                                         (i * sizeof(struct io_accel1_cmd)));
8539                 }
8540         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8541                 u64 cfg_offset, cfg_base_addr_index;
8542                 u32 bft2_offset, cfg_base_addr;
8543                 int rc;
8544
8545                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8546                         &cfg_base_addr_index, &cfg_offset);
8547                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8548                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8549                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8550                                 4, h->ioaccel2_blockFetchTable);
8551                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8552                 BUILD_BUG_ON(offsetof(struct CfgTable,
8553                                 io_accel_request_size_offset) != 0xb8);
8554                 h->ioaccel2_bft2_regs =
8555                         remap_pci_mem(pci_resource_start(h->pdev,
8556                                         cfg_base_addr_index) +
8557                                         cfg_offset + bft2_offset,
8558                                         ARRAY_SIZE(bft2) *
8559                                         sizeof(*h->ioaccel2_bft2_regs));
8560                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8561                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8562         }
8563         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8564         if (hpsa_wait_for_mode_change_ack(h)) {
8565                 dev_err(&h->pdev->dev,
8566                         "performant mode problem - enabling ioaccel mode\n");
8567                 return -ENODEV;
8568         }
8569         return 0;
8570 }
8571
8572 /* Free ioaccel1 mode command blocks and block fetch table */
8573 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8574 {
8575         if (h->ioaccel_cmd_pool) {
8576                 pci_free_consistent(h->pdev,
8577                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8578                         h->ioaccel_cmd_pool,
8579                         h->ioaccel_cmd_pool_dhandle);
8580                 h->ioaccel_cmd_pool = NULL;
8581                 h->ioaccel_cmd_pool_dhandle = 0;
8582         }
8583         kfree(h->ioaccel1_blockFetchTable);
8584         h->ioaccel1_blockFetchTable = NULL;
8585 }
8586
8587 /* Allocate ioaccel1 mode command blocks and block fetch table */
8588 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8589 {
8590         h->ioaccel_maxsg =
8591                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8592         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8593                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8594
8595         /* Command structures must be aligned on a 128-byte boundary
8596          * because the 7 lower bits of the address are used by the
8597          * hardware.
8598          */
8599         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8600                         IOACCEL1_COMMANDLIST_ALIGNMENT);
8601         h->ioaccel_cmd_pool =
8602                 pci_alloc_consistent(h->pdev,
8603                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8604                         &(h->ioaccel_cmd_pool_dhandle));
8605
8606         h->ioaccel1_blockFetchTable =
8607                 kmalloc(((h->ioaccel_maxsg + 1) *
8608                                 sizeof(u32)), GFP_KERNEL);
8609
8610         if ((h->ioaccel_cmd_pool == NULL) ||
8611                 (h->ioaccel1_blockFetchTable == NULL))
8612                 goto clean_up;
8613
8614         memset(h->ioaccel_cmd_pool, 0,
8615                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8616         return 0;
8617
8618 clean_up:
8619         hpsa_free_ioaccel1_cmd_and_bft(h);
8620         return -ENOMEM;
8621 }
8622
8623 /* Free ioaccel2 mode command blocks and block fetch table */
8624 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8625 {
8626         hpsa_free_ioaccel2_sg_chain_blocks(h);
8627
8628         if (h->ioaccel2_cmd_pool) {
8629                 pci_free_consistent(h->pdev,
8630                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8631                         h->ioaccel2_cmd_pool,
8632                         h->ioaccel2_cmd_pool_dhandle);
8633                 h->ioaccel2_cmd_pool = NULL;
8634                 h->ioaccel2_cmd_pool_dhandle = 0;
8635         }
8636         kfree(h->ioaccel2_blockFetchTable);
8637         h->ioaccel2_blockFetchTable = NULL;
8638 }
8639
8640 /* Allocate ioaccel2 mode command blocks and block fetch table */
8641 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8642 {
8643         int rc;
8644
8645         /* Allocate ioaccel2 mode command blocks and block fetch table */
8646
8647         h->ioaccel_maxsg =
8648                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8649         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8650                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8651
8652         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8653                         IOACCEL2_COMMANDLIST_ALIGNMENT);
8654         h->ioaccel2_cmd_pool =
8655                 pci_alloc_consistent(h->pdev,
8656                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8657                         &(h->ioaccel2_cmd_pool_dhandle));
8658
8659         h->ioaccel2_blockFetchTable =
8660                 kmalloc(((h->ioaccel_maxsg + 1) *
8661                                 sizeof(u32)), GFP_KERNEL);
8662
8663         if ((h->ioaccel2_cmd_pool == NULL) ||
8664                 (h->ioaccel2_blockFetchTable == NULL)) {
8665                 rc = -ENOMEM;
8666                 goto clean_up;
8667         }
8668
8669         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8670         if (rc)
8671                 goto clean_up;
8672
8673         memset(h->ioaccel2_cmd_pool, 0,
8674                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8675         return 0;
8676
8677 clean_up:
8678         hpsa_free_ioaccel2_cmd_and_bft(h);
8679         return rc;
8680 }
8681
8682 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8683 static void hpsa_free_performant_mode(struct ctlr_info *h)
8684 {
8685         kfree(h->blockFetchTable);
8686         h->blockFetchTable = NULL;
8687         hpsa_free_reply_queues(h);
8688         hpsa_free_ioaccel1_cmd_and_bft(h);
8689         hpsa_free_ioaccel2_cmd_and_bft(h);
8690 }
8691
8692 /* return -ENODEV on error, 0 on success (or no action)
8693  * allocates numerous items that must be freed later
8694  */
8695 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8696 {
8697         u32 trans_support;
8698         unsigned long transMethod = CFGTBL_Trans_Performant |
8699                                         CFGTBL_Trans_use_short_tags;
8700         int i, rc;
8701
8702         if (hpsa_simple_mode)
8703                 return 0;
8704
8705         trans_support = readl(&(h->cfgtable->TransportSupport));
8706         if (!(trans_support & PERFORMANT_MODE))
8707                 return 0;
8708
8709         /* Check for I/O accelerator mode support */
8710         if (trans_support & CFGTBL_Trans_io_accel1) {
8711                 transMethod |= CFGTBL_Trans_io_accel1 |
8712                                 CFGTBL_Trans_enable_directed_msix;
8713                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
8714                 if (rc)
8715                         return rc;
8716         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8717                 transMethod |= CFGTBL_Trans_io_accel2 |
8718                                 CFGTBL_Trans_enable_directed_msix;
8719                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
8720                 if (rc)
8721                         return rc;
8722         }
8723
8724         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
8725         hpsa_get_max_perf_mode_cmds(h);
8726         /* Performant mode ring buffer and supporting data structures */
8727         h->reply_queue_size = h->max_commands * sizeof(u64);
8728
8729         for (i = 0; i < h->nreply_queues; i++) {
8730                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
8731                                                 h->reply_queue_size,
8732                                                 &(h->reply_queue[i].busaddr));
8733                 if (!h->reply_queue[i].head) {
8734                         rc = -ENOMEM;
8735                         goto clean1;    /* rq, ioaccel */
8736                 }
8737                 h->reply_queue[i].size = h->max_commands;
8738                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
8739                 h->reply_queue[i].current_entry = 0;
8740         }
8741
8742         /* Need a block fetch table for performant mode */
8743         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
8744                                 sizeof(u32)), GFP_KERNEL);
8745         if (!h->blockFetchTable) {
8746                 rc = -ENOMEM;
8747                 goto clean1;    /* rq, ioaccel */
8748         }
8749
8750         rc = hpsa_enter_performant_mode(h, trans_support);
8751         if (rc)
8752                 goto clean2;    /* bft, rq, ioaccel */
8753         return 0;
8754
8755 clean2: /* bft, rq, ioaccel */
8756         kfree(h->blockFetchTable);
8757         h->blockFetchTable = NULL;
8758 clean1: /* rq, ioaccel */
8759         hpsa_free_reply_queues(h);
8760         hpsa_free_ioaccel1_cmd_and_bft(h);
8761         hpsa_free_ioaccel2_cmd_and_bft(h);
8762         return rc;
8763 }
8764
8765 static int is_accelerated_cmd(struct CommandList *c)
8766 {
8767         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
8768 }
8769
8770 static void hpsa_drain_accel_commands(struct ctlr_info *h)
8771 {
8772         struct CommandList *c = NULL;
8773         int i, accel_cmds_out;
8774         int refcount;
8775
8776         do { /* wait for all outstanding ioaccel commands to drain out */
8777                 accel_cmds_out = 0;
8778                 for (i = 0; i < h->nr_cmds; i++) {
8779                         c = h->cmd_pool + i;
8780                         refcount = atomic_inc_return(&c->refcount);
8781                         if (refcount > 1) /* Command is allocated */
8782                                 accel_cmds_out += is_accelerated_cmd(c);
8783                         cmd_free(h, c);
8784                 }
8785                 if (accel_cmds_out <= 0)
8786                         break;
8787                 msleep(100);
8788         } while (1);
8789 }
8790
8791 /*
8792  *  This is it.  Register the PCI driver information for the cards we control
8793  *  the OS will call our registered routines when it finds one of our cards.
8794  */
8795 static int __init hpsa_init(void)
8796 {
8797         return pci_register_driver(&hpsa_pci_driver);
8798 }
8799
8800 static void __exit hpsa_cleanup(void)
8801 {
8802         pci_unregister_driver(&hpsa_pci_driver);
8803 }
8804
8805 static void __attribute__((unused)) verify_offsets(void)
8806 {
8807 #define VERIFY_OFFSET(member, offset) \
8808         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8809
8810         VERIFY_OFFSET(structure_size, 0);
8811         VERIFY_OFFSET(volume_blk_size, 4);
8812         VERIFY_OFFSET(volume_blk_cnt, 8);
8813         VERIFY_OFFSET(phys_blk_shift, 16);
8814         VERIFY_OFFSET(parity_rotation_shift, 17);
8815         VERIFY_OFFSET(strip_size, 18);
8816         VERIFY_OFFSET(disk_starting_blk, 20);
8817         VERIFY_OFFSET(disk_blk_cnt, 28);
8818         VERIFY_OFFSET(data_disks_per_row, 36);
8819         VERIFY_OFFSET(metadata_disks_per_row, 38);
8820         VERIFY_OFFSET(row_cnt, 40);
8821         VERIFY_OFFSET(layout_map_count, 42);
8822         VERIFY_OFFSET(flags, 44);
8823         VERIFY_OFFSET(dekindex, 46);
8824         /* VERIFY_OFFSET(reserved, 48 */
8825         VERIFY_OFFSET(data, 64);
8826
8827 #undef VERIFY_OFFSET
8828
8829 #define VERIFY_OFFSET(member, offset) \
8830         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8831
8832         VERIFY_OFFSET(IU_type, 0);
8833         VERIFY_OFFSET(direction, 1);
8834         VERIFY_OFFSET(reply_queue, 2);
8835         /* VERIFY_OFFSET(reserved1, 3);  */
8836         VERIFY_OFFSET(scsi_nexus, 4);
8837         VERIFY_OFFSET(Tag, 8);
8838         VERIFY_OFFSET(cdb, 16);
8839         VERIFY_OFFSET(cciss_lun, 32);
8840         VERIFY_OFFSET(data_len, 40);
8841         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8842         VERIFY_OFFSET(sg_count, 45);
8843         /* VERIFY_OFFSET(reserved3 */
8844         VERIFY_OFFSET(err_ptr, 48);
8845         VERIFY_OFFSET(err_len, 56);
8846         /* VERIFY_OFFSET(reserved4  */
8847         VERIFY_OFFSET(sg, 64);
8848
8849 #undef VERIFY_OFFSET
8850
8851 #define VERIFY_OFFSET(member, offset) \
8852         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8853
8854         VERIFY_OFFSET(dev_handle, 0x00);
8855         VERIFY_OFFSET(reserved1, 0x02);
8856         VERIFY_OFFSET(function, 0x03);
8857         VERIFY_OFFSET(reserved2, 0x04);
8858         VERIFY_OFFSET(err_info, 0x0C);
8859         VERIFY_OFFSET(reserved3, 0x10);
8860         VERIFY_OFFSET(err_info_len, 0x12);
8861         VERIFY_OFFSET(reserved4, 0x13);
8862         VERIFY_OFFSET(sgl_offset, 0x14);
8863         VERIFY_OFFSET(reserved5, 0x15);
8864         VERIFY_OFFSET(transfer_len, 0x1C);
8865         VERIFY_OFFSET(reserved6, 0x20);
8866         VERIFY_OFFSET(io_flags, 0x24);
8867         VERIFY_OFFSET(reserved7, 0x26);
8868         VERIFY_OFFSET(LUN, 0x34);
8869         VERIFY_OFFSET(control, 0x3C);
8870         VERIFY_OFFSET(CDB, 0x40);
8871         VERIFY_OFFSET(reserved8, 0x50);
8872         VERIFY_OFFSET(host_context_flags, 0x60);
8873         VERIFY_OFFSET(timeout_sec, 0x62);
8874         VERIFY_OFFSET(ReplyQueue, 0x64);
8875         VERIFY_OFFSET(reserved9, 0x65);
8876         VERIFY_OFFSET(tag, 0x68);
8877         VERIFY_OFFSET(host_addr, 0x70);
8878         VERIFY_OFFSET(CISS_LUN, 0x78);
8879         VERIFY_OFFSET(SG, 0x78 + 8);
8880 #undef VERIFY_OFFSET
8881 }
8882
8883 module_init(hpsa_init);
8884 module_exit(hpsa_cleanup);