drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2014-2015 PMC-Sierra, Inc.
   4  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; version 2 of the License.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    Questions/Comments/Bugfixes to storagedev@pmcs.com
  16  *
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/types.h>
  22 #include <linux/pci.h>
  23 #include <linux/pci-aspm.h>
  24 #include <linux/kernel.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/fs.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/compat.h>
  32 #include <linux/blktrace_api.h>
  33 #include <linux/uaccess.h>
  34 #include <linux/io.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/completion.h>
  37 #include <linux/moduleparam.h>
  38 #include <scsi/scsi.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi_tcq.h>
  43 #include <scsi/scsi_eh.h>
  44 #include <scsi/scsi_dbg.h>
  45 #include <linux/cciss_ioctl.h>
  46 #include <linux/string.h>
  47 #include <linux/bitmap.h>
  48 #include <linux/atomic.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/percpu-defs.h>
  51 #include <linux/percpu.h>
  52 #include <asm/unaligned.h>
  53 #include <asm/div64.h>
  54 #include "hpsa_cmd.h"
  55 #include "hpsa.h"
  56
  57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  58 #define HPSA_DRIVER_VERSION "3.4.10-0"
  59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  60 #define HPSA "hpsa"
  61
  62 /* How long to wait for CISS doorbell communication */
  63 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  64 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  65 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  66 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  67 #define MAX_IOCTL_CONFIG_WAIT 1000
  68
  69 /*define how many times we will try a command because of bus resets */
  70 #define MAX_CMD_RETRIES 3
  71
  72 /* Embedded module documentation macros - see modules.h */
  73 MODULE_AUTHOR("Hewlett-Packard Company");
  74 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  75         HPSA_DRIVER_VERSION);
  76 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  77 MODULE_VERSION(HPSA_DRIVER_VERSION);
  78 MODULE_LICENSE("GPL");
  79
  80 static int hpsa_allow_any;
  81 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(hpsa_allow_any,
  83                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  84 static int hpsa_simple_mode;
  85 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  86 MODULE_PARM_DESC(hpsa_simple_mode,
  87         "Use 'simple mode' rather than 'performant mode'");
  88
  89 /* define the PCI info for the cards we can control */
  90 static const struct pci_device_id hpsa_pci_device_id[] = {
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 131         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
 132         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
 133         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
 134         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
 135         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
 136         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
 137         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 138         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 139         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 140         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 141         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 142         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 143                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 144         {0,}
 145 };
 146
 147 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 148
 149 /*  board_id = Subsystem Device ID & Vendor ID
 150  *  product = Marketing Name for the board
 151  *  access = Address of the struct of function pointers
 152  */
 153 static struct board_type products[] = {
 154         {0x3241103C, "Smart Array P212", &SA5_access},
 155         {0x3243103C, "Smart Array P410", &SA5_access},
 156         {0x3245103C, "Smart Array P410i", &SA5_access},
 157         {0x3247103C, "Smart Array P411", &SA5_access},
 158         {0x3249103C, "Smart Array P812", &SA5_access},
 159         {0x324A103C, "Smart Array P712m", &SA5_access},
 160         {0x324B103C, "Smart Array P711m", &SA5_access},
 161         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 162         {0x3350103C, "Smart Array P222", &SA5_access},
 163         {0x3351103C, "Smart Array P420", &SA5_access},
 164         {0x3352103C, "Smart Array P421", &SA5_access},
 165         {0x3353103C, "Smart Array P822", &SA5_access},
 166         {0x3354103C, "Smart Array P420i", &SA5_access},
 167         {0x3355103C, "Smart Array P220i", &SA5_access},
 168         {0x3356103C, "Smart Array P721m", &SA5_access},
 169         {0x1921103C, "Smart Array P830i", &SA5_access},
 170         {0x1922103C, "Smart Array P430", &SA5_access},
 171         {0x1923103C, "Smart Array P431", &SA5_access},
 172         {0x1924103C, "Smart Array P830", &SA5_access},
 173         {0x1926103C, "Smart Array P731m", &SA5_access},
 174         {0x1928103C, "Smart Array P230i", &SA5_access},
 175         {0x1929103C, "Smart Array P530", &SA5_access},
 176         {0x21BD103C, "Smart Array P244br", &SA5_access},
 177         {0x21BE103C, "Smart Array P741m", &SA5_access},
 178         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 179         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 180         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 181         {0x21C2103C, "Smart Array P440", &SA5_access},
 182         {0x21C3103C, "Smart Array P441", &SA5_access},
 183         {0x21C4103C, "Smart Array", &SA5_access},
 184         {0x21C5103C, "Smart Array P841", &SA5_access},
 185         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 186         {0x21C7103C, "Smart HBA H240", &SA5_access},
 187         {0x21C8103C, "Smart HBA H241", &SA5_access},
 188         {0x21C9103C, "Smart Array", &SA5_access},
 189         {0x21CA103C, "Smart Array P246br", &SA5_access},
 190         {0x21CB103C, "Smart Array P840", &SA5_access},
 191         {0x21CC103C, "Smart Array", &SA5_access},
 192         {0x21CD103C, "Smart Array", &SA5_access},
 193         {0x21CE103C, "Smart HBA", &SA5_access},
 194         {0x05809005, "SmartHBA-SA", &SA5_access},
 195         {0x05819005, "SmartHBA-SA 8i", &SA5_access},
 196         {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
 197         {0x05839005, "SmartHBA-SA 8e", &SA5_access},
 198         {0x05849005, "SmartHBA-SA 16i", &SA5_access},
 199         {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
 200         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 201         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 202         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 203         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 204         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 205         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 206 };
 207
 208 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
 209 static const struct scsi_cmnd hpsa_cmd_busy;
 210 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
 211 static const struct scsi_cmnd hpsa_cmd_idle;
 212 static int number_of_controllers;
 213
 214 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 215 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 216 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 217
 218 #ifdef CONFIG_COMPAT
 219 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 220         void __user *arg);
 221 #endif
 222
 223 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 224 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 225 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
 226 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
 227                                             struct scsi_cmnd *scmd);
 228 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 229         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 230         int cmd_type);
 231 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 232 #define VPD_PAGE (1 << 8)
 233 #define HPSA_SIMPLE_ERROR_BITS 0x03
 234
 235 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 236 static void hpsa_scan_start(struct Scsi_Host *);
 237 static int hpsa_scan_finished(struct Scsi_Host *sh,
 238         unsigned long elapsed_time);
 239 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 240
 241 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 242 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 243 static int hpsa_slave_alloc(struct scsi_device *sdev);
 244 static int hpsa_slave_configure(struct scsi_device *sdev);
 245 static void hpsa_slave_destroy(struct scsi_device *sdev);
 246
 247 static void hpsa_update_scsi_devices(struct ctlr_info *h);
 248 static int check_for_unit_attention(struct ctlr_info *h,
 249         struct CommandList *c);
 250 static void check_ioctl_unit_attention(struct ctlr_info *h,
 251         struct CommandList *c);
 252 /* performant mode helper functions */
 253 static void calc_bucket_map(int *bucket, int num_buckets,
 254         int nsgs, int min_blocks, u32 *bucket_map);
 255 static void hpsa_free_performant_mode(struct ctlr_info *h);
 256 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 257 static inline u32 next_command(struct ctlr_info *h, u8 q);
 258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 259                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 260                                u64 *cfg_offset);
 261 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 262                                     unsigned long *memory_bar);
 263 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 264 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 265                                      int wait_for_ready);
 266 static inline void finish_cmd(struct CommandList *c);
 267 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 268 #define BOARD_NOT_READY 0
 269 #define BOARD_READY 1
 270 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 271 static void hpsa_flush_cache(struct ctlr_info *h);
 272 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 273         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 274         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 275 static void hpsa_command_resubmit_worker(struct work_struct *work);
 276 static u32 lockup_detected(struct ctlr_info *h);
 277 static int detect_controller_lockup(struct ctlr_info *h);
 278 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device);
 279
 280 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 281 {
 282         unsigned long *priv = shost_priv(sdev->host);
 283         return (struct ctlr_info *) *priv;
 284 }
 285
 286 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 287 {
 288         unsigned long *priv = shost_priv(sh);
 289         return (struct ctlr_info *) *priv;
 290 }
 291
 292 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
 293 {
 294         return c->scsi_cmd == SCSI_CMD_IDLE;
 295 }
 296
 297 static inline bool hpsa_is_pending_event(struct CommandList *c)
 298 {
 299         return c->abort_pending || c->reset_pending;
 300 }
 301
 302 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 303 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 304                         u8 *sense_key, u8 *asc, u8 *ascq)
 305 {
 306         struct scsi_sense_hdr sshdr;
 307         bool rc;
 308
 309         *sense_key = -1;
 310         *asc = -1;
 311         *ascq = -1;
 312
 313         if (sense_data_len < 1)
 314                 return;
 315
 316         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 317         if (rc) {
 318                 *sense_key = sshdr.sense_key;
 319                 *asc = sshdr.asc;
 320                 *ascq = sshdr.ascq;
 321         }
 322 }
 323
 324 static int check_for_unit_attention(struct ctlr_info *h,
 325         struct CommandList *c)
 326 {
 327         u8 sense_key, asc, ascq;
 328         int sense_len;
 329
 330         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 331                 sense_len = sizeof(c->err_info->SenseInfo);
 332         else
 333                 sense_len = c->err_info->SenseLen;
 334
 335         decode_sense_data(c->err_info->SenseInfo, sense_len,
 336                                 &sense_key, &asc, &ascq);
 337         if (sense_key != UNIT_ATTENTION || asc == 0xff)
 338                 return 0;
 339
 340         switch (asc) {
 341         case STATE_CHANGED:
 342                 dev_warn(&h->pdev->dev,
 343                         "%s: a state change detected, command retried\n",
 344                         h->devname);
 345                 break;
 346         case LUN_FAILED:
 347                 dev_warn(&h->pdev->dev,
 348                         "%s: LUN failure detected\n", h->devname);
 349                 break;
 350         case REPORT_LUNS_CHANGED:
 351                 dev_warn(&h->pdev->dev,
 352                         "%s: report LUN data changed\n", h->devname);
 353         /*
 354          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 355          * target (array) devices.
 356          */
 357                 break;
 358         case POWER_OR_RESET:
 359                 dev_warn(&h->pdev->dev,
 360                         "%s: a power on or device reset detected\n",
 361                         h->devname);
 362                 break;
 363         case UNIT_ATTENTION_CLEARED:
 364                 dev_warn(&h->pdev->dev,
 365                         "%s: unit attention cleared by another initiator\n",
 366                         h->devname);
 367                 break;
 368         default:
 369                 dev_warn(&h->pdev->dev,
 370                         "%s: unknown unit attention detected\n",
 371                         h->devname);
 372                 break;
 373         }
 374         return 1;
 375 }
 376
 377 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 378 {
 379         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 380                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 381                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 382                 return 0;
 383         dev_warn(&h->pdev->dev, HPSA "device busy");
 384         return 1;
 385 }
 386
 387 static u32 lockup_detected(struct ctlr_info *h);
 388 static ssize_t host_show_lockup_detected(struct device *dev,
 389                 struct device_attribute *attr, char *buf)
 390 {
 391         int ld;
 392         struct ctlr_info *h;
 393         struct Scsi_Host *shost = class_to_shost(dev);
 394
 395         h = shost_to_hba(shost);
 396         ld = lockup_detected(h);
 397
 398         return sprintf(buf, "ld=%d\n", ld);
 399 }
 400
 401 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 402                                          struct device_attribute *attr,
 403                                          const char *buf, size_t count)
 404 {
 405         int status, len;
 406         struct ctlr_info *h;
 407         struct Scsi_Host *shost = class_to_shost(dev);
 408         char tmpbuf[10];
 409
 410         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 411                 return -EACCES;
 412         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 413         strncpy(tmpbuf, buf, len);
 414         tmpbuf[len] = '\0';
 415         if (sscanf(tmpbuf, "%d", &status) != 1)
 416                 return -EINVAL;
 417         h = shost_to_hba(shost);
 418         h->acciopath_status = !!status;
 419         dev_warn(&h->pdev->dev,
 420                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 421                 h->acciopath_status ? "enabled" : "disabled");
 422         return count;
 423 }
 424
 425 static ssize_t host_store_raid_offload_debug(struct device *dev,
 426                                          struct device_attribute *attr,
 427                                          const char *buf, size_t count)
 428 {
 429         int debug_level, len;
 430         struct ctlr_info *h;
 431         struct Scsi_Host *shost = class_to_shost(dev);
 432         char tmpbuf[10];
 433
 434         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 435                 return -EACCES;
 436         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 437         strncpy(tmpbuf, buf, len);
 438         tmpbuf[len] = '\0';
 439         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 440                 return -EINVAL;
 441         if (debug_level < 0)
 442                 debug_level = 0;
 443         h = shost_to_hba(shost);
 444         h->raid_offload_debug = debug_level;
 445         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 446                 h->raid_offload_debug);
 447         return count;
 448 }
 449
 450 static ssize_t host_store_rescan(struct device *dev,
 451                                  struct device_attribute *attr,
 452                                  const char *buf, size_t count)
 453 {
 454         struct ctlr_info *h;
 455         struct Scsi_Host *shost = class_to_shost(dev);
 456         h = shost_to_hba(shost);
 457         hpsa_scan_start(h->scsi_host);
 458         return count;
 459 }
 460
 461 static ssize_t host_show_firmware_revision(struct device *dev,
 462              struct device_attribute *attr, char *buf)
 463 {
 464         struct ctlr_info *h;
 465         struct Scsi_Host *shost = class_to_shost(dev);
 466         unsigned char *fwrev;
 467
 468         h = shost_to_hba(shost);
 469         if (!h->hba_inquiry_data)
 470                 return 0;
 471         fwrev = &h->hba_inquiry_data[32];
 472         return snprintf(buf, 20, "%c%c%c%c\n",
 473                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 474 }
 475
 476 static ssize_t host_show_commands_outstanding(struct device *dev,
 477              struct device_attribute *attr, char *buf)
 478 {
 479         struct Scsi_Host *shost = class_to_shost(dev);
 480         struct ctlr_info *h = shost_to_hba(shost);
 481
 482         return snprintf(buf, 20, "%d\n",
 483                         atomic_read(&h->commands_outstanding));
 484 }
 485
 486 static ssize_t host_show_transport_mode(struct device *dev,
 487         struct device_attribute *attr, char *buf)
 488 {
 489         struct ctlr_info *h;
 490         struct Scsi_Host *shost = class_to_shost(dev);
 491
 492         h = shost_to_hba(shost);
 493         return snprintf(buf, 20, "%s\n",
 494                 h->transMethod & CFGTBL_Trans_Performant ?
 495                         "performant" : "simple");
 496 }
 497
 498 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 499         struct device_attribute *attr, char *buf)
 500 {
 501         struct ctlr_info *h;
 502         struct Scsi_Host *shost = class_to_shost(dev);
 503
 504         h = shost_to_hba(shost);
 505         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 506                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 507 }
 508
 509 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 510 static u32 unresettable_controller[] = {
 511         0x324a103C, /* Smart Array P712m */
 512         0x324b103C, /* Smart Array P711m */
 513         0x3223103C, /* Smart Array P800 */
 514         0x3234103C, /* Smart Array P400 */
 515         0x3235103C, /* Smart Array P400i */
 516         0x3211103C, /* Smart Array E200i */
 517         0x3212103C, /* Smart Array E200 */
 518         0x3213103C, /* Smart Array E200i */
 519         0x3214103C, /* Smart Array E200i */
 520         0x3215103C, /* Smart Array E200i */
 521         0x3237103C, /* Smart Array E500 */
 522         0x323D103C, /* Smart Array P700m */
 523         0x40800E11, /* Smart Array 5i */
 524         0x409C0E11, /* Smart Array 6400 */
 525         0x409D0E11, /* Smart Array 6400 EM */
 526         0x40700E11, /* Smart Array 5300 */
 527         0x40820E11, /* Smart Array 532 */
 528         0x40830E11, /* Smart Array 5312 */
 529         0x409A0E11, /* Smart Array 641 */
 530         0x409B0E11, /* Smart Array 642 */
 531         0x40910E11, /* Smart Array 6i */
 532 };
 533
 534 /* List of controllers which cannot even be soft reset */
 535 static u32 soft_unresettable_controller[] = {
 536         0x40800E11, /* Smart Array 5i */
 537         0x40700E11, /* Smart Array 5300 */
 538         0x40820E11, /* Smart Array 532 */
 539         0x40830E11, /* Smart Array 5312 */
 540         0x409A0E11, /* Smart Array 641 */
 541         0x409B0E11, /* Smart Array 642 */
 542         0x40910E11, /* Smart Array 6i */
 543         /* Exclude 640x boards.  These are two pci devices in one slot
 544          * which share a battery backed cache module.  One controls the
 545          * cache, the other accesses the cache through the one that controls
 546          * it.  If we reset the one controlling the cache, the other will
 547          * likely not be happy.  Just forbid resetting this conjoined mess.
 548          * The 640x isn't really supported by hpsa anyway.
 549          */
 550         0x409C0E11, /* Smart Array 6400 */
 551         0x409D0E11, /* Smart Array 6400 EM */
 552 };
 553
 554 static u32 needs_abort_tags_swizzled[] = {
 555         0x323D103C, /* Smart Array P700m */
 556         0x324a103C, /* Smart Array P712m */
 557         0x324b103C, /* SmartArray P711m */
 558 };
 559
 560 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 561 {
 562         int i;
 563
 564         for (i = 0; i < nelems; i++)
 565                 if (a[i] == board_id)
 566                         return 1;
 567         return 0;
 568 }
 569
 570 static int ctlr_is_hard_resettable(u32 board_id)
 571 {
 572         return !board_id_in_array(unresettable_controller,
 573                         ARRAY_SIZE(unresettable_controller), board_id);
 574 }
 575
 576 static int ctlr_is_soft_resettable(u32 board_id)
 577 {
 578         return !board_id_in_array(soft_unresettable_controller,
 579                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 580 }
 581
 582 static int ctlr_is_resettable(u32 board_id)
 583 {
 584         return ctlr_is_hard_resettable(board_id) ||
 585                 ctlr_is_soft_resettable(board_id);
 586 }
 587
 588 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 589 {
 590         return board_id_in_array(needs_abort_tags_swizzled,
 591                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 592 }
 593
 594 static ssize_t host_show_resettable(struct device *dev,
 595         struct device_attribute *attr, char *buf)
 596 {
 597         struct ctlr_info *h;
 598         struct Scsi_Host *shost = class_to_shost(dev);
 599
 600         h = shost_to_hba(shost);
 601         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 602 }
 603
 604 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 605 {
 606         return (scsi3addr[3] & 0xC0) == 0x40;
 607 }
 608
 609 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 610         "1(+0)ADM", "UNKNOWN"
 611 };
 612 #define HPSA_RAID_0     0
 613 #define HPSA_RAID_4     1
 614 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 615 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 616 #define HPSA_RAID_51    4
 617 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 618 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 619 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 620
 621 static ssize_t raid_level_show(struct device *dev,
 622              struct device_attribute *attr, char *buf)
 623 {
 624         ssize_t l = 0;
 625         unsigned char rlevel;
 626         struct ctlr_info *h;
 627         struct scsi_device *sdev;
 628         struct hpsa_scsi_dev_t *hdev;
 629         unsigned long flags;
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639
 640         /* Is this even a logical drive? */
 641         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 642                 spin_unlock_irqrestore(&h->lock, flags);
 643                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 644                 return l;
 645         }
 646
 647         rlevel = hdev->raid_level;
 648         spin_unlock_irqrestore(&h->lock, flags);
 649         if (rlevel > RAID_UNKNOWN)
 650                 rlevel = RAID_UNKNOWN;
 651         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 652         return l;
 653 }
 654
 655 static ssize_t lunid_show(struct device *dev,
 656              struct device_attribute *attr, char *buf)
 657 {
 658         struct ctlr_info *h;
 659         struct scsi_device *sdev;
 660         struct hpsa_scsi_dev_t *hdev;
 661         unsigned long flags;
 662         unsigned char lunid[8];
 663
 664         sdev = to_scsi_device(dev);
 665         h = sdev_to_hba(sdev);
 666         spin_lock_irqsave(&h->lock, flags);
 667         hdev = sdev->hostdata;
 668         if (!hdev) {
 669                 spin_unlock_irqrestore(&h->lock, flags);
 670                 return -ENODEV;
 671         }
 672         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 673         spin_unlock_irqrestore(&h->lock, flags);
 674         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 675                 lunid[0], lunid[1], lunid[2], lunid[3],
 676                 lunid[4], lunid[5], lunid[6], lunid[7]);
 677 }
 678
 679 static ssize_t unique_id_show(struct device *dev,
 680              struct device_attribute *attr, char *buf)
 681 {
 682         struct ctlr_info *h;
 683         struct scsi_device *sdev;
 684         struct hpsa_scsi_dev_t *hdev;
 685         unsigned long flags;
 686         unsigned char sn[16];
 687
 688         sdev = to_scsi_device(dev);
 689         h = sdev_to_hba(sdev);
 690         spin_lock_irqsave(&h->lock, flags);
 691         hdev = sdev->hostdata;
 692         if (!hdev) {
 693                 spin_unlock_irqrestore(&h->lock, flags);
 694                 return -ENODEV;
 695         }
 696         memcpy(sn, hdev->device_id, sizeof(sn));
 697         spin_unlock_irqrestore(&h->lock, flags);
 698         return snprintf(buf, 16 * 2 + 2,
 699                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 700                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 701                         sn[0], sn[1], sn[2], sn[3],
 702                         sn[4], sn[5], sn[6], sn[7],
 703                         sn[8], sn[9], sn[10], sn[11],
 704                         sn[12], sn[13], sn[14], sn[15]);
 705 }
 706
 707 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 708              struct device_attribute *attr, char *buf)
 709 {
 710         struct ctlr_info *h;
 711         struct scsi_device *sdev;
 712         struct hpsa_scsi_dev_t *hdev;
 713         unsigned long flags;
 714         int offload_enabled;
 715
 716         sdev = to_scsi_device(dev);
 717         h = sdev_to_hba(sdev);
 718         spin_lock_irqsave(&h->lock, flags);
 719         hdev = sdev->hostdata;
 720         if (!hdev) {
 721                 spin_unlock_irqrestore(&h->lock, flags);
 722                 return -ENODEV;
 723         }
 724         offload_enabled = hdev->offload_enabled;
 725         spin_unlock_irqrestore(&h->lock, flags);
 726         return snprintf(buf, 20, "%d\n", offload_enabled);
 727 }
 728
 729 #define MAX_PATHS 8
 730 #define PATH_STRING_LEN 50
 731
 732 static ssize_t path_info_show(struct device *dev,
 733              struct device_attribute *attr, char *buf)
 734 {
 735         struct ctlr_info *h;
 736         struct scsi_device *sdev;
 737         struct hpsa_scsi_dev_t *hdev;
 738         unsigned long flags;
 739         int i;
 740         int output_len = 0;
 741         u8 box;
 742         u8 bay;
 743         u8 path_map_index = 0;
 744         char *active;
 745         unsigned char phys_connector[2];
 746         unsigned char path[MAX_PATHS][PATH_STRING_LEN];
 747
 748         memset(path, 0, MAX_PATHS * PATH_STRING_LEN);
 749         sdev = to_scsi_device(dev);
 750         h = sdev_to_hba(sdev);
 751         spin_lock_irqsave(&h->devlock, flags);
 752         hdev = sdev->hostdata;
 753         if (!hdev) {
 754                 spin_unlock_irqrestore(&h->devlock, flags);
 755                 return -ENODEV;
 756         }
 757
 758         bay = hdev->bay;
 759         for (i = 0; i < MAX_PATHS; i++) {
 760                 path_map_index = 1<<i;
 761                 if (i == hdev->active_path_index)
 762                         active = "Active";
 763                 else if (hdev->path_map & path_map_index)
 764                         active = "Inactive";
 765                 else
 766                         continue;
 767
 768                 output_len = snprintf(path[i],
 769                                 PATH_STRING_LEN, "[%d:%d:%d:%d] %20.20s ",
 770                                 h->scsi_host->host_no,
 771                                 hdev->bus, hdev->target, hdev->lun,
 772                                 scsi_device_type(hdev->devtype));
 773
 774                 if (is_ext_target(h, hdev) ||
 775                         (hdev->devtype == TYPE_RAID) ||
 776                         is_logical_dev_addr_mode(hdev->scsi3addr)) {
 777                         output_len += snprintf(path[i] + output_len,
 778                                                 PATH_STRING_LEN, "%s\n",
 779                                                 active);
 780                         continue;
 781                 }
 782
 783                 box = hdev->box[i];
 784                 memcpy(&phys_connector, &hdev->phys_connector[i],
 785                         sizeof(phys_connector));
 786                 if (phys_connector[0] < '0')
 787                         phys_connector[0] = '0';
 788                 if (phys_connector[1] < '0')
 789                         phys_connector[1] = '0';
 790                 if (hdev->phys_connector[i] > 0)
 791                         output_len += snprintf(path[i] + output_len,
 792                                 PATH_STRING_LEN,
 793                                 "PORT: %.2s ",
 794                                 phys_connector);
 795                 if (hdev->devtype == TYPE_DISK &&
 796                         hdev->expose_state != HPSA_DO_NOT_EXPOSE) {
 797                         if (box == 0 || box == 0xFF) {
 798                                 output_len += snprintf(path[i] + output_len,
 799                                         PATH_STRING_LEN,
 800                                         "BAY: %hhu %s\n",
 801                                         bay, active);
 802                         } else {
 803                                 output_len += snprintf(path[i] + output_len,
 804                                         PATH_STRING_LEN,
 805                                         "BOX: %hhu BAY: %hhu %s\n",
 806                                         box, bay, active);
 807                         }
 808                 } else if (box != 0 && box != 0xFF) {
 809                         output_len += snprintf(path[i] + output_len,
 810                                 PATH_STRING_LEN, "BOX: %hhu %s\n",
 811                                 box, active);
 812                 } else
 813                         output_len += snprintf(path[i] + output_len,
 814                                 PATH_STRING_LEN, "%s\n", active);
 815         }
 816
 817         spin_unlock_irqrestore(&h->devlock, flags);
 818         return snprintf(buf, output_len+1, "%s%s%s%s%s%s%s%s",
 819                 path[0], path[1], path[2], path[3],
 820                 path[4], path[5], path[6], path[7]);
 821 }
 822
 823 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 824 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 825 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 826 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 827 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 828                         host_show_hp_ssd_smart_path_enabled, NULL);
 829 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
 830 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 831                 host_show_hp_ssd_smart_path_status,
 832                 host_store_hp_ssd_smart_path_status);
 833 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 834                         host_store_raid_offload_debug);
 835 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 836         host_show_firmware_revision, NULL);
 837 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 838         host_show_commands_outstanding, NULL);
 839 static DEVICE_ATTR(transport_mode, S_IRUGO,
 840         host_show_transport_mode, NULL);
 841 static DEVICE_ATTR(resettable, S_IRUGO,
 842         host_show_resettable, NULL);
 843 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 844         host_show_lockup_detected, NULL);
 845
 846 static struct device_attribute *hpsa_sdev_attrs[] = {
 847         &dev_attr_raid_level,
 848         &dev_attr_lunid,
 849         &dev_attr_unique_id,
 850         &dev_attr_hp_ssd_smart_path_enabled,
 851         &dev_attr_path_info,
 852         &dev_attr_lockup_detected,
 853         NULL,
 854 };
 855
 856 static struct device_attribute *hpsa_shost_attrs[] = {
 857         &dev_attr_rescan,
 858         &dev_attr_firmware_revision,
 859         &dev_attr_commands_outstanding,
 860         &dev_attr_transport_mode,
 861         &dev_attr_resettable,
 862         &dev_attr_hp_ssd_smart_path_status,
 863         &dev_attr_raid_offload_debug,
 864         NULL,
 865 };
 866
 867 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 868                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 869
 870 static struct scsi_host_template hpsa_driver_template = {
 871         .module                 = THIS_MODULE,
 872         .name                   = HPSA,
 873         .proc_name              = HPSA,
 874         .queuecommand           = hpsa_scsi_queue_command,
 875         .scan_start             = hpsa_scan_start,
 876         .scan_finished          = hpsa_scan_finished,
 877         .change_queue_depth     = hpsa_change_queue_depth,
 878         .this_id                = -1,
 879         .use_clustering         = ENABLE_CLUSTERING,
 880         .eh_abort_handler       = hpsa_eh_abort_handler,
 881         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 882         .ioctl                  = hpsa_ioctl,
 883         .slave_alloc            = hpsa_slave_alloc,
 884         .slave_configure        = hpsa_slave_configure,
 885         .slave_destroy          = hpsa_slave_destroy,
 886 #ifdef CONFIG_COMPAT
 887         .compat_ioctl           = hpsa_compat_ioctl,
 888 #endif
 889         .sdev_attrs = hpsa_sdev_attrs,
 890         .shost_attrs = hpsa_shost_attrs,
 891         .max_sectors = 8192,
 892         .no_write_same = 1,
 893 };
 894
 895 static inline u32 next_command(struct ctlr_info *h, u8 q)
 896 {
 897         u32 a;
 898         struct reply_queue_buffer *rq = &h->reply_queue[q];
 899
 900         if (h->transMethod & CFGTBL_Trans_io_accel1)
 901                 return h->access.command_completed(h, q);
 902
 903         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 904                 return h->access.command_completed(h, q);
 905
 906         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 907                 a = rq->head[rq->current_entry];
 908                 rq->current_entry++;
 909                 atomic_dec(&h->commands_outstanding);
 910         } else {
 911                 a = FIFO_EMPTY;
 912         }
 913         /* Check for wraparound */
 914         if (rq->current_entry == h->max_commands) {
 915                 rq->current_entry = 0;
 916                 rq->wraparound ^= 1;
 917         }
 918         return a;
 919 }
 920
 921 /*
 922  * There are some special bits in the bus address of the
 923  * command that we have to set for the controller to know
 924  * how to process the command:
 925  *
 926  * Normal performant mode:
 927  * bit 0: 1 means performant mode, 0 means simple mode.
 928  * bits 1-3 = block fetch table entry
 929  * bits 4-6 = command type (== 0)
 930  *
 931  * ioaccel1 mode:
 932  * bit 0 = "performant mode" bit.
 933  * bits 1-3 = block fetch table entry
 934  * bits 4-6 = command type (== 110)
 935  * (command type is needed because ioaccel1 mode
 936  * commands are submitted through the same register as normal
 937  * mode commands, so this is how the controller knows whether
 938  * the command is normal mode or ioaccel1 mode.)
 939  *
 940  * ioaccel2 mode:
 941  * bit 0 = "performant mode" bit.
 942  * bits 1-4 = block fetch table entry (note extra bit)
 943  * bits 4-6 = not needed, because ioaccel2 mode has
 944  * a separate special register for submitting commands.
 945  */
 946
 947 /*
 948  * set_performant_mode: Modify the tag for cciss performant
 949  * set bit 0 for pull model, bits 3-1 for block fetch
 950  * register number
 951  */
 952 #define DEFAULT_REPLY_QUEUE (-1)
 953 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 954                                         int reply_queue)
 955 {
 956         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 957                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 958                 if (unlikely(!h->msix_vector))
 959                         return;
 960                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 961                         c->Header.ReplyQueue =
 962                                 raw_smp_processor_id() % h->nreply_queues;
 963                 else
 964                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 965         }
 966 }
 967
 968 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 969                                                 struct CommandList *c,
 970                                                 int reply_queue)
 971 {
 972         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 973
 974         /*
 975          * Tell the controller to post the reply to the queue for this
 976          * processor.  This seems to give the best I/O throughput.
 977          */
 978         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 979                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 980         else
 981                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 982         /*
 983          * Set the bits in the address sent down to include:
 984          *  - performant mode bit (bit 0)
 985          *  - pull count (bits 1-3)
 986          *  - command type (bits 4-6)
 987          */
 988         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 989                                         IOACCEL1_BUSADDR_CMDTYPE;
 990 }
 991
 992 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
 993                                                 struct CommandList *c,
 994                                                 int reply_queue)
 995 {
 996         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
 997                 &h->ioaccel2_cmd_pool[c->cmdindex];
 998
 999         /* Tell the controller to post the reply to the queue for this
1000          * processor.  This seems to give the best I/O throughput.
1001          */
1002         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1003                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1004         else
1005                 cp->reply_queue = reply_queue % h->nreply_queues;
1006         /* Set the bits in the address sent down to include:
1007          *  - performant mode bit not used in ioaccel mode 2
1008          *  - pull count (bits 0-3)
1009          *  - command type isn't needed for ioaccel2
1010          */
1011         c->busaddr |= h->ioaccel2_blockFetchTable[0];
1012 }
1013
1014 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1015                                                 struct CommandList *c,
1016                                                 int reply_queue)
1017 {
1018         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1019
1020         /*
1021          * Tell the controller to post the reply to the queue for this
1022          * processor.  This seems to give the best I/O throughput.
1023          */
1024         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1026         else
1027                 cp->reply_queue = reply_queue % h->nreply_queues;
1028         /*
1029          * Set the bits in the address sent down to include:
1030          *  - performant mode bit not used in ioaccel mode 2
1031          *  - pull count (bits 0-3)
1032          *  - command type isn't needed for ioaccel2
1033          */
1034         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1035 }
1036
1037 static int is_firmware_flash_cmd(u8 *cdb)
1038 {
1039         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1040 }
1041
1042 /*
1043  * During firmware flash, the heartbeat register may not update as frequently
1044  * as it should.  So we dial down lockup detection during firmware flash. and
1045  * dial it back up when firmware flash completes.
1046  */
1047 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1048 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1049 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1050                 struct CommandList *c)
1051 {
1052         if (!is_firmware_flash_cmd(c->Request.CDB))
1053                 return;
1054         atomic_inc(&h->firmware_flash_in_progress);
1055         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1056 }
1057
1058 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1059                 struct CommandList *c)
1060 {
1061         if (is_firmware_flash_cmd(c->Request.CDB) &&
1062                 atomic_dec_and_test(&h->firmware_flash_in_progress))
1063                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1064 }
1065
1066 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1067         struct CommandList *c, int reply_queue)
1068 {
1069         dial_down_lockup_detection_during_fw_flash(h, c);
1070         atomic_inc(&h->commands_outstanding);
1071         switch (c->cmd_type) {
1072         case CMD_IOACCEL1:
1073                 set_ioaccel1_performant_mode(h, c, reply_queue);
1074                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1075                 break;
1076         case CMD_IOACCEL2:
1077                 set_ioaccel2_performant_mode(h, c, reply_queue);
1078                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1079                 break;
1080         case IOACCEL2_TMF:
1081                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1082                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1083                 break;
1084         default:
1085                 set_performant_mode(h, c, reply_queue);
1086                 h->access.submit_command(h, c);
1087         }
1088 }
1089
1090 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1091 {
1092         if (unlikely(hpsa_is_pending_event(c)))
1093                 return finish_cmd(c);
1094
1095         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1096 }
1097
1098 static inline int is_hba_lunid(unsigned char scsi3addr[])
1099 {
1100         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1101 }
1102
1103 static inline int is_scsi_rev_5(struct ctlr_info *h)
1104 {
1105         if (!h->hba_inquiry_data)
1106                 return 0;
1107         if ((h->hba_inquiry_data[2] & 0x07) == 5)
1108                 return 1;
1109         return 0;
1110 }
1111
1112 static int hpsa_find_target_lun(struct ctlr_info *h,
1113         unsigned char scsi3addr[], int bus, int *target, int *lun)
1114 {
1115         /* finds an unused bus, target, lun for a new physical device
1116          * assumes h->devlock is held
1117          */
1118         int i, found = 0;
1119         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1120
1121         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1122
1123         for (i = 0; i < h->ndevices; i++) {
1124                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1125                         __set_bit(h->dev[i]->target, lun_taken);
1126         }
1127
1128         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1129         if (i < HPSA_MAX_DEVICES) {
1130                 /* *bus = 1; */
1131                 *target = i;
1132                 *lun = 0;
1133                 found = 1;
1134         }
1135         return !found;
1136 }
1137
1138 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1139         struct hpsa_scsi_dev_t *dev, char *description)
1140 {
1141         if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1142                 return;
1143
1144         dev_printk(level, &h->pdev->dev,
1145                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
1146                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1147                         description,
1148                         scsi_device_type(dev->devtype),
1149                         dev->vendor,
1150                         dev->model,
1151                         dev->raid_level > RAID_UNKNOWN ?
1152                                 "RAID-?" : raid_label[dev->raid_level],
1153                         dev->offload_config ? '+' : '-',
1154                         dev->offload_enabled ? '+' : '-',
1155                         dev->expose_state);
1156 }
1157
1158 /* Add an entry into h->dev[] array. */
1159 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1160                 struct hpsa_scsi_dev_t *device,
1161                 struct hpsa_scsi_dev_t *added[], int *nadded)
1162 {
1163         /* assumes h->devlock is held */
1164         int n = h->ndevices;
1165         int i;
1166         unsigned char addr1[8], addr2[8];
1167         struct hpsa_scsi_dev_t *sd;
1168
1169         if (n >= HPSA_MAX_DEVICES) {
1170                 dev_err(&h->pdev->dev, "too many devices, some will be "
1171                         "inaccessible.\n");
1172                 return -1;
1173         }
1174
1175         /* physical devices do not have lun or target assigned until now. */
1176         if (device->lun != -1)
1177                 /* Logical device, lun is already assigned. */
1178                 goto lun_assigned;
1179
1180         /* If this device a non-zero lun of a multi-lun device
1181          * byte 4 of the 8-byte LUN addr will contain the logical
1182          * unit no, zero otherwise.
1183          */
1184         if (device->scsi3addr[4] == 0) {
1185                 /* This is not a non-zero lun of a multi-lun device */
1186                 if (hpsa_find_target_lun(h, device->scsi3addr,
1187                         device->bus, &device->target, &device->lun) != 0)
1188                         return -1;
1189                 goto lun_assigned;
1190         }
1191
1192         /* This is a non-zero lun of a multi-lun device.
1193          * Search through our list and find the device which
1194          * has the same 8 byte LUN address, excepting byte 4 and 5.
1195          * Assign the same bus and target for this new LUN.
1196          * Use the logical unit number from the firmware.
1197          */
1198         memcpy(addr1, device->scsi3addr, 8);
1199         addr1[4] = 0;
1200         addr1[5] = 0;
1201         for (i = 0; i < n; i++) {
1202                 sd = h->dev[i];
1203                 memcpy(addr2, sd->scsi3addr, 8);
1204                 addr2[4] = 0;
1205                 addr2[5] = 0;
1206                 /* differ only in byte 4 and 5? */
1207                 if (memcmp(addr1, addr2, 8) == 0) {
1208                         device->bus = sd->bus;
1209                         device->target = sd->target;
1210                         device->lun = device->scsi3addr[4];
1211                         break;
1212                 }
1213         }
1214         if (device->lun == -1) {
1215                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1216                         " suspect firmware bug or unsupported hardware "
1217                         "configuration.\n");
1218                         return -1;
1219         }
1220
1221 lun_assigned:
1222
1223         h->dev[n] = device;
1224         h->ndevices++;
1225         added[*nadded] = device;
1226         (*nadded)++;
1227         hpsa_show_dev_msg(KERN_INFO, h, device,
1228                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1229         device->offload_to_be_enabled = device->offload_enabled;
1230         device->offload_enabled = 0;
1231         return 0;
1232 }
1233
1234 /* Update an entry in h->dev[] array. */
1235 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1236         int entry, struct hpsa_scsi_dev_t *new_entry)
1237 {
1238         int offload_enabled;
1239         /* assumes h->devlock is held */
1240         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1241
1242         /* Raid level changed. */
1243         h->dev[entry]->raid_level = new_entry->raid_level;
1244
1245         /* Raid offload parameters changed.  Careful about the ordering. */
1246         if (new_entry->offload_config && new_entry->offload_enabled) {
1247                 /*
1248                  * if drive is newly offload_enabled, we want to copy the
1249                  * raid map data first.  If previously offload_enabled and
1250                  * offload_config were set, raid map data had better be
1251                  * the same as it was before.  if raid map data is changed
1252                  * then it had better be the case that
1253                  * h->dev[entry]->offload_enabled is currently 0.
1254                  */
1255                 h->dev[entry]->raid_map = new_entry->raid_map;
1256                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1257         }
1258         if (new_entry->hba_ioaccel_enabled) {
1259                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1260                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1261         }
1262         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1263         h->dev[entry]->offload_config = new_entry->offload_config;
1264         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1265         h->dev[entry]->queue_depth = new_entry->queue_depth;
1266
1267         /*
1268          * We can turn off ioaccel offload now, but need to delay turning
1269          * it on until we can update h->dev[entry]->phys_disk[], but we
1270          * can't do that until all the devices are updated.
1271          */
1272         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1273         if (!new_entry->offload_enabled)
1274                 h->dev[entry]->offload_enabled = 0;
1275
1276         offload_enabled = h->dev[entry]->offload_enabled;
1277         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1278         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1279         h->dev[entry]->offload_enabled = offload_enabled;
1280 }
1281
1282 /* Replace an entry from h->dev[] array. */
1283 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1284         int entry, struct hpsa_scsi_dev_t *new_entry,
1285         struct hpsa_scsi_dev_t *added[], int *nadded,
1286         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1287 {
1288         /* assumes h->devlock is held */
1289         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1290         removed[*nremoved] = h->dev[entry];
1291         (*nremoved)++;
1292
1293         /*
1294          * New physical devices won't have target/lun assigned yet
1295          * so we need to preserve the values in the slot we are replacing.
1296          */
1297         if (new_entry->target == -1) {
1298                 new_entry->target = h->dev[entry]->target;
1299                 new_entry->lun = h->dev[entry]->lun;
1300         }
1301
1302         h->dev[entry] = new_entry;
1303         added[*nadded] = new_entry;
1304         (*nadded)++;
1305         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1306         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1307         new_entry->offload_enabled = 0;
1308 }
1309
1310 /* Remove an entry from h->dev[] array. */
1311 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1312         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1313 {
1314         /* assumes h->devlock is held */
1315         int i;
1316         struct hpsa_scsi_dev_t *sd;
1317
1318         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1319
1320         sd = h->dev[entry];
1321         removed[*nremoved] = h->dev[entry];
1322         (*nremoved)++;
1323
1324         for (i = entry; i < h->ndevices-1; i++)
1325                 h->dev[i] = h->dev[i+1];
1326         h->ndevices--;
1327         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1328 }
1329
1330 #define SCSI3ADDR_EQ(a, b) ( \
1331         (a)[7] == (b)[7] && \
1332         (a)[6] == (b)[6] && \
1333         (a)[5] == (b)[5] && \
1334         (a)[4] == (b)[4] && \
1335         (a)[3] == (b)[3] && \
1336         (a)[2] == (b)[2] && \
1337         (a)[1] == (b)[1] && \
1338         (a)[0] == (b)[0])
1339
1340 static void fixup_botched_add(struct ctlr_info *h,
1341         struct hpsa_scsi_dev_t *added)
1342 {
1343         /* called when scsi_add_device fails in order to re-adjust
1344          * h->dev[] to match the mid layer's view.
1345          */
1346         unsigned long flags;
1347         int i, j;
1348
1349         spin_lock_irqsave(&h->lock, flags);
1350         for (i = 0; i < h->ndevices; i++) {
1351                 if (h->dev[i] == added) {
1352                         for (j = i; j < h->ndevices-1; j++)
1353                                 h->dev[j] = h->dev[j+1];
1354                         h->ndevices--;
1355                         break;
1356                 }
1357         }
1358         spin_unlock_irqrestore(&h->lock, flags);
1359         kfree(added);
1360 }
1361
1362 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1363         struct hpsa_scsi_dev_t *dev2)
1364 {
1365         /* we compare everything except lun and target as these
1366          * are not yet assigned.  Compare parts likely
1367          * to differ first
1368          */
1369         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1370                 sizeof(dev1->scsi3addr)) != 0)
1371                 return 0;
1372         if (memcmp(dev1->device_id, dev2->device_id,
1373                 sizeof(dev1->device_id)) != 0)
1374                 return 0;
1375         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1376                 return 0;
1377         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1378                 return 0;
1379         if (dev1->devtype != dev2->devtype)
1380                 return 0;
1381         if (dev1->bus != dev2->bus)
1382                 return 0;
1383         return 1;
1384 }
1385
1386 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1387         struct hpsa_scsi_dev_t *dev2)
1388 {
1389         /* Device attributes that can change, but don't mean
1390          * that the device is a different device, nor that the OS
1391          * needs to be told anything about the change.
1392          */
1393         if (dev1->raid_level != dev2->raid_level)
1394                 return 1;
1395         if (dev1->offload_config != dev2->offload_config)
1396                 return 1;
1397         if (dev1->offload_enabled != dev2->offload_enabled)
1398                 return 1;
1399         if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1400                 if (dev1->queue_depth != dev2->queue_depth)
1401                         return 1;
1402         return 0;
1403 }
1404
1405 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1406  * and return needle location in *index.  If scsi3addr matches, but not
1407  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1408  * location in *index.
1409  * In the case of a minor device attribute change, such as RAID level, just
1410  * return DEVICE_UPDATED, along with the updated device's location in index.
1411  * If needle not found, return DEVICE_NOT_FOUND.
1412  */
1413 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1414         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1415         int *index)
1416 {
1417         int i;
1418 #define DEVICE_NOT_FOUND 0
1419 #define DEVICE_CHANGED 1
1420 #define DEVICE_SAME 2
1421 #define DEVICE_UPDATED 3
1422         if (needle == NULL)
1423                 return DEVICE_NOT_FOUND;
1424
1425         for (i = 0; i < haystack_size; i++) {
1426                 if (haystack[i] == NULL) /* previously removed. */
1427                         continue;
1428                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1429                         *index = i;
1430                         if (device_is_the_same(needle, haystack[i])) {
1431                                 if (device_updated(needle, haystack[i]))
1432                                         return DEVICE_UPDATED;
1433                                 return DEVICE_SAME;
1434                         } else {
1435                                 /* Keep offline devices offline */
1436                                 if (needle->volume_offline)
1437                                         return DEVICE_NOT_FOUND;
1438                                 return DEVICE_CHANGED;
1439                         }
1440                 }
1441         }
1442         *index = -1;
1443         return DEVICE_NOT_FOUND;
1444 }
1445
1446 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1447                                         unsigned char scsi3addr[])
1448 {
1449         struct offline_device_entry *device;
1450         unsigned long flags;
1451
1452         /* Check to see if device is already on the list */
1453         spin_lock_irqsave(&h->offline_device_lock, flags);
1454         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1455                 if (memcmp(device->scsi3addr, scsi3addr,
1456                         sizeof(device->scsi3addr)) == 0) {
1457                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1458                         return;
1459                 }
1460         }
1461         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1462
1463         /* Device is not on the list, add it. */
1464         device = kmalloc(sizeof(*device), GFP_KERNEL);
1465         if (!device) {
1466                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1467                 return;
1468         }
1469         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1470         spin_lock_irqsave(&h->offline_device_lock, flags);
1471         list_add_tail(&device->offline_list, &h->offline_device_list);
1472         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1473 }
1474
1475 /* Print a message explaining various offline volume states */
1476 static void hpsa_show_volume_status(struct ctlr_info *h,
1477         struct hpsa_scsi_dev_t *sd)
1478 {
1479         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1480                 dev_info(&h->pdev->dev,
1481                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1482                         h->scsi_host->host_no,
1483                         sd->bus, sd->target, sd->lun);
1484         switch (sd->volume_offline) {
1485         case HPSA_LV_OK:
1486                 break;
1487         case HPSA_LV_UNDERGOING_ERASE:
1488                 dev_info(&h->pdev->dev,
1489                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1490                         h->scsi_host->host_no,
1491                         sd->bus, sd->target, sd->lun);
1492                 break;
1493         case HPSA_LV_NOT_AVAILABLE:
1494                 dev_info(&h->pdev->dev,
1495                         "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1496                         h->scsi_host->host_no,
1497                         sd->bus, sd->target, sd->lun);
1498                 break;
1499         case HPSA_LV_UNDERGOING_RPI:
1500                 dev_info(&h->pdev->dev,
1501                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1502                         h->scsi_host->host_no,
1503                         sd->bus, sd->target, sd->lun);
1504                 break;
1505         case HPSA_LV_PENDING_RPI:
1506                 dev_info(&h->pdev->dev,
1507                         "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1508                         h->scsi_host->host_no,
1509                         sd->bus, sd->target, sd->lun);
1510                 break;
1511         case HPSA_LV_ENCRYPTED_NO_KEY:
1512                 dev_info(&h->pdev->dev,
1513                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1514                         h->scsi_host->host_no,
1515                         sd->bus, sd->target, sd->lun);
1516                 break;
1517         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1518                 dev_info(&h->pdev->dev,
1519                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1520                         h->scsi_host->host_no,
1521                         sd->bus, sd->target, sd->lun);
1522                 break;
1523         case HPSA_LV_UNDERGOING_ENCRYPTION:
1524                 dev_info(&h->pdev->dev,
1525                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1526                         h->scsi_host->host_no,
1527                         sd->bus, sd->target, sd->lun);
1528                 break;
1529         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1530                 dev_info(&h->pdev->dev,
1531                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1532                         h->scsi_host->host_no,
1533                         sd->bus, sd->target, sd->lun);
1534                 break;
1535         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1536                 dev_info(&h->pdev->dev,
1537                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1538                         h->scsi_host->host_no,
1539                         sd->bus, sd->target, sd->lun);
1540                 break;
1541         case HPSA_LV_PENDING_ENCRYPTION:
1542                 dev_info(&h->pdev->dev,
1543                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1544                         h->scsi_host->host_no,
1545                         sd->bus, sd->target, sd->lun);
1546                 break;
1547         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1548                 dev_info(&h->pdev->dev,
1549                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1550                         h->scsi_host->host_no,
1551                         sd->bus, sd->target, sd->lun);
1552                 break;
1553         }
1554 }
1555
1556 /*
1557  * Figure the list of physical drive pointers for a logical drive with
1558  * raid offload configured.
1559  */
1560 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1561                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1562                                 struct hpsa_scsi_dev_t *logical_drive)
1563 {
1564         struct raid_map_data *map = &logical_drive->raid_map;
1565         struct raid_map_disk_data *dd = &map->data[0];
1566         int i, j;
1567         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1568                                 le16_to_cpu(map->metadata_disks_per_row);
1569         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1570                                 le16_to_cpu(map->layout_map_count) *
1571                                 total_disks_per_row;
1572         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1573                                 total_disks_per_row;
1574         int qdepth;
1575
1576         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1577                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1578
1579         logical_drive->nphysical_disks = nraid_map_entries;
1580
1581         qdepth = 0;
1582         for (i = 0; i < nraid_map_entries; i++) {
1583                 logical_drive->phys_disk[i] = NULL;
1584                 if (!logical_drive->offload_config)
1585                         continue;
1586                 for (j = 0; j < ndevices; j++) {
1587                         if (dev[j] == NULL)
1588                                 continue;
1589                         if (dev[j]->devtype != TYPE_DISK)
1590                                 continue;
1591                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1592                                 continue;
1593                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1594                                 continue;
1595
1596                         logical_drive->phys_disk[i] = dev[j];
1597                         if (i < nphys_disk)
1598                                 qdepth = min(h->nr_cmds, qdepth +
1599                                     logical_drive->phys_disk[i]->queue_depth);
1600                         break;
1601                 }
1602
1603                 /*
1604                  * This can happen if a physical drive is removed and
1605                  * the logical drive is degraded.  In that case, the RAID
1606                  * map data will refer to a physical disk which isn't actually
1607                  * present.  And in that case offload_enabled should already
1608                  * be 0, but we'll turn it off here just in case
1609                  */
1610                 if (!logical_drive->phys_disk[i]) {
1611                         logical_drive->offload_enabled = 0;
1612                         logical_drive->offload_to_be_enabled = 0;
1613                         logical_drive->queue_depth = 8;
1614                 }
1615         }
1616         if (nraid_map_entries)
1617                 /*
1618                  * This is correct for reads, too high for full stripe writes,
1619                  * way too high for partial stripe writes
1620                  */
1621                 logical_drive->queue_depth = qdepth;
1622         else
1623                 logical_drive->queue_depth = h->nr_cmds;
1624 }
1625
1626 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1627                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1628 {
1629         int i;
1630
1631         for (i = 0; i < ndevices; i++) {
1632                 if (dev[i] == NULL)
1633                         continue;
1634                 if (dev[i]->devtype != TYPE_DISK)
1635                         continue;
1636                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1637                         continue;
1638
1639                 /*
1640                  * If offload is currently enabled, the RAID map and
1641                  * phys_disk[] assignment *better* not be changing
1642                  * and since it isn't changing, we do not need to
1643                  * update it.
1644                  */
1645                 if (dev[i]->offload_enabled)
1646                         continue;
1647
1648                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1649         }
1650 }
1651
1652 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1653         struct hpsa_scsi_dev_t *sd[], int nsds)
1654 {
1655         /* sd contains scsi3 addresses and devtypes, and inquiry
1656          * data.  This function takes what's in sd to be the current
1657          * reality and updates h->dev[] to reflect that reality.
1658          */
1659         int i, entry, device_change, changes = 0;
1660         struct hpsa_scsi_dev_t *csd;
1661         unsigned long flags;
1662         struct hpsa_scsi_dev_t **added, **removed;
1663         int nadded, nremoved;
1664         struct Scsi_Host *sh = NULL;
1665
1666         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1667         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1668
1669         if (!added || !removed) {
1670                 dev_warn(&h->pdev->dev, "out of memory in "
1671                         "adjust_hpsa_scsi_table\n");
1672                 goto free_and_out;
1673         }
1674
1675         spin_lock_irqsave(&h->devlock, flags);
1676
1677         /* find any devices in h->dev[] that are not in
1678          * sd[] and remove them from h->dev[], and for any
1679          * devices which have changed, remove the old device
1680          * info and add the new device info.
1681          * If minor device attributes change, just update
1682          * the existing device structure.
1683          */
1684         i = 0;
1685         nremoved = 0;
1686         nadded = 0;
1687         while (i < h->ndevices) {
1688                 csd = h->dev[i];
1689                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1690                 if (device_change == DEVICE_NOT_FOUND) {
1691                         changes++;
1692                         hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1693                         continue; /* remove ^^^, hence i not incremented */
1694                 } else if (device_change == DEVICE_CHANGED) {
1695                         changes++;
1696                         hpsa_scsi_replace_entry(h, i, sd[entry],
1697                                 added, &nadded, removed, &nremoved);
1698                         /* Set it to NULL to prevent it from being freed
1699                          * at the bottom of hpsa_update_scsi_devices()
1700                          */
1701                         sd[entry] = NULL;
1702                 } else if (device_change == DEVICE_UPDATED) {
1703                         hpsa_scsi_update_entry(h, i, sd[entry]);
1704                 }
1705                 i++;
1706         }
1707
1708         /* Now, make sure every device listed in sd[] is also
1709          * listed in h->dev[], adding them if they aren't found
1710          */
1711
1712         for (i = 0; i < nsds; i++) {
1713                 if (!sd[i]) /* if already added above. */
1714                         continue;
1715
1716                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1717                  * as the SCSI mid-layer does not handle such devices well.
1718                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1719                  * at 160Hz, and prevents the system from coming up.
1720                  */
1721                 if (sd[i]->volume_offline) {
1722                         hpsa_show_volume_status(h, sd[i]);
1723                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1724                         continue;
1725                 }
1726
1727                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1728                                         h->ndevices, &entry);
1729                 if (device_change == DEVICE_NOT_FOUND) {
1730                         changes++;
1731                         if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1732                                 break;
1733                         sd[i] = NULL; /* prevent from being freed later. */
1734                 } else if (device_change == DEVICE_CHANGED) {
1735                         /* should never happen... */
1736                         changes++;
1737                         dev_warn(&h->pdev->dev,
1738                                 "device unexpectedly changed.\n");
1739                         /* but if it does happen, we just ignore that device */
1740                 }
1741         }
1742         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1743
1744         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1745          * any logical drives that need it enabled.
1746          */
1747         for (i = 0; i < h->ndevices; i++) {
1748                 if (h->dev[i] == NULL)
1749                         continue;
1750                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1751         }
1752
1753         spin_unlock_irqrestore(&h->devlock, flags);
1754
1755         /* Monitor devices which are in one of several NOT READY states to be
1756          * brought online later. This must be done without holding h->devlock,
1757          * so don't touch h->dev[]
1758          */
1759         for (i = 0; i < nsds; i++) {
1760                 if (!sd[i]) /* if already added above. */
1761                         continue;
1762                 if (sd[i]->volume_offline)
1763                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1764         }
1765
1766         /* Don't notify scsi mid layer of any changes the first time through
1767          * (or if there are no changes) scsi_scan_host will do it later the
1768          * first time through.
1769          */
1770         if (!changes)
1771                 goto free_and_out;
1772
1773         sh = h->scsi_host;
1774         /* Notify scsi mid layer of any removed devices */
1775         for (i = 0; i < nremoved; i++) {
1776                 if (removed[i] == NULL)
1777                         continue;
1778                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1779                         struct scsi_device *sdev =
1780                                 scsi_device_lookup(sh, removed[i]->bus,
1781                                         removed[i]->target, removed[i]->lun);
1782                         if (sdev != NULL) {
1783                                 scsi_remove_device(sdev);
1784                                 scsi_device_put(sdev);
1785                         } else {
1786                                 /*
1787                                  * We don't expect to get here.
1788                                  * future cmds to this device will get selection
1789                                  * timeout as if the device was gone.
1790                                  */
1791                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1792                                         "didn't find device for removal.");
1793                         }
1794                 }
1795                 kfree(removed[i]);
1796                 removed[i] = NULL;
1797         }
1798
1799         /* Notify scsi mid layer of any added devices */
1800         for (i = 0; i < nadded; i++) {
1801                 if (added[i] == NULL)
1802                         continue;
1803                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1804                         continue;
1805                 if (scsi_add_device(sh, added[i]->bus,
1806                         added[i]->target, added[i]->lun) == 0)
1807                         continue;
1808                 dev_warn(&h->pdev->dev, "addition failed, device not added.");
1809                 /* now we have to remove it from h->dev,
1810                  * since it didn't get added to scsi mid layer
1811                  */
1812                 fixup_botched_add(h, added[i]);
1813         }
1814
1815 free_and_out:
1816         kfree(added);
1817         kfree(removed);
1818 }
1819
1820 /*
1821  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1822  * Assume's h->devlock is held.
1823  */
1824 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1825         int bus, int target, int lun)
1826 {
1827         int i;
1828         struct hpsa_scsi_dev_t *sd;
1829
1830         for (i = 0; i < h->ndevices; i++) {
1831                 sd = h->dev[i];
1832                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1833                         return sd;
1834         }
1835         return NULL;
1836 }
1837
1838 static int hpsa_slave_alloc(struct scsi_device *sdev)
1839 {
1840         struct hpsa_scsi_dev_t *sd;
1841         unsigned long flags;
1842         struct ctlr_info *h;
1843
1844         h = sdev_to_hba(sdev);
1845         spin_lock_irqsave(&h->devlock, flags);
1846         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1847                 sdev_id(sdev), sdev->lun);
1848         if (likely(sd)) {
1849                 atomic_set(&sd->ioaccel_cmds_out, 0);
1850                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1851         } else
1852                 sdev->hostdata = NULL;
1853         spin_unlock_irqrestore(&h->devlock, flags);
1854         return 0;
1855 }
1856
1857 /* configure scsi device based on internal per-device structure */
1858 static int hpsa_slave_configure(struct scsi_device *sdev)
1859 {
1860         struct hpsa_scsi_dev_t *sd;
1861         int queue_depth;
1862
1863         sd = sdev->hostdata;
1864         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1865
1866         if (sd)
1867                 queue_depth = sd->queue_depth != 0 ?
1868                         sd->queue_depth : sdev->host->can_queue;
1869         else
1870                 queue_depth = sdev->host->can_queue;
1871
1872         scsi_change_queue_depth(sdev, queue_depth);
1873
1874         return 0;
1875 }
1876
1877 static void hpsa_slave_destroy(struct scsi_device *sdev)
1878 {
1879         /* nothing to do. */
1880 }
1881
1882 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1883 {
1884         int i;
1885
1886         if (!h->ioaccel2_cmd_sg_list)
1887                 return;
1888         for (i = 0; i < h->nr_cmds; i++) {
1889                 kfree(h->ioaccel2_cmd_sg_list[i]);
1890                 h->ioaccel2_cmd_sg_list[i] = NULL;
1891         }
1892         kfree(h->ioaccel2_cmd_sg_list);
1893         h->ioaccel2_cmd_sg_list = NULL;
1894 }
1895
1896 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1897 {
1898         int i;
1899
1900         if (h->chainsize <= 0)
1901                 return 0;
1902
1903         h->ioaccel2_cmd_sg_list =
1904                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1905                                         GFP_KERNEL);
1906         if (!h->ioaccel2_cmd_sg_list)
1907                 return -ENOMEM;
1908         for (i = 0; i < h->nr_cmds; i++) {
1909                 h->ioaccel2_cmd_sg_list[i] =
1910                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1911                                         h->maxsgentries, GFP_KERNEL);
1912                 if (!h->ioaccel2_cmd_sg_list[i])
1913                         goto clean;
1914         }
1915         return 0;
1916
1917 clean:
1918         hpsa_free_ioaccel2_sg_chain_blocks(h);
1919         return -ENOMEM;
1920 }
1921
1922 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1923 {
1924         int i;
1925
1926         if (!h->cmd_sg_list)
1927                 return;
1928         for (i = 0; i < h->nr_cmds; i++) {
1929                 kfree(h->cmd_sg_list[i]);
1930                 h->cmd_sg_list[i] = NULL;
1931         }
1932         kfree(h->cmd_sg_list);
1933         h->cmd_sg_list = NULL;
1934 }
1935
1936 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
1937 {
1938         int i;
1939
1940         if (h->chainsize <= 0)
1941                 return 0;
1942
1943         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1944                                 GFP_KERNEL);
1945         if (!h->cmd_sg_list) {
1946                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1947                 return -ENOMEM;
1948         }
1949         for (i = 0; i < h->nr_cmds; i++) {
1950                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1951                                                 h->chainsize, GFP_KERNEL);
1952                 if (!h->cmd_sg_list[i]) {
1953                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1954                         goto clean;
1955                 }
1956         }
1957         return 0;
1958
1959 clean:
1960         hpsa_free_sg_chain_blocks(h);
1961         return -ENOMEM;
1962 }
1963
1964 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
1965         struct io_accel2_cmd *cp, struct CommandList *c)
1966 {
1967         struct ioaccel2_sg_element *chain_block;
1968         u64 temp64;
1969         u32 chain_size;
1970
1971         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
1972         chain_size = le32_to_cpu(cp->data_len);
1973         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
1974                                 PCI_DMA_TODEVICE);
1975         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1976                 /* prevent subsequent unmapping */
1977                 cp->sg->address = 0;
1978                 return -1;
1979         }
1980         cp->sg->address = cpu_to_le64(temp64);
1981         return 0;
1982 }
1983
1984 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
1985         struct io_accel2_cmd *cp)
1986 {
1987         struct ioaccel2_sg_element *chain_sg;
1988         u64 temp64;
1989         u32 chain_size;
1990
1991         chain_sg = cp->sg;
1992         temp64 = le64_to_cpu(chain_sg->address);
1993         chain_size = le32_to_cpu(cp->data_len);
1994         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
1995 }
1996
1997 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1998         struct CommandList *c)
1999 {
2000         struct SGDescriptor *chain_sg, *chain_block;
2001         u64 temp64;
2002         u32 chain_len;
2003
2004         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2005         chain_block = h->cmd_sg_list[c->cmdindex];
2006         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2007         chain_len = sizeof(*chain_sg) *
2008                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2009         chain_sg->Len = cpu_to_le32(chain_len);
2010         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2011                                 PCI_DMA_TODEVICE);
2012         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2013                 /* prevent subsequent unmapping */
2014                 chain_sg->Addr = cpu_to_le64(0);
2015                 return -1;
2016         }
2017         chain_sg->Addr = cpu_to_le64(temp64);
2018         return 0;
2019 }
2020
2021 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2022         struct CommandList *c)
2023 {
2024         struct SGDescriptor *chain_sg;
2025
2026         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2027                 return;
2028
2029         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2030         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2031                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2032 }
2033
2034
2035 /* Decode the various types of errors on ioaccel2 path.
2036  * Return 1 for any error that should generate a RAID path retry.
2037  * Return 0 for errors that don't require a RAID path retry.
2038  */
2039 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2040                                         struct CommandList *c,
2041                                         struct scsi_cmnd *cmd,
2042                                         struct io_accel2_cmd *c2)
2043 {
2044         int data_len;
2045         int retry = 0;
2046         u32 ioaccel2_resid = 0;
2047
2048         switch (c2->error_data.serv_response) {
2049         case IOACCEL2_SERV_RESPONSE_COMPLETE:
2050                 switch (c2->error_data.status) {
2051                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2052                         break;
2053                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2054                         cmd->result |= SAM_STAT_CHECK_CONDITION;
2055                         if (c2->error_data.data_present !=
2056                                         IOACCEL2_SENSE_DATA_PRESENT) {
2057                                 memset(cmd->sense_buffer, 0,
2058                                         SCSI_SENSE_BUFFERSIZE);
2059                                 break;
2060                         }
2061                         /* copy the sense data */
2062                         data_len = c2->error_data.sense_data_len;
2063                         if (data_len > SCSI_SENSE_BUFFERSIZE)
2064                                 data_len = SCSI_SENSE_BUFFERSIZE;
2065                         if (data_len > sizeof(c2->error_data.sense_data_buff))
2066                                 data_len =
2067                                         sizeof(c2->error_data.sense_data_buff);
2068                         memcpy(cmd->sense_buffer,
2069                                 c2->error_data.sense_data_buff, data_len);
2070                         retry = 1;
2071                         break;
2072                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2073                         retry = 1;
2074                         break;
2075                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2076                         retry = 1;
2077                         break;
2078                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2079                         retry = 1;
2080                         break;
2081                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2082                         retry = 1;
2083                         break;
2084                 default:
2085                         retry = 1;
2086                         break;
2087                 }
2088                 break;
2089         case IOACCEL2_SERV_RESPONSE_FAILURE:
2090                 switch (c2->error_data.status) {
2091                 case IOACCEL2_STATUS_SR_IO_ERROR:
2092                 case IOACCEL2_STATUS_SR_IO_ABORTED:
2093                 case IOACCEL2_STATUS_SR_OVERRUN:
2094                         retry = 1;
2095                         break;
2096                 case IOACCEL2_STATUS_SR_UNDERRUN:
2097                         cmd->result = (DID_OK << 16);           /* host byte */
2098                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2099                         ioaccel2_resid = get_unaligned_le32(
2100                                                 &c2->error_data.resid_cnt[0]);
2101                         scsi_set_resid(cmd, ioaccel2_resid);
2102                         break;
2103                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2104                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2105                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2106                         /* We will get an event from ctlr to trigger rescan */
2107                         retry = 1;
2108                         break;
2109                 default:
2110                         retry = 1;
2111                 }
2112                 break;
2113         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2114                 break;
2115         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2116                 break;
2117         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2118                 retry = 1;
2119                 break;
2120         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2121                 break;
2122         default:
2123                 retry = 1;
2124                 break;
2125         }
2126
2127         return retry;   /* retry on raid path? */
2128 }
2129
2130 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2131                 struct CommandList *c)
2132 {
2133         bool do_wake = false;
2134
2135         /*
2136          * Prevent the following race in the abort handler:
2137          *
2138          * 1. LLD is requested to abort a SCSI command
2139          * 2. The SCSI command completes
2140          * 3. The struct CommandList associated with step 2 is made available
2141          * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2142          * 5. Abort handler follows scsi_cmnd->host_scribble and
2143          *    finds struct CommandList and tries to aborts it
2144          * Now we have aborted the wrong command.
2145          *
2146          * Reset c->scsi_cmd here so that the abort or reset handler will know
2147          * this command has completed.  Then, check to see if the handler is
2148          * waiting for this command, and, if so, wake it.
2149          */
2150         c->scsi_cmd = SCSI_CMD_IDLE;
2151         mb();   /* Declare command idle before checking for pending events. */
2152         if (c->abort_pending) {
2153                 do_wake = true;
2154                 c->abort_pending = false;
2155         }
2156         if (c->reset_pending) {
2157                 unsigned long flags;
2158                 struct hpsa_scsi_dev_t *dev;
2159
2160                 /*
2161                  * There appears to be a reset pending; lock the lock and
2162                  * reconfirm.  If so, then decrement the count of outstanding
2163                  * commands and wake the reset command if this is the last one.
2164                  */
2165                 spin_lock_irqsave(&h->lock, flags);
2166                 dev = c->reset_pending;         /* Re-fetch under the lock. */
2167                 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2168                         do_wake = true;
2169                 c->reset_pending = NULL;
2170                 spin_unlock_irqrestore(&h->lock, flags);
2171         }
2172
2173         if (do_wake)
2174                 wake_up_all(&h->event_sync_wait_queue);
2175 }
2176
2177 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2178                                       struct CommandList *c)
2179 {
2180         hpsa_cmd_resolve_events(h, c);
2181         cmd_tagged_free(h, c);
2182 }
2183
2184 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2185                 struct CommandList *c, struct scsi_cmnd *cmd)
2186 {
2187         hpsa_cmd_resolve_and_free(h, c);
2188         cmd->scsi_done(cmd);
2189 }
2190
2191 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2192 {
2193         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2194         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2195 }
2196
2197 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2198 {
2199         cmd->result = DID_ABORT << 16;
2200 }
2201
2202 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2203                                     struct scsi_cmnd *cmd)
2204 {
2205         hpsa_set_scsi_cmd_aborted(cmd);
2206         dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2207                          c->Request.CDB, c->err_info->ScsiStatus);
2208         hpsa_cmd_resolve_and_free(h, c);
2209 }
2210
2211 static void process_ioaccel2_completion(struct ctlr_info *h,
2212                 struct CommandList *c, struct scsi_cmnd *cmd,
2213                 struct hpsa_scsi_dev_t *dev)
2214 {
2215         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2216
2217         /* check for good status */
2218         if (likely(c2->error_data.serv_response == 0 &&
2219                         c2->error_data.status == 0))
2220                 return hpsa_cmd_free_and_done(h, c, cmd);
2221
2222         /*
2223          * Any RAID offload error results in retry which will use
2224          * the normal I/O path so the controller can handle whatever's
2225          * wrong.
2226          */
2227         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
2228                 c2->error_data.serv_response ==
2229                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2230                 if (c2->error_data.status ==
2231                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2232                         dev->offload_enabled = 0;
2233
2234                 return hpsa_retry_cmd(h, c);
2235         }
2236
2237         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2238                 return hpsa_retry_cmd(h, c);
2239
2240         return hpsa_cmd_free_and_done(h, c, cmd);
2241 }
2242
2243 /* Returns 0 on success, < 0 otherwise. */
2244 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2245                                         struct CommandList *cp)
2246 {
2247         u8 tmf_status = cp->err_info->ScsiStatus;
2248
2249         switch (tmf_status) {
2250         case CISS_TMF_COMPLETE:
2251                 /*
2252                  * CISS_TMF_COMPLETE never happens, instead,
2253                  * ei->CommandStatus == 0 for this case.
2254                  */
2255         case CISS_TMF_SUCCESS:
2256                 return 0;
2257         case CISS_TMF_INVALID_FRAME:
2258         case CISS_TMF_NOT_SUPPORTED:
2259         case CISS_TMF_FAILED:
2260         case CISS_TMF_WRONG_LUN:
2261         case CISS_TMF_OVERLAPPED_TAG:
2262                 break;
2263         default:
2264                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2265                                 tmf_status);
2266                 break;
2267         }
2268         return -tmf_status;
2269 }
2270
2271 static void complete_scsi_command(struct CommandList *cp)
2272 {
2273         struct scsi_cmnd *cmd;
2274         struct ctlr_info *h;
2275         struct ErrorInfo *ei;
2276         struct hpsa_scsi_dev_t *dev;
2277         struct io_accel2_cmd *c2;
2278
2279         u8 sense_key;
2280         u8 asc;      /* additional sense code */
2281         u8 ascq;     /* additional sense code qualifier */
2282         unsigned long sense_data_size;
2283
2284         ei = cp->err_info;
2285         cmd = cp->scsi_cmd;
2286         h = cp->h;
2287         dev = cmd->device->hostdata;
2288         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2289
2290         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2291         if ((cp->cmd_type == CMD_SCSI) &&
2292                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2293                 hpsa_unmap_sg_chain_block(h, cp);
2294
2295         if ((cp->cmd_type == CMD_IOACCEL2) &&
2296                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2297                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2298
2299         cmd->result = (DID_OK << 16);           /* host byte */
2300         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2301
2302         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2303                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2304
2305         /*
2306          * We check for lockup status here as it may be set for
2307          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2308          * fail_all_oustanding_cmds()
2309          */
2310         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2311                 /* DID_NO_CONNECT will prevent a retry */
2312                 cmd->result = DID_NO_CONNECT << 16;
2313                 return hpsa_cmd_free_and_done(h, cp, cmd);
2314         }
2315
2316         if ((unlikely(hpsa_is_pending_event(cp)))) {
2317                 if (cp->reset_pending)
2318                         return hpsa_cmd_resolve_and_free(h, cp);
2319                 if (cp->abort_pending)
2320                         return hpsa_cmd_abort_and_free(h, cp, cmd);
2321         }
2322
2323         if (cp->cmd_type == CMD_IOACCEL2)
2324                 return process_ioaccel2_completion(h, cp, cmd, dev);
2325
2326         scsi_set_resid(cmd, ei->ResidualCnt);
2327         if (ei->CommandStatus == 0)
2328                 return hpsa_cmd_free_and_done(h, cp, cmd);
2329
2330         /* For I/O accelerator commands, copy over some fields to the normal
2331          * CISS header used below for error handling.
2332          */
2333         if (cp->cmd_type == CMD_IOACCEL1) {
2334                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2335                 cp->Header.SGList = scsi_sg_count(cmd);
2336                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2337                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2338                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2339                 cp->Header.tag = c->tag;
2340                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2341                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2342
2343                 /* Any RAID offload error results in retry which will use
2344                  * the normal I/O path so the controller can handle whatever's
2345                  * wrong.
2346                  */
2347                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2348                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2349                                 dev->offload_enabled = 0;
2350                         return hpsa_retry_cmd(h, cp);
2351                 }
2352         }
2353
2354         /* an error has occurred */
2355         switch (ei->CommandStatus) {
2356
2357         case CMD_TARGET_STATUS:
2358                 cmd->result |= ei->ScsiStatus;
2359                 /* copy the sense data */
2360                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2361                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2362                 else
2363                         sense_data_size = sizeof(ei->SenseInfo);
2364                 if (ei->SenseLen < sense_data_size)
2365                         sense_data_size = ei->SenseLen;
2366                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2367                 if (ei->ScsiStatus)
2368                         decode_sense_data(ei->SenseInfo, sense_data_size,
2369                                 &sense_key, &asc, &ascq);
2370                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2371                         if (sense_key == ABORTED_COMMAND) {
2372                                 cmd->result |= DID_SOFT_ERROR << 16;
2373                                 break;
2374                         }
2375                         break;
2376                 }
2377                 /* Problem was not a check condition
2378                  * Pass it up to the upper layers...
2379                  */
2380                 if (ei->ScsiStatus) {
2381                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2382                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2383                                 "Returning result: 0x%x\n",
2384                                 cp, ei->ScsiStatus,
2385                                 sense_key, asc, ascq,
2386                                 cmd->result);
2387                 } else {  /* scsi status is zero??? How??? */
2388                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2389                                 "Returning no connection.\n", cp),
2390
2391                         /* Ordinarily, this case should never happen,
2392                          * but there is a bug in some released firmware
2393                          * revisions that allows it to happen if, for
2394                          * example, a 4100 backplane loses power and
2395                          * the tape drive is in it.  We assume that
2396                          * it's a fatal error of some kind because we
2397                          * can't show that it wasn't. We will make it
2398                          * look like selection timeout since that is
2399                          * the most common reason for this to occur,
2400                          * and it's severe enough.
2401                          */
2402
2403                         cmd->result = DID_NO_CONNECT << 16;
2404                 }
2405                 break;
2406
2407         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2408                 break;
2409         case CMD_DATA_OVERRUN:
2410                 dev_warn(&h->pdev->dev,
2411                         "CDB %16phN data overrun\n", cp->Request.CDB);
2412                 break;
2413         case CMD_INVALID: {
2414                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2415                 print_cmd(cp); */
2416                 /* We get CMD_INVALID if you address a non-existent device
2417                  * instead of a selection timeout (no response).  You will
2418                  * see this if you yank out a drive, then try to access it.
2419                  * This is kind of a shame because it means that any other
2420                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2421                  * missing target. */
2422                 cmd->result = DID_NO_CONNECT << 16;
2423         }
2424                 break;
2425         case CMD_PROTOCOL_ERR:
2426                 cmd->result = DID_ERROR << 16;
2427                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2428                                 cp->Request.CDB);
2429                 break;
2430         case CMD_HARDWARE_ERR:
2431                 cmd->result = DID_ERROR << 16;
2432                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2433                         cp->Request.CDB);
2434                 break;
2435         case CMD_CONNECTION_LOST:
2436                 cmd->result = DID_ERROR << 16;
2437                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2438                         cp->Request.CDB);
2439                 break;
2440         case CMD_ABORTED:
2441                 /* Return now to avoid calling scsi_done(). */
2442                 return hpsa_cmd_abort_and_free(h, cp, cmd);
2443         case CMD_ABORT_FAILED:
2444                 cmd->result = DID_ERROR << 16;
2445                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2446                         cp->Request.CDB);
2447                 break;
2448         case CMD_UNSOLICITED_ABORT:
2449                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2450                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2451                         cp->Request.CDB);
2452                 break;
2453         case CMD_TIMEOUT:
2454                 cmd->result = DID_TIME_OUT << 16;
2455                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2456                         cp->Request.CDB);
2457                 break;
2458         case CMD_UNABORTABLE:
2459                 cmd->result = DID_ERROR << 16;
2460                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2461                 break;
2462         case CMD_TMF_STATUS:
2463                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2464                         cmd->result = DID_ERROR << 16;
2465                 break;
2466         case CMD_IOACCEL_DISABLED:
2467                 /* This only handles the direct pass-through case since RAID
2468                  * offload is handled above.  Just attempt a retry.
2469                  */
2470                 cmd->result = DID_SOFT_ERROR << 16;
2471                 dev_warn(&h->pdev->dev,
2472                                 "cp %p had HP SSD Smart Path error\n", cp);
2473                 break;
2474         default:
2475                 cmd->result = DID_ERROR << 16;
2476                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2477                                 cp, ei->CommandStatus);
2478         }
2479
2480         return hpsa_cmd_free_and_done(h, cp, cmd);
2481 }
2482
2483 static void hpsa_pci_unmap(struct pci_dev *pdev,
2484         struct CommandList *c, int sg_used, int data_direction)
2485 {
2486         int i;
2487
2488         for (i = 0; i < sg_used; i++)
2489                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2490                                 le32_to_cpu(c->SG[i].Len),
2491                                 data_direction);
2492 }
2493
2494 static int hpsa_map_one(struct pci_dev *pdev,
2495                 struct CommandList *cp,
2496                 unsigned char *buf,
2497                 size_t buflen,
2498                 int data_direction)
2499 {
2500         u64 addr64;
2501
2502         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2503                 cp->Header.SGList = 0;
2504                 cp->Header.SGTotal = cpu_to_le16(0);
2505                 return 0;
2506         }
2507
2508         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2509         if (dma_mapping_error(&pdev->dev, addr64)) {
2510                 /* Prevent subsequent unmap of something never mapped */
2511                 cp->Header.SGList = 0;
2512                 cp->Header.SGTotal = cpu_to_le16(0);
2513                 return -1;
2514         }
2515         cp->SG[0].Addr = cpu_to_le64(addr64);
2516         cp->SG[0].Len = cpu_to_le32(buflen);
2517         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2518         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2519         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2520         return 0;
2521 }
2522
2523 #define NO_TIMEOUT ((unsigned long) -1)
2524 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2525 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2526         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2527 {
2528         DECLARE_COMPLETION_ONSTACK(wait);
2529
2530         c->waiting = &wait;
2531         __enqueue_cmd_and_start_io(h, c, reply_queue);
2532         if (timeout_msecs == NO_TIMEOUT) {
2533                 /* TODO: get rid of this no-timeout thing */
2534                 wait_for_completion_io(&wait);
2535                 return IO_OK;
2536         }
2537         if (!wait_for_completion_io_timeout(&wait,
2538                                         msecs_to_jiffies(timeout_msecs))) {
2539                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2540                 return -ETIMEDOUT;
2541         }
2542         return IO_OK;
2543 }
2544
2545 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2546                                    int reply_queue, unsigned long timeout_msecs)
2547 {
2548         if (unlikely(lockup_detected(h))) {
2549                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2550                 return IO_OK;
2551         }
2552         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2553 }
2554
2555 static u32 lockup_detected(struct ctlr_info *h)
2556 {
2557         int cpu;
2558         u32 rc, *lockup_detected;
2559
2560         cpu = get_cpu();
2561         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2562         rc = *lockup_detected;
2563         put_cpu();
2564         return rc;
2565 }
2566
2567 #define MAX_DRIVER_CMD_RETRIES 25
2568 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2569         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2570 {
2571         int backoff_time = 10, retry_count = 0;
2572         int rc;
2573
2574         do {
2575                 memset(c->err_info, 0, sizeof(*c->err_info));
2576                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2577                                                   timeout_msecs);
2578                 if (rc)
2579                         break;
2580                 retry_count++;
2581                 if (retry_count > 3) {
2582                         msleep(backoff_time);
2583                         if (backoff_time < 1000)
2584                                 backoff_time *= 2;
2585                 }
2586         } while ((check_for_unit_attention(h, c) ||
2587                         check_for_busy(h, c)) &&
2588                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2589         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2590         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2591                 rc = -EIO;
2592         return rc;
2593 }
2594
2595 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2596                                 struct CommandList *c)
2597 {
2598         const u8 *cdb = c->Request.CDB;
2599         const u8 *lun = c->Header.LUN.LunAddrBytes;
2600
2601         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2602         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2603                 txt, lun[0], lun[1], lun[2], lun[3],
2604                 lun[4], lun[5], lun[6], lun[7],
2605                 cdb[0], cdb[1], cdb[2], cdb[3],
2606                 cdb[4], cdb[5], cdb[6], cdb[7],
2607                 cdb[8], cdb[9], cdb[10], cdb[11],
2608                 cdb[12], cdb[13], cdb[14], cdb[15]);
2609 }
2610
2611 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2612                         struct CommandList *cp)
2613 {
2614         const struct ErrorInfo *ei = cp->err_info;
2615         struct device *d = &cp->h->pdev->dev;
2616         u8 sense_key, asc, ascq;
2617         int sense_len;
2618
2619         switch (ei->CommandStatus) {
2620         case CMD_TARGET_STATUS:
2621                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2622                         sense_len = sizeof(ei->SenseInfo);
2623                 else
2624                         sense_len = ei->SenseLen;
2625                 decode_sense_data(ei->SenseInfo, sense_len,
2626                                         &sense_key, &asc, &ascq);
2627                 hpsa_print_cmd(h, "SCSI status", cp);
2628                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2629                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2630                                 sense_key, asc, ascq);
2631                 else
2632                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2633                 if (ei->ScsiStatus == 0)
2634                         dev_warn(d, "SCSI status is abnormally zero.  "
2635                         "(probably indicates selection timeout "
2636                         "reported incorrectly due to a known "
2637                         "firmware bug, circa July, 2001.)\n");
2638                 break;
2639         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2640                 break;
2641         case CMD_DATA_OVERRUN:
2642                 hpsa_print_cmd(h, "overrun condition", cp);
2643                 break;
2644         case CMD_INVALID: {
2645                 /* controller unfortunately reports SCSI passthru's
2646                  * to non-existent targets as invalid commands.
2647                  */
2648                 hpsa_print_cmd(h, "invalid command", cp);
2649                 dev_warn(d, "probably means device no longer present\n");
2650                 }
2651                 break;
2652         case CMD_PROTOCOL_ERR:
2653                 hpsa_print_cmd(h, "protocol error", cp);
2654                 break;
2655         case CMD_HARDWARE_ERR:
2656                 hpsa_print_cmd(h, "hardware error", cp);
2657                 break;
2658         case CMD_CONNECTION_LOST:
2659                 hpsa_print_cmd(h, "connection lost", cp);
2660                 break;
2661         case CMD_ABORTED:
2662                 hpsa_print_cmd(h, "aborted", cp);
2663                 break;
2664         case CMD_ABORT_FAILED:
2665                 hpsa_print_cmd(h, "abort failed", cp);
2666                 break;
2667         case CMD_UNSOLICITED_ABORT:
2668                 hpsa_print_cmd(h, "unsolicited abort", cp);
2669                 break;
2670         case CMD_TIMEOUT:
2671                 hpsa_print_cmd(h, "timed out", cp);
2672                 break;
2673         case CMD_UNABORTABLE:
2674                 hpsa_print_cmd(h, "unabortable", cp);
2675                 break;
2676         case CMD_CTLR_LOCKUP:
2677                 hpsa_print_cmd(h, "controller lockup detected", cp);
2678                 break;
2679         default:
2680                 hpsa_print_cmd(h, "unknown status", cp);
2681                 dev_warn(d, "Unknown command status %x\n",
2682                                 ei->CommandStatus);
2683         }
2684 }
2685
2686 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2687                         u16 page, unsigned char *buf,
2688                         unsigned char bufsize)
2689 {
2690         int rc = IO_OK;
2691         struct CommandList *c;
2692         struct ErrorInfo *ei;
2693
2694         c = cmd_alloc(h);
2695
2696         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2697                         page, scsi3addr, TYPE_CMD)) {
2698                 rc = -1;
2699                 goto out;
2700         }
2701         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2702                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2703         if (rc)
2704                 goto out;
2705         ei = c->err_info;
2706         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2707                 hpsa_scsi_interpret_error(h, c);
2708                 rc = -1;
2709         }
2710 out:
2711         cmd_free(h, c);
2712         return rc;
2713 }
2714
2715 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2716         u8 reset_type, int reply_queue)
2717 {
2718         int rc = IO_OK;
2719         struct CommandList *c;
2720         struct ErrorInfo *ei;
2721
2722         c = cmd_alloc(h);
2723
2724
2725         /* fill_cmd can't fail here, no data buffer to map. */
2726         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2727                         scsi3addr, TYPE_MSG);
2728         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2729         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2730         if (rc) {
2731                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2732                 goto out;
2733         }
2734         /* no unmap needed here because no data xfer. */
2735
2736         ei = c->err_info;
2737         if (ei->CommandStatus != 0) {
2738                 hpsa_scsi_interpret_error(h, c);
2739                 rc = -1;
2740         }
2741 out:
2742         cmd_free(h, c);
2743         return rc;
2744 }
2745
2746 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2747                                struct hpsa_scsi_dev_t *dev,
2748                                unsigned char *scsi3addr)
2749 {
2750         int i;
2751         bool match = false;
2752         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2753         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2754
2755         if (hpsa_is_cmd_idle(c))
2756                 return false;
2757
2758         switch (c->cmd_type) {
2759         case CMD_SCSI:
2760         case CMD_IOCTL_PEND:
2761                 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2762                                 sizeof(c->Header.LUN.LunAddrBytes));
2763                 break;
2764
2765         case CMD_IOACCEL1:
2766         case CMD_IOACCEL2:
2767                 if (c->phys_disk == dev) {
2768                         /* HBA mode match */
2769                         match = true;
2770                 } else {
2771                         /* Possible RAID mode -- check each phys dev. */
2772                         /* FIXME:  Do we need to take out a lock here?  If
2773                          * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2774                          * instead. */
2775                         for (i = 0; i < dev->nphysical_disks && !match; i++) {
2776                                 /* FIXME: an alternate test might be
2777                                  *
2778                                  * match = dev->phys_disk[i]->ioaccel_handle
2779                                  *              == c2->scsi_nexus;      */
2780                                 match = dev->phys_disk[i] == c->phys_disk;
2781                         }
2782                 }
2783                 break;
2784
2785         case IOACCEL2_TMF:
2786                 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2787                         match = dev->phys_disk[i]->ioaccel_handle ==
2788                                         le32_to_cpu(ac->it_nexus);
2789                 }
2790                 break;
2791
2792         case 0:         /* The command is in the middle of being initialized. */
2793                 match = false;
2794                 break;
2795
2796         default:
2797                 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2798                         c->cmd_type);
2799                 BUG();
2800         }
2801
2802         return match;
2803 }
2804
2805 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2806         unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2807 {
2808         int i;
2809         int rc = 0;
2810
2811         /* We can really only handle one reset at a time */
2812         if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2813                 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2814                 return -EINTR;
2815         }
2816
2817         BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2818
2819         for (i = 0; i < h->nr_cmds; i++) {
2820                 struct CommandList *c = h->cmd_pool + i;
2821                 int refcount = atomic_inc_return(&c->refcount);
2822
2823                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2824                         unsigned long flags;
2825
2826                         /*
2827                          * Mark the target command as having a reset pending,
2828                          * then lock a lock so that the command cannot complete
2829                          * while we're considering it.  If the command is not
2830                          * idle then count it; otherwise revoke the event.
2831                          */
2832                         c->reset_pending = dev;
2833                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
2834                         if (!hpsa_is_cmd_idle(c))
2835                                 atomic_inc(&dev->reset_cmds_out);
2836                         else
2837                                 c->reset_pending = NULL;
2838                         spin_unlock_irqrestore(&h->lock, flags);
2839                 }
2840
2841                 cmd_free(h, c);
2842         }
2843
2844         rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2845         if (!rc)
2846                 wait_event(h->event_sync_wait_queue,
2847                         atomic_read(&dev->reset_cmds_out) == 0 ||
2848                         lockup_detected(h));
2849
2850         if (unlikely(lockup_detected(h))) {
2851                 dev_warn(&h->pdev->dev,
2852                          "Controller lockup detected during reset wait\n");
2853                 rc = -ENODEV;
2854         }
2855
2856         if (unlikely(rc))
2857                 atomic_set(&dev->reset_cmds_out, 0);
2858
2859         mutex_unlock(&h->reset_mutex);
2860         return rc;
2861 }
2862
2863 static void hpsa_get_raid_level(struct ctlr_info *h,
2864         unsigned char *scsi3addr, unsigned char *raid_level)
2865 {
2866         int rc;
2867         unsigned char *buf;
2868
2869         *raid_level = RAID_UNKNOWN;
2870         buf = kzalloc(64, GFP_KERNEL);
2871         if (!buf)
2872                 return;
2873         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2874         if (rc == 0)
2875                 *raid_level = buf[8];
2876         if (*raid_level > RAID_UNKNOWN)
2877                 *raid_level = RAID_UNKNOWN;
2878         kfree(buf);
2879         return;
2880 }
2881
2882 #define HPSA_MAP_DEBUG
2883 #ifdef HPSA_MAP_DEBUG
2884 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2885                                 struct raid_map_data *map_buff)
2886 {
2887         struct raid_map_disk_data *dd = &map_buff->data[0];
2888         int map, row, col;
2889         u16 map_cnt, row_cnt, disks_per_row;
2890
2891         if (rc != 0)
2892                 return;
2893
2894         /* Show details only if debugging has been activated. */
2895         if (h->raid_offload_debug < 2)
2896                 return;
2897
2898         dev_info(&h->pdev->dev, "structure_size = %u\n",
2899                                 le32_to_cpu(map_buff->structure_size));
2900         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2901                         le32_to_cpu(map_buff->volume_blk_size));
2902         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2903                         le64_to_cpu(map_buff->volume_blk_cnt));
2904         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2905                         map_buff->phys_blk_shift);
2906         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2907                         map_buff->parity_rotation_shift);
2908         dev_info(&h->pdev->dev, "strip_size = %u\n",
2909                         le16_to_cpu(map_buff->strip_size));
2910         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2911                         le64_to_cpu(map_buff->disk_starting_blk));
2912         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2913                         le64_to_cpu(map_buff->disk_blk_cnt));
2914         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2915                         le16_to_cpu(map_buff->data_disks_per_row));
2916         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2917                         le16_to_cpu(map_buff->metadata_disks_per_row));
2918         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2919                         le16_to_cpu(map_buff->row_cnt));
2920         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2921                         le16_to_cpu(map_buff->layout_map_count));
2922         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2923                         le16_to_cpu(map_buff->flags));
2924         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2925                         le16_to_cpu(map_buff->flags) &
2926                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2927         dev_info(&h->pdev->dev, "dekindex = %u\n",
2928                         le16_to_cpu(map_buff->dekindex));
2929         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2930         for (map = 0; map < map_cnt; map++) {
2931                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2932                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2933                 for (row = 0; row < row_cnt; row++) {
2934                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2935                         disks_per_row =
2936                                 le16_to_cpu(map_buff->data_disks_per_row);
2937                         for (col = 0; col < disks_per_row; col++, dd++)
2938                                 dev_info(&h->pdev->dev,
2939                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2940                                         col, dd->ioaccel_handle,
2941                                         dd->xor_mult[0], dd->xor_mult[1]);
2942                         disks_per_row =
2943                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2944                         for (col = 0; col < disks_per_row; col++, dd++)
2945                                 dev_info(&h->pdev->dev,
2946                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2947                                         col, dd->ioaccel_handle,
2948                                         dd->xor_mult[0], dd->xor_mult[1]);
2949                 }
2950         }
2951 }
2952 #else
2953 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2954                         __attribute__((unused)) int rc,
2955                         __attribute__((unused)) struct raid_map_data *map_buff)
2956 {
2957 }
2958 #endif
2959
2960 static int hpsa_get_raid_map(struct ctlr_info *h,
2961         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2962 {
2963         int rc = 0;
2964         struct CommandList *c;
2965         struct ErrorInfo *ei;
2966
2967         c = cmd_alloc(h);
2968
2969         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2970                         sizeof(this_device->raid_map), 0,
2971                         scsi3addr, TYPE_CMD)) {
2972                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
2973                 cmd_free(h, c);
2974                 return -1;
2975         }
2976         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2977                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2978         if (rc)
2979                 goto out;
2980         ei = c->err_info;
2981         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2982                 hpsa_scsi_interpret_error(h, c);
2983                 rc = -1;
2984                 goto out;
2985         }
2986         cmd_free(h, c);
2987
2988         /* @todo in the future, dynamically allocate RAID map memory */
2989         if (le32_to_cpu(this_device->raid_map.structure_size) >
2990                                 sizeof(this_device->raid_map)) {
2991                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2992                 rc = -1;
2993         }
2994         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2995         return rc;
2996 out:
2997         cmd_free(h, c);
2998         return rc;
2999 }
3000
3001 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3002                 unsigned char scsi3addr[], u16 bmic_device_index,
3003                 struct bmic_identify_physical_device *buf, size_t bufsize)
3004 {
3005         int rc = IO_OK;
3006         struct CommandList *c;
3007         struct ErrorInfo *ei;
3008
3009         c = cmd_alloc(h);
3010         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3011                 0, RAID_CTLR_LUNID, TYPE_CMD);
3012         if (rc)
3013                 goto out;
3014
3015         c->Request.CDB[2] = bmic_device_index & 0xff;
3016         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3017
3018         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3019                                                 NO_TIMEOUT);
3020         ei = c->err_info;
3021         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3022                 hpsa_scsi_interpret_error(h, c);
3023                 rc = -1;
3024         }
3025 out:
3026         cmd_free(h, c);
3027         return rc;
3028 }
3029
3030 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3031         unsigned char scsi3addr[], u8 page)
3032 {
3033         int rc;
3034         int i;
3035         int pages;
3036         unsigned char *buf, bufsize;
3037
3038         buf = kzalloc(256, GFP_KERNEL);
3039         if (!buf)
3040                 return 0;
3041
3042         /* Get the size of the page list first */
3043         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3044                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3045                                 buf, HPSA_VPD_HEADER_SZ);
3046         if (rc != 0)
3047                 goto exit_unsupported;
3048         pages = buf[3];
3049         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3050                 bufsize = pages + HPSA_VPD_HEADER_SZ;
3051         else
3052                 bufsize = 255;
3053
3054         /* Get the whole VPD page list */
3055         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3056                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3057                                 buf, bufsize);
3058         if (rc != 0)
3059                 goto exit_unsupported;
3060
3061         pages = buf[3];
3062         for (i = 1; i <= pages; i++)
3063                 if (buf[3 + i] == page)
3064                         goto exit_supported;
3065 exit_unsupported:
3066         kfree(buf);
3067         return 0;
3068 exit_supported:
3069         kfree(buf);
3070         return 1;
3071 }
3072
3073 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3074         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3075 {
3076         int rc;
3077         unsigned char *buf;
3078         u8 ioaccel_status;
3079
3080         this_device->offload_config = 0;
3081         this_device->offload_enabled = 0;
3082         this_device->offload_to_be_enabled = 0;
3083
3084         buf = kzalloc(64, GFP_KERNEL);
3085         if (!buf)
3086                 return;
3087         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3088                 goto out;
3089         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3090                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3091         if (rc != 0)
3092                 goto out;
3093
3094 #define IOACCEL_STATUS_BYTE 4
3095 #define OFFLOAD_CONFIGURED_BIT 0x01
3096 #define OFFLOAD_ENABLED_BIT 0x02
3097         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3098         this_device->offload_config =
3099                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3100         if (this_device->offload_config) {
3101                 this_device->offload_enabled =
3102                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3103                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3104                         this_device->offload_enabled = 0;
3105         }
3106         this_device->offload_to_be_enabled = this_device->offload_enabled;
3107 out:
3108         kfree(buf);
3109         return;
3110 }
3111
3112 /* Get the device id from inquiry page 0x83 */
3113 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3114         unsigned char *device_id, int buflen)
3115 {
3116         int rc;
3117         unsigned char *buf;
3118
3119         if (buflen > 16)
3120                 buflen = 16;
3121         buf = kzalloc(64, GFP_KERNEL);
3122         if (!buf)
3123                 return -ENOMEM;
3124         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3125         if (rc == 0)
3126                 memcpy(device_id, &buf[8], buflen);
3127         kfree(buf);
3128         return rc != 0;
3129 }
3130
3131 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3132                 void *buf, int bufsize,
3133                 int extended_response)
3134 {
3135         int rc = IO_OK;
3136         struct CommandList *c;
3137         unsigned char scsi3addr[8];
3138         struct ErrorInfo *ei;
3139
3140         c = cmd_alloc(h);
3141
3142         /* address the controller */
3143         memset(scsi3addr, 0, sizeof(scsi3addr));
3144         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3145                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3146                 rc = -1;
3147                 goto out;
3148         }
3149         if (extended_response)
3150                 c->Request.CDB[1] = extended_response;
3151         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3152                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3153         if (rc)
3154                 goto out;
3155         ei = c->err_info;
3156         if (ei->CommandStatus != 0 &&
3157             ei->CommandStatus != CMD_DATA_UNDERRUN) {
3158                 hpsa_scsi_interpret_error(h, c);
3159                 rc = -1;
3160         } else {
3161                 struct ReportLUNdata *rld = buf;
3162
3163                 if (rld->extended_response_flag != extended_response) {
3164                         dev_err(&h->pdev->dev,
3165                                 "report luns requested format %u, got %u\n",
3166                                 extended_response,
3167                                 rld->extended_response_flag);
3168                         rc = -1;
3169                 }
3170         }
3171 out:
3172         cmd_free(h, c);
3173         return rc;
3174 }
3175
3176 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3177                 struct ReportExtendedLUNdata *buf, int bufsize)
3178 {
3179         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3180                                                 HPSA_REPORT_PHYS_EXTENDED);
3181 }
3182
3183 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3184                 struct ReportLUNdata *buf, int bufsize)
3185 {
3186         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3187 }
3188
3189 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3190         int bus, int target, int lun)
3191 {
3192         device->bus = bus;
3193         device->target = target;
3194         device->lun = lun;
3195 }
3196
3197 /* Use VPD inquiry to get details of volume status */
3198 static int hpsa_get_volume_status(struct ctlr_info *h,
3199                                         unsigned char scsi3addr[])
3200 {
3201         int rc;
3202         int status;
3203         int size;
3204         unsigned char *buf;
3205
3206         buf = kzalloc(64, GFP_KERNEL);
3207         if (!buf)
3208                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3209
3210         /* Does controller have VPD for logical volume status? */
3211         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3212                 goto exit_failed;
3213
3214         /* Get the size of the VPD return buffer */
3215         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3216                                         buf, HPSA_VPD_HEADER_SZ);
3217         if (rc != 0)
3218                 goto exit_failed;
3219         size = buf[3];
3220
3221         /* Now get the whole VPD buffer */
3222         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3223                                         buf, size + HPSA_VPD_HEADER_SZ);
3224         if (rc != 0)
3225                 goto exit_failed;
3226         status = buf[4]; /* status byte */
3227
3228         kfree(buf);
3229         return status;
3230 exit_failed:
3231         kfree(buf);
3232         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3233 }
3234
3235 /* Determine offline status of a volume.
3236  * Return either:
3237  *  0 (not offline)
3238  *  0xff (offline for unknown reasons)
3239  *  # (integer code indicating one of several NOT READY states
3240  *     describing why a volume is to be kept offline)
3241  */
3242 static int hpsa_volume_offline(struct ctlr_info *h,
3243                                         unsigned char scsi3addr[])
3244 {
3245         struct CommandList *c;
3246         unsigned char *sense;
3247         u8 sense_key, asc, ascq;
3248         int sense_len;
3249         int rc, ldstat = 0;
3250         u16 cmd_status;
3251         u8 scsi_status;
3252 #define ASC_LUN_NOT_READY 0x04
3253 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3254 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3255
3256         c = cmd_alloc(h);
3257
3258         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3259         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3260         if (rc) {
3261                 cmd_free(h, c);
3262                 return 0;
3263         }
3264         sense = c->err_info->SenseInfo;
3265         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3266                 sense_len = sizeof(c->err_info->SenseInfo);
3267         else
3268                 sense_len = c->err_info->SenseLen;
3269         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3270         cmd_status = c->err_info->CommandStatus;
3271         scsi_status = c->err_info->ScsiStatus;
3272         cmd_free(h, c);
3273         /* Is the volume 'not ready'? */
3274         if (cmd_status != CMD_TARGET_STATUS ||
3275                 scsi_status != SAM_STAT_CHECK_CONDITION ||
3276                 sense_key != NOT_READY ||
3277                 asc != ASC_LUN_NOT_READY)  {
3278                 return 0;
3279         }
3280
3281         /* Determine the reason for not ready state */
3282         ldstat = hpsa_get_volume_status(h, scsi3addr);
3283
3284         /* Keep volume offline in certain cases: */
3285         switch (ldstat) {
3286         case HPSA_LV_UNDERGOING_ERASE:
3287         case HPSA_LV_NOT_AVAILABLE:
3288         case HPSA_LV_UNDERGOING_RPI:
3289         case HPSA_LV_PENDING_RPI:
3290         case HPSA_LV_ENCRYPTED_NO_KEY:
3291         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3292         case HPSA_LV_UNDERGOING_ENCRYPTION:
3293         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3294         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3295                 return ldstat;
3296         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3297                 /* If VPD status page isn't available,
3298                  * use ASC/ASCQ to determine state
3299                  */
3300                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3301                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3302                         return ldstat;
3303                 break;
3304         default:
3305                 break;
3306         }
3307         return 0;
3308 }
3309
3310 /*
3311  * Find out if a logical device supports aborts by simply trying one.
3312  * Smart Array may claim not to support aborts on logical drives, but
3313  * if a MSA2000 * is connected, the drives on that will be presented
3314  * by the Smart Array as logical drives, and aborts may be sent to
3315  * those devices successfully.  So the simplest way to find out is
3316  * to simply try an abort and see how the device responds.
3317  */
3318 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3319                                         unsigned char *scsi3addr)
3320 {
3321         struct CommandList *c;
3322         struct ErrorInfo *ei;
3323         int rc = 0;
3324
3325         u64 tag = (u64) -1; /* bogus tag */
3326
3327         /* Assume that physical devices support aborts */
3328         if (!is_logical_dev_addr_mode(scsi3addr))
3329                 return 1;
3330
3331         c = cmd_alloc(h);
3332
3333         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3334         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3335         /* no unmap needed here because no data xfer. */
3336         ei = c->err_info;
3337         switch (ei->CommandStatus) {
3338         case CMD_INVALID:
3339                 rc = 0;
3340                 break;
3341         case CMD_UNABORTABLE:
3342         case CMD_ABORT_FAILED:
3343                 rc = 1;
3344                 break;
3345         case CMD_TMF_STATUS:
3346                 rc = hpsa_evaluate_tmf_status(h, c);
3347                 break;
3348         default:
3349                 rc = 0;
3350                 break;
3351         }
3352         cmd_free(h, c);
3353         return rc;
3354 }
3355
3356 static int hpsa_update_device_info(struct ctlr_info *h,
3357         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3358         unsigned char *is_OBDR_device)
3359 {
3360
3361 #define OBDR_SIG_OFFSET 43
3362 #define OBDR_TAPE_SIG "$DR-10"
3363 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3364 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3365
3366         unsigned char *inq_buff;
3367         unsigned char *obdr_sig;
3368
3369         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3370         if (!inq_buff)
3371                 goto bail_out;
3372
3373         /* Do an inquiry to the device to see what it is. */
3374         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3375                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3376                 /* Inquiry failed (msg printed already) */
3377                 dev_err(&h->pdev->dev,
3378                         "hpsa_update_device_info: inquiry failed\n");
3379                 goto bail_out;
3380         }
3381
3382         this_device->devtype = (inq_buff[0] & 0x1f);
3383         memcpy(this_device->scsi3addr, scsi3addr, 8);
3384         memcpy(this_device->vendor, &inq_buff[8],
3385                 sizeof(this_device->vendor));
3386         memcpy(this_device->model, &inq_buff[16],
3387                 sizeof(this_device->model));
3388         memset(this_device->device_id, 0,
3389                 sizeof(this_device->device_id));
3390         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
3391                 sizeof(this_device->device_id));
3392
3393         if (this_device->devtype == TYPE_DISK &&
3394                 is_logical_dev_addr_mode(scsi3addr)) {
3395                 int volume_offline;
3396
3397                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3398                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3399                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3400                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3401                 if (volume_offline < 0 || volume_offline > 0xff)
3402                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3403                 this_device->volume_offline = volume_offline & 0xff;
3404         } else {
3405                 this_device->raid_level = RAID_UNKNOWN;
3406                 this_device->offload_config = 0;
3407                 this_device->offload_enabled = 0;
3408                 this_device->offload_to_be_enabled = 0;
3409                 this_device->hba_ioaccel_enabled = 0;
3410                 this_device->volume_offline = 0;
3411                 this_device->queue_depth = h->nr_cmds;
3412         }
3413
3414         if (is_OBDR_device) {
3415                 /* See if this is a One-Button-Disaster-Recovery device
3416                  * by looking for "$DR-10" at offset 43 in inquiry data.
3417                  */
3418                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3419                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3420                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3421                                                 OBDR_SIG_LEN) == 0);
3422         }
3423         kfree(inq_buff);
3424         return 0;
3425
3426 bail_out:
3427         kfree(inq_buff);
3428         return 1;
3429 }
3430
3431 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3432                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3433 {
3434         unsigned long flags;
3435         int rc, entry;
3436         /*
3437          * See if this device supports aborts.  If we already know
3438          * the device, we already know if it supports aborts, otherwise
3439          * we have to find out if it supports aborts by trying one.
3440          */
3441         spin_lock_irqsave(&h->devlock, flags);
3442         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3443         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3444                 entry >= 0 && entry < h->ndevices) {
3445                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3446                 spin_unlock_irqrestore(&h->devlock, flags);
3447         } else {
3448                 spin_unlock_irqrestore(&h->devlock, flags);
3449                 dev->supports_aborts =
3450                                 hpsa_device_supports_aborts(h, scsi3addr);
3451                 if (dev->supports_aborts < 0)
3452                         dev->supports_aborts = 0;
3453         }
3454 }
3455
3456 static unsigned char *ext_target_model[] = {
3457         "MSA2012",
3458         "MSA2024",
3459         "MSA2312",
3460         "MSA2324",
3461         "P2000 G3 SAS",
3462         "MSA 2040 SAS",
3463         NULL,
3464 };
3465
3466 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3467 {
3468         int i;
3469
3470         for (i = 0; ext_target_model[i]; i++)
3471                 if (strncmp(device->model, ext_target_model[i],
3472                         strlen(ext_target_model[i])) == 0)
3473                         return 1;
3474         return 0;
3475 }
3476
3477 /* Helper function to assign bus, target, lun mapping of devices.
3478  * Puts non-external target logical volumes on bus 0, external target logical
3479  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3480  * Logical drive target and lun are assigned at this time, but
3481  * physical device lun and target assignment are deferred (assigned
3482  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3483  */
3484 static void figure_bus_target_lun(struct ctlr_info *h,
3485         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3486 {
3487         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3488
3489         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3490                 /* physical device, target and lun filled in later */
3491                 if (is_hba_lunid(lunaddrbytes))
3492                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3493                 else
3494                         /* defer target, lun assignment for physical devices */
3495                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3496                 return;
3497         }
3498         /* It's a logical device */
3499         if (is_ext_target(h, device)) {
3500                 /* external target way, put logicals on bus 1
3501                  * and match target/lun numbers box
3502                  * reports, other smart array, bus 0, target 0, match lunid
3503                  */
3504                 hpsa_set_bus_target_lun(device,
3505                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3506                 return;
3507         }
3508         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3509 }
3510
3511 /*
3512  * If there is no lun 0 on a target, linux won't find any devices.
3513  * For the external targets (arrays), we have to manually detect the enclosure
3514  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3515  * it for some reason.  *tmpdevice is the target we're adding,
3516  * this_device is a pointer into the current element of currentsd[]
3517  * that we're building up in update_scsi_devices(), below.
3518  * lunzerobits is a bitmap that tracks which targets already have a
3519  * lun 0 assigned.
3520  * Returns 1 if an enclosure was added, 0 if not.
3521  */
3522 static int add_ext_target_dev(struct ctlr_info *h,
3523         struct hpsa_scsi_dev_t *tmpdevice,
3524         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3525         unsigned long lunzerobits[], int *n_ext_target_devs)
3526 {
3527         unsigned char scsi3addr[8];
3528
3529         if (test_bit(tmpdevice->target, lunzerobits))
3530                 return 0; /* There is already a lun 0 on this target. */
3531
3532         if (!is_logical_dev_addr_mode(lunaddrbytes))
3533                 return 0; /* It's the logical targets that may lack lun 0. */
3534
3535         if (!is_ext_target(h, tmpdevice))
3536                 return 0; /* Only external target devices have this problem. */
3537
3538         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3539                 return 0;
3540
3541         memset(scsi3addr, 0, 8);
3542         scsi3addr[3] = tmpdevice->target;
3543         if (is_hba_lunid(scsi3addr))
3544                 return 0; /* Don't add the RAID controller here. */
3545
3546         if (is_scsi_rev_5(h))
3547                 return 0; /* p1210m doesn't need to do this. */
3548
3549         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3550                 dev_warn(&h->pdev->dev, "Maximum number of external "
3551                         "target devices exceeded.  Check your hardware "
3552                         "configuration.");
3553                 return 0;
3554         }
3555
3556         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3557                 return 0;
3558         (*n_ext_target_devs)++;
3559         hpsa_set_bus_target_lun(this_device,
3560                                 tmpdevice->bus, tmpdevice->target, 0);
3561         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3562         set_bit(tmpdevice->target, lunzerobits);
3563         return 1;
3564 }
3565
3566 /*
3567  * Get address of physical disk used for an ioaccel2 mode command:
3568  *      1. Extract ioaccel2 handle from the command.
3569  *      2. Find a matching ioaccel2 handle from list of physical disks.
3570  *      3. Return:
3571  *              1 and set scsi3addr to address of matching physical
3572  *              0 if no matching physical disk was found.
3573  */
3574 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3575         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3576 {
3577         struct io_accel2_cmd *c2 =
3578                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3579         unsigned long flags;
3580         int i;
3581
3582         spin_lock_irqsave(&h->devlock, flags);
3583         for (i = 0; i < h->ndevices; i++)
3584                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3585                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3586                                 sizeof(h->dev[i]->scsi3addr));
3587                         spin_unlock_irqrestore(&h->devlock, flags);
3588                         return 1;
3589                 }
3590         spin_unlock_irqrestore(&h->devlock, flags);
3591         return 0;
3592 }
3593
3594 /*
3595  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3596  * logdev.  The number of luns in physdev and logdev are returned in
3597  * *nphysicals and *nlogicals, respectively.
3598  * Returns 0 on success, -1 otherwise.
3599  */
3600 static int hpsa_gather_lun_info(struct ctlr_info *h,
3601         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3602         struct ReportLUNdata *logdev, u32 *nlogicals)
3603 {
3604         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3605                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3606                 return -1;
3607         }
3608         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3609         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3610                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3611                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3612                 *nphysicals = HPSA_MAX_PHYS_LUN;
3613         }
3614         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3615                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3616                 return -1;
3617         }
3618         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3619         /* Reject Logicals in excess of our max capability. */
3620         if (*nlogicals > HPSA_MAX_LUN) {
3621                 dev_warn(&h->pdev->dev,
3622                         "maximum logical LUNs (%d) exceeded.  "
3623                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3624                         *nlogicals - HPSA_MAX_LUN);
3625                         *nlogicals = HPSA_MAX_LUN;
3626         }
3627         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3628                 dev_warn(&h->pdev->dev,
3629                         "maximum logical + physical LUNs (%d) exceeded. "
3630                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3631                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3632                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3633         }
3634         return 0;
3635 }
3636
3637 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3638         int i, int nphysicals, int nlogicals,
3639         struct ReportExtendedLUNdata *physdev_list,
3640         struct ReportLUNdata *logdev_list)
3641 {
3642         /* Helper function, figure out where the LUN ID info is coming from
3643          * given index i, lists of physical and logical devices, where in
3644          * the list the raid controller is supposed to appear (first or last)
3645          */
3646
3647         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3648         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3649
3650         if (i == raid_ctlr_position)
3651                 return RAID_CTLR_LUNID;
3652
3653         if (i < logicals_start)
3654                 return &physdev_list->LUN[i -
3655                                 (raid_ctlr_position == 0)].lunid[0];
3656
3657         if (i < last_device)
3658                 return &logdev_list->LUN[i - nphysicals -
3659                         (raid_ctlr_position == 0)][0];
3660         BUG();
3661         return NULL;
3662 }
3663
3664 /* get physical drive ioaccel handle and queue depth */
3665 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3666                 struct hpsa_scsi_dev_t *dev,
3667                 u8 *lunaddrbytes,
3668                 struct bmic_identify_physical_device *id_phys)
3669 {
3670         int rc;
3671         struct ext_report_lun_entry *rle =
3672                 (struct ext_report_lun_entry *) lunaddrbytes;
3673
3674         dev->ioaccel_handle = rle->ioaccel_handle;
3675         if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
3676                 dev->hba_ioaccel_enabled = 1;
3677         memset(id_phys, 0, sizeof(*id_phys));
3678         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3679                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3680                         sizeof(*id_phys));
3681         if (!rc)
3682                 /* Reserve space for FW operations */
3683 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3684 #define DRIVE_QUEUE_DEPTH 7
3685                 dev->queue_depth =
3686                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3687                                 DRIVE_CMDS_RESERVED_FOR_FW;
3688         else
3689                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3690 }
3691
3692 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3693         u8 *lunaddrbytes,
3694         struct bmic_identify_physical_device *id_phys)
3695 {
3696         if (PHYS_IOACCEL(lunaddrbytes)
3697                 && this_device->ioaccel_handle)
3698                 this_device->hba_ioaccel_enabled = 1;
3699
3700         memcpy(&this_device->active_path_index,
3701                 &id_phys->active_path_number,
3702                 sizeof(this_device->active_path_index));
3703         memcpy(&this_device->path_map,
3704                 &id_phys->redundant_path_present_map,
3705                 sizeof(this_device->path_map));
3706         memcpy(&this_device->box,
3707                 &id_phys->alternate_paths_phys_box_on_port,
3708                 sizeof(this_device->box));
3709         memcpy(&this_device->phys_connector,
3710                 &id_phys->alternate_paths_phys_connector,
3711                 sizeof(this_device->phys_connector));
3712         memcpy(&this_device->bay,
3713                 &id_phys->phys_bay_in_box,
3714                 sizeof(this_device->bay));
3715 }
3716
3717 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3718 {
3719         /* the idea here is we could get notified
3720          * that some devices have changed, so we do a report
3721          * physical luns and report logical luns cmd, and adjust
3722          * our list of devices accordingly.
3723          *
3724          * The scsi3addr's of devices won't change so long as the
3725          * adapter is not reset.  That means we can rescan and
3726          * tell which devices we already know about, vs. new
3727          * devices, vs.  disappearing devices.
3728          */
3729         struct ReportExtendedLUNdata *physdev_list = NULL;
3730         struct ReportLUNdata *logdev_list = NULL;
3731         struct bmic_identify_physical_device *id_phys = NULL;
3732         u32 nphysicals = 0;
3733         u32 nlogicals = 0;
3734         u32 ndev_allocated = 0;
3735         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3736         int ncurrent = 0;
3737         int i, n_ext_target_devs, ndevs_to_allocate;
3738         int raid_ctlr_position;
3739         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3740
3741         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3742         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3743         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3744         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3745         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3746
3747         if (!currentsd || !physdev_list || !logdev_list ||
3748                 !tmpdevice || !id_phys) {
3749                 dev_err(&h->pdev->dev, "out of memory\n");
3750                 goto out;
3751         }
3752         memset(lunzerobits, 0, sizeof(lunzerobits));
3753
3754         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3755                         logdev_list, &nlogicals))
3756                 goto out;
3757
3758         /* We might see up to the maximum number of logical and physical disks
3759          * plus external target devices, and a device for the local RAID
3760          * controller.
3761          */
3762         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3763
3764         /* Allocate the per device structures */
3765         for (i = 0; i < ndevs_to_allocate; i++) {
3766                 if (i >= HPSA_MAX_DEVICES) {
3767                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3768                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3769                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3770                         break;
3771                 }
3772
3773                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3774                 if (!currentsd[i]) {
3775                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3776                                 __FILE__, __LINE__);
3777                         goto out;
3778                 }
3779                 ndev_allocated++;
3780         }
3781
3782         if (is_scsi_rev_5(h))
3783                 raid_ctlr_position = 0;
3784         else
3785                 raid_ctlr_position = nphysicals + nlogicals;
3786
3787         /* adjust our table of devices */
3788         n_ext_target_devs = 0;
3789         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3790                 u8 *lunaddrbytes, is_OBDR = 0;
3791
3792                 /* Figure out where the LUN ID info is coming from */
3793                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3794                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3795
3796                 /* skip masked non-disk devices */
3797                 if (MASKED_DEVICE(lunaddrbytes))
3798                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3799                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3800                                 continue;
3801
3802                 /* Get device type, vendor, model, device id */
3803                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3804                                                         &is_OBDR))
3805                         continue; /* skip it if we can't talk to it. */
3806                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3807                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3808                 this_device = currentsd[ncurrent];
3809
3810                 /*
3811                  * For external target devices, we have to insert a LUN 0 which
3812                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3813                  * is nonetheless an enclosure device there.  We have to
3814                  * present that otherwise linux won't find anything if
3815                  * there is no lun 0.
3816                  */
3817                 if (add_ext_target_dev(h, tmpdevice, this_device,
3818                                 lunaddrbytes, lunzerobits,
3819                                 &n_ext_target_devs)) {
3820                         ncurrent++;
3821                         this_device = currentsd[ncurrent];
3822                 }
3823
3824                 *this_device = *tmpdevice;
3825
3826                 /* do not expose masked devices */
3827                 if (MASKED_DEVICE(lunaddrbytes) &&
3828                         i < nphysicals + (raid_ctlr_position == 0)) {
3829                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3830                 } else {
3831                         this_device->expose_state =
3832                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3833                 }
3834
3835                 switch (this_device->devtype) {
3836                 case TYPE_ROM:
3837                         /* We don't *really* support actual CD-ROM devices,
3838                          * just "One Button Disaster Recovery" tape drive
3839                          * which temporarily pretends to be a CD-ROM drive.
3840                          * So we check that the device is really an OBDR tape
3841                          * device by checking for "$DR-10" in bytes 43-48 of
3842                          * the inquiry data.
3843                          */
3844                         if (is_OBDR)
3845                                 ncurrent++;
3846                         break;
3847                 case TYPE_DISK:
3848                         if (i < nphysicals + (raid_ctlr_position == 0)) {
3849                                 /* The disk is in HBA mode. */
3850                                 /* Never use RAID mapper in HBA mode. */
3851                                 this_device->offload_enabled = 0;
3852                                 hpsa_get_ioaccel_drive_info(h, this_device,
3853                                         lunaddrbytes, id_phys);
3854                                 hpsa_get_path_info(this_device, lunaddrbytes,
3855                                                         id_phys);
3856                         }
3857                         ncurrent++;
3858                         break;
3859                 case TYPE_TAPE:
3860                 case TYPE_MEDIUM_CHANGER:
3861                 case TYPE_ENCLOSURE:
3862                         ncurrent++;
3863                         break;
3864                 case TYPE_RAID:
3865                         /* Only present the Smartarray HBA as a RAID controller.
3866                          * If it's a RAID controller other than the HBA itself
3867                          * (an external RAID controller, MSA500 or similar)
3868                          * don't present it.
3869                          */
3870                         if (!is_hba_lunid(lunaddrbytes))
3871                                 break;
3872                         ncurrent++;
3873                         break;
3874                 default:
3875                         break;
3876                 }
3877                 if (ncurrent >= HPSA_MAX_DEVICES)
3878                         break;
3879         }
3880         adjust_hpsa_scsi_table(h, currentsd, ncurrent);
3881 out:
3882         kfree(tmpdevice);
3883         for (i = 0; i < ndev_allocated; i++)
3884                 kfree(currentsd[i]);
3885         kfree(currentsd);
3886         kfree(physdev_list);
3887         kfree(logdev_list);
3888         kfree(id_phys);
3889 }
3890
3891 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3892                                    struct scatterlist *sg)
3893 {
3894         u64 addr64 = (u64) sg_dma_address(sg);
3895         unsigned int len = sg_dma_len(sg);
3896
3897         desc->Addr = cpu_to_le64(addr64);
3898         desc->Len = cpu_to_le32(len);
3899         desc->Ext = 0;
3900 }
3901
3902 /*
3903  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3904  * dma mapping  and fills in the scatter gather entries of the
3905  * hpsa command, cp.
3906  */
3907 static int hpsa_scatter_gather(struct ctlr_info *h,
3908                 struct CommandList *cp,
3909                 struct scsi_cmnd *cmd)
3910 {
3911         struct scatterlist *sg;
3912         int use_sg, i, sg_limit, chained, last_sg;
3913         struct SGDescriptor *curr_sg;
3914
3915         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3916
3917         use_sg = scsi_dma_map(cmd);
3918         if (use_sg < 0)
3919                 return use_sg;
3920
3921         if (!use_sg)
3922                 goto sglist_finished;
3923
3924         /*
3925          * If the number of entries is greater than the max for a single list,
3926          * then we have a chained list; we will set up all but one entry in the
3927          * first list (the last entry is saved for link information);
3928          * otherwise, we don't have a chained list and we'll set up at each of
3929          * the entries in the one list.
3930          */
3931         curr_sg = cp->SG;
3932         chained = use_sg > h->max_cmd_sg_entries;
3933         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
3934         last_sg = scsi_sg_count(cmd) - 1;
3935         scsi_for_each_sg(cmd, sg, sg_limit, i) {
3936                 hpsa_set_sg_descriptor(curr_sg, sg);
3937                 curr_sg++;
3938         }
3939
3940         if (chained) {
3941                 /*
3942                  * Continue with the chained list.  Set curr_sg to the chained
3943                  * list.  Modify the limit to the total count less the entries
3944                  * we've already set up.  Resume the scan at the list entry
3945                  * where the previous loop left off.
3946                  */
3947                 curr_sg = h->cmd_sg_list[cp->cmdindex];
3948                 sg_limit = use_sg - sg_limit;
3949                 for_each_sg(sg, sg, sg_limit, i) {
3950                         hpsa_set_sg_descriptor(curr_sg, sg);
3951                         curr_sg++;
3952                 }
3953         }
3954
3955         /* Back the pointer up to the last entry and mark it as "last". */
3956         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
3957
3958         if (use_sg + chained > h->maxSG)
3959                 h->maxSG = use_sg + chained;
3960
3961         if (chained) {
3962                 cp->Header.SGList = h->max_cmd_sg_entries;
3963                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3964                 if (hpsa_map_sg_chain_block(h, cp)) {
3965                         scsi_dma_unmap(cmd);
3966                         return -1;
3967                 }
3968                 return 0;
3969         }
3970
3971 sglist_finished:
3972
3973         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3974         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3975         return 0;
3976 }
3977
3978 #define IO_ACCEL_INELIGIBLE (1)
3979 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3980 {
3981         int is_write = 0;
3982         u32 block;
3983         u32 block_cnt;
3984
3985         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3986         switch (cdb[0]) {
3987         case WRITE_6:
3988         case WRITE_12:
3989                 is_write = 1;
3990         case READ_6:
3991         case READ_12:
3992                 if (*cdb_len == 6) {
3993                         block = (((u32) cdb[2]) << 8) | cdb[3];
3994                         block_cnt = cdb[4];
3995                 } else {
3996                         BUG_ON(*cdb_len != 12);
3997                         block = (((u32) cdb[2]) << 24) |
3998                                 (((u32) cdb[3]) << 16) |
3999                                 (((u32) cdb[4]) << 8) |
4000                                 cdb[5];
4001                         block_cnt =
4002                                 (((u32) cdb[6]) << 24) |
4003                                 (((u32) cdb[7]) << 16) |
4004                                 (((u32) cdb[8]) << 8) |
4005                                 cdb[9];
4006                 }
4007                 if (block_cnt > 0xffff)
4008                         return IO_ACCEL_INELIGIBLE;
4009
4010                 cdb[0] = is_write ? WRITE_10 : READ_10;
4011                 cdb[1] = 0;
4012                 cdb[2] = (u8) (block >> 24);
4013                 cdb[3] = (u8) (block >> 16);
4014                 cdb[4] = (u8) (block >> 8);
4015                 cdb[5] = (u8) (block);
4016                 cdb[6] = 0;
4017                 cdb[7] = (u8) (block_cnt >> 8);
4018                 cdb[8] = (u8) (block_cnt);
4019                 cdb[9] = 0;
4020                 *cdb_len = 10;
4021                 break;
4022         }
4023         return 0;
4024 }
4025
4026 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4027         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4028         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4029 {
4030         struct scsi_cmnd *cmd = c->scsi_cmd;
4031         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4032         unsigned int len;
4033         unsigned int total_len = 0;
4034         struct scatterlist *sg;
4035         u64 addr64;
4036         int use_sg, i;
4037         struct SGDescriptor *curr_sg;
4038         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4039
4040         /* TODO: implement chaining support */
4041         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4042                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4043                 return IO_ACCEL_INELIGIBLE;
4044         }
4045
4046         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4047
4048         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4049                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4050                 return IO_ACCEL_INELIGIBLE;
4051         }
4052
4053         c->cmd_type = CMD_IOACCEL1;
4054
4055         /* Adjust the DMA address to point to the accelerated command buffer */
4056         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4057                                 (c->cmdindex * sizeof(*cp));
4058         BUG_ON(c->busaddr & 0x0000007F);
4059
4060         use_sg = scsi_dma_map(cmd);
4061         if (use_sg < 0) {
4062                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4063                 return use_sg;
4064         }
4065
4066         if (use_sg) {
4067                 curr_sg = cp->SG;
4068                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4069                         addr64 = (u64) sg_dma_address(sg);
4070                         len  = sg_dma_len(sg);
4071                         total_len += len;
4072                         curr_sg->Addr = cpu_to_le64(addr64);
4073                         curr_sg->Len = cpu_to_le32(len);
4074                         curr_sg->Ext = cpu_to_le32(0);
4075                         curr_sg++;
4076                 }
4077                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4078
4079                 switch (cmd->sc_data_direction) {
4080                 case DMA_TO_DEVICE:
4081                         control |= IOACCEL1_CONTROL_DATA_OUT;
4082                         break;
4083                 case DMA_FROM_DEVICE:
4084                         control |= IOACCEL1_CONTROL_DATA_IN;
4085                         break;
4086                 case DMA_NONE:
4087                         control |= IOACCEL1_CONTROL_NODATAXFER;
4088                         break;
4089                 default:
4090                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4091                         cmd->sc_data_direction);
4092                         BUG();
4093                         break;
4094                 }
4095         } else {
4096                 control |= IOACCEL1_CONTROL_NODATAXFER;
4097         }
4098
4099         c->Header.SGList = use_sg;
4100         /* Fill out the command structure to submit */
4101         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4102         cp->transfer_len = cpu_to_le32(total_len);
4103         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4104                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4105         cp->control = cpu_to_le32(control);
4106         memcpy(cp->CDB, cdb, cdb_len);
4107         memcpy(cp->CISS_LUN, scsi3addr, 8);
4108         /* Tag was already set at init time. */
4109         enqueue_cmd_and_start_io(h, c);
4110         return 0;
4111 }
4112
4113 /*
4114  * Queue a command directly to a device behind the controller using the
4115  * I/O accelerator path.
4116  */
4117 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4118         struct CommandList *c)
4119 {
4120         struct scsi_cmnd *cmd = c->scsi_cmd;
4121         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4122
4123         c->phys_disk = dev;
4124
4125         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4126                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4127 }
4128
4129 /*
4130  * Set encryption parameters for the ioaccel2 request
4131  */
4132 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4133         struct CommandList *c, struct io_accel2_cmd *cp)
4134 {
4135         struct scsi_cmnd *cmd = c->scsi_cmd;
4136         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4137         struct raid_map_data *map = &dev->raid_map;
4138         u64 first_block;
4139
4140         /* Are we doing encryption on this device */
4141         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4142                 return;
4143         /* Set the data encryption key index. */
4144         cp->dekindex = map->dekindex;
4145
4146         /* Set the encryption enable flag, encoded into direction field. */
4147         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4148
4149         /* Set encryption tweak values based on logical block address
4150          * If block size is 512, tweak value is LBA.
4151          * For other block sizes, tweak is (LBA * block size)/ 512)
4152          */
4153         switch (cmd->cmnd[0]) {
4154         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4155         case WRITE_6:
4156         case READ_6:
4157                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4158                 break;
4159         case WRITE_10:
4160         case READ_10:
4161         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4162         case WRITE_12:
4163         case READ_12:
4164                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4165                 break;
4166         case WRITE_16:
4167         case READ_16:
4168                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4169                 break;
4170         default:
4171                 dev_err(&h->pdev->dev,
4172                         "ERROR: %s: size (0x%x) not supported for encryption\n",
4173                         __func__, cmd->cmnd[0]);
4174                 BUG();
4175                 break;
4176         }
4177
4178         if (le32_to_cpu(map->volume_blk_size) != 512)
4179                 first_block = first_block *
4180                                 le32_to_cpu(map->volume_blk_size)/512;
4181
4182         cp->tweak_lower = cpu_to_le32(first_block);
4183         cp->tweak_upper = cpu_to_le32(first_block >> 32);
4184 }
4185
4186 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4187         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4188         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4189 {
4190         struct scsi_cmnd *cmd = c->scsi_cmd;
4191         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4192         struct ioaccel2_sg_element *curr_sg;
4193         int use_sg, i;
4194         struct scatterlist *sg;
4195         u64 addr64;
4196         u32 len;
4197         u32 total_len = 0;
4198
4199         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4200
4201         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4202                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4203                 return IO_ACCEL_INELIGIBLE;
4204         }
4205
4206         c->cmd_type = CMD_IOACCEL2;
4207         /* Adjust the DMA address to point to the accelerated command buffer */
4208         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4209                                 (c->cmdindex * sizeof(*cp));
4210         BUG_ON(c->busaddr & 0x0000007F);
4211
4212         memset(cp, 0, sizeof(*cp));
4213         cp->IU_type = IOACCEL2_IU_TYPE;
4214
4215         use_sg = scsi_dma_map(cmd);
4216         if (use_sg < 0) {
4217                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4218                 return use_sg;
4219         }
4220
4221         if (use_sg) {
4222                 curr_sg = cp->sg;
4223                 if (use_sg > h->ioaccel_maxsg) {
4224                         addr64 = le64_to_cpu(
4225                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4226                         curr_sg->address = cpu_to_le64(addr64);
4227                         curr_sg->length = 0;
4228                         curr_sg->reserved[0] = 0;
4229                         curr_sg->reserved[1] = 0;
4230                         curr_sg->reserved[2] = 0;
4231                         curr_sg->chain_indicator = 0x80;
4232
4233                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4234                 }
4235                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4236                         addr64 = (u64) sg_dma_address(sg);
4237                         len  = sg_dma_len(sg);
4238                         total_len += len;
4239                         curr_sg->address = cpu_to_le64(addr64);
4240                         curr_sg->length = cpu_to_le32(len);
4241                         curr_sg->reserved[0] = 0;
4242                         curr_sg->reserved[1] = 0;
4243                         curr_sg->reserved[2] = 0;
4244                         curr_sg->chain_indicator = 0;
4245                         curr_sg++;
4246                 }
4247
4248                 switch (cmd->sc_data_direction) {
4249                 case DMA_TO_DEVICE:
4250                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4251                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4252                         break;
4253                 case DMA_FROM_DEVICE:
4254                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4255                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4256                         break;
4257                 case DMA_NONE:
4258                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4259                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4260                         break;
4261                 default:
4262                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4263                                 cmd->sc_data_direction);
4264                         BUG();
4265                         break;
4266                 }
4267         } else {
4268                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4269                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4270         }
4271
4272         /* Set encryption parameters, if necessary */
4273         set_encrypt_ioaccel2(h, c, cp);
4274
4275         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4276         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4277         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4278
4279         cp->data_len = cpu_to_le32(total_len);
4280         cp->err_ptr = cpu_to_le64(c->busaddr +
4281                         offsetof(struct io_accel2_cmd, error_data));
4282         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4283
4284         /* fill in sg elements */
4285         if (use_sg > h->ioaccel_maxsg) {
4286                 cp->sg_count = 1;
4287                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4288                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4289                         scsi_dma_unmap(cmd);
4290                         return -1;
4291                 }
4292         } else
4293                 cp->sg_count = (u8) use_sg;
4294
4295         enqueue_cmd_and_start_io(h, c);
4296         return 0;
4297 }
4298
4299 /*
4300  * Queue a command to the correct I/O accelerator path.
4301  */
4302 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4303         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4304         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4305 {
4306         /* Try to honor the device's queue depth */
4307         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4308                                         phys_disk->queue_depth) {
4309                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4310                 return IO_ACCEL_INELIGIBLE;
4311         }
4312         if (h->transMethod & CFGTBL_Trans_io_accel1)
4313                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4314                                                 cdb, cdb_len, scsi3addr,
4315                                                 phys_disk);
4316         else
4317                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4318                                                 cdb, cdb_len, scsi3addr,
4319                                                 phys_disk);
4320 }
4321
4322 static void raid_map_helper(struct raid_map_data *map,
4323                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4324 {
4325         if (offload_to_mirror == 0)  {
4326                 /* use physical disk in the first mirrored group. */
4327                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4328                 return;
4329         }
4330         do {
4331                 /* determine mirror group that *map_index indicates */
4332                 *current_group = *map_index /
4333                         le16_to_cpu(map->data_disks_per_row);
4334                 if (offload_to_mirror == *current_group)
4335                         continue;
4336                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4337                         /* select map index from next group */
4338                         *map_index += le16_to_cpu(map->data_disks_per_row);
4339                         (*current_group)++;
4340                 } else {
4341                         /* select map index from first group */
4342                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4343                         *current_group = 0;
4344                 }
4345         } while (offload_to_mirror != *current_group);
4346 }
4347
4348 /*
4349  * Attempt to perform offload RAID mapping for a logical volume I/O.
4350  */
4351 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4352         struct CommandList *c)
4353 {
4354         struct scsi_cmnd *cmd = c->scsi_cmd;
4355         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4356         struct raid_map_data *map = &dev->raid_map;
4357         struct raid_map_disk_data *dd = &map->data[0];
4358         int is_write = 0;
4359         u32 map_index;
4360         u64 first_block, last_block;
4361         u32 block_cnt;
4362         u32 blocks_per_row;
4363         u64 first_row, last_row;
4364         u32 first_row_offset, last_row_offset;
4365         u32 first_column, last_column;
4366         u64 r0_first_row, r0_last_row;
4367         u32 r5or6_blocks_per_row;
4368         u64 r5or6_first_row, r5or6_last_row;
4369         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4370         u32 r5or6_first_column, r5or6_last_column;
4371         u32 total_disks_per_row;
4372         u32 stripesize;
4373         u32 first_group, last_group, current_group;
4374         u32 map_row;
4375         u32 disk_handle;
4376         u64 disk_block;
4377         u32 disk_block_cnt;
4378         u8 cdb[16];
4379         u8 cdb_len;
4380         u16 strip_size;
4381 #if BITS_PER_LONG == 32
4382         u64 tmpdiv;
4383 #endif
4384         int offload_to_mirror;
4385
4386         /* check for valid opcode, get LBA and block count */
4387         switch (cmd->cmnd[0]) {
4388         case WRITE_6:
4389                 is_write = 1;
4390         case READ_6:
4391                 first_block =
4392                         (((u64) cmd->cmnd[2]) << 8) |
4393                         cmd->cmnd[3];
4394                 block_cnt = cmd->cmnd[4];
4395                 if (block_cnt == 0)
4396                         block_cnt = 256;
4397                 break;
4398         case WRITE_10:
4399                 is_write = 1;
4400         case READ_10:
4401                 first_block =
4402                         (((u64) cmd->cmnd[2]) << 24) |
4403                         (((u64) cmd->cmnd[3]) << 16) |
4404                         (((u64) cmd->cmnd[4]) << 8) |
4405                         cmd->cmnd[5];
4406                 block_cnt =
4407                         (((u32) cmd->cmnd[7]) << 8) |
4408                         cmd->cmnd[8];
4409                 break;
4410         case WRITE_12:
4411                 is_write = 1;
4412         case READ_12:
4413                 first_block =
4414                         (((u64) cmd->cmnd[2]) << 24) |
4415                         (((u64) cmd->cmnd[3]) << 16) |
4416                         (((u64) cmd->cmnd[4]) << 8) |
4417                         cmd->cmnd[5];
4418                 block_cnt =
4419                         (((u32) cmd->cmnd[6]) << 24) |
4420                         (((u32) cmd->cmnd[7]) << 16) |
4421                         (((u32) cmd->cmnd[8]) << 8) |
4422                 cmd->cmnd[9];
4423                 break;
4424         case WRITE_16:
4425                 is_write = 1;
4426         case READ_16:
4427                 first_block =
4428                         (((u64) cmd->cmnd[2]) << 56) |
4429                         (((u64) cmd->cmnd[3]) << 48) |
4430                         (((u64) cmd->cmnd[4]) << 40) |
4431                         (((u64) cmd->cmnd[5]) << 32) |
4432                         (((u64) cmd->cmnd[6]) << 24) |
4433                         (((u64) cmd->cmnd[7]) << 16) |
4434                         (((u64) cmd->cmnd[8]) << 8) |
4435                         cmd->cmnd[9];
4436                 block_cnt =
4437                         (((u32) cmd->cmnd[10]) << 24) |
4438                         (((u32) cmd->cmnd[11]) << 16) |
4439                         (((u32) cmd->cmnd[12]) << 8) |
4440                         cmd->cmnd[13];
4441                 break;
4442         default:
4443                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4444         }
4445         last_block = first_block + block_cnt - 1;
4446
4447         /* check for write to non-RAID-0 */
4448         if (is_write && dev->raid_level != 0)
4449                 return IO_ACCEL_INELIGIBLE;
4450
4451         /* check for invalid block or wraparound */
4452         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4453                 last_block < first_block)
4454                 return IO_ACCEL_INELIGIBLE;
4455
4456         /* calculate stripe information for the request */
4457         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4458                                 le16_to_cpu(map->strip_size);
4459         strip_size = le16_to_cpu(map->strip_size);
4460 #if BITS_PER_LONG == 32
4461         tmpdiv = first_block;
4462         (void) do_div(tmpdiv, blocks_per_row);
4463         first_row = tmpdiv;
4464         tmpdiv = last_block;
4465         (void) do_div(tmpdiv, blocks_per_row);
4466         last_row = tmpdiv;
4467         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4468         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4469         tmpdiv = first_row_offset;
4470         (void) do_div(tmpdiv, strip_size);
4471         first_column = tmpdiv;
4472         tmpdiv = last_row_offset;
4473         (void) do_div(tmpdiv, strip_size);
4474         last_column = tmpdiv;
4475 #else
4476         first_row = first_block / blocks_per_row;
4477         last_row = last_block / blocks_per_row;
4478         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4479         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4480         first_column = first_row_offset / strip_size;
4481         last_column = last_row_offset / strip_size;
4482 #endif
4483
4484         /* if this isn't a single row/column then give to the controller */
4485         if ((first_row != last_row) || (first_column != last_column))
4486                 return IO_ACCEL_INELIGIBLE;
4487
4488         /* proceeding with driver mapping */
4489         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4490                                 le16_to_cpu(map->metadata_disks_per_row);
4491         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4492                                 le16_to_cpu(map->row_cnt);
4493         map_index = (map_row * total_disks_per_row) + first_column;
4494
4495         switch (dev->raid_level) {
4496         case HPSA_RAID_0:
4497                 break; /* nothing special to do */
4498         case HPSA_RAID_1:
4499                 /* Handles load balance across RAID 1 members.
4500                  * (2-drive R1 and R10 with even # of drives.)
4501                  * Appropriate for SSDs, not optimal for HDDs
4502                  */
4503                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4504                 if (dev->offload_to_mirror)
4505                         map_index += le16_to_cpu(map->data_disks_per_row);
4506                 dev->offload_to_mirror = !dev->offload_to_mirror;
4507                 break;
4508         case HPSA_RAID_ADM:
4509                 /* Handles N-way mirrors  (R1-ADM)
4510                  * and R10 with # of drives divisible by 3.)
4511                  */
4512                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4513
4514                 offload_to_mirror = dev->offload_to_mirror;
4515                 raid_map_helper(map, offload_to_mirror,
4516                                 &map_index, &current_group);
4517                 /* set mirror group to use next time */
4518                 offload_to_mirror =
4519                         (offload_to_mirror >=
4520                         le16_to_cpu(map->layout_map_count) - 1)
4521                         ? 0 : offload_to_mirror + 1;
4522                 dev->offload_to_mirror = offload_to_mirror;
4523                 /* Avoid direct use of dev->offload_to_mirror within this
4524                  * function since multiple threads might simultaneously
4525                  * increment it beyond the range of dev->layout_map_count -1.
4526                  */
4527                 break;
4528         case HPSA_RAID_5:
4529         case HPSA_RAID_6:
4530                 if (le16_to_cpu(map->layout_map_count) <= 1)
4531                         break;
4532
4533                 /* Verify first and last block are in same RAID group */
4534                 r5or6_blocks_per_row =
4535                         le16_to_cpu(map->strip_size) *
4536                         le16_to_cpu(map->data_disks_per_row);
4537                 BUG_ON(r5or6_blocks_per_row == 0);
4538                 stripesize = r5or6_blocks_per_row *
4539                         le16_to_cpu(map->layout_map_count);
4540 #if BITS_PER_LONG == 32
4541                 tmpdiv = first_block;
4542                 first_group = do_div(tmpdiv, stripesize);
4543                 tmpdiv = first_group;
4544                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4545                 first_group = tmpdiv;
4546                 tmpdiv = last_block;
4547                 last_group = do_div(tmpdiv, stripesize);
4548                 tmpdiv = last_group;
4549                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4550                 last_group = tmpdiv;
4551 #else
4552                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4553                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4554 #endif
4555                 if (first_group != last_group)
4556                         return IO_ACCEL_INELIGIBLE;
4557
4558                 /* Verify request is in a single row of RAID 5/6 */
4559 #if BITS_PER_LONG == 32
4560                 tmpdiv = first_block;
4561                 (void) do_div(tmpdiv, stripesize);
4562                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4563                 tmpdiv = last_block;
4564                 (void) do_div(tmpdiv, stripesize);
4565                 r5or6_last_row = r0_last_row = tmpdiv;
4566 #else
4567                 first_row = r5or6_first_row = r0_first_row =
4568                                                 first_block / stripesize;
4569                 r5or6_last_row = r0_last_row = last_block / stripesize;
4570 #endif
4571                 if (r5or6_first_row != r5or6_last_row)
4572                         return IO_ACCEL_INELIGIBLE;
4573
4574
4575                 /* Verify request is in a single column */
4576 #if BITS_PER_LONG == 32
4577                 tmpdiv = first_block;
4578                 first_row_offset = do_div(tmpdiv, stripesize);
4579                 tmpdiv = first_row_offset;
4580                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4581                 r5or6_first_row_offset = first_row_offset;
4582                 tmpdiv = last_block;
4583                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4584                 tmpdiv = r5or6_last_row_offset;
4585                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4586                 tmpdiv = r5or6_first_row_offset;
4587                 (void) do_div(tmpdiv, map->strip_size);
4588                 first_column = r5or6_first_column = tmpdiv;
4589                 tmpdiv = r5or6_last_row_offset;
4590                 (void) do_div(tmpdiv, map->strip_size);
4591                 r5or6_last_column = tmpdiv;
4592 #else
4593                 first_row_offset = r5or6_first_row_offset =
4594                         (u32)((first_block % stripesize) %
4595                                                 r5or6_blocks_per_row);
4596
4597                 r5or6_last_row_offset =
4598                         (u32)((last_block % stripesize) %
4599                                                 r5or6_blocks_per_row);
4600
4601                 first_column = r5or6_first_column =
4602                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4603                 r5or6_last_column =
4604                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4605 #endif
4606                 if (r5or6_first_column != r5or6_last_column)
4607                         return IO_ACCEL_INELIGIBLE;
4608
4609                 /* Request is eligible */
4610                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4611                         le16_to_cpu(map->row_cnt);
4612
4613                 map_index = (first_group *
4614                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4615                         (map_row * total_disks_per_row) + first_column;
4616                 break;
4617         default:
4618                 return IO_ACCEL_INELIGIBLE;
4619         }
4620
4621         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4622                 return IO_ACCEL_INELIGIBLE;
4623
4624         c->phys_disk = dev->phys_disk[map_index];
4625
4626         disk_handle = dd[map_index].ioaccel_handle;
4627         disk_block = le64_to_cpu(map->disk_starting_blk) +
4628                         first_row * le16_to_cpu(map->strip_size) +
4629                         (first_row_offset - first_column *
4630                         le16_to_cpu(map->strip_size));
4631         disk_block_cnt = block_cnt;
4632
4633         /* handle differing logical/physical block sizes */
4634         if (map->phys_blk_shift) {
4635                 disk_block <<= map->phys_blk_shift;
4636                 disk_block_cnt <<= map->phys_blk_shift;
4637         }
4638         BUG_ON(disk_block_cnt > 0xffff);
4639
4640         /* build the new CDB for the physical disk I/O */
4641         if (disk_block > 0xffffffff) {
4642                 cdb[0] = is_write ? WRITE_16 : READ_16;
4643                 cdb[1] = 0;
4644                 cdb[2] = (u8) (disk_block >> 56);
4645                 cdb[3] = (u8) (disk_block >> 48);
4646                 cdb[4] = (u8) (disk_block >> 40);
4647                 cdb[5] = (u8) (disk_block >> 32);
4648                 cdb[6] = (u8) (disk_block >> 24);
4649                 cdb[7] = (u8) (disk_block >> 16);
4650                 cdb[8] = (u8) (disk_block >> 8);
4651                 cdb[9] = (u8) (disk_block);
4652                 cdb[10] = (u8) (disk_block_cnt >> 24);
4653                 cdb[11] = (u8) (disk_block_cnt >> 16);
4654                 cdb[12] = (u8) (disk_block_cnt >> 8);
4655                 cdb[13] = (u8) (disk_block_cnt);
4656                 cdb[14] = 0;
4657                 cdb[15] = 0;
4658                 cdb_len = 16;
4659         } else {
4660                 cdb[0] = is_write ? WRITE_10 : READ_10;
4661                 cdb[1] = 0;
4662                 cdb[2] = (u8) (disk_block >> 24);
4663                 cdb[3] = (u8) (disk_block >> 16);
4664                 cdb[4] = (u8) (disk_block >> 8);
4665                 cdb[5] = (u8) (disk_block);
4666                 cdb[6] = 0;
4667                 cdb[7] = (u8) (disk_block_cnt >> 8);
4668                 cdb[8] = (u8) (disk_block_cnt);
4669                 cdb[9] = 0;
4670                 cdb_len = 10;
4671         }
4672         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4673                                                 dev->scsi3addr,
4674                                                 dev->phys_disk[map_index]);
4675 }
4676
4677 /*
4678  * Submit commands down the "normal" RAID stack path
4679  * All callers to hpsa_ciss_submit must check lockup_detected
4680  * beforehand, before (opt.) and after calling cmd_alloc
4681  */
4682 static int hpsa_ciss_submit(struct ctlr_info *h,
4683         struct CommandList *c, struct scsi_cmnd *cmd,
4684         unsigned char scsi3addr[])
4685 {
4686         cmd->host_scribble = (unsigned char *) c;
4687         c->cmd_type = CMD_SCSI;
4688         c->scsi_cmd = cmd;
4689         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4690         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4691         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4692
4693         /* Fill in the request block... */
4694
4695         c->Request.Timeout = 0;
4696         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4697         c->Request.CDBLen = cmd->cmd_len;
4698         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4699         switch (cmd->sc_data_direction) {
4700         case DMA_TO_DEVICE:
4701                 c->Request.type_attr_dir =
4702                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4703                 break;
4704         case DMA_FROM_DEVICE:
4705                 c->Request.type_attr_dir =
4706                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4707                 break;
4708         case DMA_NONE:
4709                 c->Request.type_attr_dir =
4710                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4711                 break;
4712         case DMA_BIDIRECTIONAL:
4713                 /* This can happen if a buggy application does a scsi passthru
4714                  * and sets both inlen and outlen to non-zero. ( see
4715                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4716                  */
4717
4718                 c->Request.type_attr_dir =
4719                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4720                 /* This is technically wrong, and hpsa controllers should
4721                  * reject it with CMD_INVALID, which is the most correct
4722                  * response, but non-fibre backends appear to let it
4723                  * slide by, and give the same results as if this field
4724                  * were set correctly.  Either way is acceptable for
4725                  * our purposes here.
4726                  */
4727
4728                 break;
4729
4730         default:
4731                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4732                         cmd->sc_data_direction);
4733                 BUG();
4734                 break;
4735         }
4736
4737         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4738                 hpsa_cmd_resolve_and_free(h, c);
4739                 return SCSI_MLQUEUE_HOST_BUSY;
4740         }
4741         enqueue_cmd_and_start_io(h, c);
4742         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4743         return 0;
4744 }
4745
4746 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4747                                 struct CommandList *c)
4748 {
4749         dma_addr_t cmd_dma_handle, err_dma_handle;
4750
4751         /* Zero out all of commandlist except the last field, refcount */
4752         memset(c, 0, offsetof(struct CommandList, refcount));
4753         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4754         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4755         c->err_info = h->errinfo_pool + index;
4756         memset(c->err_info, 0, sizeof(*c->err_info));
4757         err_dma_handle = h->errinfo_pool_dhandle
4758             + index * sizeof(*c->err_info);
4759         c->cmdindex = index;
4760         c->busaddr = (u32) cmd_dma_handle;
4761         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4762         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4763         c->h = h;
4764         c->scsi_cmd = SCSI_CMD_IDLE;
4765 }
4766
4767 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4768 {
4769         int i;
4770
4771         for (i = 0; i < h->nr_cmds; i++) {
4772                 struct CommandList *c = h->cmd_pool + i;
4773
4774                 hpsa_cmd_init(h, i, c);
4775                 atomic_set(&c->refcount, 0);
4776         }
4777 }
4778
4779 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4780                                 struct CommandList *c)
4781 {
4782         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4783
4784         BUG_ON(c->cmdindex != index);
4785
4786         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4787         memset(c->err_info, 0, sizeof(*c->err_info));
4788         c->busaddr = (u32) cmd_dma_handle;
4789 }
4790
4791 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4792                 struct CommandList *c, struct scsi_cmnd *cmd,
4793                 unsigned char *scsi3addr)
4794 {
4795         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4796         int rc = IO_ACCEL_INELIGIBLE;
4797
4798         cmd->host_scribble = (unsigned char *) c;
4799
4800         if (dev->offload_enabled) {
4801                 hpsa_cmd_init(h, c->cmdindex, c);
4802                 c->cmd_type = CMD_SCSI;
4803                 c->scsi_cmd = cmd;
4804                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4805                 if (rc < 0)     /* scsi_dma_map failed. */
4806                         rc = SCSI_MLQUEUE_HOST_BUSY;
4807         } else if (dev->hba_ioaccel_enabled) {
4808                 hpsa_cmd_init(h, c->cmdindex, c);
4809                 c->cmd_type = CMD_SCSI;
4810                 c->scsi_cmd = cmd;
4811                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4812                 if (rc < 0)     /* scsi_dma_map failed. */
4813                         rc = SCSI_MLQUEUE_HOST_BUSY;
4814         }
4815         return rc;
4816 }
4817
4818 static void hpsa_command_resubmit_worker(struct work_struct *work)
4819 {
4820         struct scsi_cmnd *cmd;
4821         struct hpsa_scsi_dev_t *dev;
4822         struct CommandList *c = container_of(work, struct CommandList, work);
4823
4824         cmd = c->scsi_cmd;
4825         dev = cmd->device->hostdata;
4826         if (!dev) {
4827                 cmd->result = DID_NO_CONNECT << 16;
4828                 return hpsa_cmd_free_and_done(c->h, c, cmd);
4829         }
4830         if (c->reset_pending)
4831                 return hpsa_cmd_resolve_and_free(c->h, c);
4832         if (c->abort_pending)
4833                 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4834         if (c->cmd_type == CMD_IOACCEL2) {
4835                 struct ctlr_info *h = c->h;
4836                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4837                 int rc;
4838
4839                 if (c2->error_data.serv_response ==
4840                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4841                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4842                         if (rc == 0)
4843                                 return;
4844                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4845                                 /*
4846                                  * If we get here, it means dma mapping failed.
4847                                  * Try again via scsi mid layer, which will
4848                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4849                                  */
4850                                 cmd->result = DID_IMM_RETRY << 16;
4851                                 return hpsa_cmd_free_and_done(h, c, cmd);
4852                         }
4853                         /* else, fall thru and resubmit down CISS path */
4854                 }
4855         }
4856         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4857         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4858                 /*
4859                  * If we get here, it means dma mapping failed. Try
4860                  * again via scsi mid layer, which will then get
4861                  * SCSI_MLQUEUE_HOST_BUSY.
4862                  *
4863                  * hpsa_ciss_submit will have already freed c
4864                  * if it encountered a dma mapping failure.
4865                  */
4866                 cmd->result = DID_IMM_RETRY << 16;
4867                 cmd->scsi_done(cmd);
4868         }
4869 }
4870
4871 /* Running in struct Scsi_Host->host_lock less mode */
4872 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4873 {
4874         struct ctlr_info *h;
4875         struct hpsa_scsi_dev_t *dev;
4876         unsigned char scsi3addr[8];
4877         struct CommandList *c;
4878         int rc = 0;
4879
4880         /* Get the ptr to our adapter structure out of cmd->host. */
4881         h = sdev_to_hba(cmd->device);
4882
4883         BUG_ON(cmd->request->tag < 0);
4884
4885         dev = cmd->device->hostdata;
4886         if (!dev) {
4887                 cmd->result = DID_NO_CONNECT << 16;
4888                 cmd->scsi_done(cmd);
4889                 return 0;
4890         }
4891
4892         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4893
4894         if (unlikely(lockup_detected(h))) {
4895                 cmd->result = DID_NO_CONNECT << 16;
4896                 cmd->scsi_done(cmd);
4897                 return 0;
4898         }
4899         c = cmd_tagged_alloc(h, cmd);
4900
4901         /*
4902          * Call alternate submit routine for I/O accelerated commands.
4903          * Retries always go down the normal I/O path.
4904          */
4905         if (likely(cmd->retries == 0 &&
4906                 cmd->request->cmd_type == REQ_TYPE_FS &&
4907                 h->acciopath_status)) {
4908                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4909                 if (rc == 0)
4910                         return 0;
4911                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4912                         hpsa_cmd_resolve_and_free(h, c);
4913                         return SCSI_MLQUEUE_HOST_BUSY;
4914                 }
4915         }
4916         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4917 }
4918
4919 static void hpsa_scan_complete(struct ctlr_info *h)
4920 {
4921         unsigned long flags;
4922
4923         spin_lock_irqsave(&h->scan_lock, flags);
4924         h->scan_finished = 1;
4925         wake_up_all(&h->scan_wait_queue);
4926         spin_unlock_irqrestore(&h->scan_lock, flags);
4927 }
4928
4929 static void hpsa_scan_start(struct Scsi_Host *sh)
4930 {
4931         struct ctlr_info *h = shost_to_hba(sh);
4932         unsigned long flags;
4933
4934         /*
4935          * Don't let rescans be initiated on a controller known to be locked
4936          * up.  If the controller locks up *during* a rescan, that thread is
4937          * probably hosed, but at least we can prevent new rescan threads from
4938          * piling up on a locked up controller.
4939          */
4940         if (unlikely(lockup_detected(h)))
4941                 return hpsa_scan_complete(h);
4942
4943         /* wait until any scan already in progress is finished. */
4944         while (1) {
4945                 spin_lock_irqsave(&h->scan_lock, flags);
4946                 if (h->scan_finished)
4947                         break;
4948                 spin_unlock_irqrestore(&h->scan_lock, flags);
4949                 wait_event(h->scan_wait_queue, h->scan_finished);
4950                 /* Note: We don't need to worry about a race between this
4951                  * thread and driver unload because the midlayer will
4952                  * have incremented the reference count, so unload won't
4953                  * happen if we're in here.
4954                  */
4955         }
4956         h->scan_finished = 0; /* mark scan as in progress */
4957         spin_unlock_irqrestore(&h->scan_lock, flags);
4958
4959         if (unlikely(lockup_detected(h)))
4960                 return hpsa_scan_complete(h);
4961
4962         hpsa_update_scsi_devices(h);
4963
4964         hpsa_scan_complete(h);
4965 }
4966
4967 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4968 {
4969         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4970
4971         if (!logical_drive)
4972                 return -ENODEV;
4973
4974         if (qdepth < 1)
4975                 qdepth = 1;
4976         else if (qdepth > logical_drive->queue_depth)
4977                 qdepth = logical_drive->queue_depth;
4978
4979         return scsi_change_queue_depth(sdev, qdepth);
4980 }
4981
4982 static int hpsa_scan_finished(struct Scsi_Host *sh,
4983         unsigned long elapsed_time)
4984 {
4985         struct ctlr_info *h = shost_to_hba(sh);
4986         unsigned long flags;
4987         int finished;
4988
4989         spin_lock_irqsave(&h->scan_lock, flags);
4990         finished = h->scan_finished;
4991         spin_unlock_irqrestore(&h->scan_lock, flags);
4992         return finished;
4993 }
4994
4995 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
4996 {
4997         struct Scsi_Host *sh;
4998         int error;
4999
5000         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5001         if (sh == NULL) {
5002                 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5003                 return -ENOMEM;
5004         }
5005
5006         sh->io_port = 0;
5007         sh->n_io_port = 0;
5008         sh->this_id = -1;
5009         sh->max_channel = 3;
5010         sh->max_cmd_len = MAX_COMMAND_SIZE;
5011         sh->max_lun = HPSA_MAX_LUN;
5012         sh->max_id = HPSA_MAX_LUN;
5013         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5014         sh->cmd_per_lun = sh->can_queue;
5015         sh->sg_tablesize = h->maxsgentries;
5016         sh->hostdata[0] = (unsigned long) h;
5017         sh->irq = h->intr[h->intr_mode];
5018         sh->unique_id = sh->irq;
5019         error = scsi_init_shared_tag_map(sh, sh->can_queue);
5020         if (error) {
5021                 dev_err(&h->pdev->dev,
5022                         "%s: scsi_init_shared_tag_map failed for controller %d\n",
5023                         __func__, h->ctlr);
5024                         scsi_host_put(sh);
5025                         return error;
5026         }
5027         h->scsi_host = sh;
5028         return 0;
5029 }
5030
5031 static int hpsa_scsi_add_host(struct ctlr_info *h)
5032 {
5033         int rv;
5034
5035         rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5036         if (rv) {
5037                 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5038                 return rv;
5039         }
5040         scsi_scan_host(h->scsi_host);
5041         return 0;
5042 }
5043
5044 /*
5045  * The block layer has already gone to the trouble of picking out a unique,
5046  * small-integer tag for this request.  We use an offset from that value as
5047  * an index to select our command block.  (The offset allows us to reserve the
5048  * low-numbered entries for our own uses.)
5049  */
5050 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5051 {
5052         int idx = scmd->request->tag;
5053
5054         if (idx < 0)
5055                 return idx;
5056
5057         /* Offset to leave space for internal cmds. */
5058         return idx += HPSA_NRESERVED_CMDS;
5059 }
5060
5061 /*
5062  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5063  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5064  */
5065 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5066                                 struct CommandList *c, unsigned char lunaddr[],
5067                                 int reply_queue)
5068 {
5069         int rc;
5070
5071         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5072         (void) fill_cmd(c, TEST_UNIT_READY, h,
5073                         NULL, 0, 0, lunaddr, TYPE_CMD);
5074         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5075         if (rc)
5076                 return rc;
5077         /* no unmap needed here because no data xfer. */
5078
5079         /* Check if the unit is already ready. */
5080         if (c->err_info->CommandStatus == CMD_SUCCESS)
5081                 return 0;
5082
5083         /*
5084          * The first command sent after reset will receive "unit attention" to
5085          * indicate that the LUN has been reset...this is actually what we're
5086          * looking for (but, success is good too).
5087          */
5088         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5089                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5090                         (c->err_info->SenseInfo[2] == NO_SENSE ||
5091                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5092                 return 0;
5093
5094         return 1;
5095 }
5096
5097 /*
5098  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5099  * returns zero when the unit is ready, and non-zero when giving up.
5100  */
5101 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5102                                 struct CommandList *c,
5103                                 unsigned char lunaddr[], int reply_queue)
5104 {
5105         int rc;
5106         int count = 0;
5107         int waittime = 1; /* seconds */
5108
5109         /* Send test unit ready until device ready, or give up. */
5110         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5111
5112                 /*
5113                  * Wait for a bit.  do this first, because if we send
5114                  * the TUR right away, the reset will just abort it.
5115                  */
5116                 msleep(1000 * waittime);
5117
5118                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5119                 if (!rc)
5120                         break;
5121
5122                 /* Increase wait time with each try, up to a point. */
5123                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5124                         waittime *= 2;
5125
5126                 dev_warn(&h->pdev->dev,
5127                          "waiting %d secs for device to become ready.\n",
5128                          waittime);
5129         }
5130
5131         return rc;
5132 }
5133
5134 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5135                                            unsigned char lunaddr[],
5136                                            int reply_queue)
5137 {
5138         int first_queue;
5139         int last_queue;
5140         int rq;
5141         int rc = 0;
5142         struct CommandList *c;
5143
5144         c = cmd_alloc(h);
5145
5146         /*
5147          * If no specific reply queue was requested, then send the TUR
5148          * repeatedly, requesting a reply on each reply queue; otherwise execute
5149          * the loop exactly once using only the specified queue.
5150          */
5151         if (reply_queue == DEFAULT_REPLY_QUEUE) {
5152                 first_queue = 0;
5153                 last_queue = h->nreply_queues - 1;
5154         } else {
5155                 first_queue = reply_queue;
5156                 last_queue = reply_queue;
5157         }
5158
5159         for (rq = first_queue; rq <= last_queue; rq++) {
5160                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5161                 if (rc)
5162                         break;
5163         }
5164
5165         if (rc)
5166                 dev_warn(&h->pdev->dev, "giving up on device.\n");
5167         else
5168                 dev_warn(&h->pdev->dev, "device is ready.\n");
5169
5170         cmd_free(h, c);
5171         return rc;
5172 }
5173
5174 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5175  * complaining.  Doing a host- or bus-reset can't do anything good here.
5176  */
5177 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5178 {
5179         int rc;
5180         struct ctlr_info *h;
5181         struct hpsa_scsi_dev_t *dev;
5182         char msg[48];
5183
5184         /* find the controller to which the command to be aborted was sent */
5185         h = sdev_to_hba(scsicmd->device);
5186         if (h == NULL) /* paranoia */
5187                 return FAILED;
5188
5189         if (lockup_detected(h))
5190                 return FAILED;
5191
5192         dev = scsicmd->device->hostdata;
5193         if (!dev) {
5194                 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5195                 return FAILED;
5196         }
5197
5198         /* if controller locked up, we can guarantee command won't complete */
5199         if (lockup_detected(h)) {
5200                 snprintf(msg, sizeof(msg),
5201                          "cmd %d RESET FAILED, lockup detected",
5202                          hpsa_get_cmd_index(scsicmd));
5203                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5204                 return FAILED;
5205         }
5206
5207         /* this reset request might be the result of a lockup; check */
5208         if (detect_controller_lockup(h)) {
5209                 snprintf(msg, sizeof(msg),
5210                          "cmd %d RESET FAILED, new lockup detected",
5211                          hpsa_get_cmd_index(scsicmd));
5212                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5213                 return FAILED;
5214         }
5215
5216         /* Do not attempt on controller */
5217         if (is_hba_lunid(dev->scsi3addr))
5218                 return SUCCESS;
5219
5220         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
5221
5222         /* send a reset to the SCSI LUN which the command was sent to */
5223         rc = hpsa_do_reset(h, dev, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
5224                            DEFAULT_REPLY_QUEUE);
5225         snprintf(msg, sizeof(msg), "reset %s",
5226                  rc == 0 ? "completed successfully" : "failed");
5227         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5228         return rc == 0 ? SUCCESS : FAILED;
5229 }
5230
5231 static void swizzle_abort_tag(u8 *tag)
5232 {
5233         u8 original_tag[8];
5234
5235         memcpy(original_tag, tag, 8);
5236         tag[0] = original_tag[3];
5237         tag[1] = original_tag[2];
5238         tag[2] = original_tag[1];
5239         tag[3] = original_tag[0];
5240         tag[4] = original_tag[7];
5241         tag[5] = original_tag[6];
5242         tag[6] = original_tag[5];
5243         tag[7] = original_tag[4];
5244 }
5245
5246 static void hpsa_get_tag(struct ctlr_info *h,
5247         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5248 {
5249         u64 tag;
5250         if (c->cmd_type == CMD_IOACCEL1) {
5251                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5252                         &h->ioaccel_cmd_pool[c->cmdindex];
5253                 tag = le64_to_cpu(cm1->tag);
5254                 *tagupper = cpu_to_le32(tag >> 32);
5255                 *taglower = cpu_to_le32(tag);
5256                 return;
5257         }
5258         if (c->cmd_type == CMD_IOACCEL2) {
5259                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5260                         &h->ioaccel2_cmd_pool[c->cmdindex];
5261                 /* upper tag not used in ioaccel2 mode */
5262                 memset(tagupper, 0, sizeof(*tagupper));
5263                 *taglower = cm2->Tag;
5264                 return;
5265         }
5266         tag = le64_to_cpu(c->Header.tag);
5267         *tagupper = cpu_to_le32(tag >> 32);
5268         *taglower = cpu_to_le32(tag);
5269 }
5270
5271 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5272         struct CommandList *abort, int reply_queue)
5273 {
5274         int rc = IO_OK;
5275         struct CommandList *c;
5276         struct ErrorInfo *ei;
5277         __le32 tagupper, taglower;
5278
5279         c = cmd_alloc(h);
5280
5281         /* fill_cmd can't fail here, no buffer to map */
5282         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5283                 0, 0, scsi3addr, TYPE_MSG);
5284         if (h->needs_abort_tags_swizzled)
5285                 swizzle_abort_tag(&c->Request.CDB[4]);
5286         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5287         hpsa_get_tag(h, abort, &taglower, &tagupper);
5288         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5289                 __func__, tagupper, taglower);
5290         /* no unmap needed here because no data xfer. */
5291
5292         ei = c->err_info;
5293         switch (ei->CommandStatus) {
5294         case CMD_SUCCESS:
5295                 break;
5296         case CMD_TMF_STATUS:
5297                 rc = hpsa_evaluate_tmf_status(h, c);
5298                 break;
5299         case CMD_UNABORTABLE: /* Very common, don't make noise. */
5300                 rc = -1;
5301                 break;
5302         default:
5303                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5304                         __func__, tagupper, taglower);
5305                 hpsa_scsi_interpret_error(h, c);
5306                 rc = -1;
5307                 break;
5308         }
5309         cmd_free(h, c);
5310         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5311                 __func__, tagupper, taglower);
5312         return rc;
5313 }
5314
5315 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5316         struct CommandList *command_to_abort, int reply_queue)
5317 {
5318         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5319         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5320         struct io_accel2_cmd *c2a =
5321                 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5322         struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5323         struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5324
5325         /*
5326          * We're overlaying struct hpsa_tmf_struct on top of something which
5327          * was allocated as a struct io_accel2_cmd, so we better be sure it
5328          * actually fits, and doesn't overrun the error info space.
5329          */
5330         BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5331                         sizeof(struct io_accel2_cmd));
5332         BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5333                         offsetof(struct hpsa_tmf_struct, error_len) +
5334                                 sizeof(ac->error_len));
5335
5336         c->cmd_type = IOACCEL2_TMF;
5337         c->scsi_cmd = SCSI_CMD_BUSY;
5338
5339         /* Adjust the DMA address to point to the accelerated command buffer */
5340         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5341                                 (c->cmdindex * sizeof(struct io_accel2_cmd));
5342         BUG_ON(c->busaddr & 0x0000007F);
5343
5344         memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5345         ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5346         ac->reply_queue = reply_queue;
5347         ac->tmf = IOACCEL2_TMF_ABORT;
5348         ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5349         memset(ac->lun_id, 0, sizeof(ac->lun_id));
5350         ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5351         ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5352         ac->error_ptr = cpu_to_le64(c->busaddr +
5353                         offsetof(struct io_accel2_cmd, error_data));
5354         ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5355 }
5356
5357 /* ioaccel2 path firmware cannot handle abort task requests.
5358  * Change abort requests to physical target reset, and send to the
5359  * address of the physical disk used for the ioaccel 2 command.
5360  * Return 0 on success (IO_OK)
5361  *       -1 on failure
5362  */
5363
5364 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5365         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5366 {
5367         int rc = IO_OK;
5368         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5369         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5370         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5371         unsigned char *psa = &phys_scsi3addr[0];
5372
5373         /* Get a pointer to the hpsa logical device. */
5374         scmd = abort->scsi_cmd;
5375         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5376         if (dev == NULL) {
5377                 dev_warn(&h->pdev->dev,
5378                         "Cannot abort: no device pointer for command.\n");
5379                         return -1; /* not abortable */
5380         }
5381
5382         if (h->raid_offload_debug > 0)
5383                 dev_info(&h->pdev->dev,
5384                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5385                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5386                         "Reset as abort",
5387                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5388                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5389
5390         if (!dev->offload_enabled) {
5391                 dev_warn(&h->pdev->dev,
5392                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5393                 return -1; /* not abortable */
5394         }
5395
5396         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5397         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5398                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5399                 return -1; /* not abortable */
5400         }
5401
5402         /* send the reset */
5403         if (h->raid_offload_debug > 0)
5404                 dev_info(&h->pdev->dev,
5405                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5406                         psa[0], psa[1], psa[2], psa[3],
5407                         psa[4], psa[5], psa[6], psa[7]);
5408         rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5409         if (rc != 0) {
5410                 dev_warn(&h->pdev->dev,
5411                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5412                         psa[0], psa[1], psa[2], psa[3],
5413                         psa[4], psa[5], psa[6], psa[7]);
5414                 return rc; /* failed to reset */
5415         }
5416
5417         /* wait for device to recover */
5418         if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5419                 dev_warn(&h->pdev->dev,
5420                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5421                         psa[0], psa[1], psa[2], psa[3],
5422                         psa[4], psa[5], psa[6], psa[7]);
5423                 return -1;  /* failed to recover */
5424         }
5425
5426         /* device recovered */
5427         dev_info(&h->pdev->dev,
5428                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5429                 psa[0], psa[1], psa[2], psa[3],
5430                 psa[4], psa[5], psa[6], psa[7]);
5431
5432         return rc; /* success */
5433 }
5434
5435 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5436         struct CommandList *abort, int reply_queue)
5437 {
5438         int rc = IO_OK;
5439         struct CommandList *c;
5440         __le32 taglower, tagupper;
5441         struct hpsa_scsi_dev_t *dev;
5442         struct io_accel2_cmd *c2;
5443
5444         dev = abort->scsi_cmd->device->hostdata;
5445         if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5446                 return -1;
5447
5448         c = cmd_alloc(h);
5449         setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5450         c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5451         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5452         hpsa_get_tag(h, abort, &taglower, &tagupper);
5453         dev_dbg(&h->pdev->dev,
5454                 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5455                 __func__, tagupper, taglower);
5456         /* no unmap needed here because no data xfer. */
5457
5458         dev_dbg(&h->pdev->dev,
5459                 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5460                 __func__, tagupper, taglower, c2->error_data.serv_response);
5461         switch (c2->error_data.serv_response) {
5462         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5463         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5464                 rc = 0;
5465                 break;
5466         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5467         case IOACCEL2_SERV_RESPONSE_FAILURE:
5468         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5469                 rc = -1;
5470                 break;
5471         default:
5472                 dev_warn(&h->pdev->dev,
5473                         "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5474                         __func__, tagupper, taglower,
5475                         c2->error_data.serv_response);
5476                 rc = -1;
5477         }
5478         cmd_free(h, c);
5479         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5480                 tagupper, taglower);
5481         return rc;
5482 }
5483
5484 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5485         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5486 {
5487         /*
5488          * ioccelerator mode 2 commands should be aborted via the
5489          * accelerated path, since RAID path is unaware of these commands,
5490          * but not all underlying firmware can handle abort TMF.
5491          * Change abort to physical device reset when abort TMF is unsupported.
5492          */
5493         if (abort->cmd_type == CMD_IOACCEL2) {
5494                 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5495                         return hpsa_send_abort_ioaccel2(h, abort,
5496                                                 reply_queue);
5497                 else
5498                         return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5499                                                         abort, reply_queue);
5500         }
5501         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5502 }
5503
5504 /* Find out which reply queue a command was meant to return on */
5505 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5506                                         struct CommandList *c)
5507 {
5508         if (c->cmd_type == CMD_IOACCEL2)
5509                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5510         return c->Header.ReplyQueue;
5511 }
5512
5513 /*
5514  * Limit concurrency of abort commands to prevent
5515  * over-subscription of commands
5516  */
5517 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5518 {
5519 #define ABORT_CMD_WAIT_MSECS 5000
5520         return !wait_event_timeout(h->abort_cmd_wait_queue,
5521                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5522                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5523 }
5524
5525 /* Send an abort for the specified command.
5526  *      If the device and controller support it,
5527  *              send a task abort request.
5528  */
5529 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5530 {
5531
5532         int rc;
5533         struct ctlr_info *h;
5534         struct hpsa_scsi_dev_t *dev;
5535         struct CommandList *abort; /* pointer to command to be aborted */
5536         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
5537         char msg[256];          /* For debug messaging. */
5538         int ml = 0;
5539         __le32 tagupper, taglower;
5540         int refcount, reply_queue;
5541
5542         if (sc == NULL)
5543                 return FAILED;
5544
5545         if (sc->device == NULL)
5546                 return FAILED;
5547
5548         /* Find the controller of the command to be aborted */
5549         h = sdev_to_hba(sc->device);
5550         if (h == NULL)
5551                 return FAILED;
5552
5553         /* Find the device of the command to be aborted */
5554         dev = sc->device->hostdata;
5555         if (!dev) {
5556                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5557                                 msg);
5558                 return FAILED;
5559         }
5560
5561         /* If controller locked up, we can guarantee command won't complete */
5562         if (lockup_detected(h)) {
5563                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5564                                         "ABORT FAILED, lockup detected");
5565                 return FAILED;
5566         }
5567
5568         /* This is a good time to check if controller lockup has occurred */
5569         if (detect_controller_lockup(h)) {
5570                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5571                                         "ABORT FAILED, new lockup detected");
5572                 return FAILED;
5573         }
5574
5575         /* Check that controller supports some kind of task abort */
5576         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5577                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5578                 return FAILED;
5579
5580         memset(msg, 0, sizeof(msg));
5581         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5582                 h->scsi_host->host_no, sc->device->channel,
5583                 sc->device->id, sc->device->lun,
5584                 "Aborting command", sc);
5585
5586         /* Get SCSI command to be aborted */
5587         abort = (struct CommandList *) sc->host_scribble;
5588         if (abort == NULL) {
5589                 /* This can happen if the command already completed. */
5590                 return SUCCESS;
5591         }
5592         refcount = atomic_inc_return(&abort->refcount);
5593         if (refcount == 1) { /* Command is done already. */
5594                 cmd_free(h, abort);
5595                 return SUCCESS;
5596         }
5597
5598         /* Don't bother trying the abort if we know it won't work. */
5599         if (abort->cmd_type != CMD_IOACCEL2 &&
5600                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5601                 cmd_free(h, abort);
5602                 return FAILED;
5603         }
5604
5605         /*
5606          * Check that we're aborting the right command.
5607          * It's possible the CommandList already completed and got re-used.
5608          */
5609         if (abort->scsi_cmd != sc) {
5610                 cmd_free(h, abort);
5611                 return SUCCESS;
5612         }
5613
5614         abort->abort_pending = true;
5615         hpsa_get_tag(h, abort, &taglower, &tagupper);
5616         reply_queue = hpsa_extract_reply_queue(h, abort);
5617         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5618         as  = abort->scsi_cmd;
5619         if (as != NULL)
5620                 ml += sprintf(msg+ml,
5621                         "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5622                         as->cmd_len, as->cmnd[0], as->cmnd[1],
5623                         as->serial_number);
5624         dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5625         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5626
5627         /*
5628          * Command is in flight, or possibly already completed
5629          * by the firmware (but not to the scsi mid layer) but we can't
5630          * distinguish which.  Send the abort down.
5631          */
5632         if (wait_for_available_abort_cmd(h)) {
5633                 dev_warn(&h->pdev->dev,
5634                         "%s FAILED, timeout waiting for an abort command to become available.\n",
5635                         msg);
5636                 cmd_free(h, abort);
5637                 return FAILED;
5638         }
5639         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5640         atomic_inc(&h->abort_cmds_available);
5641         wake_up_all(&h->abort_cmd_wait_queue);
5642         if (rc != 0) {
5643                 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5644                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5645                                 "FAILED to abort command");
5646                 cmd_free(h, abort);
5647                 return FAILED;
5648         }
5649         dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5650         wait_event(h->event_sync_wait_queue,
5651                    abort->scsi_cmd != sc || lockup_detected(h));
5652         cmd_free(h, abort);
5653         return !lockup_detected(h) ? SUCCESS : FAILED;
5654 }
5655
5656 /*
5657  * For operations with an associated SCSI command, a command block is allocated
5658  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5659  * block request tag as an index into a table of entries.  cmd_tagged_free() is
5660  * the complement, although cmd_free() may be called instead.
5661  */
5662 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5663                                             struct scsi_cmnd *scmd)
5664 {
5665         int idx = hpsa_get_cmd_index(scmd);
5666         struct CommandList *c = h->cmd_pool + idx;
5667
5668         if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5669                 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5670                         idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5671                 /* The index value comes from the block layer, so if it's out of
5672                  * bounds, it's probably not our bug.
5673                  */
5674                 BUG();
5675         }
5676
5677         atomic_inc(&c->refcount);
5678         if (unlikely(!hpsa_is_cmd_idle(c))) {
5679                 /*
5680                  * We expect that the SCSI layer will hand us a unique tag
5681                  * value.  Thus, there should never be a collision here between
5682                  * two requests...because if the selected command isn't idle
5683                  * then someone is going to be very disappointed.
5684                  */
5685                 dev_err(&h->pdev->dev,
5686                         "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5687                         idx);
5688                 if (c->scsi_cmd != NULL)
5689                         scsi_print_command(c->scsi_cmd);
5690                 scsi_print_command(scmd);
5691         }
5692
5693         hpsa_cmd_partial_init(h, idx, c);
5694         return c;
5695 }
5696
5697 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5698 {
5699         /*
5700          * Release our reference to the block.  We don't need to do anything
5701          * else to free it, because it is accessed by index.  (There's no point
5702          * in checking the result of the decrement, since we cannot guarantee
5703          * that there isn't a concurrent abort which is also accessing it.)
5704          */
5705         (void)atomic_dec(&c->refcount);
5706 }
5707
5708 /*
5709  * For operations that cannot sleep, a command block is allocated at init,
5710  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5711  * which ones are free or in use.  Lock must be held when calling this.
5712  * cmd_free() is the complement.
5713  * This function never gives up and returns NULL.  If it hangs,
5714  * another thread must call cmd_free() to free some tags.
5715  */
5716
5717 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5718 {
5719         struct CommandList *c;
5720         int refcount, i;
5721         int offset = 0;
5722
5723         /*
5724          * There is some *extremely* small but non-zero chance that that
5725          * multiple threads could get in here, and one thread could
5726          * be scanning through the list of bits looking for a free
5727          * one, but the free ones are always behind him, and other
5728          * threads sneak in behind him and eat them before he can
5729          * get to them, so that while there is always a free one, a
5730          * very unlucky thread might be starved anyway, never able to
5731          * beat the other threads.  In reality, this happens so
5732          * infrequently as to be indistinguishable from never.
5733          *
5734          * Note that we start allocating commands before the SCSI host structure
5735          * is initialized.  Since the search starts at bit zero, this
5736          * all works, since we have at least one command structure available;
5737          * however, it means that the structures with the low indexes have to be
5738          * reserved for driver-initiated requests, while requests from the block
5739          * layer will use the higher indexes.
5740          */
5741
5742         for (;;) {
5743                 i = find_next_zero_bit(h->cmd_pool_bits,
5744                                         HPSA_NRESERVED_CMDS,
5745                                         offset);
5746                 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5747                         offset = 0;
5748                         continue;
5749                 }
5750                 c = h->cmd_pool + i;
5751                 refcount = atomic_inc_return(&c->refcount);
5752                 if (unlikely(refcount > 1)) {
5753                         cmd_free(h, c); /* already in use */
5754                         offset = (i + 1) % HPSA_NRESERVED_CMDS;
5755                         continue;
5756                 }
5757                 set_bit(i & (BITS_PER_LONG - 1),
5758                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5759                 break; /* it's ours now. */
5760         }
5761         hpsa_cmd_partial_init(h, i, c);
5762         return c;
5763 }
5764
5765 /*
5766  * This is the complementary operation to cmd_alloc().  Note, however, in some
5767  * corner cases it may also be used to free blocks allocated by
5768  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
5769  * the clear-bit is harmless.
5770  */
5771 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5772 {
5773         if (atomic_dec_and_test(&c->refcount)) {
5774                 int i;
5775
5776                 i = c - h->cmd_pool;
5777                 clear_bit(i & (BITS_PER_LONG - 1),
5778                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5779         }
5780 }
5781
5782 #ifdef CONFIG_COMPAT
5783
5784 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5785         void __user *arg)
5786 {
5787         IOCTL32_Command_struct __user *arg32 =
5788             (IOCTL32_Command_struct __user *) arg;
5789         IOCTL_Command_struct arg64;
5790         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5791         int err;
5792         u32 cp;
5793
5794         memset(&arg64, 0, sizeof(arg64));
5795         err = 0;
5796         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5797                            sizeof(arg64.LUN_info));
5798         err |= copy_from_user(&arg64.Request, &arg32->Request,
5799                            sizeof(arg64.Request));
5800         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5801                            sizeof(arg64.error_info));
5802         err |= get_user(arg64.buf_size, &arg32->buf_size);
5803         err |= get_user(cp, &arg32->buf);
5804         arg64.buf = compat_ptr(cp);
5805         err |= copy_to_user(p, &arg64, sizeof(arg64));
5806
5807         if (err)
5808                 return -EFAULT;
5809
5810         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5811         if (err)
5812                 return err;
5813         err |= copy_in_user(&arg32->error_info, &p->error_info,
5814                          sizeof(arg32->error_info));
5815         if (err)
5816                 return -EFAULT;
5817         return err;
5818 }
5819
5820 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5821         int cmd, void __user *arg)
5822 {
5823         BIG_IOCTL32_Command_struct __user *arg32 =
5824             (BIG_IOCTL32_Command_struct __user *) arg;
5825         BIG_IOCTL_Command_struct arg64;
5826         BIG_IOCTL_Command_struct __user *p =
5827             compat_alloc_user_space(sizeof(arg64));
5828         int err;
5829         u32 cp;
5830
5831         memset(&arg64, 0, sizeof(arg64));
5832         err = 0;
5833         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5834                            sizeof(arg64.LUN_info));
5835         err |= copy_from_user(&arg64.Request, &arg32->Request,
5836                            sizeof(arg64.Request));
5837         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5838                            sizeof(arg64.error_info));
5839         err |= get_user(arg64.buf_size, &arg32->buf_size);
5840         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5841         err |= get_user(cp, &arg32->buf);
5842         arg64.buf = compat_ptr(cp);
5843         err |= copy_to_user(p, &arg64, sizeof(arg64));
5844
5845         if (err)
5846                 return -EFAULT;
5847
5848         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5849         if (err)
5850                 return err;
5851         err |= copy_in_user(&arg32->error_info, &p->error_info,
5852                          sizeof(arg32->error_info));
5853         if (err)
5854                 return -EFAULT;
5855         return err;
5856 }
5857
5858 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5859 {
5860         switch (cmd) {
5861         case CCISS_GETPCIINFO:
5862         case CCISS_GETINTINFO:
5863         case CCISS_SETINTINFO:
5864         case CCISS_GETNODENAME:
5865         case CCISS_SETNODENAME:
5866         case CCISS_GETHEARTBEAT:
5867         case CCISS_GETBUSTYPES:
5868         case CCISS_GETFIRMVER:
5869         case CCISS_GETDRIVVER:
5870         case CCISS_REVALIDVOLS:
5871         case CCISS_DEREGDISK:
5872         case CCISS_REGNEWDISK:
5873         case CCISS_REGNEWD:
5874         case CCISS_RESCANDISK:
5875         case CCISS_GETLUNINFO:
5876                 return hpsa_ioctl(dev, cmd, arg);
5877
5878         case CCISS_PASSTHRU32:
5879                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5880         case CCISS_BIG_PASSTHRU32:
5881                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5882
5883         default:
5884                 return -ENOIOCTLCMD;
5885         }
5886 }
5887 #endif
5888
5889 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5890 {
5891         struct hpsa_pci_info pciinfo;
5892
5893         if (!argp)
5894                 return -EINVAL;
5895         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5896         pciinfo.bus = h->pdev->bus->number;
5897         pciinfo.dev_fn = h->pdev->devfn;
5898         pciinfo.board_id = h->board_id;
5899         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5900                 return -EFAULT;
5901         return 0;
5902 }
5903
5904 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5905 {
5906         DriverVer_type DriverVer;
5907         unsigned char vmaj, vmin, vsubmin;
5908         int rc;
5909
5910         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5911                 &vmaj, &vmin, &vsubmin);
5912         if (rc != 3) {
5913                 dev_info(&h->pdev->dev, "driver version string '%s' "
5914                         "unrecognized.", HPSA_DRIVER_VERSION);
5915                 vmaj = 0;
5916                 vmin = 0;
5917                 vsubmin = 0;
5918         }
5919         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5920         if (!argp)
5921                 return -EINVAL;
5922         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5923                 return -EFAULT;
5924         return 0;
5925 }
5926
5927 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5928 {
5929         IOCTL_Command_struct iocommand;
5930         struct CommandList *c;
5931         char *buff = NULL;
5932         u64 temp64;
5933         int rc = 0;
5934
5935         if (!argp)
5936                 return -EINVAL;
5937         if (!capable(CAP_SYS_RAWIO))
5938                 return -EPERM;
5939         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5940                 return -EFAULT;
5941         if ((iocommand.buf_size < 1) &&
5942             (iocommand.Request.Type.Direction != XFER_NONE)) {
5943                 return -EINVAL;
5944         }
5945         if (iocommand.buf_size > 0) {
5946                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5947                 if (buff == NULL)
5948                         return -ENOMEM;
5949                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5950                         /* Copy the data into the buffer we created */
5951                         if (copy_from_user(buff, iocommand.buf,
5952                                 iocommand.buf_size)) {
5953                                 rc = -EFAULT;
5954                                 goto out_kfree;
5955                         }
5956                 } else {
5957                         memset(buff, 0, iocommand.buf_size);
5958                 }
5959         }
5960         c = cmd_alloc(h);
5961
5962         /* Fill in the command type */
5963         c->cmd_type = CMD_IOCTL_PEND;
5964         c->scsi_cmd = SCSI_CMD_BUSY;
5965         /* Fill in Command Header */
5966         c->Header.ReplyQueue = 0; /* unused in simple mode */
5967         if (iocommand.buf_size > 0) {   /* buffer to fill */
5968                 c->Header.SGList = 1;
5969                 c->Header.SGTotal = cpu_to_le16(1);
5970         } else  { /* no buffers to fill */
5971                 c->Header.SGList = 0;
5972                 c->Header.SGTotal = cpu_to_le16(0);
5973         }
5974         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5975
5976         /* Fill in Request block */
5977         memcpy(&c->Request, &iocommand.Request,
5978                 sizeof(c->Request));
5979
5980         /* Fill in the scatter gather information */
5981         if (iocommand.buf_size > 0) {
5982                 temp64 = pci_map_single(h->pdev, buff,
5983                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5984                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5985                         c->SG[0].Addr = cpu_to_le64(0);
5986                         c->SG[0].Len = cpu_to_le32(0);
5987                         rc = -ENOMEM;
5988                         goto out;
5989                 }
5990                 c->SG[0].Addr = cpu_to_le64(temp64);
5991                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5992                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5993         }
5994         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5995         if (iocommand.buf_size > 0)
5996                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5997         check_ioctl_unit_attention(h, c);
5998         if (rc) {
5999                 rc = -EIO;
6000                 goto out;
6001         }
6002
6003         /* Copy the error information out */
6004         memcpy(&iocommand.error_info, c->err_info,
6005                 sizeof(iocommand.error_info));
6006         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6007                 rc = -EFAULT;
6008                 goto out;
6009         }
6010         if ((iocommand.Request.Type.Direction & XFER_READ) &&
6011                 iocommand.buf_size > 0) {
6012                 /* Copy the data out of the buffer we created */
6013                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6014                         rc = -EFAULT;
6015                         goto out;
6016                 }
6017         }
6018 out:
6019         cmd_free(h, c);
6020 out_kfree:
6021         kfree(buff);
6022         return rc;
6023 }
6024
6025 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6026 {
6027         BIG_IOCTL_Command_struct *ioc;
6028         struct CommandList *c;
6029         unsigned char **buff = NULL;
6030         int *buff_size = NULL;
6031         u64 temp64;
6032         BYTE sg_used = 0;
6033         int status = 0;
6034         u32 left;
6035         u32 sz;
6036         BYTE __user *data_ptr;
6037
6038         if (!argp)
6039                 return -EINVAL;
6040         if (!capable(CAP_SYS_RAWIO))
6041                 return -EPERM;
6042         ioc = (BIG_IOCTL_Command_struct *)
6043             kmalloc(sizeof(*ioc), GFP_KERNEL);
6044         if (!ioc) {
6045                 status = -ENOMEM;
6046                 goto cleanup1;
6047         }
6048         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6049                 status = -EFAULT;
6050                 goto cleanup1;
6051         }
6052         if ((ioc->buf_size < 1) &&
6053             (ioc->Request.Type.Direction != XFER_NONE)) {
6054                 status = -EINVAL;
6055                 goto cleanup1;
6056         }
6057         /* Check kmalloc limits  using all SGs */
6058         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6059                 status = -EINVAL;
6060                 goto cleanup1;
6061         }
6062         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6063                 status = -EINVAL;
6064                 goto cleanup1;
6065         }
6066         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6067         if (!buff) {
6068                 status = -ENOMEM;
6069                 goto cleanup1;
6070         }
6071         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6072         if (!buff_size) {
6073                 status = -ENOMEM;
6074                 goto cleanup1;
6075         }
6076         left = ioc->buf_size;
6077         data_ptr = ioc->buf;
6078         while (left) {
6079                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6080                 buff_size[sg_used] = sz;
6081                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6082                 if (buff[sg_used] == NULL) {
6083                         status = -ENOMEM;
6084                         goto cleanup1;
6085                 }
6086                 if (ioc->Request.Type.Direction & XFER_WRITE) {
6087                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6088                                 status = -EFAULT;
6089                                 goto cleanup1;
6090                         }
6091                 } else
6092                         memset(buff[sg_used], 0, sz);
6093                 left -= sz;
6094                 data_ptr += sz;
6095                 sg_used++;
6096         }
6097         c = cmd_alloc(h);
6098
6099         c->cmd_type = CMD_IOCTL_PEND;
6100         c->scsi_cmd = SCSI_CMD_BUSY;
6101         c->Header.ReplyQueue = 0;
6102         c->Header.SGList = (u8) sg_used;
6103         c->Header.SGTotal = cpu_to_le16(sg_used);
6104         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6105         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6106         if (ioc->buf_size > 0) {
6107                 int i;
6108                 for (i = 0; i < sg_used; i++) {
6109                         temp64 = pci_map_single(h->pdev, buff[i],
6110                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
6111                         if (dma_mapping_error(&h->pdev->dev,
6112                                                         (dma_addr_t) temp64)) {
6113                                 c->SG[i].Addr = cpu_to_le64(0);
6114                                 c->SG[i].Len = cpu_to_le32(0);
6115                                 hpsa_pci_unmap(h->pdev, c, i,
6116                                         PCI_DMA_BIDIRECTIONAL);
6117                                 status = -ENOMEM;
6118                                 goto cleanup0;
6119                         }
6120                         c->SG[i].Addr = cpu_to_le64(temp64);
6121                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
6122                         c->SG[i].Ext = cpu_to_le32(0);
6123                 }
6124                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6125         }
6126         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6127         if (sg_used)
6128                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6129         check_ioctl_unit_attention(h, c);
6130         if (status) {
6131                 status = -EIO;
6132                 goto cleanup0;
6133         }
6134
6135         /* Copy the error information out */
6136         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6137         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6138                 status = -EFAULT;
6139                 goto cleanup0;
6140         }
6141         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6142                 int i;
6143
6144                 /* Copy the data out of the buffer we created */
6145                 BYTE __user *ptr = ioc->buf;
6146                 for (i = 0; i < sg_used; i++) {
6147                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
6148                                 status = -EFAULT;
6149                                 goto cleanup0;
6150                         }
6151                         ptr += buff_size[i];
6152                 }
6153         }
6154         status = 0;
6155 cleanup0:
6156         cmd_free(h, c);
6157 cleanup1:
6158         if (buff) {
6159                 int i;
6160
6161                 for (i = 0; i < sg_used; i++)
6162                         kfree(buff[i]);
6163                 kfree(buff);
6164         }
6165         kfree(buff_size);
6166         kfree(ioc);
6167         return status;
6168 }
6169
6170 static void check_ioctl_unit_attention(struct ctlr_info *h,
6171         struct CommandList *c)
6172 {
6173         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6174                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6175                 (void) check_for_unit_attention(h, c);
6176 }
6177
6178 /*
6179  * ioctl
6180  */
6181 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6182 {
6183         struct ctlr_info *h;
6184         void __user *argp = (void __user *)arg;
6185         int rc;
6186
6187         h = sdev_to_hba(dev);
6188
6189         switch (cmd) {
6190         case CCISS_DEREGDISK:
6191         case CCISS_REGNEWDISK:
6192         case CCISS_REGNEWD:
6193                 hpsa_scan_start(h->scsi_host);
6194                 return 0;
6195         case CCISS_GETPCIINFO:
6196                 return hpsa_getpciinfo_ioctl(h, argp);
6197         case CCISS_GETDRIVVER:
6198                 return hpsa_getdrivver_ioctl(h, argp);
6199         case CCISS_PASSTHRU:
6200                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6201                         return -EAGAIN;
6202                 rc = hpsa_passthru_ioctl(h, argp);
6203                 atomic_inc(&h->passthru_cmds_avail);
6204                 return rc;
6205         case CCISS_BIG_PASSTHRU:
6206                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6207                         return -EAGAIN;
6208                 rc = hpsa_big_passthru_ioctl(h, argp);
6209                 atomic_inc(&h->passthru_cmds_avail);
6210                 return rc;
6211         default:
6212                 return -ENOTTY;
6213         }
6214 }
6215
6216 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6217                                 u8 reset_type)
6218 {
6219         struct CommandList *c;
6220
6221         c = cmd_alloc(h);
6222
6223         /* fill_cmd can't fail here, no data buffer to map */
6224         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6225                 RAID_CTLR_LUNID, TYPE_MSG);
6226         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6227         c->waiting = NULL;
6228         enqueue_cmd_and_start_io(h, c);
6229         /* Don't wait for completion, the reset won't complete.  Don't free
6230          * the command either.  This is the last command we will send before
6231          * re-initializing everything, so it doesn't matter and won't leak.
6232          */
6233         return;
6234 }
6235
6236 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6237         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6238         int cmd_type)
6239 {
6240         int pci_dir = XFER_NONE;
6241         u64 tag; /* for commands to be aborted */
6242
6243         c->cmd_type = CMD_IOCTL_PEND;
6244         c->scsi_cmd = SCSI_CMD_BUSY;
6245         c->Header.ReplyQueue = 0;
6246         if (buff != NULL && size > 0) {
6247                 c->Header.SGList = 1;
6248                 c->Header.SGTotal = cpu_to_le16(1);
6249         } else {
6250                 c->Header.SGList = 0;
6251                 c->Header.SGTotal = cpu_to_le16(0);
6252         }
6253         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6254
6255         if (cmd_type == TYPE_CMD) {
6256                 switch (cmd) {
6257                 case HPSA_INQUIRY:
6258                         /* are we trying to read a vital product page */
6259                         if (page_code & VPD_PAGE) {
6260                                 c->Request.CDB[1] = 0x01;
6261                                 c->Request.CDB[2] = (page_code & 0xff);
6262                         }
6263                         c->Request.CDBLen = 6;
6264                         c->Request.type_attr_dir =
6265                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6266                         c->Request.Timeout = 0;
6267                         c->Request.CDB[0] = HPSA_INQUIRY;
6268                         c->Request.CDB[4] = size & 0xFF;
6269                         break;
6270                 case HPSA_REPORT_LOG:
6271                 case HPSA_REPORT_PHYS:
6272                         /* Talking to controller so It's a physical command
6273                            mode = 00 target = 0.  Nothing to write.
6274                          */
6275                         c->Request.CDBLen = 12;
6276                         c->Request.type_attr_dir =
6277                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6278                         c->Request.Timeout = 0;
6279                         c->Request.CDB[0] = cmd;
6280                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6281                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6282                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6283                         c->Request.CDB[9] = size & 0xFF;
6284                         break;
6285                 case HPSA_CACHE_FLUSH:
6286                         c->Request.CDBLen = 12;
6287                         c->Request.type_attr_dir =
6288                                         TYPE_ATTR_DIR(cmd_type,
6289                                                 ATTR_SIMPLE, XFER_WRITE);
6290                         c->Request.Timeout = 0;
6291                         c->Request.CDB[0] = BMIC_WRITE;
6292                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6293                         c->Request.CDB[7] = (size >> 8) & 0xFF;
6294                         c->Request.CDB[8] = size & 0xFF;
6295                         break;
6296                 case TEST_UNIT_READY:
6297                         c->Request.CDBLen = 6;
6298                         c->Request.type_attr_dir =
6299                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6300                         c->Request.Timeout = 0;
6301                         break;
6302                 case HPSA_GET_RAID_MAP:
6303                         c->Request.CDBLen = 12;
6304                         c->Request.type_attr_dir =
6305                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6306                         c->Request.Timeout = 0;
6307                         c->Request.CDB[0] = HPSA_CISS_READ;
6308                         c->Request.CDB[1] = cmd;
6309                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6310                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6311                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6312                         c->Request.CDB[9] = size & 0xFF;
6313                         break;
6314                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6315                         c->Request.CDBLen = 10;
6316                         c->Request.type_attr_dir =
6317                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6318                         c->Request.Timeout = 0;
6319                         c->Request.CDB[0] = BMIC_READ;
6320                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6321                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6322                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6323                         break;
6324                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6325                         c->Request.CDBLen = 10;
6326                         c->Request.type_attr_dir =
6327                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6328                         c->Request.Timeout = 0;
6329                         c->Request.CDB[0] = BMIC_READ;
6330                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6331                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6332                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6333                         break;
6334                 default:
6335                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6336                         BUG();
6337                         return -1;
6338                 }
6339         } else if (cmd_type == TYPE_MSG) {
6340                 switch (cmd) {
6341
6342                 case  HPSA_DEVICE_RESET_MSG:
6343                         c->Request.CDBLen = 16;
6344                         c->Request.type_attr_dir =
6345                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6346                         c->Request.Timeout = 0; /* Don't time out */
6347                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6348                         c->Request.CDB[0] =  cmd;
6349                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6350                         /* If bytes 4-7 are zero, it means reset the */
6351                         /* LunID device */
6352                         c->Request.CDB[4] = 0x00;
6353                         c->Request.CDB[5] = 0x00;
6354                         c->Request.CDB[6] = 0x00;
6355                         c->Request.CDB[7] = 0x00;
6356                         break;
6357                 case  HPSA_ABORT_MSG:
6358                         memcpy(&tag, buff, sizeof(tag));
6359                         dev_dbg(&h->pdev->dev,
6360                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6361                                 tag, c->Header.tag);
6362                         c->Request.CDBLen = 16;
6363                         c->Request.type_attr_dir =
6364                                         TYPE_ATTR_DIR(cmd_type,
6365                                                 ATTR_SIMPLE, XFER_WRITE);
6366                         c->Request.Timeout = 0; /* Don't time out */
6367                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6368                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6369                         c->Request.CDB[2] = 0x00; /* reserved */
6370                         c->Request.CDB[3] = 0x00; /* reserved */
6371                         /* Tag to abort goes in CDB[4]-CDB[11] */
6372                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6373                         c->Request.CDB[12] = 0x00; /* reserved */
6374                         c->Request.CDB[13] = 0x00; /* reserved */
6375                         c->Request.CDB[14] = 0x00; /* reserved */
6376                         c->Request.CDB[15] = 0x00; /* reserved */
6377                 break;
6378                 default:
6379                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6380                                 cmd);
6381                         BUG();
6382                 }
6383         } else {
6384                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6385                 BUG();
6386         }
6387
6388         switch (GET_DIR(c->Request.type_attr_dir)) {
6389         case XFER_READ:
6390                 pci_dir = PCI_DMA_FROMDEVICE;
6391                 break;
6392         case XFER_WRITE:
6393                 pci_dir = PCI_DMA_TODEVICE;
6394                 break;
6395         case XFER_NONE:
6396                 pci_dir = PCI_DMA_NONE;
6397                 break;
6398         default:
6399                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6400         }
6401         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6402                 return -1;
6403         return 0;
6404 }
6405
6406 /*
6407  * Map (physical) PCI mem into (virtual) kernel space
6408  */
6409 static void __iomem *remap_pci_mem(ulong base, ulong size)
6410 {
6411         ulong page_base = ((ulong) base) & PAGE_MASK;
6412         ulong page_offs = ((ulong) base) - page_base;
6413         void __iomem *page_remapped = ioremap_nocache(page_base,
6414                 page_offs + size);
6415
6416         return page_remapped ? (page_remapped + page_offs) : NULL;
6417 }
6418
6419 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6420 {
6421         return h->access.command_completed(h, q);
6422 }
6423
6424 static inline bool interrupt_pending(struct ctlr_info *h)
6425 {
6426         return h->access.intr_pending(h);
6427 }
6428
6429 static inline long interrupt_not_for_us(struct ctlr_info *h)
6430 {
6431         return (h->access.intr_pending(h) == 0) ||
6432                 (h->interrupts_enabled == 0);
6433 }
6434
6435 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6436         u32 raw_tag)
6437 {
6438         if (unlikely(tag_index >= h->nr_cmds)) {
6439                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6440                 return 1;
6441         }
6442         return 0;
6443 }
6444
6445 static inline void finish_cmd(struct CommandList *c)
6446 {
6447         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6448         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6449                         || c->cmd_type == CMD_IOACCEL2))
6450                 complete_scsi_command(c);
6451         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6452                 complete(c->waiting);
6453 }
6454
6455 /* process completion of an indexed ("direct lookup") command */
6456 static inline void process_indexed_cmd(struct ctlr_info *h,
6457         u32 raw_tag)
6458 {
6459         u32 tag_index;
6460         struct CommandList *c;
6461
6462         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6463         if (!bad_tag(h, tag_index, raw_tag)) {
6464                 c = h->cmd_pool + tag_index;
6465                 finish_cmd(c);
6466         }
6467 }
6468
6469 /* Some controllers, like p400, will give us one interrupt
6470  * after a soft reset, even if we turned interrupts off.
6471  * Only need to check for this in the hpsa_xxx_discard_completions
6472  * functions.
6473  */
6474 static int ignore_bogus_interrupt(struct ctlr_info *h)
6475 {
6476         if (likely(!reset_devices))
6477                 return 0;
6478
6479         if (likely(h->interrupts_enabled))
6480                 return 0;
6481
6482         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6483                 "(known firmware bug.)  Ignoring.\n");
6484
6485         return 1;
6486 }
6487
6488 /*
6489  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6490  * Relies on (h-q[x] == x) being true for x such that
6491  * 0 <= x < MAX_REPLY_QUEUES.
6492  */
6493 static struct ctlr_info *queue_to_hba(u8 *queue)
6494 {
6495         return container_of((queue - *queue), struct ctlr_info, q[0]);
6496 }
6497
6498 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6499 {
6500         struct ctlr_info *h = queue_to_hba(queue);
6501         u8 q = *(u8 *) queue;
6502         u32 raw_tag;
6503
6504         if (ignore_bogus_interrupt(h))
6505                 return IRQ_NONE;
6506
6507         if (interrupt_not_for_us(h))
6508                 return IRQ_NONE;
6509         h->last_intr_timestamp = get_jiffies_64();
6510         while (interrupt_pending(h)) {
6511                 raw_tag = get_next_completion(h, q);
6512                 while (raw_tag != FIFO_EMPTY)
6513                         raw_tag = next_command(h, q);
6514         }
6515         return IRQ_HANDLED;
6516 }
6517
6518 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6519 {
6520         struct ctlr_info *h = queue_to_hba(queue);
6521         u32 raw_tag;
6522         u8 q = *(u8 *) queue;
6523
6524         if (ignore_bogus_interrupt(h))
6525                 return IRQ_NONE;
6526
6527         h->last_intr_timestamp = get_jiffies_64();
6528         raw_tag = get_next_completion(h, q);
6529         while (raw_tag != FIFO_EMPTY)
6530                 raw_tag = next_command(h, q);
6531         return IRQ_HANDLED;
6532 }
6533
6534 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6535 {
6536         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6537         u32 raw_tag;
6538         u8 q = *(u8 *) queue;
6539
6540         if (interrupt_not_for_us(h))
6541                 return IRQ_NONE;
6542         h->last_intr_timestamp = get_jiffies_64();
6543         while (interrupt_pending(h)) {
6544                 raw_tag = get_next_completion(h, q);
6545                 while (raw_tag != FIFO_EMPTY) {
6546                         process_indexed_cmd(h, raw_tag);
6547                         raw_tag = next_command(h, q);
6548                 }
6549         }
6550         return IRQ_HANDLED;
6551 }
6552
6553 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6554 {
6555         struct ctlr_info *h = queue_to_hba(queue);
6556         u32 raw_tag;
6557         u8 q = *(u8 *) queue;
6558
6559         h->last_intr_timestamp = get_jiffies_64();
6560         raw_tag = get_next_completion(h, q);
6561         while (raw_tag != FIFO_EMPTY) {
6562                 process_indexed_cmd(h, raw_tag);
6563                 raw_tag = next_command(h, q);
6564         }
6565         return IRQ_HANDLED;
6566 }
6567
6568 /* Send a message CDB to the firmware. Careful, this only works
6569  * in simple mode, not performant mode due to the tag lookup.
6570  * We only ever use this immediately after a controller reset.
6571  */
6572 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6573                         unsigned char type)
6574 {
6575         struct Command {
6576                 struct CommandListHeader CommandHeader;
6577                 struct RequestBlock Request;
6578                 struct ErrDescriptor ErrorDescriptor;
6579         };
6580         struct Command *cmd;
6581         static const size_t cmd_sz = sizeof(*cmd) +
6582                                         sizeof(cmd->ErrorDescriptor);
6583         dma_addr_t paddr64;
6584         __le32 paddr32;
6585         u32 tag;
6586         void __iomem *vaddr;
6587         int i, err;
6588
6589         vaddr = pci_ioremap_bar(pdev, 0);
6590         if (vaddr == NULL)
6591                 return -ENOMEM;
6592
6593         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6594          * CCISS commands, so they must be allocated from the lower 4GiB of
6595          * memory.
6596          */
6597         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6598         if (err) {
6599                 iounmap(vaddr);
6600                 return err;
6601         }
6602
6603         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6604         if (cmd == NULL) {
6605                 iounmap(vaddr);
6606                 return -ENOMEM;
6607         }
6608
6609         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6610          * although there's no guarantee, we assume that the address is at
6611          * least 4-byte aligned (most likely, it's page-aligned).
6612          */
6613         paddr32 = cpu_to_le32(paddr64);
6614
6615         cmd->CommandHeader.ReplyQueue = 0;
6616         cmd->CommandHeader.SGList = 0;
6617         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6618         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6619         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6620
6621         cmd->Request.CDBLen = 16;
6622         cmd->Request.type_attr_dir =
6623                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6624         cmd->Request.Timeout = 0; /* Don't time out */
6625         cmd->Request.CDB[0] = opcode;
6626         cmd->Request.CDB[1] = type;
6627         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6628         cmd->ErrorDescriptor.Addr =
6629                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6630         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6631
6632         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6633
6634         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6635                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6636                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6637                         break;
6638                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6639         }
6640
6641         iounmap(vaddr);
6642
6643         /* we leak the DMA buffer here ... no choice since the controller could
6644          *  still complete the command.
6645          */
6646         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6647                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6648                         opcode, type);
6649                 return -ETIMEDOUT;
6650         }
6651
6652         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6653
6654         if (tag & HPSA_ERROR_BIT) {
6655                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6656                         opcode, type);
6657                 return -EIO;
6658         }
6659
6660         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6661                 opcode, type);
6662         return 0;
6663 }
6664
6665 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6666
6667 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6668         void __iomem *vaddr, u32 use_doorbell)
6669 {
6670
6671         if (use_doorbell) {
6672                 /* For everything after the P600, the PCI power state method
6673                  * of resetting the controller doesn't work, so we have this
6674                  * other way using the doorbell register.
6675                  */
6676                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6677                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6678
6679                 /* PMC hardware guys tell us we need a 10 second delay after
6680                  * doorbell reset and before any attempt to talk to the board
6681                  * at all to ensure that this actually works and doesn't fall
6682                  * over in some weird corner cases.
6683                  */
6684                 msleep(10000);
6685         } else { /* Try to do it the PCI power state way */
6686
6687                 /* Quoting from the Open CISS Specification: "The Power
6688                  * Management Control/Status Register (CSR) controls the power
6689                  * state of the device.  The normal operating state is D0,
6690                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6691                  * the controller, place the interface device in D3 then to D0,
6692                  * this causes a secondary PCI reset which will reset the
6693                  * controller." */
6694
6695                 int rc = 0;
6696
6697                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6698
6699                 /* enter the D3hot power management state */
6700                 rc = pci_set_power_state(pdev, PCI_D3hot);
6701                 if (rc)
6702                         return rc;
6703
6704                 msleep(500);
6705
6706                 /* enter the D0 power management state */
6707                 rc = pci_set_power_state(pdev, PCI_D0);
6708                 if (rc)
6709                         return rc;
6710
6711                 /*
6712                  * The P600 requires a small delay when changing states.
6713                  * Otherwise we may think the board did not reset and we bail.
6714                  * This for kdump only and is particular to the P600.
6715                  */
6716                 msleep(500);
6717         }
6718         return 0;
6719 }
6720
6721 static void init_driver_version(char *driver_version, int len)
6722 {
6723         memset(driver_version, 0, len);
6724         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6725 }
6726
6727 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6728 {
6729         char *driver_version;
6730         int i, size = sizeof(cfgtable->driver_version);
6731
6732         driver_version = kmalloc(size, GFP_KERNEL);
6733         if (!driver_version)
6734                 return -ENOMEM;
6735
6736         init_driver_version(driver_version, size);
6737         for (i = 0; i < size; i++)
6738                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6739         kfree(driver_version);
6740         return 0;
6741 }
6742
6743 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6744                                           unsigned char *driver_ver)
6745 {
6746         int i;
6747
6748         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6749                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6750 }
6751
6752 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6753 {
6754
6755         char *driver_ver, *old_driver_ver;
6756         int rc, size = sizeof(cfgtable->driver_version);
6757
6758         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6759         if (!old_driver_ver)
6760                 return -ENOMEM;
6761         driver_ver = old_driver_ver + size;
6762
6763         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6764          * should have been changed, otherwise we know the reset failed.
6765          */
6766         init_driver_version(old_driver_ver, size);
6767         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6768         rc = !memcmp(driver_ver, old_driver_ver, size);
6769         kfree(old_driver_ver);
6770         return rc;
6771 }
6772 /* This does a hard reset of the controller using PCI power management
6773  * states or the using the doorbell register.
6774  */
6775 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6776 {
6777         u64 cfg_offset;
6778         u32 cfg_base_addr;
6779         u64 cfg_base_addr_index;
6780         void __iomem *vaddr;
6781         unsigned long paddr;
6782         u32 misc_fw_support;
6783         int rc;
6784         struct CfgTable __iomem *cfgtable;
6785         u32 use_doorbell;
6786         u16 command_register;
6787
6788         /* For controllers as old as the P600, this is very nearly
6789          * the same thing as
6790          *
6791          * pci_save_state(pci_dev);
6792          * pci_set_power_state(pci_dev, PCI_D3hot);
6793          * pci_set_power_state(pci_dev, PCI_D0);
6794          * pci_restore_state(pci_dev);
6795          *
6796          * For controllers newer than the P600, the pci power state
6797          * method of resetting doesn't work so we have another way
6798          * using the doorbell register.
6799          */
6800
6801         if (!ctlr_is_resettable(board_id)) {
6802                 dev_warn(&pdev->dev, "Controller not resettable\n");
6803                 return -ENODEV;
6804         }
6805
6806         /* if controller is soft- but not hard resettable... */
6807         if (!ctlr_is_hard_resettable(board_id))
6808                 return -ENOTSUPP; /* try soft reset later. */
6809
6810         /* Save the PCI command register */
6811         pci_read_config_word(pdev, 4, &command_register);
6812         pci_save_state(pdev);
6813
6814         /* find the first memory BAR, so we can find the cfg table */
6815         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6816         if (rc)
6817                 return rc;
6818         vaddr = remap_pci_mem(paddr, 0x250);
6819         if (!vaddr)
6820                 return -ENOMEM;
6821
6822         /* find cfgtable in order to check if reset via doorbell is supported */
6823         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6824                                         &cfg_base_addr_index, &cfg_offset);
6825         if (rc)
6826                 goto unmap_vaddr;
6827         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6828                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6829         if (!cfgtable) {
6830                 rc = -ENOMEM;
6831                 goto unmap_vaddr;
6832         }
6833         rc = write_driver_ver_to_cfgtable(cfgtable);
6834         if (rc)
6835                 goto unmap_cfgtable;
6836
6837         /* If reset via doorbell register is supported, use that.
6838          * There are two such methods.  Favor the newest method.
6839          */
6840         misc_fw_support = readl(&cfgtable->misc_fw_support);
6841         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6842         if (use_doorbell) {
6843                 use_doorbell = DOORBELL_CTLR_RESET2;
6844         } else {
6845                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6846                 if (use_doorbell) {
6847                         dev_warn(&pdev->dev,
6848                                 "Soft reset not supported. Firmware update is required.\n");
6849                         rc = -ENOTSUPP; /* try soft reset */
6850                         goto unmap_cfgtable;
6851                 }
6852         }
6853
6854         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6855         if (rc)
6856                 goto unmap_cfgtable;
6857
6858         pci_restore_state(pdev);
6859         pci_write_config_word(pdev, 4, command_register);
6860
6861         /* Some devices (notably the HP Smart Array 5i Controller)
6862            need a little pause here */
6863         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6864
6865         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6866         if (rc) {
6867                 dev_warn(&pdev->dev,
6868                         "Failed waiting for board to become ready after hard reset\n");
6869                 goto unmap_cfgtable;
6870         }
6871
6872         rc = controller_reset_failed(vaddr);
6873         if (rc < 0)
6874                 goto unmap_cfgtable;
6875         if (rc) {
6876                 dev_warn(&pdev->dev, "Unable to successfully reset "
6877                         "controller. Will try soft reset.\n");
6878                 rc = -ENOTSUPP;
6879         } else {
6880                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6881         }
6882
6883 unmap_cfgtable:
6884         iounmap(cfgtable);
6885
6886 unmap_vaddr:
6887         iounmap(vaddr);
6888         return rc;
6889 }
6890
6891 /*
6892  *  We cannot read the structure directly, for portability we must use
6893  *   the io functions.
6894  *   This is for debug only.
6895  */
6896 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6897 {
6898 #ifdef HPSA_DEBUG
6899         int i;
6900         char temp_name[17];
6901
6902         dev_info(dev, "Controller Configuration information\n");
6903         dev_info(dev, "------------------------------------\n");
6904         for (i = 0; i < 4; i++)
6905                 temp_name[i] = readb(&(tb->Signature[i]));
6906         temp_name[4] = '\0';
6907         dev_info(dev, "   Signature = %s\n", temp_name);
6908         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6909         dev_info(dev, "   Transport methods supported = 0x%x\n",
6910                readl(&(tb->TransportSupport)));
6911         dev_info(dev, "   Transport methods active = 0x%x\n",
6912                readl(&(tb->TransportActive)));
6913         dev_info(dev, "   Requested transport Method = 0x%x\n",
6914                readl(&(tb->HostWrite.TransportRequest)));
6915         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6916                readl(&(tb->HostWrite.CoalIntDelay)));
6917         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6918                readl(&(tb->HostWrite.CoalIntCount)));
6919         dev_info(dev, "   Max outstanding commands = %d\n",
6920                readl(&(tb->CmdsOutMax)));
6921         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6922         for (i = 0; i < 16; i++)
6923                 temp_name[i] = readb(&(tb->ServerName[i]));
6924         temp_name[16] = '\0';
6925         dev_info(dev, "   Server Name = %s\n", temp_name);
6926         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6927                 readl(&(tb->HeartBeat)));
6928 #endif                          /* HPSA_DEBUG */
6929 }
6930
6931 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6932 {
6933         int i, offset, mem_type, bar_type;
6934
6935         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6936                 return 0;
6937         offset = 0;
6938         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6939                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6940                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6941                         offset += 4;
6942                 else {
6943                         mem_type = pci_resource_flags(pdev, i) &
6944                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6945                         switch (mem_type) {
6946                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6947                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6948                                 offset += 4;    /* 32 bit */
6949                                 break;
6950                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6951                                 offset += 8;
6952                                 break;
6953                         default:        /* reserved in PCI 2.2 */
6954                                 dev_warn(&pdev->dev,
6955                                        "base address is invalid\n");
6956                                 return -1;
6957                                 break;
6958                         }
6959                 }
6960                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6961                         return i + 1;
6962         }
6963         return -1;
6964 }
6965
6966 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
6967 {
6968         if (h->msix_vector) {
6969                 if (h->pdev->msix_enabled)
6970                         pci_disable_msix(h->pdev);
6971                 h->msix_vector = 0;
6972         } else if (h->msi_vector) {
6973                 if (h->pdev->msi_enabled)
6974                         pci_disable_msi(h->pdev);
6975                 h->msi_vector = 0;
6976         }
6977 }
6978
6979 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6980  * controllers that are capable. If not, we use legacy INTx mode.
6981  */
6982 static void hpsa_interrupt_mode(struct ctlr_info *h)
6983 {
6984 #ifdef CONFIG_PCI_MSI
6985         int err, i;
6986         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6987
6988         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6989                 hpsa_msix_entries[i].vector = 0;
6990                 hpsa_msix_entries[i].entry = i;
6991         }
6992
6993         /* Some boards advertise MSI but don't really support it */
6994         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6995             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6996                 goto default_int_mode;
6997         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6998                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6999                 h->msix_vector = MAX_REPLY_QUEUES;
7000                 if (h->msix_vector > num_online_cpus())
7001                         h->msix_vector = num_online_cpus();
7002                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7003                                             1, h->msix_vector);
7004                 if (err < 0) {
7005                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7006                         h->msix_vector = 0;
7007                         goto single_msi_mode;
7008                 } else if (err < h->msix_vector) {
7009                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7010                                "available\n", err);
7011                 }
7012                 h->msix_vector = err;
7013                 for (i = 0; i < h->msix_vector; i++)
7014                         h->intr[i] = hpsa_msix_entries[i].vector;
7015                 return;
7016         }
7017 single_msi_mode:
7018         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7019                 dev_info(&h->pdev->dev, "MSI capable controller\n");
7020                 if (!pci_enable_msi(h->pdev))
7021                         h->msi_vector = 1;
7022                 else
7023                         dev_warn(&h->pdev->dev, "MSI init failed\n");
7024         }
7025 default_int_mode:
7026 #endif                          /* CONFIG_PCI_MSI */
7027         /* if we get here we're going to use the default interrupt mode */
7028         h->intr[h->intr_mode] = h->pdev->irq;
7029 }
7030
7031 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7032 {
7033         int i;
7034         u32 subsystem_vendor_id, subsystem_device_id;
7035
7036         subsystem_vendor_id = pdev->subsystem_vendor;
7037         subsystem_device_id = pdev->subsystem_device;
7038         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7039                     subsystem_vendor_id;
7040
7041         for (i = 0; i < ARRAY_SIZE(products); i++)
7042                 if (*board_id == products[i].board_id)
7043                         return i;
7044
7045         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7046                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7047                 !hpsa_allow_any) {
7048                 dev_warn(&pdev->dev, "unrecognized board ID: "
7049                         "0x%08x, ignoring.\n", *board_id);
7050                         return -ENODEV;
7051         }
7052         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7053 }
7054
7055 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7056                                     unsigned long *memory_bar)
7057 {
7058         int i;
7059
7060         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7061                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7062                         /* addressing mode bits already removed */
7063                         *memory_bar = pci_resource_start(pdev, i);
7064                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7065                                 *memory_bar);
7066                         return 0;
7067                 }
7068         dev_warn(&pdev->dev, "no memory BAR found\n");
7069         return -ENODEV;
7070 }
7071
7072 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7073                                      int wait_for_ready)
7074 {
7075         int i, iterations;
7076         u32 scratchpad;
7077         if (wait_for_ready)
7078                 iterations = HPSA_BOARD_READY_ITERATIONS;
7079         else
7080                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7081
7082         for (i = 0; i < iterations; i++) {
7083                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7084                 if (wait_for_ready) {
7085                         if (scratchpad == HPSA_FIRMWARE_READY)
7086                                 return 0;
7087                 } else {
7088                         if (scratchpad != HPSA_FIRMWARE_READY)
7089                                 return 0;
7090                 }
7091                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7092         }
7093         dev_warn(&pdev->dev, "board not ready, timed out.\n");
7094         return -ENODEV;
7095 }
7096
7097 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7098                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7099                                u64 *cfg_offset)
7100 {
7101         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7102         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7103         *cfg_base_addr &= (u32) 0x0000ffff;
7104         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7105         if (*cfg_base_addr_index == -1) {
7106                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7107                 return -ENODEV;
7108         }
7109         return 0;
7110 }
7111
7112 static void hpsa_free_cfgtables(struct ctlr_info *h)
7113 {
7114         if (h->transtable) {
7115                 iounmap(h->transtable);
7116                 h->transtable = NULL;
7117         }
7118         if (h->cfgtable) {
7119                 iounmap(h->cfgtable);
7120                 h->cfgtable = NULL;
7121         }
7122 }
7123
7124 /* Find and map CISS config table and transfer table
7125 + * several items must be unmapped (freed) later
7126 + * */
7127 static int hpsa_find_cfgtables(struct ctlr_info *h)
7128 {
7129         u64 cfg_offset;
7130         u32 cfg_base_addr;
7131         u64 cfg_base_addr_index;
7132         u32 trans_offset;
7133         int rc;
7134
7135         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7136                 &cfg_base_addr_index, &cfg_offset);
7137         if (rc)
7138                 return rc;
7139         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7140                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7141         if (!h->cfgtable) {
7142                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7143                 return -ENOMEM;
7144         }
7145         rc = write_driver_ver_to_cfgtable(h->cfgtable);
7146         if (rc)
7147                 return rc;
7148         /* Find performant mode table. */
7149         trans_offset = readl(&h->cfgtable->TransMethodOffset);
7150         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7151                                 cfg_base_addr_index)+cfg_offset+trans_offset,
7152                                 sizeof(*h->transtable));
7153         if (!h->transtable) {
7154                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7155                 hpsa_free_cfgtables(h);
7156                 return -ENOMEM;
7157         }
7158         return 0;
7159 }
7160
7161 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7162 {
7163 #define MIN_MAX_COMMANDS 16
7164         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7165
7166         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7167
7168         /* Limit commands in memory limited kdump scenario. */
7169         if (reset_devices && h->max_commands > 32)
7170                 h->max_commands = 32;
7171
7172         if (h->max_commands < MIN_MAX_COMMANDS) {
7173                 dev_warn(&h->pdev->dev,
7174                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7175                         h->max_commands,
7176                         MIN_MAX_COMMANDS);
7177                 h->max_commands = MIN_MAX_COMMANDS;
7178         }
7179 }
7180
7181 /* If the controller reports that the total max sg entries is greater than 512,
7182  * then we know that chained SG blocks work.  (Original smart arrays did not
7183  * support chained SG blocks and would return zero for max sg entries.)
7184  */
7185 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7186 {
7187         return h->maxsgentries > 512;
7188 }
7189
7190 /* Interrogate the hardware for some limits:
7191  * max commands, max SG elements without chaining, and with chaining,
7192  * SG chain block size, etc.
7193  */
7194 static void hpsa_find_board_params(struct ctlr_info *h)
7195 {
7196         hpsa_get_max_perf_mode_cmds(h);
7197         h->nr_cmds = h->max_commands;
7198         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7199         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7200         if (hpsa_supports_chained_sg_blocks(h)) {
7201                 /* Limit in-command s/g elements to 32 save dma'able memory. */
7202                 h->max_cmd_sg_entries = 32;
7203                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7204                 h->maxsgentries--; /* save one for chain pointer */
7205         } else {
7206                 /*
7207                  * Original smart arrays supported at most 31 s/g entries
7208                  * embedded inline in the command (trying to use more
7209                  * would lock up the controller)
7210                  */
7211                 h->max_cmd_sg_entries = 31;
7212                 h->maxsgentries = 31; /* default to traditional values */
7213                 h->chainsize = 0;
7214         }
7215
7216         /* Find out what task management functions are supported and cache */
7217         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7218         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7219                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7220         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7221                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7222         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7223                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7224 }
7225
7226 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7227 {
7228         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7229                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7230                 return false;
7231         }
7232         return true;
7233 }
7234
7235 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7236 {
7237         u32 driver_support;
7238
7239         driver_support = readl(&(h->cfgtable->driver_support));
7240         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7241 #ifdef CONFIG_X86
7242         driver_support |= ENABLE_SCSI_PREFETCH;
7243 #endif
7244         driver_support |= ENABLE_UNIT_ATTN;
7245         writel(driver_support, &(h->cfgtable->driver_support));
7246 }
7247
7248 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7249  * in a prefetch beyond physical memory.
7250  */
7251 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7252 {
7253         u32 dma_prefetch;
7254
7255         if (h->board_id != 0x3225103C)
7256                 return;
7257         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7258         dma_prefetch |= 0x8000;
7259         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7260 }
7261
7262 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7263 {
7264         int i;
7265         u32 doorbell_value;
7266         unsigned long flags;
7267         /* wait until the clear_event_notify bit 6 is cleared by controller. */
7268         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7269                 spin_lock_irqsave(&h->lock, flags);
7270                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7271                 spin_unlock_irqrestore(&h->lock, flags);
7272                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7273                         goto done;
7274                 /* delay and try again */
7275                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7276         }
7277         return -ENODEV;
7278 done:
7279         return 0;
7280 }
7281
7282 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7283 {
7284         int i;
7285         u32 doorbell_value;
7286         unsigned long flags;
7287
7288         /* under certain very rare conditions, this can take awhile.
7289          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7290          * as we enter this code.)
7291          */
7292         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7293                 if (h->remove_in_progress)
7294                         goto done;
7295                 spin_lock_irqsave(&h->lock, flags);
7296                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7297                 spin_unlock_irqrestore(&h->lock, flags);
7298                 if (!(doorbell_value & CFGTBL_ChangeReq))
7299                         goto done;
7300                 /* delay and try again */
7301                 msleep(MODE_CHANGE_WAIT_INTERVAL);
7302         }
7303         return -ENODEV;
7304 done:
7305         return 0;
7306 }
7307
7308 /* return -ENODEV or other reason on error, 0 on success */
7309 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7310 {
7311         u32 trans_support;
7312
7313         trans_support = readl(&(h->cfgtable->TransportSupport));
7314         if (!(trans_support & SIMPLE_MODE))
7315                 return -ENOTSUPP;
7316
7317         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7318
7319         /* Update the field, and then ring the doorbell */
7320         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7321         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7322         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7323         if (hpsa_wait_for_mode_change_ack(h))
7324                 goto error;
7325         print_cfg_table(&h->pdev->dev, h->cfgtable);
7326         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7327                 goto error;
7328         h->transMethod = CFGTBL_Trans_Simple;
7329         return 0;
7330 error:
7331         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7332         return -ENODEV;
7333 }
7334
7335 /* free items allocated or mapped by hpsa_pci_init */
7336 static void hpsa_free_pci_init(struct ctlr_info *h)
7337 {
7338         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7339         iounmap(h->vaddr);                      /* pci_init 3 */
7340         h->vaddr = NULL;
7341         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7342         /*
7343          * call pci_disable_device before pci_release_regions per
7344          * Documentation/PCI/pci.txt
7345          */
7346         pci_disable_device(h->pdev);            /* pci_init 1 */
7347         pci_release_regions(h->pdev);           /* pci_init 2 */
7348 }
7349
7350 /* several items must be freed later */
7351 static int hpsa_pci_init(struct ctlr_info *h)
7352 {
7353         int prod_index, err;
7354
7355         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7356         if (prod_index < 0)
7357                 return prod_index;
7358         h->product_name = products[prod_index].product_name;
7359         h->access = *(products[prod_index].access);
7360
7361         h->needs_abort_tags_swizzled =
7362                 ctlr_needs_abort_tags_swizzled(h->board_id);
7363
7364         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7365                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7366
7367         err = pci_enable_device(h->pdev);
7368         if (err) {
7369                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7370                 pci_disable_device(h->pdev);
7371                 return err;
7372         }
7373
7374         err = pci_request_regions(h->pdev, HPSA);
7375         if (err) {
7376                 dev_err(&h->pdev->dev,
7377                         "failed to obtain PCI resources\n");
7378                 pci_disable_device(h->pdev);
7379                 return err;
7380         }
7381
7382         pci_set_master(h->pdev);
7383
7384         hpsa_interrupt_mode(h);
7385         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7386         if (err)
7387                 goto clean2;    /* intmode+region, pci */
7388         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7389         if (!h->vaddr) {
7390                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7391                 err = -ENOMEM;
7392                 goto clean2;    /* intmode+region, pci */
7393         }
7394         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7395         if (err)
7396                 goto clean3;    /* vaddr, intmode+region, pci */
7397         err = hpsa_find_cfgtables(h);
7398         if (err)
7399                 goto clean3;    /* vaddr, intmode+region, pci */
7400         hpsa_find_board_params(h);
7401
7402         if (!hpsa_CISS_signature_present(h)) {
7403                 err = -ENODEV;
7404                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7405         }
7406         hpsa_set_driver_support_bits(h);
7407         hpsa_p600_dma_prefetch_quirk(h);
7408         err = hpsa_enter_simple_mode(h);
7409         if (err)
7410                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7411         return 0;
7412
7413 clean4: /* cfgtables, vaddr, intmode+region, pci */
7414         hpsa_free_cfgtables(h);
7415 clean3: /* vaddr, intmode+region, pci */
7416         iounmap(h->vaddr);
7417         h->vaddr = NULL;
7418 clean2: /* intmode+region, pci */
7419         hpsa_disable_interrupt_mode(h);
7420         /*
7421          * call pci_disable_device before pci_release_regions per
7422          * Documentation/PCI/pci.txt
7423          */
7424         pci_disable_device(h->pdev);
7425         pci_release_regions(h->pdev);
7426         return err;
7427 }
7428
7429 static void hpsa_hba_inquiry(struct ctlr_info *h)
7430 {
7431         int rc;
7432
7433 #define HBA_INQUIRY_BYTE_COUNT 64
7434         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7435         if (!h->hba_inquiry_data)
7436                 return;
7437         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7438                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7439         if (rc != 0) {
7440                 kfree(h->hba_inquiry_data);
7441                 h->hba_inquiry_data = NULL;
7442         }
7443 }
7444
7445 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7446 {
7447         int rc, i;
7448         void __iomem *vaddr;
7449
7450         if (!reset_devices)
7451                 return 0;
7452
7453         /* kdump kernel is loading, we don't know in which state is
7454          * the pci interface. The dev->enable_cnt is equal zero
7455          * so we call enable+disable, wait a while and switch it on.
7456          */
7457         rc = pci_enable_device(pdev);
7458         if (rc) {
7459                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7460                 return -ENODEV;
7461         }
7462         pci_disable_device(pdev);
7463         msleep(260);                    /* a randomly chosen number */
7464         rc = pci_enable_device(pdev);
7465         if (rc) {
7466                 dev_warn(&pdev->dev, "failed to enable device.\n");
7467                 return -ENODEV;
7468         }
7469
7470         pci_set_master(pdev);
7471
7472         vaddr = pci_ioremap_bar(pdev, 0);
7473         if (vaddr == NULL) {
7474                 rc = -ENOMEM;
7475                 goto out_disable;
7476         }
7477         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7478         iounmap(vaddr);
7479
7480         /* Reset the controller with a PCI power-cycle or via doorbell */
7481         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7482
7483         /* -ENOTSUPP here means we cannot reset the controller
7484          * but it's already (and still) up and running in
7485          * "performant mode".  Or, it might be 640x, which can't reset
7486          * due to concerns about shared bbwc between 6402/6404 pair.
7487          */
7488         if (rc)
7489                 goto out_disable;
7490
7491         /* Now try to get the controller to respond to a no-op */
7492         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7493         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7494                 if (hpsa_noop(pdev) == 0)
7495                         break;
7496                 else
7497                         dev_warn(&pdev->dev, "no-op failed%s\n",
7498                                         (i < 11 ? "; re-trying" : ""));
7499         }
7500
7501 out_disable:
7502
7503         pci_disable_device(pdev);
7504         return rc;
7505 }
7506
7507 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7508 {
7509         kfree(h->cmd_pool_bits);
7510         h->cmd_pool_bits = NULL;
7511         if (h->cmd_pool) {
7512                 pci_free_consistent(h->pdev,
7513                                 h->nr_cmds * sizeof(struct CommandList),
7514                                 h->cmd_pool,
7515                                 h->cmd_pool_dhandle);
7516                 h->cmd_pool = NULL;
7517                 h->cmd_pool_dhandle = 0;
7518         }
7519         if (h->errinfo_pool) {
7520                 pci_free_consistent(h->pdev,
7521                                 h->nr_cmds * sizeof(struct ErrorInfo),
7522                                 h->errinfo_pool,
7523                                 h->errinfo_pool_dhandle);
7524                 h->errinfo_pool = NULL;
7525                 h->errinfo_pool_dhandle = 0;
7526         }
7527 }
7528
7529 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7530 {
7531         h->cmd_pool_bits = kzalloc(
7532                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7533                 sizeof(unsigned long), GFP_KERNEL);
7534         h->cmd_pool = pci_alloc_consistent(h->pdev,
7535                     h->nr_cmds * sizeof(*h->cmd_pool),
7536                     &(h->cmd_pool_dhandle));
7537         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7538                     h->nr_cmds * sizeof(*h->errinfo_pool),
7539                     &(h->errinfo_pool_dhandle));
7540         if ((h->cmd_pool_bits == NULL)
7541             || (h->cmd_pool == NULL)
7542             || (h->errinfo_pool == NULL)) {
7543                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7544                 goto clean_up;
7545         }
7546         hpsa_preinitialize_commands(h);
7547         return 0;
7548 clean_up:
7549         hpsa_free_cmd_pool(h);
7550         return -ENOMEM;
7551 }
7552
7553 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7554 {
7555         int i, cpu;
7556
7557         cpu = cpumask_first(cpu_online_mask);
7558         for (i = 0; i < h->msix_vector; i++) {
7559                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7560                 cpu = cpumask_next(cpu, cpu_online_mask);
7561         }
7562 }
7563
7564 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7565 static void hpsa_free_irqs(struct ctlr_info *h)
7566 {
7567         int i;
7568
7569         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7570                 /* Single reply queue, only one irq to free */
7571                 i = h->intr_mode;
7572                 irq_set_affinity_hint(h->intr[i], NULL);
7573                 free_irq(h->intr[i], &h->q[i]);
7574                 h->q[i] = 0;
7575                 return;
7576         }
7577
7578         for (i = 0; i < h->msix_vector; i++) {
7579                 irq_set_affinity_hint(h->intr[i], NULL);
7580                 free_irq(h->intr[i], &h->q[i]);
7581                 h->q[i] = 0;
7582         }
7583         for (; i < MAX_REPLY_QUEUES; i++)
7584                 h->q[i] = 0;
7585 }
7586
7587 /* returns 0 on success; cleans up and returns -Enn on error */
7588 static int hpsa_request_irqs(struct ctlr_info *h,
7589         irqreturn_t (*msixhandler)(int, void *),
7590         irqreturn_t (*intxhandler)(int, void *))
7591 {
7592         int rc, i;
7593
7594         /*
7595          * initialize h->q[x] = x so that interrupt handlers know which
7596          * queue to process.
7597          */
7598         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7599                 h->q[i] = (u8) i;
7600
7601         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7602                 /* If performant mode and MSI-X, use multiple reply queues */
7603                 for (i = 0; i < h->msix_vector; i++) {
7604                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7605                         rc = request_irq(h->intr[i], msixhandler,
7606                                         0, h->intrname[i],
7607                                         &h->q[i]);
7608                         if (rc) {
7609                                 int j;
7610
7611                                 dev_err(&h->pdev->dev,
7612                                         "failed to get irq %d for %s\n",
7613                                        h->intr[i], h->devname);
7614                                 for (j = 0; j < i; j++) {
7615                                         free_irq(h->intr[j], &h->q[j]);
7616                                         h->q[j] = 0;
7617                                 }
7618                                 for (; j < MAX_REPLY_QUEUES; j++)
7619                                         h->q[j] = 0;
7620                                 return rc;
7621                         }
7622                 }
7623                 hpsa_irq_affinity_hints(h);
7624         } else {
7625                 /* Use single reply pool */
7626                 if (h->msix_vector > 0 || h->msi_vector) {
7627                         if (h->msix_vector)
7628                                 sprintf(h->intrname[h->intr_mode],
7629                                         "%s-msix", h->devname);
7630                         else
7631                                 sprintf(h->intrname[h->intr_mode],
7632                                         "%s-msi", h->devname);
7633                         rc = request_irq(h->intr[h->intr_mode],
7634                                 msixhandler, 0,
7635                                 h->intrname[h->intr_mode],
7636                                 &h->q[h->intr_mode]);
7637                 } else {
7638                         sprintf(h->intrname[h->intr_mode],
7639                                 "%s-intx", h->devname);
7640                         rc = request_irq(h->intr[h->intr_mode],
7641                                 intxhandler, IRQF_SHARED,
7642                                 h->intrname[h->intr_mode],
7643                                 &h->q[h->intr_mode]);
7644                 }
7645                 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7646         }
7647         if (rc) {
7648                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7649                        h->intr[h->intr_mode], h->devname);
7650                 hpsa_free_irqs(h);
7651                 return -ENODEV;
7652         }
7653         return 0;
7654 }
7655
7656 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7657 {
7658         int rc;
7659         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7660
7661         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7662         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7663         if (rc) {
7664                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7665                 return rc;
7666         }
7667
7668         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7669         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7670         if (rc) {
7671                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7672                         "after soft reset.\n");
7673                 return rc;
7674         }
7675
7676         return 0;
7677 }
7678
7679 static void hpsa_free_reply_queues(struct ctlr_info *h)
7680 {
7681         int i;
7682
7683         for (i = 0; i < h->nreply_queues; i++) {
7684                 if (!h->reply_queue[i].head)
7685                         continue;
7686                 pci_free_consistent(h->pdev,
7687                                         h->reply_queue_size,
7688                                         h->reply_queue[i].head,
7689                                         h->reply_queue[i].busaddr);
7690                 h->reply_queue[i].head = NULL;
7691                 h->reply_queue[i].busaddr = 0;
7692         }
7693         h->reply_queue_size = 0;
7694 }
7695
7696 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7697 {
7698         hpsa_free_performant_mode(h);           /* init_one 7 */
7699         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7700         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7701         hpsa_free_irqs(h);                      /* init_one 4 */
7702         scsi_host_put(h->scsi_host);            /* init_one 3 */
7703         h->scsi_host = NULL;                    /* init_one 3 */
7704         hpsa_free_pci_init(h);                  /* init_one 2_5 */
7705         free_percpu(h->lockup_detected);        /* init_one 2 */
7706         h->lockup_detected = NULL;              /* init_one 2 */
7707         if (h->resubmit_wq) {
7708                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7709                 h->resubmit_wq = NULL;
7710         }
7711         if (h->rescan_ctlr_wq) {
7712                 destroy_workqueue(h->rescan_ctlr_wq);
7713                 h->rescan_ctlr_wq = NULL;
7714         }
7715         kfree(h);                               /* init_one 1 */
7716 }
7717
7718 /* Called when controller lockup detected. */
7719 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7720 {
7721         int i, refcount;
7722         struct CommandList *c;
7723         int failcount = 0;
7724
7725         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7726         for (i = 0; i < h->nr_cmds; i++) {
7727                 c = h->cmd_pool + i;
7728                 refcount = atomic_inc_return(&c->refcount);
7729                 if (refcount > 1) {
7730                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7731                         finish_cmd(c);
7732                         atomic_dec(&h->commands_outstanding);
7733                         failcount++;
7734                 }
7735                 cmd_free(h, c);
7736         }
7737         dev_warn(&h->pdev->dev,
7738                 "failed %d commands in fail_all\n", failcount);
7739 }
7740
7741 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7742 {
7743         int cpu;
7744
7745         for_each_online_cpu(cpu) {
7746                 u32 *lockup_detected;
7747                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7748                 *lockup_detected = value;
7749         }
7750         wmb(); /* be sure the per-cpu variables are out to memory */
7751 }
7752
7753 static void controller_lockup_detected(struct ctlr_info *h)
7754 {
7755         unsigned long flags;
7756         u32 lockup_detected;
7757
7758         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7759         spin_lock_irqsave(&h->lock, flags);
7760         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7761         if (!lockup_detected) {
7762                 /* no heartbeat, but controller gave us a zero. */
7763                 dev_warn(&h->pdev->dev,
7764                         "lockup detected after %d but scratchpad register is zero\n",
7765                         h->heartbeat_sample_interval / HZ);
7766                 lockup_detected = 0xffffffff;
7767         }
7768         set_lockup_detected_for_all_cpus(h, lockup_detected);
7769         spin_unlock_irqrestore(&h->lock, flags);
7770         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7771                         lockup_detected, h->heartbeat_sample_interval / HZ);
7772         pci_disable_device(h->pdev);
7773         fail_all_outstanding_cmds(h);
7774 }
7775
7776 static int detect_controller_lockup(struct ctlr_info *h)
7777 {
7778         u64 now;
7779         u32 heartbeat;
7780         unsigned long flags;
7781
7782         now = get_jiffies_64();
7783         /* If we've received an interrupt recently, we're ok. */
7784         if (time_after64(h->last_intr_timestamp +
7785                                 (h->heartbeat_sample_interval), now))
7786                 return false;
7787
7788         /*
7789          * If we've already checked the heartbeat recently, we're ok.
7790          * This could happen if someone sends us a signal. We
7791          * otherwise don't care about signals in this thread.
7792          */
7793         if (time_after64(h->last_heartbeat_timestamp +
7794                                 (h->heartbeat_sample_interval), now))
7795                 return false;
7796
7797         /* If heartbeat has not changed since we last looked, we're not ok. */
7798         spin_lock_irqsave(&h->lock, flags);
7799         heartbeat = readl(&h->cfgtable->HeartBeat);
7800         spin_unlock_irqrestore(&h->lock, flags);
7801         if (h->last_heartbeat == heartbeat) {
7802                 controller_lockup_detected(h);
7803                 return true;
7804         }
7805
7806         /* We're ok. */
7807         h->last_heartbeat = heartbeat;
7808         h->last_heartbeat_timestamp = now;
7809         return false;
7810 }
7811
7812 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7813 {
7814         int i;
7815         char *event_type;
7816
7817         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7818                 return;
7819
7820         /* Ask the controller to clear the events we're handling. */
7821         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7822                         | CFGTBL_Trans_io_accel2)) &&
7823                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7824                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7825
7826                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7827                         event_type = "state change";
7828                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7829                         event_type = "configuration change";
7830                 /* Stop sending new RAID offload reqs via the IO accelerator */
7831                 scsi_block_requests(h->scsi_host);
7832                 for (i = 0; i < h->ndevices; i++)
7833                         h->dev[i]->offload_enabled = 0;
7834                 hpsa_drain_accel_commands(h);
7835                 /* Set 'accelerator path config change' bit */
7836                 dev_warn(&h->pdev->dev,
7837                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7838                         h->events, event_type);
7839                 writel(h->events, &(h->cfgtable->clear_event_notify));
7840                 /* Set the "clear event notify field update" bit 6 */
7841                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7842                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7843                 hpsa_wait_for_clear_event_notify_ack(h);
7844                 scsi_unblock_requests(h->scsi_host);
7845         } else {
7846                 /* Acknowledge controller notification events. */
7847                 writel(h->events, &(h->cfgtable->clear_event_notify));
7848                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7849                 hpsa_wait_for_clear_event_notify_ack(h);
7850 #if 0
7851                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7852                 hpsa_wait_for_mode_change_ack(h);
7853 #endif
7854         }
7855         return;
7856 }
7857
7858 /* Check a register on the controller to see if there are configuration
7859  * changes (added/changed/removed logical drives, etc.) which mean that
7860  * we should rescan the controller for devices.
7861  * Also check flag for driver-initiated rescan.
7862  */
7863 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7864 {
7865         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7866                 return 0;
7867
7868         h->events = readl(&(h->cfgtable->event_notify));
7869         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7870 }
7871
7872 /*
7873  * Check if any of the offline devices have become ready
7874  */
7875 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7876 {
7877         unsigned long flags;
7878         struct offline_device_entry *d;
7879         struct list_head *this, *tmp;
7880
7881         spin_lock_irqsave(&h->offline_device_lock, flags);
7882         list_for_each_safe(this, tmp, &h->offline_device_list) {
7883                 d = list_entry(this, struct offline_device_entry,
7884                                 offline_list);
7885                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7886                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7887                         spin_lock_irqsave(&h->offline_device_lock, flags);
7888                         list_del(&d->offline_list);
7889                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7890                         return 1;
7891                 }
7892                 spin_lock_irqsave(&h->offline_device_lock, flags);
7893         }
7894         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7895         return 0;
7896 }
7897
7898 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7899 {
7900         unsigned long flags;
7901         struct ctlr_info *h = container_of(to_delayed_work(work),
7902                                         struct ctlr_info, rescan_ctlr_work);
7903
7904
7905         if (h->remove_in_progress)
7906                 return;
7907
7908         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7909                 scsi_host_get(h->scsi_host);
7910                 hpsa_ack_ctlr_events(h);
7911                 hpsa_scan_start(h->scsi_host);
7912                 scsi_host_put(h->scsi_host);
7913         }
7914         spin_lock_irqsave(&h->lock, flags);
7915         if (!h->remove_in_progress)
7916                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7917                                 h->heartbeat_sample_interval);
7918         spin_unlock_irqrestore(&h->lock, flags);
7919 }
7920
7921 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7922 {
7923         unsigned long flags;
7924         struct ctlr_info *h = container_of(to_delayed_work(work),
7925                                         struct ctlr_info, monitor_ctlr_work);
7926
7927         detect_controller_lockup(h);
7928         if (lockup_detected(h))
7929                 return;
7930
7931         spin_lock_irqsave(&h->lock, flags);
7932         if (!h->remove_in_progress)
7933                 schedule_delayed_work(&h->monitor_ctlr_work,
7934                                 h->heartbeat_sample_interval);
7935         spin_unlock_irqrestore(&h->lock, flags);
7936 }
7937
7938 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7939                                                 char *name)
7940 {
7941         struct workqueue_struct *wq = NULL;
7942
7943         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7944         if (!wq)
7945                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7946
7947         return wq;
7948 }
7949
7950 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7951 {
7952         int dac, rc;
7953         struct ctlr_info *h;
7954         int try_soft_reset = 0;
7955         unsigned long flags;
7956         u32 board_id;
7957
7958         if (number_of_controllers == 0)
7959                 printk(KERN_INFO DRIVER_NAME "\n");
7960
7961         rc = hpsa_lookup_board_id(pdev, &board_id);
7962         if (rc < 0) {
7963                 dev_warn(&pdev->dev, "Board ID not found\n");
7964                 return rc;
7965         }
7966
7967         rc = hpsa_init_reset_devices(pdev, board_id);
7968         if (rc) {
7969                 if (rc != -ENOTSUPP)
7970                         return rc;
7971                 /* If the reset fails in a particular way (it has no way to do
7972                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7973                  * a soft reset once we get the controller configured up to the
7974                  * point that it can accept a command.
7975                  */
7976                 try_soft_reset = 1;
7977                 rc = 0;
7978         }
7979
7980 reinit_after_soft_reset:
7981
7982         /* Command structures must be aligned on a 32-byte boundary because
7983          * the 5 lower bits of the address are used by the hardware. and by
7984          * the driver.  See comments in hpsa.h for more info.
7985          */
7986         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7987         h = kzalloc(sizeof(*h), GFP_KERNEL);
7988         if (!h) {
7989                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
7990                 return -ENOMEM;
7991         }
7992
7993         h->pdev = pdev;
7994
7995         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7996         INIT_LIST_HEAD(&h->offline_device_list);
7997         spin_lock_init(&h->lock);
7998         spin_lock_init(&h->offline_device_lock);
7999         spin_lock_init(&h->scan_lock);
8000         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8001         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8002
8003         /* Allocate and clear per-cpu variable lockup_detected */
8004         h->lockup_detected = alloc_percpu(u32);
8005         if (!h->lockup_detected) {
8006                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8007                 rc = -ENOMEM;
8008                 goto clean1;    /* aer/h */
8009         }
8010         set_lockup_detected_for_all_cpus(h, 0);
8011
8012         rc = hpsa_pci_init(h);
8013         if (rc)
8014                 goto clean2;    /* lu, aer/h */
8015
8016         /* relies on h-> settings made by hpsa_pci_init, including
8017          * interrupt_mode h->intr */
8018         rc = hpsa_scsi_host_alloc(h);
8019         if (rc)
8020                 goto clean2_5;  /* pci, lu, aer/h */
8021
8022         sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8023         h->ctlr = number_of_controllers;
8024         number_of_controllers++;
8025
8026         /* configure PCI DMA stuff */
8027         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8028         if (rc == 0) {
8029                 dac = 1;
8030         } else {
8031                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8032                 if (rc == 0) {
8033                         dac = 0;
8034                 } else {
8035                         dev_err(&pdev->dev, "no suitable DMA available\n");
8036                         goto clean3;    /* shost, pci, lu, aer/h */
8037                 }
8038         }
8039
8040         /* make sure the board interrupts are off */
8041         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8042
8043         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8044         if (rc)
8045                 goto clean3;    /* shost, pci, lu, aer/h */
8046         rc = hpsa_alloc_cmd_pool(h);
8047         if (rc)
8048                 goto clean4;    /* irq, shost, pci, lu, aer/h */
8049         rc = hpsa_alloc_sg_chain_blocks(h);
8050         if (rc)
8051                 goto clean5;    /* cmd, irq, shost, pci, lu, aer/h */
8052         init_waitqueue_head(&h->scan_wait_queue);
8053         init_waitqueue_head(&h->abort_cmd_wait_queue);
8054         init_waitqueue_head(&h->event_sync_wait_queue);
8055         mutex_init(&h->reset_mutex);
8056         h->scan_finished = 1; /* no scan currently in progress */
8057
8058         pci_set_drvdata(pdev, h);
8059         h->ndevices = 0;
8060
8061         spin_lock_init(&h->devlock);
8062         rc = hpsa_put_ctlr_into_performant_mode(h);
8063         if (rc)
8064                 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8065
8066         /* hook into SCSI subsystem */
8067         rc = hpsa_scsi_add_host(h);
8068         if (rc)
8069                 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8070
8071         /* create the resubmit workqueue */
8072         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8073         if (!h->rescan_ctlr_wq) {
8074                 rc = -ENOMEM;
8075                 goto clean7;
8076         }
8077
8078         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8079         if (!h->resubmit_wq) {
8080                 rc = -ENOMEM;
8081                 goto clean7;    /* aer/h */
8082         }
8083
8084         /*
8085          * At this point, the controller is ready to take commands.
8086          * Now, if reset_devices and the hard reset didn't work, try
8087          * the soft reset and see if that works.
8088          */
8089         if (try_soft_reset) {
8090
8091                 /* This is kind of gross.  We may or may not get a completion
8092                  * from the soft reset command, and if we do, then the value
8093                  * from the fifo may or may not be valid.  So, we wait 10 secs
8094                  * after the reset throwing away any completions we get during
8095                  * that time.  Unregister the interrupt handler and register
8096                  * fake ones to scoop up any residual completions.
8097                  */
8098                 spin_lock_irqsave(&h->lock, flags);
8099                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8100                 spin_unlock_irqrestore(&h->lock, flags);
8101                 hpsa_free_irqs(h);
8102                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8103                                         hpsa_intx_discard_completions);
8104                 if (rc) {
8105                         dev_warn(&h->pdev->dev,
8106                                 "Failed to request_irq after soft reset.\n");
8107                         /*
8108                          * cannot goto clean7 or free_irqs will be called
8109                          * again. Instead, do its work
8110                          */
8111                         hpsa_free_performant_mode(h);   /* clean7 */
8112                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
8113                         hpsa_free_cmd_pool(h);          /* clean5 */
8114                         /*
8115                          * skip hpsa_free_irqs(h) clean4 since that
8116                          * was just called before request_irqs failed
8117                          */
8118                         goto clean3;
8119                 }
8120
8121                 rc = hpsa_kdump_soft_reset(h);
8122                 if (rc)
8123                         /* Neither hard nor soft reset worked, we're hosed. */
8124                         goto clean7;
8125
8126                 dev_info(&h->pdev->dev, "Board READY.\n");
8127                 dev_info(&h->pdev->dev,
8128                         "Waiting for stale completions to drain.\n");
8129                 h->access.set_intr_mask(h, HPSA_INTR_ON);
8130                 msleep(10000);
8131                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8132
8133                 rc = controller_reset_failed(h->cfgtable);
8134                 if (rc)
8135                         dev_info(&h->pdev->dev,
8136                                 "Soft reset appears to have failed.\n");
8137
8138                 /* since the controller's reset, we have to go back and re-init
8139                  * everything.  Easiest to just forget what we've done and do it
8140                  * all over again.
8141                  */
8142                 hpsa_undo_allocations_after_kdump_soft_reset(h);
8143                 try_soft_reset = 0;
8144                 if (rc)
8145                         /* don't goto clean, we already unallocated */
8146                         return -ENODEV;
8147
8148                 goto reinit_after_soft_reset;
8149         }
8150
8151         /* Enable Accelerated IO path at driver layer */
8152         h->acciopath_status = 1;
8153
8154
8155         /* Turn the interrupts on so we can service requests */
8156         h->access.set_intr_mask(h, HPSA_INTR_ON);
8157
8158         hpsa_hba_inquiry(h);
8159
8160         /* Monitor the controller for firmware lockups */
8161         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8162         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8163         schedule_delayed_work(&h->monitor_ctlr_work,
8164                                 h->heartbeat_sample_interval);
8165         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8166         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8167                                 h->heartbeat_sample_interval);
8168         return 0;
8169
8170 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8171         hpsa_free_performant_mode(h);
8172         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8173 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8174         hpsa_free_sg_chain_blocks(h);
8175 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8176         hpsa_free_cmd_pool(h);
8177 clean4: /* irq, shost, pci, lu, aer/h */
8178         hpsa_free_irqs(h);
8179 clean3: /* shost, pci, lu, aer/h */
8180         scsi_host_put(h->scsi_host);
8181         h->scsi_host = NULL;
8182 clean2_5: /* pci, lu, aer/h */
8183         hpsa_free_pci_init(h);
8184 clean2: /* lu, aer/h */
8185         if (h->lockup_detected) {
8186                 free_percpu(h->lockup_detected);
8187                 h->lockup_detected = NULL;
8188         }
8189 clean1: /* wq/aer/h */
8190         if (h->resubmit_wq) {
8191                 destroy_workqueue(h->resubmit_wq);
8192                 h->resubmit_wq = NULL;
8193         }
8194         if (h->rescan_ctlr_wq) {
8195                 destroy_workqueue(h->rescan_ctlr_wq);
8196                 h->rescan_ctlr_wq = NULL;
8197         }
8198         kfree(h);
8199         return rc;
8200 }
8201
8202 static void hpsa_flush_cache(struct ctlr_info *h)
8203 {
8204         char *flush_buf;
8205         struct CommandList *c;
8206         int rc;
8207
8208         if (unlikely(lockup_detected(h)))
8209                 return;
8210         flush_buf = kzalloc(4, GFP_KERNEL);
8211         if (!flush_buf)
8212                 return;
8213
8214         c = cmd_alloc(h);
8215
8216         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8217                 RAID_CTLR_LUNID, TYPE_CMD)) {
8218                 goto out;
8219         }
8220         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8221                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
8222         if (rc)
8223                 goto out;
8224         if (c->err_info->CommandStatus != 0)
8225 out:
8226                 dev_warn(&h->pdev->dev,
8227                         "error flushing cache on controller\n");
8228         cmd_free(h, c);
8229         kfree(flush_buf);
8230 }
8231
8232 static void hpsa_shutdown(struct pci_dev *pdev)
8233 {
8234         struct ctlr_info *h;
8235
8236         h = pci_get_drvdata(pdev);
8237         /* Turn board interrupts off  and send the flush cache command
8238          * sendcmd will turn off interrupt, and send the flush...
8239          * To write all data in the battery backed cache to disks
8240          */
8241         hpsa_flush_cache(h);
8242         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8243         hpsa_free_irqs(h);                      /* init_one 4 */
8244         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
8245 }
8246
8247 static void hpsa_free_device_info(struct ctlr_info *h)
8248 {
8249         int i;
8250
8251         for (i = 0; i < h->ndevices; i++) {
8252                 kfree(h->dev[i]);
8253                 h->dev[i] = NULL;
8254         }
8255 }
8256
8257 static void hpsa_remove_one(struct pci_dev *pdev)
8258 {
8259         struct ctlr_info *h;
8260         unsigned long flags;
8261
8262         if (pci_get_drvdata(pdev) == NULL) {
8263                 dev_err(&pdev->dev, "unable to remove device\n");
8264                 return;
8265         }
8266         h = pci_get_drvdata(pdev);
8267
8268         /* Get rid of any controller monitoring work items */
8269         spin_lock_irqsave(&h->lock, flags);
8270         h->remove_in_progress = 1;
8271         spin_unlock_irqrestore(&h->lock, flags);
8272         cancel_delayed_work_sync(&h->monitor_ctlr_work);
8273         cancel_delayed_work_sync(&h->rescan_ctlr_work);
8274         destroy_workqueue(h->rescan_ctlr_wq);
8275         destroy_workqueue(h->resubmit_wq);
8276
8277         /*
8278          * Call before disabling interrupts.
8279          * scsi_remove_host can trigger I/O operations especially
8280          * when multipath is enabled. There can be SYNCHRONIZE CACHE
8281          * operations which cannot complete and will hang the system.
8282          */
8283         if (h->scsi_host)
8284                 scsi_remove_host(h->scsi_host);         /* init_one 8 */
8285         /* includes hpsa_free_irqs - init_one 4 */
8286         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8287         hpsa_shutdown(pdev);
8288
8289         hpsa_free_device_info(h);               /* scan */
8290
8291         kfree(h->hba_inquiry_data);                     /* init_one 10 */
8292         h->hba_inquiry_data = NULL;                     /* init_one 10 */
8293         hpsa_free_ioaccel2_sg_chain_blocks(h);
8294         hpsa_free_performant_mode(h);                   /* init_one 7 */
8295         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
8296         hpsa_free_cmd_pool(h);                          /* init_one 5 */
8297
8298         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8299
8300         scsi_host_put(h->scsi_host);                    /* init_one 3 */
8301         h->scsi_host = NULL;                            /* init_one 3 */
8302
8303         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8304         hpsa_free_pci_init(h);                          /* init_one 2.5 */
8305
8306         free_percpu(h->lockup_detected);                /* init_one 2 */
8307         h->lockup_detected = NULL;                      /* init_one 2 */
8308         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
8309         kfree(h);                                       /* init_one 1 */
8310 }
8311
8312 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8313         __attribute__((unused)) pm_message_t state)
8314 {
8315         return -ENOSYS;
8316 }
8317
8318 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8319 {
8320         return -ENOSYS;
8321 }
8322
8323 static struct pci_driver hpsa_pci_driver = {
8324         .name = HPSA,
8325         .probe = hpsa_init_one,
8326         .remove = hpsa_remove_one,
8327         .id_table = hpsa_pci_device_id, /* id_table */
8328         .shutdown = hpsa_shutdown,
8329         .suspend = hpsa_suspend,
8330         .resume = hpsa_resume,
8331 };
8332
8333 /* Fill in bucket_map[], given nsgs (the max number of
8334  * scatter gather elements supported) and bucket[],
8335  * which is an array of 8 integers.  The bucket[] array
8336  * contains 8 different DMA transfer sizes (in 16
8337  * byte increments) which the controller uses to fetch
8338  * commands.  This function fills in bucket_map[], which
8339  * maps a given number of scatter gather elements to one of
8340  * the 8 DMA transfer sizes.  The point of it is to allow the
8341  * controller to only do as much DMA as needed to fetch the
8342  * command, with the DMA transfer size encoded in the lower
8343  * bits of the command address.
8344  */
8345 static void  calc_bucket_map(int bucket[], int num_buckets,
8346         int nsgs, int min_blocks, u32 *bucket_map)
8347 {
8348         int i, j, b, size;
8349
8350         /* Note, bucket_map must have nsgs+1 entries. */
8351         for (i = 0; i <= nsgs; i++) {
8352                 /* Compute size of a command with i SG entries */
8353                 size = i + min_blocks;
8354                 b = num_buckets; /* Assume the biggest bucket */
8355                 /* Find the bucket that is just big enough */
8356                 for (j = 0; j < num_buckets; j++) {
8357                         if (bucket[j] >= size) {
8358                                 b = j;
8359                                 break;
8360                         }
8361                 }
8362                 /* for a command with i SG entries, use bucket b. */
8363                 bucket_map[i] = b;
8364         }
8365 }
8366
8367 /*
8368  * return -ENODEV on err, 0 on success (or no action)
8369  * allocates numerous items that must be freed later
8370  */
8371 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8372 {
8373         int i;
8374         unsigned long register_value;
8375         unsigned long transMethod = CFGTBL_Trans_Performant |
8376                         (trans_support & CFGTBL_Trans_use_short_tags) |
8377                                 CFGTBL_Trans_enable_directed_msix |
8378                         (trans_support & (CFGTBL_Trans_io_accel1 |
8379                                 CFGTBL_Trans_io_accel2));
8380         struct access_method access = SA5_performant_access;
8381
8382         /* This is a bit complicated.  There are 8 registers on
8383          * the controller which we write to to tell it 8 different
8384          * sizes of commands which there may be.  It's a way of
8385          * reducing the DMA done to fetch each command.  Encoded into
8386          * each command's tag are 3 bits which communicate to the controller
8387          * which of the eight sizes that command fits within.  The size of
8388          * each command depends on how many scatter gather entries there are.
8389          * Each SG entry requires 16 bytes.  The eight registers are programmed
8390          * with the number of 16-byte blocks a command of that size requires.
8391          * The smallest command possible requires 5 such 16 byte blocks.
8392          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8393          * blocks.  Note, this only extends to the SG entries contained
8394          * within the command block, and does not extend to chained blocks
8395          * of SG elements.   bft[] contains the eight values we write to
8396          * the registers.  They are not evenly distributed, but have more
8397          * sizes for small commands, and fewer sizes for larger commands.
8398          */
8399         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8400 #define MIN_IOACCEL2_BFT_ENTRY 5
8401 #define HPSA_IOACCEL2_HEADER_SZ 4
8402         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8403                         13, 14, 15, 16, 17, 18, 19,
8404                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8405         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8406         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8407         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8408                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8409         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8410         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8411         /*  5 = 1 s/g entry or 4k
8412          *  6 = 2 s/g entry or 8k
8413          *  8 = 4 s/g entry or 16k
8414          * 10 = 6 s/g entry or 24k
8415          */
8416
8417         /* If the controller supports either ioaccel method then
8418          * we can also use the RAID stack submit path that does not
8419          * perform the superfluous readl() after each command submission.
8420          */
8421         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8422                 access = SA5_performant_access_no_read;
8423
8424         /* Controller spec: zero out this buffer. */
8425         for (i = 0; i < h->nreply_queues; i++)
8426                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8427
8428         bft[7] = SG_ENTRIES_IN_CMD + 4;
8429         calc_bucket_map(bft, ARRAY_SIZE(bft),
8430                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8431         for (i = 0; i < 8; i++)
8432                 writel(bft[i], &h->transtable->BlockFetch[i]);
8433
8434         /* size of controller ring buffer */
8435         writel(h->max_commands, &h->transtable->RepQSize);
8436         writel(h->nreply_queues, &h->transtable->RepQCount);
8437         writel(0, &h->transtable->RepQCtrAddrLow32);
8438         writel(0, &h->transtable->RepQCtrAddrHigh32);
8439
8440         for (i = 0; i < h->nreply_queues; i++) {
8441                 writel(0, &h->transtable->RepQAddr[i].upper);
8442                 writel(h->reply_queue[i].busaddr,
8443                         &h->transtable->RepQAddr[i].lower);
8444         }
8445
8446         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8447         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8448         /*
8449          * enable outbound interrupt coalescing in accelerator mode;
8450          */
8451         if (trans_support & CFGTBL_Trans_io_accel1) {
8452                 access = SA5_ioaccel_mode1_access;
8453                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8454                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8455         } else {
8456                 if (trans_support & CFGTBL_Trans_io_accel2) {
8457                         access = SA5_ioaccel_mode2_access;
8458                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8459                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8460                 }
8461         }
8462         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8463         if (hpsa_wait_for_mode_change_ack(h)) {
8464                 dev_err(&h->pdev->dev,
8465                         "performant mode problem - doorbell timeout\n");
8466                 return -ENODEV;
8467         }
8468         register_value = readl(&(h->cfgtable->TransportActive));
8469         if (!(register_value & CFGTBL_Trans_Performant)) {
8470                 dev_err(&h->pdev->dev,
8471                         "performant mode problem - transport not active\n");
8472                 return -ENODEV;
8473         }
8474         /* Change the access methods to the performant access methods */
8475         h->access = access;
8476         h->transMethod = transMethod;
8477
8478         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8479                 (trans_support & CFGTBL_Trans_io_accel2)))
8480                 return 0;
8481
8482         if (trans_support & CFGTBL_Trans_io_accel1) {
8483                 /* Set up I/O accelerator mode */
8484                 for (i = 0; i < h->nreply_queues; i++) {
8485                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8486                         h->reply_queue[i].current_entry =
8487                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8488                 }
8489                 bft[7] = h->ioaccel_maxsg + 8;
8490                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8491                                 h->ioaccel1_blockFetchTable);
8492
8493                 /* initialize all reply queue entries to unused */
8494                 for (i = 0; i < h->nreply_queues; i++)
8495                         memset(h->reply_queue[i].head,
8496                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8497                                 h->reply_queue_size);
8498
8499                 /* set all the constant fields in the accelerator command
8500                  * frames once at init time to save CPU cycles later.
8501                  */
8502                 for (i = 0; i < h->nr_cmds; i++) {
8503                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8504
8505                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8506                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8507                                         (i * sizeof(struct ErrorInfo)));
8508                         cp->err_info_len = sizeof(struct ErrorInfo);
8509                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8510                         cp->host_context_flags =
8511                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8512                         cp->timeout_sec = 0;
8513                         cp->ReplyQueue = 0;
8514                         cp->tag =
8515                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8516                         cp->host_addr =
8517                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8518                                         (i * sizeof(struct io_accel1_cmd)));
8519                 }
8520         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8521                 u64 cfg_offset, cfg_base_addr_index;
8522                 u32 bft2_offset, cfg_base_addr;
8523                 int rc;
8524
8525                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8526                         &cfg_base_addr_index, &cfg_offset);
8527                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8528                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8529                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8530                                 4, h->ioaccel2_blockFetchTable);
8531                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8532                 BUILD_BUG_ON(offsetof(struct CfgTable,
8533                                 io_accel_request_size_offset) != 0xb8);
8534                 h->ioaccel2_bft2_regs =
8535                         remap_pci_mem(pci_resource_start(h->pdev,
8536                                         cfg_base_addr_index) +
8537                                         cfg_offset + bft2_offset,
8538                                         ARRAY_SIZE(bft2) *
8539                                         sizeof(*h->ioaccel2_bft2_regs));
8540                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8541                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8542         }
8543         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8544         if (hpsa_wait_for_mode_change_ack(h)) {
8545                 dev_err(&h->pdev->dev,
8546                         "performant mode problem - enabling ioaccel mode\n");
8547                 return -ENODEV;
8548         }
8549         return 0;
8550 }
8551
8552 /* Free ioaccel1 mode command blocks and block fetch table */
8553 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8554 {
8555         if (h->ioaccel_cmd_pool) {
8556                 pci_free_consistent(h->pdev,
8557                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8558                         h->ioaccel_cmd_pool,
8559                         h->ioaccel_cmd_pool_dhandle);
8560                 h->ioaccel_cmd_pool = NULL;
8561                 h->ioaccel_cmd_pool_dhandle = 0;
8562         }
8563         kfree(h->ioaccel1_blockFetchTable);
8564         h->ioaccel1_blockFetchTable = NULL;
8565 }
8566
8567 /* Allocate ioaccel1 mode command blocks and block fetch table */
8568 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8569 {
8570         h->ioaccel_maxsg =
8571                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8572         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8573                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8574
8575         /* Command structures must be aligned on a 128-byte boundary
8576          * because the 7 lower bits of the address are used by the
8577          * hardware.
8578          */
8579         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8580                         IOACCEL1_COMMANDLIST_ALIGNMENT);
8581         h->ioaccel_cmd_pool =
8582                 pci_alloc_consistent(h->pdev,
8583                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8584                         &(h->ioaccel_cmd_pool_dhandle));
8585
8586         h->ioaccel1_blockFetchTable =
8587                 kmalloc(((h->ioaccel_maxsg + 1) *
8588                                 sizeof(u32)), GFP_KERNEL);
8589
8590         if ((h->ioaccel_cmd_pool == NULL) ||
8591                 (h->ioaccel1_blockFetchTable == NULL))
8592                 goto clean_up;
8593
8594         memset(h->ioaccel_cmd_pool, 0,
8595                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8596         return 0;
8597
8598 clean_up:
8599         hpsa_free_ioaccel1_cmd_and_bft(h);
8600         return -ENOMEM;
8601 }
8602
8603 /* Free ioaccel2 mode command blocks and block fetch table */
8604 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8605 {
8606         hpsa_free_ioaccel2_sg_chain_blocks(h);
8607
8608         if (h->ioaccel2_cmd_pool) {
8609                 pci_free_consistent(h->pdev,
8610                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8611                         h->ioaccel2_cmd_pool,
8612                         h->ioaccel2_cmd_pool_dhandle);
8613                 h->ioaccel2_cmd_pool = NULL;
8614                 h->ioaccel2_cmd_pool_dhandle = 0;
8615         }
8616         kfree(h->ioaccel2_blockFetchTable);
8617         h->ioaccel2_blockFetchTable = NULL;
8618 }
8619
8620 /* Allocate ioaccel2 mode command blocks and block fetch table */
8621 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8622 {
8623         int rc;
8624
8625         /* Allocate ioaccel2 mode command blocks and block fetch table */
8626
8627         h->ioaccel_maxsg =
8628                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8629         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8630                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8631
8632         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8633                         IOACCEL2_COMMANDLIST_ALIGNMENT);
8634         h->ioaccel2_cmd_pool =
8635                 pci_alloc_consistent(h->pdev,
8636                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8637                         &(h->ioaccel2_cmd_pool_dhandle));
8638
8639         h->ioaccel2_blockFetchTable =
8640                 kmalloc(((h->ioaccel_maxsg + 1) *
8641                                 sizeof(u32)), GFP_KERNEL);
8642
8643         if ((h->ioaccel2_cmd_pool == NULL) ||
8644                 (h->ioaccel2_blockFetchTable == NULL)) {
8645                 rc = -ENOMEM;
8646                 goto clean_up;
8647         }
8648
8649         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8650         if (rc)
8651                 goto clean_up;
8652
8653         memset(h->ioaccel2_cmd_pool, 0,
8654                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8655         return 0;
8656
8657 clean_up:
8658         hpsa_free_ioaccel2_cmd_and_bft(h);
8659         return rc;
8660 }
8661
8662 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8663 static void hpsa_free_performant_mode(struct ctlr_info *h)
8664 {
8665         kfree(h->blockFetchTable);
8666         h->blockFetchTable = NULL;
8667         hpsa_free_reply_queues(h);
8668         hpsa_free_ioaccel1_cmd_and_bft(h);
8669         hpsa_free_ioaccel2_cmd_and_bft(h);
8670 }
8671
8672 /* return -ENODEV on error, 0 on success (or no action)
8673  * allocates numerous items that must be freed later
8674  */
8675 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8676 {
8677         u32 trans_support;
8678         unsigned long transMethod = CFGTBL_Trans_Performant |
8679                                         CFGTBL_Trans_use_short_tags;
8680         int i, rc;
8681
8682         if (hpsa_simple_mode)
8683                 return 0;
8684
8685         trans_support = readl(&(h->cfgtable->TransportSupport));
8686         if (!(trans_support & PERFORMANT_MODE))
8687                 return 0;
8688
8689         /* Check for I/O accelerator mode support */
8690         if (trans_support & CFGTBL_Trans_io_accel1) {
8691                 transMethod |= CFGTBL_Trans_io_accel1 |
8692                                 CFGTBL_Trans_enable_directed_msix;
8693                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
8694                 if (rc)
8695                         return rc;
8696         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8697                 transMethod |= CFGTBL_Trans_io_accel2 |
8698                                 CFGTBL_Trans_enable_directed_msix;
8699                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
8700                 if (rc)
8701                         return rc;
8702         }
8703
8704         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
8705         hpsa_get_max_perf_mode_cmds(h);
8706         /* Performant mode ring buffer and supporting data structures */
8707         h->reply_queue_size = h->max_commands * sizeof(u64);
8708
8709         for (i = 0; i < h->nreply_queues; i++) {
8710                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
8711                                                 h->reply_queue_size,
8712                                                 &(h->reply_queue[i].busaddr));
8713                 if (!h->reply_queue[i].head) {
8714                         rc = -ENOMEM;
8715                         goto clean1;    /* rq, ioaccel */
8716                 }
8717                 h->reply_queue[i].size = h->max_commands;
8718                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
8719                 h->reply_queue[i].current_entry = 0;
8720         }
8721
8722         /* Need a block fetch table for performant mode */
8723         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
8724                                 sizeof(u32)), GFP_KERNEL);
8725         if (!h->blockFetchTable) {
8726                 rc = -ENOMEM;
8727                 goto clean1;    /* rq, ioaccel */
8728         }
8729
8730         rc = hpsa_enter_performant_mode(h, trans_support);
8731         if (rc)
8732                 goto clean2;    /* bft, rq, ioaccel */
8733         return 0;
8734
8735 clean2: /* bft, rq, ioaccel */
8736         kfree(h->blockFetchTable);
8737         h->blockFetchTable = NULL;
8738 clean1: /* rq, ioaccel */
8739         hpsa_free_reply_queues(h);
8740         hpsa_free_ioaccel1_cmd_and_bft(h);
8741         hpsa_free_ioaccel2_cmd_and_bft(h);
8742         return rc;
8743 }
8744
8745 static int is_accelerated_cmd(struct CommandList *c)
8746 {
8747         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
8748 }
8749
8750 static void hpsa_drain_accel_commands(struct ctlr_info *h)
8751 {
8752         struct CommandList *c = NULL;
8753         int i, accel_cmds_out;
8754         int refcount;
8755
8756         do { /* wait for all outstanding ioaccel commands to drain out */
8757                 accel_cmds_out = 0;
8758                 for (i = 0; i < h->nr_cmds; i++) {
8759                         c = h->cmd_pool + i;
8760                         refcount = atomic_inc_return(&c->refcount);
8761                         if (refcount > 1) /* Command is allocated */
8762                                 accel_cmds_out += is_accelerated_cmd(c);
8763                         cmd_free(h, c);
8764                 }
8765                 if (accel_cmds_out <= 0)
8766                         break;
8767                 msleep(100);
8768         } while (1);
8769 }
8770
8771 /*
8772  *  This is it.  Register the PCI driver information for the cards we control
8773  *  the OS will call our registered routines when it finds one of our cards.
8774  */
8775 static int __init hpsa_init(void)
8776 {
8777         return pci_register_driver(&hpsa_pci_driver);
8778 }
8779
8780 static void __exit hpsa_cleanup(void)
8781 {
8782         pci_unregister_driver(&hpsa_pci_driver);
8783 }
8784
8785 static void __attribute__((unused)) verify_offsets(void)
8786 {
8787 #define VERIFY_OFFSET(member, offset) \
8788         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8789
8790         VERIFY_OFFSET(structure_size, 0);
8791         VERIFY_OFFSET(volume_blk_size, 4);
8792         VERIFY_OFFSET(volume_blk_cnt, 8);
8793         VERIFY_OFFSET(phys_blk_shift, 16);
8794         VERIFY_OFFSET(parity_rotation_shift, 17);
8795         VERIFY_OFFSET(strip_size, 18);
8796         VERIFY_OFFSET(disk_starting_blk, 20);
8797         VERIFY_OFFSET(disk_blk_cnt, 28);
8798         VERIFY_OFFSET(data_disks_per_row, 36);
8799         VERIFY_OFFSET(metadata_disks_per_row, 38);
8800         VERIFY_OFFSET(row_cnt, 40);
8801         VERIFY_OFFSET(layout_map_count, 42);
8802         VERIFY_OFFSET(flags, 44);
8803         VERIFY_OFFSET(dekindex, 46);
8804         /* VERIFY_OFFSET(reserved, 48 */
8805         VERIFY_OFFSET(data, 64);
8806
8807 #undef VERIFY_OFFSET
8808
8809 #define VERIFY_OFFSET(member, offset) \
8810         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8811
8812         VERIFY_OFFSET(IU_type, 0);
8813         VERIFY_OFFSET(direction, 1);
8814         VERIFY_OFFSET(reply_queue, 2);
8815         /* VERIFY_OFFSET(reserved1, 3);  */
8816         VERIFY_OFFSET(scsi_nexus, 4);
8817         VERIFY_OFFSET(Tag, 8);
8818         VERIFY_OFFSET(cdb, 16);
8819         VERIFY_OFFSET(cciss_lun, 32);
8820         VERIFY_OFFSET(data_len, 40);
8821         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8822         VERIFY_OFFSET(sg_count, 45);
8823         /* VERIFY_OFFSET(reserved3 */
8824         VERIFY_OFFSET(err_ptr, 48);
8825         VERIFY_OFFSET(err_len, 56);
8826         /* VERIFY_OFFSET(reserved4  */
8827         VERIFY_OFFSET(sg, 64);
8828
8829 #undef VERIFY_OFFSET
8830
8831 #define VERIFY_OFFSET(member, offset) \
8832         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8833
8834         VERIFY_OFFSET(dev_handle, 0x00);
8835         VERIFY_OFFSET(reserved1, 0x02);
8836         VERIFY_OFFSET(function, 0x03);
8837         VERIFY_OFFSET(reserved2, 0x04);
8838         VERIFY_OFFSET(err_info, 0x0C);
8839         VERIFY_OFFSET(reserved3, 0x10);
8840         VERIFY_OFFSET(err_info_len, 0x12);
8841         VERIFY_OFFSET(reserved4, 0x13);
8842         VERIFY_OFFSET(sgl_offset, 0x14);
8843         VERIFY_OFFSET(reserved5, 0x15);
8844         VERIFY_OFFSET(transfer_len, 0x1C);
8845         VERIFY_OFFSET(reserved6, 0x20);
8846         VERIFY_OFFSET(io_flags, 0x24);
8847         VERIFY_OFFSET(reserved7, 0x26);
8848         VERIFY_OFFSET(LUN, 0x34);
8849         VERIFY_OFFSET(control, 0x3C);
8850         VERIFY_OFFSET(CDB, 0x40);
8851         VERIFY_OFFSET(reserved8, 0x50);
8852         VERIFY_OFFSET(host_context_flags, 0x60);
8853         VERIFY_OFFSET(timeout_sec, 0x62);
8854         VERIFY_OFFSET(ReplyQueue, 0x64);
8855         VERIFY_OFFSET(reserved9, 0x65);
8856         VERIFY_OFFSET(tag, 0x68);
8857         VERIFY_OFFSET(host_addr, 0x70);
8858         VERIFY_OFFSET(CISS_LUN, 0x78);
8859         VERIFY_OFFSET(SG, 0x78 + 8);
8860 #undef VERIFY_OFFSET
8861 }
8862
8863 module_init(hpsa_init);
8864 module_exit(hpsa_cleanup);