2 * DTC controller, taken from T128 driver by...
3 * Copyright 1993, Drew Eckhardt
5 * (Unix and Linux consulting and custom programming)
9 * DISTRIBUTION RELEASE 2.
11 * For more information, please consult
18 * SCSI Protocol Controller
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
32 #define DTCDEBUG_INIT 0x1
33 #define DTCDEBUG_TRANSFER 0x2
35 static int dtc_abort(Scsi_Cmnd *);
36 static int dtc_biosparam(struct scsi_device *, struct block_device *,
38 static int dtc_detect(struct scsi_host_template *);
39 static int dtc_queue_command(struct Scsi_Host *, struct scsi_cmnd *);
40 static int dtc_bus_reset(Scsi_Cmnd *);
50 #define NCR5380_implementation_fields \
53 #define NCR5380_local_declare() \
56 #define NCR5380_setup(instance) \
57 base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
59 #define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
61 #define dbNCR5380_read(reg) \
62 (rval=readb(DTC_address(reg)), \
63 (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
64 , (reg), DTC_address(reg), rval)), rval ) )
66 #define dbNCR5380_write(reg, value) do { \
67 printk("DTC : write %02x to register %d at address %p\n", \
68 (value), (reg), DTC_address(reg)); \
69 writeb(value, DTC_address(reg));} while(0)
72 #if !(DTCDEBUG & DTCDEBUG_TRANSFER)
73 #define NCR5380_read(reg) (readb(DTC_address(reg)))
74 #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
76 #define NCR5380_read(reg) (readb(DTC_address(reg)))
77 #define xNCR5380_read(reg) \
78 (((unsigned char) printk("DTC : read register %d at address %p\n"\
79 , (reg), DTC_address(reg))), readb(DTC_address(reg)))
81 #define NCR5380_write(reg, value) do { \
82 printk("DTC : write %02x to register %d at address %p\n", \
83 (value), (reg), DTC_address(reg)); \
84 writeb(value, DTC_address(reg));} while(0)
87 #define NCR5380_intr dtc_intr
88 #define NCR5380_queue_command dtc_queue_command
89 #define NCR5380_abort dtc_abort
90 #define NCR5380_bus_reset dtc_bus_reset
91 #define NCR5380_show_info dtc_show_info
92 #define NCR5380_write_info dtc_write_info
95 1001 1100 0000 0000 */
97 #define DTC_IRQS 0x9c00
100 #endif /* DTC3280_H */