drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2015 Avago Technologies
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@avagotech.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@avagotech.com
  14  *
  15  * Avago Technologies
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32
  33 #include <scsi/libiscsi.h>
  34 #include <scsi/scsi_bsg_iscsi.h>
  35 #include <scsi/scsi_netlink.h>
  36 #include <scsi/scsi_transport_iscsi.h>
  37 #include <scsi/scsi_transport.h>
  38 #include <scsi/scsi_cmnd.h>
  39 #include <scsi/scsi_device.h>
  40 #include <scsi/scsi_host.h>
  41 #include <scsi/scsi.h>
  42 #include "be_main.h"
  43 #include "be_iscsi.h"
  44 #include "be_mgmt.h"
  45 #include "be_cmds.h"
  46
  47 static unsigned int be_iopoll_budget = 10;
  48 static unsigned int be_max_phys_size = 64;
  49 static unsigned int enable_msix = 1;
  50
  51 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  52 MODULE_VERSION(BUILD_STR);
  53 MODULE_AUTHOR("Avago Technologies");
  54 MODULE_LICENSE("GPL");
  55 module_param(be_iopoll_budget, int, 0);
  56 module_param(enable_msix, int, 0);
  57 module_param(be_max_phys_size, uint, S_IRUGO);
  58 MODULE_PARM_DESC(be_max_phys_size,
  59                 "Maximum Size (In Kilobytes) of physically contiguous "
  60                 "memory that can be allocated. Range is 16 - 128");
  61
  62 #define beiscsi_disp_param(_name)\
  63 ssize_t \
  64 beiscsi_##_name##_disp(struct device *dev,\
  65                         struct device_attribute *attrib, char *buf)     \
  66 {       \
  67         struct Scsi_Host *shost = class_to_shost(dev);\
  68         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  69         uint32_t param_val = 0; \
  70         param_val = phba->attr_##_name;\
  71         return snprintf(buf, PAGE_SIZE, "%d\n",\
  72                         phba->attr_##_name);\
  73 }
  74
  75 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  76 int \
  77 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  78 {\
  79         if (val >= _minval && val <= _maxval) {\
  80                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  81                             "BA_%d : beiscsi_"#_name" updated "\
  82                             "from 0x%x ==> 0x%x\n",\
  83                             phba->attr_##_name, val); \
  84                 phba->attr_##_name = val;\
  85                 return 0;\
  86         } \
  87         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  88                     "BA_%d beiscsi_"#_name" attribute "\
  89                     "cannot be updated to 0x%x, "\
  90                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  91                 return -EINVAL;\
  92 }
  93
  94 #define beiscsi_store_param(_name)  \
  95 ssize_t \
  96 beiscsi_##_name##_store(struct device *dev,\
  97                          struct device_attribute *attr, const char *buf,\
  98                          size_t count) \
  99 { \
 100         struct Scsi_Host  *shost = class_to_shost(dev);\
 101         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 102         uint32_t param_val = 0;\
 103         if (!isdigit(buf[0]))\
 104                 return -EINVAL;\
 105         if (sscanf(buf, "%i", &param_val) != 1)\
 106                 return -EINVAL;\
 107         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 108                 return strlen(buf);\
 109         else \
 110                 return -EINVAL;\
 111 }
 112
 113 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 114 int \
 115 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 116 { \
 117         if (val >= _minval && val <= _maxval) {\
 118                 phba->attr_##_name = val;\
 119                 return 0;\
 120         } \
 121         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 122                     "BA_%d beiscsi_"#_name" attribute " \
 123                     "cannot be updated to 0x%x, "\
 124                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 125         phba->attr_##_name = _defval;\
 126         return -EINVAL;\
 127 }
 128
 129 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 130 static uint beiscsi_##_name = _defval;\
 131 module_param(beiscsi_##_name, uint, S_IRUGO);\
 132 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 133 beiscsi_disp_param(_name)\
 134 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 135 beiscsi_store_param(_name)\
 136 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 137 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 138               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 139
 140 /*
 141  * When new log level added update the
 142  * the MAX allowed value for log_enable
 143  */
 144 BEISCSI_RW_ATTR(log_enable, 0x00,
 145                 0xFF, 0x00, "Enable logging Bit Mask\n"
 146                 "\t\t\t\tInitialization Events  : 0x01\n"
 147                 "\t\t\t\tMailbox Events         : 0x02\n"
 148                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 149                 "\t\t\t\tError Handling         : 0x08\n"
 150                 "\t\t\t\tIO Path Events         : 0x10\n"
 151                 "\t\t\t\tConfiguration Path     : 0x20\n"
 152                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 153
 154 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 155 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 156 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 157 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 158 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 159              beiscsi_active_session_disp, NULL);
 160 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 161              beiscsi_free_session_disp, NULL);
 162 struct device_attribute *beiscsi_attrs[] = {
 163         &dev_attr_beiscsi_log_enable,
 164         &dev_attr_beiscsi_drvr_ver,
 165         &dev_attr_beiscsi_adapter_family,
 166         &dev_attr_beiscsi_fw_ver,
 167         &dev_attr_beiscsi_active_session_count,
 168         &dev_attr_beiscsi_free_session_count,
 169         &dev_attr_beiscsi_phys_port,
 170         NULL,
 171 };
 172
 173 static char const *cqe_desc[] = {
 174         "RESERVED_DESC",
 175         "SOL_CMD_COMPLETE",
 176         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 177         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 178         "CXN_KILLED_BURST_LEN_MISMATCH",
 179         "CXN_KILLED_AHS_RCVD",
 180         "CXN_KILLED_HDR_DIGEST_ERR",
 181         "CXN_KILLED_UNKNOWN_HDR",
 182         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 183         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 184         "CXN_KILLED_RST_RCVD",
 185         "CXN_KILLED_TIMED_OUT",
 186         "CXN_KILLED_RST_SENT",
 187         "CXN_KILLED_FIN_RCVD",
 188         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 189         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 190         "CXN_KILLED_OVER_RUN_RESIDUAL",
 191         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 192         "CMD_KILLED_INVALID_STATSN_RCVD",
 193         "CMD_KILLED_INVALID_R2T_RCVD",
 194         "CMD_CXN_KILLED_LUN_INVALID",
 195         "CMD_CXN_KILLED_ICD_INVALID",
 196         "CMD_CXN_KILLED_ITT_INVALID",
 197         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 198         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 199         "CXN_INVALIDATE_NOTIFY",
 200         "CXN_INVALIDATE_INDEX_NOTIFY",
 201         "CMD_INVALIDATED_NOTIFY",
 202         "UNSOL_HDR_NOTIFY",
 203         "UNSOL_DATA_NOTIFY",
 204         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 205         "DRIVERMSG_NOTIFY",
 206         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 207         "SOL_CMD_KILLED_DIF_ERR",
 208         "CXN_KILLED_SYN_RCVD",
 209         "CXN_KILLED_IMM_DATA_RCVD"
 210 };
 211
 212 static int beiscsi_slave_configure(struct scsi_device *sdev)
 213 {
 214         blk_queue_max_segment_size(sdev->request_queue, 65536);
 215         return 0;
 216 }
 217
 218 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 219 {
 220         struct iscsi_cls_session *cls_session;
 221         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 222         struct beiscsi_io_task *aborted_io_task;
 223         struct iscsi_conn *conn;
 224         struct beiscsi_conn *beiscsi_conn;
 225         struct beiscsi_hba *phba;
 226         struct iscsi_session *session;
 227         struct invalidate_command_table *inv_tbl;
 228         struct be_dma_mem nonemb_cmd;
 229         unsigned int cid, tag, num_invalidate;
 230         int rc;
 231
 232         cls_session = starget_to_session(scsi_target(sc->device));
 233         session = cls_session->dd_data;
 234
 235         spin_lock_bh(&session->frwd_lock);
 236         if (!aborted_task || !aborted_task->sc) {
 237                 /* we raced */
 238                 spin_unlock_bh(&session->frwd_lock);
 239                 return SUCCESS;
 240         }
 241
 242         aborted_io_task = aborted_task->dd_data;
 243         if (!aborted_io_task->scsi_cmnd) {
 244                 /* raced or invalid command */
 245                 spin_unlock_bh(&session->frwd_lock);
 246                 return SUCCESS;
 247         }
 248         spin_unlock_bh(&session->frwd_lock);
 249         /* Invalidate WRB Posted for this Task */
 250         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 251                       aborted_io_task->pwrb_handle->pwrb,
 252                       1);
 253
 254         conn = aborted_task->conn;
 255         beiscsi_conn = conn->dd_data;
 256         phba = beiscsi_conn->phba;
 257
 258         /* invalidate iocb */
 259         cid = beiscsi_conn->beiscsi_conn_cid;
 260         inv_tbl = phba->inv_tbl;
 261         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 262         inv_tbl->cid = cid;
 263         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 264         num_invalidate = 1;
 265         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 266                                 sizeof(struct invalidate_commands_params_in),
 267                                 &nonemb_cmd.dma);
 268         if (nonemb_cmd.va == NULL) {
 269                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 270                             "BM_%d : Failed to allocate memory for"
 271                             "mgmt_invalidate_icds\n");
 272                 return FAILED;
 273         }
 274         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 275
 276         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 277                                    cid, &nonemb_cmd);
 278         if (!tag) {
 279                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 280                             "BM_%d : mgmt_invalidate_icds could not be"
 281                             "submitted\n");
 282                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 283                                     nonemb_cmd.va, nonemb_cmd.dma);
 284
 285                 return FAILED;
 286         }
 287
 288         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 289         if (rc != -EBUSY)
 290                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 291                                     nonemb_cmd.va, nonemb_cmd.dma);
 292
 293         return iscsi_eh_abort(sc);
 294 }
 295
 296 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 297 {
 298         struct iscsi_task *abrt_task;
 299         struct beiscsi_io_task *abrt_io_task;
 300         struct iscsi_conn *conn;
 301         struct beiscsi_conn *beiscsi_conn;
 302         struct beiscsi_hba *phba;
 303         struct iscsi_session *session;
 304         struct iscsi_cls_session *cls_session;
 305         struct invalidate_command_table *inv_tbl;
 306         struct be_dma_mem nonemb_cmd;
 307         unsigned int cid, tag, i, num_invalidate;
 308         int rc;
 309
 310         /* invalidate iocbs */
 311         cls_session = starget_to_session(scsi_target(sc->device));
 312         session = cls_session->dd_data;
 313         spin_lock_bh(&session->frwd_lock);
 314         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 315                 spin_unlock_bh(&session->frwd_lock);
 316                 return FAILED;
 317         }
 318         conn = session->leadconn;
 319         beiscsi_conn = conn->dd_data;
 320         phba = beiscsi_conn->phba;
 321         cid = beiscsi_conn->beiscsi_conn_cid;
 322         inv_tbl = phba->inv_tbl;
 323         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 324         num_invalidate = 0;
 325         for (i = 0; i < conn->session->cmds_max; i++) {
 326                 abrt_task = conn->session->cmds[i];
 327                 abrt_io_task = abrt_task->dd_data;
 328                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 329                         continue;
 330
 331                 if (sc->device->lun != abrt_task->sc->device->lun)
 332                         continue;
 333
 334                 /* Invalidate WRB Posted for this Task */
 335                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 336                               abrt_io_task->pwrb_handle->pwrb,
 337                               1);
 338
 339                 inv_tbl->cid = cid;
 340                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 341                 num_invalidate++;
 342                 inv_tbl++;
 343         }
 344         spin_unlock_bh(&session->frwd_lock);
 345         inv_tbl = phba->inv_tbl;
 346
 347         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 348                                 sizeof(struct invalidate_commands_params_in),
 349                                 &nonemb_cmd.dma);
 350         if (nonemb_cmd.va == NULL) {
 351                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 352                             "BM_%d : Failed to allocate memory for"
 353                             "mgmt_invalidate_icds\n");
 354                 return FAILED;
 355         }
 356         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 357         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 358         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 359                                    cid, &nonemb_cmd);
 360         if (!tag) {
 361                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 362                             "BM_%d : mgmt_invalidate_icds could not be"
 363                             " submitted\n");
 364                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 365                                     nonemb_cmd.va, nonemb_cmd.dma);
 366                 return FAILED;
 367         }
 368
 369         rc = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
 370         if (rc != -EBUSY)
 371                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 372                                     nonemb_cmd.va, nonemb_cmd.dma);
 373         return iscsi_eh_device_reset(sc);
 374 }
 375
 376 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 377 {
 378         struct beiscsi_hba *phba = data;
 379         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 380         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 381         char *str = buf;
 382         int rc;
 383
 384         switch (type) {
 385         case ISCSI_BOOT_TGT_NAME:
 386                 rc = sprintf(buf, "%.*s\n",
 387                             (int)strlen(boot_sess->target_name),
 388                             (char *)&boot_sess->target_name);
 389                 break;
 390         case ISCSI_BOOT_TGT_IP_ADDR:
 391                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 392                         rc = sprintf(buf, "%pI4\n",
 393                                 (char *)&boot_conn->dest_ipaddr.addr);
 394                 else
 395                         rc = sprintf(str, "%pI6\n",
 396                                 (char *)&boot_conn->dest_ipaddr.addr);
 397                 break;
 398         case ISCSI_BOOT_TGT_PORT:
 399                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 400                 break;
 401
 402         case ISCSI_BOOT_TGT_CHAP_NAME:
 403                 rc = sprintf(str,  "%.*s\n",
 404                              boot_conn->negotiated_login_options.auth_data.chap.
 405                              target_chap_name_length,
 406                              (char *)&boot_conn->negotiated_login_options.
 407                              auth_data.chap.target_chap_name);
 408                 break;
 409         case ISCSI_BOOT_TGT_CHAP_SECRET:
 410                 rc = sprintf(str,  "%.*s\n",
 411                              boot_conn->negotiated_login_options.auth_data.chap.
 412                              target_secret_length,
 413                              (char *)&boot_conn->negotiated_login_options.
 414                              auth_data.chap.target_secret);
 415                 break;
 416         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 417                 rc = sprintf(str,  "%.*s\n",
 418                              boot_conn->negotiated_login_options.auth_data.chap.
 419                              intr_chap_name_length,
 420                              (char *)&boot_conn->negotiated_login_options.
 421                              auth_data.chap.intr_chap_name);
 422                 break;
 423         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 424                 rc = sprintf(str,  "%.*s\n",
 425                              boot_conn->negotiated_login_options.auth_data.chap.
 426                              intr_secret_length,
 427                              (char *)&boot_conn->negotiated_login_options.
 428                              auth_data.chap.intr_secret);
 429                 break;
 430         case ISCSI_BOOT_TGT_FLAGS:
 431                 rc = sprintf(str, "2\n");
 432                 break;
 433         case ISCSI_BOOT_TGT_NIC_ASSOC:
 434                 rc = sprintf(str, "0\n");
 435                 break;
 436         default:
 437                 rc = -ENOSYS;
 438                 break;
 439         }
 440         return rc;
 441 }
 442
 443 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 444 {
 445         struct beiscsi_hba *phba = data;
 446         char *str = buf;
 447         int rc;
 448
 449         switch (type) {
 450         case ISCSI_BOOT_INI_INITIATOR_NAME:
 451                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 452                 break;
 453         default:
 454                 rc = -ENOSYS;
 455                 break;
 456         }
 457         return rc;
 458 }
 459
 460 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 461 {
 462         struct beiscsi_hba *phba = data;
 463         char *str = buf;
 464         int rc;
 465
 466         switch (type) {
 467         case ISCSI_BOOT_ETH_FLAGS:
 468                 rc = sprintf(str, "2\n");
 469                 break;
 470         case ISCSI_BOOT_ETH_INDEX:
 471                 rc = sprintf(str, "0\n");
 472                 break;
 473         case ISCSI_BOOT_ETH_MAC:
 474                 rc  = beiscsi_get_macaddr(str, phba);
 475                 break;
 476         default:
 477                 rc = -ENOSYS;
 478                 break;
 479         }
 480         return rc;
 481 }
 482
 483
 484 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 485 {
 486         umode_t rc;
 487
 488         switch (type) {
 489         case ISCSI_BOOT_TGT_NAME:
 490         case ISCSI_BOOT_TGT_IP_ADDR:
 491         case ISCSI_BOOT_TGT_PORT:
 492         case ISCSI_BOOT_TGT_CHAP_NAME:
 493         case ISCSI_BOOT_TGT_CHAP_SECRET:
 494         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 495         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 496         case ISCSI_BOOT_TGT_NIC_ASSOC:
 497         case ISCSI_BOOT_TGT_FLAGS:
 498                 rc = S_IRUGO;
 499                 break;
 500         default:
 501                 rc = 0;
 502                 break;
 503         }
 504         return rc;
 505 }
 506
 507 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 508 {
 509         umode_t rc;
 510
 511         switch (type) {
 512         case ISCSI_BOOT_INI_INITIATOR_NAME:
 513                 rc = S_IRUGO;
 514                 break;
 515         default:
 516                 rc = 0;
 517                 break;
 518         }
 519         return rc;
 520 }
 521
 522
 523 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 524 {
 525         umode_t rc;
 526
 527         switch (type) {
 528         case ISCSI_BOOT_ETH_FLAGS:
 529         case ISCSI_BOOT_ETH_MAC:
 530         case ISCSI_BOOT_ETH_INDEX:
 531                 rc = S_IRUGO;
 532                 break;
 533         default:
 534                 rc = 0;
 535                 break;
 536         }
 537         return rc;
 538 }
 539
 540 /*------------------- PCI Driver operations and data ----------------- */
 541 static const struct pci_device_id beiscsi_pci_id_table[] = {
 542         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 543         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 544         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 545         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 546         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 547         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 548         { 0 }
 549 };
 550 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 551
 552
 553 static struct scsi_host_template beiscsi_sht = {
 554         .module = THIS_MODULE,
 555         .name = "Avago Technologies 10Gbe open-iscsi Initiator Driver",
 556         .proc_name = DRV_NAME,
 557         .queuecommand = iscsi_queuecommand,
 558         .change_queue_depth = scsi_change_queue_depth,
 559         .slave_configure = beiscsi_slave_configure,
 560         .target_alloc = iscsi_target_alloc,
 561         .eh_abort_handler = beiscsi_eh_abort,
 562         .eh_device_reset_handler = beiscsi_eh_device_reset,
 563         .eh_target_reset_handler = iscsi_eh_session_reset,
 564         .shost_attrs = beiscsi_attrs,
 565         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 566         .can_queue = BE2_IO_DEPTH,
 567         .this_id = -1,
 568         .max_sectors = BEISCSI_MAX_SECTORS,
 569         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 570         .use_clustering = ENABLE_CLUSTERING,
 571         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 572         .track_queue_depth = 1,
 573 };
 574
 575 static struct scsi_transport_template *beiscsi_scsi_transport;
 576
 577 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 578 {
 579         struct beiscsi_hba *phba;
 580         struct Scsi_Host *shost;
 581
 582         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 583         if (!shost) {
 584                 dev_err(&pcidev->dev,
 585                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 586                 return NULL;
 587         }
 588         shost->max_id = BE2_MAX_SESSIONS;
 589         shost->max_channel = 0;
 590         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 591         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 592         shost->transportt = beiscsi_scsi_transport;
 593         phba = iscsi_host_priv(shost);
 594         memset(phba, 0, sizeof(*phba));
 595         phba->shost = shost;
 596         phba->pcidev = pci_dev_get(pcidev);
 597         pci_set_drvdata(pcidev, phba);
 598         phba->interface_handle = 0xFFFFFFFF;
 599
 600         return phba;
 601 }
 602
 603 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 604 {
 605         if (phba->csr_va) {
 606                 iounmap(phba->csr_va);
 607                 phba->csr_va = NULL;
 608         }
 609         if (phba->db_va) {
 610                 iounmap(phba->db_va);
 611                 phba->db_va = NULL;
 612         }
 613         if (phba->pci_va) {
 614                 iounmap(phba->pci_va);
 615                 phba->pci_va = NULL;
 616         }
 617 }
 618
 619 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 620                                 struct pci_dev *pcidev)
 621 {
 622         u8 __iomem *addr;
 623         int pcicfg_reg;
 624
 625         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 626                                pci_resource_len(pcidev, 2));
 627         if (addr == NULL)
 628                 return -ENOMEM;
 629         phba->ctrl.csr = addr;
 630         phba->csr_va = addr;
 631         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 632
 633         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 634         if (addr == NULL)
 635                 goto pci_map_err;
 636         phba->ctrl.db = addr;
 637         phba->db_va = addr;
 638         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 639
 640         if (phba->generation == BE_GEN2)
 641                 pcicfg_reg = 1;
 642         else
 643                 pcicfg_reg = 0;
 644
 645         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 646                                pci_resource_len(pcidev, pcicfg_reg));
 647
 648         if (addr == NULL)
 649                 goto pci_map_err;
 650         phba->ctrl.pcicfg = addr;
 651         phba->pci_va = addr;
 652         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 653         return 0;
 654
 655 pci_map_err:
 656         beiscsi_unmap_pci_function(phba);
 657         return -ENOMEM;
 658 }
 659
 660 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 661 {
 662         int ret;
 663
 664         ret = pci_enable_device(pcidev);
 665         if (ret) {
 666                 dev_err(&pcidev->dev,
 667                         "beiscsi_enable_pci - enable device failed\n");
 668                 return ret;
 669         }
 670
 671         pci_set_master(pcidev);
 672         ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
 673         if (ret) {
 674                 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
 675                 if (ret) {
 676                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 677                         pci_disable_device(pcidev);
 678                         return ret;
 679                 } else {
 680                         ret = pci_set_consistent_dma_mask(pcidev,
 681                                                           DMA_BIT_MASK(32));
 682                 }
 683         } else {
 684                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
 685                 if (ret) {
 686                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 687                         pci_disable_device(pcidev);
 688                         return ret;
 689                 }
 690         }
 691         return 0;
 692 }
 693
 694 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 695 {
 696         struct be_ctrl_info *ctrl = &phba->ctrl;
 697         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 698         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 699         int status = 0;
 700
 701         ctrl->pdev = pdev;
 702         status = beiscsi_map_pci_bars(phba, pdev);
 703         if (status)
 704                 return status;
 705         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 706         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 707                                                   mbox_mem_alloc->size,
 708                                                   &mbox_mem_alloc->dma);
 709         if (!mbox_mem_alloc->va) {
 710                 beiscsi_unmap_pci_function(phba);
 711                 return -ENOMEM;
 712         }
 713
 714         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 715         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 716         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 717         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 718         spin_lock_init(&ctrl->mbox_lock);
 719         spin_lock_init(&phba->ctrl.mcc_lock);
 720         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 721
 722         return status;
 723 }
 724
 725 /**
 726  * beiscsi_get_params()- Set the config paramters
 727  * @phba: ptr  device priv structure
 728  **/
 729 static void beiscsi_get_params(struct beiscsi_hba *phba)
 730 {
 731         uint32_t total_cid_count = 0;
 732         uint32_t total_icd_count = 0;
 733         uint8_t ulp_num = 0;
 734
 735         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 736                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 737
 738         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 739                 uint32_t align_mask = 0;
 740                 uint32_t icd_post_per_page = 0;
 741                 uint32_t icd_count_unavailable = 0;
 742                 uint32_t icd_start = 0, icd_count = 0;
 743                 uint32_t icd_start_align = 0, icd_count_align = 0;
 744
 745                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 746                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 747                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 748
 749                         /* Get ICD count that can be posted on each page */
 750                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 751                                              sizeof(struct iscsi_sge)));
 752                         align_mask = (icd_post_per_page - 1);
 753
 754                         /* Check if icd_start is aligned ICD per page posting */
 755                         if (icd_start % icd_post_per_page) {
 756                                 icd_start_align = ((icd_start +
 757                                                     icd_post_per_page) &
 758                                                     ~(align_mask));
 759                                 phba->fw_config.
 760                                         iscsi_icd_start[ulp_num] =
 761                                         icd_start_align;
 762                         }
 763
 764                         icd_count_align = (icd_count & ~align_mask);
 765
 766                         /* ICD discarded in the process of alignment */
 767                         if (icd_start_align)
 768                                 icd_count_unavailable = ((icd_start_align -
 769                                                           icd_start) +
 770                                                          (icd_count -
 771                                                           icd_count_align));
 772
 773                         /* Updated ICD count available */
 774                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 775                                         icd_count_unavailable);
 776
 777                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 778                                         "BM_%d : Aligned ICD values\n"
 779                                         "\t ICD Start : %d\n"
 780                                         "\t ICD Count : %d\n"
 781                                         "\t ICD Discarded : %d\n",
 782                                         phba->fw_config.
 783                                         iscsi_icd_start[ulp_num],
 784                                         phba->fw_config.
 785                                         iscsi_icd_count[ulp_num],
 786                                         icd_count_unavailable);
 787                         break;
 788                 }
 789         }
 790
 791         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 792         phba->params.ios_per_ctrl = (total_icd_count -
 793                                     (total_cid_count +
 794                                      BE2_TMFS + BE2_NOPOUT_REQ));
 795         phba->params.cxns_per_ctrl = total_cid_count;
 796         phba->params.asyncpdus_per_ctrl = total_cid_count;
 797         phba->params.icds_per_ctrl = total_icd_count;
 798         phba->params.num_sge_per_io = BE2_SGE;
 799         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 800         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 801         phba->params.eq_timer = 64;
 802         phba->params.num_eq_entries = 1024;
 803         phba->params.num_cq_entries = 1024;
 804         phba->params.wrbs_per_cxn = 256;
 805 }
 806
 807 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 808                            unsigned int id, unsigned int clr_interrupt,
 809                            unsigned int num_processed,
 810                            unsigned char rearm, unsigned char event)
 811 {
 812         u32 val = 0;
 813
 814         if (rearm)
 815                 val |= 1 << DB_EQ_REARM_SHIFT;
 816         if (clr_interrupt)
 817                 val |= 1 << DB_EQ_CLR_SHIFT;
 818         if (event)
 819                 val |= 1 << DB_EQ_EVNT_SHIFT;
 820
 821         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 822         /* Setting lower order EQ_ID Bits */
 823         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 824
 825         /* Setting Higher order EQ_ID Bits */
 826         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 827                   DB_EQ_RING_ID_HIGH_MASK)
 828                   << DB_EQ_HIGH_SET_SHIFT);
 829
 830         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 831 }
 832
 833 /**
 834  * be_isr_mcc - The isr routine of the driver.
 835  * @irq: Not used
 836  * @dev_id: Pointer to host adapter structure
 837  */
 838 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 839 {
 840         struct beiscsi_hba *phba;
 841         struct be_eq_entry *eqe = NULL;
 842         struct be_queue_info *eq;
 843         struct be_queue_info *mcc;
 844         unsigned int num_eq_processed;
 845         struct be_eq_obj *pbe_eq;
 846         unsigned long flags;
 847
 848         pbe_eq = dev_id;
 849         eq = &pbe_eq->q;
 850         phba =  pbe_eq->phba;
 851         mcc = &phba->ctrl.mcc_obj.cq;
 852         eqe = queue_tail_node(eq);
 853
 854         num_eq_processed = 0;
 855
 856         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 857                                 & EQE_VALID_MASK) {
 858                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 859                      resource_id) / 32] &
 860                      EQE_RESID_MASK) >> 16) == mcc->id) {
 861                         spin_lock_irqsave(&phba->isr_lock, flags);
 862                         pbe_eq->todo_mcc_cq = true;
 863                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 864                 }
 865                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 866                 queue_tail_inc(eq);
 867                 eqe = queue_tail_node(eq);
 868                 num_eq_processed++;
 869         }
 870         if (pbe_eq->todo_mcc_cq)
 871                 queue_work(phba->wq, &pbe_eq->work_cqs);
 872         if (num_eq_processed)
 873                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 874
 875         return IRQ_HANDLED;
 876 }
 877
 878 /**
 879  * be_isr_msix - The isr routine of the driver.
 880  * @irq: Not used
 881  * @dev_id: Pointer to host adapter structure
 882  */
 883 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 884 {
 885         struct beiscsi_hba *phba;
 886         struct be_eq_entry *eqe = NULL;
 887         struct be_queue_info *eq;
 888         struct be_queue_info *cq;
 889         unsigned int num_eq_processed;
 890         struct be_eq_obj *pbe_eq;
 891
 892         pbe_eq = dev_id;
 893         eq = &pbe_eq->q;
 894         cq = pbe_eq->cq;
 895         eqe = queue_tail_node(eq);
 896
 897         phba = pbe_eq->phba;
 898         num_eq_processed = 0;
 899         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 900                                 & EQE_VALID_MASK) {
 901                 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 902                         blk_iopoll_sched(&pbe_eq->iopoll);
 903
 904                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 905                 queue_tail_inc(eq);
 906                 eqe = queue_tail_node(eq);
 907                 num_eq_processed++;
 908         }
 909
 910         if (num_eq_processed)
 911                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
 912
 913         return IRQ_HANDLED;
 914 }
 915
 916 /**
 917  * be_isr - The isr routine of the driver.
 918  * @irq: Not used
 919  * @dev_id: Pointer to host adapter structure
 920  */
 921 static irqreturn_t be_isr(int irq, void *dev_id)
 922 {
 923         struct beiscsi_hba *phba;
 924         struct hwi_controller *phwi_ctrlr;
 925         struct hwi_context_memory *phwi_context;
 926         struct be_eq_entry *eqe = NULL;
 927         struct be_queue_info *eq;
 928         struct be_queue_info *mcc;
 929         unsigned long flags, index;
 930         unsigned int num_mcceq_processed, num_ioeq_processed;
 931         struct be_ctrl_info *ctrl;
 932         struct be_eq_obj *pbe_eq;
 933         int isr;
 934
 935         phba = dev_id;
 936         ctrl = &phba->ctrl;
 937         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 938                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 939         if (!isr)
 940                 return IRQ_NONE;
 941
 942         phwi_ctrlr = phba->phwi_ctrlr;
 943         phwi_context = phwi_ctrlr->phwi_ctxt;
 944         pbe_eq = &phwi_context->be_eq[0];
 945
 946         eq = &phwi_context->be_eq[0].q;
 947         mcc = &phba->ctrl.mcc_obj.cq;
 948         index = 0;
 949         eqe = queue_tail_node(eq);
 950
 951         num_ioeq_processed = 0;
 952         num_mcceq_processed = 0;
 953         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 954                                 & EQE_VALID_MASK) {
 955                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 956                      resource_id) / 32] &
 957                      EQE_RESID_MASK) >> 16) == mcc->id) {
 958                         spin_lock_irqsave(&phba->isr_lock, flags);
 959                         pbe_eq->todo_mcc_cq = true;
 960                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 961                         num_mcceq_processed++;
 962                 } else {
 963                         if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 964                                 blk_iopoll_sched(&pbe_eq->iopoll);
 965                         num_ioeq_processed++;
 966                 }
 967                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 968                 queue_tail_inc(eq);
 969                 eqe = queue_tail_node(eq);
 970         }
 971         if (num_ioeq_processed || num_mcceq_processed) {
 972                 if (pbe_eq->todo_mcc_cq)
 973                         queue_work(phba->wq, &pbe_eq->work_cqs);
 974
 975                 if ((num_mcceq_processed) && (!num_ioeq_processed))
 976                         hwi_ring_eq_db(phba, eq->id, 0,
 977                                       (num_ioeq_processed +
 978                                        num_mcceq_processed) , 1, 1);
 979                 else
 980                         hwi_ring_eq_db(phba, eq->id, 0,
 981                                        (num_ioeq_processed +
 982                                         num_mcceq_processed), 0, 1);
 983
 984                 return IRQ_HANDLED;
 985         } else
 986                 return IRQ_NONE;
 987 }
 988
 989 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 990 {
 991         struct pci_dev *pcidev = phba->pcidev;
 992         struct hwi_controller *phwi_ctrlr;
 993         struct hwi_context_memory *phwi_context;
 994         int ret, msix_vec, i, j;
 995
 996         phwi_ctrlr = phba->phwi_ctrlr;
 997         phwi_context = phwi_ctrlr->phwi_ctxt;
 998
 999         if (phba->msix_enabled) {
1000                 for (i = 0; i < phba->num_cpus; i++) {
1001                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
1002                                                     GFP_KERNEL);
1003                         if (!phba->msi_name[i]) {
1004                                 ret = -ENOMEM;
1005                                 goto free_msix_irqs;
1006                         }
1007
1008                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
1009                                 phba->shost->host_no, i);
1010                         msix_vec = phba->msix_entries[i].vector;
1011                         ret = request_irq(msix_vec, be_isr_msix, 0,
1012                                           phba->msi_name[i],
1013                                           &phwi_context->be_eq[i]);
1014                         if (ret) {
1015                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1016                                             "BM_%d : beiscsi_init_irqs-Failed to"
1017                                             "register msix for i = %d\n",
1018                                             i);
1019                                 kfree(phba->msi_name[i]);
1020                                 goto free_msix_irqs;
1021                         }
1022                 }
1023                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
1024                 if (!phba->msi_name[i]) {
1025                         ret = -ENOMEM;
1026                         goto free_msix_irqs;
1027                 }
1028                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1029                         phba->shost->host_no);
1030                 msix_vec = phba->msix_entries[i].vector;
1031                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1032                                   &phwi_context->be_eq[i]);
1033                 if (ret) {
1034                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1035                                     "BM_%d : beiscsi_init_irqs-"
1036                                     "Failed to register beiscsi_msix_mcc\n");
1037                         kfree(phba->msi_name[i]);
1038                         goto free_msix_irqs;
1039                 }
1040
1041         } else {
1042                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1043                                   "beiscsi", phba);
1044                 if (ret) {
1045                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1046                                     "BM_%d : beiscsi_init_irqs-"
1047                                     "Failed to register irq\\n");
1048                         return ret;
1049                 }
1050         }
1051         return 0;
1052 free_msix_irqs:
1053         for (j = i - 1; j >= 0; j--) {
1054                 kfree(phba->msi_name[j]);
1055                 msix_vec = phba->msix_entries[j].vector;
1056                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1057         }
1058         return ret;
1059 }
1060
1061 void hwi_ring_cq_db(struct beiscsi_hba *phba,
1062                            unsigned int id, unsigned int num_processed,
1063                            unsigned char rearm, unsigned char event)
1064 {
1065         u32 val = 0;
1066
1067         if (rearm)
1068                 val |= 1 << DB_CQ_REARM_SHIFT;
1069
1070         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1071
1072         /* Setting lower order CQ_ID Bits */
1073         val |= (id & DB_CQ_RING_ID_LOW_MASK);
1074
1075         /* Setting Higher order CQ_ID Bits */
1076         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
1077                   DB_CQ_RING_ID_HIGH_MASK)
1078                   << DB_CQ_HIGH_SET_SHIFT);
1079
1080         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1081 }
1082
1083 static unsigned int
1084 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1085                           struct beiscsi_hba *phba,
1086                           struct pdu_base *ppdu,
1087                           unsigned long pdu_len,
1088                           void *pbuffer, unsigned long buf_len)
1089 {
1090         struct iscsi_conn *conn = beiscsi_conn->conn;
1091         struct iscsi_session *session = conn->session;
1092         struct iscsi_task *task;
1093         struct beiscsi_io_task *io_task;
1094         struct iscsi_hdr *login_hdr;
1095
1096         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1097                                                 PDUBASE_OPCODE_MASK) {
1098         case ISCSI_OP_NOOP_IN:
1099                 pbuffer = NULL;
1100                 buf_len = 0;
1101                 break;
1102         case ISCSI_OP_ASYNC_EVENT:
1103                 break;
1104         case ISCSI_OP_REJECT:
1105                 WARN_ON(!pbuffer);
1106                 WARN_ON(!(buf_len == 48));
1107                 beiscsi_log(phba, KERN_ERR,
1108                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1109                             "BM_%d : In ISCSI_OP_REJECT\n");
1110                 break;
1111         case ISCSI_OP_LOGIN_RSP:
1112         case ISCSI_OP_TEXT_RSP:
1113                 task = conn->login_task;
1114                 io_task = task->dd_data;
1115                 login_hdr = (struct iscsi_hdr *)ppdu;
1116                 login_hdr->itt = io_task->libiscsi_itt;
1117                 break;
1118         default:
1119                 beiscsi_log(phba, KERN_WARNING,
1120                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1121                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1122                             (ppdu->
1123                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1124                              & PDUBASE_OPCODE_MASK));
1125                 return 1;
1126         }
1127
1128         spin_lock_bh(&session->back_lock);
1129         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1130         spin_unlock_bh(&session->back_lock);
1131         return 0;
1132 }
1133
1134 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1135 {
1136         struct sgl_handle *psgl_handle;
1137
1138         if (phba->io_sgl_hndl_avbl) {
1139                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1140                             "BM_%d : In alloc_io_sgl_handle,"
1141                             " io_sgl_alloc_index=%d\n",
1142                             phba->io_sgl_alloc_index);
1143
1144                 psgl_handle = phba->io_sgl_hndl_base[phba->
1145                                                 io_sgl_alloc_index];
1146                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1147                 phba->io_sgl_hndl_avbl--;
1148                 if (phba->io_sgl_alloc_index == (phba->params.
1149                                                  ios_per_ctrl - 1))
1150                         phba->io_sgl_alloc_index = 0;
1151                 else
1152                         phba->io_sgl_alloc_index++;
1153         } else
1154                 psgl_handle = NULL;
1155         return psgl_handle;
1156 }
1157
1158 static void
1159 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1160 {
1161         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1162                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1163                     phba->io_sgl_free_index);
1164
1165         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1166                 /*
1167                  * this can happen if clean_task is called on a task that
1168                  * failed in xmit_task or alloc_pdu.
1169                  */
1170                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1171                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1172                              "value there=%p\n", phba->io_sgl_free_index,
1173                              phba->io_sgl_hndl_base
1174                              [phba->io_sgl_free_index]);
1175                 return;
1176         }
1177         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1178         phba->io_sgl_hndl_avbl++;
1179         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1180                 phba->io_sgl_free_index = 0;
1181         else
1182                 phba->io_sgl_free_index++;
1183 }
1184
1185 /**
1186  * alloc_wrb_handle - To allocate a wrb handle
1187  * @phba: The hba pointer
1188  * @cid: The cid to use for allocation
1189  *
1190  * This happens under session_lock until submission to chip
1191  */
1192 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1193 {
1194         struct hwi_wrb_context *pwrb_context;
1195         struct hwi_controller *phwi_ctrlr;
1196         struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1197         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1198
1199         phwi_ctrlr = phba->phwi_ctrlr;
1200         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1201         if (pwrb_context->wrb_handles_available >= 2) {
1202                 pwrb_handle = pwrb_context->pwrb_handle_base[
1203                                             pwrb_context->alloc_index];
1204                 pwrb_context->wrb_handles_available--;
1205                 if (pwrb_context->alloc_index ==
1206                                                 (phba->params.wrbs_per_cxn - 1))
1207                         pwrb_context->alloc_index = 0;
1208                 else
1209                         pwrb_context->alloc_index++;
1210                 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1211                                                 pwrb_context->alloc_index];
1212                 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1213         } else
1214                 pwrb_handle = NULL;
1215         return pwrb_handle;
1216 }
1217
1218 /**
1219  * free_wrb_handle - To free the wrb handle back to pool
1220  * @phba: The hba pointer
1221  * @pwrb_context: The context to free from
1222  * @pwrb_handle: The wrb_handle to free
1223  *
1224  * This happens under session_lock until submission to chip
1225  */
1226 static void
1227 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1228                 struct wrb_handle *pwrb_handle)
1229 {
1230         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1231         pwrb_context->wrb_handles_available++;
1232         if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1233                 pwrb_context->free_index = 0;
1234         else
1235                 pwrb_context->free_index++;
1236
1237         beiscsi_log(phba, KERN_INFO,
1238                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1239                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1240                     "wrb_handles_available=%d\n",
1241                     pwrb_handle, pwrb_context->free_index,
1242                     pwrb_context->wrb_handles_available);
1243 }
1244
1245 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1246 {
1247         struct sgl_handle *psgl_handle;
1248
1249         if (phba->eh_sgl_hndl_avbl) {
1250                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1251                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1252                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1253                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1254                             phba->eh_sgl_alloc_index,
1255                             phba->eh_sgl_alloc_index);
1256
1257                 phba->eh_sgl_hndl_avbl--;
1258                 if (phba->eh_sgl_alloc_index ==
1259                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1260                      1))
1261                         phba->eh_sgl_alloc_index = 0;
1262                 else
1263                         phba->eh_sgl_alloc_index++;
1264         } else
1265                 psgl_handle = NULL;
1266         return psgl_handle;
1267 }
1268
1269 void
1270 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1271 {
1272
1273         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1274                     "BM_%d : In  free_mgmt_sgl_handle,"
1275                     "eh_sgl_free_index=%d\n",
1276                     phba->eh_sgl_free_index);
1277
1278         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1279                 /*
1280                  * this can happen if clean_task is called on a task that
1281                  * failed in xmit_task or alloc_pdu.
1282                  */
1283                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1284                             "BM_%d : Double Free in eh SGL ,"
1285                             "eh_sgl_free_index=%d\n",
1286                             phba->eh_sgl_free_index);
1287                 return;
1288         }
1289         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1290         phba->eh_sgl_hndl_avbl++;
1291         if (phba->eh_sgl_free_index ==
1292             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1293                 phba->eh_sgl_free_index = 0;
1294         else
1295                 phba->eh_sgl_free_index++;
1296 }
1297
1298 static void
1299 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1300                 struct iscsi_task *task,
1301                 struct common_sol_cqe *csol_cqe)
1302 {
1303         struct beiscsi_io_task *io_task = task->dd_data;
1304         struct be_status_bhs *sts_bhs =
1305                                 (struct be_status_bhs *)io_task->cmd_bhs;
1306         struct iscsi_conn *conn = beiscsi_conn->conn;
1307         unsigned char *sense;
1308         u32 resid = 0, exp_cmdsn, max_cmdsn;
1309         u8 rsp, status, flags;
1310
1311         exp_cmdsn = csol_cqe->exp_cmdsn;
1312         max_cmdsn = (csol_cqe->exp_cmdsn +
1313                      csol_cqe->cmd_wnd - 1);
1314         rsp = csol_cqe->i_resp;
1315         status = csol_cqe->i_sts;
1316         flags = csol_cqe->i_flags;
1317         resid = csol_cqe->res_cnt;
1318
1319         if (!task->sc) {
1320                 if (io_task->scsi_cmnd) {
1321                         scsi_dma_unmap(io_task->scsi_cmnd);
1322                         io_task->scsi_cmnd = NULL;
1323                 }
1324
1325                 return;
1326         }
1327         task->sc->result = (DID_OK << 16) | status;
1328         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1329                 task->sc->result = DID_ERROR << 16;
1330                 goto unmap;
1331         }
1332
1333         /* bidi not initially supported */
1334         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1335                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1336                         task->sc->result = DID_ERROR << 16;
1337
1338                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1339                         scsi_set_resid(task->sc, resid);
1340                         if (!status && (scsi_bufflen(task->sc) - resid <
1341                             task->sc->underflow))
1342                                 task->sc->result = DID_ERROR << 16;
1343                 }
1344         }
1345
1346         if (status == SAM_STAT_CHECK_CONDITION) {
1347                 u16 sense_len;
1348                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1349
1350                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1351                 sense_len = be16_to_cpu(*slen);
1352                 memcpy(task->sc->sense_buffer, sense,
1353                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1354         }
1355
1356         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1357                 conn->rxdata_octets += resid;
1358 unmap:
1359         scsi_dma_unmap(io_task->scsi_cmnd);
1360         io_task->scsi_cmnd = NULL;
1361         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1362 }
1363
1364 static void
1365 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1366                     struct iscsi_task *task,
1367                     struct common_sol_cqe *csol_cqe)
1368 {
1369         struct iscsi_logout_rsp *hdr;
1370         struct beiscsi_io_task *io_task = task->dd_data;
1371         struct iscsi_conn *conn = beiscsi_conn->conn;
1372
1373         hdr = (struct iscsi_logout_rsp *)task->hdr;
1374         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1375         hdr->t2wait = 5;
1376         hdr->t2retain = 0;
1377         hdr->flags = csol_cqe->i_flags;
1378         hdr->response = csol_cqe->i_resp;
1379         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1380         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1381                                      csol_cqe->cmd_wnd - 1);
1382
1383         hdr->dlength[0] = 0;
1384         hdr->dlength[1] = 0;
1385         hdr->dlength[2] = 0;
1386         hdr->hlength = 0;
1387         hdr->itt = io_task->libiscsi_itt;
1388         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1389 }
1390
1391 static void
1392 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1393                  struct iscsi_task *task,
1394                  struct common_sol_cqe *csol_cqe)
1395 {
1396         struct iscsi_tm_rsp *hdr;
1397         struct iscsi_conn *conn = beiscsi_conn->conn;
1398         struct beiscsi_io_task *io_task = task->dd_data;
1399
1400         hdr = (struct iscsi_tm_rsp *)task->hdr;
1401         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1402         hdr->flags = csol_cqe->i_flags;
1403         hdr->response = csol_cqe->i_resp;
1404         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1405         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1406                                      csol_cqe->cmd_wnd - 1);
1407
1408         hdr->itt = io_task->libiscsi_itt;
1409         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1410 }
1411
1412 static void
1413 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1414                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1415 {
1416         struct hwi_wrb_context *pwrb_context;
1417         struct wrb_handle *pwrb_handle = NULL;
1418         struct hwi_controller *phwi_ctrlr;
1419         struct iscsi_task *task;
1420         struct beiscsi_io_task *io_task;
1421         uint16_t wrb_index, cid, cri_index;
1422
1423         phwi_ctrlr = phba->phwi_ctrlr;
1424         if (is_chip_be2_be3r(phba)) {
1425                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1426                                           wrb_idx, psol);
1427                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1428                                     cid, psol);
1429         } else {
1430                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1431                                           wrb_idx, psol);
1432                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1433                                     cid, psol);
1434         }
1435
1436         cri_index = BE_GET_CRI_FROM_CID(cid);
1437         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1438         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1439         task = pwrb_handle->pio_handle;
1440
1441         io_task = task->dd_data;
1442         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1443         iscsi_put_task(task);
1444 }
1445
1446 static void
1447 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1448                         struct iscsi_task *task,
1449                         struct common_sol_cqe *csol_cqe)
1450 {
1451         struct iscsi_nopin *hdr;
1452         struct iscsi_conn *conn = beiscsi_conn->conn;
1453         struct beiscsi_io_task *io_task = task->dd_data;
1454
1455         hdr = (struct iscsi_nopin *)task->hdr;
1456         hdr->flags = csol_cqe->i_flags;
1457         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1458         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1459                                      csol_cqe->cmd_wnd - 1);
1460
1461         hdr->opcode = ISCSI_OP_NOOP_IN;
1462         hdr->itt = io_task->libiscsi_itt;
1463         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1464 }
1465
1466 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1467                 struct sol_cqe *psol,
1468                 struct common_sol_cqe *csol_cqe)
1469 {
1470         if (is_chip_be2_be3r(phba)) {
1471                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1472                                                     i_exp_cmd_sn, psol);
1473                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1474                                                   i_res_cnt, psol);
1475                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1476                                                   i_cmd_wnd, psol);
1477                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1478                                                     wrb_index, psol);
1479                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1480                                               cid, psol);
1481                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1482                                                  hw_sts, psol);
1483                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1484                                                  i_resp, psol);
1485                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1486                                                 i_sts, psol);
1487                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1488                                                   i_flags, psol);
1489         } else {
1490                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1491                                                     i_exp_cmd_sn, psol);
1492                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1493                                                   i_res_cnt, psol);
1494                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1495                                                     wrb_index, psol);
1496                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1497                                               cid, psol);
1498                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1499                                                  hw_sts, psol);
1500                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1501                                                   i_cmd_wnd, psol);
1502                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1503                                   cmd_cmpl, psol))
1504                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1505                                                         i_sts, psol);
1506                 else
1507                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1508                                                          i_sts, psol);
1509                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1510                                   u, psol))
1511                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1512
1513                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1514                                   o, psol))
1515                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1516         }
1517 }
1518
1519
1520 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1521                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1522 {
1523         struct hwi_wrb_context *pwrb_context;
1524         struct wrb_handle *pwrb_handle;
1525         struct iscsi_wrb *pwrb = NULL;
1526         struct hwi_controller *phwi_ctrlr;
1527         struct iscsi_task *task;
1528         unsigned int type;
1529         struct iscsi_conn *conn = beiscsi_conn->conn;
1530         struct iscsi_session *session = conn->session;
1531         struct common_sol_cqe csol_cqe = {0};
1532         uint16_t cri_index = 0;
1533
1534         phwi_ctrlr = phba->phwi_ctrlr;
1535
1536         /* Copy the elements to a common structure */
1537         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1538
1539         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1540         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1541
1542         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1543                       csol_cqe.wrb_index];
1544
1545         task = pwrb_handle->pio_handle;
1546         pwrb = pwrb_handle->pwrb;
1547         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1548
1549         spin_lock_bh(&session->back_lock);
1550         switch (type) {
1551         case HWH_TYPE_IO:
1552         case HWH_TYPE_IO_RD:
1553                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1554                      ISCSI_OP_NOOP_OUT)
1555                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1556                 else
1557                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1558                 break;
1559
1560         case HWH_TYPE_LOGOUT:
1561                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1562                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1563                 else
1564                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1565                 break;
1566
1567         case HWH_TYPE_LOGIN:
1568                 beiscsi_log(phba, KERN_ERR,
1569                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1570                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1571                             " hwi_complete_cmd- Solicited path\n");
1572                 break;
1573
1574         case HWH_TYPE_NOP:
1575                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1576                 break;
1577
1578         default:
1579                 beiscsi_log(phba, KERN_WARNING,
1580                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1581                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1582                             "wrb_index 0x%x CID 0x%x\n", type,
1583                             csol_cqe.wrb_index,
1584                             csol_cqe.cid);
1585                 break;
1586         }
1587
1588         spin_unlock_bh(&session->back_lock);
1589 }
1590
1591 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1592                                           *pasync_ctx, unsigned int is_header,
1593                                           unsigned int host_write_ptr)
1594 {
1595         if (is_header)
1596                 return &pasync_ctx->async_entry[host_write_ptr].
1597                     header_busy_list;
1598         else
1599                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1600 }
1601
1602 static struct async_pdu_handle *
1603 hwi_get_async_handle(struct beiscsi_hba *phba,
1604                      struct beiscsi_conn *beiscsi_conn,
1605                      struct hwi_async_pdu_context *pasync_ctx,
1606                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1607 {
1608         struct be_bus_address phys_addr;
1609         struct list_head *pbusy_list;
1610         struct async_pdu_handle *pasync_handle = NULL;
1611         unsigned char is_header = 0;
1612         unsigned int index, dpl;
1613
1614         if (is_chip_be2_be3r(phba)) {
1615                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1616                                     dpl, pdpdu_cqe);
1617                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1618                                       index, pdpdu_cqe);
1619         } else {
1620                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1621                                     dpl, pdpdu_cqe);
1622                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1623                                       index, pdpdu_cqe);
1624         }
1625
1626         phys_addr.u.a32.address_lo =
1627                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1628                                         db_addr_lo) / 32] - dpl);
1629         phys_addr.u.a32.address_hi =
1630                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1631                                        db_addr_hi) / 32];
1632
1633         phys_addr.u.a64.address =
1634                         *((unsigned long long *)(&phys_addr.u.a64.address));
1635
1636         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1637                         & PDUCQE_CODE_MASK) {
1638         case UNSOL_HDR_NOTIFY:
1639                 is_header = 1;
1640
1641                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1642                                                       is_header, index);
1643                 break;
1644         case UNSOL_DATA_NOTIFY:
1645                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1646                                                       is_header, index);
1647                 break;
1648         default:
1649                 pbusy_list = NULL;
1650                 beiscsi_log(phba, KERN_WARNING,
1651                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1652                             "BM_%d : Unexpected code=%d\n",
1653                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1654                             code) / 32] & PDUCQE_CODE_MASK);
1655                 return NULL;
1656         }
1657
1658         WARN_ON(list_empty(pbusy_list));
1659         list_for_each_entry(pasync_handle, pbusy_list, link) {
1660                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1661                         break;
1662         }
1663
1664         WARN_ON(!pasync_handle);
1665
1666         pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1667                              beiscsi_conn->beiscsi_conn_cid);
1668         pasync_handle->is_header = is_header;
1669         pasync_handle->buffer_len = dpl;
1670         *pcq_index = index;
1671
1672         return pasync_handle;
1673 }
1674
1675 static unsigned int
1676 hwi_update_async_writables(struct beiscsi_hba *phba,
1677                             struct hwi_async_pdu_context *pasync_ctx,
1678                             unsigned int is_header, unsigned int cq_index)
1679 {
1680         struct list_head *pbusy_list;
1681         struct async_pdu_handle *pasync_handle;
1682         unsigned int num_entries, writables = 0;
1683         unsigned int *pep_read_ptr, *pwritables;
1684
1685         num_entries = pasync_ctx->num_entries;
1686         if (is_header) {
1687                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1688                 pwritables = &pasync_ctx->async_header.writables;
1689         } else {
1690                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1691                 pwritables = &pasync_ctx->async_data.writables;
1692         }
1693
1694         while ((*pep_read_ptr) != cq_index) {
1695                 (*pep_read_ptr)++;
1696                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1697
1698                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1699                                                      *pep_read_ptr);
1700                 if (writables == 0)
1701                         WARN_ON(list_empty(pbusy_list));
1702
1703                 if (!list_empty(pbusy_list)) {
1704                         pasync_handle = list_entry(pbusy_list->next,
1705                                                    struct async_pdu_handle,
1706                                                    link);
1707                         WARN_ON(!pasync_handle);
1708                         pasync_handle->consumed = 1;
1709                 }
1710
1711                 writables++;
1712         }
1713
1714         if (!writables) {
1715                 beiscsi_log(phba, KERN_ERR,
1716                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1717                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1718                             cq_index);
1719                 WARN_ON(1);
1720         }
1721
1722         *pwritables = *pwritables + writables;
1723         return 0;
1724 }
1725
1726 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1727                                struct hwi_async_pdu_context *pasync_ctx,
1728                                unsigned int cri)
1729 {
1730         struct async_pdu_handle *pasync_handle, *tmp_handle;
1731         struct list_head *plist;
1732
1733         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1734         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1735                 list_del(&pasync_handle->link);
1736
1737                 if (pasync_handle->is_header) {
1738                         list_add_tail(&pasync_handle->link,
1739                                       &pasync_ctx->async_header.free_list);
1740                         pasync_ctx->async_header.free_entries++;
1741                 } else {
1742                         list_add_tail(&pasync_handle->link,
1743                                       &pasync_ctx->async_data.free_list);
1744                         pasync_ctx->async_data.free_entries++;
1745                 }
1746         }
1747
1748         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1749         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1750         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1751 }
1752
1753 static struct phys_addr *
1754 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1755                      unsigned int is_header, unsigned int host_write_ptr)
1756 {
1757         struct phys_addr *pasync_sge = NULL;
1758
1759         if (is_header)
1760                 pasync_sge = pasync_ctx->async_header.ring_base;
1761         else
1762                 pasync_sge = pasync_ctx->async_data.ring_base;
1763
1764         return pasync_sge + host_write_ptr;
1765 }
1766
1767 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1768                                     unsigned int is_header, uint8_t ulp_num)
1769 {
1770         struct hwi_controller *phwi_ctrlr;
1771         struct hwi_async_pdu_context *pasync_ctx;
1772         struct async_pdu_handle *pasync_handle;
1773         struct list_head *pfree_link, *pbusy_list;
1774         struct phys_addr *pasync_sge;
1775         unsigned int ring_id, num_entries;
1776         unsigned int host_write_num, doorbell_offset;
1777         unsigned int writables;
1778         unsigned int i = 0;
1779         u32 doorbell = 0;
1780
1781         phwi_ctrlr = phba->phwi_ctrlr;
1782         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1783         num_entries = pasync_ctx->num_entries;
1784
1785         if (is_header) {
1786                 writables = min(pasync_ctx->async_header.writables,
1787                                 pasync_ctx->async_header.free_entries);
1788                 pfree_link = pasync_ctx->async_header.free_list.next;
1789                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1790                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1791                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1792                                   doorbell_offset;
1793         } else {
1794                 writables = min(pasync_ctx->async_data.writables,
1795                                 pasync_ctx->async_data.free_entries);
1796                 pfree_link = pasync_ctx->async_data.free_list.next;
1797                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1798                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1799                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1800                                   doorbell_offset;
1801         }
1802
1803         writables = (writables / 8) * 8;
1804         if (writables) {
1805                 for (i = 0; i < writables; i++) {
1806                         pbusy_list =
1807                             hwi_get_async_busy_list(pasync_ctx, is_header,
1808                                                     host_write_num);
1809                         pasync_handle =
1810                             list_entry(pfree_link, struct async_pdu_handle,
1811                                                                 link);
1812                         WARN_ON(!pasync_handle);
1813                         pasync_handle->consumed = 0;
1814
1815                         pfree_link = pfree_link->next;
1816
1817                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1818                                                 is_header, host_write_num);
1819
1820                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1821                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1822
1823                         list_move(&pasync_handle->link, pbusy_list);
1824
1825                         host_write_num++;
1826                         host_write_num = host_write_num % num_entries;
1827                 }
1828
1829                 if (is_header) {
1830                         pasync_ctx->async_header.host_write_ptr =
1831                                                         host_write_num;
1832                         pasync_ctx->async_header.free_entries -= writables;
1833                         pasync_ctx->async_header.writables -= writables;
1834                         pasync_ctx->async_header.busy_entries += writables;
1835                 } else {
1836                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1837                         pasync_ctx->async_data.free_entries -= writables;
1838                         pasync_ctx->async_data.writables -= writables;
1839                         pasync_ctx->async_data.busy_entries += writables;
1840                 }
1841
1842                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1843                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1844                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1845                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1846                                         << DB_DEF_PDU_CQPROC_SHIFT;
1847
1848                 iowrite32(doorbell, phba->db_va + doorbell_offset);
1849         }
1850 }
1851
1852 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1853                                          struct beiscsi_conn *beiscsi_conn,
1854                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1855 {
1856         struct hwi_controller *phwi_ctrlr;
1857         struct hwi_async_pdu_context *pasync_ctx;
1858         struct async_pdu_handle *pasync_handle = NULL;
1859         unsigned int cq_index = -1;
1860         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1861                              beiscsi_conn->beiscsi_conn_cid);
1862
1863         phwi_ctrlr = phba->phwi_ctrlr;
1864         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1865                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1866                      cri_index));
1867
1868         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1869                                              pdpdu_cqe, &cq_index);
1870         BUG_ON(pasync_handle->is_header != 0);
1871         if (pasync_handle->consumed == 0)
1872                 hwi_update_async_writables(phba, pasync_ctx,
1873                                            pasync_handle->is_header, cq_index);
1874
1875         hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1876         hwi_post_async_buffers(phba, pasync_handle->is_header,
1877                                BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1878                                cri_index));
1879 }
1880
1881 static unsigned int
1882 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1883                   struct beiscsi_hba *phba,
1884                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1885 {
1886         struct list_head *plist;
1887         struct async_pdu_handle *pasync_handle;
1888         void *phdr = NULL;
1889         unsigned int hdr_len = 0, buf_len = 0;
1890         unsigned int status, index = 0, offset = 0;
1891         void *pfirst_buffer = NULL;
1892         unsigned int num_buf = 0;
1893
1894         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1895
1896         list_for_each_entry(pasync_handle, plist, link) {
1897                 if (index == 0) {
1898                         phdr = pasync_handle->pbuffer;
1899                         hdr_len = pasync_handle->buffer_len;
1900                 } else {
1901                         buf_len = pasync_handle->buffer_len;
1902                         if (!num_buf) {
1903                                 pfirst_buffer = pasync_handle->pbuffer;
1904                                 num_buf++;
1905                         }
1906                         memcpy(pfirst_buffer + offset,
1907                                pasync_handle->pbuffer, buf_len);
1908                         offset += buf_len;
1909                 }
1910                 index++;
1911         }
1912
1913         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1914                                             phdr, hdr_len, pfirst_buffer,
1915                                             offset);
1916
1917         hwi_free_async_msg(phba, pasync_ctx, cri);
1918         return 0;
1919 }
1920
1921 static unsigned int
1922 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1923                      struct beiscsi_hba *phba,
1924                      struct async_pdu_handle *pasync_handle)
1925 {
1926         struct hwi_async_pdu_context *pasync_ctx;
1927         struct hwi_controller *phwi_ctrlr;
1928         unsigned int bytes_needed = 0, status = 0;
1929         unsigned short cri = pasync_handle->cri;
1930         struct pdu_base *ppdu;
1931
1932         phwi_ctrlr = phba->phwi_ctrlr;
1933         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1934                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1935                      BE_GET_CRI_FROM_CID(beiscsi_conn->
1936                                  beiscsi_conn_cid)));
1937
1938         list_del(&pasync_handle->link);
1939         if (pasync_handle->is_header) {
1940                 pasync_ctx->async_header.busy_entries--;
1941                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1942                         hwi_free_async_msg(phba, pasync_ctx, cri);
1943                         BUG();
1944                 }
1945
1946                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1947                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1948                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1949                                 (unsigned short)pasync_handle->buffer_len;
1950                 list_add_tail(&pasync_handle->link,
1951                               &pasync_ctx->async_entry[cri].wait_queue.list);
1952
1953                 ppdu = pasync_handle->pbuffer;
1954                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1955                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1956                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1957                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1958                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1959
1960                 if (status == 0) {
1961                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1962                             bytes_needed;
1963
1964                         if (bytes_needed == 0)
1965                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1966                                                            pasync_ctx, cri);
1967                 }
1968         } else {
1969                 pasync_ctx->async_data.busy_entries--;
1970                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1971                         list_add_tail(&pasync_handle->link,
1972                                       &pasync_ctx->async_entry[cri].wait_queue.
1973                                       list);
1974                         pasync_ctx->async_entry[cri].wait_queue.
1975                                 bytes_received +=
1976                                 (unsigned short)pasync_handle->buffer_len;
1977
1978                         if (pasync_ctx->async_entry[cri].wait_queue.
1979                             bytes_received >=
1980                             pasync_ctx->async_entry[cri].wait_queue.
1981                             bytes_needed)
1982                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1983                                                            pasync_ctx, cri);
1984                 }
1985         }
1986         return status;
1987 }
1988
1989 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1990                                          struct beiscsi_hba *phba,
1991                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1992 {
1993         struct hwi_controller *phwi_ctrlr;
1994         struct hwi_async_pdu_context *pasync_ctx;
1995         struct async_pdu_handle *pasync_handle = NULL;
1996         unsigned int cq_index = -1;
1997         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1998                              beiscsi_conn->beiscsi_conn_cid);
1999
2000         phwi_ctrlr = phba->phwi_ctrlr;
2001         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
2002                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
2003                      cri_index));
2004
2005         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
2006                                              pdpdu_cqe, &cq_index);
2007
2008         if (pasync_handle->consumed == 0)
2009                 hwi_update_async_writables(phba, pasync_ctx,
2010                                            pasync_handle->is_header, cq_index);
2011
2012         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
2013         hwi_post_async_buffers(phba, pasync_handle->is_header,
2014                                BEISCSI_GET_ULP_FROM_CRI(
2015                                phwi_ctrlr, cri_index));
2016 }
2017
2018 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
2019 {
2020         struct be_queue_info *mcc_cq;
2021         struct  be_mcc_compl *mcc_compl;
2022         unsigned int num_processed = 0;
2023
2024         mcc_cq = &phba->ctrl.mcc_obj.cq;
2025         mcc_compl = queue_tail_node(mcc_cq);
2026         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2027         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
2028
2029                 if (num_processed >= 32) {
2030                         hwi_ring_cq_db(phba, mcc_cq->id,
2031                                         num_processed, 0, 0);
2032                         num_processed = 0;
2033                 }
2034                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2035                         /* Interpret flags as an async trailer */
2036                         if (is_link_state_evt(mcc_compl->flags))
2037                                 /* Interpret compl as a async link evt */
2038                                 beiscsi_async_link_state_process(phba,
2039                                 (struct be_async_event_link_state *) mcc_compl);
2040                         else {
2041                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
2042                                             "BM_%d :  Unsupported Async Event, flags"
2043                                             " = 0x%08x\n",
2044                                             mcc_compl->flags);
2045                                 if (phba->state & BE_ADAPTER_LINK_UP) {
2046                                         phba->state |= BE_ADAPTER_CHECK_BOOT;
2047                                         phba->get_boot = BE_GET_BOOT_RETRIES;
2048                                 }
2049                         }
2050                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2051                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2052                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
2053                 }
2054
2055                 mcc_compl->flags = 0;
2056                 queue_tail_inc(mcc_cq);
2057                 mcc_compl = queue_tail_node(mcc_cq);
2058                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2059                 num_processed++;
2060         }
2061
2062         if (num_processed > 0)
2063                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
2064
2065 }
2066
2067 /**
2068  * beiscsi_process_cq()- Process the Completion Queue
2069  * @pbe_eq: Event Q on which the Completion has come
2070  *
2071  * return
2072  *     Number of Completion Entries processed.
2073  **/
2074 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
2075 {
2076         struct be_queue_info *cq;
2077         struct sol_cqe *sol;
2078         struct dmsg_cqe *dmsg;
2079         unsigned int num_processed = 0;
2080         unsigned int tot_nump = 0;
2081         unsigned short code = 0, cid = 0;
2082         uint16_t cri_index = 0;
2083         struct beiscsi_conn *beiscsi_conn;
2084         struct beiscsi_endpoint *beiscsi_ep;
2085         struct iscsi_endpoint *ep;
2086         struct beiscsi_hba *phba;
2087
2088         cq = pbe_eq->cq;
2089         sol = queue_tail_node(cq);
2090         phba = pbe_eq->phba;
2091
2092         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2093                CQE_VALID_MASK) {
2094                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2095
2096                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2097                          32] & CQE_CODE_MASK);
2098
2099                  /* Get the CID */
2100                 if (is_chip_be2_be3r(phba)) {
2101                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2102                 } else {
2103                         if ((code == DRIVERMSG_NOTIFY) ||
2104                             (code == UNSOL_HDR_NOTIFY) ||
2105                             (code == UNSOL_DATA_NOTIFY))
2106                                 cid = AMAP_GET_BITS(
2107                                                     struct amap_i_t_dpdu_cqe_v2,
2108                                                     cid, sol);
2109                          else
2110                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2111                                                      cid, sol);
2112                 }
2113
2114                 cri_index = BE_GET_CRI_FROM_CID(cid);
2115                 ep = phba->ep_array[cri_index];
2116
2117                 if (ep == NULL) {
2118                         /* connection has already been freed
2119                          * just move on to next one
2120                          */
2121                         beiscsi_log(phba, KERN_WARNING,
2122                                     BEISCSI_LOG_INIT,
2123                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
2124                                     cid);
2125                         goto proc_next_cqe;
2126                 }
2127
2128                 beiscsi_ep = ep->dd_data;
2129                 beiscsi_conn = beiscsi_ep->conn;
2130
2131                 if (num_processed >= 32) {
2132                         hwi_ring_cq_db(phba, cq->id,
2133                                         num_processed, 0, 0);
2134                         tot_nump += num_processed;
2135                         num_processed = 0;
2136                 }
2137
2138                 switch (code) {
2139                 case SOL_CMD_COMPLETE:
2140                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2141                         break;
2142                 case DRIVERMSG_NOTIFY:
2143                         beiscsi_log(phba, KERN_INFO,
2144                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2145                                     "BM_%d : Received %s[%d] on CID : %d\n",
2146                                     cqe_desc[code], code, cid);
2147
2148                         dmsg = (struct dmsg_cqe *)sol;
2149                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2150                         break;
2151                 case UNSOL_HDR_NOTIFY:
2152                         beiscsi_log(phba, KERN_INFO,
2153                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2154                                     "BM_%d : Received %s[%d] on CID : %d\n",
2155                                     cqe_desc[code], code, cid);
2156
2157                         spin_lock_bh(&phba->async_pdu_lock);
2158                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2159                                              (struct i_t_dpdu_cqe *)sol);
2160                         spin_unlock_bh(&phba->async_pdu_lock);
2161                         break;
2162                 case UNSOL_DATA_NOTIFY:
2163                         beiscsi_log(phba, KERN_INFO,
2164                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2165                                     "BM_%d : Received %s[%d] on CID : %d\n",
2166                                     cqe_desc[code], code, cid);
2167
2168                         spin_lock_bh(&phba->async_pdu_lock);
2169                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2170                                              (struct i_t_dpdu_cqe *)sol);
2171                         spin_unlock_bh(&phba->async_pdu_lock);
2172                         break;
2173                 case CXN_INVALIDATE_INDEX_NOTIFY:
2174                 case CMD_INVALIDATED_NOTIFY:
2175                 case CXN_INVALIDATE_NOTIFY:
2176                         beiscsi_log(phba, KERN_ERR,
2177                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2178                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2179                                     cqe_desc[code], code, cid);
2180                         break;
2181                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2182                 case CMD_KILLED_INVALID_STATSN_RCVD:
2183                 case CMD_KILLED_INVALID_R2T_RCVD:
2184                 case CMD_CXN_KILLED_LUN_INVALID:
2185                 case CMD_CXN_KILLED_ICD_INVALID:
2186                 case CMD_CXN_KILLED_ITT_INVALID:
2187                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2188                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2189                         beiscsi_log(phba, KERN_ERR,
2190                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2191                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2192                                     cqe_desc[code], code,  cid);
2193                         break;
2194                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2195                         beiscsi_log(phba, KERN_ERR,
2196                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2197                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2198                                     cqe_desc[code], code, cid);
2199                         spin_lock_bh(&phba->async_pdu_lock);
2200                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2201                                              (struct i_t_dpdu_cqe *) sol);
2202                         spin_unlock_bh(&phba->async_pdu_lock);
2203                         break;
2204                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2205                 case CXN_KILLED_BURST_LEN_MISMATCH:
2206                 case CXN_KILLED_AHS_RCVD:
2207                 case CXN_KILLED_HDR_DIGEST_ERR:
2208                 case CXN_KILLED_UNKNOWN_HDR:
2209                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2210                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2211                 case CXN_KILLED_TIMED_OUT:
2212                 case CXN_KILLED_FIN_RCVD:
2213                 case CXN_KILLED_RST_SENT:
2214                 case CXN_KILLED_RST_RCVD:
2215                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2216                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2217                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2218                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2219                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2220                         beiscsi_log(phba, KERN_ERR,
2221                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2222                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2223                                     cqe_desc[code], code, cid);
2224                         if (beiscsi_conn)
2225                                 iscsi_conn_failure(beiscsi_conn->conn,
2226                                                    ISCSI_ERR_CONN_FAILED);
2227                         break;
2228                 default:
2229                         beiscsi_log(phba, KERN_ERR,
2230                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2231                                     "BM_%d : Invalid CQE Event Received Code : %d"
2232                                     "CID 0x%x...\n",
2233                                     code, cid);
2234                         break;
2235                 }
2236
2237 proc_next_cqe:
2238                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2239                 queue_tail_inc(cq);
2240                 sol = queue_tail_node(cq);
2241                 num_processed++;
2242         }
2243
2244         if (num_processed > 0) {
2245                 tot_nump += num_processed;
2246                 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2247         }
2248         return tot_nump;
2249 }
2250
2251 void beiscsi_process_all_cqs(struct work_struct *work)
2252 {
2253         unsigned long flags;
2254         struct hwi_controller *phwi_ctrlr;
2255         struct hwi_context_memory *phwi_context;
2256         struct beiscsi_hba *phba;
2257         struct be_eq_obj *pbe_eq =
2258             container_of(work, struct be_eq_obj, work_cqs);
2259
2260         phba = pbe_eq->phba;
2261         phwi_ctrlr = phba->phwi_ctrlr;
2262         phwi_context = phwi_ctrlr->phwi_ctxt;
2263
2264         if (pbe_eq->todo_mcc_cq) {
2265                 spin_lock_irqsave(&phba->isr_lock, flags);
2266                 pbe_eq->todo_mcc_cq = false;
2267                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2268                 beiscsi_process_mcc_isr(phba);
2269         }
2270
2271         if (pbe_eq->todo_cq) {
2272                 spin_lock_irqsave(&phba->isr_lock, flags);
2273                 pbe_eq->todo_cq = false;
2274                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2275                 beiscsi_process_cq(pbe_eq);
2276         }
2277
2278         /* rearm EQ for further interrupts */
2279         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2280 }
2281
2282 static int be_iopoll(struct blk_iopoll *iop, int budget)
2283 {
2284         unsigned int ret;
2285         struct beiscsi_hba *phba;
2286         struct be_eq_obj *pbe_eq;
2287
2288         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2289         ret = beiscsi_process_cq(pbe_eq);
2290         pbe_eq->cq_count += ret;
2291         if (ret < budget) {
2292                 phba = pbe_eq->phba;
2293                 blk_iopoll_complete(iop);
2294                 beiscsi_log(phba, KERN_INFO,
2295                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2296                             "BM_%d : rearm pbe_eq->q.id =%d\n",
2297                             pbe_eq->q.id);
2298                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2299         }
2300         return ret;
2301 }
2302
2303 static void
2304 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2305                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2306 {
2307         struct iscsi_sge *psgl;
2308         unsigned int sg_len, index;
2309         unsigned int sge_len = 0;
2310         unsigned long long addr;
2311         struct scatterlist *l_sg;
2312         unsigned int offset;
2313
2314         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2315                       io_task->bhs_pa.u.a32.address_lo);
2316         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2317                       io_task->bhs_pa.u.a32.address_hi);
2318
2319         l_sg = sg;
2320         for (index = 0; (index < num_sg) && (index < 2); index++,
2321                         sg = sg_next(sg)) {
2322                 if (index == 0) {
2323                         sg_len = sg_dma_len(sg);
2324                         addr = (u64) sg_dma_address(sg);
2325                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2326                                       sge0_addr_lo, pwrb,
2327                                       lower_32_bits(addr));
2328                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2329                                       sge0_addr_hi, pwrb,
2330                                       upper_32_bits(addr));
2331                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2332                                       sge0_len, pwrb,
2333                                       sg_len);
2334                         sge_len = sg_len;
2335                 } else {
2336                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2337                                       pwrb, sge_len);
2338                         sg_len = sg_dma_len(sg);
2339                         addr = (u64) sg_dma_address(sg);
2340                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2341                                       sge1_addr_lo, pwrb,
2342                                       lower_32_bits(addr));
2343                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2344                                       sge1_addr_hi, pwrb,
2345                                       upper_32_bits(addr));
2346                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2347                                       sge1_len, pwrb,
2348                                       sg_len);
2349                 }
2350         }
2351         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2352         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2353
2354         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2355
2356         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2357                       io_task->bhs_pa.u.a32.address_hi);
2358         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2359                       io_task->bhs_pa.u.a32.address_lo);
2360
2361         if (num_sg == 1) {
2362                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2363                               1);
2364                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2365                               0);
2366         } else if (num_sg == 2) {
2367                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2368                               0);
2369                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2370                               1);
2371         } else {
2372                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2373                               0);
2374                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2375                               0);
2376         }
2377
2378         sg = l_sg;
2379         psgl++;
2380         psgl++;
2381         offset = 0;
2382         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2383                 sg_len = sg_dma_len(sg);
2384                 addr = (u64) sg_dma_address(sg);
2385                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2386                               lower_32_bits(addr));
2387                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2388                               upper_32_bits(addr));
2389                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2390                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2391                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2392                 offset += sg_len;
2393         }
2394         psgl--;
2395         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2396 }
2397
2398 static void
2399 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2400               unsigned int num_sg, struct beiscsi_io_task *io_task)
2401 {
2402         struct iscsi_sge *psgl;
2403         unsigned int sg_len, index;
2404         unsigned int sge_len = 0;
2405         unsigned long long addr;
2406         struct scatterlist *l_sg;
2407         unsigned int offset;
2408
2409         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2410                                       io_task->bhs_pa.u.a32.address_lo);
2411         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2412                                       io_task->bhs_pa.u.a32.address_hi);
2413
2414         l_sg = sg;
2415         for (index = 0; (index < num_sg) && (index < 2); index++,
2416                                                          sg = sg_next(sg)) {
2417                 if (index == 0) {
2418                         sg_len = sg_dma_len(sg);
2419                         addr = (u64) sg_dma_address(sg);
2420                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2421                                                 ((u32)(addr & 0xFFFFFFFF)));
2422                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2423                                                         ((u32)(addr >> 32)));
2424                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2425                                                         sg_len);
2426                         sge_len = sg_len;
2427                 } else {
2428                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2429                                                         pwrb, sge_len);
2430                         sg_len = sg_dma_len(sg);
2431                         addr = (u64) sg_dma_address(sg);
2432                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2433                                                 ((u32)(addr & 0xFFFFFFFF)));
2434                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2435                                                         ((u32)(addr >> 32)));
2436                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2437                                                         sg_len);
2438                 }
2439         }
2440         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2441         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2442
2443         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2444
2445         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2446                         io_task->bhs_pa.u.a32.address_hi);
2447         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2448                         io_task->bhs_pa.u.a32.address_lo);
2449
2450         if (num_sg == 1) {
2451                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2452                                                                 1);
2453                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2454                                                                 0);
2455         } else if (num_sg == 2) {
2456                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2457                                                                 0);
2458                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2459                                                                 1);
2460         } else {
2461                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2462                                                                 0);
2463                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2464                                                                 0);
2465         }
2466         sg = l_sg;
2467         psgl++;
2468         psgl++;
2469         offset = 0;
2470         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2471                 sg_len = sg_dma_len(sg);
2472                 addr = (u64) sg_dma_address(sg);
2473                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2474                                                 (addr & 0xFFFFFFFF));
2475                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2476                                                 (addr >> 32));
2477                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2478                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2479                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2480                 offset += sg_len;
2481         }
2482         psgl--;
2483         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2484 }
2485
2486 /**
2487  * hwi_write_buffer()- Populate the WRB with task info
2488  * @pwrb: ptr to the WRB entry
2489  * @task: iscsi task which is to be executed
2490  **/
2491 static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2492 {
2493         struct iscsi_sge *psgl;
2494         struct beiscsi_io_task *io_task = task->dd_data;
2495         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2496         struct beiscsi_hba *phba = beiscsi_conn->phba;
2497         uint8_t dsp_value = 0;
2498
2499         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2500         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2501                                 io_task->bhs_pa.u.a32.address_lo);
2502         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2503                                 io_task->bhs_pa.u.a32.address_hi);
2504
2505         if (task->data) {
2506
2507                 /* Check for the data_count */
2508                 dsp_value = (task->data_count) ? 1 : 0;
2509
2510                 if (is_chip_be2_be3r(phba))
2511                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2512                                       pwrb, dsp_value);
2513                 else
2514                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2515                                       pwrb, dsp_value);
2516
2517                 /* Map addr only if there is data_count */
2518                 if (dsp_value) {
2519                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2520                                                              task->data,
2521                                                              task->data_count,
2522                                                              PCI_DMA_TODEVICE);
2523                         io_task->mtask_data_count = task->data_count;
2524                 } else
2525                         io_task->mtask_addr = 0;
2526
2527                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2528                               lower_32_bits(io_task->mtask_addr));
2529                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2530                               upper_32_bits(io_task->mtask_addr));
2531                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2532                                                 task->data_count);
2533
2534                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2535         } else {
2536                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2537                 io_task->mtask_addr = 0;
2538         }
2539
2540         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2541
2542         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2543
2544         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2545                       io_task->bhs_pa.u.a32.address_hi);
2546         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2547                       io_task->bhs_pa.u.a32.address_lo);
2548         if (task->data) {
2549                 psgl++;
2550                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2551                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2552                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2553                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2554                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2555                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2556
2557                 psgl++;
2558                 if (task->data) {
2559                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2560                                       lower_32_bits(io_task->mtask_addr));
2561                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2562                                       upper_32_bits(io_task->mtask_addr));
2563                 }
2564                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2565         }
2566         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2567 }
2568
2569 /**
2570  * beiscsi_find_mem_req()- Find mem needed
2571  * @phba: ptr to HBA struct
2572  **/
2573 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2574 {
2575         uint8_t mem_descr_index, ulp_num;
2576         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2577         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2578         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2579
2580         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2581                                       sizeof(struct sol_cqe));
2582
2583         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2584
2585         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2586                                                  BE_ISCSI_PDU_HEADER_SIZE;
2587         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2588                                             sizeof(struct hwi_context_memory);
2589
2590
2591         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2592             * (phba->params.wrbs_per_cxn)
2593             * phba->params.cxns_per_ctrl;
2594         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2595                                  (phba->params.wrbs_per_cxn);
2596         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2597                                 phba->params.cxns_per_ctrl);
2598
2599         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2600                 phba->params.icds_per_ctrl;
2601         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2602                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2603         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2604                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2605
2606                         num_async_pdu_buf_sgl_pages =
2607                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2608                                                phba, ulp_num) *
2609                                                sizeof(struct phys_addr));
2610
2611                         num_async_pdu_buf_pages =
2612                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2613                                                phba, ulp_num) *
2614                                                phba->params.defpdu_hdr_sz);
2615
2616                         num_async_pdu_data_pages =
2617                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2618                                                phba, ulp_num) *
2619                                                phba->params.defpdu_data_sz);
2620
2621                         num_async_pdu_data_sgl_pages =
2622                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2623                                                phba, ulp_num) *
2624                                                sizeof(struct phys_addr));
2625
2626                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2627                                           (ulp_num * MEM_DESCR_OFFSET));
2628                         phba->mem_req[mem_descr_index] =
2629                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2630                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2631
2632                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2633                                           (ulp_num * MEM_DESCR_OFFSET));
2634                         phba->mem_req[mem_descr_index] =
2635                                           num_async_pdu_buf_pages *
2636                                           PAGE_SIZE;
2637
2638                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2639                                           (ulp_num * MEM_DESCR_OFFSET));
2640                         phba->mem_req[mem_descr_index] =
2641                                           num_async_pdu_data_pages *
2642                                           PAGE_SIZE;
2643
2644                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2645                                           (ulp_num * MEM_DESCR_OFFSET));
2646                         phba->mem_req[mem_descr_index] =
2647                                           num_async_pdu_buf_sgl_pages *
2648                                           PAGE_SIZE;
2649
2650                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2651                                           (ulp_num * MEM_DESCR_OFFSET));
2652                         phba->mem_req[mem_descr_index] =
2653                                           num_async_pdu_data_sgl_pages *
2654                                           PAGE_SIZE;
2655
2656                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2657                                           (ulp_num * MEM_DESCR_OFFSET));
2658                         phba->mem_req[mem_descr_index] =
2659                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2660                                           sizeof(struct async_pdu_handle);
2661
2662                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2663                                           (ulp_num * MEM_DESCR_OFFSET));
2664                         phba->mem_req[mem_descr_index] =
2665                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2666                                           sizeof(struct async_pdu_handle);
2667
2668                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2669                                           (ulp_num * MEM_DESCR_OFFSET));
2670                         phba->mem_req[mem_descr_index] =
2671                                           sizeof(struct hwi_async_pdu_context) +
2672                                          (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2673                                           sizeof(struct hwi_async_entry));
2674                 }
2675         }
2676 }
2677
2678 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2679 {
2680         dma_addr_t bus_add;
2681         struct hwi_controller *phwi_ctrlr;
2682         struct be_mem_descriptor *mem_descr;
2683         struct mem_array *mem_arr, *mem_arr_orig;
2684         unsigned int i, j, alloc_size, curr_alloc_size;
2685
2686         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2687         if (!phba->phwi_ctrlr)
2688                 return -ENOMEM;
2689
2690         /* Allocate memory for wrb_context */
2691         phwi_ctrlr = phba->phwi_ctrlr;
2692         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2693                                           phba->params.cxns_per_ctrl,
2694                                           GFP_KERNEL);
2695         if (!phwi_ctrlr->wrb_context)
2696                 return -ENOMEM;
2697
2698         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2699                                  GFP_KERNEL);
2700         if (!phba->init_mem) {
2701                 kfree(phwi_ctrlr->wrb_context);
2702                 kfree(phba->phwi_ctrlr);
2703                 return -ENOMEM;
2704         }
2705
2706         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2707                                GFP_KERNEL);
2708         if (!mem_arr_orig) {
2709                 kfree(phba->init_mem);
2710                 kfree(phwi_ctrlr->wrb_context);
2711                 kfree(phba->phwi_ctrlr);
2712                 return -ENOMEM;
2713         }
2714
2715         mem_descr = phba->init_mem;
2716         for (i = 0; i < SE_MEM_MAX; i++) {
2717                 if (!phba->mem_req[i]) {
2718                         mem_descr->mem_array = NULL;
2719                         mem_descr++;
2720                         continue;
2721                 }
2722
2723                 j = 0;
2724                 mem_arr = mem_arr_orig;
2725                 alloc_size = phba->mem_req[i];
2726                 memset(mem_arr, 0, sizeof(struct mem_array) *
2727                        BEISCSI_MAX_FRAGS_INIT);
2728                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2729                 do {
2730                         mem_arr->virtual_address = pci_alloc_consistent(
2731                                                         phba->pcidev,
2732                                                         curr_alloc_size,
2733                                                         &bus_add);
2734                         if (!mem_arr->virtual_address) {
2735                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2736                                         goto free_mem;
2737                                 if (curr_alloc_size -
2738                                         rounddown_pow_of_two(curr_alloc_size))
2739                                         curr_alloc_size = rounddown_pow_of_two
2740                                                              (curr_alloc_size);
2741                                 else
2742                                         curr_alloc_size = curr_alloc_size / 2;
2743                         } else {
2744                                 mem_arr->bus_address.u.
2745                                     a64.address = (__u64) bus_add;
2746                                 mem_arr->size = curr_alloc_size;
2747                                 alloc_size -= curr_alloc_size;
2748                                 curr_alloc_size = min(be_max_phys_size *
2749                                                       1024, alloc_size);
2750                                 j++;
2751                                 mem_arr++;
2752                         }
2753                 } while (alloc_size);
2754                 mem_descr->num_elements = j;
2755                 mem_descr->size_in_bytes = phba->mem_req[i];
2756                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2757                                                GFP_KERNEL);
2758                 if (!mem_descr->mem_array)
2759                         goto free_mem;
2760
2761                 memcpy(mem_descr->mem_array, mem_arr_orig,
2762                        sizeof(struct mem_array) * j);
2763                 mem_descr++;
2764         }
2765         kfree(mem_arr_orig);
2766         return 0;
2767 free_mem:
2768         mem_descr->num_elements = j;
2769         while ((i) || (j)) {
2770                 for (j = mem_descr->num_elements; j > 0; j--) {
2771                         pci_free_consistent(phba->pcidev,
2772                                             mem_descr->mem_array[j - 1].size,
2773                                             mem_descr->mem_array[j - 1].
2774                                             virtual_address,
2775                                             (unsigned long)mem_descr->
2776                                             mem_array[j - 1].
2777                                             bus_address.u.a64.address);
2778                 }
2779                 if (i) {
2780                         i--;
2781                         kfree(mem_descr->mem_array);
2782                         mem_descr--;
2783                 }
2784         }
2785         kfree(mem_arr_orig);
2786         kfree(phba->init_mem);
2787         kfree(phba->phwi_ctrlr->wrb_context);
2788         kfree(phba->phwi_ctrlr);
2789         return -ENOMEM;
2790 }
2791
2792 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2793 {
2794         beiscsi_find_mem_req(phba);
2795         return beiscsi_alloc_mem(phba);
2796 }
2797
2798 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2799 {
2800         struct pdu_data_out *pdata_out;
2801         struct pdu_nop_out *pnop_out;
2802         struct be_mem_descriptor *mem_descr;
2803
2804         mem_descr = phba->init_mem;
2805         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2806         pdata_out =
2807             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2808         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2809
2810         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2811                       IIOC_SCSI_DATA);
2812
2813         pnop_out =
2814             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2815                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2816
2817         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2818         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2819         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2820         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2821 }
2822
2823 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2824 {
2825         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2826         struct hwi_context_memory *phwi_ctxt;
2827         struct wrb_handle *pwrb_handle = NULL;
2828         struct hwi_controller *phwi_ctrlr;
2829         struct hwi_wrb_context *pwrb_context;
2830         struct iscsi_wrb *pwrb = NULL;
2831         unsigned int num_cxn_wrbh = 0;
2832         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2833
2834         mem_descr_wrbh = phba->init_mem;
2835         mem_descr_wrbh += HWI_MEM_WRBH;
2836
2837         mem_descr_wrb = phba->init_mem;
2838         mem_descr_wrb += HWI_MEM_WRB;
2839         phwi_ctrlr = phba->phwi_ctrlr;
2840
2841         /* Allocate memory for WRBQ */
2842         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2843         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2844                                      phba->params.cxns_per_ctrl,
2845                                      GFP_KERNEL);
2846         if (!phwi_ctxt->be_wrbq) {
2847                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2848                             "BM_%d : WRBQ Mem Alloc Failed\n");
2849                 return -ENOMEM;
2850         }
2851
2852         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2853                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2854                 pwrb_context->pwrb_handle_base =
2855                                 kzalloc(sizeof(struct wrb_handle *) *
2856                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2857                 if (!pwrb_context->pwrb_handle_base) {
2858                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2859                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2860                         goto init_wrb_hndl_failed;
2861                 }
2862                 pwrb_context->pwrb_handle_basestd =
2863                                 kzalloc(sizeof(struct wrb_handle *) *
2864                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2865                 if (!pwrb_context->pwrb_handle_basestd) {
2866                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2867                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2868                         goto init_wrb_hndl_failed;
2869                 }
2870                 if (!num_cxn_wrbh) {
2871                         pwrb_handle =
2872                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2873                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2874                                         ((sizeof(struct wrb_handle)) *
2875                                          phba->params.wrbs_per_cxn));
2876                         idx++;
2877                 }
2878                 pwrb_context->alloc_index = 0;
2879                 pwrb_context->wrb_handles_available = 0;
2880                 pwrb_context->free_index = 0;
2881
2882                 if (num_cxn_wrbh) {
2883                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2884                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2885                                 pwrb_context->pwrb_handle_basestd[j] =
2886                                                                 pwrb_handle;
2887                                 pwrb_context->wrb_handles_available++;
2888                                 pwrb_handle->wrb_index = j;
2889                                 pwrb_handle++;
2890                         }
2891                         num_cxn_wrbh--;
2892                 }
2893         }
2894         idx = 0;
2895         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2896                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2897                 if (!num_cxn_wrb) {
2898                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2899                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2900                                 ((sizeof(struct iscsi_wrb) *
2901                                   phba->params.wrbs_per_cxn));
2902                         idx++;
2903                 }
2904
2905                 if (num_cxn_wrb) {
2906                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2907                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2908                                 pwrb_handle->pwrb = pwrb;
2909                                 pwrb++;
2910                         }
2911                         num_cxn_wrb--;
2912                 }
2913         }
2914         return 0;
2915 init_wrb_hndl_failed:
2916         for (j = index; j > 0; j--) {
2917                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2918                 kfree(pwrb_context->pwrb_handle_base);
2919                 kfree(pwrb_context->pwrb_handle_basestd);
2920         }
2921         return -ENOMEM;
2922 }
2923
2924 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2925 {
2926         uint8_t ulp_num;
2927         struct hwi_controller *phwi_ctrlr;
2928         struct hba_parameters *p = &phba->params;
2929         struct hwi_async_pdu_context *pasync_ctx;
2930         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2931         unsigned int index, idx, num_per_mem, num_async_data;
2932         struct be_mem_descriptor *mem_descr;
2933
2934         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2935                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2936
2937                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2938                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2939                                      (ulp_num * MEM_DESCR_OFFSET));
2940
2941                         phwi_ctrlr = phba->phwi_ctrlr;
2942                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2943                                 (struct hwi_async_pdu_context *)
2944                                  mem_descr->mem_array[0].virtual_address;
2945
2946                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2947                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2948
2949                         pasync_ctx->async_entry =
2950                                         (struct hwi_async_entry *)
2951                                         ((long unsigned int)pasync_ctx +
2952                                         sizeof(struct hwi_async_pdu_context));
2953
2954                         pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2955                                                   ulp_num);
2956                         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2957
2958                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2959                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2960                                 (ulp_num * MEM_DESCR_OFFSET);
2961                         if (mem_descr->mem_array[0].virtual_address) {
2962                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2963                                             "BM_%d : hwi_init_async_pdu_ctx"
2964                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2965                                             ulp_num,
2966                                             mem_descr->mem_array[0].
2967                                             virtual_address);
2968                         } else
2969                                 beiscsi_log(phba, KERN_WARNING,
2970                                             BEISCSI_LOG_INIT,
2971                                             "BM_%d : No Virtual address for ULP : %d\n",
2972                                             ulp_num);
2973
2974                         pasync_ctx->async_header.va_base =
2975                                 mem_descr->mem_array[0].virtual_address;
2976
2977                         pasync_ctx->async_header.pa_base.u.a64.address =
2978                                 mem_descr->mem_array[0].
2979                                 bus_address.u.a64.address;
2980
2981                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2982                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2983                                      (ulp_num * MEM_DESCR_OFFSET);
2984                         if (mem_descr->mem_array[0].virtual_address) {
2985                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2986                                             "BM_%d : hwi_init_async_pdu_ctx"
2987                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2988                                             ulp_num,
2989                                             mem_descr->mem_array[0].
2990                                             virtual_address);
2991                         } else
2992                                 beiscsi_log(phba, KERN_WARNING,
2993                                             BEISCSI_LOG_INIT,
2994                                             "BM_%d : No Virtual address for ULP : %d\n",
2995                                             ulp_num);
2996
2997                         pasync_ctx->async_header.ring_base =
2998                                 mem_descr->mem_array[0].virtual_address;
2999
3000                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3001                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
3002                                      (ulp_num * MEM_DESCR_OFFSET);
3003                         if (mem_descr->mem_array[0].virtual_address) {
3004                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3005                                             "BM_%d : hwi_init_async_pdu_ctx"
3006                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
3007                                             ulp_num,
3008                                             mem_descr->mem_array[0].
3009                                             virtual_address);
3010                         } else
3011                                 beiscsi_log(phba, KERN_WARNING,
3012                                             BEISCSI_LOG_INIT,
3013                                             "BM_%d : No Virtual address for ULP : %d\n",
3014                                             ulp_num);
3015
3016                         pasync_ctx->async_header.handle_base =
3017                                 mem_descr->mem_array[0].virtual_address;
3018                         pasync_ctx->async_header.writables = 0;
3019                         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
3020
3021                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3022                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3023                                      (ulp_num * MEM_DESCR_OFFSET);
3024                         if (mem_descr->mem_array[0].virtual_address) {
3025                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3026                                             "BM_%d : hwi_init_async_pdu_ctx"
3027                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
3028                                             ulp_num,
3029                                             mem_descr->mem_array[0].
3030                                             virtual_address);
3031                         } else
3032                                 beiscsi_log(phba, KERN_WARNING,
3033                                             BEISCSI_LOG_INIT,
3034                                             "BM_%d : No Virtual address for ULP : %d\n",
3035                                             ulp_num);
3036
3037                         pasync_ctx->async_data.ring_base =
3038                                 mem_descr->mem_array[0].virtual_address;
3039
3040                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3041                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
3042                                      (ulp_num * MEM_DESCR_OFFSET);
3043                         if (!mem_descr->mem_array[0].virtual_address)
3044                                 beiscsi_log(phba, KERN_WARNING,
3045                                             BEISCSI_LOG_INIT,
3046                                             "BM_%d : No Virtual address for ULP : %d\n",
3047                                             ulp_num);
3048
3049                         pasync_ctx->async_data.handle_base =
3050                                 mem_descr->mem_array[0].virtual_address;
3051                         pasync_ctx->async_data.writables = 0;
3052                         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
3053
3054                         pasync_header_h =
3055                                 (struct async_pdu_handle *)
3056                                 pasync_ctx->async_header.handle_base;
3057                         pasync_data_h =
3058                                 (struct async_pdu_handle *)
3059                                 pasync_ctx->async_data.handle_base;
3060
3061                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3062                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3063                                      (ulp_num * MEM_DESCR_OFFSET);
3064                         if (mem_descr->mem_array[0].virtual_address) {
3065                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3066                                             "BM_%d : hwi_init_async_pdu_ctx"
3067                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3068                                             ulp_num,
3069                                             mem_descr->mem_array[0].
3070                                             virtual_address);
3071                         } else
3072                                 beiscsi_log(phba, KERN_WARNING,
3073                                             BEISCSI_LOG_INIT,
3074                                             "BM_%d : No Virtual address for ULP : %d\n",
3075                                             ulp_num);
3076
3077                         idx = 0;
3078                         pasync_ctx->async_data.va_base =
3079                                 mem_descr->mem_array[idx].virtual_address;
3080                         pasync_ctx->async_data.pa_base.u.a64.address =
3081                                 mem_descr->mem_array[idx].
3082                                 bus_address.u.a64.address;
3083
3084                         num_async_data = ((mem_descr->mem_array[idx].size) /
3085                                         phba->params.defpdu_data_sz);
3086                         num_per_mem = 0;
3087
3088                         for (index = 0; index < BEISCSI_GET_CID_COUNT
3089                                         (phba, ulp_num); index++) {
3090                                 pasync_header_h->cri = -1;
3091                                 pasync_header_h->index = (char)index;
3092                                 INIT_LIST_HEAD(&pasync_header_h->link);
3093                                 pasync_header_h->pbuffer =
3094                                         (void *)((unsigned long)
3095                                                  (pasync_ctx->
3096                                                   async_header.va_base) +
3097                                                  (p->defpdu_hdr_sz * index));
3098
3099                                 pasync_header_h->pa.u.a64.address =
3100                                         pasync_ctx->async_header.pa_base.u.a64.
3101                                         address + (p->defpdu_hdr_sz * index);
3102
3103                                 list_add_tail(&pasync_header_h->link,
3104                                               &pasync_ctx->async_header.
3105                                               free_list);
3106                                 pasync_header_h++;
3107                                 pasync_ctx->async_header.free_entries++;
3108                                 pasync_ctx->async_header.writables++;
3109
3110                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3111                                                wait_queue.list);
3112                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3113                                                header_busy_list);
3114                                 pasync_data_h->cri = -1;
3115                                 pasync_data_h->index = (char)index;
3116                                 INIT_LIST_HEAD(&pasync_data_h->link);
3117
3118                                 if (!num_async_data) {
3119                                         num_per_mem = 0;
3120                                         idx++;
3121                                         pasync_ctx->async_data.va_base =
3122                                                 mem_descr->mem_array[idx].
3123                                                 virtual_address;
3124                                         pasync_ctx->async_data.pa_base.u.
3125                                                 a64.address =
3126                                                 mem_descr->mem_array[idx].
3127                                                 bus_address.u.a64.address;
3128                                         num_async_data =
3129                                                 ((mem_descr->mem_array[idx].
3130                                                   size) /
3131                                                  phba->params.defpdu_data_sz);
3132                                 }
3133                                 pasync_data_h->pbuffer =
3134                                         (void *)((unsigned long)
3135                                         (pasync_ctx->async_data.va_base) +
3136                                         (p->defpdu_data_sz * num_per_mem));
3137
3138                                 pasync_data_h->pa.u.a64.address =
3139                                         pasync_ctx->async_data.pa_base.u.a64.
3140                                         address + (p->defpdu_data_sz *
3141                                         num_per_mem);
3142                                 num_per_mem++;
3143                                 num_async_data--;
3144
3145                                 list_add_tail(&pasync_data_h->link,
3146                                               &pasync_ctx->async_data.
3147                                               free_list);
3148                                 pasync_data_h++;
3149                                 pasync_ctx->async_data.free_entries++;
3150                                 pasync_ctx->async_data.writables++;
3151
3152                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3153                                                data_busy_list);
3154                         }
3155
3156                         pasync_ctx->async_header.host_write_ptr = 0;
3157                         pasync_ctx->async_header.ep_read_ptr = -1;
3158                         pasync_ctx->async_data.host_write_ptr = 0;
3159                         pasync_ctx->async_data.ep_read_ptr = -1;
3160                 }
3161         }
3162
3163         return 0;
3164 }
3165
3166 static int
3167 be_sgl_create_contiguous(void *virtual_address,
3168                          u64 physical_address, u32 length,
3169                          struct be_dma_mem *sgl)
3170 {
3171         WARN_ON(!virtual_address);
3172         WARN_ON(!physical_address);
3173         WARN_ON(!length > 0);
3174         WARN_ON(!sgl);
3175
3176         sgl->va = virtual_address;
3177         sgl->dma = (unsigned long)physical_address;
3178         sgl->size = length;
3179
3180         return 0;
3181 }
3182
3183 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3184 {
3185         memset(sgl, 0, sizeof(*sgl));
3186 }
3187
3188 static void
3189 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3190                      struct mem_array *pmem, struct be_dma_mem *sgl)
3191 {
3192         if (sgl->va)
3193                 be_sgl_destroy_contiguous(sgl);
3194
3195         be_sgl_create_contiguous(pmem->virtual_address,
3196                                  pmem->bus_address.u.a64.address,
3197                                  pmem->size, sgl);
3198 }
3199
3200 static void
3201 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3202                            struct mem_array *pmem, struct be_dma_mem *sgl)
3203 {
3204         if (sgl->va)
3205                 be_sgl_destroy_contiguous(sgl);
3206
3207         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3208                                  pmem->bus_address.u.a64.address,
3209                                  pmem->size, sgl);
3210 }
3211
3212 static int be_fill_queue(struct be_queue_info *q,
3213                 u16 len, u16 entry_size, void *vaddress)
3214 {
3215         struct be_dma_mem *mem = &q->dma_mem;
3216
3217         memset(q, 0, sizeof(*q));
3218         q->len = len;
3219         q->entry_size = entry_size;
3220         mem->size = len * entry_size;
3221         mem->va = vaddress;
3222         if (!mem->va)
3223                 return -ENOMEM;
3224         memset(mem->va, 0, mem->size);
3225         return 0;
3226 }
3227
3228 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3229                              struct hwi_context_memory *phwi_context)
3230 {
3231         unsigned int i, num_eq_pages;
3232         int ret = 0, eq_for_mcc;
3233         struct be_queue_info *eq;
3234         struct be_dma_mem *mem;
3235         void *eq_vaddress;
3236         dma_addr_t paddr;
3237
3238         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3239                                       sizeof(struct be_eq_entry));
3240
3241         if (phba->msix_enabled)
3242                 eq_for_mcc = 1;
3243         else
3244                 eq_for_mcc = 0;
3245         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3246                 eq = &phwi_context->be_eq[i].q;
3247                 mem = &eq->dma_mem;
3248                 phwi_context->be_eq[i].phba = phba;
3249                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3250                                                      num_eq_pages * PAGE_SIZE,
3251                                                      &paddr);
3252                 if (!eq_vaddress)
3253                         goto create_eq_error;
3254
3255                 mem->va = eq_vaddress;
3256                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3257                                     sizeof(struct be_eq_entry), eq_vaddress);
3258                 if (ret) {
3259                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3260                                     "BM_%d : be_fill_queue Failed for EQ\n");
3261                         goto create_eq_error;
3262                 }
3263
3264                 mem->dma = paddr;
3265                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3266                                             phwi_context->cur_eqd);
3267                 if (ret) {
3268                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3269                                     "BM_%d : beiscsi_cmd_eq_create"
3270                                     "Failed for EQ\n");
3271                         goto create_eq_error;
3272                 }
3273
3274                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3275                             "BM_%d : eqid = %d\n",
3276                             phwi_context->be_eq[i].q.id);
3277         }
3278         return 0;
3279 create_eq_error:
3280         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3281                 eq = &phwi_context->be_eq[i].q;
3282                 mem = &eq->dma_mem;
3283                 if (mem->va)
3284                         pci_free_consistent(phba->pcidev, num_eq_pages
3285                                             * PAGE_SIZE,
3286                                             mem->va, mem->dma);
3287         }
3288         return ret;
3289 }
3290
3291 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3292                              struct hwi_context_memory *phwi_context)
3293 {
3294         unsigned int i, num_cq_pages;
3295         int ret = 0;
3296         struct be_queue_info *cq, *eq;
3297         struct be_dma_mem *mem;
3298         struct be_eq_obj *pbe_eq;
3299         void *cq_vaddress;
3300         dma_addr_t paddr;
3301
3302         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3303                                       sizeof(struct sol_cqe));
3304
3305         for (i = 0; i < phba->num_cpus; i++) {
3306                 cq = &phwi_context->be_cq[i];
3307                 eq = &phwi_context->be_eq[i].q;
3308                 pbe_eq = &phwi_context->be_eq[i];
3309                 pbe_eq->cq = cq;
3310                 pbe_eq->phba = phba;
3311                 mem = &cq->dma_mem;
3312                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3313                                                      num_cq_pages * PAGE_SIZE,
3314                                                      &paddr);
3315                 if (!cq_vaddress)
3316                         goto create_cq_error;
3317                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3318                                     sizeof(struct sol_cqe), cq_vaddress);
3319                 if (ret) {
3320                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3321                                     "BM_%d : be_fill_queue Failed "
3322                                     "for ISCSI CQ\n");
3323                         goto create_cq_error;
3324                 }
3325
3326                 mem->dma = paddr;
3327                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3328                                             false, 0);
3329                 if (ret) {
3330                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3331                                     "BM_%d : beiscsi_cmd_eq_create"
3332                                     "Failed for ISCSI CQ\n");
3333                         goto create_cq_error;
3334                 }
3335                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3336                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3337                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3338         }
3339         return 0;
3340
3341 create_cq_error:
3342         for (i = 0; i < phba->num_cpus; i++) {
3343                 cq = &phwi_context->be_cq[i];
3344                 mem = &cq->dma_mem;
3345                 if (mem->va)
3346                         pci_free_consistent(phba->pcidev, num_cq_pages
3347                                             * PAGE_SIZE,
3348                                             mem->va, mem->dma);
3349         }
3350         return ret;
3351
3352 }
3353
3354 static int
3355 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3356                        struct hwi_context_memory *phwi_context,
3357                        struct hwi_controller *phwi_ctrlr,
3358                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3359 {
3360         unsigned int idx;
3361         int ret;
3362         struct be_queue_info *dq, *cq;
3363         struct be_dma_mem *mem;
3364         struct be_mem_descriptor *mem_descr;
3365         void *dq_vaddress;
3366
3367         idx = 0;
3368         dq = &phwi_context->be_def_hdrq[ulp_num];
3369         cq = &phwi_context->be_cq[0];
3370         mem = &dq->dma_mem;
3371         mem_descr = phba->init_mem;
3372         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3373                     (ulp_num * MEM_DESCR_OFFSET);
3374         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3375         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3376                             sizeof(struct phys_addr),
3377                             sizeof(struct phys_addr), dq_vaddress);
3378         if (ret) {
3379                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3380                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3381                             ulp_num);
3382
3383                 return ret;
3384         }
3385         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3386                                   bus_address.u.a64.address;
3387         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3388                                               def_pdu_ring_sz,
3389                                               phba->params.defpdu_hdr_sz,
3390                                               BEISCSI_DEFQ_HDR, ulp_num);
3391         if (ret) {
3392                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3393                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3394                             ulp_num);
3395
3396                 return ret;
3397         }
3398
3399         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3400                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3401                     ulp_num,
3402                     phwi_context->be_def_hdrq[ulp_num].id);
3403         hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3404         return 0;
3405 }
3406
3407 static int
3408 beiscsi_create_def_data(struct beiscsi_hba *phba,
3409                         struct hwi_context_memory *phwi_context,
3410                         struct hwi_controller *phwi_ctrlr,
3411                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3412 {
3413         unsigned int idx;
3414         int ret;
3415         struct be_queue_info *dataq, *cq;
3416         struct be_dma_mem *mem;
3417         struct be_mem_descriptor *mem_descr;
3418         void *dq_vaddress;
3419
3420         idx = 0;
3421         dataq = &phwi_context->be_def_dataq[ulp_num];
3422         cq = &phwi_context->be_cq[0];
3423         mem = &dataq->dma_mem;
3424         mem_descr = phba->init_mem;
3425         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3426                     (ulp_num * MEM_DESCR_OFFSET);
3427         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3428         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3429                             sizeof(struct phys_addr),
3430                             sizeof(struct phys_addr), dq_vaddress);
3431         if (ret) {
3432                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3433                             "BM_%d : be_fill_queue Failed for DEF PDU "
3434                             "DATA on ULP : %d\n",
3435                             ulp_num);
3436
3437                 return ret;
3438         }
3439         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3440                                   bus_address.u.a64.address;
3441         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3442                                               def_pdu_ring_sz,
3443                                               phba->params.defpdu_data_sz,
3444                                               BEISCSI_DEFQ_DATA, ulp_num);
3445         if (ret) {
3446                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3447                             "BM_%d be_cmd_create_default_pdu_queue"
3448                             " Failed for DEF PDU DATA on ULP : %d\n",
3449                             ulp_num);
3450                 return ret;
3451         }
3452
3453         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3454                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3455                     ulp_num,
3456                     phwi_context->be_def_dataq[ulp_num].id);
3457
3458         hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3459         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3460                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3461                     "on ULP : %d\n", ulp_num);
3462
3463         return 0;
3464 }
3465
3466
3467 static int
3468 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3469 {
3470         struct be_mem_descriptor *mem_descr;
3471         struct mem_array *pm_arr;
3472         struct be_dma_mem sgl;
3473         int status, ulp_num;
3474
3475         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3476                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3477                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3478                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3479                                     (ulp_num * MEM_DESCR_OFFSET);
3480                         pm_arr = mem_descr->mem_array;
3481
3482                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3483                         status = be_cmd_iscsi_post_template_hdr(
3484                                  &phba->ctrl, &sgl);
3485
3486                         if (status != 0) {
3487                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3488                                             "BM_%d : Post Template HDR Failed for"
3489                                             "ULP_%d\n", ulp_num);
3490                                 return status;
3491                         }
3492
3493                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3494                                     "BM_%d : Template HDR Pages Posted for"
3495                                     "ULP_%d\n", ulp_num);
3496                 }
3497         }
3498         return 0;
3499 }
3500
3501 static int
3502 beiscsi_post_pages(struct beiscsi_hba *phba)
3503 {
3504         struct be_mem_descriptor *mem_descr;
3505         struct mem_array *pm_arr;
3506         unsigned int page_offset, i;
3507         struct be_dma_mem sgl;
3508         int status, ulp_num = 0;
3509
3510         mem_descr = phba->init_mem;
3511         mem_descr += HWI_MEM_SGE;
3512         pm_arr = mem_descr->mem_array;
3513
3514         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3515                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3516                         break;
3517
3518         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3519                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3520         for (i = 0; i < mem_descr->num_elements; i++) {
3521                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3522                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3523                                                 page_offset,
3524                                                 (pm_arr->size / PAGE_SIZE));
3525                 page_offset += pm_arr->size / PAGE_SIZE;
3526                 if (status != 0) {
3527                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3528                                     "BM_%d : post sgl failed.\n");
3529                         return status;
3530                 }
3531                 pm_arr++;
3532         }
3533         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3534                     "BM_%d : POSTED PAGES\n");
3535         return 0;
3536 }
3537
3538 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3539 {
3540         struct be_dma_mem *mem = &q->dma_mem;
3541         if (mem->va) {
3542                 pci_free_consistent(phba->pcidev, mem->size,
3543                         mem->va, mem->dma);
3544                 mem->va = NULL;
3545         }
3546 }
3547
3548 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3549                 u16 len, u16 entry_size)
3550 {
3551         struct be_dma_mem *mem = &q->dma_mem;
3552
3553         memset(q, 0, sizeof(*q));
3554         q->len = len;
3555         q->entry_size = entry_size;
3556         mem->size = len * entry_size;
3557         mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3558         if (!mem->va)
3559                 return -ENOMEM;
3560         return 0;
3561 }
3562
3563 static int
3564 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3565                          struct hwi_context_memory *phwi_context,
3566                          struct hwi_controller *phwi_ctrlr)
3567 {
3568         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3569         u64 pa_addr_lo;
3570         unsigned int idx, num, i, ulp_num;
3571         struct mem_array *pwrb_arr;
3572         void *wrb_vaddr;
3573         struct be_dma_mem sgl;
3574         struct be_mem_descriptor *mem_descr;
3575         struct hwi_wrb_context *pwrb_context;
3576         int status;
3577         uint8_t ulp_count = 0, ulp_base_num = 0;
3578         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3579
3580         idx = 0;
3581         mem_descr = phba->init_mem;
3582         mem_descr += HWI_MEM_WRB;
3583         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3584                            GFP_KERNEL);
3585         if (!pwrb_arr) {
3586                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3587                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3588                 return -ENOMEM;
3589         }
3590         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3591         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3592         num_wrb_rings = mem_descr->mem_array[idx].size /
3593                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3594
3595         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3596                 if (num_wrb_rings) {
3597                         pwrb_arr[num].virtual_address = wrb_vaddr;
3598                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3599                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3600                                             sizeof(struct iscsi_wrb);
3601                         wrb_vaddr += pwrb_arr[num].size;
3602                         pa_addr_lo += pwrb_arr[num].size;
3603                         num_wrb_rings--;
3604                 } else {
3605                         idx++;
3606                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3607                         pa_addr_lo = mem_descr->mem_array[idx].\
3608                                         bus_address.u.a64.address;
3609                         num_wrb_rings = mem_descr->mem_array[idx].size /
3610                                         (phba->params.wrbs_per_cxn *
3611                                         sizeof(struct iscsi_wrb));
3612                         pwrb_arr[num].virtual_address = wrb_vaddr;
3613                         pwrb_arr[num].bus_address.u.a64.address\
3614                                                 = pa_addr_lo;
3615                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3616                                                  sizeof(struct iscsi_wrb);
3617                         wrb_vaddr += pwrb_arr[num].size;
3618                         pa_addr_lo   += pwrb_arr[num].size;
3619                         num_wrb_rings--;
3620                 }
3621         }
3622
3623         /* Get the ULP Count */
3624         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3625                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3626                         ulp_count++;
3627                         ulp_base_num = ulp_num;
3628                         cid_count_ulp[ulp_num] =
3629                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3630                 }
3631
3632         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3633                 wrb_mem_index = 0;
3634                 offset = 0;
3635                 size = 0;
3636
3637                 if (ulp_count > 1) {
3638                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3639
3640                         if (!cid_count_ulp[ulp_base_num])
3641                                 ulp_base_num = (ulp_base_num + 1) %
3642                                                 BEISCSI_ULP_COUNT;
3643
3644                         cid_count_ulp[ulp_base_num]--;
3645                 }
3646
3647
3648                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3649                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3650                                             &phwi_context->be_wrbq[i],
3651                                             &phwi_ctrlr->wrb_context[i],
3652                                             ulp_base_num);
3653                 if (status != 0) {
3654                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3655                                     "BM_%d : wrbq create failed.");
3656                         kfree(pwrb_arr);
3657                         return status;
3658                 }
3659                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3660                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3661         }
3662         kfree(pwrb_arr);
3663         return 0;
3664 }
3665
3666 static void free_wrb_handles(struct beiscsi_hba *phba)
3667 {
3668         unsigned int index;
3669         struct hwi_controller *phwi_ctrlr;
3670         struct hwi_wrb_context *pwrb_context;
3671
3672         phwi_ctrlr = phba->phwi_ctrlr;
3673         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3674                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3675                 kfree(pwrb_context->pwrb_handle_base);
3676                 kfree(pwrb_context->pwrb_handle_basestd);
3677         }
3678 }
3679
3680 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3681 {
3682         struct be_queue_info *q;
3683         struct be_ctrl_info *ctrl = &phba->ctrl;
3684
3685         q = &phba->ctrl.mcc_obj.q;
3686         if (q->created)
3687                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3688         be_queue_free(phba, q);
3689
3690         q = &phba->ctrl.mcc_obj.cq;
3691         if (q->created)
3692                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3693         be_queue_free(phba, q);
3694 }
3695
3696 static void hwi_cleanup(struct beiscsi_hba *phba)
3697 {
3698         struct be_queue_info *q;
3699         struct be_ctrl_info *ctrl = &phba->ctrl;
3700         struct hwi_controller *phwi_ctrlr;
3701         struct hwi_context_memory *phwi_context;
3702         struct hwi_async_pdu_context *pasync_ctx;
3703         int i, eq_for_mcc, ulp_num;
3704
3705         phwi_ctrlr = phba->phwi_ctrlr;
3706         phwi_context = phwi_ctrlr->phwi_ctxt;
3707
3708         be_cmd_iscsi_remove_template_hdr(ctrl);
3709
3710         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3711                 q = &phwi_context->be_wrbq[i];
3712                 if (q->created)
3713                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3714         }
3715         kfree(phwi_context->be_wrbq);
3716         free_wrb_handles(phba);
3717
3718         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3719                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3720
3721                         q = &phwi_context->be_def_hdrq[ulp_num];
3722                         if (q->created)
3723                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3724
3725                         q = &phwi_context->be_def_dataq[ulp_num];
3726                         if (q->created)
3727                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3728
3729                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3730                 }
3731         }
3732
3733         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3734
3735         for (i = 0; i < (phba->num_cpus); i++) {
3736                 q = &phwi_context->be_cq[i];
3737                 if (q->created)
3738                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3739         }
3740
3741         be_mcc_queues_destroy(phba);
3742         if (phba->msix_enabled)
3743                 eq_for_mcc = 1;
3744         else
3745                 eq_for_mcc = 0;
3746         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3747                 q = &phwi_context->be_eq[i].q;
3748                 if (q->created)
3749                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3750         }
3751         be_cmd_fw_uninit(ctrl);
3752 }
3753
3754 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3755                                 struct hwi_context_memory *phwi_context)
3756 {
3757         struct be_queue_info *q, *cq;
3758         struct be_ctrl_info *ctrl = &phba->ctrl;
3759
3760         /* Alloc MCC compl queue */
3761         cq = &phba->ctrl.mcc_obj.cq;
3762         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3763                         sizeof(struct be_mcc_compl)))
3764                 goto err;
3765         /* Ask BE to create MCC compl queue; */
3766         if (phba->msix_enabled) {
3767                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3768                                          [phba->num_cpus].q, false, true, 0))
3769                 goto mcc_cq_free;
3770         } else {
3771                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3772                                           false, true, 0))
3773                 goto mcc_cq_free;
3774         }
3775
3776         /* Alloc MCC queue */
3777         q = &phba->ctrl.mcc_obj.q;
3778         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3779                 goto mcc_cq_destroy;
3780
3781         /* Ask BE to create MCC queue */
3782         if (beiscsi_cmd_mccq_create(phba, q, cq))
3783                 goto mcc_q_free;
3784
3785         return 0;
3786
3787 mcc_q_free:
3788         be_queue_free(phba, q);
3789 mcc_cq_destroy:
3790         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3791 mcc_cq_free:
3792         be_queue_free(phba, cq);
3793 err:
3794         return -ENOMEM;
3795 }
3796
3797 /**
3798  * find_num_cpus()- Get the CPU online count
3799  * @phba: ptr to priv structure
3800  *
3801  * CPU count is used for creating EQ.
3802  **/
3803 static void find_num_cpus(struct beiscsi_hba *phba)
3804 {
3805         int  num_cpus = 0;
3806
3807         num_cpus = num_online_cpus();
3808
3809         switch (phba->generation) {
3810         case BE_GEN2:
3811         case BE_GEN3:
3812                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3813                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3814                 break;
3815         case BE_GEN4:
3816                 /*
3817                  * If eqid_count == 1 fall back to
3818                  * INTX mechanism
3819                  **/
3820                 if (phba->fw_config.eqid_count == 1) {
3821                         enable_msix = 0;
3822                         phba->num_cpus = 1;
3823                         return;
3824                 }
3825
3826                 phba->num_cpus =
3827                         (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3828                         (phba->fw_config.eqid_count - 1) : num_cpus;
3829                 break;
3830         default:
3831                 phba->num_cpus = 1;
3832         }
3833 }
3834
3835 static int hwi_init_port(struct beiscsi_hba *phba)
3836 {
3837         struct hwi_controller *phwi_ctrlr;
3838         struct hwi_context_memory *phwi_context;
3839         unsigned int def_pdu_ring_sz;
3840         struct be_ctrl_info *ctrl = &phba->ctrl;
3841         int status, ulp_num;
3842
3843         phwi_ctrlr = phba->phwi_ctrlr;
3844         phwi_context = phwi_ctrlr->phwi_ctxt;
3845         phwi_context->max_eqd = 128;
3846         phwi_context->min_eqd = 0;
3847         phwi_context->cur_eqd = 0;
3848         be_cmd_fw_initialize(&phba->ctrl);
3849
3850         status = beiscsi_create_eqs(phba, phwi_context);
3851         if (status != 0) {
3852                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3853                             "BM_%d : EQ not created\n");
3854                 goto error;
3855         }
3856
3857         status = be_mcc_queues_create(phba, phwi_context);
3858         if (status != 0)
3859                 goto error;
3860
3861         status = mgmt_check_supported_fw(ctrl, phba);
3862         if (status != 0) {
3863                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3864                             "BM_%d : Unsupported fw version\n");
3865                 goto error;
3866         }
3867
3868         status = beiscsi_create_cqs(phba, phwi_context);
3869         if (status != 0) {
3870                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3871                             "BM_%d : CQ not created\n");
3872                 goto error;
3873         }
3874
3875         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3876                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3877
3878                         def_pdu_ring_sz =
3879                                 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3880                                 sizeof(struct phys_addr);
3881
3882                         status = beiscsi_create_def_hdr(phba, phwi_context,
3883                                                         phwi_ctrlr,
3884                                                         def_pdu_ring_sz,
3885                                                         ulp_num);
3886                         if (status != 0) {
3887                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3888                                             "BM_%d : Default Header not created for ULP : %d\n",
3889                                             ulp_num);
3890                                 goto error;
3891                         }
3892
3893                         status = beiscsi_create_def_data(phba, phwi_context,
3894                                                          phwi_ctrlr,
3895                                                          def_pdu_ring_sz,
3896                                                          ulp_num);
3897                         if (status != 0) {
3898                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3899                                             "BM_%d : Default Data not created for ULP : %d\n",
3900                                             ulp_num);
3901                                 goto error;
3902                         }
3903                 }
3904         }
3905
3906         status = beiscsi_post_pages(phba);
3907         if (status != 0) {
3908                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3909                             "BM_%d : Post SGL Pages Failed\n");
3910                 goto error;
3911         }
3912
3913         status = beiscsi_post_template_hdr(phba);
3914         if (status != 0) {
3915                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3916                             "BM_%d : Template HDR Posting for CXN Failed\n");
3917         }
3918
3919         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3920         if (status != 0) {
3921                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3922                             "BM_%d : WRB Rings not created\n");
3923                 goto error;
3924         }
3925
3926         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3927                 uint16_t async_arr_idx = 0;
3928
3929                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3930                         uint16_t cri = 0;
3931                         struct hwi_async_pdu_context *pasync_ctx;
3932
3933                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3934                                      phwi_ctrlr, ulp_num);
3935                         for (cri = 0; cri <
3936                              phba->params.cxns_per_ctrl; cri++) {
3937                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3938                                                (phwi_ctrlr, cri))
3939                                         pasync_ctx->cid_to_async_cri_map[
3940                                         phwi_ctrlr->wrb_context[cri].cid] =
3941                                         async_arr_idx++;
3942                         }
3943                 }
3944         }
3945
3946         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3947                     "BM_%d : hwi_init_port success\n");
3948         return 0;
3949
3950 error:
3951         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3952                     "BM_%d : hwi_init_port failed");
3953         hwi_cleanup(phba);
3954         return status;
3955 }
3956
3957 static int hwi_init_controller(struct beiscsi_hba *phba)
3958 {
3959         struct hwi_controller *phwi_ctrlr;
3960
3961         phwi_ctrlr = phba->phwi_ctrlr;
3962         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3963                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3964                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3965                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3966                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3967                             phwi_ctrlr->phwi_ctxt);
3968         } else {
3969                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3970                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3971                             "than one element.Failing to load\n");
3972                 return -ENOMEM;
3973         }
3974
3975         iscsi_init_global_templates(phba);
3976         if (beiscsi_init_wrb_handle(phba))
3977                 return -ENOMEM;
3978
3979         if (hwi_init_async_pdu_ctx(phba)) {
3980                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3981                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3982                 return -ENOMEM;
3983         }
3984
3985         if (hwi_init_port(phba) != 0) {
3986                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3987                             "BM_%d : hwi_init_controller failed\n");
3988
3989                 return -ENOMEM;
3990         }
3991         return 0;
3992 }
3993
3994 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3995 {
3996         struct be_mem_descriptor *mem_descr;
3997         int i, j;
3998
3999         mem_descr = phba->init_mem;
4000         i = 0;
4001         j = 0;
4002         for (i = 0; i < SE_MEM_MAX; i++) {
4003                 for (j = mem_descr->num_elements; j > 0; j--) {
4004                         pci_free_consistent(phba->pcidev,
4005                           mem_descr->mem_array[j - 1].size,
4006                           mem_descr->mem_array[j - 1].virtual_address,
4007                           (unsigned long)mem_descr->mem_array[j - 1].
4008                           bus_address.u.a64.address);
4009                 }
4010
4011                 kfree(mem_descr->mem_array);
4012                 mem_descr++;
4013         }
4014         kfree(phba->init_mem);
4015         kfree(phba->phwi_ctrlr->wrb_context);
4016         kfree(phba->phwi_ctrlr);
4017 }
4018
4019 static int beiscsi_init_controller(struct beiscsi_hba *phba)
4020 {
4021         int ret = -ENOMEM;
4022
4023         ret = beiscsi_get_memory(phba);
4024         if (ret < 0) {
4025                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4026                             "BM_%d : beiscsi_dev_probe -"
4027                             "Failed in beiscsi_alloc_memory\n");
4028                 return ret;
4029         }
4030
4031         ret = hwi_init_controller(phba);
4032         if (ret)
4033                 goto free_init;
4034         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4035                     "BM_%d : Return success from beiscsi_init_controller");
4036
4037         return 0;
4038
4039 free_init:
4040         beiscsi_free_mem(phba);
4041         return ret;
4042 }
4043
4044 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
4045 {
4046         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
4047         struct sgl_handle *psgl_handle;
4048         struct iscsi_sge *pfrag;
4049         unsigned int arr_index, i, idx;
4050         unsigned int ulp_icd_start, ulp_num = 0;
4051
4052         phba->io_sgl_hndl_avbl = 0;
4053         phba->eh_sgl_hndl_avbl = 0;
4054
4055         mem_descr_sglh = phba->init_mem;
4056         mem_descr_sglh += HWI_MEM_SGLH;
4057         if (1 == mem_descr_sglh->num_elements) {
4058                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4059                                                  phba->params.ios_per_ctrl,
4060                                                  GFP_KERNEL);
4061                 if (!phba->io_sgl_hndl_base) {
4062                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4063                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4064                         return -ENOMEM;
4065                 }
4066                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4067                                                  (phba->params.icds_per_ctrl -
4068                                                  phba->params.ios_per_ctrl),
4069                                                  GFP_KERNEL);
4070                 if (!phba->eh_sgl_hndl_base) {
4071                         kfree(phba->io_sgl_hndl_base);
4072                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4073                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4074                         return -ENOMEM;
4075                 }
4076         } else {
4077                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4078                             "BM_%d : HWI_MEM_SGLH is more than one element."
4079                             "Failing to load\n");
4080                 return -ENOMEM;
4081         }
4082
4083         arr_index = 0;
4084         idx = 0;
4085         while (idx < mem_descr_sglh->num_elements) {
4086                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4087
4088                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4089                       sizeof(struct sgl_handle)); i++) {
4090                         if (arr_index < phba->params.ios_per_ctrl) {
4091                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4092                                 phba->io_sgl_hndl_avbl++;
4093                                 arr_index++;
4094                         } else {
4095                                 phba->eh_sgl_hndl_base[arr_index -
4096                                         phba->params.ios_per_ctrl] =
4097                                                                 psgl_handle;
4098                                 arr_index++;
4099                                 phba->eh_sgl_hndl_avbl++;
4100                         }
4101                         psgl_handle++;
4102                 }
4103                 idx++;
4104         }
4105         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4106                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
4107                     "phba->eh_sgl_hndl_avbl=%d\n",
4108                     phba->io_sgl_hndl_avbl,
4109                     phba->eh_sgl_hndl_avbl);
4110
4111         mem_descr_sg = phba->init_mem;
4112         mem_descr_sg += HWI_MEM_SGE;
4113         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4114                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4115                     mem_descr_sg->num_elements);
4116
4117         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4118                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4119                         break;
4120
4121         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4122
4123         arr_index = 0;
4124         idx = 0;
4125         while (idx < mem_descr_sg->num_elements) {
4126                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4127
4128                 for (i = 0;
4129                      i < (mem_descr_sg->mem_array[idx].size) /
4130                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4131                      i++) {
4132                         if (arr_index < phba->params.ios_per_ctrl)
4133                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4134                         else
4135                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4136                                                 phba->params.ios_per_ctrl];
4137                         psgl_handle->pfrag = pfrag;
4138                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4139                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4140                         pfrag += phba->params.num_sge_per_io;
4141                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4142                 }
4143                 idx++;
4144         }
4145         phba->io_sgl_free_index = 0;
4146         phba->io_sgl_alloc_index = 0;
4147         phba->eh_sgl_free_index = 0;
4148         phba->eh_sgl_alloc_index = 0;
4149         return 0;
4150 }
4151
4152 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4153 {
4154         int ret;
4155         uint16_t i, ulp_num;
4156         struct ulp_cid_info *ptr_cid_info = NULL;
4157
4158         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4159                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4160                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4161                                                GFP_KERNEL);
4162
4163                         if (!ptr_cid_info) {
4164                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4165                                             "BM_%d : Failed to allocate memory"
4166                                             "for ULP_CID_INFO for ULP : %d\n",
4167                                             ulp_num);
4168                                 ret = -ENOMEM;
4169                                 goto free_memory;
4170
4171                         }
4172
4173                         /* Allocate memory for CID array */
4174                         ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4175                                                   BEISCSI_GET_CID_COUNT(phba,
4176                                                   ulp_num), GFP_KERNEL);
4177                         if (!ptr_cid_info->cid_array) {
4178                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4179                                             "BM_%d : Failed to allocate memory"
4180                                             "for CID_ARRAY for ULP : %d\n",
4181                                             ulp_num);
4182                                 kfree(ptr_cid_info);
4183                                 ptr_cid_info = NULL;
4184                                 ret = -ENOMEM;
4185
4186                                 goto free_memory;
4187                         }
4188                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4189                                                    phba, ulp_num);
4190
4191                         /* Save the cid_info_array ptr */
4192                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4193                 }
4194         }
4195         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4196                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4197         if (!phba->ep_array) {
4198                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4199                             "BM_%d : Failed to allocate memory in "
4200                             "hba_setup_cid_tbls\n");
4201                 ret = -ENOMEM;
4202
4203                 goto free_memory;
4204         }
4205
4206         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4207                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4208         if (!phba->conn_table) {
4209                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4210                             "BM_%d : Failed to allocate memory in"
4211                             "hba_setup_cid_tbls\n");
4212
4213                 kfree(phba->ep_array);
4214                 phba->ep_array = NULL;
4215                 ret = -ENOMEM;
4216
4217                 goto free_memory;
4218         }
4219
4220         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4221                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4222
4223                 ptr_cid_info = phba->cid_array_info[ulp_num];
4224                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4225                         phba->phwi_ctrlr->wrb_context[i].cid;
4226
4227         }
4228
4229         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4230                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4231                         ptr_cid_info = phba->cid_array_info[ulp_num];
4232
4233                         ptr_cid_info->cid_alloc = 0;
4234                         ptr_cid_info->cid_free = 0;
4235                 }
4236         }
4237         return 0;
4238
4239 free_memory:
4240         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4241                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4242                         ptr_cid_info = phba->cid_array_info[ulp_num];
4243
4244                         if (ptr_cid_info) {
4245                                 kfree(ptr_cid_info->cid_array);
4246                                 kfree(ptr_cid_info);
4247                                 phba->cid_array_info[ulp_num] = NULL;
4248                         }
4249                 }
4250         }
4251
4252         return ret;
4253 }
4254
4255 static void hwi_enable_intr(struct beiscsi_hba *phba)
4256 {
4257         struct be_ctrl_info *ctrl = &phba->ctrl;
4258         struct hwi_controller *phwi_ctrlr;
4259         struct hwi_context_memory *phwi_context;
4260         struct be_queue_info *eq;
4261         u8 __iomem *addr;
4262         u32 reg, i;
4263         u32 enabled;
4264
4265         phwi_ctrlr = phba->phwi_ctrlr;
4266         phwi_context = phwi_ctrlr->phwi_ctxt;
4267
4268         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4269                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4270         reg = ioread32(addr);
4271
4272         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4273         if (!enabled) {
4274                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4275                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4276                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4277                 iowrite32(reg, addr);
4278         }
4279
4280         if (!phba->msix_enabled) {
4281                 eq = &phwi_context->be_eq[0].q;
4282                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4283                             "BM_%d : eq->id=%d\n", eq->id);
4284
4285                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4286         } else {
4287                 for (i = 0; i <= phba->num_cpus; i++) {
4288                         eq = &phwi_context->be_eq[i].q;
4289                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4290                                     "BM_%d : eq->id=%d\n", eq->id);
4291                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4292                 }
4293         }
4294 }
4295
4296 static void hwi_disable_intr(struct beiscsi_hba *phba)
4297 {
4298         struct be_ctrl_info *ctrl = &phba->ctrl;
4299
4300         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4301         u32 reg = ioread32(addr);
4302
4303         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4304         if (enabled) {
4305                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4306                 iowrite32(reg, addr);
4307         } else
4308                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4309                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4310 }
4311
4312 /**
4313  * beiscsi_get_boot_info()- Get the boot session info
4314  * @phba: The device priv structure instance
4315  *
4316  * Get the boot target info and store in driver priv structure
4317  *
4318  * return values
4319  *      Success: 0
4320  *      Failure: Non-Zero Value
4321  **/
4322 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4323 {
4324         struct be_cmd_get_session_resp *session_resp;
4325         struct be_dma_mem nonemb_cmd;
4326         unsigned int tag;
4327         unsigned int s_handle;
4328         int ret = -ENOMEM;
4329
4330         /* Get the session handle of the boot target */
4331         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4332         if (ret) {
4333                 beiscsi_log(phba, KERN_ERR,
4334                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4335                             "BM_%d : No boot session\n");
4336
4337                 if (ret == -ENXIO)
4338                         phba->get_boot = 0;
4339
4340
4341                 return ret;
4342         }
4343         phba->get_boot = 0;
4344         nonemb_cmd.va = pci_zalloc_consistent(phba->ctrl.pdev,
4345                                               sizeof(*session_resp),
4346                                               &nonemb_cmd.dma);
4347         if (nonemb_cmd.va == NULL) {
4348                 beiscsi_log(phba, KERN_ERR,
4349                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4350                             "BM_%d : Failed to allocate memory for"
4351                             "beiscsi_get_session_info\n");
4352
4353                 return -ENOMEM;
4354         }
4355
4356         tag = mgmt_get_session_info(phba, s_handle,
4357                                     &nonemb_cmd);
4358         if (!tag) {
4359                 beiscsi_log(phba, KERN_ERR,
4360                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4361                             "BM_%d : beiscsi_get_session_info"
4362                             " Failed\n");
4363
4364                 goto boot_freemem;
4365         }
4366
4367         ret = beiscsi_mccq_compl(phba, tag, NULL, &nonemb_cmd);
4368         if (ret) {
4369                 beiscsi_log(phba, KERN_ERR,
4370                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4371                             "BM_%d : beiscsi_get_session_info Failed");
4372
4373                 if (ret != -EBUSY)
4374                         goto boot_freemem;
4375                 else
4376                         return ret;
4377         }
4378
4379         session_resp = nonemb_cmd.va ;
4380
4381         memcpy(&phba->boot_sess, &session_resp->session_info,
4382                sizeof(struct mgmt_session_info));
4383         ret = 0;
4384
4385 boot_freemem:
4386         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4387                     nonemb_cmd.va, nonemb_cmd.dma);
4388         return ret;
4389 }
4390
4391 static void beiscsi_boot_release(void *data)
4392 {
4393         struct beiscsi_hba *phba = data;
4394
4395         scsi_host_put(phba->shost);
4396 }
4397
4398 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4399 {
4400         struct iscsi_boot_kobj *boot_kobj;
4401
4402         /* it has been created previously */
4403         if (phba->boot_kset)
4404                 return 0;
4405
4406         /* get boot info using mgmt cmd */
4407         if (beiscsi_get_boot_info(phba))
4408                 /* Try to see if we can carry on without this */
4409                 return 0;
4410
4411         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4412         if (!phba->boot_kset)
4413                 return -ENOMEM;
4414
4415         /* get a ref because the show function will ref the phba */
4416         if (!scsi_host_get(phba->shost))
4417                 goto free_kset;
4418         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4419                                              beiscsi_show_boot_tgt_info,
4420                                              beiscsi_tgt_get_attr_visibility,
4421                                              beiscsi_boot_release);
4422         if (!boot_kobj)
4423                 goto put_shost;
4424
4425         if (!scsi_host_get(phba->shost))
4426                 goto free_kset;
4427         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4428                                                 beiscsi_show_boot_ini_info,
4429                                                 beiscsi_ini_get_attr_visibility,
4430                                                 beiscsi_boot_release);
4431         if (!boot_kobj)
4432                 goto put_shost;
4433
4434         if (!scsi_host_get(phba->shost))
4435                 goto free_kset;
4436         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4437                                                beiscsi_show_boot_eth_info,
4438                                                beiscsi_eth_get_attr_visibility,
4439                                                beiscsi_boot_release);
4440         if (!boot_kobj)
4441                 goto put_shost;
4442         return 0;
4443
4444 put_shost:
4445         scsi_host_put(phba->shost);
4446 free_kset:
4447         iscsi_boot_destroy_kset(phba->boot_kset);
4448         return -ENOMEM;
4449 }
4450
4451 static int beiscsi_init_port(struct beiscsi_hba *phba)
4452 {
4453         int ret;
4454
4455         ret = beiscsi_init_controller(phba);
4456         if (ret < 0) {
4457                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4458                             "BM_%d : beiscsi_dev_probe - Failed in"
4459                             "beiscsi_init_controller\n");
4460                 return ret;
4461         }
4462         ret = beiscsi_init_sgl_handle(phba);
4463         if (ret < 0) {
4464                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4465                             "BM_%d : beiscsi_dev_probe - Failed in"
4466                             "beiscsi_init_sgl_handle\n");
4467                 goto do_cleanup_ctrlr;
4468         }
4469
4470         if (hba_setup_cid_tbls(phba)) {
4471                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4472                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4473                 kfree(phba->io_sgl_hndl_base);
4474                 kfree(phba->eh_sgl_hndl_base);
4475                 goto do_cleanup_ctrlr;
4476         }
4477
4478         return ret;
4479
4480 do_cleanup_ctrlr:
4481         hwi_cleanup(phba);
4482         return ret;
4483 }
4484
4485 static void hwi_purge_eq(struct beiscsi_hba *phba)
4486 {
4487         struct hwi_controller *phwi_ctrlr;
4488         struct hwi_context_memory *phwi_context;
4489         struct be_queue_info *eq;
4490         struct be_eq_entry *eqe = NULL;
4491         int i, eq_msix;
4492         unsigned int num_processed;
4493
4494         phwi_ctrlr = phba->phwi_ctrlr;
4495         phwi_context = phwi_ctrlr->phwi_ctxt;
4496         if (phba->msix_enabled)
4497                 eq_msix = 1;
4498         else
4499                 eq_msix = 0;
4500
4501         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4502                 eq = &phwi_context->be_eq[i].q;
4503                 eqe = queue_tail_node(eq);
4504                 num_processed = 0;
4505                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4506                                         & EQE_VALID_MASK) {
4507                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4508                         queue_tail_inc(eq);
4509                         eqe = queue_tail_node(eq);
4510                         num_processed++;
4511                 }
4512
4513                 if (num_processed)
4514                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
4515         }
4516 }
4517
4518 static void beiscsi_clean_port(struct beiscsi_hba *phba)
4519 {
4520         int mgmt_status, ulp_num;
4521         struct ulp_cid_info *ptr_cid_info = NULL;
4522
4523         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4524                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4525                         mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4526                         if (mgmt_status)
4527                                 beiscsi_log(phba, KERN_WARNING,
4528                                             BEISCSI_LOG_INIT,
4529                                             "BM_%d : mgmt_epfw_cleanup FAILED"
4530                                             " for ULP_%d\n", ulp_num);
4531                 }
4532         }
4533
4534         hwi_purge_eq(phba);
4535         hwi_cleanup(phba);
4536         kfree(phba->io_sgl_hndl_base);
4537         kfree(phba->eh_sgl_hndl_base);
4538         kfree(phba->ep_array);
4539         kfree(phba->conn_table);
4540
4541         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4542                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4543                         ptr_cid_info = phba->cid_array_info[ulp_num];
4544
4545                         if (ptr_cid_info) {
4546                                 kfree(ptr_cid_info->cid_array);
4547                                 kfree(ptr_cid_info);
4548                                 phba->cid_array_info[ulp_num] = NULL;
4549                         }
4550                 }
4551         }
4552
4553 }
4554
4555 /**
4556  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4557  * @beiscsi_conn: ptr to the conn to be cleaned up
4558  * @task: ptr to iscsi_task resource to be freed.
4559  *
4560  * Free driver mgmt resources binded to CXN.
4561  **/
4562 void
4563 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4564                                 struct iscsi_task *task)
4565 {
4566         struct beiscsi_io_task *io_task;
4567         struct beiscsi_hba *phba = beiscsi_conn->phba;
4568         struct hwi_wrb_context *pwrb_context;
4569         struct hwi_controller *phwi_ctrlr;
4570         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4571                                 beiscsi_conn->beiscsi_conn_cid);
4572
4573         phwi_ctrlr = phba->phwi_ctrlr;
4574         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4575
4576         io_task = task->dd_data;
4577
4578         if (io_task->pwrb_handle) {
4579                 memset(io_task->pwrb_handle->pwrb, 0,
4580                        sizeof(struct iscsi_wrb));
4581                 free_wrb_handle(phba, pwrb_context,
4582                                 io_task->pwrb_handle);
4583                 io_task->pwrb_handle = NULL;
4584         }
4585
4586         if (io_task->psgl_handle) {
4587                 spin_lock_bh(&phba->mgmt_sgl_lock);
4588                 free_mgmt_sgl_handle(phba,
4589                                      io_task->psgl_handle);
4590                 io_task->psgl_handle = NULL;
4591                 spin_unlock_bh(&phba->mgmt_sgl_lock);
4592         }
4593
4594         if (io_task->mtask_addr)
4595                 pci_unmap_single(phba->pcidev,
4596                                  io_task->mtask_addr,
4597                                  io_task->mtask_data_count,
4598                                  PCI_DMA_TODEVICE);
4599 }
4600
4601 /**
4602  * beiscsi_cleanup_task()- Free driver resources of the task
4603  * @task: ptr to the iscsi task
4604  *
4605  **/
4606 static void beiscsi_cleanup_task(struct iscsi_task *task)
4607 {
4608         struct beiscsi_io_task *io_task = task->dd_data;
4609         struct iscsi_conn *conn = task->conn;
4610         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4611         struct beiscsi_hba *phba = beiscsi_conn->phba;
4612         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4613         struct hwi_wrb_context *pwrb_context;
4614         struct hwi_controller *phwi_ctrlr;
4615         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4616                              beiscsi_conn->beiscsi_conn_cid);
4617
4618         phwi_ctrlr = phba->phwi_ctrlr;
4619         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4620
4621         if (io_task->cmd_bhs) {
4622                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4623                               io_task->bhs_pa.u.a64.address);
4624                 io_task->cmd_bhs = NULL;
4625         }
4626
4627         if (task->sc) {
4628                 if (io_task->pwrb_handle) {
4629                         free_wrb_handle(phba, pwrb_context,
4630                                         io_task->pwrb_handle);
4631                         io_task->pwrb_handle = NULL;
4632                 }
4633
4634                 if (io_task->psgl_handle) {
4635                         spin_lock(&phba->io_sgl_lock);
4636                         free_io_sgl_handle(phba, io_task->psgl_handle);
4637                         spin_unlock(&phba->io_sgl_lock);
4638                         io_task->psgl_handle = NULL;
4639                 }
4640
4641                 if (io_task->scsi_cmnd) {
4642                         scsi_dma_unmap(io_task->scsi_cmnd);
4643                         io_task->scsi_cmnd = NULL;
4644                 }
4645         } else {
4646                 if (!beiscsi_conn->login_in_progress)
4647                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4648         }
4649 }
4650
4651 void
4652 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4653                            struct beiscsi_offload_params *params)
4654 {
4655         struct wrb_handle *pwrb_handle;
4656         struct beiscsi_hba *phba = beiscsi_conn->phba;
4657         struct iscsi_task *task = beiscsi_conn->task;
4658         struct iscsi_session *session = task->conn->session;
4659         u32 doorbell = 0;
4660
4661         /*
4662          * We can always use 0 here because it is reserved by libiscsi for
4663          * login/startup related tasks.
4664          */
4665         beiscsi_conn->login_in_progress = 0;
4666         spin_lock_bh(&session->back_lock);
4667         beiscsi_cleanup_task(task);
4668         spin_unlock_bh(&session->back_lock);
4669
4670         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
4671
4672         /* Check for the adapter family */
4673         if (is_chip_be2_be3r(phba))
4674                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4675                                        phba->init_mem);
4676         else
4677                 beiscsi_offload_cxn_v2(params, pwrb_handle);
4678
4679         be_dws_le_to_cpu(pwrb_handle->pwrb,
4680                          sizeof(struct iscsi_target_context_update_wrb));
4681
4682         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4683         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4684                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4685         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4686         iowrite32(doorbell, phba->db_va +
4687                   beiscsi_conn->doorbell_offset);
4688 }
4689
4690 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4691                               int *index, int *age)
4692 {
4693         *index = (int)itt;
4694         if (age)
4695                 *age = conn->session->age;
4696 }
4697
4698 /**
4699  * beiscsi_alloc_pdu - allocates pdu and related resources
4700  * @task: libiscsi task
4701  * @opcode: opcode of pdu for task
4702  *
4703  * This is called with the session lock held. It will allocate
4704  * the wrb and sgl if needed for the command. And it will prep
4705  * the pdu's itt. beiscsi_parse_pdu will later translate
4706  * the pdu itt to the libiscsi task itt.
4707  */
4708 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4709 {
4710         struct beiscsi_io_task *io_task = task->dd_data;
4711         struct iscsi_conn *conn = task->conn;
4712         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4713         struct beiscsi_hba *phba = beiscsi_conn->phba;
4714         struct hwi_wrb_context *pwrb_context;
4715         struct hwi_controller *phwi_ctrlr;
4716         itt_t itt;
4717         uint16_t cri_index = 0;
4718         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4719         dma_addr_t paddr;
4720
4721         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4722                                           GFP_ATOMIC, &paddr);
4723         if (!io_task->cmd_bhs)
4724                 return -ENOMEM;
4725         io_task->bhs_pa.u.a64.address = paddr;
4726         io_task->libiscsi_itt = (itt_t)task->itt;
4727         io_task->conn = beiscsi_conn;
4728
4729         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4730         task->hdr_max = sizeof(struct be_cmd_bhs);
4731         io_task->psgl_handle = NULL;
4732         io_task->pwrb_handle = NULL;
4733
4734         if (task->sc) {
4735                 spin_lock(&phba->io_sgl_lock);
4736                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4737                 spin_unlock(&phba->io_sgl_lock);
4738                 if (!io_task->psgl_handle) {
4739                         beiscsi_log(phba, KERN_ERR,
4740                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4741                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4742                                     "for the CID : %d\n",
4743                                     beiscsi_conn->beiscsi_conn_cid);
4744                         goto free_hndls;
4745                 }
4746                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4747                                         beiscsi_conn->beiscsi_conn_cid);
4748                 if (!io_task->pwrb_handle) {
4749                         beiscsi_log(phba, KERN_ERR,
4750                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4751                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4752                                     "for the CID : %d\n",
4753                                     beiscsi_conn->beiscsi_conn_cid);
4754                         goto free_io_hndls;
4755                 }
4756         } else {
4757                 io_task->scsi_cmnd = NULL;
4758                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4759                         beiscsi_conn->task = task;
4760                         if (!beiscsi_conn->login_in_progress) {
4761                                 spin_lock(&phba->mgmt_sgl_lock);
4762                                 io_task->psgl_handle = (struct sgl_handle *)
4763                                                 alloc_mgmt_sgl_handle(phba);
4764                                 spin_unlock(&phba->mgmt_sgl_lock);
4765                                 if (!io_task->psgl_handle) {
4766                                         beiscsi_log(phba, KERN_ERR,
4767                                                     BEISCSI_LOG_IO |
4768                                                     BEISCSI_LOG_CONFIG,
4769                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4770                                                     "for the CID : %d\n",
4771                                                     beiscsi_conn->
4772                                                     beiscsi_conn_cid);
4773                                         goto free_hndls;
4774                                 }
4775
4776                                 beiscsi_conn->login_in_progress = 1;
4777                                 beiscsi_conn->plogin_sgl_handle =
4778                                                         io_task->psgl_handle;
4779                                 io_task->pwrb_handle =
4780                                         alloc_wrb_handle(phba,
4781                                         beiscsi_conn->beiscsi_conn_cid);
4782                                 if (!io_task->pwrb_handle) {
4783                                         beiscsi_log(phba, KERN_ERR,
4784                                                     BEISCSI_LOG_IO |
4785                                                     BEISCSI_LOG_CONFIG,
4786                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4787                                                     "for the CID : %d\n",
4788                                                     beiscsi_conn->
4789                                                     beiscsi_conn_cid);
4790                                         goto free_mgmt_hndls;
4791                                 }
4792                                 beiscsi_conn->plogin_wrb_handle =
4793                                                         io_task->pwrb_handle;
4794
4795                         } else {
4796                                 io_task->psgl_handle =
4797                                                 beiscsi_conn->plogin_sgl_handle;
4798                                 io_task->pwrb_handle =
4799                                                 beiscsi_conn->plogin_wrb_handle;
4800                         }
4801                 } else {
4802                         spin_lock(&phba->mgmt_sgl_lock);
4803                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4804                         spin_unlock(&phba->mgmt_sgl_lock);
4805                         if (!io_task->psgl_handle) {
4806                                 beiscsi_log(phba, KERN_ERR,
4807                                             BEISCSI_LOG_IO |
4808                                             BEISCSI_LOG_CONFIG,
4809                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4810                                             "for the CID : %d\n",
4811                                             beiscsi_conn->
4812                                             beiscsi_conn_cid);
4813                                 goto free_hndls;
4814                         }
4815                         io_task->pwrb_handle =
4816                                         alloc_wrb_handle(phba,
4817                                         beiscsi_conn->beiscsi_conn_cid);
4818                         if (!io_task->pwrb_handle) {
4819                                 beiscsi_log(phba, KERN_ERR,
4820                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4821                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4822                                             "for the CID : %d\n",
4823                                             beiscsi_conn->beiscsi_conn_cid);
4824                                 goto free_mgmt_hndls;
4825                         }
4826
4827                 }
4828         }
4829         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4830                                  wrb_index << 16) | (unsigned int)
4831                                 (io_task->psgl_handle->sgl_index));
4832         io_task->pwrb_handle->pio_handle = task;
4833
4834         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4835         return 0;
4836
4837 free_io_hndls:
4838         spin_lock(&phba->io_sgl_lock);
4839         free_io_sgl_handle(phba, io_task->psgl_handle);
4840         spin_unlock(&phba->io_sgl_lock);
4841         goto free_hndls;
4842 free_mgmt_hndls:
4843         spin_lock(&phba->mgmt_sgl_lock);
4844         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4845         io_task->psgl_handle = NULL;
4846         spin_unlock(&phba->mgmt_sgl_lock);
4847 free_hndls:
4848         phwi_ctrlr = phba->phwi_ctrlr;
4849         cri_index = BE_GET_CRI_FROM_CID(
4850         beiscsi_conn->beiscsi_conn_cid);
4851         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4852         if (io_task->pwrb_handle)
4853                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4854         io_task->pwrb_handle = NULL;
4855         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4856                       io_task->bhs_pa.u.a64.address);
4857         io_task->cmd_bhs = NULL;
4858         return -ENOMEM;
4859 }
4860 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4861                        unsigned int num_sg, unsigned int xferlen,
4862                        unsigned int writedir)
4863 {
4864
4865         struct beiscsi_io_task *io_task = task->dd_data;
4866         struct iscsi_conn *conn = task->conn;
4867         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4868         struct beiscsi_hba *phba = beiscsi_conn->phba;
4869         struct iscsi_wrb *pwrb = NULL;
4870         unsigned int doorbell = 0;
4871
4872         pwrb = io_task->pwrb_handle->pwrb;
4873
4874         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4875         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4876
4877         if (writedir) {
4878                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4879                               INI_WR_CMD);
4880                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4881         } else {
4882                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4883                               INI_RD_CMD);
4884                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4885         }
4886
4887         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4888                                           type, pwrb);
4889
4890         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4891                       cpu_to_be16(*(unsigned short *)
4892                       &io_task->cmd_bhs->iscsi_hdr.lun));
4893         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4894         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4895                       io_task->pwrb_handle->wrb_index);
4896         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4897                       be32_to_cpu(task->cmdsn));
4898         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4899                       io_task->psgl_handle->sgl_index);
4900
4901         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4902         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4903                       io_task->pwrb_handle->nxt_wrb_index);
4904
4905         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4906
4907         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4908         doorbell |= (io_task->pwrb_handle->wrb_index &
4909                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4910                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4911         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4912         iowrite32(doorbell, phba->db_va +
4913                   beiscsi_conn->doorbell_offset);
4914         return 0;
4915 }
4916
4917 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4918                           unsigned int num_sg, unsigned int xferlen,
4919                           unsigned int writedir)
4920 {
4921
4922         struct beiscsi_io_task *io_task = task->dd_data;
4923         struct iscsi_conn *conn = task->conn;
4924         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4925         struct beiscsi_hba *phba = beiscsi_conn->phba;
4926         struct iscsi_wrb *pwrb = NULL;
4927         unsigned int doorbell = 0;
4928
4929         pwrb = io_task->pwrb_handle->pwrb;
4930         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4931         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4932
4933         if (writedir) {
4934                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4935                               INI_WR_CMD);
4936                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4937         } else {
4938                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4939                               INI_RD_CMD);
4940                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4941         }
4942
4943         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4944                                           type, pwrb);
4945
4946         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4947                       cpu_to_be16(*(unsigned short *)
4948                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4949         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4950         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4951                       io_task->pwrb_handle->wrb_index);
4952         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4953                       be32_to_cpu(task->cmdsn));
4954         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4955                       io_task->psgl_handle->sgl_index);
4956
4957         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4958
4959         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4960                       io_task->pwrb_handle->nxt_wrb_index);
4961         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4962
4963         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4964         doorbell |= (io_task->pwrb_handle->wrb_index &
4965                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4966         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4967
4968         iowrite32(doorbell, phba->db_va +
4969                   beiscsi_conn->doorbell_offset);
4970         return 0;
4971 }
4972
4973 static int beiscsi_mtask(struct iscsi_task *task)
4974 {
4975         struct beiscsi_io_task *io_task = task->dd_data;
4976         struct iscsi_conn *conn = task->conn;
4977         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4978         struct beiscsi_hba *phba = beiscsi_conn->phba;
4979         struct iscsi_wrb *pwrb = NULL;
4980         unsigned int doorbell = 0;
4981         unsigned int cid;
4982         unsigned int pwrb_typeoffset = 0;
4983
4984         cid = beiscsi_conn->beiscsi_conn_cid;
4985         pwrb = io_task->pwrb_handle->pwrb;
4986         memset(pwrb, 0, sizeof(*pwrb));
4987
4988         if (is_chip_be2_be3r(phba)) {
4989                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4990                               be32_to_cpu(task->cmdsn));
4991                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4992                               io_task->pwrb_handle->wrb_index);
4993                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4994                               io_task->psgl_handle->sgl_index);
4995                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4996                               task->data_count);
4997                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4998                               io_task->pwrb_handle->nxt_wrb_index);
4999                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
5000         } else {
5001                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
5002                               be32_to_cpu(task->cmdsn));
5003                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
5004                               io_task->pwrb_handle->wrb_index);
5005                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
5006                               io_task->psgl_handle->sgl_index);
5007                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
5008                               task->data_count);
5009                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
5010                               io_task->pwrb_handle->nxt_wrb_index);
5011                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
5012         }
5013
5014
5015         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
5016         case ISCSI_OP_LOGIN:
5017                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
5018                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5019                 hwi_write_buffer(pwrb, task);
5020                 break;
5021         case ISCSI_OP_NOOP_OUT:
5022                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
5023                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5024                         if (is_chip_be2_be3r(phba))
5025                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5026                                               dmsg, pwrb, 1);
5027                         else
5028                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5029                                               dmsg, pwrb, 1);
5030                 } else {
5031                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
5032                         if (is_chip_be2_be3r(phba))
5033                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5034                                               dmsg, pwrb, 0);
5035                         else
5036                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5037                                               dmsg, pwrb, 0);
5038                 }
5039                 hwi_write_buffer(pwrb, task);
5040                 break;
5041         case ISCSI_OP_TEXT:
5042                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5043                 hwi_write_buffer(pwrb, task);
5044                 break;
5045         case ISCSI_OP_SCSI_TMFUNC:
5046                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
5047                 hwi_write_buffer(pwrb, task);
5048                 break;
5049         case ISCSI_OP_LOGOUT:
5050                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
5051                 hwi_write_buffer(pwrb, task);
5052                 break;
5053
5054         default:
5055                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5056                             "BM_%d : opcode =%d Not supported\n",
5057                             task->hdr->opcode & ISCSI_OPCODE_MASK);
5058
5059                 return -EINVAL;
5060         }
5061
5062         /* Set the task type */
5063         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
5064                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
5065                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
5066
5067         doorbell |= cid & DB_WRB_POST_CID_MASK;
5068         doorbell |= (io_task->pwrb_handle->wrb_index &
5069                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5070         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5071         iowrite32(doorbell, phba->db_va +
5072                   beiscsi_conn->doorbell_offset);
5073         return 0;
5074 }
5075
5076 static int beiscsi_task_xmit(struct iscsi_task *task)
5077 {
5078         struct beiscsi_io_task *io_task = task->dd_data;
5079         struct scsi_cmnd *sc = task->sc;
5080         struct beiscsi_hba *phba = NULL;
5081         struct scatterlist *sg;
5082         int num_sg;
5083         unsigned int  writedir = 0, xferlen = 0;
5084
5085         phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
5086
5087         if (!sc)
5088                 return beiscsi_mtask(task);
5089
5090         io_task->scsi_cmnd = sc;
5091         num_sg = scsi_dma_map(sc);
5092         if (num_sg < 0) {
5093                 struct iscsi_conn *conn = task->conn;
5094                 struct beiscsi_hba *phba = NULL;
5095
5096                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5097                 beiscsi_log(phba, KERN_ERR,
5098                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
5099                             "BM_%d : scsi_dma_map Failed "
5100                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
5101                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
5102                             io_task->libiscsi_itt, scsi_bufflen(sc));
5103
5104                 return num_sg;
5105         }
5106         xferlen = scsi_bufflen(sc);
5107         sg = scsi_sglist(sc);
5108         if (sc->sc_data_direction == DMA_TO_DEVICE)
5109                 writedir = 1;
5110          else
5111                 writedir = 0;
5112
5113          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5114 }
5115
5116 /**
5117  * beiscsi_bsg_request - handle bsg request from ISCSI transport
5118  * @job: job to handle
5119  */
5120 static int beiscsi_bsg_request(struct bsg_job *job)
5121 {
5122         struct Scsi_Host *shost;
5123         struct beiscsi_hba *phba;
5124         struct iscsi_bsg_request *bsg_req = job->request;
5125         int rc = -EINVAL;
5126         unsigned int tag;
5127         struct be_dma_mem nonemb_cmd;
5128         struct be_cmd_resp_hdr *resp;
5129         struct iscsi_bsg_reply *bsg_reply = job->reply;
5130         unsigned short status, extd_status;
5131
5132         shost = iscsi_job_to_shost(job);
5133         phba = iscsi_host_priv(shost);
5134
5135         switch (bsg_req->msgcode) {
5136         case ISCSI_BSG_HST_VENDOR:
5137                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5138                                         job->request_payload.payload_len,
5139                                         &nonemb_cmd.dma);
5140                 if (nonemb_cmd.va == NULL) {
5141                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5142                                     "BM_%d : Failed to allocate memory for "
5143                                     "beiscsi_bsg_request\n");
5144                         return -ENOMEM;
5145                 }
5146                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5147                                                   &nonemb_cmd);
5148                 if (!tag) {
5149                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5150                                     "BM_%d : MBX Tag Allocation Failed\n");
5151
5152                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5153                                             nonemb_cmd.va, nonemb_cmd.dma);
5154                         return -EAGAIN;
5155                 }
5156
5157                 rc = wait_event_interruptible_timeout(
5158                                         phba->ctrl.mcc_wait[tag],
5159                                         phba->ctrl.mcc_numtag[tag],
5160                                         msecs_to_jiffies(
5161                                         BEISCSI_HOST_MBX_TIMEOUT));
5162                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5163                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5164                 free_mcc_tag(&phba->ctrl, tag);
5165                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5166                 sg_copy_from_buffer(job->reply_payload.sg_list,
5167                                     job->reply_payload.sg_cnt,
5168                                     nonemb_cmd.va, (resp->response_length
5169                                     + sizeof(*resp)));
5170                 bsg_reply->reply_payload_rcv_len = resp->response_length;
5171                 bsg_reply->result = status;
5172                 bsg_job_done(job, bsg_reply->result,
5173                              bsg_reply->reply_payload_rcv_len);
5174                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5175                                     nonemb_cmd.va, nonemb_cmd.dma);
5176                 if (status || extd_status) {
5177                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5178                                     "BM_%d : MBX Cmd Failed"
5179                                     " status = %d extd_status = %d\n",
5180                                     status, extd_status);
5181
5182                         return -EIO;
5183                 } else {
5184                         rc = 0;
5185                 }
5186                 break;
5187
5188         default:
5189                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5190                                 "BM_%d : Unsupported bsg command: 0x%x\n",
5191                                 bsg_req->msgcode);
5192                 break;
5193         }
5194
5195         return rc;
5196 }
5197
5198 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5199 {
5200         /* Set the logging parameter */
5201         beiscsi_log_enable_init(phba, beiscsi_log_enable);
5202 }
5203
5204 /*
5205  * beiscsi_quiesce()- Cleanup Driver resources
5206  * @phba: Instance Priv structure
5207  * @unload_state:i Clean or EEH unload state
5208  *
5209  * Free the OS and HW resources held by the driver
5210  **/
5211 static void beiscsi_quiesce(struct beiscsi_hba *phba,
5212                 uint32_t unload_state)
5213 {
5214         struct hwi_controller *phwi_ctrlr;
5215         struct hwi_context_memory *phwi_context;
5216         struct be_eq_obj *pbe_eq;
5217         unsigned int i, msix_vec;
5218
5219         phwi_ctrlr = phba->phwi_ctrlr;
5220         phwi_context = phwi_ctrlr->phwi_ctxt;
5221         hwi_disable_intr(phba);
5222         if (phba->msix_enabled) {
5223                 for (i = 0; i <= phba->num_cpus; i++) {
5224                         msix_vec = phba->msix_entries[i].vector;
5225                         synchronize_irq(msix_vec);
5226                         free_irq(msix_vec, &phwi_context->be_eq[i]);
5227                         kfree(phba->msi_name[i]);
5228                 }
5229         } else
5230                 if (phba->pcidev->irq) {
5231                         synchronize_irq(phba->pcidev->irq);
5232                         free_irq(phba->pcidev->irq, phba);
5233                 }
5234         pci_disable_msix(phba->pcidev);
5235         cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5236
5237         for (i = 0; i < phba->num_cpus; i++) {
5238                 pbe_eq = &phwi_context->be_eq[i];
5239                 blk_iopoll_disable(&pbe_eq->iopoll);
5240         }
5241
5242         if (unload_state == BEISCSI_CLEAN_UNLOAD) {
5243                 destroy_workqueue(phba->wq);
5244                 beiscsi_clean_port(phba);
5245                 beiscsi_free_mem(phba);
5246
5247                 beiscsi_unmap_pci_function(phba);
5248                 pci_free_consistent(phba->pcidev,
5249                                     phba->ctrl.mbox_mem_alloced.size,
5250                                     phba->ctrl.mbox_mem_alloced.va,
5251                                     phba->ctrl.mbox_mem_alloced.dma);
5252         } else {
5253                 hwi_purge_eq(phba);
5254                 hwi_cleanup(phba);
5255         }
5256
5257 }
5258
5259 static void beiscsi_remove(struct pci_dev *pcidev)
5260 {
5261
5262         struct beiscsi_hba *phba = NULL;
5263
5264         phba = pci_get_drvdata(pcidev);
5265         if (!phba) {
5266                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5267                 return;
5268         }
5269
5270         beiscsi_destroy_def_ifaces(phba);
5271         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5272         iscsi_boot_destroy_kset(phba->boot_kset);
5273         iscsi_host_remove(phba->shost);
5274         pci_dev_put(phba->pcidev);
5275         iscsi_host_free(phba->shost);
5276         pci_disable_pcie_error_reporting(pcidev);
5277         pci_set_drvdata(pcidev, NULL);
5278         pci_disable_device(pcidev);
5279 }
5280
5281 static void beiscsi_shutdown(struct pci_dev *pcidev)
5282 {
5283
5284         struct beiscsi_hba *phba = NULL;
5285
5286         phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
5287         if (!phba) {
5288                 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
5289                 return;
5290         }
5291
5292         phba->state = BE_ADAPTER_STATE_SHUTDOWN;
5293         iscsi_host_for_each_session(phba->shost, be2iscsi_fail_session);
5294         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5295         pci_disable_device(pcidev);
5296 }
5297
5298 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5299 {
5300         int i, status;
5301
5302         for (i = 0; i <= phba->num_cpus; i++)
5303                 phba->msix_entries[i].entry = i;
5304
5305         status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
5306                                        phba->num_cpus + 1, phba->num_cpus + 1);
5307         if (status > 0)
5308                 phba->msix_enabled = true;
5309
5310         return;
5311 }
5312
5313 static void be_eqd_update(struct beiscsi_hba *phba)
5314 {
5315         struct be_set_eqd set_eqd[MAX_CPUS];
5316         struct be_aic_obj *aic;
5317         struct be_eq_obj *pbe_eq;
5318         struct hwi_controller *phwi_ctrlr;
5319         struct hwi_context_memory *phwi_context;
5320         int eqd, i, num = 0;
5321         ulong now;
5322         u32 pps, delta;
5323         unsigned int tag;
5324
5325         phwi_ctrlr = phba->phwi_ctrlr;
5326         phwi_context = phwi_ctrlr->phwi_ctxt;
5327
5328         for (i = 0; i <= phba->num_cpus; i++) {
5329                 aic = &phba->aic_obj[i];
5330                 pbe_eq = &phwi_context->be_eq[i];
5331                 now = jiffies;
5332                 if (!aic->jiffs || time_before(now, aic->jiffs) ||
5333                     pbe_eq->cq_count < aic->eq_prev) {
5334                         aic->jiffs = now;
5335                         aic->eq_prev = pbe_eq->cq_count;
5336                         continue;
5337                 }
5338                 delta = jiffies_to_msecs(now - aic->jiffs);
5339                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5340                 eqd = (pps / 1500) << 2;
5341
5342                 if (eqd < 8)
5343                         eqd = 0;
5344                 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5345                 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5346
5347                 aic->jiffs = now;
5348                 aic->eq_prev = pbe_eq->cq_count;
5349
5350                 if (eqd != aic->prev_eqd) {
5351                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5352                         set_eqd[num].eq_id = pbe_eq->q.id;
5353                         aic->prev_eqd = eqd;
5354                         num++;
5355                 }
5356         }
5357         if (num) {
5358                 tag = be_cmd_modify_eq_delay(phba, set_eqd, num);
5359                 if (tag)
5360                         beiscsi_mccq_compl(phba, tag, NULL, NULL);
5361         }
5362 }
5363
5364 static void be_check_boot_session(struct beiscsi_hba *phba)
5365 {
5366         if (beiscsi_setup_boot_info(phba))
5367                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5368                             "BM_%d : Could not set up "
5369                             "iSCSI boot info on async event.\n");
5370 }
5371
5372 /*
5373  * beiscsi_hw_health_check()- Check adapter health
5374  * @work: work item to check HW health
5375  *
5376  * Check if adapter in an unrecoverable state or not.
5377  **/
5378 static void
5379 beiscsi_hw_health_check(struct work_struct *work)
5380 {
5381         struct beiscsi_hba *phba =
5382                 container_of(work, struct beiscsi_hba,
5383                              beiscsi_hw_check_task.work);
5384
5385         be_eqd_update(phba);
5386
5387         if (phba->state & BE_ADAPTER_CHECK_BOOT) {
5388                 if ((phba->get_boot > 0) && (!phba->boot_kset)) {
5389                         phba->get_boot--;
5390                         if (!(phba->get_boot % BE_GET_BOOT_TO))
5391                                 be_check_boot_session(phba);
5392                 } else {
5393                         phba->state &= ~BE_ADAPTER_CHECK_BOOT;
5394                         phba->get_boot = 0;
5395                 }
5396         }
5397
5398         beiscsi_ue_detect(phba);
5399
5400         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5401                               msecs_to_jiffies(1000));
5402 }
5403
5404
5405 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5406                 pci_channel_state_t state)
5407 {
5408         struct beiscsi_hba *phba = NULL;
5409
5410         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5411         phba->state |= BE_ADAPTER_PCI_ERR;
5412
5413         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5414                     "BM_%d : EEH error detected\n");
5415
5416         beiscsi_quiesce(phba, BEISCSI_EEH_UNLOAD);
5417
5418         if (state == pci_channel_io_perm_failure) {
5419                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5420                             "BM_%d : EEH : State PERM Failure");
5421                 return PCI_ERS_RESULT_DISCONNECT;
5422         }
5423
5424         pci_disable_device(pdev);
5425
5426         /* The error could cause the FW to trigger a flash debug dump.
5427          * Resetting the card while flash dump is in progress
5428          * can cause it not to recover; wait for it to finish.
5429          * Wait only for first function as it is needed only once per
5430          * adapter.
5431          **/
5432         if (pdev->devfn == 0)
5433                 ssleep(30);
5434
5435         return PCI_ERS_RESULT_NEED_RESET;
5436 }
5437
5438 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5439 {
5440         struct beiscsi_hba *phba = NULL;
5441         int status = 0;
5442
5443         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5444
5445         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5446                     "BM_%d : EEH Reset\n");
5447
5448         status = pci_enable_device(pdev);
5449         if (status)
5450                 return PCI_ERS_RESULT_DISCONNECT;
5451
5452         pci_set_master(pdev);
5453         pci_set_power_state(pdev, PCI_D0);
5454         pci_restore_state(pdev);
5455
5456         /* Wait for the CHIP Reset to complete */
5457         status = be_chk_reset_complete(phba);
5458         if (!status) {
5459                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5460                             "BM_%d : EEH Reset Completed\n");
5461         } else {
5462                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5463                             "BM_%d : EEH Reset Completion Failure\n");
5464                 return PCI_ERS_RESULT_DISCONNECT;
5465         }
5466
5467         pci_cleanup_aer_uncorrect_error_status(pdev);
5468         return PCI_ERS_RESULT_RECOVERED;
5469 }
5470
5471 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5472 {
5473         int ret = 0, i;
5474         struct be_eq_obj *pbe_eq;
5475         struct beiscsi_hba *phba = NULL;
5476         struct hwi_controller *phwi_ctrlr;
5477         struct hwi_context_memory *phwi_context;
5478
5479         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5480         pci_save_state(pdev);
5481
5482         if (enable_msix)
5483                 find_num_cpus(phba);
5484         else
5485                 phba->num_cpus = 1;
5486
5487         if (enable_msix) {
5488                 beiscsi_msix_enable(phba);
5489                 if (!phba->msix_enabled)
5490                         phba->num_cpus = 1;
5491         }
5492
5493         ret = beiscsi_cmd_reset_function(phba);
5494         if (ret) {
5495                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5496                             "BM_%d : Reset Failed\n");
5497                 goto ret_err;
5498         }
5499
5500         ret = be_chk_reset_complete(phba);
5501         if (ret) {
5502                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5503                             "BM_%d : Failed to get out of reset.\n");
5504                 goto ret_err;
5505         }
5506
5507         beiscsi_get_params(phba);
5508         phba->shost->max_id = phba->params.cxns_per_ctrl;
5509         phba->shost->can_queue = phba->params.ios_per_ctrl;
5510         ret = hwi_init_controller(phba);
5511
5512         for (i = 0; i < MAX_MCC_CMD; i++) {
5513                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5514                 phba->ctrl.mcc_tag[i] = i + 1;
5515                 phba->ctrl.mcc_numtag[i + 1] = 0;
5516                 phba->ctrl.mcc_tag_available++;
5517         }
5518
5519         phwi_ctrlr = phba->phwi_ctrlr;
5520         phwi_context = phwi_ctrlr->phwi_ctxt;
5521
5522         for (i = 0; i < phba->num_cpus; i++) {
5523                 pbe_eq = &phwi_context->be_eq[i];
5524                 blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5525                                 be_iopoll);
5526                 blk_iopoll_enable(&pbe_eq->iopoll);
5527         }
5528
5529         i = (phba->msix_enabled) ? i : 0;
5530         /* Work item for MCC handling */
5531         pbe_eq = &phwi_context->be_eq[i];
5532         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5533
5534         ret = beiscsi_init_irqs(phba);
5535         if (ret < 0) {
5536                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5537                             "BM_%d : beiscsi_eeh_resume - "
5538                             "Failed to beiscsi_init_irqs\n");
5539                 goto ret_err;
5540         }
5541
5542         hwi_enable_intr(phba);
5543         phba->state &= ~BE_ADAPTER_PCI_ERR;
5544
5545         return;
5546 ret_err:
5547         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5548                     "BM_%d : AER EEH Resume Failed\n");
5549 }
5550
5551 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5552                              const struct pci_device_id *id)
5553 {
5554         struct beiscsi_hba *phba = NULL;
5555         struct hwi_controller *phwi_ctrlr;
5556         struct hwi_context_memory *phwi_context;
5557         struct be_eq_obj *pbe_eq;
5558         int ret = 0, i;
5559
5560         ret = beiscsi_enable_pci(pcidev);
5561         if (ret < 0) {
5562                 dev_err(&pcidev->dev,
5563                         "beiscsi_dev_probe - Failed to enable pci device\n");
5564                 return ret;
5565         }
5566
5567         phba = beiscsi_hba_alloc(pcidev);
5568         if (!phba) {
5569                 dev_err(&pcidev->dev,
5570                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5571                 goto disable_pci;
5572         }
5573
5574         /* Enable EEH reporting */
5575         ret = pci_enable_pcie_error_reporting(pcidev);
5576         if (ret)
5577                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5578                             "BM_%d : PCIe Error Reporting "
5579                             "Enabling Failed\n");
5580
5581         pci_save_state(pcidev);
5582
5583         /* Initialize Driver configuration Paramters */
5584         beiscsi_hba_attrs_init(phba);
5585
5586         phba->fw_timeout = false;
5587         phba->mac_addr_set = false;
5588
5589
5590         switch (pcidev->device) {
5591         case BE_DEVICE_ID1:
5592         case OC_DEVICE_ID1:
5593         case OC_DEVICE_ID2:
5594                 phba->generation = BE_GEN2;
5595                 phba->iotask_fn = beiscsi_iotask;
5596                 break;
5597         case BE_DEVICE_ID2:
5598         case OC_DEVICE_ID3:
5599                 phba->generation = BE_GEN3;
5600                 phba->iotask_fn = beiscsi_iotask;
5601                 break;
5602         case OC_SKH_ID1:
5603                 phba->generation = BE_GEN4;
5604                 phba->iotask_fn = beiscsi_iotask_v2;
5605                 break;
5606         default:
5607                 phba->generation = 0;
5608         }
5609
5610         ret = be_ctrl_init(phba, pcidev);
5611         if (ret) {
5612                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5613                             "BM_%d : beiscsi_dev_probe-"
5614                             "Failed in be_ctrl_init\n");
5615                 goto hba_free;
5616         }
5617
5618         ret = beiscsi_cmd_reset_function(phba);
5619         if (ret) {
5620                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5621                             "BM_%d : Reset Failed\n");
5622                 goto hba_free;
5623         }
5624         ret = be_chk_reset_complete(phba);
5625         if (ret) {
5626                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5627                             "BM_%d : Failed to get out of reset.\n");
5628                 goto hba_free;
5629         }
5630
5631         spin_lock_init(&phba->io_sgl_lock);
5632         spin_lock_init(&phba->mgmt_sgl_lock);
5633         spin_lock_init(&phba->isr_lock);
5634         spin_lock_init(&phba->async_pdu_lock);
5635         ret = mgmt_get_fw_config(&phba->ctrl, phba);
5636         if (ret != 0) {
5637                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5638                             "BM_%d : Error getting fw config\n");
5639                 goto free_port;
5640         }
5641
5642         if (enable_msix)
5643                 find_num_cpus(phba);
5644         else
5645                 phba->num_cpus = 1;
5646
5647         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5648                     "BM_%d : num_cpus = %d\n",
5649                     phba->num_cpus);
5650
5651         if (enable_msix) {
5652                 beiscsi_msix_enable(phba);
5653                 if (!phba->msix_enabled)
5654                         phba->num_cpus = 1;
5655         }
5656
5657         phba->shost->max_id = phba->params.cxns_per_ctrl;
5658         beiscsi_get_params(phba);
5659         phba->shost->can_queue = phba->params.ios_per_ctrl;
5660         ret = beiscsi_init_port(phba);
5661         if (ret < 0) {
5662                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5663                             "BM_%d : beiscsi_dev_probe-"
5664                             "Failed in beiscsi_init_port\n");
5665                 goto free_port;
5666         }
5667
5668         for (i = 0; i < MAX_MCC_CMD; i++) {
5669                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5670                 phba->ctrl.mcc_tag[i] = i + 1;
5671                 phba->ctrl.mcc_numtag[i + 1] = 0;
5672                 phba->ctrl.mcc_tag_available++;
5673                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5674                        sizeof(struct be_dma_mem));
5675         }
5676
5677         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5678
5679         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5680                  phba->shost->host_no);
5681         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5682         if (!phba->wq) {
5683                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5684                             "BM_%d : beiscsi_dev_probe-"
5685                             "Failed to allocate work queue\n");
5686                 goto free_twq;
5687         }
5688
5689         INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5690                           beiscsi_hw_health_check);
5691
5692         phwi_ctrlr = phba->phwi_ctrlr;
5693         phwi_context = phwi_ctrlr->phwi_ctxt;
5694
5695         for (i = 0; i < phba->num_cpus; i++) {
5696                 pbe_eq = &phwi_context->be_eq[i];
5697                 blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5698                                 be_iopoll);
5699                 blk_iopoll_enable(&pbe_eq->iopoll);
5700         }
5701
5702         i = (phba->msix_enabled) ? i : 0;
5703         /* Work item for MCC handling */
5704         pbe_eq = &phwi_context->be_eq[i];
5705         INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5706
5707         ret = beiscsi_init_irqs(phba);
5708         if (ret < 0) {
5709                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5710                             "BM_%d : beiscsi_dev_probe-"
5711                             "Failed to beiscsi_init_irqs\n");
5712                 goto free_blkenbld;
5713         }
5714         hwi_enable_intr(phba);
5715
5716         if (iscsi_host_add(phba->shost, &phba->pcidev->dev))
5717                 goto free_blkenbld;
5718
5719         if (beiscsi_setup_boot_info(phba))
5720                 /*
5721                  * log error but continue, because we may not be using
5722                  * iscsi boot.
5723                  */
5724                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5725                             "BM_%d : Could not set up "
5726                             "iSCSI boot info.\n");
5727
5728         beiscsi_create_def_ifaces(phba);
5729         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5730                               msecs_to_jiffies(1000));
5731
5732         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5733                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5734         return 0;
5735
5736 free_blkenbld:
5737         destroy_workqueue(phba->wq);
5738         for (i = 0; i < phba->num_cpus; i++) {
5739                 pbe_eq = &phwi_context->be_eq[i];
5740                 blk_iopoll_disable(&pbe_eq->iopoll);
5741         }
5742 free_twq:
5743         beiscsi_clean_port(phba);
5744         beiscsi_free_mem(phba);
5745 free_port:
5746         pci_free_consistent(phba->pcidev,
5747                             phba->ctrl.mbox_mem_alloced.size,
5748                             phba->ctrl.mbox_mem_alloced.va,
5749                            phba->ctrl.mbox_mem_alloced.dma);
5750         beiscsi_unmap_pci_function(phba);
5751 hba_free:
5752         if (phba->msix_enabled)
5753                 pci_disable_msix(phba->pcidev);
5754         pci_dev_put(phba->pcidev);
5755         iscsi_host_free(phba->shost);
5756         pci_set_drvdata(pcidev, NULL);
5757 disable_pci:
5758         pci_disable_device(pcidev);
5759         return ret;
5760 }
5761
5762 static struct pci_error_handlers beiscsi_eeh_handlers = {
5763         .error_detected = beiscsi_eeh_err_detected,
5764         .slot_reset = beiscsi_eeh_reset,
5765         .resume = beiscsi_eeh_resume,
5766 };
5767
5768 struct iscsi_transport beiscsi_iscsi_transport = {
5769         .owner = THIS_MODULE,
5770         .name = DRV_NAME,
5771         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5772                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5773         .create_session = beiscsi_session_create,
5774         .destroy_session = beiscsi_session_destroy,
5775         .create_conn = beiscsi_conn_create,
5776         .bind_conn = beiscsi_conn_bind,
5777         .destroy_conn = iscsi_conn_teardown,
5778         .attr_is_visible = be2iscsi_attr_is_visible,
5779         .set_iface_param = be2iscsi_iface_set_param,
5780         .get_iface_param = be2iscsi_iface_get_param,
5781         .set_param = beiscsi_set_param,
5782         .get_conn_param = iscsi_conn_get_param,
5783         .get_session_param = iscsi_session_get_param,
5784         .get_host_param = beiscsi_get_host_param,
5785         .start_conn = beiscsi_conn_start,
5786         .stop_conn = iscsi_conn_stop,
5787         .send_pdu = iscsi_conn_send_pdu,
5788         .xmit_task = beiscsi_task_xmit,
5789         .cleanup_task = beiscsi_cleanup_task,
5790         .alloc_pdu = beiscsi_alloc_pdu,
5791         .parse_pdu_itt = beiscsi_parse_pdu,
5792         .get_stats = beiscsi_conn_get_stats,
5793         .get_ep_param = beiscsi_ep_get_param,
5794         .ep_connect = beiscsi_ep_connect,
5795         .ep_poll = beiscsi_ep_poll,
5796         .ep_disconnect = beiscsi_ep_disconnect,
5797         .session_recovery_timedout = iscsi_session_recovery_timedout,
5798         .bsg_request = beiscsi_bsg_request,
5799 };
5800
5801 static struct pci_driver beiscsi_pci_driver = {
5802         .name = DRV_NAME,
5803         .probe = beiscsi_dev_probe,
5804         .remove = beiscsi_remove,
5805         .shutdown = beiscsi_shutdown,
5806         .id_table = beiscsi_pci_id_table,
5807         .err_handler = &beiscsi_eeh_handlers
5808 };
5809
5810
5811 static int __init beiscsi_module_init(void)
5812 {
5813         int ret;
5814
5815         beiscsi_scsi_transport =
5816                         iscsi_register_transport(&beiscsi_iscsi_transport);
5817         if (!beiscsi_scsi_transport) {
5818                 printk(KERN_ERR
5819                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5820                 return -ENOMEM;
5821         }
5822         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5823                &beiscsi_iscsi_transport);
5824
5825         ret = pci_register_driver(&beiscsi_pci_driver);
5826         if (ret) {
5827                 printk(KERN_ERR
5828                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5829                 goto unregister_iscsi_transport;
5830         }
5831         return 0;
5832
5833 unregister_iscsi_transport:
5834         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5835         return ret;
5836 }
5837
5838 static void __exit beiscsi_module_exit(void)
5839 {
5840         pci_unregister_driver(&beiscsi_pci_driver);
5841         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5842 }
5843
5844 module_init(beiscsi_module_init);
5845 module_exit(beiscsi_module_exit);