2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@fluxnic.net>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/clk.h>
27 #include <linux/rtc.h>
28 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
35 #include <linux/bitops.h>
37 #include <mach/hardware.h>
38 #include <mach/irqs.h>
40 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
41 #include <mach/regs-rtc.h>
44 #define RTC_DEF_DIVIDER (32768 - 1)
45 #define RTC_DEF_TRIM 0
52 struct rtc_device *rtc;
56 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
58 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
59 struct rtc_device *rtc = info->rtc;
61 unsigned long events = 0;
63 spin_lock(&info->lock);
66 /* clear interrupt sources */
68 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
69 * See also the comments in sa1100_rtc_probe(). */
70 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
71 /* This is the original code, before there was the if test
72 * above. This code does not clear interrupts that were not
74 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
76 /* For some reason, it is possible to enter this routine
77 * without interruptions enabled, it has been tested with
78 * several units (Bug in SA11xx chip?).
80 * This situation leads to an infinite "loop" of interrupt
81 * routine calling and as a result the processor seems to
82 * lock on its first call to open(). */
83 RTSR = RTSR_AL | RTSR_HZ;
86 /* clear alarm interrupt if it has occurred */
89 RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
91 /* update irq data & counter */
93 events |= RTC_AF | RTC_IRQF;
95 events |= RTC_UF | RTC_IRQF;
97 rtc_update_irq(rtc, 1, events);
99 spin_unlock(&info->lock);
104 static int sa1100_rtc_open(struct device *dev)
106 struct sa1100_rtc *info = dev_get_drvdata(dev);
107 struct rtc_device *rtc = info->rtc;
110 ret = clk_prepare_enable(info->clk);
113 ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
115 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
118 ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev);
120 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
123 rtc->max_user_freq = RTC_FREQ;
124 rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
129 free_irq(info->irq_1hz, dev);
131 clk_disable_unprepare(info->clk);
136 static void sa1100_rtc_release(struct device *dev)
138 struct sa1100_rtc *info = dev_get_drvdata(dev);
140 spin_lock_irq(&info->lock);
142 spin_unlock_irq(&info->lock);
144 free_irq(info->irq_alarm, dev);
145 free_irq(info->irq_1hz, dev);
146 clk_disable_unprepare(info->clk);
149 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
151 struct sa1100_rtc *info = dev_get_drvdata(dev);
153 spin_lock_irq(&info->lock);
158 spin_unlock_irq(&info->lock);
162 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
164 rtc_time_to_tm(RCNR, tm);
168 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
173 ret = rtc_tm_to_time(tm, &time);
179 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
184 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
185 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
189 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
191 struct sa1100_rtc *info = dev_get_drvdata(dev);
195 spin_lock_irq(&info->lock);
196 ret = rtc_tm_to_time(&alrm->time, &time);
199 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
206 spin_unlock_irq(&info->lock);
211 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
213 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
214 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
219 static const struct rtc_class_ops sa1100_rtc_ops = {
220 .open = sa1100_rtc_open,
221 .release = sa1100_rtc_release,
222 .read_time = sa1100_rtc_read_time,
223 .set_time = sa1100_rtc_set_time,
224 .read_alarm = sa1100_rtc_read_alarm,
225 .set_alarm = sa1100_rtc_set_alarm,
226 .proc = sa1100_rtc_proc,
227 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
230 static int sa1100_rtc_probe(struct platform_device *pdev)
232 struct rtc_device *rtc;
233 struct sa1100_rtc *info;
234 int irq_1hz, irq_alarm, ret = 0;
236 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
237 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
238 if (irq_1hz < 0 || irq_alarm < 0)
241 info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
244 info->clk = clk_get(&pdev->dev, NULL);
245 if (IS_ERR(info->clk)) {
246 dev_err(&pdev->dev, "failed to find rtc clock source\n");
247 ret = PTR_ERR(info->clk);
250 info->irq_1hz = irq_1hz;
251 info->irq_alarm = irq_alarm;
252 spin_lock_init(&info->lock);
253 platform_set_drvdata(pdev, info);
256 * According to the manual we should be able to let RTTR be zero
257 * and then a default diviser for a 32.768KHz clock is used.
258 * Apparently this doesn't work, at least for my SA1110 rev 5.
259 * If the clock divider is uninitialized then reset it to the
260 * default value to get the 1Hz clock.
263 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
264 dev_warn(&pdev->dev, "warning: "
265 "initializing default clock divider/trim value\n");
266 /* The current RTC value probably doesn't make sense either */
270 device_init_wakeup(&pdev->dev, 1);
272 rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
281 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
282 * See also the comments in sa1100_rtc_interrupt().
284 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
285 * interrupt pending, even though interrupts were never enabled.
286 * In this case, this bit it must be reset before enabling
287 * interruptions to avoid a nonexistent interrupt to occur.
289 * In principle, the same problem would apply to bit 0, although it has
290 * never been observed to happen.
292 * This issue is addressed both here and in sa1100_rtc_interrupt().
293 * If the issue is not addressed here, in the times when the processor
294 * wakes up with the bit set there will be one spurious interrupt.
296 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
297 * safe side, once the condition that lead to this strange
298 * initialization is unknown and could in principle happen during
301 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
302 * the corresponding bits in RTSR. */
303 RTSR = RTSR_AL | RTSR_HZ;
307 platform_set_drvdata(pdev, NULL);
314 static int sa1100_rtc_remove(struct platform_device *pdev)
316 struct sa1100_rtc *info = platform_get_drvdata(pdev);
319 rtc_device_unregister(info->rtc);
321 platform_set_drvdata(pdev, NULL);
329 static int sa1100_rtc_suspend(struct device *dev)
331 struct sa1100_rtc *info = dev_get_drvdata(dev);
332 if (device_may_wakeup(dev))
333 enable_irq_wake(info->irq_alarm);
337 static int sa1100_rtc_resume(struct device *dev)
339 struct sa1100_rtc *info = dev_get_drvdata(dev);
340 if (device_may_wakeup(dev))
341 disable_irq_wake(info->irq_alarm);
345 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
346 .suspend = sa1100_rtc_suspend,
347 .resume = sa1100_rtc_resume,
351 static struct of_device_id sa1100_rtc_dt_ids[] = {
352 { .compatible = "mrvl,sa1100-rtc", },
353 { .compatible = "mrvl,mmp-rtc", },
356 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
358 static struct platform_driver sa1100_rtc_driver = {
359 .probe = sa1100_rtc_probe,
360 .remove = sa1100_rtc_remove,
362 .name = "sa1100-rtc",
364 .pm = &sa1100_rtc_pm_ops,
366 .of_match_table = sa1100_rtc_dt_ids,
370 module_platform_driver(sa1100_rtc_driver);
372 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
373 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
374 MODULE_LICENSE("GPL");
375 MODULE_ALIAS("platform:sa1100-rtc");