2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/string.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
24 * We can't determine type by probing, but if we expect pre-Linux code
25 * to have set the chip up as a clock (turning on the oscillator and
26 * setting the date and time), Linux can ignore the non-clock features.
27 * That's a natural job for a factory or repair bench.
40 last_ds_type /* always last */
41 /* rs5c372 too? different address... */
45 /* RTC registers don't differ much, except for the century flag */
46 #define DS1307_REG_SECS 0x00 /* 00-59 */
47 # define DS1307_BIT_CH 0x80
48 # define DS1340_BIT_nEOSC 0x80
49 # define MCP7941X_BIT_ST 0x80
50 #define DS1307_REG_MIN 0x01 /* 00-59 */
51 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
52 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
53 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
54 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
55 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
56 #define DS1307_REG_WDAY 0x03 /* 01-07 */
57 # define MCP7941X_BIT_VBATEN 0x08
58 #define DS1307_REG_MDAY 0x04 /* 01-31 */
59 #define DS1307_REG_MONTH 0x05 /* 01-12 */
60 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
61 #define DS1307_REG_YEAR 0x06 /* 00-99 */
64 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
65 * start at 7, and they differ a LOT. Only control and status matter for
66 * basic RTC date and time functionality; be careful using them.
68 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
69 # define DS1307_BIT_OUT 0x80
70 # define DS1338_BIT_OSF 0x20
71 # define DS1307_BIT_SQWE 0x10
72 # define DS1307_BIT_RS1 0x02
73 # define DS1307_BIT_RS0 0x01
74 #define DS1337_REG_CONTROL 0x0e
75 # define DS1337_BIT_nEOSC 0x80
76 # define DS1339_BIT_BBSQI 0x20
77 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
78 # define DS1337_BIT_RS2 0x10
79 # define DS1337_BIT_RS1 0x08
80 # define DS1337_BIT_INTCN 0x04
81 # define DS1337_BIT_A2IE 0x02
82 # define DS1337_BIT_A1IE 0x01
83 #define DS1340_REG_CONTROL 0x07
84 # define DS1340_BIT_OUT 0x80
85 # define DS1340_BIT_FT 0x40
86 # define DS1340_BIT_CALIB_SIGN 0x20
87 # define DS1340_M_CALIBRATION 0x1f
88 #define DS1340_REG_FLAG 0x09
89 # define DS1340_BIT_OSF 0x80
90 #define DS1337_REG_STATUS 0x0f
91 # define DS1337_BIT_OSF 0x80
92 # define DS1337_BIT_A2I 0x02
93 # define DS1337_BIT_A1I 0x01
94 #define DS1339_REG_ALARM1_SECS 0x07
95 #define DS1339_REG_TRICKLE 0x10
97 #define RX8025_REG_CTRL1 0x0e
98 # define RX8025_BIT_2412 0x20
99 #define RX8025_REG_CTRL2 0x0f
100 # define RX8025_BIT_PON 0x10
101 # define RX8025_BIT_VDET 0x40
102 # define RX8025_BIT_XST 0x20
106 u8 offset; /* register's offset */
109 struct bin_attribute *nvram;
112 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
113 #define HAS_ALARM 1 /* bit 1 == irq claimed */
114 struct i2c_client *client;
115 struct rtc_device *rtc;
116 struct work_struct work;
117 s32 (*read_block_data)(const struct i2c_client *client, u8 command,
118 u8 length, u8 *values);
119 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
120 u8 length, const u8 *values);
129 static const struct chip_desc chips[last_ds_type] = {
148 /* this is battery backed SRAM */
149 .nvram_offset = 0x20,
154 static const struct i2c_device_id ds1307_id[] = {
155 { "ds1307", ds_1307 },
156 { "ds1337", ds_1337 },
157 { "ds1338", ds_1338 },
158 { "ds1339", ds_1339 },
159 { "ds1388", ds_1388 },
160 { "ds1340", ds_1340 },
161 { "ds3231", ds_3231 },
162 { "m41t00", m41t00 },
163 { "mcp7941x", mcp7941x },
164 { "pt7c4338", ds_1307 },
165 { "rx8025", rx_8025 },
168 MODULE_DEVICE_TABLE(i2c, ds1307_id);
170 /*----------------------------------------------------------------------*/
172 #define BLOCK_DATA_MAX_TRIES 10
174 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
175 u8 command, u8 length, u8 *values)
179 for (i = 0; i < length; i++) {
180 data = i2c_smbus_read_byte_data(client, command + i);
188 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
189 u8 length, u8 *values)
191 u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
195 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
196 ret = ds1307_read_block_data_once(client, command, length, values);
200 if (++tries > BLOCK_DATA_MAX_TRIES) {
201 dev_err(&client->dev,
202 "ds1307_read_block_data failed\n");
205 memcpy(oldvalues, values, length);
206 ret = ds1307_read_block_data_once(client, command, length,
210 } while (memcmp(oldvalues, values, length));
214 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
215 u8 length, const u8 *values)
217 u8 currvalues[I2C_SMBUS_BLOCK_MAX];
220 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
224 if (++tries > BLOCK_DATA_MAX_TRIES) {
225 dev_err(&client->dev,
226 "ds1307_write_block_data failed\n");
229 for (i = 0; i < length; i++) {
230 ret = i2c_smbus_write_byte_data(client, command + i,
235 ret = ds1307_read_block_data_once(client, command, length,
239 } while (memcmp(currvalues, values, length));
243 /*----------------------------------------------------------------------*/
246 * The IRQ logic includes a "real" handler running in IRQ context just
247 * long enough to schedule this workqueue entry. We need a task context
248 * to talk to the RTC, since I2C I/O calls require that; and disable the
249 * IRQ until we clear its status on the chip, so that this handler can
250 * work with any type of triggering (not just falling edge).
252 * The ds1337 and ds1339 both have two alarms, but we only use the first
253 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
254 * signal; ds1339 chips have only one alarm signal.
256 static void ds1307_work(struct work_struct *work)
258 struct ds1307 *ds1307;
259 struct i2c_client *client;
263 ds1307 = container_of(work, struct ds1307, work);
264 client = ds1307->client;
265 lock = &ds1307->rtc->ops_lock;
268 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
272 if (stat & DS1337_BIT_A1I) {
273 stat &= ~DS1337_BIT_A1I;
274 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
276 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
280 control &= ~DS1337_BIT_A1IE;
281 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
283 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
287 if (test_bit(HAS_ALARM, &ds1307->flags))
288 enable_irq(client->irq);
292 static irqreturn_t ds1307_irq(int irq, void *dev_id)
294 struct i2c_client *client = dev_id;
295 struct ds1307 *ds1307 = i2c_get_clientdata(client);
297 disable_irq_nosync(irq);
298 schedule_work(&ds1307->work);
302 /*----------------------------------------------------------------------*/
304 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
306 struct ds1307 *ds1307 = dev_get_drvdata(dev);
309 /* read the RTC date and time registers all at once */
310 tmp = ds1307->read_block_data(ds1307->client,
311 ds1307->offset, 7, ds1307->regs);
313 dev_err(dev, "%s error %d\n", "read", tmp);
317 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
319 ds1307->regs[0], ds1307->regs[1],
320 ds1307->regs[2], ds1307->regs[3],
321 ds1307->regs[4], ds1307->regs[5],
324 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
325 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
326 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
327 t->tm_hour = bcd2bin(tmp);
328 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
329 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
330 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
331 t->tm_mon = bcd2bin(tmp) - 1;
333 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
334 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
336 dev_dbg(dev, "%s secs=%d, mins=%d, "
337 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
338 "read", t->tm_sec, t->tm_min,
339 t->tm_hour, t->tm_mday,
340 t->tm_mon, t->tm_year, t->tm_wday);
342 /* initial clock setting can be undefined */
343 return rtc_valid_tm(t);
346 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
348 struct ds1307 *ds1307 = dev_get_drvdata(dev);
351 u8 *buf = ds1307->regs;
353 dev_dbg(dev, "%s secs=%d, mins=%d, "
354 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
355 "write", t->tm_sec, t->tm_min,
356 t->tm_hour, t->tm_mday,
357 t->tm_mon, t->tm_year, t->tm_wday);
359 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
360 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
361 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
362 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
363 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
364 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
366 /* assume 20YY not 19YY */
367 tmp = t->tm_year - 100;
368 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
370 switch (ds1307->type) {
374 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
377 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
378 | DS1340_BIT_CENTURY;
382 * these bits were cleared when preparing the date/time
383 * values and need to be set again before writing the
384 * buffer out to the device.
386 buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST;
387 buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN;
393 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
394 "write", buf[0], buf[1], buf[2], buf[3],
395 buf[4], buf[5], buf[6]);
397 result = ds1307->write_block_data(ds1307->client,
398 ds1307->offset, 7, buf);
400 dev_err(dev, "%s error %d\n", "write", result);
406 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
408 struct i2c_client *client = to_i2c_client(dev);
409 struct ds1307 *ds1307 = i2c_get_clientdata(client);
412 if (!test_bit(HAS_ALARM, &ds1307->flags))
415 /* read all ALARM1, ALARM2, and status registers at once */
416 ret = ds1307->read_block_data(client,
417 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
419 dev_err(dev, "%s error %d\n", "alarm read", ret);
423 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
425 ds1307->regs[0], ds1307->regs[1],
426 ds1307->regs[2], ds1307->regs[3],
427 ds1307->regs[4], ds1307->regs[5],
428 ds1307->regs[6], ds1307->regs[7],
432 * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
433 * and that all four fields are checked matches
435 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
436 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
437 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
438 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
440 t->time.tm_year = -1;
441 t->time.tm_wday = -1;
442 t->time.tm_yday = -1;
443 t->time.tm_isdst = -1;
446 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
447 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
449 dev_dbg(dev, "%s secs=%d, mins=%d, "
450 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
451 "alarm read", t->time.tm_sec, t->time.tm_min,
452 t->time.tm_hour, t->time.tm_mday,
453 t->enabled, t->pending);
458 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
460 struct i2c_client *client = to_i2c_client(dev);
461 struct ds1307 *ds1307 = i2c_get_clientdata(client);
462 unsigned char *buf = ds1307->regs;
466 if (!test_bit(HAS_ALARM, &ds1307->flags))
469 dev_dbg(dev, "%s secs=%d, mins=%d, "
470 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
471 "alarm set", t->time.tm_sec, t->time.tm_min,
472 t->time.tm_hour, t->time.tm_mday,
473 t->enabled, t->pending);
475 /* read current status of both alarms and the chip */
476 ret = ds1307->read_block_data(client,
477 DS1339_REG_ALARM1_SECS, 9, buf);
479 dev_err(dev, "%s error %d\n", "alarm write", ret);
482 control = ds1307->regs[7];
483 status = ds1307->regs[8];
485 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
486 "alarm set (old status)",
487 ds1307->regs[0], ds1307->regs[1],
488 ds1307->regs[2], ds1307->regs[3],
489 ds1307->regs[4], ds1307->regs[5],
490 ds1307->regs[6], control, status);
492 /* set ALARM1, using 24 hour and day-of-month modes */
493 buf[0] = bin2bcd(t->time.tm_sec);
494 buf[1] = bin2bcd(t->time.tm_min);
495 buf[2] = bin2bcd(t->time.tm_hour);
496 buf[3] = bin2bcd(t->time.tm_mday);
498 /* set ALARM2 to non-garbage */
503 /* optionally enable ALARM1 */
504 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
506 dev_dbg(dev, "alarm IRQ armed\n");
507 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
509 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
511 ret = ds1307->write_block_data(client,
512 DS1339_REG_ALARM1_SECS, 9, buf);
514 dev_err(dev, "can't set alarm time\n");
521 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
523 struct i2c_client *client = to_i2c_client(dev);
524 struct ds1307 *ds1307 = i2c_get_clientdata(client);
527 if (!test_bit(HAS_ALARM, &ds1307->flags))
530 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
535 ret |= DS1337_BIT_A1IE;
537 ret &= ~DS1337_BIT_A1IE;
539 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
546 static const struct rtc_class_ops ds13xx_rtc_ops = {
547 .read_time = ds1307_get_time,
548 .set_time = ds1307_set_time,
549 .read_alarm = ds1337_read_alarm,
550 .set_alarm = ds1337_set_alarm,
551 .alarm_irq_enable = ds1307_alarm_irq_enable,
554 /*----------------------------------------------------------------------*/
557 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
558 struct bin_attribute *attr,
559 char *buf, loff_t off, size_t count)
561 struct i2c_client *client;
562 struct ds1307 *ds1307;
565 client = kobj_to_i2c_client(kobj);
566 ds1307 = i2c_get_clientdata(client);
568 if (unlikely(off >= ds1307->nvram->size))
570 if ((off + count) > ds1307->nvram->size)
571 count = ds1307->nvram->size - off;
572 if (unlikely(!count))
575 result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
578 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
583 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
584 struct bin_attribute *attr,
585 char *buf, loff_t off, size_t count)
587 struct i2c_client *client;
588 struct ds1307 *ds1307;
591 client = kobj_to_i2c_client(kobj);
592 ds1307 = i2c_get_clientdata(client);
594 if (unlikely(off >= ds1307->nvram->size))
596 if ((off + count) > ds1307->nvram->size)
597 count = ds1307->nvram->size - off;
598 if (unlikely(!count))
601 result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
604 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
610 /*----------------------------------------------------------------------*/
612 static int __devinit ds1307_probe(struct i2c_client *client,
613 const struct i2c_device_id *id)
615 struct ds1307 *ds1307;
618 const struct chip_desc *chip = &chips[id->driver_data];
619 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
620 int want_irq = false;
622 static const int bbsqi_bitpos[] = {
624 [ds_1339] = DS1339_BIT_BBSQI,
625 [ds_3231] = DS3231_BIT_BBSQW,
628 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
629 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
632 ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL);
636 i2c_set_clientdata(client, ds1307);
638 ds1307->client = client;
639 ds1307->type = id->driver_data;
643 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
644 ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
645 ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
647 ds1307->read_block_data = ds1307_read_block_data;
648 ds1307->write_block_data = ds1307_write_block_data;
651 switch (ds1307->type) {
655 /* get registers that the "rtc" read below won't read... */
656 tmp = ds1307->read_block_data(ds1307->client,
657 DS1337_REG_CONTROL, 2, buf);
659 pr_debug("read error %d\n", tmp);
664 /* oscillator off? turn it on, so clock can tick. */
665 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
666 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
669 * Using IRQ? Disable the square wave and both alarms.
670 * For some variants, be sure alarms can trigger when we're
671 * running on Vbackup (BBSQI/BBSQW)
673 if (ds1307->client->irq > 0 && chip->alarm) {
674 INIT_WORK(&ds1307->work, ds1307_work);
676 ds1307->regs[0] |= DS1337_BIT_INTCN
677 | bbsqi_bitpos[ds1307->type];
678 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
683 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
686 /* oscillator fault? clear flag, and warn */
687 if (ds1307->regs[1] & DS1337_BIT_OSF) {
688 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
689 ds1307->regs[1] & ~DS1337_BIT_OSF);
690 dev_warn(&client->dev, "SET TIME!\n");
695 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
696 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
698 pr_debug("read error %d\n", tmp);
703 /* oscillator off? turn it on, so clock can tick. */
704 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
705 ds1307->regs[1] |= RX8025_BIT_XST;
706 i2c_smbus_write_byte_data(client,
707 RX8025_REG_CTRL2 << 4 | 0x08,
709 dev_warn(&client->dev,
710 "oscillator stop detected - SET TIME!\n");
713 if (ds1307->regs[1] & RX8025_BIT_PON) {
714 ds1307->regs[1] &= ~RX8025_BIT_PON;
715 i2c_smbus_write_byte_data(client,
716 RX8025_REG_CTRL2 << 4 | 0x08,
718 dev_warn(&client->dev, "power-on detected\n");
721 if (ds1307->regs[1] & RX8025_BIT_VDET) {
722 ds1307->regs[1] &= ~RX8025_BIT_VDET;
723 i2c_smbus_write_byte_data(client,
724 RX8025_REG_CTRL2 << 4 | 0x08,
726 dev_warn(&client->dev, "voltage drop detected\n");
729 /* make sure we are running in 24hour mode */
730 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
733 /* switch to 24 hour mode */
734 i2c_smbus_write_byte_data(client,
735 RX8025_REG_CTRL1 << 4 | 0x08,
739 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
740 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
742 pr_debug("read error %d\n", tmp);
748 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
751 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
754 i2c_smbus_write_byte_data(client,
755 DS1307_REG_HOUR << 4 | 0x08,
760 ds1307->offset = 1; /* Seconds starts at 1 */
767 /* read RTC registers */
768 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
770 pr_debug("read error %d\n", tmp);
776 * minimal sanity checking; some chips (like DS1340) don't
777 * specify the extra bits as must-be-zero, but there are
778 * still a few values that are clearly out-of-range.
780 tmp = ds1307->regs[DS1307_REG_SECS];
781 switch (ds1307->type) {
784 /* clock halted? turn it on, so clock can tick. */
785 if (tmp & DS1307_BIT_CH) {
786 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
787 dev_warn(&client->dev, "SET TIME!\n");
792 /* clock halted? turn it on, so clock can tick. */
793 if (tmp & DS1307_BIT_CH)
794 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
796 /* oscillator fault? clear flag, and warn */
797 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
798 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
799 ds1307->regs[DS1307_REG_CONTROL]
801 dev_warn(&client->dev, "SET TIME!\n");
806 /* clock halted? turn it on, so clock can tick. */
807 if (tmp & DS1340_BIT_nEOSC)
808 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
810 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
812 pr_debug("read error %d\n", tmp);
817 /* oscillator fault? clear flag, and warn */
818 if (tmp & DS1340_BIT_OSF) {
819 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
820 dev_warn(&client->dev, "SET TIME!\n");
824 /* make sure that the backup battery is enabled */
825 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) {
826 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
827 ds1307->regs[DS1307_REG_WDAY]
828 | MCP7941X_BIT_VBATEN);
831 /* clock halted? turn it on, so clock can tick. */
832 if (!(tmp & MCP7941X_BIT_ST)) {
833 i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
835 dev_warn(&client->dev, "SET TIME!\n");
844 tmp = ds1307->regs[DS1307_REG_HOUR];
845 switch (ds1307->type) {
849 * NOTE: ignores century bits; fix before deploying
850 * systems that will run through year 2100.
856 if (!(tmp & DS1307_BIT_12HR))
860 * Be sure we're in 24 hour mode. Multi-master systems
863 tmp = bcd2bin(tmp & 0x1f);
866 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
868 i2c_smbus_write_byte_data(client,
869 ds1307->offset + DS1307_REG_HOUR,
873 ds1307->rtc = rtc_device_register(client->name, &client->dev,
874 &ds13xx_rtc_ops, THIS_MODULE);
875 if (IS_ERR(ds1307->rtc)) {
876 err = PTR_ERR(ds1307->rtc);
877 dev_err(&client->dev,
878 "unable to register the class device\n");
883 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
884 ds1307->rtc->name, client);
886 dev_err(&client->dev,
887 "unable to request IRQ!\n");
891 device_set_wakeup_capable(&client->dev, 1);
892 set_bit(HAS_ALARM, &ds1307->flags);
893 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
896 if (chip->nvram_size) {
897 ds1307->nvram = kzalloc(sizeof(struct bin_attribute),
899 if (!ds1307->nvram) {
903 ds1307->nvram->attr.name = "nvram";
904 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
905 ds1307->nvram->read = ds1307_nvram_read,
906 ds1307->nvram->write = ds1307_nvram_write,
907 ds1307->nvram->size = chip->nvram_size;
908 ds1307->nvram_offset = chip->nvram_offset;
909 err = sysfs_create_bin_file(&client->dev.kobj, ds1307->nvram);
911 kfree(ds1307->nvram);
914 set_bit(HAS_NVRAM, &ds1307->flags);
915 dev_info(&client->dev, "%zu bytes nvram\n", ds1307->nvram->size);
922 rtc_device_unregister(ds1307->rtc);
928 static int __devexit ds1307_remove(struct i2c_client *client)
930 struct ds1307 *ds1307 = i2c_get_clientdata(client);
932 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
933 free_irq(client->irq, client);
934 cancel_work_sync(&ds1307->work);
937 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) {
938 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
939 kfree(ds1307->nvram);
942 rtc_device_unregister(ds1307->rtc);
947 static struct i2c_driver ds1307_driver = {
949 .name = "rtc-ds1307",
950 .owner = THIS_MODULE,
952 .probe = ds1307_probe,
953 .remove = __devexit_p(ds1307_remove),
954 .id_table = ds1307_id,
957 module_i2c_driver(ds1307_driver);
959 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
960 MODULE_LICENSE("GPL");