2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/log2.h>
40 #include <linux/of_platform.h>
41 #include <linux/dmi.h>
43 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44 #include <asm-generic/rtc.h>
47 struct rtc_device *rtc;
50 struct resource *iomem;
52 void (*wake_on)(struct device *);
53 void (*wake_off)(struct device *);
58 /* newer hardware extends the original register set */
64 /* both platform and pnp busses use negative numbers for invalid irqs */
65 #define is_valid_irq(n) ((n) > 0)
67 static const char driver_name[] = "rtc_cmos";
69 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
70 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
73 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
75 static inline int is_intr(u8 rtc_intr)
77 if (!(rtc_intr & RTC_IRQF))
79 return rtc_intr & RTC_IRQMASK;
82 /*----------------------------------------------------------------*/
84 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
86 * used in a broken "legacy replacement" mode. The breakage includes
87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
90 * When that broken mode is in use, platform glue provides a partial
91 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
92 * want to use HPET for anything except those IRQs though...
94 #ifdef CONFIG_HPET_EMULATE_RTC
98 static inline int is_hpet_enabled(void)
103 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
108 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
114 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
119 static inline int hpet_set_periodic_freq(unsigned long freq)
124 static inline int hpet_rtc_dropped_irq(void)
129 static inline int hpet_rtc_timer_init(void)
134 extern irq_handler_t hpet_rtc_interrupt;
136 static inline int hpet_register_irq_handler(irq_handler_t handler)
141 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
148 /*----------------------------------------------------------------*/
152 /* Most newer x86 systems have two register banks, the first used
153 * for RTC and NVRAM and the second only for NVRAM. Caller must
154 * own rtc_lock ... and we won't worry about access during NMI.
156 #define can_bank2 true
158 static inline unsigned char cmos_read_bank2(unsigned char addr)
160 outb(addr, RTC_PORT(2));
161 return inb(RTC_PORT(3));
164 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
166 outb(addr, RTC_PORT(2));
167 outb(val, RTC_PORT(3));
172 #define can_bank2 false
174 static inline unsigned char cmos_read_bank2(unsigned char addr)
179 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
185 /*----------------------------------------------------------------*/
187 static int cmos_read_time(struct device *dev, struct rtc_time *t)
189 /* REVISIT: if the clock has a "century" register, use
190 * that instead of the heuristic in get_rtc_time().
191 * That'll make Y3K compatility (year > 2070) easy!
197 static int cmos_set_time(struct device *dev, struct rtc_time *t)
199 /* REVISIT: set the "century" register if available
201 * NOTE: this ignores the issue whereby updating the seconds
202 * takes effect exactly 500ms after we write the register.
203 * (Also queueing and other delays before we get this far.)
205 return set_rtc_time(t);
208 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
210 struct cmos_rtc *cmos = dev_get_drvdata(dev);
211 unsigned char rtc_control;
213 if (!is_valid_irq(cmos->irq))
216 /* Basic alarms only support hour, minute, and seconds fields.
217 * Some also support day and month, for alarms up to a year in
220 t->time.tm_mday = -1;
223 spin_lock_irq(&rtc_lock);
224 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
225 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
226 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
228 if (cmos->day_alrm) {
229 /* ignore upper bits on readback per ACPI spec */
230 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
231 if (!t->time.tm_mday)
232 t->time.tm_mday = -1;
234 if (cmos->mon_alrm) {
235 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
241 rtc_control = CMOS_READ(RTC_CONTROL);
242 spin_unlock_irq(&rtc_lock);
244 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
245 if (((unsigned)t->time.tm_sec) < 0x60)
246 t->time.tm_sec = bcd2bin(t->time.tm_sec);
249 if (((unsigned)t->time.tm_min) < 0x60)
250 t->time.tm_min = bcd2bin(t->time.tm_min);
253 if (((unsigned)t->time.tm_hour) < 0x24)
254 t->time.tm_hour = bcd2bin(t->time.tm_hour);
256 t->time.tm_hour = -1;
258 if (cmos->day_alrm) {
259 if (((unsigned)t->time.tm_mday) <= 0x31)
260 t->time.tm_mday = bcd2bin(t->time.tm_mday);
262 t->time.tm_mday = -1;
264 if (cmos->mon_alrm) {
265 if (((unsigned)t->time.tm_mon) <= 0x12)
266 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
272 t->time.tm_year = -1;
274 t->enabled = !!(rtc_control & RTC_AIE);
280 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
282 unsigned char rtc_intr;
284 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
285 * allegedly some older rtcs need that to handle irqs properly
287 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
289 if (is_hpet_enabled())
292 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
293 if (is_intr(rtc_intr))
294 rtc_update_irq(cmos->rtc, 1, rtc_intr);
297 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
299 unsigned char rtc_control;
301 /* flush any pending IRQ status, notably for update irqs,
302 * before we enable new IRQs
304 rtc_control = CMOS_READ(RTC_CONTROL);
305 cmos_checkintr(cmos, rtc_control);
308 CMOS_WRITE(rtc_control, RTC_CONTROL);
309 hpet_set_rtc_irq_bit(mask);
311 cmos_checkintr(cmos, rtc_control);
314 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
316 unsigned char rtc_control;
318 rtc_control = CMOS_READ(RTC_CONTROL);
319 rtc_control &= ~mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_mask_rtc_irq_bit(mask);
323 cmos_checkintr(cmos, rtc_control);
326 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
328 struct cmos_rtc *cmos = dev_get_drvdata(dev);
329 unsigned char mon, mday, hrs, min, sec, rtc_control;
331 if (!is_valid_irq(cmos->irq))
334 mon = t->time.tm_mon + 1;
335 mday = t->time.tm_mday;
336 hrs = t->time.tm_hour;
337 min = t->time.tm_min;
338 sec = t->time.tm_sec;
340 rtc_control = CMOS_READ(RTC_CONTROL);
341 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
342 /* Writing 0xff means "don't care" or "match all". */
343 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
344 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
345 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
346 min = (min < 60) ? bin2bcd(min) : 0xff;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
350 spin_lock_irq(&rtc_lock);
352 /* next rtc irq must not be from previous alarm setting */
353 cmos_irq_disable(cmos, RTC_AIE);
356 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
357 CMOS_WRITE(min, RTC_MINUTES_ALARM);
358 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
360 /* the system may support an "enhanced" alarm */
361 if (cmos->day_alrm) {
362 CMOS_WRITE(mday, cmos->day_alrm);
364 CMOS_WRITE(mon, cmos->mon_alrm);
367 /* FIXME the HPET alarm glue currently ignores day_alrm
370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
373 cmos_irq_enable(cmos, RTC_AIE);
375 spin_unlock_irq(&rtc_lock);
381 * Do not disable RTC alarm on shutdown - workaround for b0rked BIOSes.
383 static bool alarm_disable_quirk;
385 static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
387 alarm_disable_quirk = true;
388 pr_info("rtc-cmos: BIOS has alarm-disable quirk. ");
389 pr_info("RTC alarms disabled\n");
393 static const struct dmi_system_id rtc_quirks[] __initconst = {
394 /* https://bugzilla.novell.com/show_bug.cgi?id=805740 */
396 .callback = set_alarm_disable_quirk,
397 .ident = "IBM Truman",
399 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
400 DMI_MATCH(DMI_PRODUCT_NAME, "4852570"),
403 /* https://bugzilla.novell.com/show_bug.cgi?id=812592 */
405 .callback = set_alarm_disable_quirk,
406 .ident = "Gigabyte GA-990XA-UD3",
408 DMI_MATCH(DMI_SYS_VENDOR,
409 "Gigabyte Technology Co., Ltd."),
410 DMI_MATCH(DMI_PRODUCT_NAME, "GA-990XA-UD3"),
413 /* http://permalink.gmane.org/gmane.linux.kernel/1604474 */
415 .callback = set_alarm_disable_quirk,
416 .ident = "Toshiba Satellite L300",
418 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
419 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
425 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
427 struct cmos_rtc *cmos = dev_get_drvdata(dev);
430 if (!is_valid_irq(cmos->irq))
433 if (alarm_disable_quirk)
436 spin_lock_irqsave(&rtc_lock, flags);
439 cmos_irq_enable(cmos, RTC_AIE);
441 cmos_irq_disable(cmos, RTC_AIE);
443 spin_unlock_irqrestore(&rtc_lock, flags);
447 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
449 static int cmos_procfs(struct device *dev, struct seq_file *seq)
451 struct cmos_rtc *cmos = dev_get_drvdata(dev);
452 unsigned char rtc_control, valid;
454 spin_lock_irq(&rtc_lock);
455 rtc_control = CMOS_READ(RTC_CONTROL);
456 valid = CMOS_READ(RTC_VALID);
457 spin_unlock_irq(&rtc_lock);
459 /* NOTE: at least ICH6 reports battery status using a different
460 * (non-RTC) bit; and SQWE is ignored on many current systems.
462 return seq_printf(seq,
463 "periodic_IRQ\t: %s\n"
465 "HPET_emulated\t: %s\n"
466 // "square_wave\t: %s\n"
469 "periodic_freq\t: %d\n"
470 "batt_status\t: %s\n",
471 (rtc_control & RTC_PIE) ? "yes" : "no",
472 (rtc_control & RTC_UIE) ? "yes" : "no",
473 is_hpet_enabled() ? "yes" : "no",
474 // (rtc_control & RTC_SQWE) ? "yes" : "no",
475 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
476 (rtc_control & RTC_DST_EN) ? "yes" : "no",
478 (valid & RTC_VRT) ? "okay" : "dead");
482 #define cmos_procfs NULL
485 static const struct rtc_class_ops cmos_rtc_ops = {
486 .read_time = cmos_read_time,
487 .set_time = cmos_set_time,
488 .read_alarm = cmos_read_alarm,
489 .set_alarm = cmos_set_alarm,
491 .alarm_irq_enable = cmos_alarm_irq_enable,
494 /*----------------------------------------------------------------*/
497 * All these chips have at least 64 bytes of address space, shared by
498 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
499 * by boot firmware. Modern chips have 128 or 256 bytes.
502 #define NVRAM_OFFSET (RTC_REG_D + 1)
505 cmos_nvram_read(struct file *filp, struct kobject *kobj,
506 struct bin_attribute *attr,
507 char *buf, loff_t off, size_t count)
511 if (unlikely(off >= attr->size))
513 if (unlikely(off < 0))
515 if ((off + count) > attr->size)
516 count = attr->size - off;
519 spin_lock_irq(&rtc_lock);
520 for (retval = 0; count; count--, off++, retval++) {
522 *buf++ = CMOS_READ(off);
524 *buf++ = cmos_read_bank2(off);
528 spin_unlock_irq(&rtc_lock);
534 cmos_nvram_write(struct file *filp, struct kobject *kobj,
535 struct bin_attribute *attr,
536 char *buf, loff_t off, size_t count)
538 struct cmos_rtc *cmos;
541 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
542 if (unlikely(off >= attr->size))
544 if (unlikely(off < 0))
546 if ((off + count) > attr->size)
547 count = attr->size - off;
549 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
550 * checksum on part of the NVRAM data. That's currently ignored
551 * here. If userspace is smart enough to know what fields of
552 * NVRAM to update, updating checksums is also part of its job.
555 spin_lock_irq(&rtc_lock);
556 for (retval = 0; count; count--, off++, retval++) {
557 /* don't trash RTC registers */
558 if (off == cmos->day_alrm
559 || off == cmos->mon_alrm
560 || off == cmos->century)
563 CMOS_WRITE(*buf++, off);
565 cmos_write_bank2(*buf++, off);
569 spin_unlock_irq(&rtc_lock);
574 static struct bin_attribute nvram = {
577 .mode = S_IRUGO | S_IWUSR,
580 .read = cmos_nvram_read,
581 .write = cmos_nvram_write,
582 /* size gets set up later */
585 /*----------------------------------------------------------------*/
587 static struct cmos_rtc cmos_rtc;
589 static irqreturn_t cmos_interrupt(int irq, void *p)
594 spin_lock(&rtc_lock);
596 /* When the HPET interrupt handler calls us, the interrupt
597 * status is passed as arg1 instead of the irq number. But
598 * always clear irq status, even when HPET is in the way.
600 * Note that HPET and RTC are almost certainly out of phase,
601 * giving different IRQ status ...
603 irqstat = CMOS_READ(RTC_INTR_FLAGS);
604 rtc_control = CMOS_READ(RTC_CONTROL);
605 if (is_hpet_enabled())
606 irqstat = (unsigned long)irq & 0xF0;
607 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
609 /* All Linux RTC alarms should be treated as if they were oneshot.
610 * Similar code may be needed in system wakeup paths, in case the
611 * alarm woke the system.
613 if (irqstat & RTC_AIE) {
614 rtc_control &= ~RTC_AIE;
615 CMOS_WRITE(rtc_control, RTC_CONTROL);
616 hpet_mask_rtc_irq_bit(RTC_AIE);
618 CMOS_READ(RTC_INTR_FLAGS);
620 spin_unlock(&rtc_lock);
622 if (is_intr(irqstat)) {
623 rtc_update_irq(p, 1, irqstat);
633 #define INITSECTION __init
636 static int INITSECTION
637 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
639 struct cmos_rtc_board_info *info = dev->platform_data;
641 unsigned char rtc_control;
642 unsigned address_space;
644 /* there can be only one ... */
651 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
653 * REVISIT non-x86 systems may instead use memory space resources
654 * (needing ioremap etc), not i/o space resources like this ...
656 ports = request_region(ports->start,
657 resource_size(ports),
660 dev_dbg(dev, "i/o registers already in use\n");
664 cmos_rtc.irq = rtc_irq;
665 cmos_rtc.iomem = ports;
667 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
668 * driver did, but don't reject unknown configs. Old hardware
669 * won't address 128 bytes. Newer chips have multiple banks,
670 * though they may not be listed in one I/O resource.
672 #if defined(CONFIG_ATARI)
674 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
675 || defined(__sparc__) || defined(__mips__) \
676 || defined(__powerpc__)
679 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
682 if (can_bank2 && ports->end > (ports->start + 1))
685 /* For ACPI systems extension info comes from the FADT. On others,
686 * board specific setup provides it as appropriate. Systems where
687 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
688 * some almost-clones) can provide hooks to make that behave.
690 * Note that ACPI doesn't preclude putting these registers into
691 * "extended" areas of the chip, including some that we won't yet
692 * expect CMOS_READ and friends to handle.
695 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
696 cmos_rtc.day_alrm = info->rtc_day_alarm;
697 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
698 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
699 if (info->rtc_century && info->rtc_century < 128)
700 cmos_rtc.century = info->rtc_century;
702 if (info->wake_on && info->wake_off) {
703 cmos_rtc.wake_on = info->wake_on;
704 cmos_rtc.wake_off = info->wake_off;
709 dev_set_drvdata(dev, &cmos_rtc);
711 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
712 &cmos_rtc_ops, THIS_MODULE);
713 if (IS_ERR(cmos_rtc.rtc)) {
714 retval = PTR_ERR(cmos_rtc.rtc);
718 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
720 spin_lock_irq(&rtc_lock);
722 /* force periodic irq to CMOS reset default of 1024Hz;
724 * REVISIT it's been reported that at least one x86_64 ALI mobo
725 * doesn't use 32KHz here ... for portability we might need to
726 * do something about other clock frequencies.
728 cmos_rtc.rtc->irq_freq = 1024;
729 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
730 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
733 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
735 rtc_control = CMOS_READ(RTC_CONTROL);
737 spin_unlock_irq(&rtc_lock);
740 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
742 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
743 dev_warn(dev, "only 24-hr supported\n");
748 if (is_valid_irq(rtc_irq)) {
749 irq_handler_t rtc_cmos_int_handler;
751 if (is_hpet_enabled()) {
754 rtc_cmos_int_handler = hpet_rtc_interrupt;
755 err = hpet_register_irq_handler(cmos_interrupt);
757 dev_warn(dev, "hpet_register_irq_handler "
758 " failed in rtc_init().");
762 rtc_cmos_int_handler = cmos_interrupt;
764 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
765 0, dev_name(&cmos_rtc.rtc->dev),
768 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
772 hpet_rtc_timer_init();
774 /* export at least the first block of NVRAM */
775 nvram.size = address_space - NVRAM_OFFSET;
776 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
778 dev_dbg(dev, "can't create nvram file? %d\n", retval);
782 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
783 !is_valid_irq(rtc_irq) ? "no alarms" :
784 cmos_rtc.mon_alrm ? "alarms up to one year" :
785 cmos_rtc.day_alrm ? "alarms up to one month" :
786 "alarms up to one day",
787 cmos_rtc.century ? ", y3k" : "",
789 is_hpet_enabled() ? ", hpet irqs" : "");
794 if (is_valid_irq(rtc_irq))
795 free_irq(rtc_irq, cmos_rtc.rtc);
798 rtc_device_unregister(cmos_rtc.rtc);
800 release_region(ports->start, resource_size(ports));
804 static void cmos_do_shutdown(void)
806 spin_lock_irq(&rtc_lock);
807 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
808 spin_unlock_irq(&rtc_lock);
811 static void __exit cmos_do_remove(struct device *dev)
813 struct cmos_rtc *cmos = dev_get_drvdata(dev);
814 struct resource *ports;
818 sysfs_remove_bin_file(&dev->kobj, &nvram);
820 if (is_valid_irq(cmos->irq)) {
821 free_irq(cmos->irq, cmos->rtc);
822 hpet_unregister_irq_handler(cmos_interrupt);
825 rtc_device_unregister(cmos->rtc);
829 release_region(ports->start, resource_size(ports));
833 dev_set_drvdata(dev, NULL);
838 static int cmos_suspend(struct device *dev)
840 struct cmos_rtc *cmos = dev_get_drvdata(dev);
843 /* only the alarm might be a wakeup event source */
844 spin_lock_irq(&rtc_lock);
845 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
846 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
849 if (device_may_wakeup(dev))
850 mask = RTC_IRQMASK & ~RTC_AIE;
854 CMOS_WRITE(tmp, RTC_CONTROL);
855 hpet_mask_rtc_irq_bit(mask);
857 cmos_checkintr(cmos, tmp);
859 spin_unlock_irq(&rtc_lock);
862 cmos->enabled_wake = 1;
866 enable_irq_wake(cmos->irq);
869 dev_dbg(dev, "suspend%s, ctrl %02x\n",
870 (tmp & RTC_AIE) ? ", alarm may wake" : "",
876 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
877 * after a detour through G3 "mechanical off", although the ACPI spec
878 * says wakeup should only work from G1/S4 "hibernate". To most users,
879 * distinctions between S4 and S5 are pointless. So when the hardware
880 * allows, don't draw that distinction.
882 static inline int cmos_poweroff(struct device *dev)
884 return cmos_suspend(dev);
887 static int cmos_resume(struct device *dev)
889 struct cmos_rtc *cmos = dev_get_drvdata(dev);
890 unsigned char tmp = cmos->suspend_ctrl;
892 /* re-enable any irqs previously active */
893 if (tmp & RTC_IRQMASK) {
896 if (cmos->enabled_wake) {
900 disable_irq_wake(cmos->irq);
901 cmos->enabled_wake = 0;
904 spin_lock_irq(&rtc_lock);
905 if (device_may_wakeup(dev))
906 hpet_rtc_timer_init();
909 CMOS_WRITE(tmp, RTC_CONTROL);
910 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
912 mask = CMOS_READ(RTC_INTR_FLAGS);
913 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
914 if (!is_hpet_enabled() || !is_intr(mask))
917 /* force one-shot behavior if HPET blocked
918 * the wake alarm's irq
920 rtc_update_irq(cmos->rtc, 1, mask);
922 hpet_mask_rtc_irq_bit(RTC_AIE);
923 } while (mask & RTC_AIE);
924 spin_unlock_irq(&rtc_lock);
927 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
932 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
936 static inline int cmos_poweroff(struct device *dev)
943 /*----------------------------------------------------------------*/
945 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
946 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
947 * probably list them in similar PNPBIOS tables; so PNP is more common.
949 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
950 * predate even PNPBIOS should set up platform_bus devices.
955 #include <linux/acpi.h>
957 static u32 rtc_handler(void *context)
959 struct device *dev = context;
961 pm_wakeup_event(dev, 0);
962 acpi_clear_event(ACPI_EVENT_RTC);
963 acpi_disable_event(ACPI_EVENT_RTC, 0);
964 return ACPI_INTERRUPT_HANDLED;
967 static inline void rtc_wake_setup(struct device *dev)
969 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
971 * After the RTC handler is installed, the Fixed_RTC event should
972 * be disabled. Only when the RTC alarm is set will it be enabled.
974 acpi_clear_event(ACPI_EVENT_RTC);
975 acpi_disable_event(ACPI_EVENT_RTC, 0);
978 static void rtc_wake_on(struct device *dev)
980 acpi_clear_event(ACPI_EVENT_RTC);
981 acpi_enable_event(ACPI_EVENT_RTC, 0);
984 static void rtc_wake_off(struct device *dev)
986 acpi_disable_event(ACPI_EVENT_RTC, 0);
989 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
990 * its device node and pass extra config data. This helps its driver use
991 * capabilities that the now-obsolete mc146818 didn't have, and informs it
992 * that this board's RTC is wakeup-capable (per ACPI spec).
994 static struct cmos_rtc_board_info acpi_rtc_info;
996 static void cmos_wake_setup(struct device *dev)
1001 rtc_wake_setup(dev);
1002 acpi_rtc_info.wake_on = rtc_wake_on;
1003 acpi_rtc_info.wake_off = rtc_wake_off;
1005 /* workaround bug in some ACPI tables */
1006 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1007 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1008 acpi_gbl_FADT.month_alarm);
1009 acpi_gbl_FADT.month_alarm = 0;
1012 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1013 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1014 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1016 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1017 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1018 dev_info(dev, "RTC can wake from S4\n");
1020 dev->platform_data = &acpi_rtc_info;
1022 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1023 device_init_wakeup(dev, 1);
1028 static void cmos_wake_setup(struct device *dev)
1036 #include <linux/pnp.h>
1038 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1040 cmos_wake_setup(&pnp->dev);
1042 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1043 /* Some machines contain a PNP entry for the RTC, but
1044 * don't define the IRQ. It should always be safe to
1045 * hardcode it in these cases
1047 return cmos_do_probe(&pnp->dev,
1048 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1050 return cmos_do_probe(&pnp->dev,
1051 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1055 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1057 cmos_do_remove(&pnp->dev);
1062 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1064 return cmos_suspend(&pnp->dev);
1067 static int cmos_pnp_resume(struct pnp_dev *pnp)
1069 return cmos_resume(&pnp->dev);
1073 #define cmos_pnp_suspend NULL
1074 #define cmos_pnp_resume NULL
1077 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1079 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1085 static const struct pnp_device_id rtc_ids[] = {
1086 { .id = "PNP0b00", },
1087 { .id = "PNP0b01", },
1088 { .id = "PNP0b02", },
1091 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1093 static struct pnp_driver cmos_pnp_driver = {
1094 .name = (char *) driver_name,
1095 .id_table = rtc_ids,
1096 .probe = cmos_pnp_probe,
1097 .remove = __exit_p(cmos_pnp_remove),
1098 .shutdown = cmos_pnp_shutdown,
1100 /* flag ensures resume() gets called, and stops syslog spam */
1101 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1102 .suspend = cmos_pnp_suspend,
1103 .resume = cmos_pnp_resume,
1106 #endif /* CONFIG_PNP */
1109 static const struct of_device_id of_cmos_match[] = {
1111 .compatible = "motorola,mc146818",
1115 MODULE_DEVICE_TABLE(of, of_cmos_match);
1117 static __init void cmos_of_init(struct platform_device *pdev)
1119 struct device_node *node = pdev->dev.of_node;
1120 struct rtc_time time;
1127 val = of_get_property(node, "ctrl-reg", NULL);
1129 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1131 val = of_get_property(node, "freq-reg", NULL);
1133 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1135 get_rtc_time(&time);
1136 ret = rtc_valid_tm(&time);
1138 struct rtc_time def_time = {
1142 set_rtc_time(&def_time);
1146 static inline void cmos_of_init(struct platform_device *pdev) {}
1148 /*----------------------------------------------------------------*/
1150 /* Platform setup should have set up an RTC device, when PNP is
1151 * unavailable ... this could happen even on (older) PCs.
1154 static int __init cmos_platform_probe(struct platform_device *pdev)
1157 cmos_wake_setup(&pdev->dev);
1158 return cmos_do_probe(&pdev->dev,
1159 platform_get_resource(pdev, IORESOURCE_IO, 0),
1160 platform_get_irq(pdev, 0));
1163 static int __exit cmos_platform_remove(struct platform_device *pdev)
1165 cmos_do_remove(&pdev->dev);
1169 static void cmos_platform_shutdown(struct platform_device *pdev)
1171 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1177 /* work with hotplug and coldplug */
1178 MODULE_ALIAS("platform:rtc_cmos");
1180 static struct platform_driver cmos_platform_driver = {
1181 .remove = __exit_p(cmos_platform_remove),
1182 .shutdown = cmos_platform_shutdown,
1184 .name = (char *) driver_name,
1188 .of_match_table = of_match_ptr(of_cmos_match),
1193 static bool pnp_driver_registered;
1195 static bool platform_driver_registered;
1197 static int __init cmos_init(void)
1202 retval = pnp_register_driver(&cmos_pnp_driver);
1204 pnp_driver_registered = true;
1207 if (!cmos_rtc.dev) {
1208 retval = platform_driver_probe(&cmos_platform_driver,
1209 cmos_platform_probe);
1211 platform_driver_registered = true;
1214 dmi_check_system(rtc_quirks);
1220 if (pnp_driver_registered)
1221 pnp_unregister_driver(&cmos_pnp_driver);
1225 module_init(cmos_init);
1227 static void __exit cmos_exit(void)
1230 if (pnp_driver_registered)
1231 pnp_unregister_driver(&cmos_pnp_driver);
1233 if (platform_driver_registered)
1234 platform_driver_unregister(&cmos_platform_driver);
1236 module_exit(cmos_exit);
1239 MODULE_AUTHOR("David Brownell");
1240 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1241 MODULE_LICENSE("GPL");