2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
41 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
42 #include <asm-generic/rtc.h>
45 struct rtc_device *rtc;
48 struct resource *iomem;
50 void (*wake_on)(struct device *);
51 void (*wake_off)(struct device *);
56 /* newer hardware extends the original register set */
62 /* both platform and pnp busses use negative numbers for invalid irqs */
63 #define is_valid_irq(n) ((n) > 0)
65 static const char driver_name[] = "rtc_cmos";
67 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
68 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
69 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
71 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
73 static inline int is_intr(u8 rtc_intr)
75 if (!(rtc_intr & RTC_IRQF))
77 return rtc_intr & RTC_IRQMASK;
80 /*----------------------------------------------------------------*/
82 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
83 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
84 * used in a broken "legacy replacement" mode. The breakage includes
85 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
88 * When that broken mode is in use, platform glue provides a partial
89 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
90 * want to use HPET for anything except those IRQs though...
92 #ifdef CONFIG_HPET_EMULATE_RTC
96 static inline int is_hpet_enabled(void)
101 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
106 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
112 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
117 static inline int hpet_set_periodic_freq(unsigned long freq)
122 static inline int hpet_rtc_dropped_irq(void)
127 static inline int hpet_rtc_timer_init(void)
132 extern irq_handler_t hpet_rtc_interrupt;
134 static inline int hpet_register_irq_handler(irq_handler_t handler)
139 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
146 /*----------------------------------------------------------------*/
150 /* Most newer x86 systems have two register banks, the first used
151 * for RTC and NVRAM and the second only for NVRAM. Caller must
152 * own rtc_lock ... and we won't worry about access during NMI.
154 #define can_bank2 true
156 static inline unsigned char cmos_read_bank2(unsigned char addr)
158 outb(addr, RTC_PORT(2));
159 return inb(RTC_PORT(3));
162 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
164 outb(addr, RTC_PORT(2));
165 outb(val, RTC_PORT(2));
170 #define can_bank2 false
172 static inline unsigned char cmos_read_bank2(unsigned char addr)
177 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
183 /*----------------------------------------------------------------*/
185 static int cmos_read_time(struct device *dev, struct rtc_time *t)
187 /* REVISIT: if the clock has a "century" register, use
188 * that instead of the heuristic in get_rtc_time().
189 * That'll make Y3K compatility (year > 2070) easy!
195 static int cmos_set_time(struct device *dev, struct rtc_time *t)
197 /* REVISIT: set the "century" register if available
199 * NOTE: this ignores the issue whereby updating the seconds
200 * takes effect exactly 500ms after we write the register.
201 * (Also queueing and other delays before we get this far.)
203 return set_rtc_time(t);
206 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
208 struct cmos_rtc *cmos = dev_get_drvdata(dev);
209 unsigned char rtc_control;
211 if (!is_valid_irq(cmos->irq))
214 /* Basic alarms only support hour, minute, and seconds fields.
215 * Some also support day and month, for alarms up to a year in
218 t->time.tm_mday = -1;
221 spin_lock_irq(&rtc_lock);
222 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
223 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
224 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
226 if (cmos->day_alrm) {
227 /* ignore upper bits on readback per ACPI spec */
228 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
229 if (!t->time.tm_mday)
230 t->time.tm_mday = -1;
232 if (cmos->mon_alrm) {
233 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
239 rtc_control = CMOS_READ(RTC_CONTROL);
240 spin_unlock_irq(&rtc_lock);
242 /* REVISIT this assumes PC style usage: always BCD */
244 if (((unsigned)t->time.tm_sec) < 0x60)
245 t->time.tm_sec = bcd2bin(t->time.tm_sec);
248 if (((unsigned)t->time.tm_min) < 0x60)
249 t->time.tm_min = bcd2bin(t->time.tm_min);
252 if (((unsigned)t->time.tm_hour) < 0x24)
253 t->time.tm_hour = bcd2bin(t->time.tm_hour);
255 t->time.tm_hour = -1;
257 if (cmos->day_alrm) {
258 if (((unsigned)t->time.tm_mday) <= 0x31)
259 t->time.tm_mday = bcd2bin(t->time.tm_mday);
261 t->time.tm_mday = -1;
262 if (cmos->mon_alrm) {
263 if (((unsigned)t->time.tm_mon) <= 0x12)
264 t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1;
269 t->time.tm_year = -1;
271 t->enabled = !!(rtc_control & RTC_AIE);
277 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
279 unsigned char rtc_intr;
281 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
282 * allegedly some older rtcs need that to handle irqs properly
284 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
286 if (is_hpet_enabled())
289 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
290 if (is_intr(rtc_intr))
291 rtc_update_irq(cmos->rtc, 1, rtc_intr);
294 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
296 unsigned char rtc_control;
298 /* flush any pending IRQ status, notably for update irqs,
299 * before we enable new IRQs
301 rtc_control = CMOS_READ(RTC_CONTROL);
302 cmos_checkintr(cmos, rtc_control);
305 CMOS_WRITE(rtc_control, RTC_CONTROL);
306 hpet_set_rtc_irq_bit(mask);
308 cmos_checkintr(cmos, rtc_control);
311 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
313 unsigned char rtc_control;
315 rtc_control = CMOS_READ(RTC_CONTROL);
316 rtc_control &= ~mask;
317 CMOS_WRITE(rtc_control, RTC_CONTROL);
318 hpet_mask_rtc_irq_bit(mask);
320 cmos_checkintr(cmos, rtc_control);
323 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
325 struct cmos_rtc *cmos = dev_get_drvdata(dev);
326 unsigned char mon, mday, hrs, min, sec;
328 if (!is_valid_irq(cmos->irq))
331 /* REVISIT this assumes PC style usage: always BCD */
333 /* Writing 0xff means "don't care" or "match all". */
335 mon = t->time.tm_mon + 1;
336 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
338 mday = t->time.tm_mday;
339 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
341 hrs = t->time.tm_hour;
342 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
344 min = t->time.tm_min;
345 min = (min < 60) ? bin2bcd(min) : 0xff;
347 sec = t->time.tm_sec;
348 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
350 spin_lock_irq(&rtc_lock);
352 /* next rtc irq must not be from previous alarm setting */
353 cmos_irq_disable(cmos, RTC_AIE);
356 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
357 CMOS_WRITE(min, RTC_MINUTES_ALARM);
358 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
360 /* the system may support an "enhanced" alarm */
361 if (cmos->day_alrm) {
362 CMOS_WRITE(mday, cmos->day_alrm);
364 CMOS_WRITE(mon, cmos->mon_alrm);
367 /* FIXME the HPET alarm glue currently ignores day_alrm
370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
373 cmos_irq_enable(cmos, RTC_AIE);
375 spin_unlock_irq(&rtc_lock);
380 static int cmos_irq_set_freq(struct device *dev, int freq)
382 struct cmos_rtc *cmos = dev_get_drvdata(dev);
386 if (!is_valid_irq(cmos->irq))
389 if (!is_power_of_2(freq))
391 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
397 spin_lock_irqsave(&rtc_lock, flags);
398 hpet_set_periodic_freq(freq);
399 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
400 spin_unlock_irqrestore(&rtc_lock, flags);
405 static int cmos_irq_set_state(struct device *dev, int enabled)
407 struct cmos_rtc *cmos = dev_get_drvdata(dev);
410 if (!is_valid_irq(cmos->irq))
413 spin_lock_irqsave(&rtc_lock, flags);
416 cmos_irq_enable(cmos, RTC_PIE);
418 cmos_irq_disable(cmos, RTC_PIE);
420 spin_unlock_irqrestore(&rtc_lock, flags);
424 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
427 cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
429 struct cmos_rtc *cmos = dev_get_drvdata(dev);
437 if (!is_valid_irq(cmos->irq))
440 /* PIE ON/OFF is handled by cmos_irq_set_state() */
445 spin_lock_irqsave(&rtc_lock, flags);
447 case RTC_AIE_OFF: /* alarm off */
448 cmos_irq_disable(cmos, RTC_AIE);
450 case RTC_AIE_ON: /* alarm on */
451 cmos_irq_enable(cmos, RTC_AIE);
453 case RTC_UIE_OFF: /* update off */
454 cmos_irq_disable(cmos, RTC_UIE);
456 case RTC_UIE_ON: /* update on */
457 cmos_irq_enable(cmos, RTC_UIE);
460 spin_unlock_irqrestore(&rtc_lock, flags);
465 #define cmos_rtc_ioctl NULL
468 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
470 static int cmos_procfs(struct device *dev, struct seq_file *seq)
472 struct cmos_rtc *cmos = dev_get_drvdata(dev);
473 unsigned char rtc_control, valid;
475 spin_lock_irq(&rtc_lock);
476 rtc_control = CMOS_READ(RTC_CONTROL);
477 valid = CMOS_READ(RTC_VALID);
478 spin_unlock_irq(&rtc_lock);
480 /* NOTE: at least ICH6 reports battery status using a different
481 * (non-RTC) bit; and SQWE is ignored on many current systems.
483 return seq_printf(seq,
484 "periodic_IRQ\t: %s\n"
486 "HPET_emulated\t: %s\n"
487 // "square_wave\t: %s\n"
490 "periodic_freq\t: %d\n"
491 "batt_status\t: %s\n",
492 (rtc_control & RTC_PIE) ? "yes" : "no",
493 (rtc_control & RTC_UIE) ? "yes" : "no",
494 is_hpet_enabled() ? "yes" : "no",
495 // (rtc_control & RTC_SQWE) ? "yes" : "no",
496 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
497 (rtc_control & RTC_DST_EN) ? "yes" : "no",
499 (valid & RTC_VRT) ? "okay" : "dead");
503 #define cmos_procfs NULL
506 static const struct rtc_class_ops cmos_rtc_ops = {
507 .ioctl = cmos_rtc_ioctl,
508 .read_time = cmos_read_time,
509 .set_time = cmos_set_time,
510 .read_alarm = cmos_read_alarm,
511 .set_alarm = cmos_set_alarm,
513 .irq_set_freq = cmos_irq_set_freq,
514 .irq_set_state = cmos_irq_set_state,
517 /*----------------------------------------------------------------*/
520 * All these chips have at least 64 bytes of address space, shared by
521 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
522 * by boot firmware. Modern chips have 128 or 256 bytes.
525 #define NVRAM_OFFSET (RTC_REG_D + 1)
528 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
529 char *buf, loff_t off, size_t count)
533 if (unlikely(off >= attr->size))
535 if (unlikely(off < 0))
537 if ((off + count) > attr->size)
538 count = attr->size - off;
541 spin_lock_irq(&rtc_lock);
542 for (retval = 0; count; count--, off++, retval++) {
544 *buf++ = CMOS_READ(off);
546 *buf++ = cmos_read_bank2(off);
550 spin_unlock_irq(&rtc_lock);
556 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
557 char *buf, loff_t off, size_t count)
559 struct cmos_rtc *cmos;
562 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
563 if (unlikely(off >= attr->size))
565 if (unlikely(off < 0))
567 if ((off + count) > attr->size)
568 count = attr->size - off;
570 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
571 * checksum on part of the NVRAM data. That's currently ignored
572 * here. If userspace is smart enough to know what fields of
573 * NVRAM to update, updating checksums is also part of its job.
576 spin_lock_irq(&rtc_lock);
577 for (retval = 0; count; count--, off++, retval++) {
578 /* don't trash RTC registers */
579 if (off == cmos->day_alrm
580 || off == cmos->mon_alrm
581 || off == cmos->century)
584 CMOS_WRITE(*buf++, off);
586 cmos_write_bank2(*buf++, off);
590 spin_unlock_irq(&rtc_lock);
595 static struct bin_attribute nvram = {
598 .mode = S_IRUGO | S_IWUSR,
601 .read = cmos_nvram_read,
602 .write = cmos_nvram_write,
603 /* size gets set up later */
606 /*----------------------------------------------------------------*/
608 static struct cmos_rtc cmos_rtc;
610 static irqreturn_t cmos_interrupt(int irq, void *p)
615 spin_lock(&rtc_lock);
617 /* When the HPET interrupt handler calls us, the interrupt
618 * status is passed as arg1 instead of the irq number. But
619 * always clear irq status, even when HPET is in the way.
621 * Note that HPET and RTC are almost certainly out of phase,
622 * giving different IRQ status ...
624 irqstat = CMOS_READ(RTC_INTR_FLAGS);
625 rtc_control = CMOS_READ(RTC_CONTROL);
626 if (is_hpet_enabled())
627 irqstat = (unsigned long)irq & 0xF0;
628 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
630 /* All Linux RTC alarms should be treated as if they were oneshot.
631 * Similar code may be needed in system wakeup paths, in case the
632 * alarm woke the system.
634 if (irqstat & RTC_AIE) {
635 rtc_control &= ~RTC_AIE;
636 CMOS_WRITE(rtc_control, RTC_CONTROL);
637 hpet_mask_rtc_irq_bit(RTC_AIE);
639 CMOS_READ(RTC_INTR_FLAGS);
641 spin_unlock(&rtc_lock);
643 if (is_intr(irqstat)) {
644 rtc_update_irq(p, 1, irqstat);
654 #define INITSECTION __init
657 static int INITSECTION
658 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
660 struct cmos_rtc_board_info *info = dev->platform_data;
662 unsigned char rtc_control;
663 unsigned address_space;
665 /* there can be only one ... */
672 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
674 * REVISIT non-x86 systems may instead use memory space resources
675 * (needing ioremap etc), not i/o space resources like this ...
677 ports = request_region(ports->start,
678 ports->end + 1 - ports->start,
681 dev_dbg(dev, "i/o registers already in use\n");
685 cmos_rtc.irq = rtc_irq;
686 cmos_rtc.iomem = ports;
688 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
689 * driver did, but don't reject unknown configs. Old hardware
690 * won't address 128 bytes. Newer chips have multiple banks,
691 * though they may not be listed in one I/O resource.
693 #if defined(CONFIG_ATARI)
695 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
698 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
701 if (can_bank2 && ports->end > (ports->start + 1))
704 /* For ACPI systems extension info comes from the FADT. On others,
705 * board specific setup provides it as appropriate. Systems where
706 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
707 * some almost-clones) can provide hooks to make that behave.
709 * Note that ACPI doesn't preclude putting these registers into
710 * "extended" areas of the chip, including some that we won't yet
711 * expect CMOS_READ and friends to handle.
714 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
715 cmos_rtc.day_alrm = info->rtc_day_alarm;
716 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
717 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
718 if (info->rtc_century && info->rtc_century < 128)
719 cmos_rtc.century = info->rtc_century;
721 if (info->wake_on && info->wake_off) {
722 cmos_rtc.wake_on = info->wake_on;
723 cmos_rtc.wake_off = info->wake_off;
728 dev_set_drvdata(dev, &cmos_rtc);
730 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
731 &cmos_rtc_ops, THIS_MODULE);
732 if (IS_ERR(cmos_rtc.rtc)) {
733 retval = PTR_ERR(cmos_rtc.rtc);
737 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
739 spin_lock_irq(&rtc_lock);
741 /* force periodic irq to CMOS reset default of 1024Hz;
743 * REVISIT it's been reported that at least one x86_64 ALI mobo
744 * doesn't use 32KHz here ... for portability we might need to
745 * do something about other clock frequencies.
747 cmos_rtc.rtc->irq_freq = 1024;
748 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
749 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
752 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
754 rtc_control = CMOS_READ(RTC_CONTROL);
756 spin_unlock_irq(&rtc_lock);
758 /* FIXME teach the alarm code how to handle binary mode;
759 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
761 if (is_valid_irq(rtc_irq) &&
762 (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
763 dev_dbg(dev, "only 24-hr BCD mode supported\n");
768 if (is_valid_irq(rtc_irq)) {
769 irq_handler_t rtc_cmos_int_handler;
771 if (is_hpet_enabled()) {
774 rtc_cmos_int_handler = hpet_rtc_interrupt;
775 err = hpet_register_irq_handler(cmos_interrupt);
777 printk(KERN_WARNING "hpet_register_irq_handler "
778 " failed in rtc_init().");
782 rtc_cmos_int_handler = cmos_interrupt;
784 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
785 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
788 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
792 hpet_rtc_timer_init();
794 /* export at least the first block of NVRAM */
795 nvram.size = address_space - NVRAM_OFFSET;
796 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
798 dev_dbg(dev, "can't create nvram file? %d\n", retval);
802 pr_info("%s: %s%s, %zd bytes nvram%s\n",
803 dev_name(&cmos_rtc.rtc->dev),
804 !is_valid_irq(rtc_irq) ? "no alarms" :
805 cmos_rtc.mon_alrm ? "alarms up to one year" :
806 cmos_rtc.day_alrm ? "alarms up to one month" :
807 "alarms up to one day",
808 cmos_rtc.century ? ", y3k" : "",
810 is_hpet_enabled() ? ", hpet irqs" : "");
815 if (is_valid_irq(rtc_irq))
816 free_irq(rtc_irq, cmos_rtc.rtc);
819 rtc_device_unregister(cmos_rtc.rtc);
821 release_region(ports->start, ports->end + 1 - ports->start);
825 static void cmos_do_shutdown(void)
827 spin_lock_irq(&rtc_lock);
828 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
829 spin_unlock_irq(&rtc_lock);
832 static void __exit cmos_do_remove(struct device *dev)
834 struct cmos_rtc *cmos = dev_get_drvdata(dev);
835 struct resource *ports;
839 sysfs_remove_bin_file(&dev->kobj, &nvram);
841 if (is_valid_irq(cmos->irq)) {
842 free_irq(cmos->irq, cmos->rtc);
843 hpet_unregister_irq_handler(cmos_interrupt);
846 rtc_device_unregister(cmos->rtc);
850 release_region(ports->start, ports->end + 1 - ports->start);
854 dev_set_drvdata(dev, NULL);
859 static int cmos_suspend(struct device *dev)
861 struct cmos_rtc *cmos = dev_get_drvdata(dev);
864 /* only the alarm might be a wakeup event source */
865 spin_lock_irq(&rtc_lock);
866 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
867 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
870 if (device_may_wakeup(dev))
871 mask = RTC_IRQMASK & ~RTC_AIE;
875 CMOS_WRITE(tmp, RTC_CONTROL);
876 hpet_mask_rtc_irq_bit(mask);
878 cmos_checkintr(cmos, tmp);
880 spin_unlock_irq(&rtc_lock);
883 cmos->enabled_wake = 1;
887 enable_irq_wake(cmos->irq);
890 pr_debug("%s: suspend%s, ctrl %02x\n",
891 dev_name(&cmos_rtc.rtc->dev),
892 (tmp & RTC_AIE) ? ", alarm may wake" : "",
898 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
899 * after a detour through G3 "mechanical off", although the ACPI spec
900 * says wakeup should only work from G1/S4 "hibernate". To most users,
901 * distinctions between S4 and S5 are pointless. So when the hardware
902 * allows, don't draw that distinction.
904 static inline int cmos_poweroff(struct device *dev)
906 return cmos_suspend(dev);
909 static int cmos_resume(struct device *dev)
911 struct cmos_rtc *cmos = dev_get_drvdata(dev);
912 unsigned char tmp = cmos->suspend_ctrl;
914 /* re-enable any irqs previously active */
915 if (tmp & RTC_IRQMASK) {
918 if (cmos->enabled_wake) {
922 disable_irq_wake(cmos->irq);
923 cmos->enabled_wake = 0;
926 spin_lock_irq(&rtc_lock);
928 CMOS_WRITE(tmp, RTC_CONTROL);
929 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
931 mask = CMOS_READ(RTC_INTR_FLAGS);
932 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
933 if (!is_hpet_enabled() || !is_intr(mask))
936 /* force one-shot behavior if HPET blocked
937 * the wake alarm's irq
939 rtc_update_irq(cmos->rtc, 1, mask);
941 hpet_mask_rtc_irq_bit(RTC_AIE);
942 } while (mask & RTC_AIE);
943 spin_unlock_irq(&rtc_lock);
946 pr_debug("%s: resume, ctrl %02x\n",
947 dev_name(&cmos_rtc.rtc->dev),
953 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
957 static inline int cmos_poweroff(struct device *dev)
964 /*----------------------------------------------------------------*/
966 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
967 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
968 * probably list them in similar PNPBIOS tables; so PNP is more common.
970 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
971 * predate even PNPBIOS should set up platform_bus devices.
976 #include <linux/acpi.h>
979 static u32 rtc_handler(void *context)
981 acpi_clear_event(ACPI_EVENT_RTC);
982 acpi_disable_event(ACPI_EVENT_RTC, 0);
983 return ACPI_INTERRUPT_HANDLED;
986 static inline void rtc_wake_setup(void)
988 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
990 * After the RTC handler is installed, the Fixed_RTC event should
991 * be disabled. Only when the RTC alarm is set will it be enabled.
993 acpi_clear_event(ACPI_EVENT_RTC);
994 acpi_disable_event(ACPI_EVENT_RTC, 0);
997 static void rtc_wake_on(struct device *dev)
999 acpi_clear_event(ACPI_EVENT_RTC);
1000 acpi_enable_event(ACPI_EVENT_RTC, 0);
1003 static void rtc_wake_off(struct device *dev)
1005 acpi_disable_event(ACPI_EVENT_RTC, 0);
1008 #define rtc_wake_setup() do{}while(0)
1009 #define rtc_wake_on NULL
1010 #define rtc_wake_off NULL
1013 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1014 * its device node and pass extra config data. This helps its driver use
1015 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1016 * that this board's RTC is wakeup-capable (per ACPI spec).
1018 static struct cmos_rtc_board_info acpi_rtc_info;
1020 static void __devinit
1021 cmos_wake_setup(struct device *dev)
1027 acpi_rtc_info.wake_on = rtc_wake_on;
1028 acpi_rtc_info.wake_off = rtc_wake_off;
1030 /* workaround bug in some ACPI tables */
1031 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1032 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1033 acpi_gbl_FADT.month_alarm);
1034 acpi_gbl_FADT.month_alarm = 0;
1037 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1038 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1039 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1041 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1042 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1043 dev_info(dev, "RTC can wake from S4\n");
1045 dev->platform_data = &acpi_rtc_info;
1047 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1048 device_init_wakeup(dev, 1);
1053 static void __devinit
1054 cmos_wake_setup(struct device *dev)
1062 #include <linux/pnp.h>
1064 static int __devinit
1065 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1067 cmos_wake_setup(&pnp->dev);
1069 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1070 /* Some machines contain a PNP entry for the RTC, but
1071 * don't define the IRQ. It should always be safe to
1072 * hardcode it in these cases
1074 return cmos_do_probe(&pnp->dev,
1075 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1077 return cmos_do_probe(&pnp->dev,
1078 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1082 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1084 cmos_do_remove(&pnp->dev);
1089 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1091 return cmos_suspend(&pnp->dev);
1094 static int cmos_pnp_resume(struct pnp_dev *pnp)
1096 return cmos_resume(&pnp->dev);
1100 #define cmos_pnp_suspend NULL
1101 #define cmos_pnp_resume NULL
1104 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1106 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1112 static const struct pnp_device_id rtc_ids[] = {
1113 { .id = "PNP0b00", },
1114 { .id = "PNP0b01", },
1115 { .id = "PNP0b02", },
1118 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1120 static struct pnp_driver cmos_pnp_driver = {
1121 .name = (char *) driver_name,
1122 .id_table = rtc_ids,
1123 .probe = cmos_pnp_probe,
1124 .remove = __exit_p(cmos_pnp_remove),
1125 .shutdown = cmos_pnp_shutdown,
1127 /* flag ensures resume() gets called, and stops syslog spam */
1128 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1129 .suspend = cmos_pnp_suspend,
1130 .resume = cmos_pnp_resume,
1133 #endif /* CONFIG_PNP */
1135 /*----------------------------------------------------------------*/
1137 /* Platform setup should have set up an RTC device, when PNP is
1138 * unavailable ... this could happen even on (older) PCs.
1141 static int __init cmos_platform_probe(struct platform_device *pdev)
1143 cmos_wake_setup(&pdev->dev);
1144 return cmos_do_probe(&pdev->dev,
1145 platform_get_resource(pdev, IORESOURCE_IO, 0),
1146 platform_get_irq(pdev, 0));
1149 static int __exit cmos_platform_remove(struct platform_device *pdev)
1151 cmos_do_remove(&pdev->dev);
1155 static void cmos_platform_shutdown(struct platform_device *pdev)
1157 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1163 /* work with hotplug and coldplug */
1164 MODULE_ALIAS("platform:rtc_cmos");
1166 static struct platform_driver cmos_platform_driver = {
1167 .remove = __exit_p(cmos_platform_remove),
1168 .shutdown = cmos_platform_shutdown,
1170 .name = (char *) driver_name,
1178 static bool pnp_driver_registered;
1180 static bool platform_driver_registered;
1182 static int __init cmos_init(void)
1187 retval = pnp_register_driver(&cmos_pnp_driver);
1189 pnp_driver_registered = true;
1192 if (!cmos_rtc.dev) {
1193 retval = platform_driver_probe(&cmos_platform_driver,
1194 cmos_platform_probe);
1196 platform_driver_registered = true;
1203 if (pnp_driver_registered)
1204 pnp_unregister_driver(&cmos_pnp_driver);
1208 module_init(cmos_init);
1210 static void __exit cmos_exit(void)
1213 if (pnp_driver_registered)
1214 pnp_unregister_driver(&cmos_pnp_driver);
1216 if (platform_driver_registered)
1217 platform_driver_unregister(&cmos_platform_driver);
1219 module_exit(cmos_exit);
1222 MODULE_AUTHOR("David Brownell");
1223 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1224 MODULE_LICENSE("GPL");