drivers/rk_nand/rk_nand_base.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/irq.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/bootmem.h>
  17 #include <asm/cacheflush.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #ifdef CONFIG_OF
  21 #include <linux/of.h>
  22 #endif
  23 #include "rk_nand_blk.h"
  24 #include "rk_ftl_api.h"
  25
  26 #define RKNAND_VERSION_AND_DATE  "rknandbase v1.1 2016-01-08"
  27
  28 struct rk_nandc_info {
  29         int     id;
  30         void __iomem    *reg_base;
  31         int     irq;
  32         int     clk_rate;
  33         struct clk      *clk;   /* flash clk*/
  34         struct clk      *hclk;  /* nandc clk*/
  35 };
  36
  37 static struct rk_nandc_info g_nandc_info[2];
  38 struct device *g_nand_device;
  39 static char nand_idb_data[2048];
  40 static int rk_nand_wait_busy_schedule;
  41 static int rk_nand_suspend_state;
  42 static int rk_nand_shutdown_state;
  43 /*1:flash 2:emmc 4:sdcard0 8:sdcard1*/
  44 static int rknand_boot_media = 2;
  45 static DECLARE_WAIT_QUEUE_HEAD(rk29_nandc_wait);
  46 static void rk_nand_iqr_timeout_hack(unsigned long data);
  47 static DEFINE_TIMER(rk_nand_iqr_timeout, rk_nand_iqr_timeout_hack, 0, 0);
  48 static int nandc0_xfer_completed_flag;
  49 static int nandc0_ready_completed_flag;
  50 static int nandc1_xfer_completed_flag;
  51 static int nandc1_ready_completed_flag;
  52 static int rk_timer_add;
  53
  54 char rknand_get_sn(char *pbuf)
  55 {
  56         memcpy(pbuf, &nand_idb_data[0x600], 0x200);
  57         return 0;
  58 }
  59
  60 char rknand_get_vendor0(char *pbuf)
  61 {
  62         memcpy(pbuf, &nand_idb_data[0x400 + 8], 504);
  63         return 0;
  64 }
  65
  66 char *rknand_get_idb_data(void)
  67 {
  68         return nand_idb_data;
  69 }
  70 EXPORT_SYMBOL(rknand_get_idb_data);
  71
  72 int rknand_get_clk_rate(int nandc_id)
  73 {
  74         return g_nandc_info[nandc_id].clk_rate;
  75 }
  76 EXPORT_SYMBOL(rknand_get_clk_rate);
  77
  78 unsigned long rknand_dma_flush_dcache(unsigned long ptr, int size, int dir)
  79 {
  80 #ifdef CONFIG_ARM64
  81         __flush_dcache_area((void *)ptr, size + 63);
  82 #else
  83         __cpuc_flush_dcache_area((void *)ptr, size + 63);
  84 #endif
  85         return ((unsigned long)virt_to_phys((void *)ptr));
  86 }
  87 EXPORT_SYMBOL(rknand_dma_flush_dcache);
  88
  89 unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir)
  90 {
  91 #ifdef CONFIG_ARM64
  92         __dma_map_area((void *)ptr, size, dir);
  93         return ((unsigned long)virt_to_phys((void *)ptr));
  94 #else
  95         return dma_map_single(NULL, (void *)ptr, size
  96                 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  97 #endif
  98 }
  99 EXPORT_SYMBOL(rknand_dma_map_single);
 100
 101 void rknand_dma_unmap_single(unsigned long ptr, int size, int dir)
 102 {
 103 #ifdef CONFIG_ARM64
 104         __dma_unmap_area(phys_to_virt(ptr), size, dir);
 105 #else
 106         dma_unmap_single(NULL, (dma_addr_t)ptr, size
 107                 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 108 #endif
 109 }
 110 EXPORT_SYMBOL(rknand_dma_unmap_single);
 111
 112 int rknand_flash_cs_init(int id)
 113 {
 114         return 0;
 115 }
 116 EXPORT_SYMBOL(rknand_flash_cs_init);
 117
 118 int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1)
 119 {
 120         *p_nandc0 = (unsigned long)g_nandc_info[0].reg_base;
 121         *p_nandc1 = (unsigned long)g_nandc_info[1].reg_base;
 122         return 0;
 123 }
 124 EXPORT_SYMBOL(rknand_get_reg_addr);
 125
 126 int rknand_get_boot_media(void)
 127 {
 128         return rknand_boot_media;
 129 }
 130 EXPORT_SYMBOL(rknand_get_boot_media);
 131
 132 int rk_nand_schedule_enable_config(int en)
 133 {
 134         int tmp = rk_nand_wait_busy_schedule;
 135
 136         rk_nand_wait_busy_schedule = en;
 137         return tmp;
 138 }
 139
 140 static void rk_nand_iqr_timeout_hack(unsigned long data)
 141 {
 142         del_timer(&rk_nand_iqr_timeout);
 143         rk_timer_add = 0;
 144         nandc0_xfer_completed_flag = 1;
 145         nandc0_ready_completed_flag = 1;
 146         nandc1_xfer_completed_flag = 1;
 147         nandc1_ready_completed_flag = 1;
 148         wake_up(&rk29_nandc_wait);
 149 }
 150
 151 static void rk_add_timer(void)
 152 {
 153         if (rk_timer_add == 0) {
 154                 rk_timer_add = 1;
 155                 rk_nand_iqr_timeout.expires = jiffies + HZ / 50;
 156                 add_timer(&rk_nand_iqr_timeout);
 157         }
 158 }
 159
 160 static void rk_del_timer(void)
 161 {
 162         if (rk_timer_add)
 163                 del_timer(&rk_nand_iqr_timeout);
 164         rk_timer_add = 0;
 165 }
 166
 167 static irqreturn_t rk_nandc_interrupt(int irq, void *dev_id)
 168 {
 169         unsigned int irq_status = rk_nandc_get_irq_status(dev_id);
 170
 171         if (irq_status & (1 << 0)) {
 172                 rk_nandc_flash_xfer_completed(dev_id);
 173                 if (dev_id == g_nandc_info[0].reg_base)
 174                         nandc0_xfer_completed_flag = 1;
 175                 else
 176                         nandc1_xfer_completed_flag = 1;
 177         }
 178
 179         if (irq_status & (1 << 1)) {
 180                 rk_nandc_flash_ready(dev_id);
 181                 if (dev_id == g_nandc_info[0].reg_base)
 182                         nandc0_ready_completed_flag = 1;
 183                 else
 184                         nandc1_ready_completed_flag = 1;
 185         }
 186
 187         wake_up(&rk29_nandc_wait);
 188         return IRQ_HANDLED;
 189 }
 190
 191 void rk_nandc_xfer_irq_flag_init(void *nandc_reg)
 192 {
 193         if (nandc_reg == g_nandc_info[0].reg_base)
 194                 nandc0_xfer_completed_flag = 0;
 195         else
 196                 nandc1_xfer_completed_flag = 0;
 197 }
 198
 199 void rk_nandc_rb_irq_flag_init(void *nandc_reg)
 200 {
 201         if (nandc_reg == g_nandc_info[0].reg_base)
 202                 nandc0_ready_completed_flag = 0;
 203         else
 204                 nandc1_ready_completed_flag = 0;
 205 }
 206
 207 void wait_for_nandc_xfer_completed(void *nandc_reg)
 208 {
 209         if (rk_nand_wait_busy_schedule) {
 210                 rk_add_timer();
 211                 if (nandc_reg == g_nandc_info[0].reg_base)
 212                         wait_event(rk29_nandc_wait, nandc0_xfer_completed_flag);
 213                 else
 214                         wait_event(rk29_nandc_wait, nandc1_xfer_completed_flag);
 215                 rk_del_timer();
 216         }
 217         if (nandc_reg == g_nandc_info[0].reg_base)
 218                 nandc0_xfer_completed_flag = 0;
 219         else
 220                 nandc1_xfer_completed_flag = 0;
 221 }
 222
 223 void wait_for_nand_flash_ready(void *nandc_reg)
 224 {
 225         if (rk_nand_wait_busy_schedule) {
 226                 rk_add_timer();
 227                 if (nandc_reg == g_nandc_info[0].reg_base)
 228                         wait_event(rk29_nandc_wait
 229                                 , nandc0_ready_completed_flag);
 230                 else
 231                         wait_event(rk29_nandc_wait
 232                                 , nandc1_ready_completed_flag);
 233                 rk_del_timer();
 234         }
 235         if (nandc_reg == g_nandc_info[0].reg_base)
 236                 nandc0_ready_completed_flag = 0;
 237         else
 238                 nandc1_ready_completed_flag = 0;
 239 }
 240
 241 static int rk_nandc_irq_config(int id, int mode, void *pfun)
 242 {
 243         int ret = 0;
 244         int irq = g_nandc_info[id].irq;
 245
 246         if (mode)
 247                 ret = request_irq(irq, pfun, 0, "nandc"
 248                         , g_nandc_info[id].reg_base);
 249         else
 250                 free_irq(irq,  NULL);
 251         return ret;
 252 }
 253
 254 int rk_nandc_irq_init(void)
 255 {
 256         int ret = 0;
 257
 258         rk_timer_add = 0;
 259         nandc0_ready_completed_flag = 0;
 260         nandc0_xfer_completed_flag = 0;
 261         rk_nandc_irq_config(0, 1, rk_nandc_interrupt);
 262
 263         if (g_nandc_info[1].reg_base != 0) {
 264                 nandc1_ready_completed_flag = 0;
 265                 nandc1_xfer_completed_flag = 0;
 266                 rk_nandc_irq_config(1, 1, rk_nandc_interrupt);
 267         }
 268         return ret;
 269 }
 270
 271 int rk_nandc_irq_deinit(void)
 272 {
 273         int ret = 0;
 274
 275         rk_nandc_irq_config(0, 0, rk_nandc_interrupt);
 276         if (g_nandc_info[1].reg_base != 0)
 277                 rk_nandc_irq_config(1, 0, rk_nandc_interrupt);
 278         return ret;
 279 }
 280
 281 static int rknand_probe(struct platform_device *pdev)
 282 {
 283         unsigned int id = 0;
 284         int irq;
 285         struct resource *mem;
 286         void __iomem    *membase;
 287
 288         g_nand_device = &pdev->dev;
 289         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 290         membase = devm_ioremap_resource(&pdev->dev, mem);
 291         if (membase == 0) {
 292                 dev_err(&pdev->dev, "no reg resource?\n");
 293                 return -1;
 294         }
 295
 296         #ifdef CONFIG_OF
 297         of_property_read_u32(pdev->dev.of_node, "nandc_id", &id);
 298         pdev->id = id;
 299         #endif
 300
 301         if (id == 0) {
 302                 memcpy(nand_idb_data, membase + 0x1000, 0x800);
 303                 if (*(int *)(&nand_idb_data[0]) == 0x44535953) {
 304                         rknand_boot_media = *(int *)(&nand_idb_data[8]);
 305                         if (rknand_boot_media == 2) /*boot from emmc*/
 306                                 return -1;
 307                 }
 308         }
 309
 310         irq = platform_get_irq(pdev, 0);
 311         if (irq < 0) {
 312                 dev_err(&pdev->dev, "no irq resource?\n");
 313                 return irq;
 314         }
 315
 316         g_nandc_info[id].id = id;
 317         g_nandc_info[id].irq = irq;
 318         g_nandc_info[id].reg_base = membase;
 319
 320         g_nandc_info[id].hclk = devm_clk_get(&pdev->dev, "hclk_nandc");
 321         g_nandc_info[id].clk = devm_clk_get(&pdev->dev, "clk_nandc");
 322
 323         if (unlikely(IS_ERR(g_nandc_info[id].clk)) ||
 324             unlikely(IS_ERR(g_nandc_info[id].hclk))) {
 325                 dev_err(&pdev->dev, "rknand_probe get clk error\n");
 326                 return -1;
 327         }
 328
 329         clk_set_rate(g_nandc_info[id].clk, 150 * 1000 * 1000);
 330         g_nandc_info[id].clk_rate = clk_get_rate(g_nandc_info[id].clk);
 331         clk_prepare_enable(g_nandc_info[id].clk);
 332         clk_prepare_enable(g_nandc_info[id].hclk);
 333
 334         dev_info(&pdev->dev,
 335                  "rknand_probe clk rate = %d\n",
 336                  g_nandc_info[id].clk_rate);
 337         return 0;
 338 }
 339
 340 static int rknand_suspend(struct platform_device *pdev, pm_message_t state)
 341 {
 342         if (rk_nand_suspend_state == 0) {
 343                 rk_nand_suspend_state = 1;
 344                 rknand_dev_suspend();
 345         }
 346         return 0;
 347 }
 348
 349 static int rknand_resume(struct platform_device *pdev)
 350 {
 351         if (rk_nand_suspend_state == 1) {
 352                 rk_nand_suspend_state = 0;
 353                 rknand_dev_resume();
 354         }
 355         return 0;
 356 }
 357
 358 static void rknand_shutdown(struct platform_device *pdev)
 359 {
 360         if (rk_nand_shutdown_state == 0) {
 361                 rk_nand_shutdown_state = 1;
 362                 rknand_dev_shutdown();
 363         }
 364 }
 365
 366 void rknand_dev_cache_flush(void)
 367 {
 368         rknand_dev_flush();
 369 }
 370
 371 #ifdef CONFIG_OF
 372 static const struct of_device_id of_rk_nandc_match[] = {
 373         {.compatible = "rockchip,rk-nandc"},
 374         {}
 375 };
 376 #endif
 377
 378 static struct platform_driver rknand_driver = {
 379         .probe          = rknand_probe,
 380         .suspend        = rknand_suspend,
 381         .resume         = rknand_resume,
 382         .shutdown       = rknand_shutdown,
 383         .driver         = {
 384                 .name   = "rknand",
 385 #ifdef CONFIG_OF
 386                 .of_match_table = of_rk_nandc_match,
 387 #endif
 388                 .owner  = THIS_MODULE,
 389         },
 390 };
 391
 392 static void __exit rknand_driver_exit(void)
 393 {
 394         rknand_dev_exit();
 395         platform_driver_unregister(&rknand_driver);
 396 }
 397
 398 static int __init rknand_driver_init(void)
 399 {
 400         int ret = 0;
 401
 402         pr_err("%s\n", RKNAND_VERSION_AND_DATE);
 403         ret = platform_driver_register(&rknand_driver);
 404         if (ret == 0)
 405                 ret = rknand_dev_init();
 406         return ret;
 407 }
 408
 409 module_init(rknand_driver_init);
 410 module_exit(rknand_driver_exit);
 411 MODULE_ALIAS(DRIVER_NAME);