2 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/irq.h>
15 #include <linux/interrupt.h>
16 #include <linux/bootmem.h>
17 #include <asm/cacheflush.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/uaccess.h>
24 #include "rk_nand_blk.h"
25 #include "rk_ftl_api.h"
27 #define RKNAND_VERSION_AND_DATE "rknandbase v1.1 2016-01-08"
29 struct rk_nandc_info {
31 void __iomem *reg_base;
34 struct clk *clk; /* flash clk*/
35 struct clk *hclk; /* nandc clk*/
38 static struct rk_nandc_info g_nandc_info[2];
39 struct device *g_nand_device;
40 static char nand_idb_data[2048];
41 static int rk_nand_wait_busy_schedule;
42 static int rk_nand_suspend_state;
43 static int rk_nand_shutdown_state;
44 /*1:flash 2:emmc 4:sdcard0 8:sdcard1*/
45 static int rknand_boot_media = 2;
46 static DECLARE_WAIT_QUEUE_HEAD(rk29_nandc_wait);
47 static void rk_nand_iqr_timeout_hack(unsigned long data);
48 static DEFINE_TIMER(rk_nand_iqr_timeout, rk_nand_iqr_timeout_hack, 0, 0);
49 static int nandc0_xfer_completed_flag;
50 static int nandc0_ready_completed_flag;
51 static int nandc1_xfer_completed_flag;
52 static int nandc1_ready_completed_flag;
53 static int rk_timer_add;
55 char rknand_get_sn(char *pbuf)
57 memcpy(pbuf, &nand_idb_data[0x600], 0x200);
61 char rknand_get_vendor0(char *pbuf)
63 memcpy(pbuf, &nand_idb_data[0x400 + 8], 504);
67 char *rknand_get_idb_data(void)
71 EXPORT_SYMBOL(rknand_get_idb_data);
73 int rknand_get_clk_rate(int nandc_id)
75 return g_nandc_info[nandc_id].clk_rate;
77 EXPORT_SYMBOL(rknand_get_clk_rate);
79 unsigned long rknand_dma_flush_dcache(unsigned long ptr, int size, int dir)
82 __flush_dcache_area((void *)ptr, size + 63);
84 __cpuc_flush_dcache_area((void *)ptr, size + 63);
86 return ((unsigned long)virt_to_phys((void *)ptr));
88 EXPORT_SYMBOL(rknand_dma_flush_dcache);
90 unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir)
93 __dma_map_area((void *)ptr, size, dir);
94 return ((unsigned long)virt_to_phys((void *)ptr));
96 return dma_map_single(NULL, (void *)ptr, size
97 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
100 EXPORT_SYMBOL(rknand_dma_map_single);
102 void rknand_dma_unmap_single(unsigned long ptr, int size, int dir)
105 __dma_unmap_area(phys_to_virt(ptr), size, dir);
107 dma_unmap_single(NULL, (dma_addr_t)ptr, size
108 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
111 EXPORT_SYMBOL(rknand_dma_unmap_single);
113 int rknand_flash_cs_init(int id)
117 EXPORT_SYMBOL(rknand_flash_cs_init);
119 int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1)
121 *p_nandc0 = (unsigned long)g_nandc_info[0].reg_base;
122 *p_nandc1 = (unsigned long)g_nandc_info[1].reg_base;
125 EXPORT_SYMBOL(rknand_get_reg_addr);
127 int rknand_get_boot_media(void)
129 return rknand_boot_media;
131 EXPORT_SYMBOL(rknand_get_boot_media);
133 unsigned long rk_copy_from_user(void *to, const void __user *from,
136 return copy_from_user(to, from, n);
139 unsigned long rk_copy_to_user(void __user *to, const void *from,
142 return copy_to_user(to, from, n);
145 int rk_nand_schedule_enable_config(int en)
147 int tmp = rk_nand_wait_busy_schedule;
149 rk_nand_wait_busy_schedule = en;
153 static void rk_nand_iqr_timeout_hack(unsigned long data)
155 del_timer(&rk_nand_iqr_timeout);
157 nandc0_xfer_completed_flag = 1;
158 nandc0_ready_completed_flag = 1;
159 nandc1_xfer_completed_flag = 1;
160 nandc1_ready_completed_flag = 1;
161 wake_up(&rk29_nandc_wait);
164 static void rk_add_timer(void)
166 if (rk_timer_add == 0) {
168 rk_nand_iqr_timeout.expires = jiffies + HZ / 50;
169 add_timer(&rk_nand_iqr_timeout);
173 static void rk_del_timer(void)
176 del_timer(&rk_nand_iqr_timeout);
180 static irqreturn_t rk_nandc_interrupt(int irq, void *dev_id)
182 unsigned int irq_status = rk_nandc_get_irq_status(dev_id);
184 if (irq_status & (1 << 0)) {
185 rk_nandc_flash_xfer_completed(dev_id);
186 if (dev_id == g_nandc_info[0].reg_base)
187 nandc0_xfer_completed_flag = 1;
189 nandc1_xfer_completed_flag = 1;
192 if (irq_status & (1 << 1)) {
193 rk_nandc_flash_ready(dev_id);
194 if (dev_id == g_nandc_info[0].reg_base)
195 nandc0_ready_completed_flag = 1;
197 nandc1_ready_completed_flag = 1;
200 wake_up(&rk29_nandc_wait);
204 void rk_nandc_xfer_irq_flag_init(void *nandc_reg)
206 if (nandc_reg == g_nandc_info[0].reg_base)
207 nandc0_xfer_completed_flag = 0;
209 nandc1_xfer_completed_flag = 0;
212 void rk_nandc_rb_irq_flag_init(void *nandc_reg)
214 if (nandc_reg == g_nandc_info[0].reg_base)
215 nandc0_ready_completed_flag = 0;
217 nandc1_ready_completed_flag = 0;
220 void wait_for_nandc_xfer_completed(void *nandc_reg)
222 if (rk_nand_wait_busy_schedule) {
224 if (nandc_reg == g_nandc_info[0].reg_base)
225 wait_event(rk29_nandc_wait, nandc0_xfer_completed_flag);
227 wait_event(rk29_nandc_wait, nandc1_xfer_completed_flag);
230 if (nandc_reg == g_nandc_info[0].reg_base)
231 nandc0_xfer_completed_flag = 0;
233 nandc1_xfer_completed_flag = 0;
236 void wait_for_nand_flash_ready(void *nandc_reg)
238 if (rk_nand_wait_busy_schedule) {
240 if (nandc_reg == g_nandc_info[0].reg_base)
241 wait_event(rk29_nandc_wait
242 , nandc0_ready_completed_flag);
244 wait_event(rk29_nandc_wait
245 , nandc1_ready_completed_flag);
248 if (nandc_reg == g_nandc_info[0].reg_base)
249 nandc0_ready_completed_flag = 0;
251 nandc1_ready_completed_flag = 0;
254 static int rk_nandc_irq_config(int id, int mode, void *pfun)
257 int irq = g_nandc_info[id].irq;
260 ret = request_irq(irq, pfun, 0, "nandc"
261 , g_nandc_info[id].reg_base);
267 int rk_nandc_irq_init(void)
272 nandc0_ready_completed_flag = 0;
273 nandc0_xfer_completed_flag = 0;
274 rk_nandc_irq_config(0, 1, rk_nandc_interrupt);
276 if (g_nandc_info[1].reg_base != 0) {
277 nandc1_ready_completed_flag = 0;
278 nandc1_xfer_completed_flag = 0;
279 rk_nandc_irq_config(1, 1, rk_nandc_interrupt);
284 int rk_nandc_irq_deinit(void)
288 rk_nandc_irq_config(0, 0, rk_nandc_interrupt);
289 if (g_nandc_info[1].reg_base != 0)
290 rk_nandc_irq_config(1, 0, rk_nandc_interrupt);
294 static int rknand_probe(struct platform_device *pdev)
298 struct resource *mem;
299 void __iomem *membase;
301 g_nand_device = &pdev->dev;
302 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303 membase = devm_ioremap_resource(&pdev->dev, mem);
305 dev_err(&pdev->dev, "no reg resource?\n");
310 of_property_read_u32(pdev->dev.of_node, "nandc_id", &id);
315 memcpy(nand_idb_data, membase + 0x1000, 0x800);
316 if (*(int *)(&nand_idb_data[0]) == 0x44535953) {
317 rknand_boot_media = *(int *)(&nand_idb_data[8]);
318 if (rknand_boot_media == 2) /*boot from emmc*/
323 irq = platform_get_irq(pdev, 0);
325 dev_err(&pdev->dev, "no irq resource?\n");
329 g_nandc_info[id].id = id;
330 g_nandc_info[id].irq = irq;
331 g_nandc_info[id].reg_base = membase;
333 g_nandc_info[id].hclk = devm_clk_get(&pdev->dev, "hclk_nandc");
334 g_nandc_info[id].clk = devm_clk_get(&pdev->dev, "clk_nandc");
336 if (unlikely(IS_ERR(g_nandc_info[id].clk)) ||
337 unlikely(IS_ERR(g_nandc_info[id].hclk))) {
338 dev_err(&pdev->dev, "rknand_probe get clk error\n");
342 clk_set_rate(g_nandc_info[id].clk, 150 * 1000 * 1000);
343 g_nandc_info[id].clk_rate = clk_get_rate(g_nandc_info[id].clk);
344 clk_prepare_enable(g_nandc_info[id].clk);
345 clk_prepare_enable(g_nandc_info[id].hclk);
348 "rknand_probe clk rate = %d\n",
349 g_nandc_info[id].clk_rate);
353 static int rknand_suspend(struct platform_device *pdev, pm_message_t state)
355 if (rk_nand_suspend_state == 0) {
356 rk_nand_suspend_state = 1;
357 rknand_dev_suspend();
362 static int rknand_resume(struct platform_device *pdev)
364 if (rk_nand_suspend_state == 1) {
365 rk_nand_suspend_state = 0;
371 static void rknand_shutdown(struct platform_device *pdev)
373 if (rk_nand_shutdown_state == 0) {
374 rk_nand_shutdown_state = 1;
375 rknand_dev_shutdown();
379 void rknand_dev_cache_flush(void)
385 static const struct of_device_id of_rk_nandc_match[] = {
386 {.compatible = "rockchip,rk-nandc"},
391 static struct platform_driver rknand_driver = {
392 .probe = rknand_probe,
393 .suspend = rknand_suspend,
394 .resume = rknand_resume,
395 .shutdown = rknand_shutdown,
399 .of_match_table = of_rk_nandc_match,
401 .owner = THIS_MODULE,
405 static void __exit rknand_driver_exit(void)
408 platform_driver_unregister(&rknand_driver);
411 static int __init rknand_driver_init(void)
415 pr_err("%s\n", RKNAND_VERSION_AND_DATE);
416 ret = platform_driver_register(&rknand_driver);
418 ret = rknand_dev_init();
422 module_init(rknand_driver_init);
423 module_exit(rknand_driver_exit);
424 MODULE_ALIAS(DRIVER_NAME);