drivers/pwm/pwm-rockchip.c

   1 /*
   2  * PWM driver for Rockchip SoCs
   3  *
   4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
   5  * Copyright (C) 2014 ROCKCHIP, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/clk.h>
  13 #include <linux/io.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/of_device.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/pwm.h>
  19 #include <linux/time.h>
  20 #include <linux/rk_fb.h>
  21
  22 #define PWM_CTRL_TIMER_EN       (1 << 0)
  23 #define PWM_CTRL_OUTPUT_EN      (1 << 3)
  24
  25 #define PWM_ENABLE              (1 << 0)
  26 #define PWM_CONTINUOUS          (1 << 1)
  27 #define PWM_DUTY_POSITIVE       (1 << 3)
  28 #define PWM_DUTY_NEGATIVE       (0 << 3)
  29 #define PWM_INACTIVE_NEGATIVE   (0 << 4)
  30 #define PWM_INACTIVE_POSITIVE   (1 << 4)
  31 #define PWM_OUTPUT_LEFT         (0 << 5)
  32 #define PWM_LP_DISABLE          (0 << 8)
  33
  34 struct rockchip_pwm_chip {
  35         struct pwm_chip chip;
  36         struct clk *clk;
  37         const struct rockchip_pwm_data *data;
  38         void __iomem *base;
  39 };
  40
  41 struct rockchip_pwm_regs {
  42         unsigned long duty;
  43         unsigned long period;
  44         unsigned long cntr;
  45         unsigned long ctrl;
  46 };
  47
  48 struct rockchip_pwm_data {
  49         struct rockchip_pwm_regs regs;
  50         unsigned int prescaler;
  51         const struct pwm_ops *ops;
  52
  53         void (*set_enable)(struct pwm_chip *chip,
  54                            struct pwm_device *pwm, bool enable);
  55 };
  56
  57 static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
  58 {
  59         return container_of(c, struct rockchip_pwm_chip, chip);
  60 }
  61
  62 static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
  63                                        struct pwm_device *pwm, bool enable)
  64 {
  65         struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
  66         u32 enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN;
  67         u32 val;
  68
  69         val = readl_relaxed(pc->base + pc->data->regs.ctrl);
  70
  71         if (enable)
  72                 val |= enable_conf;
  73         else
  74                 val &= ~enable_conf;
  75
  76         writel_relaxed(val, pc->base + pc->data->regs.ctrl);
  77 }
  78
  79 static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
  80                                        struct pwm_device *pwm, bool enable)
  81 {
  82         struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
  83         u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE |
  84                           PWM_CONTINUOUS;
  85         u32 val;
  86
  87         if (pwm_get_polarity(pwm) == PWM_POLARITY_INVERSED)
  88                 enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE;
  89         else
  90                 enable_conf |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE;
  91
  92         val = readl_relaxed(pc->base + pc->data->regs.ctrl);
  93         val &= ~(GENMASK(5, 0) | BIT(8));
  94
  95         if (enable)
  96                 val |= enable_conf;
  97         else
  98                 val &= ~enable_conf;
  99
 100         writel_relaxed(val, pc->base + pc->data->regs.ctrl);
 101 }
 102
 103 static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 104                                int duty_ns, int period_ns)
 105 {
 106         struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
 107         unsigned long period, duty;
 108         u64 clk_rate, div;
 109         int ret;
 110
 111         clk_rate = clk_get_rate(pc->clk);
 112
 113         /*
 114          * Since period and duty cycle registers have a width of 32
 115          * bits, every possible input period can be obtained using the
 116          * default prescaler value for all practical clock rate values.
 117          */
 118         div = clk_rate * period_ns;
 119         do_div(div, pc->data->prescaler * NSEC_PER_SEC);
 120         period = div;
 121
 122         div = clk_rate * duty_ns;
 123         do_div(div, pc->data->prescaler * NSEC_PER_SEC);
 124         duty = div;
 125
 126         ret = clk_enable(pc->clk);
 127         if (ret)
 128                 return ret;
 129
 130         writel(period, pc->base + pc->data->regs.period);
 131         writel(duty, pc->base + pc->data->regs.duty);
 132         writel(0, pc->base + pc->data->regs.cntr);
 133
 134         clk_disable(pc->clk);
 135
 136 #ifdef CONFIG_FB_ROCKCHIP
 137         if (!pc->data->regs.ctrl) {
 138                 ret = rk_fb_set_vop_pwm();
 139                 if (ret)
 140                         dev_err(pc->chip.dev, "rk_fb_set_vop_pwm failed: %d\n", ret);
 141         }
 142 #endif
 143
 144         return 0;
 145 }
 146
 147 static int rockchip_pwm_set_polarity(struct pwm_chip *chip,
 148                                      struct pwm_device *pwm,
 149                                      enum pwm_polarity polarity)
 150 {
 151         /*
 152          * No action needed here because pwm->polarity will be set by the core
 153          * and the core will only change polarity when the PWM is not enabled.
 154          * We'll handle things in set_enable().
 155          */
 156
 157         return 0;
 158 }
 159
 160 static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 161 {
 162         struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
 163         int ret;
 164
 165         ret = clk_enable(pc->clk);
 166         if (ret)
 167                 return ret;
 168
 169         pc->data->set_enable(chip, pwm, true);
 170
 171         return 0;
 172 }
 173
 174 static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 175 {
 176         struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
 177
 178         pc->data->set_enable(chip, pwm, false);
 179
 180         clk_disable(pc->clk);
 181 }
 182
 183 static const struct pwm_ops rockchip_pwm_ops_v1 = {
 184         .config = rockchip_pwm_config,
 185         .enable = rockchip_pwm_enable,
 186         .disable = rockchip_pwm_disable,
 187         .owner = THIS_MODULE,
 188 };
 189
 190 static const struct pwm_ops rockchip_pwm_ops_v2 = {
 191         .config = rockchip_pwm_config,
 192         .set_polarity = rockchip_pwm_set_polarity,
 193         .enable = rockchip_pwm_enable,
 194         .disable = rockchip_pwm_disable,
 195         .owner = THIS_MODULE,
 196 };
 197
 198 static const struct rockchip_pwm_data pwm_data_v1 = {
 199         .regs = {
 200                 .duty = 0x04,
 201                 .period = 0x08,
 202                 .cntr = 0x00,
 203                 .ctrl = 0x0c,
 204         },
 205         .prescaler = 2,
 206         .ops = &rockchip_pwm_ops_v1,
 207         .set_enable = rockchip_pwm_set_enable_v1,
 208 };
 209
 210 static const struct rockchip_pwm_data pwm_data_v2 = {
 211         .regs = {
 212                 .duty = 0x08,
 213                 .period = 0x04,
 214                 .cntr = 0x00,
 215                 .ctrl = 0x0c,
 216         },
 217         .prescaler = 1,
 218         .ops = &rockchip_pwm_ops_v2,
 219         .set_enable = rockchip_pwm_set_enable_v2,
 220 };
 221
 222 static const struct rockchip_pwm_data pwm_data_vop = {
 223         .regs = {
 224                 .duty = 0x08,
 225                 .period = 0x04,
 226                 .cntr = 0x0c,
 227                 .ctrl = 0x00,
 228         },
 229         .prescaler = 1,
 230         .ops = &rockchip_pwm_ops_v2,
 231         .set_enable = rockchip_pwm_set_enable_v2,
 232 };
 233
 234 static const struct of_device_id rockchip_pwm_dt_ids[] = {
 235         { .compatible = "rockchip,rk2928-pwm", .data = &pwm_data_v1},
 236         { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2},
 237         { .compatible = "rockchip,vop-pwm", .data = &pwm_data_vop},
 238         { .compatible = "rockchip,rk3399-pwm", .data = &pwm_data_v2},
 239         { /* sentinel */ }
 240 };
 241 MODULE_DEVICE_TABLE(of, rockchip_pwm_dt_ids);
 242
 243 static int rockchip_pwm_probe(struct platform_device *pdev)
 244 {
 245         const struct of_device_id *id;
 246         struct rockchip_pwm_chip *pc;
 247         struct resource *r;
 248         int ret;
 249
 250         id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev);
 251         if (!id)
 252                 return -EINVAL;
 253
 254         pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
 255         if (!pc)
 256                 return -ENOMEM;
 257
 258         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 259         pc->base = devm_ioremap(&pdev->dev, r->start,
 260                                 resource_size(r));
 261         if (IS_ERR(pc->base))
 262                 return PTR_ERR(pc->base);
 263
 264         pc->clk = devm_clk_get(&pdev->dev, NULL);
 265         if (IS_ERR(pc->clk))
 266                 return PTR_ERR(pc->clk);
 267
 268         ret = clk_prepare(pc->clk);
 269         if (ret)
 270                 return ret;
 271
 272         platform_set_drvdata(pdev, pc);
 273
 274         pc->data = id->data;
 275         pc->chip.dev = &pdev->dev;
 276         pc->chip.ops = pc->data->ops;
 277         pc->chip.base = -1;
 278         pc->chip.npwm = 1;
 279
 280         if (pc->data->ops->set_polarity) {
 281                 pc->chip.of_xlate = of_pwm_xlate_with_flags;
 282                 pc->chip.of_pwm_n_cells = 3;
 283         }
 284
 285         ret = pwmchip_add(&pc->chip);
 286         if (ret < 0) {
 287                 clk_unprepare(pc->clk);
 288                 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
 289         }
 290
 291         return ret;
 292 }
 293
 294 static int rockchip_pwm_remove(struct platform_device *pdev)
 295 {
 296         struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev);
 297
 298         clk_unprepare(pc->clk);
 299
 300         return pwmchip_remove(&pc->chip);
 301 }
 302
 303 static struct platform_driver rockchip_pwm_driver = {
 304         .driver = {
 305                 .name = "rockchip-pwm",
 306                 .of_match_table = rockchip_pwm_dt_ids,
 307         },
 308         .probe = rockchip_pwm_probe,
 309         .remove = rockchip_pwm_remove,
 310 };
 311 module_platform_driver(rockchip_pwm_driver);
 312
 313 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
 314 MODULE_DESCRIPTION("Rockchip SoC PWM driver");
 315 MODULE_LICENSE("GPL v2");