drivers/pwm/pwm-lpss.c

   1 /*
   2  * Intel Low Power Subsystem PWM controller driver
   3  *
   4  * Copyright (C) 2014, Intel Corporation
   5  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  * Author: Chew Kean Ho <kean.ho.chew@intel.com>
   7  * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
   8  * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
   9  * Author: Alan Cox <alan@linux.intel.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/io.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19
  20 #include "pwm-lpss.h"
  21
  22 #define PWM                             0x00000000
  23 #define PWM_ENABLE                      BIT(31)
  24 #define PWM_SW_UPDATE                   BIT(30)
  25 #define PWM_BASE_UNIT_SHIFT             8
  26 #define PWM_BASE_UNIT_MASK              0x00ffff00
  27 #define PWM_ON_TIME_DIV_MASK            0x000000ff
  28 #define PWM_DIVISION_CORRECTION         0x2
  29 #define PWM_LIMIT                       (0x8000 + PWM_DIVISION_CORRECTION)
  30 #define NSECS_PER_SEC                   1000000000UL
  31
  32 /* Size of each PWM register space if multiple */
  33 #define PWM_SIZE                        0x400
  34
  35 struct pwm_lpss_chip {
  36         struct pwm_chip chip;
  37         void __iomem *regs;
  38         unsigned long clk_rate;
  39 };
  40
  41 /* BayTrail */
  42 const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
  43         .clk_rate = 25000000,
  44         .npwm = 1,
  45 };
  46 EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
  47
  48 /* Braswell */
  49 const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
  50         .clk_rate = 19200000,
  51         .npwm = 1,
  52 };
  53 EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
  54
  55 /* Broxton */
  56 const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
  57         .clk_rate = 19200000,
  58         .npwm = 4,
  59 };
  60 EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
  61
  62 static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
  63 {
  64         return container_of(chip, struct pwm_lpss_chip, chip);
  65 }
  66
  67 static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
  68 {
  69         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
  70
  71         return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
  72 }
  73
  74 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
  75 {
  76         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
  77
  78         writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
  79 }
  80
  81 static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
  82                            int duty_ns, int period_ns)
  83 {
  84         struct pwm_lpss_chip *lpwm = to_lpwm(chip);
  85         u8 on_time_div;
  86         unsigned long c;
  87         unsigned long long base_unit, freq = NSECS_PER_SEC;
  88         u32 ctrl;
  89
  90         do_div(freq, period_ns);
  91
  92         /* The equation is: base_unit = ((freq / c) * 65536) + correction */
  93         base_unit = freq * 65536;
  94
  95         c = lpwm->clk_rate;
  96         if (!c)
  97                 return -EINVAL;
  98
  99         do_div(base_unit, c);
 100         base_unit += PWM_DIVISION_CORRECTION;
 101         if (base_unit > PWM_LIMIT)
 102                 return -EINVAL;
 103
 104         if (duty_ns <= 0)
 105                 duty_ns = 1;
 106         on_time_div = 255 - (255 * duty_ns / period_ns);
 107
 108         ctrl = pwm_lpss_read(pwm);
 109         ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
 110         ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
 111         ctrl |= on_time_div;
 112         /* request PWM to update on next cycle */
 113         ctrl |= PWM_SW_UPDATE;
 114         pwm_lpss_write(pwm, ctrl);
 115
 116         return 0;
 117 }
 118
 119 static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 120 {
 121         pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
 122         return 0;
 123 }
 124
 125 static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 126 {
 127         pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
 128 }
 129
 130 static const struct pwm_ops pwm_lpss_ops = {
 131         .free = pwm_lpss_disable,
 132         .config = pwm_lpss_config,
 133         .enable = pwm_lpss_enable,
 134         .disable = pwm_lpss_disable,
 135         .owner = THIS_MODULE,
 136 };
 137
 138 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
 139                                      const struct pwm_lpss_boardinfo *info)
 140 {
 141         struct pwm_lpss_chip *lpwm;
 142         int ret;
 143
 144         lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
 145         if (!lpwm)
 146                 return ERR_PTR(-ENOMEM);
 147
 148         lpwm->regs = devm_ioremap_resource(dev, r);
 149         if (IS_ERR(lpwm->regs))
 150                 return ERR_CAST(lpwm->regs);
 151
 152         lpwm->clk_rate = info->clk_rate;
 153         lpwm->chip.dev = dev;
 154         lpwm->chip.ops = &pwm_lpss_ops;
 155         lpwm->chip.base = -1;
 156         lpwm->chip.npwm = info->npwm;
 157
 158         ret = pwmchip_add(&lpwm->chip);
 159         if (ret) {
 160                 dev_err(dev, "failed to add PWM chip: %d\n", ret);
 161                 return ERR_PTR(ret);
 162         }
 163
 164         return lpwm;
 165 }
 166 EXPORT_SYMBOL_GPL(pwm_lpss_probe);
 167
 168 int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
 169 {
 170         return pwmchip_remove(&lpwm->chip);
 171 }
 172 EXPORT_SYMBOL_GPL(pwm_lpss_remove);
 173
 174 MODULE_DESCRIPTION("PWM driver for Intel LPSS");
 175 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
 176 MODULE_LICENSE("GPL v2");