drivers/pwm/pwm-lpss.c

   1 /*
   2  * Intel Low Power Subsystem PWM controller driver
   3  *
   4  * Copyright (C) 2014, Intel Corporation
   5  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  * Author: Chew Kean Ho <kean.ho.chew@intel.com>
   7  * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
   8  * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
   9  * Author: Alan Cox <alan@linux.intel.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/io.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19
  20 #include "pwm-lpss.h"
  21
  22 #define PWM                             0x00000000
  23 #define PWM_ENABLE                      BIT(31)
  24 #define PWM_SW_UPDATE                   BIT(30)
  25 #define PWM_BASE_UNIT_SHIFT             8
  26 #define PWM_BASE_UNIT_MASK              0x00ffff00
  27 #define PWM_ON_TIME_DIV_MASK            0x000000ff
  28 #define PWM_DIVISION_CORRECTION         0x2
  29 #define PWM_LIMIT                       (0x8000 + PWM_DIVISION_CORRECTION)
  30 #define NSECS_PER_SEC                   1000000000UL
  31
  32 /* Size of each PWM register space if multiple */
  33 #define PWM_SIZE                        0x400
  34
  35 struct pwm_lpss_chip {
  36         struct pwm_chip chip;
  37         void __iomem *regs;
  38         unsigned long clk_rate;
  39 };
  40
  41 /* BayTrail */
  42 const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
  43         .clk_rate = 25000000,
  44         .npwm = 1,
  45 };
  46 EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
  47
  48 /* Braswell */
  49 const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
  50         .clk_rate = 19200000,
  51         .npwm = 1,
  52 };
  53 EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
  54
  55 static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
  56 {
  57         return container_of(chip, struct pwm_lpss_chip, chip);
  58 }
  59
  60 static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
  61 {
  62         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
  63
  64         return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
  65 }
  66
  67 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
  68 {
  69         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
  70
  71         writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
  72 }
  73
  74 static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
  75                            int duty_ns, int period_ns)
  76 {
  77         struct pwm_lpss_chip *lpwm = to_lpwm(chip);
  78         u8 on_time_div;
  79         unsigned long c;
  80         unsigned long long base_unit, freq = NSECS_PER_SEC;
  81         u32 ctrl;
  82
  83         do_div(freq, period_ns);
  84
  85         /* The equation is: base_unit = ((freq / c) * 65536) + correction */
  86         base_unit = freq * 65536;
  87
  88         c = lpwm->clk_rate;
  89         if (!c)
  90                 return -EINVAL;
  91
  92         do_div(base_unit, c);
  93         base_unit += PWM_DIVISION_CORRECTION;
  94         if (base_unit > PWM_LIMIT)
  95                 return -EINVAL;
  96
  97         if (duty_ns <= 0)
  98                 duty_ns = 1;
  99         on_time_div = 255 - (255 * duty_ns / period_ns);
 100
 101         ctrl = pwm_lpss_read(pwm);
 102         ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
 103         ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
 104         ctrl |= on_time_div;
 105         /* request PWM to update on next cycle */
 106         ctrl |= PWM_SW_UPDATE;
 107         pwm_lpss_write(pwm, ctrl);
 108
 109         return 0;
 110 }
 111
 112 static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 113 {
 114         pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
 115         return 0;
 116 }
 117
 118 static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 119 {
 120         pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
 121 }
 122
 123 static const struct pwm_ops pwm_lpss_ops = {
 124         .free = pwm_lpss_disable,
 125         .config = pwm_lpss_config,
 126         .enable = pwm_lpss_enable,
 127         .disable = pwm_lpss_disable,
 128         .owner = THIS_MODULE,
 129 };
 130
 131 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
 132                                      const struct pwm_lpss_boardinfo *info)
 133 {
 134         struct pwm_lpss_chip *lpwm;
 135         int ret;
 136
 137         lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
 138         if (!lpwm)
 139                 return ERR_PTR(-ENOMEM);
 140
 141         lpwm->regs = devm_ioremap_resource(dev, r);
 142         if (IS_ERR(lpwm->regs))
 143                 return ERR_CAST(lpwm->regs);
 144
 145         lpwm->clk_rate = info->clk_rate;
 146         lpwm->chip.dev = dev;
 147         lpwm->chip.ops = &pwm_lpss_ops;
 148         lpwm->chip.base = -1;
 149         lpwm->chip.npwm = info->npwm;
 150
 151         ret = pwmchip_add(&lpwm->chip);
 152         if (ret) {
 153                 dev_err(dev, "failed to add PWM chip: %d\n", ret);
 154                 return ERR_PTR(ret);
 155         }
 156
 157         return lpwm;
 158 }
 159 EXPORT_SYMBOL_GPL(pwm_lpss_probe);
 160
 161 int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
 162 {
 163         return pwmchip_remove(&lpwm->chip);
 164 }
 165 EXPORT_SYMBOL_GPL(pwm_lpss_remove);
 166
 167 MODULE_DESCRIPTION("PWM driver for Intel LPSS");
 168 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
 169 MODULE_LICENSE("GPL v2");