drivers/pinctrl/sh-pfc/pfc-sh7372.c

   1 /*
   2  * sh7372 processor support - PFC hardware block
   3  *
   4  * Copyright (C) 2010  Kuninori Morimoto <morimoto.kuninori@renesas.com>
   5  *
   6  * Based on
   7  * sh7367 processor support - PFC hardware block
   8  * Copyright (C) 2010  Magnus Damm
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  22  */
  23 #include <linux/kernel.h>
  24 #include <mach/irqs.h>
  25 #include <mach/sh7372.h>
  26
  27 #include "sh_pfc.h"
  28
  29 #define CPU_ALL_PORT(fn, pfx, sfx) \
  30         PORT_10(fn, pfx, sfx),          PORT_90(fn, pfx, sfx), \
  31         PORT_10(fn, pfx##10, sfx),      PORT_10(fn, pfx##11, sfx), \
  32         PORT_10(fn, pfx##12, sfx),      PORT_10(fn, pfx##13, sfx), \
  33         PORT_10(fn, pfx##14, sfx),      PORT_10(fn, pfx##15, sfx), \
  34         PORT_10(fn, pfx##16, sfx),      PORT_10(fn, pfx##17, sfx), \
  35         PORT_10(fn, pfx##18, sfx),      PORT_1(fn, pfx##190, sfx)
  36
  37 enum {
  38         PINMUX_RESERVED = 0,
  39
  40         /* PORT0_DATA -> PORT190_DATA */
  41         PINMUX_DATA_BEGIN,
  42         PORT_ALL(DATA),
  43         PINMUX_DATA_END,
  44
  45         /* PORT0_IN -> PORT190_IN */
  46         PINMUX_INPUT_BEGIN,
  47         PORT_ALL(IN),
  48         PINMUX_INPUT_END,
  49
  50         /* PORT0_IN_PU -> PORT190_IN_PU */
  51         PINMUX_INPUT_PULLUP_BEGIN,
  52         PORT_ALL(IN_PU),
  53         PINMUX_INPUT_PULLUP_END,
  54
  55         /* PORT0_IN_PD -> PORT190_IN_PD */
  56         PINMUX_INPUT_PULLDOWN_BEGIN,
  57         PORT_ALL(IN_PD),
  58         PINMUX_INPUT_PULLDOWN_END,
  59
  60         /* PORT0_OUT -> PORT190_OUT */
  61         PINMUX_OUTPUT_BEGIN,
  62         PORT_ALL(OUT),
  63         PINMUX_OUTPUT_END,
  64
  65         PINMUX_FUNCTION_BEGIN,
  66         PORT_ALL(FN_IN),        /* PORT0_FN_IN  -> PORT190_FN_IN */
  67         PORT_ALL(FN_OUT),       /* PORT0_FN_OUT -> PORT190_FN_OUT */
  68         PORT_ALL(FN0),          /* PORT0_FN0    -> PORT190_FN0 */
  69         PORT_ALL(FN1),          /* PORT0_FN1    -> PORT190_FN1 */
  70         PORT_ALL(FN2),          /* PORT0_FN2    -> PORT190_FN2 */
  71         PORT_ALL(FN3),          /* PORT0_FN3    -> PORT190_FN3 */
  72         PORT_ALL(FN4),          /* PORT0_FN4    -> PORT190_FN4 */
  73         PORT_ALL(FN5),          /* PORT0_FN5    -> PORT190_FN5 */
  74         PORT_ALL(FN6),          /* PORT0_FN6    -> PORT190_FN6 */
  75         PORT_ALL(FN7),          /* PORT0_FN7    -> PORT190_FN7 */
  76
  77         MSEL1CR_31_0,   MSEL1CR_31_1,
  78         MSEL1CR_30_0,   MSEL1CR_30_1,
  79         MSEL1CR_29_0,   MSEL1CR_29_1,
  80         MSEL1CR_28_0,   MSEL1CR_28_1,
  81         MSEL1CR_27_0,   MSEL1CR_27_1,
  82         MSEL1CR_26_0,   MSEL1CR_26_1,
  83         MSEL1CR_16_0,   MSEL1CR_16_1,
  84         MSEL1CR_15_0,   MSEL1CR_15_1,
  85         MSEL1CR_14_0,   MSEL1CR_14_1,
  86         MSEL1CR_13_0,   MSEL1CR_13_1,
  87         MSEL1CR_12_0,   MSEL1CR_12_1,
  88         MSEL1CR_9_0,    MSEL1CR_9_1,
  89         MSEL1CR_8_0,    MSEL1CR_8_1,
  90         MSEL1CR_7_0,    MSEL1CR_7_1,
  91         MSEL1CR_6_0,    MSEL1CR_6_1,
  92         MSEL1CR_4_0,    MSEL1CR_4_1,
  93         MSEL1CR_3_0,    MSEL1CR_3_1,
  94         MSEL1CR_2_0,    MSEL1CR_2_1,
  95         MSEL1CR_0_0,    MSEL1CR_0_1,
  96
  97         MSEL3CR_27_0,   MSEL3CR_27_1,
  98         MSEL3CR_26_0,   MSEL3CR_26_1,
  99         MSEL3CR_21_0,   MSEL3CR_21_1,
 100         MSEL3CR_20_0,   MSEL3CR_20_1,
 101         MSEL3CR_15_0,   MSEL3CR_15_1,
 102         MSEL3CR_9_0,    MSEL3CR_9_1,
 103         MSEL3CR_6_0,    MSEL3CR_6_1,
 104
 105         MSEL4CR_19_0,   MSEL4CR_19_1,
 106         MSEL4CR_18_0,   MSEL4CR_18_1,
 107         MSEL4CR_17_0,   MSEL4CR_17_1,
 108         MSEL4CR_16_0,   MSEL4CR_16_1,
 109         MSEL4CR_15_0,   MSEL4CR_15_1,
 110         MSEL4CR_14_0,   MSEL4CR_14_1,
 111         MSEL4CR_10_0,   MSEL4CR_10_1,
 112         MSEL4CR_6_0,    MSEL4CR_6_1,
 113         MSEL4CR_4_0,    MSEL4CR_4_1,
 114         MSEL4CR_1_0,    MSEL4CR_1_1,
 115         PINMUX_FUNCTION_END,
 116
 117         PINMUX_MARK_BEGIN,
 118
 119         /* IRQ */
 120         IRQ0_6_MARK,    IRQ0_162_MARK,  IRQ1_MARK,      IRQ2_4_MARK,
 121         IRQ2_5_MARK,    IRQ3_8_MARK,    IRQ3_16_MARK,   IRQ4_17_MARK,
 122         IRQ4_163_MARK,  IRQ5_MARK,      IRQ6_39_MARK,   IRQ6_164_MARK,
 123         IRQ7_40_MARK,   IRQ7_167_MARK,  IRQ8_41_MARK,   IRQ8_168_MARK,
 124         IRQ9_42_MARK,   IRQ9_169_MARK,  IRQ10_MARK,     IRQ11_MARK,
 125         IRQ12_80_MARK,  IRQ12_137_MARK, IRQ13_81_MARK,  IRQ13_145_MARK,
 126         IRQ14_82_MARK,  IRQ14_146_MARK, IRQ15_83_MARK,  IRQ15_147_MARK,
 127         IRQ16_84_MARK,  IRQ16_170_MARK, IRQ17_MARK,     IRQ18_MARK,
 128         IRQ19_MARK,     IRQ20_MARK,     IRQ21_MARK,     IRQ22_MARK,
 129         IRQ23_MARK,     IRQ24_MARK,     IRQ25_MARK,     IRQ26_121_MARK,
 130         IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
 131         IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
 132         IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
 133
 134         /* MSIOF0 */
 135         MSIOF0_TSYNC_MARK,      MSIOF0_TSCK_MARK,       MSIOF0_RXD_MARK,
 136         MSIOF0_RSCK_MARK,       MSIOF0_RSYNC_MARK,      MSIOF0_MCK0_MARK,
 137         MSIOF0_MCK1_MARK,       MSIOF0_SS1_MARK,        MSIOF0_SS2_MARK,
 138         MSIOF0_TXD_MARK,
 139
 140         /* MSIOF1 */
 141         MSIOF1_TSCK_39_MARK,    MSIOF1_TSYNC_40_MARK,
 142         MSIOF1_TSCK_88_MARK,    MSIOF1_TSYNC_89_MARK,
 143         MSIOF1_TXD_41_MARK,     MSIOF1_RXD_42_MARK,
 144         MSIOF1_TXD_90_MARK,     MSIOF1_RXD_91_MARK,
 145         MSIOF1_SS1_43_MARK,     MSIOF1_SS2_44_MARK,
 146         MSIOF1_SS1_92_MARK,     MSIOF1_SS2_93_MARK,
 147         MSIOF1_RSCK_MARK,       MSIOF1_RSYNC_MARK,
 148         MSIOF1_MCK0_MARK,       MSIOF1_MCK1_MARK,
 149
 150         /* MSIOF2 */
 151         MSIOF2_RSCK_MARK,       MSIOF2_RSYNC_MARK,      MSIOF2_MCK0_MARK,
 152         MSIOF2_MCK1_MARK,       MSIOF2_SS1_MARK,        MSIOF2_SS2_MARK,
 153         MSIOF2_TSYNC_MARK,      MSIOF2_TSCK_MARK,       MSIOF2_RXD_MARK,
 154         MSIOF2_TXD_MARK,
 155
 156         /* BBIF1 */
 157         BBIF1_RXD_MARK,         BBIF1_TSYNC_MARK,       BBIF1_TSCK_MARK,
 158         BBIF1_TXD_MARK,         BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
 159         BBIF1_FLOW_MARK,        BB_RX_FLOW_N_MARK,
 160
 161         /* BBIF2 */
 162         BBIF2_TSCK1_MARK,       BBIF2_TSYNC1_MARK,
 163         BBIF2_TXD1_MARK,        BBIF2_RXD_MARK,
 164
 165         /* FSI */
 166         FSIACK_MARK,    FSIBCK_MARK,            FSIAILR_MARK,   FSIAIBT_MARK,
 167         FSIAISLD_MARK,  FSIAOMC_MARK,           FSIAOLR_MARK,   FSIAOBT_MARK,
 168         FSIAOSLD_MARK,  FSIASPDIF_11_MARK,      FSIASPDIF_15_MARK,
 169
 170         /* FMSI */
 171         FMSOCK_MARK,    FMSOOLR_MARK,   FMSIOLR_MARK,   FMSOOBT_MARK,
 172         FMSIOBT_MARK,   FMSOSLD_MARK,   FMSOILR_MARK,   FMSIILR_MARK,
 173         FMSOIBT_MARK,   FMSIIBT_MARK,   FMSISLD_MARK,   FMSICK_MARK,
 174
 175         /* SCIFA0 */
 176         SCIFA0_TXD_MARK,        SCIFA0_RXD_MARK,        SCIFA0_SCK_MARK,
 177         SCIFA0_RTS_MARK,        SCIFA0_CTS_MARK,
 178
 179         /* SCIFA1 */
 180         SCIFA1_TXD_MARK,        SCIFA1_RXD_MARK,        SCIFA1_SCK_MARK,
 181         SCIFA1_RTS_MARK,        SCIFA1_CTS_MARK,
 182
 183         /* SCIFA2 */
 184         SCIFA2_CTS1_MARK,       SCIFA2_RTS1_MARK,       SCIFA2_TXD1_MARK,
 185         SCIFA2_RXD1_MARK,       SCIFA2_SCK1_MARK,
 186
 187         /* SCIFA3 */
 188         SCIFA3_CTS_43_MARK,     SCIFA3_CTS_140_MARK,    SCIFA3_RTS_44_MARK,
 189         SCIFA3_RTS_141_MARK,    SCIFA3_SCK_MARK,        SCIFA3_TXD_MARK,
 190         SCIFA3_RXD_MARK,
 191
 192         /* SCIFA4 */
 193         SCIFA4_RXD_MARK,        SCIFA4_TXD_MARK,
 194
 195         /* SCIFA5 */
 196         SCIFA5_RXD_MARK,        SCIFA5_TXD_MARK,
 197
 198         /* SCIFB */
 199         SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
 200         SCIFB_TXD_MARK, SCIFB_RXD_MARK,
 201
 202         /* CEU */
 203         VIO_HD_MARK,    VIO_CKO1_MARK,  VIO_CKO2_MARK,  VIO_VD_MARK,
 204         VIO_CLK_MARK,   VIO_FIELD_MARK, VIO_CKO_MARK,
 205         VIO_D0_MARK,    VIO_D1_MARK,    VIO_D2_MARK,    VIO_D3_MARK,
 206         VIO_D4_MARK,    VIO_D5_MARK,    VIO_D6_MARK,    VIO_D7_MARK,
 207         VIO_D8_MARK,    VIO_D9_MARK,    VIO_D10_MARK,   VIO_D11_MARK,
 208         VIO_D12_MARK,   VIO_D13_MARK,   VIO_D14_MARK,   VIO_D15_MARK,
 209
 210         /* USB0 */
 211         IDIN_0_MARK,    EXTLP_0_MARK,   OVCN2_0_MARK,   PWEN_0_MARK,
 212         OVCN_0_MARK,    VBUS0_0_MARK,
 213
 214         /* USB1 */
 215         IDIN_1_18_MARK,         IDIN_1_113_MARK,
 216         PWEN_1_115_MARK,        PWEN_1_138_MARK,
 217         OVCN_1_114_MARK,        OVCN_1_162_MARK,
 218         EXTLP_1_MARK,           OVCN2_1_MARK,
 219         VBUS0_1_MARK,
 220
 221         /* GPIO */
 222         GPI0_MARK,      GPI1_MARK,      GPO0_MARK,      GPO1_MARK,
 223
 224         /* BSC */
 225         BS_MARK,        WE1_MARK,
 226         CKO_MARK,       WAIT_MARK,      RDWR_MARK,
 227
 228         A0_MARK,        A1_MARK,        A2_MARK,        A3_MARK,
 229         A6_MARK,        A7_MARK,        A8_MARK,        A9_MARK,
 230         A10_MARK,       A11_MARK,       A12_MARK,       A13_MARK,
 231         A14_MARK,       A15_MARK,       A16_MARK,       A17_MARK,
 232         A18_MARK,       A19_MARK,       A20_MARK,       A21_MARK,
 233         A22_MARK,       A23_MARK,       A24_MARK,       A25_MARK,
 234         A26_MARK,
 235
 236         CS0_MARK,       CS2_MARK,       CS4_MARK,
 237         CS5A_MARK,      CS5B_MARK,      CS6A_MARK,
 238
 239         /* BSC/FLCTL */
 240         RD_FSC_MARK,    WE0_FWE_MARK,   A4_FOE_MARK,    A5_FCDE_MARK,
 241         D0_NAF0_MARK,   D1_NAF1_MARK,   D2_NAF2_MARK,   D3_NAF3_MARK,
 242         D4_NAF4_MARK,   D5_NAF5_MARK,   D6_NAF6_MARK,   D7_NAF7_MARK,
 243         D8_NAF8_MARK,   D9_NAF9_MARK,   D10_NAF10_MARK, D11_NAF11_MARK,
 244         D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
 245
 246         /* MMCIF(1) */
 247         MMCD0_0_MARK,   MMCD0_1_MARK,   MMCD0_2_MARK,   MMCD0_3_MARK,
 248         MMCD0_4_MARK,   MMCD0_5_MARK,   MMCD0_6_MARK,   MMCD0_7_MARK,
 249         MMCCMD0_MARK,   MMCCLK0_MARK,
 250
 251         /* MMCIF(2) */
 252         MMCD1_0_MARK,   MMCD1_1_MARK,   MMCD1_2_MARK,   MMCD1_3_MARK,
 253         MMCD1_4_MARK,   MMCD1_5_MARK,   MMCD1_6_MARK,   MMCD1_7_MARK,
 254         MMCCLK1_MARK,   MMCCMD1_MARK,
 255
 256         /* SPU2 */
 257         VINT_I_MARK,
 258
 259         /* FLCTL */
 260         FCE1_MARK,      FCE0_MARK,      FRB_MARK,
 261
 262         /* HSI */
 263         GP_RX_FLAG_MARK,        GP_RX_DATA_MARK,        GP_TX_READY_MARK,
 264         GP_RX_WAKE_MARK,        MP_TX_FLAG_MARK,        MP_TX_DATA_MARK,
 265         MP_RX_READY_MARK,       MP_TX_WAKE_MARK,
 266
 267         /* MFI */
 268         MFIv6_MARK,
 269         MFIv4_MARK,
 270
 271         MEMC_CS0_MARK,                  MEMC_BUSCLK_MEMC_A0_MARK,
 272         MEMC_CS1_MEMC_A1_MARK,          MEMC_ADV_MEMC_DREQ0_MARK,
 273         MEMC_WAIT_MEMC_DREQ1_MARK,      MEMC_NOE_MARK,
 274         MEMC_NWE_MARK,                  MEMC_INT_MARK,
 275
 276         MEMC_AD0_MARK,  MEMC_AD1_MARK,  MEMC_AD2_MARK,
 277         MEMC_AD3_MARK,  MEMC_AD4_MARK,  MEMC_AD5_MARK,
 278         MEMC_AD6_MARK,  MEMC_AD7_MARK,  MEMC_AD8_MARK,
 279         MEMC_AD9_MARK,  MEMC_AD10_MARK, MEMC_AD11_MARK,
 280         MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
 281         MEMC_AD15_MARK,
 282
 283         /* SIM */
 284         SIM_RST_MARK,   SIM_CLK_MARK,   SIM_D_MARK,
 285
 286         /* TPU */
 287         TPU0TO0_MARK,           TPU0TO1_MARK,
 288         TPU0TO2_93_MARK,        TPU0TO2_99_MARK,
 289         TPU0TO3_MARK,
 290
 291         /* I2C2 */
 292         I2C_SCL2_MARK,  I2C_SDA2_MARK,
 293
 294         /* I2C3(1) */
 295         I2C_SCL3_MARK,  I2C_SDA3_MARK,
 296
 297         /* I2C3(2) */
 298         I2C_SCL3S_MARK, I2C_SDA3S_MARK,
 299
 300         /* I2C4(2) */
 301         I2C_SCL4_MARK,  I2C_SDA4_MARK,
 302
 303         /* I2C4(2) */
 304         I2C_SCL4S_MARK, I2C_SDA4S_MARK,
 305
 306         /* KEYSC */
 307         KEYOUT0_MARK,   KEYIN0_121_MARK,        KEYIN0_136_MARK,
 308         KEYOUT1_MARK,   KEYIN1_122_MARK,        KEYIN1_135_MARK,
 309         KEYOUT2_MARK,   KEYIN2_123_MARK,        KEYIN2_134_MARK,
 310         KEYOUT3_MARK,   KEYIN3_124_MARK,        KEYIN3_133_MARK,
 311         KEYOUT4_MARK,   KEYIN4_MARK,
 312         KEYOUT5_MARK,   KEYIN5_MARK,
 313         KEYOUT6_MARK,   KEYIN6_MARK,
 314         KEYOUT7_MARK,   KEYIN7_MARK,
 315
 316         /* LCDC */
 317         LCDC0_SELECT_MARK,
 318         LCDC1_SELECT_MARK,
 319         LCDHSYN_MARK,   LCDCS_MARK,     LCDVSYN_MARK,   LCDDCK_MARK,
 320         LCDWR_MARK,     LCDRD_MARK,     LCDDISP_MARK,   LCDRS_MARK,
 321         LCDLCLK_MARK,   LCDDON_MARK,
 322
 323         LCDD0_MARK,     LCDD1_MARK,     LCDD2_MARK,     LCDD3_MARK,
 324         LCDD4_MARK,     LCDD5_MARK,     LCDD6_MARK,     LCDD7_MARK,
 325         LCDD8_MARK,     LCDD9_MARK,     LCDD10_MARK,    LCDD11_MARK,
 326         LCDD12_MARK,    LCDD13_MARK,    LCDD14_MARK,    LCDD15_MARK,
 327         LCDD16_MARK,    LCDD17_MARK,    LCDD18_MARK,    LCDD19_MARK,
 328         LCDD20_MARK,    LCDD21_MARK,    LCDD22_MARK,    LCDD23_MARK,
 329
 330         /* IRDA */
 331         IRDA_OUT_MARK,  IRDA_IN_MARK,   IRDA_FIRSEL_MARK,
 332         IROUT_139_MARK, IROUT_140_MARK,
 333
 334         /* TSIF1 */
 335         TS0_1SELECT_MARK,
 336         TS0_2SELECT_MARK,
 337         TS1_1SELECT_MARK,
 338         TS1_2SELECT_MARK,
 339
 340         TS_SPSYNC1_MARK,        TS_SDAT1_MARK,
 341         TS_SDEN1_MARK,          TS_SCK1_MARK,
 342
 343         /* TSIF2 */
 344         TS_SPSYNC2_MARK,        TS_SDAT2_MARK,
 345         TS_SDEN2_MARK,          TS_SCK2_MARK,
 346
 347         /* HDMI */
 348         HDMI_HPD_MARK,  HDMI_CEC_MARK,
 349
 350         /* SDHI0 */
 351         SDHICLK0_MARK,  SDHICD0_MARK,
 352         SDHICMD0_MARK,  SDHIWP0_MARK,
 353         SDHID0_0_MARK,  SDHID0_1_MARK,
 354         SDHID0_2_MARK,  SDHID0_3_MARK,
 355
 356         /* SDHI1 */
 357         SDHICLK1_MARK,  SDHICMD1_MARK,  SDHID1_0_MARK,
 358         SDHID1_1_MARK,  SDHID1_2_MARK,  SDHID1_3_MARK,
 359
 360         /* SDHI2 */
 361         SDHICLK2_MARK,  SDHICMD2_MARK,  SDHID2_0_MARK,
 362         SDHID2_1_MARK,  SDHID2_2_MARK,  SDHID2_3_MARK,
 363
 364         /* SDENC */
 365         SDENC_CPG_MARK,
 366         SDENC_DV_CLKI_MARK,
 367
 368         PINMUX_MARK_END,
 369 };
 370
 371 static const pinmux_enum_t pinmux_data[] = {
 372
 373         /* specify valid pin states for each pin in GPIO mode */
 374         PORT_DATA_IO_PD(0),             PORT_DATA_IO_PD(1),
 375         PORT_DATA_O(2),                 PORT_DATA_I_PD(3),
 376         PORT_DATA_I_PD(4),              PORT_DATA_I_PD(5),
 377         PORT_DATA_IO_PU_PD(6),          PORT_DATA_I_PD(7),
 378         PORT_DATA_IO_PD(8),             PORT_DATA_O(9),
 379
 380         PORT_DATA_O(10),                PORT_DATA_O(11),
 381         PORT_DATA_IO_PU_PD(12),         PORT_DATA_IO_PD(13),
 382         PORT_DATA_IO_PD(14),            PORT_DATA_O(15),
 383         PORT_DATA_IO_PD(16),            PORT_DATA_IO_PD(17),
 384         PORT_DATA_I_PD(18),             PORT_DATA_IO(19),
 385
 386         PORT_DATA_IO(20),               PORT_DATA_IO(21),
 387         PORT_DATA_IO(22),               PORT_DATA_IO(23),
 388         PORT_DATA_IO(24),               PORT_DATA_IO(25),
 389         PORT_DATA_IO(26),               PORT_DATA_IO(27),
 390         PORT_DATA_IO(28),               PORT_DATA_IO(29),
 391
 392         PORT_DATA_IO(30),               PORT_DATA_IO(31),
 393         PORT_DATA_IO(32),               PORT_DATA_IO(33),
 394         PORT_DATA_IO(34),               PORT_DATA_IO(35),
 395         PORT_DATA_IO(36),               PORT_DATA_IO(37),
 396         PORT_DATA_IO(38),               PORT_DATA_IO(39),
 397
 398         PORT_DATA_IO(40),               PORT_DATA_IO(41),
 399         PORT_DATA_IO(42),               PORT_DATA_IO(43),
 400         PORT_DATA_IO(44),               PORT_DATA_IO(45),
 401         PORT_DATA_IO_PU(46),            PORT_DATA_IO_PU(47),
 402         PORT_DATA_IO_PU(48),            PORT_DATA_IO_PU(49),
 403
 404         PORT_DATA_IO_PU(50),            PORT_DATA_IO_PU(51),
 405         PORT_DATA_IO_PU(52),            PORT_DATA_IO_PU(53),
 406         PORT_DATA_IO_PU(54),            PORT_DATA_IO_PU(55),
 407         PORT_DATA_IO_PU(56),            PORT_DATA_IO_PU(57),
 408         PORT_DATA_IO_PU(58),            PORT_DATA_IO_PU(59),
 409
 410         PORT_DATA_IO_PU(60),            PORT_DATA_IO_PU(61),
 411         PORT_DATA_IO(62),               PORT_DATA_O(63),
 412         PORT_DATA_O(64),                PORT_DATA_IO_PU(65),
 413         PORT_DATA_O(66),                PORT_DATA_IO_PU(67),  /*66?*/
 414         PORT_DATA_O(68),                PORT_DATA_IO(69),
 415
 416         PORT_DATA_IO(70),               PORT_DATA_IO(71),
 417         PORT_DATA_O(72),                PORT_DATA_I_PU(73),
 418         PORT_DATA_I_PU_PD(74),          PORT_DATA_IO_PU_PD(75),
 419         PORT_DATA_IO_PU_PD(76),         PORT_DATA_IO_PU_PD(77),
 420         PORT_DATA_IO_PU_PD(78),         PORT_DATA_IO_PU_PD(79),
 421
 422         PORT_DATA_IO_PU_PD(80),         PORT_DATA_IO_PU_PD(81),
 423         PORT_DATA_IO_PU_PD(82),         PORT_DATA_IO_PU_PD(83),
 424         PORT_DATA_IO_PU_PD(84),         PORT_DATA_IO_PU_PD(85),
 425         PORT_DATA_IO_PU_PD(86),         PORT_DATA_IO_PU_PD(87),
 426         PORT_DATA_IO_PU_PD(88),         PORT_DATA_IO_PU_PD(89),
 427
 428         PORT_DATA_IO_PU_PD(90),         PORT_DATA_IO_PU_PD(91),
 429         PORT_DATA_IO_PU_PD(92),         PORT_DATA_IO_PU_PD(93),
 430         PORT_DATA_IO_PU_PD(94),         PORT_DATA_IO_PU_PD(95),
 431         PORT_DATA_IO_PU(96),            PORT_DATA_IO_PU_PD(97),
 432         PORT_DATA_IO_PU_PD(98),         PORT_DATA_O(99), /*99?*/
 433
 434         PORT_DATA_IO_PD(100),           PORT_DATA_IO_PD(101),
 435         PORT_DATA_IO_PD(102),           PORT_DATA_IO_PD(103),
 436         PORT_DATA_IO_PD(104),           PORT_DATA_IO_PD(105),
 437         PORT_DATA_IO_PU(106),           PORT_DATA_IO_PU(107),
 438         PORT_DATA_IO_PU(108),           PORT_DATA_IO_PU(109),
 439
 440         PORT_DATA_IO_PU(110),           PORT_DATA_IO_PU(111),
 441         PORT_DATA_IO_PD(112),           PORT_DATA_IO_PD(113),
 442         PORT_DATA_IO_PU(114),           PORT_DATA_IO_PU(115),
 443         PORT_DATA_IO_PU(116),           PORT_DATA_IO_PU(117),
 444         PORT_DATA_IO_PU(118),           PORT_DATA_IO_PU(119),
 445
 446         PORT_DATA_IO_PU(120),           PORT_DATA_IO_PD(121),
 447         PORT_DATA_IO_PD(122),           PORT_DATA_IO_PD(123),
 448         PORT_DATA_IO_PD(124),           PORT_DATA_IO_PD(125),
 449         PORT_DATA_IO_PD(126),           PORT_DATA_IO_PD(127),
 450         PORT_DATA_IO_PD(128),           PORT_DATA_IO_PU_PD(129),
 451
 452         PORT_DATA_IO_PU_PD(130),        PORT_DATA_IO_PU_PD(131),
 453         PORT_DATA_IO_PU_PD(132),        PORT_DATA_IO_PU_PD(133),
 454         PORT_DATA_IO_PU_PD(134),        PORT_DATA_IO_PU_PD(135),
 455         PORT_DATA_IO_PD(136),           PORT_DATA_IO_PD(137),
 456         PORT_DATA_IO_PD(138),           PORT_DATA_IO_PD(139),
 457
 458         PORT_DATA_IO_PD(140),           PORT_DATA_IO_PD(141),
 459         PORT_DATA_IO_PD(142),           PORT_DATA_IO_PU_PD(143),
 460         PORT_DATA_IO_PD(144),           PORT_DATA_IO_PD(145),
 461         PORT_DATA_IO_PD(146),           PORT_DATA_IO_PD(147),
 462         PORT_DATA_IO_PD(148),           PORT_DATA_IO_PD(149),
 463
 464         PORT_DATA_IO_PD(150),           PORT_DATA_IO_PD(151),
 465         PORT_DATA_IO_PU_PD(152),        PORT_DATA_I_PD(153),
 466         PORT_DATA_IO_PU_PD(154),        PORT_DATA_I_PD(155),
 467         PORT_DATA_IO_PD(156),           PORT_DATA_IO_PD(157),
 468         PORT_DATA_I_PD(158),            PORT_DATA_IO_PD(159),
 469
 470         PORT_DATA_O(160),               PORT_DATA_IO_PD(161),
 471         PORT_DATA_IO_PD(162),           PORT_DATA_IO_PD(163),
 472         PORT_DATA_I_PD(164),            PORT_DATA_IO_PD(165),
 473         PORT_DATA_I_PD(166),            PORT_DATA_I_PD(167),
 474         PORT_DATA_I_PD(168),            PORT_DATA_I_PD(169),
 475
 476         PORT_DATA_I_PD(170),            PORT_DATA_O(171),
 477         PORT_DATA_IO_PU_PD(172),        PORT_DATA_IO_PU_PD(173),
 478         PORT_DATA_IO_PU_PD(174),        PORT_DATA_IO_PU_PD(175),
 479         PORT_DATA_IO_PU_PD(176),        PORT_DATA_IO_PU_PD(177),
 480         PORT_DATA_IO_PU_PD(178),        PORT_DATA_O(179),
 481
 482         PORT_DATA_IO_PU_PD(180),        PORT_DATA_IO_PU_PD(181),
 483         PORT_DATA_IO_PU_PD(182),        PORT_DATA_IO_PU_PD(183),
 484         PORT_DATA_IO_PU_PD(184),        PORT_DATA_O(185),
 485         PORT_DATA_IO_PU_PD(186),        PORT_DATA_IO_PU_PD(187),
 486         PORT_DATA_IO_PU_PD(188),        PORT_DATA_IO_PU_PD(189),
 487
 488         PORT_DATA_IO_PU_PD(190),
 489
 490         /* IRQ */
 491         PINMUX_DATA(IRQ0_6_MARK,        PORT6_FN0,      MSEL1CR_0_0),
 492         PINMUX_DATA(IRQ0_162_MARK,      PORT162_FN0,    MSEL1CR_0_1),
 493         PINMUX_DATA(IRQ1_MARK,          PORT12_FN0),
 494         PINMUX_DATA(IRQ2_4_MARK,        PORT4_FN0,      MSEL1CR_2_0),
 495         PINMUX_DATA(IRQ2_5_MARK,        PORT5_FN0,      MSEL1CR_2_1),
 496         PINMUX_DATA(IRQ3_8_MARK,        PORT8_FN0,      MSEL1CR_3_0),
 497         PINMUX_DATA(IRQ3_16_MARK,       PORT16_FN0,     MSEL1CR_3_1),
 498         PINMUX_DATA(IRQ4_17_MARK,       PORT17_FN0,     MSEL1CR_4_0),
 499         PINMUX_DATA(IRQ4_163_MARK,      PORT163_FN0,    MSEL1CR_4_1),
 500         PINMUX_DATA(IRQ5_MARK,          PORT18_FN0),
 501         PINMUX_DATA(IRQ6_39_MARK,       PORT39_FN0,     MSEL1CR_6_0),
 502         PINMUX_DATA(IRQ6_164_MARK,      PORT164_FN0,    MSEL1CR_6_1),
 503         PINMUX_DATA(IRQ7_40_MARK,       PORT40_FN0,     MSEL1CR_7_1),
 504         PINMUX_DATA(IRQ7_167_MARK,      PORT167_FN0,    MSEL1CR_7_0),
 505         PINMUX_DATA(IRQ8_41_MARK,       PORT41_FN0,     MSEL1CR_8_1),
 506         PINMUX_DATA(IRQ8_168_MARK,      PORT168_FN0,    MSEL1CR_8_0),
 507         PINMUX_DATA(IRQ9_42_MARK,       PORT42_FN0,     MSEL1CR_9_0),
 508         PINMUX_DATA(IRQ9_169_MARK,      PORT169_FN0,    MSEL1CR_9_1),
 509         PINMUX_DATA(IRQ10_MARK,         PORT65_FN0,     MSEL1CR_9_1),
 510         PINMUX_DATA(IRQ11_MARK,         PORT67_FN0),
 511         PINMUX_DATA(IRQ12_80_MARK,      PORT80_FN0,     MSEL1CR_12_0),
 512         PINMUX_DATA(IRQ12_137_MARK,     PORT137_FN0,    MSEL1CR_12_1),
 513         PINMUX_DATA(IRQ13_81_MARK,      PORT81_FN0,     MSEL1CR_13_0),
 514         PINMUX_DATA(IRQ13_145_MARK,     PORT145_FN0,    MSEL1CR_13_1),
 515         PINMUX_DATA(IRQ14_82_MARK,      PORT82_FN0,     MSEL1CR_14_0),
 516         PINMUX_DATA(IRQ14_146_MARK,     PORT146_FN0,    MSEL1CR_14_1),
 517         PINMUX_DATA(IRQ15_83_MARK,      PORT83_FN0,     MSEL1CR_15_0),
 518         PINMUX_DATA(IRQ15_147_MARK,     PORT147_FN0,    MSEL1CR_15_1),
 519         PINMUX_DATA(IRQ16_84_MARK,      PORT84_FN0,     MSEL1CR_16_0),
 520         PINMUX_DATA(IRQ16_170_MARK,     PORT170_FN0,    MSEL1CR_16_1),
 521         PINMUX_DATA(IRQ17_MARK,         PORT85_FN0),
 522         PINMUX_DATA(IRQ18_MARK,         PORT86_FN0),
 523         PINMUX_DATA(IRQ19_MARK,         PORT87_FN0),
 524         PINMUX_DATA(IRQ20_MARK,         PORT92_FN0),
 525         PINMUX_DATA(IRQ21_MARK,         PORT93_FN0),
 526         PINMUX_DATA(IRQ22_MARK,         PORT94_FN0),
 527         PINMUX_DATA(IRQ23_MARK,         PORT95_FN0),
 528         PINMUX_DATA(IRQ24_MARK,         PORT112_FN0),
 529         PINMUX_DATA(IRQ25_MARK,         PORT119_FN0),
 530         PINMUX_DATA(IRQ26_121_MARK,     PORT121_FN0,    MSEL1CR_26_1),
 531         PINMUX_DATA(IRQ26_172_MARK,     PORT172_FN0,    MSEL1CR_26_0),
 532         PINMUX_DATA(IRQ27_122_MARK,     PORT122_FN0,    MSEL1CR_27_1),
 533         PINMUX_DATA(IRQ27_180_MARK,     PORT180_FN0,    MSEL1CR_27_0),
 534         PINMUX_DATA(IRQ28_123_MARK,     PORT123_FN0,    MSEL1CR_28_1),
 535         PINMUX_DATA(IRQ28_181_MARK,     PORT181_FN0,    MSEL1CR_28_0),
 536         PINMUX_DATA(IRQ29_129_MARK,     PORT129_FN0,    MSEL1CR_29_1),
 537         PINMUX_DATA(IRQ29_182_MARK,     PORT182_FN0,    MSEL1CR_29_0),
 538         PINMUX_DATA(IRQ30_130_MARK,     PORT130_FN0,    MSEL1CR_30_1),
 539         PINMUX_DATA(IRQ30_183_MARK,     PORT183_FN0,    MSEL1CR_30_0),
 540         PINMUX_DATA(IRQ31_138_MARK,     PORT138_FN0,    MSEL1CR_31_1),
 541         PINMUX_DATA(IRQ31_184_MARK,     PORT184_FN0,    MSEL1CR_31_0),
 542
 543         /* Function 1 */
 544         PINMUX_DATA(BBIF2_TSCK1_MARK,           PORT0_FN1),
 545         PINMUX_DATA(BBIF2_TSYNC1_MARK,          PORT1_FN1),
 546         PINMUX_DATA(BBIF2_TXD1_MARK,            PORT2_FN1),
 547         PINMUX_DATA(BBIF2_RXD_MARK,             PORT3_FN1),
 548         PINMUX_DATA(FSIACK_MARK,                PORT4_FN1),
 549         PINMUX_DATA(FSIAILR_MARK,               PORT5_FN1),
 550         PINMUX_DATA(FSIAIBT_MARK,               PORT6_FN1),
 551         PINMUX_DATA(FSIAISLD_MARK,              PORT7_FN1),
 552         PINMUX_DATA(FSIAOMC_MARK,               PORT8_FN1),
 553         PINMUX_DATA(FSIAOLR_MARK,               PORT9_FN1),
 554         PINMUX_DATA(FSIAOBT_MARK,               PORT10_FN1),
 555         PINMUX_DATA(FSIAOSLD_MARK,              PORT11_FN1),
 556         PINMUX_DATA(FMSOCK_MARK,                PORT12_FN1),
 557         PINMUX_DATA(FMSOOLR_MARK,               PORT13_FN1),
 558         PINMUX_DATA(FMSOOBT_MARK,               PORT14_FN1),
 559         PINMUX_DATA(FMSOSLD_MARK,               PORT15_FN1),
 560         PINMUX_DATA(FMSOILR_MARK,               PORT16_FN1),
 561         PINMUX_DATA(FMSOIBT_MARK,               PORT17_FN1),
 562         PINMUX_DATA(FMSISLD_MARK,               PORT18_FN1),
 563         PINMUX_DATA(A0_MARK,                    PORT19_FN1),
 564         PINMUX_DATA(A1_MARK,                    PORT20_FN1),
 565         PINMUX_DATA(A2_MARK,                    PORT21_FN1),
 566         PINMUX_DATA(A3_MARK,                    PORT22_FN1),
 567         PINMUX_DATA(A4_FOE_MARK,                PORT23_FN1),
 568         PINMUX_DATA(A5_FCDE_MARK,               PORT24_FN1),
 569         PINMUX_DATA(A6_MARK,                    PORT25_FN1),
 570         PINMUX_DATA(A7_MARK,                    PORT26_FN1),
 571         PINMUX_DATA(A8_MARK,                    PORT27_FN1),
 572         PINMUX_DATA(A9_MARK,                    PORT28_FN1),
 573         PINMUX_DATA(A10_MARK,                   PORT29_FN1),
 574         PINMUX_DATA(A11_MARK,                   PORT30_FN1),
 575         PINMUX_DATA(A12_MARK,                   PORT31_FN1),
 576         PINMUX_DATA(A13_MARK,                   PORT32_FN1),
 577         PINMUX_DATA(A14_MARK,                   PORT33_FN1),
 578         PINMUX_DATA(A15_MARK,                   PORT34_FN1),
 579         PINMUX_DATA(A16_MARK,                   PORT35_FN1),
 580         PINMUX_DATA(A17_MARK,                   PORT36_FN1),
 581         PINMUX_DATA(A18_MARK,                   PORT37_FN1),
 582         PINMUX_DATA(A19_MARK,                   PORT38_FN1),
 583         PINMUX_DATA(A20_MARK,                   PORT39_FN1),
 584         PINMUX_DATA(A21_MARK,                   PORT40_FN1),
 585         PINMUX_DATA(A22_MARK,                   PORT41_FN1),
 586         PINMUX_DATA(A23_MARK,                   PORT42_FN1),
 587         PINMUX_DATA(A24_MARK,                   PORT43_FN1),
 588         PINMUX_DATA(A25_MARK,                   PORT44_FN1),
 589         PINMUX_DATA(A26_MARK,                   PORT45_FN1),
 590         PINMUX_DATA(D0_NAF0_MARK,               PORT46_FN1),
 591         PINMUX_DATA(D1_NAF1_MARK,               PORT47_FN1),
 592         PINMUX_DATA(D2_NAF2_MARK,               PORT48_FN1),
 593         PINMUX_DATA(D3_NAF3_MARK,               PORT49_FN1),
 594         PINMUX_DATA(D4_NAF4_MARK,               PORT50_FN1),
 595         PINMUX_DATA(D5_NAF5_MARK,               PORT51_FN1),
 596         PINMUX_DATA(D6_NAF6_MARK,               PORT52_FN1),
 597         PINMUX_DATA(D7_NAF7_MARK,               PORT53_FN1),
 598         PINMUX_DATA(D8_NAF8_MARK,               PORT54_FN1),
 599         PINMUX_DATA(D9_NAF9_MARK,               PORT55_FN1),
 600         PINMUX_DATA(D10_NAF10_MARK,             PORT56_FN1),
 601         PINMUX_DATA(D11_NAF11_MARK,             PORT57_FN1),
 602         PINMUX_DATA(D12_NAF12_MARK,             PORT58_FN1),
 603         PINMUX_DATA(D13_NAF13_MARK,             PORT59_FN1),
 604         PINMUX_DATA(D14_NAF14_MARK,             PORT60_FN1),
 605         PINMUX_DATA(D15_NAF15_MARK,             PORT61_FN1),
 606         PINMUX_DATA(CS0_MARK,                   PORT62_FN1),
 607         PINMUX_DATA(CS2_MARK,                   PORT63_FN1),
 608         PINMUX_DATA(CS4_MARK,                   PORT64_FN1),
 609         PINMUX_DATA(CS5A_MARK,                  PORT65_FN1),
 610         PINMUX_DATA(CS5B_MARK,                  PORT66_FN1),
 611         PINMUX_DATA(CS6A_MARK,                  PORT67_FN1),
 612         PINMUX_DATA(FCE0_MARK,                  PORT68_FN1),
 613         PINMUX_DATA(RD_FSC_MARK,                PORT69_FN1),
 614         PINMUX_DATA(WE0_FWE_MARK,               PORT70_FN1),
 615         PINMUX_DATA(WE1_MARK,                   PORT71_FN1),
 616         PINMUX_DATA(CKO_MARK,                   PORT72_FN1),
 617         PINMUX_DATA(FRB_MARK,                   PORT73_FN1),
 618         PINMUX_DATA(WAIT_MARK,                  PORT74_FN1),
 619         PINMUX_DATA(RDWR_MARK,                  PORT75_FN1),
 620         PINMUX_DATA(MEMC_AD0_MARK,              PORT76_FN1),
 621         PINMUX_DATA(MEMC_AD1_MARK,              PORT77_FN1),
 622         PINMUX_DATA(MEMC_AD2_MARK,              PORT78_FN1),
 623         PINMUX_DATA(MEMC_AD3_MARK,              PORT79_FN1),
 624         PINMUX_DATA(MEMC_AD4_MARK,              PORT80_FN1),
 625         PINMUX_DATA(MEMC_AD5_MARK,              PORT81_FN1),
 626         PINMUX_DATA(MEMC_AD6_MARK,              PORT82_FN1),
 627         PINMUX_DATA(MEMC_AD7_MARK,              PORT83_FN1),
 628         PINMUX_DATA(MEMC_AD8_MARK,              PORT84_FN1),
 629         PINMUX_DATA(MEMC_AD9_MARK,              PORT85_FN1),
 630         PINMUX_DATA(MEMC_AD10_MARK,             PORT86_FN1),
 631         PINMUX_DATA(MEMC_AD11_MARK,             PORT87_FN1),
 632         PINMUX_DATA(MEMC_AD12_MARK,             PORT88_FN1),
 633         PINMUX_DATA(MEMC_AD13_MARK,             PORT89_FN1),
 634         PINMUX_DATA(MEMC_AD14_MARK,             PORT90_FN1),
 635         PINMUX_DATA(MEMC_AD15_MARK,             PORT91_FN1),
 636         PINMUX_DATA(MEMC_CS0_MARK,              PORT92_FN1),
 637         PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK,   PORT93_FN1),
 638         PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK,      PORT94_FN1),
 639         PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK,   PORT95_FN1),
 640         PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK,  PORT96_FN1),
 641         PINMUX_DATA(MEMC_NOE_MARK,              PORT97_FN1),
 642         PINMUX_DATA(MEMC_NWE_MARK,              PORT98_FN1),
 643         PINMUX_DATA(MEMC_INT_MARK,              PORT99_FN1),
 644         PINMUX_DATA(VIO_VD_MARK,                PORT100_FN1),
 645         PINMUX_DATA(VIO_HD_MARK,                PORT101_FN1),
 646         PINMUX_DATA(VIO_D0_MARK,                PORT102_FN1),
 647         PINMUX_DATA(VIO_D1_MARK,                PORT103_FN1),
 648         PINMUX_DATA(VIO_D2_MARK,                PORT104_FN1),
 649         PINMUX_DATA(VIO_D3_MARK,                PORT105_FN1),
 650         PINMUX_DATA(VIO_D4_MARK,                PORT106_FN1),
 651         PINMUX_DATA(VIO_D5_MARK,                PORT107_FN1),
 652         PINMUX_DATA(VIO_D6_MARK,                PORT108_FN1),
 653         PINMUX_DATA(VIO_D7_MARK,                PORT109_FN1),
 654         PINMUX_DATA(VIO_D8_MARK,                PORT110_FN1),
 655         PINMUX_DATA(VIO_D9_MARK,                PORT111_FN1),
 656         PINMUX_DATA(VIO_D10_MARK,               PORT112_FN1),
 657         PINMUX_DATA(VIO_D11_MARK,               PORT113_FN1),
 658         PINMUX_DATA(VIO_D12_MARK,               PORT114_FN1),
 659         PINMUX_DATA(VIO_D13_MARK,               PORT115_FN1),
 660         PINMUX_DATA(VIO_D14_MARK,               PORT116_FN1),
 661         PINMUX_DATA(VIO_D15_MARK,               PORT117_FN1),
 662         PINMUX_DATA(VIO_CLK_MARK,               PORT118_FN1),
 663         PINMUX_DATA(VIO_FIELD_MARK,             PORT119_FN1),
 664         PINMUX_DATA(VIO_CKO_MARK,               PORT120_FN1),
 665         PINMUX_DATA(LCDD0_MARK,                 PORT121_FN1),
 666         PINMUX_DATA(LCDD1_MARK,                 PORT122_FN1),
 667         PINMUX_DATA(LCDD2_MARK,                 PORT123_FN1),
 668         PINMUX_DATA(LCDD3_MARK,                 PORT124_FN1),
 669         PINMUX_DATA(LCDD4_MARK,                 PORT125_FN1),
 670         PINMUX_DATA(LCDD5_MARK,                 PORT126_FN1),
 671         PINMUX_DATA(LCDD6_MARK,                 PORT127_FN1),
 672         PINMUX_DATA(LCDD7_MARK,                 PORT128_FN1),
 673         PINMUX_DATA(LCDD8_MARK,                 PORT129_FN1),
 674         PINMUX_DATA(LCDD9_MARK,                 PORT130_FN1),
 675         PINMUX_DATA(LCDD10_MARK,                PORT131_FN1),
 676         PINMUX_DATA(LCDD11_MARK,                PORT132_FN1),
 677         PINMUX_DATA(LCDD12_MARK,                PORT133_FN1),
 678         PINMUX_DATA(LCDD13_MARK,                PORT134_FN1),
 679         PINMUX_DATA(LCDD14_MARK,                PORT135_FN1),
 680         PINMUX_DATA(LCDD15_MARK,                PORT136_FN1),
 681         PINMUX_DATA(LCDD16_MARK,                PORT137_FN1),
 682         PINMUX_DATA(LCDD17_MARK,                PORT138_FN1),
 683         PINMUX_DATA(LCDD18_MARK,                PORT139_FN1),
 684         PINMUX_DATA(LCDD19_MARK,                PORT140_FN1),
 685         PINMUX_DATA(LCDD20_MARK,                PORT141_FN1),
 686         PINMUX_DATA(LCDD21_MARK,                PORT142_FN1),
 687         PINMUX_DATA(LCDD22_MARK,                PORT143_FN1),
 688         PINMUX_DATA(LCDD23_MARK,                PORT144_FN1),
 689         PINMUX_DATA(LCDHSYN_MARK,               PORT145_FN1),
 690         PINMUX_DATA(LCDVSYN_MARK,               PORT146_FN1),
 691         PINMUX_DATA(LCDDCK_MARK,                PORT147_FN1),
 692         PINMUX_DATA(LCDRD_MARK,                 PORT148_FN1),
 693         PINMUX_DATA(LCDDISP_MARK,               PORT149_FN1),
 694         PINMUX_DATA(LCDLCLK_MARK,               PORT150_FN1),
 695         PINMUX_DATA(LCDDON_MARK,                PORT151_FN1),
 696         PINMUX_DATA(SCIFA0_TXD_MARK,            PORT152_FN1),
 697         PINMUX_DATA(SCIFA0_RXD_MARK,            PORT153_FN1),
 698         PINMUX_DATA(SCIFA1_TXD_MARK,            PORT154_FN1),
 699         PINMUX_DATA(SCIFA1_RXD_MARK,            PORT155_FN1),
 700         PINMUX_DATA(TS_SPSYNC1_MARK,            PORT156_FN1),
 701         PINMUX_DATA(TS_SDAT1_MARK,              PORT157_FN1),
 702         PINMUX_DATA(TS_SDEN1_MARK,              PORT158_FN1),
 703         PINMUX_DATA(TS_SCK1_MARK,               PORT159_FN1),
 704         PINMUX_DATA(TPU0TO0_MARK,               PORT160_FN1),
 705         PINMUX_DATA(TPU0TO1_MARK,               PORT161_FN1),
 706         PINMUX_DATA(SCIFB_SCK_MARK,             PORT162_FN1),
 707         PINMUX_DATA(SCIFB_RTS_MARK,             PORT163_FN1),
 708         PINMUX_DATA(SCIFB_CTS_MARK,             PORT164_FN1),
 709         PINMUX_DATA(SCIFB_TXD_MARK,             PORT165_FN1),
 710         PINMUX_DATA(SCIFB_RXD_MARK,             PORT166_FN1),
 711         PINMUX_DATA(VBUS0_0_MARK,               PORT167_FN1),
 712         PINMUX_DATA(VBUS0_1_MARK,               PORT168_FN1),
 713         PINMUX_DATA(HDMI_HPD_MARK,              PORT169_FN1),
 714         PINMUX_DATA(HDMI_CEC_MARK,              PORT170_FN1),
 715         PINMUX_DATA(SDHICLK0_MARK,              PORT171_FN1),
 716         PINMUX_DATA(SDHICD0_MARK,               PORT172_FN1),
 717         PINMUX_DATA(SDHID0_0_MARK,              PORT173_FN1),
 718         PINMUX_DATA(SDHID0_1_MARK,              PORT174_FN1),
 719         PINMUX_DATA(SDHID0_2_MARK,              PORT175_FN1),
 720         PINMUX_DATA(SDHID0_3_MARK,              PORT176_FN1),
 721         PINMUX_DATA(SDHICMD0_MARK,              PORT177_FN1),
 722         PINMUX_DATA(SDHIWP0_MARK,               PORT178_FN1),
 723         PINMUX_DATA(SDHICLK1_MARK,              PORT179_FN1),
 724         PINMUX_DATA(SDHID1_0_MARK,              PORT180_FN1),
 725         PINMUX_DATA(SDHID1_1_MARK,              PORT181_FN1),
 726         PINMUX_DATA(SDHID1_2_MARK,              PORT182_FN1),
 727         PINMUX_DATA(SDHID1_3_MARK,              PORT183_FN1),
 728         PINMUX_DATA(SDHICMD1_MARK,              PORT184_FN1),
 729         PINMUX_DATA(SDHICLK2_MARK,              PORT185_FN1),
 730         PINMUX_DATA(SDHID2_0_MARK,              PORT186_FN1),
 731         PINMUX_DATA(SDHID2_1_MARK,              PORT187_FN1),
 732         PINMUX_DATA(SDHID2_2_MARK,              PORT188_FN1),
 733         PINMUX_DATA(SDHID2_3_MARK,              PORT189_FN1),
 734         PINMUX_DATA(SDHICMD2_MARK,              PORT190_FN1),
 735
 736         /* Function 2 */
 737         PINMUX_DATA(FSIBCK_MARK,                PORT4_FN2),
 738         PINMUX_DATA(SCIFA4_RXD_MARK,            PORT5_FN2),
 739         PINMUX_DATA(SCIFA4_TXD_MARK,            PORT6_FN2),
 740         PINMUX_DATA(SCIFA5_RXD_MARK,            PORT8_FN2),
 741         PINMUX_DATA(FSIASPDIF_11_MARK,          PORT11_FN2),
 742         PINMUX_DATA(SCIFA5_TXD_MARK,            PORT12_FN2),
 743         PINMUX_DATA(FMSIOLR_MARK,               PORT13_FN2),
 744         PINMUX_DATA(FMSIOBT_MARK,               PORT14_FN2),
 745         PINMUX_DATA(FSIASPDIF_15_MARK,          PORT15_FN2),
 746         PINMUX_DATA(FMSIILR_MARK,               PORT16_FN2),
 747         PINMUX_DATA(FMSIIBT_MARK,               PORT17_FN2),
 748         PINMUX_DATA(BS_MARK,                    PORT19_FN2),
 749         PINMUX_DATA(MSIOF0_TSYNC_MARK,          PORT36_FN2),
 750         PINMUX_DATA(MSIOF0_TSCK_MARK,           PORT37_FN2),
 751         PINMUX_DATA(MSIOF0_RXD_MARK,            PORT38_FN2),
 752         PINMUX_DATA(MSIOF0_RSCK_MARK,           PORT39_FN2),
 753         PINMUX_DATA(MSIOF0_RSYNC_MARK,          PORT40_FN2),
 754         PINMUX_DATA(MSIOF0_MCK0_MARK,           PORT41_FN2),
 755         PINMUX_DATA(MSIOF0_MCK1_MARK,           PORT42_FN2),
 756         PINMUX_DATA(MSIOF0_SS1_MARK,            PORT43_FN2),
 757         PINMUX_DATA(MSIOF0_SS2_MARK,            PORT44_FN2),
 758         PINMUX_DATA(MSIOF0_TXD_MARK,            PORT45_FN2),
 759         PINMUX_DATA(FMSICK_MARK,                PORT65_FN2),
 760         PINMUX_DATA(FCE1_MARK,                  PORT66_FN2),
 761         PINMUX_DATA(BBIF1_RXD_MARK,             PORT76_FN2),
 762         PINMUX_DATA(BBIF1_TSYNC_MARK,           PORT77_FN2),
 763         PINMUX_DATA(BBIF1_TSCK_MARK,            PORT78_FN2),
 764         PINMUX_DATA(BBIF1_TXD_MARK,             PORT79_FN2),
 765         PINMUX_DATA(BBIF1_RSCK_MARK,            PORT80_FN2),
 766         PINMUX_DATA(BBIF1_RSYNC_MARK,           PORT81_FN2),
 767         PINMUX_DATA(BBIF1_FLOW_MARK,            PORT82_FN2),
 768         PINMUX_DATA(BB_RX_FLOW_N_MARK,          PORT83_FN2),
 769         PINMUX_DATA(MSIOF1_RSCK_MARK,           PORT84_FN2),
 770         PINMUX_DATA(MSIOF1_RSYNC_MARK,          PORT85_FN2),
 771         PINMUX_DATA(MSIOF1_MCK0_MARK,           PORT86_FN2),
 772         PINMUX_DATA(MSIOF1_MCK1_MARK,           PORT87_FN2),
 773         PINMUX_DATA(MSIOF1_TSCK_88_MARK,        PORT88_FN2, MSEL4CR_10_1),
 774         PINMUX_DATA(MSIOF1_TSYNC_89_MARK,       PORT89_FN2, MSEL4CR_10_1),
 775         PINMUX_DATA(MSIOF1_TXD_90_MARK,         PORT90_FN2, MSEL4CR_10_1),
 776         PINMUX_DATA(MSIOF1_RXD_91_MARK,         PORT91_FN2, MSEL4CR_10_1),
 777         PINMUX_DATA(MSIOF1_SS1_92_MARK,         PORT92_FN2, MSEL4CR_10_1),
 778         PINMUX_DATA(MSIOF1_SS2_93_MARK,         PORT93_FN2, MSEL4CR_10_1),
 779         PINMUX_DATA(SCIFA2_CTS1_MARK,           PORT94_FN2),
 780         PINMUX_DATA(SCIFA2_RTS1_MARK,           PORT95_FN2),
 781         PINMUX_DATA(SCIFA2_TXD1_MARK,           PORT96_FN2),
 782         PINMUX_DATA(SCIFA2_RXD1_MARK,           PORT97_FN2),
 783         PINMUX_DATA(SCIFA2_SCK1_MARK,           PORT98_FN2),
 784         PINMUX_DATA(I2C_SCL2_MARK,              PORT110_FN2),
 785         PINMUX_DATA(I2C_SDA2_MARK,              PORT111_FN2),
 786         PINMUX_DATA(I2C_SCL3_MARK,              PORT114_FN2, MSEL4CR_16_1),
 787         PINMUX_DATA(I2C_SDA3_MARK,              PORT115_FN2, MSEL4CR_16_1),
 788         PINMUX_DATA(I2C_SCL4_MARK,              PORT116_FN2, MSEL4CR_17_1),
 789         PINMUX_DATA(I2C_SDA4_MARK,              PORT117_FN2, MSEL4CR_17_1),
 790         PINMUX_DATA(MSIOF2_RSCK_MARK,           PORT134_FN2),
 791         PINMUX_DATA(MSIOF2_RSYNC_MARK,          PORT135_FN2),
 792         PINMUX_DATA(MSIOF2_MCK0_MARK,           PORT136_FN2),
 793         PINMUX_DATA(MSIOF2_MCK1_MARK,           PORT137_FN2),
 794         PINMUX_DATA(MSIOF2_SS1_MARK,            PORT138_FN2),
 795         PINMUX_DATA(MSIOF2_SS2_MARK,            PORT139_FN2),
 796         PINMUX_DATA(SCIFA3_CTS_140_MARK,        PORT140_FN2, MSEL3CR_9_1),
 797         PINMUX_DATA(SCIFA3_RTS_141_MARK,        PORT141_FN2),
 798         PINMUX_DATA(SCIFA3_SCK_MARK,            PORT142_FN2),
 799         PINMUX_DATA(SCIFA3_TXD_MARK,            PORT143_FN2),
 800         PINMUX_DATA(SCIFA3_RXD_MARK,            PORT144_FN2),
 801         PINMUX_DATA(MSIOF2_TSYNC_MARK,          PORT148_FN2),
 802         PINMUX_DATA(MSIOF2_TSCK_MARK,           PORT149_FN2),
 803         PINMUX_DATA(MSIOF2_RXD_MARK,            PORT150_FN2),
 804         PINMUX_DATA(MSIOF2_TXD_MARK,            PORT151_FN2),
 805         PINMUX_DATA(SCIFA0_SCK_MARK,            PORT156_FN2),
 806         PINMUX_DATA(SCIFA0_RTS_MARK,            PORT157_FN2),
 807         PINMUX_DATA(SCIFA0_CTS_MARK,            PORT158_FN2),
 808         PINMUX_DATA(SCIFA1_SCK_MARK,            PORT159_FN2),
 809         PINMUX_DATA(SCIFA1_RTS_MARK,            PORT160_FN2),
 810         PINMUX_DATA(SCIFA1_CTS_MARK,            PORT161_FN2),
 811
 812         /* Function 3 */
 813         PINMUX_DATA(VIO_CKO1_MARK,              PORT16_FN3),
 814         PINMUX_DATA(VIO_CKO2_MARK,              PORT17_FN3),
 815         PINMUX_DATA(IDIN_1_18_MARK,             PORT18_FN3, MSEL4CR_14_1),
 816         PINMUX_DATA(MSIOF1_TSCK_39_MARK,        PORT39_FN3, MSEL4CR_10_0),
 817         PINMUX_DATA(MSIOF1_TSYNC_40_MARK,       PORT40_FN3, MSEL4CR_10_0),
 818         PINMUX_DATA(MSIOF1_TXD_41_MARK,         PORT41_FN3, MSEL4CR_10_0),
 819         PINMUX_DATA(MSIOF1_RXD_42_MARK,         PORT42_FN3, MSEL4CR_10_0),
 820         PINMUX_DATA(MSIOF1_SS1_43_MARK,         PORT43_FN3, MSEL4CR_10_0),
 821         PINMUX_DATA(MSIOF1_SS2_44_MARK,         PORT44_FN3, MSEL4CR_10_0),
 822         PINMUX_DATA(MMCD1_0_MARK,               PORT54_FN3, MSEL4CR_15_1),
 823         PINMUX_DATA(MMCD1_1_MARK,               PORT55_FN3, MSEL4CR_15_1),
 824         PINMUX_DATA(MMCD1_2_MARK,               PORT56_FN3, MSEL4CR_15_1),
 825         PINMUX_DATA(MMCD1_3_MARK,               PORT57_FN3, MSEL4CR_15_1),
 826         PINMUX_DATA(MMCD1_4_MARK,               PORT58_FN3, MSEL4CR_15_1),
 827         PINMUX_DATA(MMCD1_5_MARK,               PORT59_FN3, MSEL4CR_15_1),
 828         PINMUX_DATA(MMCD1_6_MARK,               PORT60_FN3, MSEL4CR_15_1),
 829         PINMUX_DATA(MMCD1_7_MARK,               PORT61_FN3, MSEL4CR_15_1),
 830         PINMUX_DATA(VINT_I_MARK,                PORT65_FN3),
 831         PINMUX_DATA(MMCCLK1_MARK,               PORT66_FN3, MSEL4CR_15_1),
 832         PINMUX_DATA(MMCCMD1_MARK,               PORT67_FN3, MSEL4CR_15_1),
 833         PINMUX_DATA(TPU0TO2_93_MARK,            PORT93_FN3),
 834         PINMUX_DATA(TPU0TO2_99_MARK,            PORT99_FN3),
 835         PINMUX_DATA(TPU0TO3_MARK,               PORT112_FN3),
 836         PINMUX_DATA(IDIN_0_MARK,                PORT113_FN3),
 837         PINMUX_DATA(EXTLP_0_MARK,               PORT114_FN3),
 838         PINMUX_DATA(OVCN2_0_MARK,               PORT115_FN3),
 839         PINMUX_DATA(PWEN_0_MARK,                PORT116_FN3),
 840         PINMUX_DATA(OVCN_0_MARK,                PORT117_FN3),
 841         PINMUX_DATA(KEYOUT7_MARK,               PORT121_FN3),
 842         PINMUX_DATA(KEYOUT6_MARK,               PORT122_FN3),
 843         PINMUX_DATA(KEYOUT5_MARK,               PORT123_FN3),
 844         PINMUX_DATA(KEYOUT4_MARK,               PORT124_FN3),
 845         PINMUX_DATA(KEYOUT3_MARK,               PORT125_FN3),
 846         PINMUX_DATA(KEYOUT2_MARK,               PORT126_FN3),
 847         PINMUX_DATA(KEYOUT1_MARK,               PORT127_FN3),
 848         PINMUX_DATA(KEYOUT0_MARK,               PORT128_FN3),
 849         PINMUX_DATA(KEYIN7_MARK,                PORT129_FN3),
 850         PINMUX_DATA(KEYIN6_MARK,                PORT130_FN3),
 851         PINMUX_DATA(KEYIN5_MARK,                PORT131_FN3),
 852         PINMUX_DATA(KEYIN4_MARK,                PORT132_FN3),
 853         PINMUX_DATA(KEYIN3_133_MARK,            PORT133_FN3, MSEL4CR_18_0),
 854         PINMUX_DATA(KEYIN2_134_MARK,            PORT134_FN3, MSEL4CR_18_0),
 855         PINMUX_DATA(KEYIN1_135_MARK,            PORT135_FN3, MSEL4CR_18_0),
 856         PINMUX_DATA(KEYIN0_136_MARK,            PORT136_FN3, MSEL4CR_18_0),
 857         PINMUX_DATA(TS_SPSYNC2_MARK,            PORT137_FN3),
 858         PINMUX_DATA(IROUT_139_MARK,             PORT139_FN3),
 859         PINMUX_DATA(IRDA_OUT_MARK,              PORT140_FN3),
 860         PINMUX_DATA(IRDA_IN_MARK,               PORT141_FN3),
 861         PINMUX_DATA(IRDA_FIRSEL_MARK,           PORT142_FN3),
 862         PINMUX_DATA(TS_SDAT2_MARK,              PORT145_FN3),
 863         PINMUX_DATA(TS_SDEN2_MARK,              PORT146_FN3),
 864         PINMUX_DATA(TS_SCK2_MARK,               PORT147_FN3),
 865
 866         /* Function 4 */
 867         PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
 868         PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
 869         PINMUX_DATA(GP_RX_FLAG_MARK,    PORT76_FN4),
 870         PINMUX_DATA(GP_RX_DATA_MARK,    PORT77_FN4),
 871         PINMUX_DATA(GP_TX_READY_MARK,   PORT78_FN4),
 872         PINMUX_DATA(GP_RX_WAKE_MARK,    PORT79_FN4),
 873         PINMUX_DATA(MP_TX_FLAG_MARK,    PORT80_FN4),
 874         PINMUX_DATA(MP_TX_DATA_MARK,    PORT81_FN4),
 875         PINMUX_DATA(MP_RX_READY_MARK,   PORT82_FN4),
 876         PINMUX_DATA(MP_TX_WAKE_MARK,    PORT83_FN4),
 877         PINMUX_DATA(MMCD0_0_MARK,       PORT84_FN4, MSEL4CR_15_0),
 878         PINMUX_DATA(MMCD0_1_MARK,       PORT85_FN4, MSEL4CR_15_0),
 879         PINMUX_DATA(MMCD0_2_MARK,       PORT86_FN4, MSEL4CR_15_0),
 880         PINMUX_DATA(MMCD0_3_MARK,       PORT87_FN4, MSEL4CR_15_0),
 881         PINMUX_DATA(MMCD0_4_MARK,       PORT88_FN4, MSEL4CR_15_0),
 882         PINMUX_DATA(MMCD0_5_MARK,       PORT89_FN4, MSEL4CR_15_0),
 883         PINMUX_DATA(MMCD0_6_MARK,       PORT90_FN4, MSEL4CR_15_0),
 884         PINMUX_DATA(MMCD0_7_MARK,       PORT91_FN4, MSEL4CR_15_0),
 885         PINMUX_DATA(MMCCMD0_MARK,       PORT92_FN4, MSEL4CR_15_0),
 886         PINMUX_DATA(SIM_RST_MARK,       PORT94_FN4),
 887         PINMUX_DATA(SIM_CLK_MARK,       PORT95_FN4),
 888         PINMUX_DATA(SIM_D_MARK,         PORT98_FN4),
 889         PINMUX_DATA(MMCCLK0_MARK,       PORT99_FN4, MSEL4CR_15_0),
 890         PINMUX_DATA(IDIN_1_113_MARK,    PORT113_FN4, MSEL4CR_14_0),
 891         PINMUX_DATA(OVCN_1_114_MARK,    PORT114_FN4, MSEL4CR_14_0),
 892         PINMUX_DATA(PWEN_1_115_MARK,    PORT115_FN4),
 893         PINMUX_DATA(EXTLP_1_MARK,       PORT116_FN4),
 894         PINMUX_DATA(OVCN2_1_MARK,       PORT117_FN4),
 895         PINMUX_DATA(KEYIN0_121_MARK,    PORT121_FN4, MSEL4CR_18_1),
 896         PINMUX_DATA(KEYIN1_122_MARK,    PORT122_FN4, MSEL4CR_18_1),
 897         PINMUX_DATA(KEYIN2_123_MARK,    PORT123_FN4, MSEL4CR_18_1),
 898         PINMUX_DATA(KEYIN3_124_MARK,    PORT124_FN4, MSEL4CR_18_1),
 899         PINMUX_DATA(PWEN_1_138_MARK,    PORT138_FN4),
 900         PINMUX_DATA(IROUT_140_MARK,     PORT140_FN4),
 901         PINMUX_DATA(LCDCS_MARK,         PORT145_FN4),
 902         PINMUX_DATA(LCDWR_MARK,         PORT147_FN4),
 903         PINMUX_DATA(LCDRS_MARK,         PORT149_FN4),
 904         PINMUX_DATA(OVCN_1_162_MARK,    PORT162_FN4, MSEL4CR_14_1),
 905
 906         /* Function 5 */
 907         PINMUX_DATA(GPI0_MARK,          PORT41_FN5),
 908         PINMUX_DATA(GPI1_MARK,          PORT42_FN5),
 909         PINMUX_DATA(GPO0_MARK,          PORT43_FN5),
 910         PINMUX_DATA(GPO1_MARK,          PORT44_FN5),
 911         PINMUX_DATA(I2C_SCL3S_MARK,     PORT137_FN5, MSEL4CR_16_0),
 912         PINMUX_DATA(I2C_SDA3S_MARK,     PORT145_FN5, MSEL4CR_16_0),
 913         PINMUX_DATA(I2C_SCL4S_MARK,     PORT146_FN5, MSEL4CR_17_0),
 914         PINMUX_DATA(I2C_SDA4S_MARK,     PORT147_FN5, MSEL4CR_17_0),
 915
 916         /* Function select */
 917         PINMUX_DATA(LCDC0_SELECT_MARK,  MSEL3CR_6_0),
 918         PINMUX_DATA(LCDC1_SELECT_MARK,  MSEL3CR_6_1),
 919
 920         PINMUX_DATA(TS0_1SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_0),
 921         PINMUX_DATA(TS0_2SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_1),
 922         PINMUX_DATA(TS1_1SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_0),
 923         PINMUX_DATA(TS1_2SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_1),
 924
 925         PINMUX_DATA(SDENC_CPG_MARK,     MSEL4CR_19_0),
 926         PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
 927
 928         PINMUX_DATA(MFIv6_MARK,         MSEL4CR_6_0),
 929         PINMUX_DATA(MFIv4_MARK,         MSEL4CR_6_1),
 930 };
 931
 932 static struct sh_pfc_pin pinmux_pins[] = {
 933         GPIO_PORT_ALL(),
 934 };
 935
 936 /* - MMCIF ------------------------------------------------------------------ */
 937 static const unsigned int mmc0_data1_0_pins[] = {
 938         /* D[0] */
 939         84,
 940 };
 941 static const unsigned int mmc0_data1_0_mux[] = {
 942         MMCD0_0_MARK,
 943 };
 944 static const unsigned int mmc0_data4_0_pins[] = {
 945         /* D[0:3] */
 946         84, 85, 86, 87,
 947 };
 948 static const unsigned int mmc0_data4_0_mux[] = {
 949         MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
 950 };
 951 static const unsigned int mmc0_data8_0_pins[] = {
 952         /* D[0:7] */
 953         84, 85, 86, 87, 88, 89, 90, 91,
 954 };
 955 static const unsigned int mmc0_data8_0_mux[] = {
 956         MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
 957         MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
 958 };
 959 static const unsigned int mmc0_ctrl_0_pins[] = {
 960         /* CMD, CLK */
 961         92, 99,
 962 };
 963 static const unsigned int mmc0_ctrl_0_mux[] = {
 964         MMCCMD0_MARK, MMCCLK0_MARK,
 965 };
 966
 967 static const unsigned int mmc0_data1_1_pins[] = {
 968         /* D[0] */
 969         54,
 970 };
 971 static const unsigned int mmc0_data1_1_mux[] = {
 972         MMCD1_0_MARK,
 973 };
 974 static const unsigned int mmc0_data4_1_pins[] = {
 975         /* D[0:3] */
 976         54, 55, 56, 57,
 977 };
 978 static const unsigned int mmc0_data4_1_mux[] = {
 979         MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
 980 };
 981 static const unsigned int mmc0_data8_1_pins[] = {
 982         /* D[0:7] */
 983         54, 55, 56, 57, 58, 59, 60, 61,
 984 };
 985 static const unsigned int mmc0_data8_1_mux[] = {
 986         MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
 987         MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
 988 };
 989 static const unsigned int mmc0_ctrl_1_pins[] = {
 990         /* CMD, CLK */
 991         67, 66,
 992 };
 993 static const unsigned int mmc0_ctrl_1_mux[] = {
 994         MMCCMD1_MARK, MMCCLK1_MARK,
 995 };
 996 /* - SDHI0 ------------------------------------------------------------------ */
 997 static const unsigned int sdhi0_data1_pins[] = {
 998         /* D0 */
 999         173,
1000 };
1001 static const unsigned int sdhi0_data1_mux[] = {
1002         SDHID0_0_MARK,
1003 };
1004 static const unsigned int sdhi0_data4_pins[] = {
1005         /* D[0:3] */
1006         173, 174, 175, 176,
1007 };
1008 static const unsigned int sdhi0_data4_mux[] = {
1009         SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK,
1010 };
1011 static const unsigned int sdhi0_ctrl_pins[] = {
1012         /* CMD, CLK */
1013         177, 171,
1014 };
1015 static const unsigned int sdhi0_ctrl_mux[] = {
1016         SDHICMD0_MARK, SDHICLK0_MARK,
1017 };
1018 static const unsigned int sdhi0_cd_pins[] = {
1019         /* CD */
1020         172,
1021 };
1022 static const unsigned int sdhi0_cd_mux[] = {
1023         SDHICD0_MARK,
1024 };
1025 static const unsigned int sdhi0_wp_pins[] = {
1026         /* WP */
1027         178,
1028 };
1029 static const unsigned int sdhi0_wp_mux[] = {
1030         SDHIWP0_MARK,
1031 };
1032 /* - SDHI1 ------------------------------------------------------------------ */
1033 static const unsigned int sdhi1_data1_pins[] = {
1034         /* D0 */
1035         180,
1036 };
1037 static const unsigned int sdhi1_data1_mux[] = {
1038         SDHID1_0_MARK,
1039 };
1040 static const unsigned int sdhi1_data4_pins[] = {
1041         /* D[0:3] */
1042         180, 181, 182, 183,
1043 };
1044 static const unsigned int sdhi1_data4_mux[] = {
1045         SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
1046 };
1047 static const unsigned int sdhi1_ctrl_pins[] = {
1048         /* CMD, CLK */
1049         184, 179,
1050 };
1051 static const unsigned int sdhi1_ctrl_mux[] = {
1052         SDHICMD1_MARK, SDHICLK1_MARK,
1053 };
1054
1055 static const unsigned int sdhi2_data1_pins[] = {
1056         /* D0 */
1057         186,
1058 };
1059 static const unsigned int sdhi2_data1_mux[] = {
1060         SDHID2_0_MARK,
1061 };
1062 static const unsigned int sdhi2_data4_pins[] = {
1063         /* D[0:3] */
1064         186, 187, 188, 189,
1065 };
1066 static const unsigned int sdhi2_data4_mux[] = {
1067         SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
1068 };
1069 static const unsigned int sdhi2_ctrl_pins[] = {
1070         /* CMD, CLK */
1071         190, 185,
1072 };
1073 static const unsigned int sdhi2_ctrl_mux[] = {
1074         SDHICMD2_MARK, SDHICLK2_MARK,
1075 };
1076
1077 static const struct sh_pfc_pin_group pinmux_groups[] = {
1078         SH_PFC_PIN_GROUP(mmc0_data1_0),
1079         SH_PFC_PIN_GROUP(mmc0_data4_0),
1080         SH_PFC_PIN_GROUP(mmc0_data8_0),
1081         SH_PFC_PIN_GROUP(mmc0_ctrl_0),
1082         SH_PFC_PIN_GROUP(mmc0_data1_1),
1083         SH_PFC_PIN_GROUP(mmc0_data4_1),
1084         SH_PFC_PIN_GROUP(mmc0_data8_1),
1085         SH_PFC_PIN_GROUP(mmc0_ctrl_1),
1086         SH_PFC_PIN_GROUP(sdhi0_data1),
1087         SH_PFC_PIN_GROUP(sdhi0_data4),
1088         SH_PFC_PIN_GROUP(sdhi0_ctrl),
1089         SH_PFC_PIN_GROUP(sdhi0_cd),
1090         SH_PFC_PIN_GROUP(sdhi0_wp),
1091         SH_PFC_PIN_GROUP(sdhi1_data1),
1092         SH_PFC_PIN_GROUP(sdhi1_data4),
1093         SH_PFC_PIN_GROUP(sdhi1_ctrl),
1094         SH_PFC_PIN_GROUP(sdhi2_data1),
1095         SH_PFC_PIN_GROUP(sdhi2_data4),
1096         SH_PFC_PIN_GROUP(sdhi2_ctrl),
1097 };
1098
1099 static const char * const mmc0_groups[] = {
1100         "mmc0_data1_0",
1101         "mmc0_data4_0",
1102         "mmc0_data8_0",
1103         "mmc0_ctrl_0",
1104         "mmc0_data1_1",
1105         "mmc0_data4_1",
1106         "mmc0_data8_1",
1107         "mmc0_ctrl_1",
1108 };
1109
1110 static const char * const sdhi0_groups[] = {
1111         "sdhi0_data1",
1112         "sdhi0_data4",
1113         "sdhi0_ctrl",
1114         "sdhi0_cd",
1115         "sdhi0_wp",
1116 };
1117
1118 static const char * const sdhi1_groups[] = {
1119         "sdhi1_data1",
1120         "sdhi1_data4",
1121         "sdhi1_ctrl",
1122 };
1123
1124 static const char * const sdhi2_groups[] = {
1125         "sdhi2_data1",
1126         "sdhi2_data4",
1127         "sdhi2_ctrl",
1128 };
1129
1130 static const struct sh_pfc_function pinmux_functions[] = {
1131         SH_PFC_FUNCTION(mmc0),
1132         SH_PFC_FUNCTION(sdhi0),
1133         SH_PFC_FUNCTION(sdhi1),
1134         SH_PFC_FUNCTION(sdhi2),
1135 };
1136
1137 #define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
1138
1139 static const struct pinmux_func pinmux_func_gpios[] = {
1140         /* IRQ */
1141         GPIO_FN(IRQ0_6),        GPIO_FN(IRQ0_162),      GPIO_FN(IRQ1),
1142         GPIO_FN(IRQ2_4),        GPIO_FN(IRQ2_5),        GPIO_FN(IRQ3_8),
1143         GPIO_FN(IRQ3_16),       GPIO_FN(IRQ4_17),       GPIO_FN(IRQ4_163),
1144         GPIO_FN(IRQ5),          GPIO_FN(IRQ6_39),       GPIO_FN(IRQ6_164),
1145         GPIO_FN(IRQ7_40),       GPIO_FN(IRQ7_167),      GPIO_FN(IRQ8_41),
1146         GPIO_FN(IRQ8_168),      GPIO_FN(IRQ9_42),       GPIO_FN(IRQ9_169),
1147         GPIO_FN(IRQ10),         GPIO_FN(IRQ11),         GPIO_FN(IRQ12_80),
1148         GPIO_FN(IRQ12_137),     GPIO_FN(IRQ13_81),      GPIO_FN(IRQ13_145),
1149         GPIO_FN(IRQ14_82),      GPIO_FN(IRQ14_146),     GPIO_FN(IRQ15_83),
1150         GPIO_FN(IRQ15_147),     GPIO_FN(IRQ16_84),      GPIO_FN(IRQ16_170),
1151         GPIO_FN(IRQ17),         GPIO_FN(IRQ18),         GPIO_FN(IRQ19),
1152         GPIO_FN(IRQ20),         GPIO_FN(IRQ21),         GPIO_FN(IRQ22),
1153         GPIO_FN(IRQ23),         GPIO_FN(IRQ24),         GPIO_FN(IRQ25),
1154         GPIO_FN(IRQ26_121),     GPIO_FN(IRQ26_172),     GPIO_FN(IRQ27_122),
1155         GPIO_FN(IRQ27_180),     GPIO_FN(IRQ28_123),     GPIO_FN(IRQ28_181),
1156         GPIO_FN(IRQ29_129),     GPIO_FN(IRQ29_182),     GPIO_FN(IRQ30_130),
1157         GPIO_FN(IRQ30_183),     GPIO_FN(IRQ31_138),     GPIO_FN(IRQ31_184),
1158
1159         /* MSIOF0 */
1160         GPIO_FN(MSIOF0_TSYNC),  GPIO_FN(MSIOF0_TSCK),   GPIO_FN(MSIOF0_RXD),
1161         GPIO_FN(MSIOF0_RSCK),   GPIO_FN(MSIOF0_RSYNC),  GPIO_FN(MSIOF0_MCK0),
1162         GPIO_FN(MSIOF0_MCK1),   GPIO_FN(MSIOF0_SS1),    GPIO_FN(MSIOF0_SS2),
1163         GPIO_FN(MSIOF0_TXD),
1164
1165         /* MSIOF1 */
1166         GPIO_FN(MSIOF1_TSCK_39),        GPIO_FN(MSIOF1_TSCK_88),
1167         GPIO_FN(MSIOF1_TSYNC_40),       GPIO_FN(MSIOF1_TSYNC_89),
1168         GPIO_FN(MSIOF1_TXD_41),         GPIO_FN(MSIOF1_TXD_90),
1169         GPIO_FN(MSIOF1_RXD_42),         GPIO_FN(MSIOF1_RXD_91),
1170         GPIO_FN(MSIOF1_SS1_43),         GPIO_FN(MSIOF1_SS1_92),
1171         GPIO_FN(MSIOF1_SS2_44),         GPIO_FN(MSIOF1_SS2_93),
1172         GPIO_FN(MSIOF1_RSCK),           GPIO_FN(MSIOF1_RSYNC),
1173         GPIO_FN(MSIOF1_MCK0),           GPIO_FN(MSIOF1_MCK1),
1174
1175         /* MSIOF2 */
1176         GPIO_FN(MSIOF2_RSCK),   GPIO_FN(MSIOF2_RSYNC),  GPIO_FN(MSIOF2_MCK0),
1177         GPIO_FN(MSIOF2_MCK1),   GPIO_FN(MSIOF2_SS1),    GPIO_FN(MSIOF2_SS2),
1178         GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_TSCK),   GPIO_FN(MSIOF2_RXD),
1179         GPIO_FN(MSIOF2_TXD),
1180
1181         /* BBIF1 */
1182         GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TSYNC),   GPIO_FN(BBIF1_TSCK),
1183         GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
1184         GPIO_FN(BBIF1_FLOW),    GPIO_FN(BB_RX_FLOW_N),
1185
1186         /* BBIF2 */
1187         GPIO_FN(BBIF2_TSCK1),   GPIO_FN(BBIF2_TSYNC1),
1188         GPIO_FN(BBIF2_TXD1),    GPIO_FN(BBIF2_RXD),
1189
1190         /* FSI */
1191         GPIO_FN(FSIACK),        GPIO_FN(FSIBCK),        GPIO_FN(FSIAILR),
1192         GPIO_FN(FSIAIBT),       GPIO_FN(FSIAISLD),      GPIO_FN(FSIAOMC),
1193         GPIO_FN(FSIAOLR),       GPIO_FN(FSIAOBT),       GPIO_FN(FSIAOSLD),
1194         GPIO_FN(FSIASPDIF_11),  GPIO_FN(FSIASPDIF_15),
1195
1196         /* FMSI */
1197         GPIO_FN(FMSOCK),        GPIO_FN(FMSOOLR),       GPIO_FN(FMSIOLR),
1198         GPIO_FN(FMSOOBT),       GPIO_FN(FMSIOBT),       GPIO_FN(FMSOSLD),
1199         GPIO_FN(FMSOILR),       GPIO_FN(FMSIILR),       GPIO_FN(FMSOIBT),
1200         GPIO_FN(FMSIIBT),       GPIO_FN(FMSISLD),       GPIO_FN(FMSICK),
1201
1202         /* SCIFA0 */
1203         GPIO_FN(SCIFA0_TXD),    GPIO_FN(SCIFA0_RXD),    GPIO_FN(SCIFA0_SCK),
1204         GPIO_FN(SCIFA0_RTS),    GPIO_FN(SCIFA0_CTS),
1205
1206         /* SCIFA1 */
1207         GPIO_FN(SCIFA1_TXD),    GPIO_FN(SCIFA1_RXD),    GPIO_FN(SCIFA1_SCK),
1208         GPIO_FN(SCIFA1_RTS),    GPIO_FN(SCIFA1_CTS),
1209
1210         /* SCIFA2 */
1211         GPIO_FN(SCIFA2_CTS1),   GPIO_FN(SCIFA2_RTS1),   GPIO_FN(SCIFA2_TXD1),
1212         GPIO_FN(SCIFA2_RXD1),   GPIO_FN(SCIFA2_SCK1),
1213
1214         /* SCIFA3 */
1215         GPIO_FN(SCIFA3_CTS_43),         GPIO_FN(SCIFA3_CTS_140),
1216         GPIO_FN(SCIFA3_RTS_44),         GPIO_FN(SCIFA3_RTS_141),
1217         GPIO_FN(SCIFA3_SCK),            GPIO_FN(SCIFA3_TXD),
1218         GPIO_FN(SCIFA3_RXD),
1219
1220         /* SCIFA4 */
1221         GPIO_FN(SCIFA4_RXD),    GPIO_FN(SCIFA4_TXD),
1222
1223         /* SCIFA5 */
1224         GPIO_FN(SCIFA5_RXD),    GPIO_FN(SCIFA5_TXD),
1225
1226         /* SCIFB */
1227         GPIO_FN(SCIFB_SCK),     GPIO_FN(SCIFB_RTS),     GPIO_FN(SCIFB_CTS),
1228         GPIO_FN(SCIFB_TXD),     GPIO_FN(SCIFB_RXD),
1229
1230         /* CEU */
1231         GPIO_FN(VIO_HD),        GPIO_FN(VIO_CKO1),      GPIO_FN(VIO_CKO2),
1232         GPIO_FN(VIO_VD),        GPIO_FN(VIO_CLK),       GPIO_FN(VIO_FIELD),
1233         GPIO_FN(VIO_CKO),       GPIO_FN(VIO_D0),        GPIO_FN(VIO_D1),
1234         GPIO_FN(VIO_D2),        GPIO_FN(VIO_D3),        GPIO_FN(VIO_D4),
1235         GPIO_FN(VIO_D5),        GPIO_FN(VIO_D6),        GPIO_FN(VIO_D7),
1236         GPIO_FN(VIO_D8),        GPIO_FN(VIO_D9),        GPIO_FN(VIO_D10),
1237         GPIO_FN(VIO_D11),       GPIO_FN(VIO_D12),       GPIO_FN(VIO_D13),
1238         GPIO_FN(VIO_D14),       GPIO_FN(VIO_D15),
1239
1240         /* USB0 */
1241         GPIO_FN(IDIN_0),        GPIO_FN(EXTLP_0),       GPIO_FN(OVCN2_0),
1242         GPIO_FN(PWEN_0),        GPIO_FN(OVCN_0),        GPIO_FN(VBUS0_0),
1243
1244         /* USB1 */
1245         GPIO_FN(IDIN_1_18),     GPIO_FN(IDIN_1_113),
1246         GPIO_FN(OVCN_1_114),    GPIO_FN(OVCN_1_162),
1247         GPIO_FN(PWEN_1_115),    GPIO_FN(PWEN_1_138),
1248         GPIO_FN(EXTLP_1),       GPIO_FN(OVCN2_1),
1249         GPIO_FN(VBUS0_1),
1250
1251         /* GPIO */
1252         GPIO_FN(GPI0),  GPIO_FN(GPI1),  GPIO_FN(GPO0),  GPIO_FN(GPO1),
1253
1254         /* BSC */
1255         GPIO_FN(BS),    GPIO_FN(WE1),   GPIO_FN(CKO),
1256         GPIO_FN(WAIT),  GPIO_FN(RDWR),
1257
1258         GPIO_FN(A0),    GPIO_FN(A1),    GPIO_FN(A2),
1259         GPIO_FN(A3),    GPIO_FN(A6),    GPIO_FN(A7),
1260         GPIO_FN(A8),    GPIO_FN(A9),    GPIO_FN(A10),
1261         GPIO_FN(A11),   GPIO_FN(A12),   GPIO_FN(A13),
1262         GPIO_FN(A14),   GPIO_FN(A15),   GPIO_FN(A16),
1263         GPIO_FN(A17),   GPIO_FN(A18),   GPIO_FN(A19),
1264         GPIO_FN(A20),   GPIO_FN(A21),   GPIO_FN(A22),
1265         GPIO_FN(A23),   GPIO_FN(A24),   GPIO_FN(A25),
1266         GPIO_FN(A26),
1267
1268         GPIO_FN(CS0),   GPIO_FN(CS2),   GPIO_FN(CS4),
1269         GPIO_FN(CS5A),  GPIO_FN(CS5B),  GPIO_FN(CS6A),
1270
1271         /* BSC/FLCTL */
1272         GPIO_FN(RD_FSC),        GPIO_FN(WE0_FWE),       GPIO_FN(A4_FOE),
1273         GPIO_FN(A5_FCDE),       GPIO_FN(D0_NAF0),       GPIO_FN(D1_NAF1),
1274         GPIO_FN(D2_NAF2),       GPIO_FN(D3_NAF3),       GPIO_FN(D4_NAF4),
1275         GPIO_FN(D5_NAF5),       GPIO_FN(D6_NAF6),       GPIO_FN(D7_NAF7),
1276         GPIO_FN(D8_NAF8),       GPIO_FN(D9_NAF9),       GPIO_FN(D10_NAF10),
1277         GPIO_FN(D11_NAF11),     GPIO_FN(D12_NAF12),     GPIO_FN(D13_NAF13),
1278         GPIO_FN(D14_NAF14),     GPIO_FN(D15_NAF15),
1279
1280         /* SPU2 */
1281         GPIO_FN(VINT_I),
1282
1283         /* FLCTL */
1284         GPIO_FN(FCE1),  GPIO_FN(FCE0),  GPIO_FN(FRB),
1285
1286         /* HSI */
1287         GPIO_FN(GP_RX_FLAG),    GPIO_FN(GP_RX_DATA),    GPIO_FN(GP_TX_READY),
1288         GPIO_FN(GP_RX_WAKE),    GPIO_FN(MP_TX_FLAG),    GPIO_FN(MP_TX_DATA),
1289         GPIO_FN(MP_RX_READY),   GPIO_FN(MP_TX_WAKE),
1290
1291         /* MFI */
1292         GPIO_FN(MFIv6),
1293         GPIO_FN(MFIv4),
1294
1295         GPIO_FN(MEMC_BUSCLK_MEMC_A0),   GPIO_FN(MEMC_ADV_MEMC_DREQ0),
1296         GPIO_FN(MEMC_WAIT_MEMC_DREQ1),  GPIO_FN(MEMC_CS1_MEMC_A1),
1297         GPIO_FN(MEMC_CS0),      GPIO_FN(MEMC_NOE),
1298         GPIO_FN(MEMC_NWE),      GPIO_FN(MEMC_INT),
1299
1300         GPIO_FN(MEMC_AD0),      GPIO_FN(MEMC_AD1),      GPIO_FN(MEMC_AD2),
1301         GPIO_FN(MEMC_AD3),      GPIO_FN(MEMC_AD4),      GPIO_FN(MEMC_AD5),
1302         GPIO_FN(MEMC_AD6),      GPIO_FN(MEMC_AD7),      GPIO_FN(MEMC_AD8),
1303         GPIO_FN(MEMC_AD9),      GPIO_FN(MEMC_AD10),     GPIO_FN(MEMC_AD11),
1304         GPIO_FN(MEMC_AD12),     GPIO_FN(MEMC_AD13),     GPIO_FN(MEMC_AD14),
1305         GPIO_FN(MEMC_AD15),
1306
1307         /* SIM */
1308         GPIO_FN(SIM_RST),       GPIO_FN(SIM_CLK),       GPIO_FN(SIM_D),
1309
1310         /* TPU */
1311         GPIO_FN(TPU0TO0),       GPIO_FN(TPU0TO1),       GPIO_FN(TPU0TO2_93),
1312         GPIO_FN(TPU0TO2_99),    GPIO_FN(TPU0TO3),
1313
1314         /* I2C2 */
1315         GPIO_FN(I2C_SCL2),      GPIO_FN(I2C_SDA2),
1316
1317         /* I2C3(1) */
1318         GPIO_FN(I2C_SCL3),      GPIO_FN(I2C_SDA3),
1319
1320         /* I2C3(2) */
1321         GPIO_FN(I2C_SCL3S),     GPIO_FN(I2C_SDA3S),
1322
1323         /* I2C4(2) */
1324         GPIO_FN(I2C_SCL4),      GPIO_FN(I2C_SDA4),
1325
1326         /* I2C4(2) */
1327         GPIO_FN(I2C_SCL4S),     GPIO_FN(I2C_SDA4S),
1328
1329         /* KEYSC */
1330         GPIO_FN(KEYOUT0),       GPIO_FN(KEYIN0_121),    GPIO_FN(KEYIN0_136),
1331         GPIO_FN(KEYOUT1),       GPIO_FN(KEYIN1_122),    GPIO_FN(KEYIN1_135),
1332         GPIO_FN(KEYOUT2),       GPIO_FN(KEYIN2_123),    GPIO_FN(KEYIN2_134),
1333         GPIO_FN(KEYOUT3),       GPIO_FN(KEYIN3_124),    GPIO_FN(KEYIN3_133),
1334         GPIO_FN(KEYOUT4),       GPIO_FN(KEYIN4),        GPIO_FN(KEYOUT5),
1335         GPIO_FN(KEYIN5),        GPIO_FN(KEYOUT6),       GPIO_FN(KEYIN6),
1336         GPIO_FN(KEYOUT7),       GPIO_FN(KEYIN7),
1337
1338         /* LCDC */
1339         GPIO_FN(LCDHSYN),       GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
1340         GPIO_FN(LCDDCK),        GPIO_FN(LCDWR), GPIO_FN(LCDRD),
1341         GPIO_FN(LCDDISP),       GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
1342         GPIO_FN(LCDDON),
1343
1344         GPIO_FN(LCDD0),         GPIO_FN(LCDD1),         GPIO_FN(LCDD2),
1345         GPIO_FN(LCDD3),         GPIO_FN(LCDD4),         GPIO_FN(LCDD5),
1346         GPIO_FN(LCDD6),         GPIO_FN(LCDD7),         GPIO_FN(LCDD8),
1347         GPIO_FN(LCDD9),         GPIO_FN(LCDD10),        GPIO_FN(LCDD11),
1348         GPIO_FN(LCDD12),        GPIO_FN(LCDD13),        GPIO_FN(LCDD14),
1349         GPIO_FN(LCDD15),        GPIO_FN(LCDD16),        GPIO_FN(LCDD17),
1350         GPIO_FN(LCDD18),        GPIO_FN(LCDD19),        GPIO_FN(LCDD20),
1351         GPIO_FN(LCDD21),        GPIO_FN(LCDD22),        GPIO_FN(LCDD23),
1352
1353         GPIO_FN(LCDC0_SELECT),
1354         GPIO_FN(LCDC1_SELECT),
1355
1356         /* IRDA */
1357         GPIO_FN(IRDA_OUT),      GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_FIRSEL),
1358         GPIO_FN(IROUT_139),     GPIO_FN(IROUT_140),
1359
1360         /* TSIF1 */
1361         GPIO_FN(TS0_1SELECT),
1362         GPIO_FN(TS0_2SELECT),
1363         GPIO_FN(TS1_1SELECT),
1364         GPIO_FN(TS1_2SELECT),
1365
1366         GPIO_FN(TS_SPSYNC1),    GPIO_FN(TS_SDAT1),
1367         GPIO_FN(TS_SDEN1),      GPIO_FN(TS_SCK1),
1368
1369         /* TSIF2 */
1370         GPIO_FN(TS_SPSYNC2),    GPIO_FN(TS_SDAT2),
1371         GPIO_FN(TS_SDEN2),      GPIO_FN(TS_SCK2),
1372
1373         /* HDMI */
1374         GPIO_FN(HDMI_HPD),      GPIO_FN(HDMI_CEC),
1375
1376         /* SDENC */
1377         GPIO_FN(SDENC_CPG),
1378         GPIO_FN(SDENC_DV_CLKI),
1379 };
1380
1381 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
1382         PORTCR(0,       0xE6051000), /* PORT0CR */
1383         PORTCR(1,       0xE6051001), /* PORT1CR */
1384         PORTCR(2,       0xE6051002), /* PORT2CR */
1385         PORTCR(3,       0xE6051003), /* PORT3CR */
1386         PORTCR(4,       0xE6051004), /* PORT4CR */
1387         PORTCR(5,       0xE6051005), /* PORT5CR */
1388         PORTCR(6,       0xE6051006), /* PORT6CR */
1389         PORTCR(7,       0xE6051007), /* PORT7CR */
1390         PORTCR(8,       0xE6051008), /* PORT8CR */
1391         PORTCR(9,       0xE6051009), /* PORT9CR */
1392         PORTCR(10,      0xE605100A), /* PORT10CR */
1393         PORTCR(11,      0xE605100B), /* PORT11CR */
1394         PORTCR(12,      0xE605100C), /* PORT12CR */
1395         PORTCR(13,      0xE605100D), /* PORT13CR */
1396         PORTCR(14,      0xE605100E), /* PORT14CR */
1397         PORTCR(15,      0xE605100F), /* PORT15CR */
1398         PORTCR(16,      0xE6051010), /* PORT16CR */
1399         PORTCR(17,      0xE6051011), /* PORT17CR */
1400         PORTCR(18,      0xE6051012), /* PORT18CR */
1401         PORTCR(19,      0xE6051013), /* PORT19CR */
1402         PORTCR(20,      0xE6051014), /* PORT20CR */
1403         PORTCR(21,      0xE6051015), /* PORT21CR */
1404         PORTCR(22,      0xE6051016), /* PORT22CR */
1405         PORTCR(23,      0xE6051017), /* PORT23CR */
1406         PORTCR(24,      0xE6051018), /* PORT24CR */
1407         PORTCR(25,      0xE6051019), /* PORT25CR */
1408         PORTCR(26,      0xE605101A), /* PORT26CR */
1409         PORTCR(27,      0xE605101B), /* PORT27CR */
1410         PORTCR(28,      0xE605101C), /* PORT28CR */
1411         PORTCR(29,      0xE605101D), /* PORT29CR */
1412         PORTCR(30,      0xE605101E), /* PORT30CR */
1413         PORTCR(31,      0xE605101F), /* PORT31CR */
1414         PORTCR(32,      0xE6051020), /* PORT32CR */
1415         PORTCR(33,      0xE6051021), /* PORT33CR */
1416         PORTCR(34,      0xE6051022), /* PORT34CR */
1417         PORTCR(35,      0xE6051023), /* PORT35CR */
1418         PORTCR(36,      0xE6051024), /* PORT36CR */
1419         PORTCR(37,      0xE6051025), /* PORT37CR */
1420         PORTCR(38,      0xE6051026), /* PORT38CR */
1421         PORTCR(39,      0xE6051027), /* PORT39CR */
1422         PORTCR(40,      0xE6051028), /* PORT40CR */
1423         PORTCR(41,      0xE6051029), /* PORT41CR */
1424         PORTCR(42,      0xE605102A), /* PORT42CR */
1425         PORTCR(43,      0xE605102B), /* PORT43CR */
1426         PORTCR(44,      0xE605102C), /* PORT44CR */
1427         PORTCR(45,      0xE605102D), /* PORT45CR */
1428         PORTCR(46,      0xE605202E), /* PORT46CR */
1429         PORTCR(47,      0xE605202F), /* PORT47CR */
1430         PORTCR(48,      0xE6052030), /* PORT48CR */
1431         PORTCR(49,      0xE6052031), /* PORT49CR */
1432         PORTCR(50,      0xE6052032), /* PORT50CR */
1433         PORTCR(51,      0xE6052033), /* PORT51CR */
1434         PORTCR(52,      0xE6052034), /* PORT52CR */
1435         PORTCR(53,      0xE6052035), /* PORT53CR */
1436         PORTCR(54,      0xE6052036), /* PORT54CR */
1437         PORTCR(55,      0xE6052037), /* PORT55CR */
1438         PORTCR(56,      0xE6052038), /* PORT56CR */
1439         PORTCR(57,      0xE6052039), /* PORT57CR */
1440         PORTCR(58,      0xE605203A), /* PORT58CR */
1441         PORTCR(59,      0xE605203B), /* PORT59CR */
1442         PORTCR(60,      0xE605203C), /* PORT60CR */
1443         PORTCR(61,      0xE605203D), /* PORT61CR */
1444         PORTCR(62,      0xE605203E), /* PORT62CR */
1445         PORTCR(63,      0xE605203F), /* PORT63CR */
1446         PORTCR(64,      0xE6052040), /* PORT64CR */
1447         PORTCR(65,      0xE6052041), /* PORT65CR */
1448         PORTCR(66,      0xE6052042), /* PORT66CR */
1449         PORTCR(67,      0xE6052043), /* PORT67CR */
1450         PORTCR(68,      0xE6052044), /* PORT68CR */
1451         PORTCR(69,      0xE6052045), /* PORT69CR */
1452         PORTCR(70,      0xE6052046), /* PORT70CR */
1453         PORTCR(71,      0xE6052047), /* PORT71CR */
1454         PORTCR(72,      0xE6052048), /* PORT72CR */
1455         PORTCR(73,      0xE6052049), /* PORT73CR */
1456         PORTCR(74,      0xE605204A), /* PORT74CR */
1457         PORTCR(75,      0xE605204B), /* PORT75CR */
1458         PORTCR(76,      0xE605004C), /* PORT76CR */
1459         PORTCR(77,      0xE605004D), /* PORT77CR */
1460         PORTCR(78,      0xE605004E), /* PORT78CR */
1461         PORTCR(79,      0xE605004F), /* PORT79CR */
1462         PORTCR(80,      0xE6050050), /* PORT80CR */
1463         PORTCR(81,      0xE6050051), /* PORT81CR */
1464         PORTCR(82,      0xE6050052), /* PORT82CR */
1465         PORTCR(83,      0xE6050053), /* PORT83CR */
1466         PORTCR(84,      0xE6050054), /* PORT84CR */
1467         PORTCR(85,      0xE6050055), /* PORT85CR */
1468         PORTCR(86,      0xE6050056), /* PORT86CR */
1469         PORTCR(87,      0xE6050057), /* PORT87CR */
1470         PORTCR(88,      0xE6050058), /* PORT88CR */
1471         PORTCR(89,      0xE6050059), /* PORT89CR */
1472         PORTCR(90,      0xE605005A), /* PORT90CR */
1473         PORTCR(91,      0xE605005B), /* PORT91CR */
1474         PORTCR(92,      0xE605005C), /* PORT92CR */
1475         PORTCR(93,      0xE605005D), /* PORT93CR */
1476         PORTCR(94,      0xE605005E), /* PORT94CR */
1477         PORTCR(95,      0xE605005F), /* PORT95CR */
1478         PORTCR(96,      0xE6050060), /* PORT96CR */
1479         PORTCR(97,      0xE6050061), /* PORT97CR */
1480         PORTCR(98,      0xE6050062), /* PORT98CR */
1481         PORTCR(99,      0xE6050063), /* PORT99CR */
1482         PORTCR(100,     0xE6053064), /* PORT100CR */
1483         PORTCR(101,     0xE6053065), /* PORT101CR */
1484         PORTCR(102,     0xE6053066), /* PORT102CR */
1485         PORTCR(103,     0xE6053067), /* PORT103CR */
1486         PORTCR(104,     0xE6053068), /* PORT104CR */
1487         PORTCR(105,     0xE6053069), /* PORT105CR */
1488         PORTCR(106,     0xE605306A), /* PORT106CR */
1489         PORTCR(107,     0xE605306B), /* PORT107CR */
1490         PORTCR(108,     0xE605306C), /* PORT108CR */
1491         PORTCR(109,     0xE605306D), /* PORT109CR */
1492         PORTCR(110,     0xE605306E), /* PORT110CR */
1493         PORTCR(111,     0xE605306F), /* PORT111CR */
1494         PORTCR(112,     0xE6053070), /* PORT112CR */
1495         PORTCR(113,     0xE6053071), /* PORT113CR */
1496         PORTCR(114,     0xE6053072), /* PORT114CR */
1497         PORTCR(115,     0xE6053073), /* PORT115CR */
1498         PORTCR(116,     0xE6053074), /* PORT116CR */
1499         PORTCR(117,     0xE6053075), /* PORT117CR */
1500         PORTCR(118,     0xE6053076), /* PORT118CR */
1501         PORTCR(119,     0xE6053077), /* PORT119CR */
1502         PORTCR(120,     0xE6053078), /* PORT120CR */
1503         PORTCR(121,     0xE6050079), /* PORT121CR */
1504         PORTCR(122,     0xE605007A), /* PORT122CR */
1505         PORTCR(123,     0xE605007B), /* PORT123CR */
1506         PORTCR(124,     0xE605007C), /* PORT124CR */
1507         PORTCR(125,     0xE605007D), /* PORT125CR */
1508         PORTCR(126,     0xE605007E), /* PORT126CR */
1509         PORTCR(127,     0xE605007F), /* PORT127CR */
1510         PORTCR(128,     0xE6050080), /* PORT128CR */
1511         PORTCR(129,     0xE6050081), /* PORT129CR */
1512         PORTCR(130,     0xE6050082), /* PORT130CR */
1513         PORTCR(131,     0xE6050083), /* PORT131CR */
1514         PORTCR(132,     0xE6050084), /* PORT132CR */
1515         PORTCR(133,     0xE6050085), /* PORT133CR */
1516         PORTCR(134,     0xE6050086), /* PORT134CR */
1517         PORTCR(135,     0xE6050087), /* PORT135CR */
1518         PORTCR(136,     0xE6050088), /* PORT136CR */
1519         PORTCR(137,     0xE6050089), /* PORT137CR */
1520         PORTCR(138,     0xE605008A), /* PORT138CR */
1521         PORTCR(139,     0xE605008B), /* PORT139CR */
1522         PORTCR(140,     0xE605008C), /* PORT140CR */
1523         PORTCR(141,     0xE605008D), /* PORT141CR */
1524         PORTCR(142,     0xE605008E), /* PORT142CR */
1525         PORTCR(143,     0xE605008F), /* PORT143CR */
1526         PORTCR(144,     0xE6050090), /* PORT144CR */
1527         PORTCR(145,     0xE6050091), /* PORT145CR */
1528         PORTCR(146,     0xE6050092), /* PORT146CR */
1529         PORTCR(147,     0xE6050093), /* PORT147CR */
1530         PORTCR(148,     0xE6050094), /* PORT148CR */
1531         PORTCR(149,     0xE6050095), /* PORT149CR */
1532         PORTCR(150,     0xE6050096), /* PORT150CR */
1533         PORTCR(151,     0xE6050097), /* PORT151CR */
1534         PORTCR(152,     0xE6053098), /* PORT152CR */
1535         PORTCR(153,     0xE6053099), /* PORT153CR */
1536         PORTCR(154,     0xE605309A), /* PORT154CR */
1537         PORTCR(155,     0xE605309B), /* PORT155CR */
1538         PORTCR(156,     0xE605009C), /* PORT156CR */
1539         PORTCR(157,     0xE605009D), /* PORT157CR */
1540         PORTCR(158,     0xE605009E), /* PORT158CR */
1541         PORTCR(159,     0xE605009F), /* PORT159CR */
1542         PORTCR(160,     0xE60500A0), /* PORT160CR */
1543         PORTCR(161,     0xE60500A1), /* PORT161CR */
1544         PORTCR(162,     0xE60500A2), /* PORT162CR */
1545         PORTCR(163,     0xE60500A3), /* PORT163CR */
1546         PORTCR(164,     0xE60500A4), /* PORT164CR */
1547         PORTCR(165,     0xE60500A5), /* PORT165CR */
1548         PORTCR(166,     0xE60500A6), /* PORT166CR */
1549         PORTCR(167,     0xE60520A7), /* PORT167CR */
1550         PORTCR(168,     0xE60520A8), /* PORT168CR */
1551         PORTCR(169,     0xE60520A9), /* PORT169CR */
1552         PORTCR(170,     0xE60520AA), /* PORT170CR */
1553         PORTCR(171,     0xE60520AB), /* PORT171CR */
1554         PORTCR(172,     0xE60520AC), /* PORT172CR */
1555         PORTCR(173,     0xE60520AD), /* PORT173CR */
1556         PORTCR(174,     0xE60520AE), /* PORT174CR */
1557         PORTCR(175,     0xE60520AF), /* PORT175CR */
1558         PORTCR(176,     0xE60520B0), /* PORT176CR */
1559         PORTCR(177,     0xE60520B1), /* PORT177CR */
1560         PORTCR(178,     0xE60520B2), /* PORT178CR */
1561         PORTCR(179,     0xE60520B3), /* PORT179CR */
1562         PORTCR(180,     0xE60520B4), /* PORT180CR */
1563         PORTCR(181,     0xE60520B5), /* PORT181CR */
1564         PORTCR(182,     0xE60520B6), /* PORT182CR */
1565         PORTCR(183,     0xE60520B7), /* PORT183CR */
1566         PORTCR(184,     0xE60520B8), /* PORT184CR */
1567         PORTCR(185,     0xE60520B9), /* PORT185CR */
1568         PORTCR(186,     0xE60520BA), /* PORT186CR */
1569         PORTCR(187,     0xE60520BB), /* PORT187CR */
1570         PORTCR(188,     0xE60520BC), /* PORT188CR */
1571         PORTCR(189,     0xE60520BD), /* PORT189CR */
1572         PORTCR(190,     0xE60520BE), /* PORT190CR */
1573
1574         { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
1575                         MSEL1CR_31_0,   MSEL1CR_31_1,
1576                         MSEL1CR_30_0,   MSEL1CR_30_1,
1577                         MSEL1CR_29_0,   MSEL1CR_29_1,
1578                         MSEL1CR_28_0,   MSEL1CR_28_1,
1579                         MSEL1CR_27_0,   MSEL1CR_27_1,
1580                         MSEL1CR_26_0,   MSEL1CR_26_1,
1581                         0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1582                         0, 0, 0, 0, 0, 0, 0, 0,
1583                         MSEL1CR_16_0,   MSEL1CR_16_1,
1584                         MSEL1CR_15_0,   MSEL1CR_15_1,
1585                         MSEL1CR_14_0,   MSEL1CR_14_1,
1586                         MSEL1CR_13_0,   MSEL1CR_13_1,
1587                         MSEL1CR_12_0,   MSEL1CR_12_1,
1588                         0, 0, 0, 0,
1589                         MSEL1CR_9_0,    MSEL1CR_9_1,
1590                         MSEL1CR_8_0,    MSEL1CR_8_1,
1591                         MSEL1CR_7_0,    MSEL1CR_7_1,
1592                         MSEL1CR_6_0,    MSEL1CR_6_1,
1593                         0, 0,
1594                         MSEL1CR_4_0,    MSEL1CR_4_1,
1595                         MSEL1CR_3_0,    MSEL1CR_3_1,
1596                         MSEL1CR_2_0,    MSEL1CR_2_1,
1597                         0, 0,
1598                         MSEL1CR_0_0,    MSEL1CR_0_1,
1599                 }
1600         },
1601         { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
1602                         0, 0, 0, 0,
1603                         0, 0, 0, 0,
1604                         MSEL3CR_27_0,   MSEL3CR_27_1,
1605                         MSEL3CR_26_0,   MSEL3CR_26_1,
1606                         0, 0, 0, 0,
1607                         0, 0, 0, 0,
1608                         MSEL3CR_21_0,   MSEL3CR_21_1,
1609                         MSEL3CR_20_0,   MSEL3CR_20_1,
1610                         0, 0, 0, 0,
1611                         0, 0, 0, 0,
1612                         MSEL3CR_15_0,   MSEL3CR_15_1,
1613                         0, 0, 0, 0,
1614                         0, 0, 0, 0,
1615                         0, 0,
1616                         MSEL3CR_9_0,    MSEL3CR_9_1,
1617                         0, 0, 0, 0,
1618                         MSEL3CR_6_0,    MSEL3CR_6_1,
1619                         0, 0, 0, 0,
1620                         0, 0, 0, 0,
1621                         0, 0, 0, 0,
1622                         }
1623         },
1624         { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
1625                         0, 0, 0, 0,
1626                         0, 0, 0, 0,
1627                         0, 0, 0, 0,
1628                         0, 0, 0, 0,
1629                         0, 0, 0, 0,
1630                         0, 0, 0, 0,
1631                         MSEL4CR_19_0,   MSEL4CR_19_1,
1632                         MSEL4CR_18_0,   MSEL4CR_18_1,
1633                         MSEL4CR_17_0,   MSEL4CR_17_1,
1634                         MSEL4CR_16_0,   MSEL4CR_16_1,
1635                         MSEL4CR_15_0,   MSEL4CR_15_1,
1636                         MSEL4CR_14_0,   MSEL4CR_14_1,
1637                         0, 0, 0, 0,
1638                         0, 0,
1639                         MSEL4CR_10_0,   MSEL4CR_10_1,
1640                         0, 0, 0, 0,
1641                         0, 0,
1642                         MSEL4CR_6_0,    MSEL4CR_6_1,
1643                         0, 0,
1644                         MSEL4CR_4_0,    MSEL4CR_4_1,
1645                         0, 0, 0, 0,
1646                         MSEL4CR_1_0,    MSEL4CR_1_1,
1647                         0, 0,
1648                 }
1649         },
1650         { },
1651 };
1652
1653 static const struct pinmux_data_reg pinmux_data_regs[] = {
1654         { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
1655                         PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1656                         PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1657                         PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1658                         PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1659                         PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1660                         0, 0, 0, 0,
1661                         0, 0, 0, 0,
1662                         0, 0, 0, 0,
1663                 }
1664         },
1665         { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
1666                         PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
1667                         PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
1668                         0, 0, 0, 0,
1669                         0, 0, 0, 0,
1670                         0, 0, 0, 0,
1671                         0, 0, 0, 0,
1672                         0, 0, 0, 0,
1673                         PORT99_DATA,  PORT98_DATA,  PORT97_DATA,  PORT96_DATA,
1674                 }
1675         },
1676         { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
1677                         PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1678                         0, 0, 0, 0,
1679                         PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1680                         PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1681                         PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1682                         PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1683                         PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1684                         PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
1685                 }
1686         },
1687         { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
1688                         0, 0, 0, 0,
1689                         0, 0, 0, 0,
1690                         0, 0, 0, 0,
1691                         0, 0, 0, 0,
1692                         0, 0, 0, 0,
1693                         0, 0, 0, 0,
1694                         0,            PORT166_DATA, PORT165_DATA, PORT164_DATA,
1695                         PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
1696                 }
1697         },
1698         { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
1699                         PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1700                         PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1701                         PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1702                         PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1703                         PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1704                         PORT11_DATA, PORT10_DATA, PORT9_DATA,  PORT8_DATA,
1705                         PORT7_DATA,  PORT6_DATA,  PORT5_DATA,  PORT4_DATA,
1706                         PORT3_DATA,  PORT2_DATA,  PORT1_DATA,  PORT0_DATA,
1707                 }
1708         },
1709         { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
1710                         0, 0, 0, 0, 0, 0, 0, 0,
1711                         0, 0, 0, 0, 0, 0, 0, 0,
1712                         0,           0,           PORT45_DATA, PORT44_DATA,
1713                         PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1714                         PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1715                         PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
1716                 }
1717         },
1718         { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
1719                         PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1720                         PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1721                         PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1722                         PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1723                         PORT47_DATA, PORT46_DATA, 0, 0,
1724                         0, 0, 0, 0,
1725                         0, 0, 0, 0,
1726                         0, 0, 0, 0,
1727                 }
1728         },
1729         { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
1730                         0, 0, 0, 0,
1731                         0, 0, 0, 0,
1732                         0, 0, 0, 0,
1733                         0, 0, 0, 0,
1734                         0, 0, 0, 0,
1735                         PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1736                         PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1737                         PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
1738                 }
1739         },
1740         { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
1741                         0,            PORT190_DATA, PORT189_DATA, PORT188_DATA,
1742                         PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
1743                         PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
1744                         PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
1745                         PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
1746                         PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
1747                         PORT167_DATA, 0, 0, 0,
1748                         0, 0, 0, 0,
1749                 }
1750         },
1751         { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
1752                         0, 0, 0, 0,
1753                         0, 0, 0, PORT120_DATA,
1754                         PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1755                         PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1756                         PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1757                         PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1758                         PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1759                         0, 0, 0, 0,
1760                 }
1761         },
1762         { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
1763                         0, 0, 0, 0,
1764                         PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1765                         0, 0, 0, 0,
1766                         0, 0, 0, 0,
1767                         0, 0, 0, 0,
1768                         0, 0, 0, 0,
1769                         0, 0, 0, 0,
1770                         0, 0, 0, 0,
1771                 }
1772         },
1773         { },
1774 };
1775
1776 #define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
1777 #define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
1778 static const struct pinmux_irq pinmux_irqs[] = {
1779         PINMUX_IRQ(EXT_IRQ16L(0), GPIO_PORT6, GPIO_PORT162),
1780         PINMUX_IRQ(EXT_IRQ16L(1), GPIO_PORT12),
1781         PINMUX_IRQ(EXT_IRQ16L(2), GPIO_PORT4, GPIO_PORT5),
1782         PINMUX_IRQ(EXT_IRQ16L(3), GPIO_PORT8, GPIO_PORT16),
1783         PINMUX_IRQ(EXT_IRQ16L(4), GPIO_PORT17, GPIO_PORT163),
1784         PINMUX_IRQ(EXT_IRQ16L(5), GPIO_PORT18),
1785         PINMUX_IRQ(EXT_IRQ16L(6), GPIO_PORT39, GPIO_PORT164),
1786         PINMUX_IRQ(EXT_IRQ16L(7), GPIO_PORT40, GPIO_PORT167),
1787         PINMUX_IRQ(EXT_IRQ16L(8), GPIO_PORT41, GPIO_PORT168),
1788         PINMUX_IRQ(EXT_IRQ16L(9), GPIO_PORT42, GPIO_PORT169),
1789         PINMUX_IRQ(EXT_IRQ16L(10), GPIO_PORT65),
1790         PINMUX_IRQ(EXT_IRQ16L(11), GPIO_PORT67),
1791         PINMUX_IRQ(EXT_IRQ16L(12), GPIO_PORT80, GPIO_PORT137),
1792         PINMUX_IRQ(EXT_IRQ16L(13), GPIO_PORT81, GPIO_PORT145),
1793         PINMUX_IRQ(EXT_IRQ16L(14), GPIO_PORT82, GPIO_PORT146),
1794         PINMUX_IRQ(EXT_IRQ16L(15), GPIO_PORT83, GPIO_PORT147),
1795         PINMUX_IRQ(EXT_IRQ16H(16), GPIO_PORT84, GPIO_PORT170),
1796         PINMUX_IRQ(EXT_IRQ16H(17), GPIO_PORT85),
1797         PINMUX_IRQ(EXT_IRQ16H(18), GPIO_PORT86),
1798         PINMUX_IRQ(EXT_IRQ16H(19), GPIO_PORT87),
1799         PINMUX_IRQ(EXT_IRQ16H(20), GPIO_PORT92),
1800         PINMUX_IRQ(EXT_IRQ16H(21), GPIO_PORT93),
1801         PINMUX_IRQ(EXT_IRQ16H(22), GPIO_PORT94),
1802         PINMUX_IRQ(EXT_IRQ16H(23), GPIO_PORT95),
1803         PINMUX_IRQ(EXT_IRQ16H(24), GPIO_PORT112),
1804         PINMUX_IRQ(EXT_IRQ16H(25), GPIO_PORT119),
1805         PINMUX_IRQ(EXT_IRQ16H(26), GPIO_PORT121, GPIO_PORT172),
1806         PINMUX_IRQ(EXT_IRQ16H(27), GPIO_PORT122, GPIO_PORT180),
1807         PINMUX_IRQ(EXT_IRQ16H(28), GPIO_PORT123, GPIO_PORT181),
1808         PINMUX_IRQ(EXT_IRQ16H(29), GPIO_PORT129, GPIO_PORT182),
1809         PINMUX_IRQ(EXT_IRQ16H(30), GPIO_PORT130, GPIO_PORT183),
1810         PINMUX_IRQ(EXT_IRQ16H(31), GPIO_PORT138, GPIO_PORT184),
1811 };
1812
1813 const struct sh_pfc_soc_info sh7372_pinmux_info = {
1814         .name = "sh7372_pfc",
1815         .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1816         .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1817         .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1818         .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1819         .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1820
1821         .pins = pinmux_pins,
1822         .nr_pins = ARRAY_SIZE(pinmux_pins),
1823         .groups = pinmux_groups,
1824         .nr_groups = ARRAY_SIZE(pinmux_groups),
1825         .functions = pinmux_functions,
1826         .nr_functions = ARRAY_SIZE(pinmux_functions),
1827
1828         .func_gpios = pinmux_func_gpios,
1829         .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
1830
1831         .cfg_regs = pinmux_config_regs,
1832         .data_regs = pinmux_data_regs,
1833
1834         .gpio_data = pinmux_data,
1835         .gpio_data_size = ARRAY_SIZE(pinmux_data),
1836
1837         .gpio_irq = pinmux_irqs,
1838         .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
1839 };