2 * Rockchip USB2.0 PHY with Innosilicon IP block driver
4 * Copyright (C) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/jiffies.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/mutex.h>
27 #include <linux/of_address.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_platform.h>
30 #include <linux/phy/phy.h>
31 #include <linux/platform_device.h>
32 #include <linux/regmap.h>
33 #include <linux/mfd/syscon.h>
35 #define BIT_WRITEABLE_SHIFT 16
36 #define SCHEDULE_DELAY (60 * HZ)
38 enum rockchip_usb2phy_port_id {
44 enum rockchip_usb2phy_host_state {
45 PHY_STATE_HS_ONLINE = 0,
46 PHY_STATE_DISCONNECT = 1,
47 PHY_STATE_HS_CONNECT = 2,
48 PHY_STATE_FS_CONNECT = 4,
54 unsigned int bitstart;
60 * struct rockchip_usb2phy_port_cfg: usb-phy port configuration.
61 * @phy_sus: phy suspend register.
62 * @ls_det_en: linestate detection enable register.
63 * @ls_det_st: linestate detection state register.
64 * @ls_det_clr: linestate detection clear register.
65 * @utmi_ls: utmi linestate state register.
66 * @utmi_hstdet: utmi host disconnect register.
68 struct rockchip_usb2phy_port_cfg {
69 struct usb2phy_reg phy_sus;
70 struct usb2phy_reg ls_det_en;
71 struct usb2phy_reg ls_det_st;
72 struct usb2phy_reg ls_det_clr;
73 struct usb2phy_reg utmi_ls;
74 struct usb2phy_reg utmi_hstdet;
78 * struct rockchip_usb2phy_cfg: usb-phy configuration.
79 * @num_ports: specify how many ports that the phy has.
80 * @clkout_ctl: keep on/turn off output clk of phy.
82 struct rockchip_usb2phy_cfg {
83 unsigned int num_ports;
84 struct usb2phy_reg clkout_ctl;
85 const struct rockchip_usb2phy_port_cfg *port_cfgs;
89 * struct rockchip_usb2phy_port: usb-phy port data.
90 * @port_id: flag for otg port or host port.
91 * @suspended: phy suspended flag.
92 * @ls_irq: IRQ number assigned for linestate detection.
93 * @mutex: for register updating in sm_work.
94 * @sm_work: OTG state machine work.
95 * @phy_cfg: port register configuration, assigned by driver data.
97 struct rockchip_usb2phy_port {
103 struct delayed_work sm_work;
104 const struct rockchip_usb2phy_port_cfg *port_cfg;
108 * struct rockchip_usb2phy: usb2.0 phy driver data.
109 * @grf: General Register Files regmap.
110 * @clk480m: clock struct of phy output clk.
111 * @clk_hw: clock struct of phy output clk management.
112 * @vbus_host_gpio: host VBUS direction output.
113 * @phy_cfg: phy register configuration, assigned by driver data.
114 * @ports: phy port instance.
116 struct rockchip_usb2phy {
120 struct clk_hw clk480m_hw;
121 struct gpio_desc *vbus_host_gpio;
122 const struct rockchip_usb2phy_cfg *phy_cfg;
123 struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
126 static inline int property_enable(struct rockchip_usb2phy *rphy,
127 const struct usb2phy_reg *reg, bool en)
129 unsigned int val, mask, tmp;
131 tmp = en ? reg->enable : reg->disable;
132 mask = GENMASK(reg->bitend, reg->bitstart);
133 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
135 return regmap_write(rphy->grf, reg->offset, val);
138 static inline bool property_enabled(struct rockchip_usb2phy *rphy,
139 const struct usb2phy_reg *reg)
142 unsigned int tmp, orig;
143 unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
145 ret = regmap_read(rphy->grf, reg->offset, &orig);
149 tmp = (orig & mask) >> reg->bitstart;
150 return tmp == reg->enable;
153 static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw)
155 struct rockchip_usb2phy *rphy =
156 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
159 /* turn on 480m clk output if it is off */
160 if (!property_enabled(rphy, &rphy->phy_cfg->clkout_ctl)) {
161 ret = property_enable(rphy, &rphy->phy_cfg->clkout_ctl, true);
165 /* waitting for the clk become stable */
172 static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw)
174 struct rockchip_usb2phy *rphy =
175 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
178 /* make sure all ports in suspended mode */
179 for (index = 0; index != rphy->phy_cfg->num_ports; index++)
180 if (!rphy->ports[index].suspended)
183 /* turn off 480m clk output */
184 property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
187 static int rockchip_usb2phy_clk480m_enabled(struct clk_hw *hw)
189 struct rockchip_usb2phy *rphy =
190 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
192 return property_enabled(rphy, &rphy->phy_cfg->clkout_ctl);
196 rockchip_usb2phy_clk480m_recalc_rate(struct clk_hw *hw,
197 unsigned long parent_rate)
202 static const struct clk_ops rockchip_usb2phy_clkout_ops = {
203 .enable = rockchip_usb2phy_clk480m_enable,
204 .disable = rockchip_usb2phy_clk480m_disable,
205 .is_enabled = rockchip_usb2phy_clk480m_enabled,
206 .recalc_rate = rockchip_usb2phy_clk480m_recalc_rate,
210 rockchip_usb2phy_clk480m_register(struct rockchip_usb2phy *rphy)
212 struct device_node *node = rphy->dev->of_node;
214 struct clk_init_data init;
216 init.name = "clk_usbphy_480m";
217 init.ops = &rockchip_usb2phy_clkout_ops;
218 init.flags = CLK_IS_ROOT;
219 init.parent_names = NULL;
220 init.num_parents = 0;
221 rphy->clk480m_hw.init = &init;
223 /* optional override of the clockname */
224 of_property_read_string(node, "clock-output-names", &init.name);
226 /* register the clock */
227 clk = clk_register(rphy->dev, &rphy->clk480m_hw);
229 of_clk_add_provider(node, of_clk_src_simple_get, clk);
234 static int rockchip_usb2phy_init(struct phy *phy)
236 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
237 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
240 if (rport->port_id == USB2PHY_PORT_HOST) {
241 /* clear linestate and enable linestate detect irq */
242 mutex_lock(&rport->mutex);
244 ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
246 mutex_unlock(&rport->mutex);
250 ret = property_enable(rphy, &rport->port_cfg->ls_det_en, true);
252 mutex_unlock(&rport->mutex);
256 mutex_unlock(&rport->mutex);
257 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY);
263 static int rockchip_usb2phy_resume(struct phy *phy)
265 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
266 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
269 dev_dbg(&rport->phy->dev, "port resume\n");
271 ret = clk_prepare_enable(rphy->clk480m);
275 ret = property_enable(rphy, &rport->port_cfg->phy_sus, false);
279 rport->suspended = false;
283 static int rockchip_usb2phy_suspend(struct phy *phy)
285 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
286 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
289 dev_dbg(&rport->phy->dev, "port suspend\n");
291 ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
295 rport->suspended = true;
296 clk_disable_unprepare(rphy->clk480m);
300 static int rockchip_usb2phy_exit(struct phy *phy)
302 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
304 if (rport->port_id == USB2PHY_PORT_HOST)
305 cancel_delayed_work_sync(&rport->sm_work);
310 static const struct phy_ops rockchip_usb2phy_ops = {
311 .init = rockchip_usb2phy_init,
312 .exit = rockchip_usb2phy_exit,
313 .power_on = rockchip_usb2phy_resume,
314 .power_off = rockchip_usb2phy_suspend,
315 .owner = THIS_MODULE,
319 * The function manage host-phy port state and suspend/resume phy port
322 * we rely on utmi_linestate and utmi_hostdisconnect to identify whether
323 * FS/HS is disconnect or not. Besides, we do not need care it is FS
324 * disconnected or HS disconnected, actually, we just only need get the
325 * device is disconnected at last through rearm the delayed work,
326 * to suspend the phy port in _PHY_STATE_DISCONNECT_ case.
328 * NOTE: It will invoke some clk related APIs, so do not invoke it from
331 static void rockchip_usb2phy_sm_work(struct work_struct *work)
333 struct rockchip_usb2phy_port *rport =
334 container_of(work, struct rockchip_usb2phy_port, sm_work.work);
335 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
336 unsigned int sh = rport->port_cfg->utmi_hstdet.bitend -
337 rport->port_cfg->utmi_hstdet.bitstart + 1;
338 unsigned int ul, uhd, state;
339 unsigned int ul_mask, uhd_mask;
342 mutex_lock(&rport->mutex);
344 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_ls.offset, &ul);
348 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset,
353 uhd_mask = GENMASK(rport->port_cfg->utmi_hstdet.bitend,
354 rport->port_cfg->utmi_hstdet.bitstart);
355 ul_mask = GENMASK(rport->port_cfg->utmi_ls.bitend,
356 rport->port_cfg->utmi_ls.bitstart);
358 /* stitch on utmi_ls and utmi_hstdet as phy state */
359 state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) |
360 (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh);
363 case PHY_STATE_HS_ONLINE:
364 dev_dbg(&rport->phy->dev, "HS online\n");
366 case PHY_STATE_FS_CONNECT:
368 * For FS device, the online state share with connect state
369 * from utmi_ls and utmi_hstdet register, so we distinguish
370 * them via suspended flag.
372 if (!rport->suspended) {
373 dev_dbg(&rport->phy->dev, "FS online\n");
377 case PHY_STATE_HS_CONNECT:
378 if (rport->suspended) {
379 dev_dbg(&rport->phy->dev, "HS/FS connected\n");
380 rockchip_usb2phy_resume(rport->phy);
381 rport->suspended = false;
384 case PHY_STATE_DISCONNECT:
385 if (!rport->suspended) {
386 dev_dbg(&rport->phy->dev, "HS/FS disconnected\n");
387 rockchip_usb2phy_suspend(rport->phy);
388 rport->suspended = true;
392 * activate the linestate detection to get the next device
395 property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
396 property_enable(rphy, &rport->port_cfg->ls_det_en, true);
399 * we don't need to rearm the delayed work when the phy port
402 mutex_unlock(&rport->mutex);
405 dev_dbg(&rport->phy->dev, "unknown phy state\n");
410 mutex_unlock(&rport->mutex);
411 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY);
414 static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data)
416 struct rockchip_usb2phy_port *rport = data;
417 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
419 if (!property_enabled(rphy, &rport->port_cfg->ls_det_st))
422 mutex_lock(&rport->mutex);
424 /* disable linestate detect irq and clear its status */
425 property_enable(rphy, &rport->port_cfg->ls_det_en, false);
426 property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
428 mutex_unlock(&rport->mutex);
431 * In this case for host phy port, a new device is plugged in,
432 * meanwhile, if the phy port is suspended, we need rearm the work to
433 * resume it and mange its states; otherwise, we do nothing about that.
435 if (rport->suspended && rport->port_id == USB2PHY_PORT_HOST)
436 rockchip_usb2phy_sm_work(&rport->sm_work.work);
441 static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
442 struct rockchip_usb2phy_port *rport,
443 struct device_node *child_np)
447 rport->port_id = USB2PHY_PORT_HOST;
448 mutex_init(&rport->mutex);
449 INIT_DELAYED_WORK(&rport->sm_work, rockchip_usb2phy_sm_work);
451 rport->ls_irq = of_irq_get_byname(child_np, "linestate");
452 if (rport->ls_irq < 0) {
453 dev_err(rphy->dev, "no linestate irq provided\n");
454 return rport->ls_irq;
457 ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
458 rockchip_usb2phy_linestate_irq,
460 "rockchip_usb2phy", rport);
462 dev_err(rphy->dev, "failed to request irq handle\n");
469 static int rockchip_usb2phy_probe(struct platform_device *pdev)
471 struct device *dev = &pdev->dev;
472 struct device_node *np = dev->of_node;
473 struct device_node *child_np;
474 struct phy_provider *provider;
475 struct rockchip_usb2phy *rphy;
476 const struct of_device_id *match;
479 rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
483 match = of_match_device(dev->driver->of_match_table, dev);
484 if (!match || !match->data) {
485 dev_err(dev, "phy configs are not assigned!\n");
489 if (!dev->parent || !dev->parent->of_node)
492 rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
493 if (IS_ERR(rphy->grf))
494 return PTR_ERR(rphy->grf);
497 rphy->phy_cfg = match->data;
498 platform_set_drvdata(pdev, rphy);
500 rphy->clk480m = rockchip_usb2phy_clk480m_register(rphy);
501 if (IS_ERR(rphy->clk480m))
502 return PTR_ERR(rphy->clk480m);
504 rphy->vbus_host_gpio =
505 devm_gpiod_get_optional(dev, "vbus_host", GPIOD_OUT_HIGH);
506 if (!rphy->vbus_host_gpio)
507 dev_info(dev, "host_vbus is not assigned!\n");
508 else if (IS_ERR(rphy->vbus_host_gpio))
509 return PTR_ERR(rphy->vbus_host_gpio);
512 for_each_child_of_node(np, child_np) {
513 struct rockchip_usb2phy_port *rport = &rphy->ports[index];
516 phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops);
518 dev_err(dev, "failed to create phy\n");
524 rport->port_cfg = &rphy->phy_cfg->port_cfgs[index];
526 /* initialize otg/host port separately */
527 if (!of_node_cmp(child_np->name, "host-port")) {
528 ret = rockchip_usb2phy_host_port_init(rphy, rport,
534 phy_set_drvdata(rport->phy, rport);
538 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
539 return PTR_ERR_OR_ZERO(provider);
542 of_node_put(child_np);
543 of_clk_del_provider(np);
544 clk_unregister(rphy->clk480m);
548 static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs = {
550 .clkout_ctl = { 0x0724, 15, 15, 1, 0 },
551 .port_cfgs = (struct rockchip_usb2phy_port_cfg[]) {
553 .phy_sus = { 0x0728, 15, 0, 0, 0x1d1 },
554 .ls_det_en = { 0x0680, 4, 4, 0, 1 },
555 .ls_det_st = { 0x0690, 4, 4, 0, 1 },
556 .ls_det_clr = { 0x06a0, 4, 4, 0, 1 },
557 .utmi_ls = { 0x049c, 14, 13, 0, 1 },
558 .utmi_hstdet = { 0x049c, 12, 12, 0, 1 }
564 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
565 { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
568 MODULE_DEVICE_TABLE(of, rockchip_usb2phy_dt_match);
570 static struct platform_driver rockchip_usb2phy_driver = {
571 .probe = rockchip_usb2phy_probe,
573 .name = "rockchip-usb2phy",
574 .of_match_table = rockchip_usb2phy_dt_match,
577 module_platform_driver(rockchip_usb2phy_driver);
579 MODULE_AUTHOR("Frank Wang <frank.wang@rock-chips.com>");
580 MODULE_DESCRIPTION("Rockchip USB2.0 PHY driver");
581 MODULE_LICENSE("GPL v2");