4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
12 #include <linux/pci-ats.h>
13 #include <linux/pci.h>
17 static int ats_alloc_one(struct pci_dev *dev, int ps)
23 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
27 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
33 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
34 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
41 static void ats_free_one(struct pci_dev *dev)
48 * pci_enable_ats - enable the ATS capability
49 * @dev: the PCI device
50 * @ps: the IOMMU page shift
52 * Returns 0 on success, or negative on failure.
54 int pci_enable_ats(struct pci_dev *dev, int ps)
59 BUG_ON(dev->ats && dev->ats->is_enabled);
61 if (ps < PCI_ATS_MIN_STU)
64 if (dev->is_physfn || dev->is_virtfn) {
65 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
67 mutex_lock(&pdev->sriov->lock);
69 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
71 rc = ats_alloc_one(pdev, ps);
75 mutex_unlock(&pdev->sriov->lock);
80 if (!dev->is_physfn) {
81 rc = ats_alloc_one(dev, ps);
86 ctrl = PCI_ATS_CTRL_ENABLE;
88 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
89 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
91 dev->ats->is_enabled = 1;
95 EXPORT_SYMBOL_GPL(pci_enable_ats);
98 * pci_disable_ats - disable the ATS capability
99 * @dev: the PCI device
101 void pci_disable_ats(struct pci_dev *dev)
105 BUG_ON(!dev->ats || !dev->ats->is_enabled);
107 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
108 ctrl &= ~PCI_ATS_CTRL_ENABLE;
109 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
111 dev->ats->is_enabled = 0;
113 if (dev->is_physfn || dev->is_virtfn) {
114 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
116 mutex_lock(&pdev->sriov->lock);
117 pdev->ats->ref_cnt--;
118 if (!pdev->ats->ref_cnt)
120 mutex_unlock(&pdev->sriov->lock);
126 EXPORT_SYMBOL_GPL(pci_disable_ats);
129 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
130 * @dev: the PCI device
132 * Returns the queue depth on success, or negative on failure.
134 * The ATS spec uses 0 in the Invalidate Queue Depth field to
135 * indicate that the function can accept 32 Invalidate Request.
136 * But here we use the `real' values (i.e. 1~32) for the Queue
137 * Depth; and 0 indicates the function shares the Queue with
138 * other functions (doesn't exclusively own a Queue).
140 int pci_ats_queue_depth(struct pci_dev *dev)
149 return dev->ats->qdep;
151 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
155 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
157 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
160 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
162 #ifdef CONFIG_PCI_PRI
164 * pci_enable_pri - Enable PRI capability
165 * @ pdev: PCI device structure
167 * Returns 0 on success, negative value on error
169 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
175 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
179 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
180 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
181 if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED))
184 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests);
185 reqs = min(max_requests, reqs);
186 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs);
188 control |= PCI_PRI_ENABLE;
189 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
193 EXPORT_SYMBOL_GPL(pci_enable_pri);
196 * pci_disable_pri - Disable PRI capability
197 * @pdev: PCI device structure
199 * Only clears the enabled-bit, regardless of its former value
201 void pci_disable_pri(struct pci_dev *pdev)
206 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
210 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
211 control &= ~PCI_PRI_ENABLE;
212 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
214 EXPORT_SYMBOL_GPL(pci_disable_pri);
217 * pci_pri_enabled - Checks if PRI capability is enabled
218 * @pdev: PCI device structure
220 * Returns true if PRI is enabled on the device, false otherwise
222 bool pci_pri_enabled(struct pci_dev *pdev)
227 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
231 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
233 return (control & PCI_PRI_ENABLE) ? true : false;
235 EXPORT_SYMBOL_GPL(pci_pri_enabled);
238 * pci_reset_pri - Resets device's PRI state
239 * @pdev: PCI device structure
241 * The PRI capability must be disabled before this function is called.
242 * Returns 0 on success, negative value on error.
244 int pci_reset_pri(struct pci_dev *pdev)
249 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
253 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
254 if (control & PCI_PRI_ENABLE)
257 control |= PCI_PRI_RESET;
259 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
263 EXPORT_SYMBOL_GPL(pci_reset_pri);
266 * pci_pri_stopped - Checks whether the PRI capability is stopped
267 * @pdev: PCI device structure
269 * Returns true if the PRI capability on the device is disabled and the
270 * device has no outstanding PRI requests, false otherwise. The device
271 * indicates this via the STOPPED bit in the status register of the
273 * The device internal state can be cleared by resetting the PRI state
274 * with pci_reset_pri(). This can force the capability into the STOPPED
277 bool pci_pri_stopped(struct pci_dev *pdev)
282 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
286 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
287 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
289 if (control & PCI_PRI_ENABLE)
292 return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
294 EXPORT_SYMBOL_GPL(pci_pri_stopped);
297 * pci_pri_status - Request PRI status of a device
298 * @pdev: PCI device structure
300 * Returns negative value on failure, status on success. The status can
301 * be checked against status-bits. Supported bits are currently:
302 * PCI_PRI_STATUS_RF: Response failure
303 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
304 * PCI_PRI_STATUS_STOPPED: PRI has stopped
306 int pci_pri_status(struct pci_dev *pdev)
311 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
315 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
316 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
318 /* Stopped bit is undefined when enable == 1, so clear it */
319 if (control & PCI_PRI_ENABLE)
320 status &= ~PCI_PRI_STATUS_STOPPED;
324 EXPORT_SYMBOL_GPL(pci_pri_status);
325 #endif /* CONFIG_PCI_PRI */