1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
36 #include <linux/export.h>
37 #include <linux/kmemleak.h>
38 #include <linux/module.h>
40 MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
41 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
42 MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
43 MODULE_LICENSE("GPL");
44 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
46 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
53 static const u8 ac_to_hwq[] = {
60 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
63 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
64 __le16 fc = rtl_get_fc(skb);
65 u8 queue_index = skb_get_queue_mapping(skb);
67 if (unlikely(ieee80211_is_beacon(fc)))
69 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
71 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
72 if (ieee80211_is_nullfunc(fc))
75 return ac_to_hwq[queue_index];
78 /* Update PCI dependent default settings*/
79 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
81 struct rtl_priv *rtlpriv = rtl_priv(hw);
82 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
83 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
84 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
85 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
88 ppsc->reg_rfps_level = 0;
89 ppsc->support_aspm = false;
91 /*Update PCI ASPM setting */
92 ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
93 switch (rtlpci->const_pci_aspm) {
99 /*ASPM dynamically enabled/disable. */
100 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
104 /*ASPM with Clock Req dynamically enabled/disable. */
105 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
106 RT_RF_OFF_LEVL_CLK_REQ);
111 * Always enable ASPM and Clock Req
112 * from initialization to halt.
114 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
115 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
116 RT_RF_OFF_LEVL_CLK_REQ);
121 * Always enable ASPM without Clock Req
122 * from initialization to halt.
124 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
125 RT_RF_OFF_LEVL_CLK_REQ);
126 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
130 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
132 /*Update Radio OFF setting */
133 switch (rtlpci->const_hwsw_rfoff_d3) {
135 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
136 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
140 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
141 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
142 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
146 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
150 /*Set HW definition to determine if it supports ASPM. */
151 switch (rtlpci->const_support_pciaspm) {
153 /*Not support ASPM. */
154 bool support_aspm = false;
155 ppsc->support_aspm = support_aspm;
160 bool support_aspm = true;
161 bool support_backdoor = true;
162 ppsc->support_aspm = support_aspm;
164 /*if (priv->oem_id == RT_CID_TOSHIBA &&
165 !priv->ndis_adapter.amd_l1_patch)
166 support_backdoor = false; */
168 ppsc->support_backdoor = support_backdoor;
173 /*ASPM value set by chipset. */
174 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
175 bool support_aspm = true;
176 ppsc->support_aspm = support_aspm;
180 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
181 "switch case not processed\n");
185 /* toshiba aspm issue, toshiba will set aspm selfly
186 * so we should not set aspm in driver */
187 pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
188 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
190 ppsc->support_aspm = false;
193 static bool _rtl_pci_platform_switch_device_pci_aspm(
194 struct ieee80211_hw *hw,
197 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
198 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
200 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
203 pci_write_config_byte(rtlpci->pdev, 0x80, value);
208 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
209 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
211 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
212 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
214 pci_write_config_byte(rtlpci->pdev, 0x81, value);
216 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
220 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
221 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
223 struct rtl_priv *rtlpriv = rtl_priv(hw);
224 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
225 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
226 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
227 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
228 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
229 /*Retrieve original configuration settings. */
230 u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
231 u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
232 pcibridge_linkctrlreg;
236 if (!ppsc->support_aspm)
239 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
240 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
241 "PCI(Bridge) UNKNOWN\n");
246 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
247 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
248 _rtl_pci_switch_clk_req(hw, 0x0);
251 /*for promising device will in L0 state after an I/O. */
252 pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
254 /*Set corresponding value. */
255 aspmlevel |= BIT(0) | BIT(1);
256 linkctrl_reg &= ~aspmlevel;
257 pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
259 _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
262 /*4 Disable Pci Bridge ASPM */
263 pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
264 pcibridge_linkctrlreg);
270 *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
271 *power saving We should follow the sequence to enable
272 *RTL8192SE first then enable Pci Bridge ASPM
273 *or the system will show bluescreen.
275 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
277 struct rtl_priv *rtlpriv = rtl_priv(hw);
278 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
279 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
280 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
281 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
282 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
284 u8 u_pcibridge_aspmsetting;
285 u8 u_device_aspmsetting;
287 if (!ppsc->support_aspm)
290 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
291 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
292 "PCI(Bridge) UNKNOWN\n");
296 /*4 Enable Pci Bridge ASPM */
298 u_pcibridge_aspmsetting =
299 pcipriv->ndis_adapter.pcibridge_linkctrlreg |
300 rtlpci->const_hostpci_aspm_setting;
302 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
303 u_pcibridge_aspmsetting &= ~BIT(0);
305 pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
306 u_pcibridge_aspmsetting);
308 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
309 "PlatformEnableASPM(): Write reg[%x] = %x\n",
310 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
311 u_pcibridge_aspmsetting);
315 /*Get ASPM level (with/without Clock Req) */
316 aspmlevel = rtlpci->const_devicepci_aspm_setting;
317 u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
319 /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
320 /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
322 u_device_aspmsetting |= aspmlevel;
324 _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
326 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
327 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
328 RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
329 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
334 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
336 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
342 pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
344 pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
346 if (offset_e0 == 0xA0) {
347 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
348 if (offset_e4 & BIT(23))
355 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
356 struct rtl_priv **buddy_priv)
358 struct rtl_priv *rtlpriv = rtl_priv(hw);
359 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
360 bool find_buddy_priv = false;
361 struct rtl_priv *tpriv = NULL;
362 struct rtl_pci_priv *tpcipriv = NULL;
364 if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
365 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
368 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
369 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
370 "pcipriv->ndis_adapter.funcnumber %x\n",
371 pcipriv->ndis_adapter.funcnumber);
372 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
373 "tpcipriv->ndis_adapter.funcnumber %x\n",
374 tpcipriv->ndis_adapter.funcnumber);
376 if ((pcipriv->ndis_adapter.busnumber ==
377 tpcipriv->ndis_adapter.busnumber) &&
378 (pcipriv->ndis_adapter.devnumber ==
379 tpcipriv->ndis_adapter.devnumber) &&
380 (pcipriv->ndis_adapter.funcnumber !=
381 tpcipriv->ndis_adapter.funcnumber)) {
382 find_buddy_priv = true;
389 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
390 "find_buddy_priv %d\n", find_buddy_priv);
395 return find_buddy_priv;
398 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
400 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
401 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
402 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
406 num4bbytes = (capabilityoffset + 0x10) / 4;
408 /*Read Link Control Register */
409 pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
411 pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
414 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
415 struct ieee80211_hw *hw)
417 struct rtl_priv *rtlpriv = rtl_priv(hw);
418 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
423 /*Link Control Register */
424 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
425 pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
427 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
428 pcipriv->ndis_adapter.linkctrl_reg);
430 pci_read_config_byte(pdev, 0x98, &tmp);
432 pci_write_config_byte(pdev, 0x98, tmp);
435 pci_write_config_byte(pdev, 0x70f, tmp);
438 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
440 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
442 _rtl_pci_update_default_setting(hw);
444 if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
445 /*Always enable ASPM & Clock Req. */
446 rtl_pci_enable_aspm(hw);
447 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
452 static void _rtl_pci_io_handler_init(struct device *dev,
453 struct ieee80211_hw *hw)
455 struct rtl_priv *rtlpriv = rtl_priv(hw);
457 rtlpriv->io.dev = dev;
459 rtlpriv->io.write8_async = pci_write8_async;
460 rtlpriv->io.write16_async = pci_write16_async;
461 rtlpriv->io.write32_async = pci_write32_async;
463 rtlpriv->io.read8_sync = pci_read8_sync;
464 rtlpriv->io.read16_sync = pci_read16_sync;
465 rtlpriv->io.read32_sync = pci_read32_sync;
469 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
470 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
472 struct rtl_priv *rtlpriv = rtl_priv(hw);
473 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
474 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
475 struct sk_buff *next_skb;
476 u8 additionlen = FCS_LEN;
478 /* here open is 4, wep/tkip is 8, aes is 12*/
479 if (info->control.hw_key)
480 additionlen += info->control.hw_key->icv_len;
482 /* The most skb num is 6 */
483 tcb_desc->empkt_num = 0;
484 spin_lock_bh(&rtlpriv->locks.waitq_lock);
485 skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
486 struct ieee80211_tx_info *next_info;
488 next_info = IEEE80211_SKB_CB(next_skb);
489 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
490 tcb_desc->empkt_len[tcb_desc->empkt_num] =
491 next_skb->len + additionlen;
492 tcb_desc->empkt_num++;
497 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
501 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
504 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
509 /* just for early mode now */
510 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
512 struct rtl_priv *rtlpriv = rtl_priv(hw);
513 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
514 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
515 struct sk_buff *skb = NULL;
516 struct ieee80211_tx_info *info = NULL;
517 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
520 if (!rtlpriv->rtlhal.earlymode_enable)
523 if (rtlpriv->dm.supp_phymode_switch &&
524 (rtlpriv->easy_concurrent_ctl.switch_in_process ||
525 (rtlpriv->buddy_priv &&
526 rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
528 /* we juse use em for BE/BK/VI/VO */
529 for (tid = 7; tid >= 0; tid--) {
530 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
531 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
532 while (!mac->act_scanning &&
533 rtlpriv->psc.rfpwr_state == ERFON) {
534 struct rtl_tcb_desc tcb_desc;
535 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
537 spin_lock_bh(&rtlpriv->locks.waitq_lock);
538 if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
539 (ring->entries - skb_queue_len(&ring->queue) >
540 rtlhal->max_earlymode_num)) {
541 skb = skb_dequeue(&mac->skb_waitq[tid]);
543 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
546 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
548 /* Some macaddr can't do early mode. like
549 * multicast/broadcast/no_qos data */
550 info = IEEE80211_SKB_CB(skb);
551 if (info->flags & IEEE80211_TX_CTL_AMPDU)
552 _rtl_update_earlymode_info(hw, skb,
555 rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
561 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
563 struct rtl_priv *rtlpriv = rtl_priv(hw);
564 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
566 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
568 while (skb_queue_len(&ring->queue)) {
569 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
571 struct ieee80211_tx_info *info;
575 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
578 /*beacon packet will only use the first
579 *descriptor by defaut, and the own may not
580 *be cleared by the hardware
584 ring->idx = (ring->idx + 1) % ring->entries;
586 skb = __skb_dequeue(&ring->queue);
587 pci_unmap_single(rtlpci->pdev,
589 get_desc((u8 *) entry, true,
590 HW_DESC_TXBUFF_ADDR),
591 skb->len, PCI_DMA_TODEVICE);
593 /* remove early mode header */
594 if (rtlpriv->rtlhal.earlymode_enable)
595 skb_pull(skb, EM_HDR_LEN);
597 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
598 "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
600 skb_queue_len(&ring->queue),
601 *(u16 *) (skb->data + 22));
603 if (prio == TXCMD_QUEUE) {
609 /* for sw LPS, just after NULL skb send out, we can
610 * sure AP knows we are sleeping, we should not let
613 fc = rtl_get_fc(skb);
614 if (ieee80211_is_nullfunc(fc)) {
615 if (ieee80211_has_pm(fc)) {
616 rtlpriv->mac80211.offchan_delay = true;
617 rtlpriv->psc.state_inap = true;
619 rtlpriv->psc.state_inap = false;
622 if (ieee80211_is_action(fc)) {
623 struct ieee80211_mgmt *action_frame =
624 (struct ieee80211_mgmt *)skb->data;
625 if (action_frame->u.action.u.ht_smps.action ==
626 WLAN_HT_ACTION_SMPS) {
632 /* update tid tx pkt num */
633 tid = rtl_get_tid(skb);
635 rtlpriv->link_info.tidtx_inperiod[tid]++;
637 info = IEEE80211_SKB_CB(skb);
638 ieee80211_tx_info_clear_status(info);
640 info->flags |= IEEE80211_TX_STAT_ACK;
641 /*info->status.rates[0].count = 1; */
643 ieee80211_tx_status_irqsafe(hw, skb);
645 if ((ring->entries - skb_queue_len(&ring->queue))
648 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
649 "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%d\n",
651 skb_queue_len(&ring->queue));
653 ieee80211_wake_queue(hw,
654 skb_get_queue_mapping
661 if (((rtlpriv->link_info.num_rx_inperiod +
662 rtlpriv->link_info.num_tx_inperiod) > 8) ||
663 (rtlpriv->link_info.num_rx_inperiod > 2)) {
664 rtlpriv->enter_ps = false;
665 schedule_work(&rtlpriv->works.lps_change_work);
669 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
670 struct ieee80211_rx_status rx_status)
672 struct rtl_priv *rtlpriv = rtl_priv(hw);
673 struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
674 __le16 fc = rtl_get_fc(skb);
675 bool unicast = false;
676 struct sk_buff *uskb = NULL;
680 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
682 if (is_broadcast_ether_addr(hdr->addr1)) {
684 } else if (is_multicast_ether_addr(hdr->addr1)) {
688 rtlpriv->stats.rxbytesunicast += skb->len;
691 rtl_is_special_data(hw, skb, false);
693 if (ieee80211_is_data(fc)) {
694 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
697 rtlpriv->link_info.num_rx_inperiod++;
700 /* static bcn for roaming */
701 rtl_beacon_statistic(hw, skb);
702 rtl_p2p_info(hw, (void *)skb->data, skb->len);
705 rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
706 rtl_recognize_peer(hw, (void *)skb->data, skb->len);
707 if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
708 (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
709 (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
712 if (unlikely(!rtl_action_proc(hw, skb, false)))
715 uskb = dev_alloc_skb(skb->len + 128);
717 return; /* exit if allocation failed */
718 memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
719 pdata = (u8 *)skb_put(uskb, skb->len);
720 memcpy(pdata, skb->data, skb->len);
722 ieee80211_rx_irqsafe(hw, uskb);
725 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
727 struct rtl_priv *rtlpriv = rtl_priv(hw);
728 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
729 int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
731 struct ieee80211_rx_status rx_status = { 0 };
732 unsigned int count = rtlpci->rxringcount;
737 struct rtl_stats stats = {
741 int index = rtlpci->rx_ring[rx_queue_idx].idx;
743 if (rtlpci->driver_is_goingto_unload)
748 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
751 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
753 struct sk_buff *new_skb = NULL;
755 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
758 /*wait data to be filled by hardware */
762 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
766 if (stats.crc || stats.hwerror)
769 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
770 if (unlikely(!new_skb)) {
771 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV), DBG_DMESG,
772 "can't alloc skb for rx\n");
775 kmemleak_not_leak(new_skb);
777 pci_unmap_single(rtlpci->pdev,
778 *((dma_addr_t *) skb->cb),
779 rtlpci->rxbuffersize,
782 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
784 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
787 * NOTICE This can not be use for mac80211,
788 * this is done in mac80211 code,
789 * if you done here sec DHCP will fail
790 * skb_trim(skb, skb->len - 4);
793 _rtl_receive_one(hw, skb, rx_status);
795 if (((rtlpriv->link_info.num_rx_inperiod +
796 rtlpriv->link_info.num_tx_inperiod) > 8) ||
797 (rtlpriv->link_info.num_rx_inperiod > 2)) {
798 rtlpriv->enter_ps = false;
799 schedule_work(&rtlpriv->works.lps_change_work);
802 dev_kfree_skb_any(skb);
805 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
806 *((dma_addr_t *) skb->cb) =
807 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
808 rtlpci->rxbuffersize,
812 bufferaddress = (*((dma_addr_t *)skb->cb));
813 if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
816 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
818 (u8 *)&bufferaddress);
819 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
821 (u8 *)&rtlpci->rxbuffersize);
823 if (index == rtlpci->rxringcount - 1)
824 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
828 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
831 index = (index + 1) % rtlpci->rxringcount;
834 rtlpci->rx_ring[rx_queue_idx].idx = index;
837 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
839 struct ieee80211_hw *hw = dev_id;
840 struct rtl_priv *rtlpriv = rtl_priv(hw);
841 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
845 irqreturn_t ret = IRQ_HANDLED;
847 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
849 /*read ISR: 4/8bytes */
850 rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
852 /*Shared IRQ or HW disappared */
853 if (!inta || inta == 0xffff) {
858 /*<1> beacon related */
859 if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
860 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
861 "beacon ok interrupt!\n");
864 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
865 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
866 "beacon err interrupt!\n");
869 if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
870 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
873 if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
874 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
875 "prepare beacon for interrupt!\n");
876 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
880 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
881 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
883 if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
884 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
885 "Manage ok interrupt!\n");
886 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
889 if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
890 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
891 "HIGH_QUEUE ok interrupt!\n");
892 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
895 if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
896 rtlpriv->link_info.num_tx_inperiod++;
898 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
899 "BK Tx OK interrupt!\n");
900 _rtl_pci_tx_isr(hw, BK_QUEUE);
903 if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
904 rtlpriv->link_info.num_tx_inperiod++;
906 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
907 "BE TX OK interrupt!\n");
908 _rtl_pci_tx_isr(hw, BE_QUEUE);
911 if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
912 rtlpriv->link_info.num_tx_inperiod++;
914 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
915 "VI TX OK interrupt!\n");
916 _rtl_pci_tx_isr(hw, VI_QUEUE);
919 if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
920 rtlpriv->link_info.num_tx_inperiod++;
922 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
923 "Vo TX OK interrupt!\n");
924 _rtl_pci_tx_isr(hw, VO_QUEUE);
927 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
928 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
929 rtlpriv->link_info.num_tx_inperiod++;
931 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
932 "CMD TX OK interrupt!\n");
933 _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
938 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
939 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
940 _rtl_pci_rx_interrupt(hw);
943 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
944 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
945 "rx descriptor unavailable!\n");
946 _rtl_pci_rx_interrupt(hw);
949 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
950 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
951 _rtl_pci_rx_interrupt(hw);
955 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
956 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
957 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
958 "firmware interrupt!\n");
959 queue_delayed_work(rtlpriv->works.rtl_wq,
960 &rtlpriv->works.fwevt_wq, 0);
964 if (rtlpriv->rtlhal.earlymode_enable)
965 tasklet_schedule(&rtlpriv->works.irq_tasklet);
968 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
972 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
974 _rtl_pci_tx_chk_waitq(hw);
977 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
979 struct rtl_priv *rtlpriv = rtl_priv(hw);
980 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
981 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
982 struct rtl8192_tx_ring *ring = NULL;
983 struct ieee80211_hdr *hdr = NULL;
984 struct ieee80211_tx_info *info = NULL;
985 struct sk_buff *pskb = NULL;
986 struct rtl_tx_desc *pdesc = NULL;
987 struct rtl_tcb_desc tcb_desc;
990 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
991 ring = &rtlpci->tx_ring[BEACON_QUEUE];
992 pskb = __skb_dequeue(&ring->queue);
994 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
995 pci_unmap_single(rtlpci->pdev, rtlpriv->cfg->ops->get_desc(
996 (u8 *) entry, true, HW_DESC_TXBUFF_ADDR),
997 pskb->len, PCI_DMA_TODEVICE);
1001 /*NB: the beacon data buffer must be 32-bit aligned. */
1002 pskb = ieee80211_beacon_get(hw, mac->vif);
1005 hdr = rtl_get_hdr(pskb);
1006 info = IEEE80211_SKB_CB(pskb);
1007 pdesc = &ring->desc[0];
1008 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
1009 info, NULL, pskb, BEACON_QUEUE, &tcb_desc);
1011 __skb_queue_tail(&ring->queue, pskb);
1013 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
1019 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1021 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1024 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1025 rtlpci->txringcount[i] = RT_TXDESC_NUM;
1028 *we just alloc 2 desc for beacon queue,
1029 *because we just need first desc in hw beacon.
1031 rtlpci->txringcount[BEACON_QUEUE] = 2;
1034 *BE queue need more descriptor for performance
1035 *consideration or, No more tx desc will happen,
1036 *and may cause mac80211 mem leakage.
1038 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1040 rtlpci->rxbuffersize = 9100; /*2048/1024; */
1041 rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT; /*64; */
1044 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1045 struct pci_dev *pdev)
1047 struct rtl_priv *rtlpriv = rtl_priv(hw);
1048 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1049 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1050 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1052 rtlpci->up_first_time = true;
1053 rtlpci->being_init_adapter = false;
1056 rtlpci->pdev = pdev;
1058 /*Tx/Rx related var */
1059 _rtl_pci_init_trx_var(hw);
1061 /*IBSS*/ mac->beacon_interval = 100;
1064 mac->min_space_cfg = 0;
1065 mac->max_mss_density = 0;
1066 /*set sane AMPDU defaults */
1067 mac->current_ampdu_density = 7;
1068 mac->current_ampdu_factor = 3;
1071 rtlpci->acm_method = eAcmWay2_SW;
1074 tasklet_init(&rtlpriv->works.irq_tasklet,
1075 (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1077 tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1078 (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1080 INIT_WORK(&rtlpriv->works.lps_change_work,
1081 rtl_lps_change_work_callback);
1084 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1085 unsigned int prio, unsigned int entries)
1087 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1088 struct rtl_priv *rtlpriv = rtl_priv(hw);
1089 struct rtl_tx_desc *ring;
1091 u32 nextdescaddress;
1094 ring = pci_alloc_consistent(rtlpci->pdev,
1095 sizeof(*ring) * entries, &dma);
1097 if (!ring || (unsigned long)ring & 0xFF) {
1098 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1099 "Cannot allocate TX ring (prio = %d)\n", prio);
1103 memset(ring, 0, sizeof(*ring) * entries);
1104 rtlpci->tx_ring[prio].desc = ring;
1105 rtlpci->tx_ring[prio].dma = dma;
1106 rtlpci->tx_ring[prio].idx = 0;
1107 rtlpci->tx_ring[prio].entries = entries;
1108 skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1110 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1113 for (i = 0; i < entries; i++) {
1114 nextdescaddress = (u32) dma +
1115 ((i + 1) % entries) *
1118 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1119 true, HW_DESC_TX_NEXTDESC_ADDR,
1120 (u8 *)&nextdescaddress);
1126 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1128 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1129 struct rtl_priv *rtlpriv = rtl_priv(hw);
1130 struct rtl_rx_desc *entry = NULL;
1131 int i, rx_queue_idx;
1135 *rx_queue_idx 0:RX_MPDU_QUEUE
1136 *rx_queue_idx 1:RX_CMD_QUEUE
1138 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1140 rtlpci->rx_ring[rx_queue_idx].desc =
1141 pci_alloc_consistent(rtlpci->pdev,
1142 sizeof(*rtlpci->rx_ring[rx_queue_idx].
1143 desc) * rtlpci->rxringcount,
1144 &rtlpci->rx_ring[rx_queue_idx].dma);
1146 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1147 (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1148 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1149 "Cannot allocate RX ring\n");
1153 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1154 sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1155 rtlpci->rxringcount);
1157 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1159 /* If amsdu_8k is disabled, set buffersize to 4096. This
1160 * change will reduce memory fragmentation.
1162 if (rtlpci->rxbuffersize > 4096 &&
1163 rtlpriv->rtlhal.disable_amsdu_8k)
1164 rtlpci->rxbuffersize = 4096;
1166 for (i = 0; i < rtlpci->rxringcount; i++) {
1167 struct sk_buff *skb =
1168 dev_alloc_skb(rtlpci->rxbuffersize);
1172 kmemleak_not_leak(skb);
1173 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1175 /*skb->dev = dev; */
1177 rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1180 *just set skb->cb to mapping addr
1181 *for pci_unmap_single use
1183 *((dma_addr_t *) skb->cb) =
1184 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1185 rtlpci->rxbuffersize,
1186 PCI_DMA_FROMDEVICE);
1188 bufferaddress = (*((dma_addr_t *)skb->cb));
1189 if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress)) {
1190 dev_kfree_skb_any(skb);
1193 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1194 HW_DESC_RXBUFF_ADDR,
1195 (u8 *)&bufferaddress);
1196 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1200 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1205 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1206 HW_DESC_RXERO, &tmp_one);
1211 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1214 struct rtl_priv *rtlpriv = rtl_priv(hw);
1215 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1216 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1218 while (skb_queue_len(&ring->queue)) {
1219 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1220 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1222 pci_unmap_single(rtlpci->pdev,
1224 ops->get_desc((u8 *) entry, true,
1225 HW_DESC_TXBUFF_ADDR),
1226 skb->len, PCI_DMA_TODEVICE);
1228 ring->idx = (ring->idx + 1) % ring->entries;
1232 pci_free_consistent(rtlpci->pdev,
1233 sizeof(*ring->desc) * ring->entries,
1234 ring->desc, ring->dma);
1239 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1241 int i, rx_queue_idx;
1243 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1244 /*rx_queue_idx 1:RX_CMD_QUEUE */
1245 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1247 for (i = 0; i < rtlpci->rxringcount; i++) {
1248 struct sk_buff *skb =
1249 rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1253 pci_unmap_single(rtlpci->pdev,
1254 *((dma_addr_t *) skb->cb),
1255 rtlpci->rxbuffersize,
1256 PCI_DMA_FROMDEVICE);
1260 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1261 pci_free_consistent(rtlpci->pdev,
1262 sizeof(*rtlpci->rx_ring[rx_queue_idx].
1263 desc) * rtlpci->rxringcount,
1264 rtlpci->rx_ring[rx_queue_idx].desc,
1265 rtlpci->rx_ring[rx_queue_idx].dma);
1266 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1271 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1273 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1277 ret = _rtl_pci_init_rx_ring(hw);
1281 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1282 ret = _rtl_pci_init_tx_ring(hw, i,
1283 rtlpci->txringcount[i]);
1285 goto err_free_rings;
1291 _rtl_pci_free_rx_ring(rtlpci);
1293 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1294 if (rtlpci->tx_ring[i].desc)
1295 _rtl_pci_free_tx_ring(hw, i);
1300 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1302 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1306 _rtl_pci_free_rx_ring(rtlpci);
1309 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1310 _rtl_pci_free_tx_ring(hw, i);
1315 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1317 struct rtl_priv *rtlpriv = rtl_priv(hw);
1318 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1319 int i, rx_queue_idx;
1320 unsigned long flags;
1323 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1324 /*rx_queue_idx 1:RX_CMD_QUEUE */
1325 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1328 *force the rx_ring[RX_MPDU_QUEUE/
1329 *RX_CMD_QUEUE].idx to the first one
1331 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1332 struct rtl_rx_desc *entry = NULL;
1334 for (i = 0; i < rtlpci->rxringcount; i++) {
1335 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1336 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1341 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1346 *after reset, release previous pending packet,
1347 *and force the tx idx to the first one
1349 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1350 if (rtlpci->tx_ring[i].desc) {
1351 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1353 while (skb_queue_len(&ring->queue)) {
1354 struct rtl_tx_desc *entry;
1355 struct sk_buff *skb;
1357 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock,
1359 entry = &ring->desc[ring->idx];
1360 skb = __skb_dequeue(&ring->queue);
1361 pci_unmap_single(rtlpci->pdev,
1366 HW_DESC_TXBUFF_ADDR),
1367 skb->len, PCI_DMA_TODEVICE);
1368 ring->idx = (ring->idx + 1) % ring->entries;
1369 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1380 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1381 struct ieee80211_sta *sta,
1382 struct sk_buff *skb)
1384 struct rtl_priv *rtlpriv = rtl_priv(hw);
1385 struct rtl_sta_info *sta_entry = NULL;
1386 u8 tid = rtl_get_tid(skb);
1387 __le16 fc = rtl_get_fc(skb);
1391 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1393 if (!rtlpriv->rtlhal.earlymode_enable)
1395 if (ieee80211_is_nullfunc(fc))
1397 if (ieee80211_is_qos_nullfunc(fc))
1399 if (ieee80211_is_pspoll(fc))
1401 if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1403 if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1408 /* maybe every tid should be checked */
1409 if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1412 spin_lock_bh(&rtlpriv->locks.waitq_lock);
1413 skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1414 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1419 static int rtl_pci_tx(struct ieee80211_hw *hw,
1420 struct ieee80211_sta *sta,
1421 struct sk_buff *skb,
1422 struct rtl_tcb_desc *ptcb_desc)
1424 struct rtl_priv *rtlpriv = rtl_priv(hw);
1425 struct rtl_sta_info *sta_entry = NULL;
1426 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1427 struct rtl8192_tx_ring *ring;
1428 struct rtl_tx_desc *pdesc;
1430 u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1431 unsigned long flags;
1432 struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1433 __le16 fc = rtl_get_fc(skb);
1434 u8 *pda_addr = hdr->addr1;
1435 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1442 if (ieee80211_is_mgmt(fc))
1443 rtl_tx_mgmt_proc(hw, skb);
1445 if (rtlpriv->psc.sw_ps_enabled) {
1446 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1447 !ieee80211_has_pm(fc))
1448 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1451 rtl_action_proc(hw, skb, true);
1453 if (is_multicast_ether_addr(pda_addr))
1454 rtlpriv->stats.txbytesmulticast += skb->len;
1455 else if (is_broadcast_ether_addr(pda_addr))
1456 rtlpriv->stats.txbytesbroadcast += skb->len;
1458 rtlpriv->stats.txbytesunicast += skb->len;
1460 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1461 ring = &rtlpci->tx_ring[hw_queue];
1462 if (hw_queue != BEACON_QUEUE)
1463 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1468 pdesc = &ring->desc[idx];
1469 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1472 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1473 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1474 "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1475 hw_queue, ring->idx, idx,
1476 skb_queue_len(&ring->queue));
1478 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1482 if (ieee80211_is_data_qos(fc)) {
1483 tid = rtl_get_tid(skb);
1485 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1486 seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1487 IEEE80211_SCTL_SEQ) >> 4;
1490 if (!ieee80211_has_morefrags(hdr->frame_control))
1491 sta_entry->tids[tid].seq_number = seq_number;
1495 if (ieee80211_is_data(fc))
1496 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1498 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1499 info, sta, skb, hw_queue, ptcb_desc);
1501 __skb_queue_tail(&ring->queue, skb);
1503 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1504 HW_DESC_OWN, &temp_one);
1507 if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1508 hw_queue != BEACON_QUEUE) {
1510 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1511 "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1512 hw_queue, ring->idx, idx,
1513 skb_queue_len(&ring->queue));
1515 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1518 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1520 rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1525 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1527 struct rtl_priv *rtlpriv = rtl_priv(hw);
1528 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1529 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1530 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1533 struct rtl8192_tx_ring *ring;
1538 for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1540 ring = &pcipriv->dev.tx_ring[queue_id];
1541 queue_len = skb_queue_len(&ring->queue);
1542 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1543 queue_id == TXCMD_QUEUE) {
1551 /* we just wait 1s for all queues */
1552 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1553 is_hal_stop(rtlhal) || i >= 200)
1558 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1560 struct rtl_priv *rtlpriv = rtl_priv(hw);
1561 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1563 _rtl_pci_deinit_trx_ring(hw);
1565 synchronize_irq(rtlpci->pdev->irq);
1566 tasklet_kill(&rtlpriv->works.irq_tasklet);
1567 cancel_work_sync(&rtlpriv->works.lps_change_work);
1569 flush_workqueue(rtlpriv->works.rtl_wq);
1570 destroy_workqueue(rtlpriv->works.rtl_wq);
1574 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1576 struct rtl_priv *rtlpriv = rtl_priv(hw);
1579 _rtl_pci_init_struct(hw, pdev);
1581 err = _rtl_pci_init_trx_ring(hw);
1583 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1584 "tx ring initialization failed\n");
1591 static int rtl_pci_start(struct ieee80211_hw *hw)
1593 struct rtl_priv *rtlpriv = rtl_priv(hw);
1594 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1595 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1596 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1600 rtl_pci_reset_trx_ring(hw);
1602 rtlpci->driver_is_goingto_unload = false;
1603 err = rtlpriv->cfg->ops->hw_init(hw);
1605 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1606 "Failed to config hardware!\n");
1610 rtlpriv->cfg->ops->enable_interrupt(hw);
1611 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1613 rtl_init_rx_config(hw);
1615 /*should be after adapter start and interrupt enable. */
1616 set_hal_start(rtlhal);
1618 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1620 rtlpci->up_first_time = false;
1622 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "OK\n");
1626 static void rtl_pci_stop(struct ieee80211_hw *hw)
1628 struct rtl_priv *rtlpriv = rtl_priv(hw);
1629 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1630 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1631 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1632 unsigned long flags;
1633 u8 RFInProgressTimeOut = 0;
1636 *should be before disable interrupt&adapter
1637 *and will do it immediately.
1639 set_hal_stop(rtlhal);
1641 rtlpci->driver_is_goingto_unload = true;
1642 rtlpriv->cfg->ops->disable_interrupt(hw);
1643 cancel_work_sync(&rtlpriv->works.lps_change_work);
1645 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1646 while (ppsc->rfchange_inprogress) {
1647 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1648 if (RFInProgressTimeOut > 100) {
1649 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1653 RFInProgressTimeOut++;
1654 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1656 ppsc->rfchange_inprogress = true;
1657 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1659 rtlpriv->cfg->ops->hw_disable(hw);
1660 /* some things are not needed if firmware not available */
1661 if (!rtlpriv->max_fw_size)
1663 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1665 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1666 ppsc->rfchange_inprogress = false;
1667 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1669 rtl_pci_enable_aspm(hw);
1672 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1673 struct ieee80211_hw *hw)
1675 struct rtl_priv *rtlpriv = rtl_priv(hw);
1676 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1677 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1678 struct pci_dev *bridge_pdev = pdev->bus->self;
1685 pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1686 venderid = pdev->vendor;
1687 deviceid = pdev->device;
1688 pci_read_config_byte(pdev, 0x8, &revisionid);
1689 pci_read_config_word(pdev, 0x3C, &irqline);
1691 /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1692 * r8192e_pci, and RTL8192SE, which uses this driver. If the
1693 * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1694 * the correct driver is r8192e_pci, thus this routine should
1697 if (deviceid == RTL_PCI_8192SE_DID &&
1698 revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1701 if (deviceid == RTL_PCI_8192_DID ||
1702 deviceid == RTL_PCI_0044_DID ||
1703 deviceid == RTL_PCI_0047_DID ||
1704 deviceid == RTL_PCI_8192SE_DID ||
1705 deviceid == RTL_PCI_8174_DID ||
1706 deviceid == RTL_PCI_8173_DID ||
1707 deviceid == RTL_PCI_8172_DID ||
1708 deviceid == RTL_PCI_8171_DID) {
1709 switch (revisionid) {
1710 case RTL_PCI_REVISION_ID_8192PCIE:
1711 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1712 "8192 PCI-E is found - vid/did=%x/%x\n",
1713 venderid, deviceid);
1714 rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1716 case RTL_PCI_REVISION_ID_8192SE:
1717 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1718 "8192SE is found - vid/did=%x/%x\n",
1719 venderid, deviceid);
1720 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1723 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1724 "Err: Unknown device - vid/did=%x/%x\n",
1725 venderid, deviceid);
1726 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1730 } else if (deviceid == RTL_PCI_8723AE_DID) {
1731 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1732 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1733 "8723AE PCI-E is found - "
1734 "vid/did=%x/%x\n", venderid, deviceid);
1735 } else if (deviceid == RTL_PCI_8192CET_DID ||
1736 deviceid == RTL_PCI_8192CE_DID ||
1737 deviceid == RTL_PCI_8191CE_DID ||
1738 deviceid == RTL_PCI_8188CE_DID) {
1739 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1740 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1741 "8192C PCI-E is found - vid/did=%x/%x\n",
1742 venderid, deviceid);
1743 } else if (deviceid == RTL_PCI_8192DE_DID ||
1744 deviceid == RTL_PCI_8192DE_DID2) {
1745 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1746 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1747 "8192D PCI-E is found - vid/did=%x/%x\n",
1748 venderid, deviceid);
1749 } else if (deviceid == RTL_PCI_8188EE_DID) {
1750 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1751 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1752 "Find adapter, Hardware type is 8188EE\n");
1754 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1755 "Err: Unknown device - vid/did=%x/%x\n",
1756 venderid, deviceid);
1758 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1761 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1762 if (revisionid == 0 || revisionid == 1) {
1763 if (revisionid == 0) {
1764 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1765 "Find 92DE MAC0\n");
1766 rtlhal->interfaceindex = 0;
1767 } else if (revisionid == 1) {
1768 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1769 "Find 92DE MAC1\n");
1770 rtlhal->interfaceindex = 1;
1773 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1774 "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1775 venderid, deviceid, revisionid);
1776 rtlhal->interfaceindex = 0;
1780 pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1781 pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1782 pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1784 /* some ARM have no bridge_pdev and will crash here
1785 * so we should check if bridge_pdev is NULL
1788 /*find bridge info if available */
1789 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1790 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1791 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1792 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1793 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1794 "Pci Bridge Vendor is found index: %d\n",
1801 if (pcipriv->ndis_adapter.pcibridge_vendor !=
1802 PCI_BRIDGE_VENDOR_UNKNOWN) {
1803 pcipriv->ndis_adapter.pcibridge_busnum =
1804 bridge_pdev->bus->number;
1805 pcipriv->ndis_adapter.pcibridge_devnum =
1806 PCI_SLOT(bridge_pdev->devfn);
1807 pcipriv->ndis_adapter.pcibridge_funcnum =
1808 PCI_FUNC(bridge_pdev->devfn);
1809 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1810 pci_pcie_cap(bridge_pdev);
1811 pcipriv->ndis_adapter.num4bytes =
1812 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1814 rtl_pci_get_linkcontrol_field(hw);
1816 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1817 PCI_BRIDGE_VENDOR_AMD) {
1818 pcipriv->ndis_adapter.amd_l1_patch =
1819 rtl_pci_get_amd_l1_patch(hw);
1823 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1824 "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
1825 pcipriv->ndis_adapter.busnumber,
1826 pcipriv->ndis_adapter.devnumber,
1827 pcipriv->ndis_adapter.funcnumber,
1828 pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
1830 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1831 "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1832 pcipriv->ndis_adapter.pcibridge_busnum,
1833 pcipriv->ndis_adapter.pcibridge_devnum,
1834 pcipriv->ndis_adapter.pcibridge_funcnum,
1835 pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1836 pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1837 pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1838 pcipriv->ndis_adapter.amd_l1_patch);
1840 rtl_pci_parse_configuration(pdev, hw);
1841 list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
1846 int rtl_pci_probe(struct pci_dev *pdev,
1847 const struct pci_device_id *id)
1849 struct ieee80211_hw *hw = NULL;
1851 struct rtl_priv *rtlpriv = NULL;
1852 struct rtl_pci_priv *pcipriv = NULL;
1853 struct rtl_pci *rtlpci;
1854 unsigned long pmem_start, pmem_len, pmem_flags;
1857 err = pci_enable_device(pdev);
1859 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
1864 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1865 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1867 "Unable to obtain 32bit DMA for consistent allocations\n");
1873 pci_set_master(pdev);
1875 hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1876 sizeof(struct rtl_priv), &rtl_ops);
1879 "%s : ieee80211 alloc failed\n", pci_name(pdev));
1884 SET_IEEE80211_DEV(hw, &pdev->dev);
1885 pci_set_drvdata(pdev, hw);
1889 pcipriv = (void *)rtlpriv->priv;
1890 pcipriv->dev.pdev = pdev;
1891 init_completion(&rtlpriv->firmware_loading_complete);
1893 /* init cfg & intf_ops */
1894 rtlpriv->rtlhal.interface = INTF_PCI;
1895 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1896 rtlpriv->intf_ops = &rtl_pci_ops;
1897 rtlpriv->glb_var = &rtl_global_var;
1900 *init dbgp flags before all
1901 *other functions, because we will
1902 *use it in other funtions like
1903 *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1904 *you can not use these macro
1907 rtl_dbgp_flag_init(hw);
1910 err = pci_request_regions(pdev, KBUILD_MODNAME);
1912 RT_ASSERT(false, "Can't obtain PCI resources\n");
1916 pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1917 pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1918 pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1920 /*shared mem start */
1921 rtlpriv->io.pci_mem_start =
1922 (unsigned long)pci_iomap(pdev,
1923 rtlpriv->cfg->bar_id, pmem_len);
1924 if (rtlpriv->io.pci_mem_start == 0) {
1925 RT_ASSERT(false, "Can't map PCI mem\n");
1930 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1931 "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
1932 pmem_start, pmem_len, pmem_flags,
1933 rtlpriv->io.pci_mem_start);
1935 /* Disable Clk Request */
1936 pci_write_config_byte(pdev, 0x81, 0);
1938 pci_write_config_byte(pdev, 0x44, 0);
1939 pci_write_config_byte(pdev, 0x04, 0x06);
1940 pci_write_config_byte(pdev, 0x04, 0x07);
1943 if (!_rtl_pci_find_adapter(pdev, hw)) {
1948 /* Init IO handler */
1949 _rtl_pci_io_handler_init(&pdev->dev, hw);
1951 /*like read eeprom and so on */
1952 rtlpriv->cfg->ops->read_eeprom_info(hw);
1955 rtl_pci_init_aspm(hw);
1957 /* Init mac80211 sw */
1958 err = rtl_init_core(hw);
1960 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1961 "Can't allocate sw for mac80211\n");
1966 err = rtl_pci_init(hw, pdev);
1968 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
1972 if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1973 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
1978 rtlpriv->cfg->ops->init_sw_leds(hw);
1980 err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1982 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1983 "failed to create sysfs device attributes\n");
1987 rtlpci = rtl_pcidev(pcipriv);
1988 err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1989 IRQF_SHARED, KBUILD_MODNAME, hw);
1991 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1992 "%s: failed to register IRQ handler\n",
1993 wiphy_name(hw->wiphy));
1996 rtlpci->irq_alloc = 1;
2001 rtl_deinit_core(hw);
2003 if (rtlpriv->io.pci_mem_start != 0)
2004 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2007 pci_release_regions(pdev);
2008 complete(&rtlpriv->firmware_loading_complete);
2012 ieee80211_free_hw(hw);
2013 pci_disable_device(pdev);
2018 EXPORT_SYMBOL(rtl_pci_probe);
2020 void rtl_pci_disconnect(struct pci_dev *pdev)
2022 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2023 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2024 struct rtl_priv *rtlpriv = rtl_priv(hw);
2025 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2026 struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2028 /* just in case driver is removed before firmware callback */
2029 wait_for_completion(&rtlpriv->firmware_loading_complete);
2030 clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2032 sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2034 /*ieee80211_unregister_hw will call ops_stop */
2035 if (rtlmac->mac80211_registered == 1) {
2036 ieee80211_unregister_hw(hw);
2037 rtlmac->mac80211_registered = 0;
2039 rtl_deinit_deferred_work(hw);
2040 rtlpriv->intf_ops->adapter_stop(hw);
2042 rtlpriv->cfg->ops->disable_interrupt(hw);
2045 rtl_deinit_rfkill(hw);
2048 rtl_deinit_core(hw);
2049 rtlpriv->cfg->ops->deinit_sw_vars(hw);
2051 if (rtlpci->irq_alloc) {
2052 synchronize_irq(rtlpci->pdev->irq);
2053 free_irq(rtlpci->pdev->irq, hw);
2054 rtlpci->irq_alloc = 0;
2057 list_del(&rtlpriv->list);
2058 if (rtlpriv->io.pci_mem_start != 0) {
2059 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2060 pci_release_regions(pdev);
2063 pci_disable_device(pdev);
2065 rtl_pci_disable_aspm(hw);
2067 ieee80211_free_hw(hw);
2069 EXPORT_SYMBOL(rtl_pci_disconnect);
2071 #ifdef CONFIG_PM_SLEEP
2072 /***************************************
2073 kernel pci power state define:
2074 PCI_D0 ((pci_power_t __force) 0)
2075 PCI_D1 ((pci_power_t __force) 1)
2076 PCI_D2 ((pci_power_t __force) 2)
2077 PCI_D3hot ((pci_power_t __force) 3)
2078 PCI_D3cold ((pci_power_t __force) 4)
2079 PCI_UNKNOWN ((pci_power_t __force) 5)
2081 This function is called when system
2082 goes into suspend state mac80211 will
2083 call rtl_mac_stop() from the mac80211
2084 suspend function first, So there is
2085 no need to call hw_disable here.
2086 ****************************************/
2087 int rtl_pci_suspend(struct device *dev)
2089 struct pci_dev *pdev = to_pci_dev(dev);
2090 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2091 struct rtl_priv *rtlpriv = rtl_priv(hw);
2093 rtlpriv->cfg->ops->hw_suspend(hw);
2094 rtl_deinit_rfkill(hw);
2098 EXPORT_SYMBOL(rtl_pci_suspend);
2100 int rtl_pci_resume(struct device *dev)
2102 struct pci_dev *pdev = to_pci_dev(dev);
2103 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2104 struct rtl_priv *rtlpriv = rtl_priv(hw);
2106 rtlpriv->cfg->ops->hw_resume(hw);
2107 rtl_init_rfkill(hw);
2110 EXPORT_SYMBOL(rtl_pci_resume);
2111 #endif /* CONFIG_PM_SLEEP */
2113 struct rtl_intf_ops rtl_pci_ops = {
2114 .read_efuse_byte = read_efuse_byte,
2115 .adapter_start = rtl_pci_start,
2116 .adapter_stop = rtl_pci_stop,
2117 .check_buddy_priv = rtl_pci_check_buddy_priv,
2118 .adapter_tx = rtl_pci_tx,
2119 .flush = rtl_pci_flush,
2120 .reset_trx_ring = rtl_pci_reset_trx_ring,
2121 .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2123 .disable_aspm = rtl_pci_disable_aspm,
2124 .enable_aspm = rtl_pci_enable_aspm,