drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/export.h>
  31 #include "core.h"
  32 #include "wifi.h"
  33 #include "pci.h"
  34 #include "base.h"
  35 #include "ps.h"
  36 #include "efuse.h"
  37
  38 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  39         PCI_VENDOR_ID_INTEL,
  40         PCI_VENDOR_ID_ATI,
  41         PCI_VENDOR_ID_AMD,
  42         PCI_VENDOR_ID_SI
  43 };
  44
  45 static const u8 ac_to_hwq[] = {
  46         VO_QUEUE,
  47         VI_QUEUE,
  48         BE_QUEUE,
  49         BK_QUEUE
  50 };
  51
  52 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  53                        struct sk_buff *skb)
  54 {
  55         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  56         __le16 fc = rtl_get_fc(skb);
  57         u8 queue_index = skb_get_queue_mapping(skb);
  58
  59         if (unlikely(ieee80211_is_beacon(fc)))
  60                 return BEACON_QUEUE;
  61         if (ieee80211_is_mgmt(fc))
  62                 return MGNT_QUEUE;
  63         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  64                 if (ieee80211_is_nullfunc(fc))
  65                         return HIGH_QUEUE;
  66
  67         return ac_to_hwq[queue_index];
  68 }
  69
  70 /* Update PCI dependent default settings*/
  71 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  72 {
  73         struct rtl_priv *rtlpriv = rtl_priv(hw);
  74         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  75         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  76         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  77         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  78         u8 init_aspm;
  79
  80         ppsc->reg_rfps_level = 0;
  81         ppsc->support_aspm = 0;
  82
  83         /*Update PCI ASPM setting */
  84         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  85         switch (rtlpci->const_pci_aspm) {
  86         case 0:
  87                 /*No ASPM */
  88                 break;
  89
  90         case 1:
  91                 /*ASPM dynamically enabled/disable. */
  92                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  93                 break;
  94
  95         case 2:
  96                 /*ASPM with Clock Req dynamically enabled/disable. */
  97                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  98                                          RT_RF_OFF_LEVL_CLK_REQ);
  99                 break;
 100
 101         case 3:
 102                 /*
 103                  * Always enable ASPM and Clock Req
 104                  * from initialization to halt.
 105                  * */
 106                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 107                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 108                                          RT_RF_OFF_LEVL_CLK_REQ);
 109                 break;
 110
 111         case 4:
 112                 /*
 113                  * Always enable ASPM without Clock Req
 114                  * from initialization to halt.
 115                  * */
 116                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 117                                           RT_RF_OFF_LEVL_CLK_REQ);
 118                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 119                 break;
 120         }
 121
 122         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 123
 124         /*Update Radio OFF setting */
 125         switch (rtlpci->const_hwsw_rfoff_d3) {
 126         case 1:
 127                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 128                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 129                 break;
 130
 131         case 2:
 132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 134                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 135                 break;
 136
 137         case 3:
 138                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 139                 break;
 140         }
 141
 142         /*Set HW definition to determine if it supports ASPM. */
 143         switch (rtlpci->const_support_pciaspm) {
 144         case 0:{
 145                         /*Not support ASPM. */
 146                         bool support_aspm = false;
 147                         ppsc->support_aspm = support_aspm;
 148                         break;
 149                 }
 150         case 1:{
 151                         /*Support ASPM. */
 152                         bool support_aspm = true;
 153                         bool support_backdoor = true;
 154                         ppsc->support_aspm = support_aspm;
 155
 156                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 157                            !priv->ndis_adapter.amd_l1_patch)
 158                            support_backdoor = false; */
 159
 160                         ppsc->support_backdoor = support_backdoor;
 161
 162                         break;
 163                 }
 164         case 2:
 165                 /*ASPM value set by chipset. */
 166                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 167                         bool support_aspm = true;
 168                         ppsc->support_aspm = support_aspm;
 169                 }
 170                 break;
 171         default:
 172                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 173                          ("switch case not process\n"));
 174                 break;
 175         }
 176
 177         /* toshiba aspm issue, toshiba will set aspm selfly
 178          * so we should not set aspm in driver */
 179         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 180         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 181                 init_aspm == 0x43)
 182                 ppsc->support_aspm = false;
 183 }
 184
 185 static bool _rtl_pci_platform_switch_device_pci_aspm(
 186                         struct ieee80211_hw *hw,
 187                         u8 value)
 188 {
 189         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 190         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 191
 192         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 193                 value |= 0x40;
 194
 195         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 196
 197         return false;
 198 }
 199
 200 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 201 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 202 {
 203         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 204         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 205
 206         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 207
 208         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 209                 udelay(100);
 210
 211         return true;
 212 }
 213
 214 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 215 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 216 {
 217         struct rtl_priv *rtlpriv = rtl_priv(hw);
 218         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 219         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 221         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 258                               pcibridge_linkctrlreg);
 259
 260         udelay(50);
 261 }
 262
 263 /*
 264  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 265  *power saving We should follow the sequence to enable
 266  *RTL8192SE first then enable Pci Bridge ASPM
 267  *or the system will show bluescreen.
 268  */
 269 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 270 {
 271         struct rtl_priv *rtlpriv = rtl_priv(hw);
 272         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 273         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 274         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 275         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 276         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 277         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 280         u16 aspmlevel;
 281         u8 u_pcibridge_aspmsetting;
 282         u8 u_device_aspmsetting;
 283
 284         if (!ppsc->support_aspm)
 285                 return;
 286
 287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 289                          ("PCI(Bridge) UNKNOWN.\n"));
 290                 return;
 291         }
 292
 293         /*4 Enable Pci Bridge ASPM */
 294
 295         u_pcibridge_aspmsetting =
 296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 297             rtlpci->const_hostpci_aspm_setting;
 298
 299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 300                 u_pcibridge_aspmsetting &= ~BIT(0);
 301
 302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 303                               u_pcibridge_aspmsetting);
 304
 305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 306                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 307                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 308                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 309                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 310                   u_pcibridge_aspmsetting));
 311
 312         udelay(50);
 313
 314         /*Get ASPM level (with/without Clock Req) */
 315         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 316         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 317
 318         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 319         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 320
 321         u_device_aspmsetting |= aspmlevel;
 322
 323         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 324
 325         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 326                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 327                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 328                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 329         }
 330         udelay(100);
 331 }
 332
 333 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 334 {
 335         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 336
 337         bool status = false;
 338         u8 offset_e0;
 339         unsigned offset_e4;
 340
 341         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 342
 343         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 344
 345         if (offset_e0 == 0xA0) {
 346                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 347                 if (offset_e4 & BIT(23))
 348                         status = true;
 349         }
 350
 351         return status;
 352 }
 353
 354 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 355 {
 356         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 357         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 358         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 359         u8 linkctrl_reg;
 360         u8 num4bbytes;
 361
 362         num4bbytes = (capabilityoffset + 0x10) / 4;
 363
 364         /*Read  Link Control Register */
 365         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 366
 367         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 368 }
 369
 370 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 371                 struct ieee80211_hw *hw)
 372 {
 373         struct rtl_priv *rtlpriv = rtl_priv(hw);
 374         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 375
 376         u8 tmp;
 377         int pos;
 378         u8 linkctrl_reg;
 379
 380         /*Link Control Register */
 381         pos = pci_pcie_cap(pdev);
 382         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 383         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 384
 385         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 386                  ("Link Control Register =%x\n",
 387                   pcipriv->ndis_adapter.linkctrl_reg));
 388
 389         pci_read_config_byte(pdev, 0x98, &tmp);
 390         tmp |= BIT(4);
 391         pci_write_config_byte(pdev, 0x98, tmp);
 392
 393         tmp = 0x17;
 394         pci_write_config_byte(pdev, 0x70f, tmp);
 395 }
 396
 397 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 398 {
 399         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 400
 401         _rtl_pci_update_default_setting(hw);
 402
 403         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 404                 /*Always enable ASPM & Clock Req. */
 405                 rtl_pci_enable_aspm(hw);
 406                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 407         }
 408
 409 }
 410
 411 static void _rtl_pci_io_handler_init(struct device *dev,
 412                                      struct ieee80211_hw *hw)
 413 {
 414         struct rtl_priv *rtlpriv = rtl_priv(hw);
 415
 416         rtlpriv->io.dev = dev;
 417
 418         rtlpriv->io.write8_async = pci_write8_async;
 419         rtlpriv->io.write16_async = pci_write16_async;
 420         rtlpriv->io.write32_async = pci_write32_async;
 421
 422         rtlpriv->io.read8_sync = pci_read8_sync;
 423         rtlpriv->io.read16_sync = pci_read16_sync;
 424         rtlpriv->io.read32_sync = pci_read32_sync;
 425
 426 }
 427
 428 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 429 {
 430 }
 431
 432 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 433                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 434 {
 435         struct rtl_priv *rtlpriv = rtl_priv(hw);
 436         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 437         u8 additionlen = FCS_LEN;
 438         struct sk_buff *next_skb;
 439
 440         /* here open is 4, wep/tkip is 8, aes is 12*/
 441         if (info->control.hw_key)
 442                 additionlen += info->control.hw_key->icv_len;
 443
 444         /* The most skb num is 6 */
 445         tcb_desc->empkt_num = 0;
 446         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 447         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 448                 struct ieee80211_tx_info *next_info;
 449
 450                 next_info = IEEE80211_SKB_CB(next_skb);
 451                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 452                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 453                                 next_skb->len + additionlen;
 454                         tcb_desc->empkt_num++;
 455                 } else {
 456                         break;
 457                 }
 458
 459                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 460                                       next_skb))
 461                         break;
 462
 463                 if (tcb_desc->empkt_num >= 5)
 464                         break;
 465         }
 466         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 467
 468         return true;
 469 }
 470
 471 /* just for early mode now */
 472 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 473 {
 474         struct rtl_priv *rtlpriv = rtl_priv(hw);
 475         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 476         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 477         struct sk_buff *skb = NULL;
 478         struct ieee80211_tx_info *info = NULL;
 479         int tid;
 480
 481         if (!rtlpriv->rtlhal.earlymode_enable)
 482                 return;
 483
 484         /* we juse use em for BE/BK/VI/VO */
 485         for (tid = 7; tid >= 0; tid--) {
 486                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 487                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 488                 while (!mac->act_scanning &&
 489                        rtlpriv->psc.rfpwr_state == ERFON) {
 490                         struct rtl_tcb_desc tcb_desc;
 491                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 492
 493                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 494                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 495                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 496                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 497                         } else {
 498                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 499                                 break;
 500                         }
 501                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 502
 503                         /* Some macaddr can't do early mode. like
 504                          * multicast/broadcast/no_qos data */
 505                         info = IEEE80211_SKB_CB(skb);
 506                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 507                                 _rtl_update_earlymode_info(hw, skb,
 508                                                            &tcb_desc, tid);
 509
 510                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 511                 }
 512         }
 513 }
 514
 515
 516 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 517 {
 518         struct rtl_priv *rtlpriv = rtl_priv(hw);
 519         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 520
 521         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 522
 523         while (skb_queue_len(&ring->queue)) {
 524                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 525                 struct sk_buff *skb;
 526                 struct ieee80211_tx_info *info;
 527                 __le16 fc;
 528                 u8 tid;
 529
 530                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 531                                                           HW_DESC_OWN);
 532
 533                 /*
 534                  *beacon packet will only use the first
 535                  *descriptor defautly,and the own may not
 536                  *be cleared by the hardware
 537                  */
 538                 if (own)
 539                         return;
 540                 ring->idx = (ring->idx + 1) % ring->entries;
 541
 542                 skb = __skb_dequeue(&ring->queue);
 543                 pci_unmap_single(rtlpci->pdev,
 544                                  rtlpriv->cfg->ops->
 545                                              get_desc((u8 *) entry, true,
 546                                                       HW_DESC_TXBUFF_ADDR),
 547                                  skb->len, PCI_DMA_TODEVICE);
 548
 549                 /* remove early mode header */
 550                 if (rtlpriv->rtlhal.earlymode_enable)
 551                         skb_pull(skb, EM_HDR_LEN);
 552
 553                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 554                          ("new ring->idx:%d, "
 555                           "free: skb_queue_len:%d, free: seq:%x\n",
 556                           ring->idx,
 557                           skb_queue_len(&ring->queue),
 558                           *(u16 *) (skb->data + 22)));
 559
 560                 if (prio == TXCMD_QUEUE) {
 561                         dev_kfree_skb(skb);
 562                         goto tx_status_ok;
 563
 564                 }
 565
 566                 /* for sw LPS, just after NULL skb send out, we can
 567                  * sure AP kown we are sleeped, our we should not let
 568                  * rf to sleep*/
 569                 fc = rtl_get_fc(skb);
 570                 if (ieee80211_is_nullfunc(fc)) {
 571                         if (ieee80211_has_pm(fc)) {
 572                                 rtlpriv->mac80211.offchan_delay = true;
 573                                 rtlpriv->psc.state_inap = 1;
 574                         } else {
 575                                 rtlpriv->psc.state_inap = 0;
 576                         }
 577                 }
 578
 579                 /* update tid tx pkt num */
 580                 tid = rtl_get_tid(skb);
 581                 if (tid <= 7)
 582                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 583
 584                 info = IEEE80211_SKB_CB(skb);
 585                 ieee80211_tx_info_clear_status(info);
 586
 587                 info->flags |= IEEE80211_TX_STAT_ACK;
 588                 /*info->status.rates[0].count = 1; */
 589
 590                 ieee80211_tx_status_irqsafe(hw, skb);
 591
 592                 if ((ring->entries - skb_queue_len(&ring->queue))
 593                                 == 2) {
 594
 595                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 596                                         ("more desc left, wake"
 597                                          "skb_queue@%d,ring->idx = %d,"
 598                                          "skb_queue_len = 0x%d\n",
 599                                          prio, ring->idx,
 600                                          skb_queue_len(&ring->queue)));
 601
 602                         ieee80211_wake_queue(hw,
 603                                         skb_get_queue_mapping
 604                                         (skb));
 605                 }
 606 tx_status_ok:
 607                 skb = NULL;
 608         }
 609
 610         if (((rtlpriv->link_info.num_rx_inperiod +
 611                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 612                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 613                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 614         }
 615 }
 616
 617 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
 618                              struct ieee80211_rx_status rx_status)
 619 {
 620         struct rtl_priv *rtlpriv = rtl_priv(hw);
 621         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
 622         __le16 fc = rtl_get_fc(skb);
 623         bool unicast = false;
 624         struct sk_buff *uskb = NULL;
 625         u8 *pdata;
 626
 627
 628         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 629
 630         if (is_broadcast_ether_addr(hdr->addr1)) {
 631                 ;/*TODO*/
 632         } else if (is_multicast_ether_addr(hdr->addr1)) {
 633                 ;/*TODO*/
 634         } else {
 635                 unicast = true;
 636                 rtlpriv->stats.rxbytesunicast += skb->len;
 637         }
 638
 639         rtl_is_special_data(hw, skb, false);
 640
 641         if (ieee80211_is_data(fc)) {
 642                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 643
 644                 if (unicast)
 645                         rtlpriv->link_info.num_rx_inperiod++;
 646         }
 647
 648         /* for sw lps */
 649         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 650         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 651         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 652             (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
 653              (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
 654                 return;
 655
 656         if (unlikely(!rtl_action_proc(hw, skb, false)))
 657                 return;
 658
 659         uskb = dev_alloc_skb(skb->len + 128);
 660         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
 661         pdata = (u8 *)skb_put(uskb, skb->len);
 662         memcpy(pdata, skb->data, skb->len);
 663
 664         ieee80211_rx_irqsafe(hw, uskb);
 665 }
 666
 667 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 668 {
 669         struct rtl_priv *rtlpriv = rtl_priv(hw);
 670         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 671         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 672
 673         struct ieee80211_rx_status rx_status = { 0 };
 674         unsigned int count = rtlpci->rxringcount;
 675         u8 own;
 676         u8 tmp_one;
 677         u32 bufferaddress;
 678
 679         struct rtl_stats stats = {
 680                 .signal = 0,
 681                 .noise = -98,
 682                 .rate = 0,
 683         };
 684         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 685
 686         /*RX NORMAL PKT */
 687         while (count--) {
 688                 /*rx descriptor */
 689                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 690                                 index];
 691                 /*rx pkt */
 692                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 693                                 index];
 694                 struct sk_buff *new_skb = NULL;
 695
 696                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 697                                                        false, HW_DESC_OWN);
 698
 699                 /*wait data to be filled by hardware */
 700                 if (own)
 701                         break;
 702
 703                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 704                                                  &rx_status,
 705                                                  (u8 *) pdesc, skb);
 706
 707                 if (stats.crc || stats.hwerror)
 708                         goto done;
 709
 710                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 711                 if (unlikely(!new_skb)) {
 712                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 713                                  DBG_DMESG,
 714                                  ("can't alloc skb for rx\n"));
 715                         goto done;
 716                 }
 717
 718                 pci_unmap_single(rtlpci->pdev,
 719                                  *((dma_addr_t *) skb->cb),
 720                                  rtlpci->rxbuffersize,
 721                                  PCI_DMA_FROMDEVICE);
 722
 723                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
 724                         HW_DESC_RXPKT_LEN));
 725                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
 726
 727                 /*
 728                  * NOTICE This can not be use for mac80211,
 729                  * this is done in mac80211 code,
 730                  * if you done here sec DHCP will fail
 731                  * skb_trim(skb, skb->len - 4);
 732                  */
 733
 734                 _rtl_receive_one(hw, skb, rx_status);
 735
 736                 if (((rtlpriv->link_info.num_rx_inperiod +
 737                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
 738                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
 739                         tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 740                 }
 741
 742                 dev_kfree_skb_any(skb);
 743                 skb = new_skb;
 744
 745                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 746                 *((dma_addr_t *) skb->cb) =
 747                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 748                                            rtlpci->rxbuffersize,
 749                                            PCI_DMA_FROMDEVICE);
 750
 751 done:
 752                 bufferaddress = (*((dma_addr_t *)skb->cb));
 753                 tmp_one = 1;
 754                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 755                                             HW_DESC_RXBUFF_ADDR,
 756                                             (u8 *)&bufferaddress);
 757                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 758                                             HW_DESC_RXPKT_LEN,
 759                                             (u8 *)&rtlpci->rxbuffersize);
 760
 761                 if (index == rtlpci->rxringcount - 1)
 762                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 763                                                     HW_DESC_RXERO,
 764                                                     (u8 *)&tmp_one);
 765
 766                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 767                                             (u8 *)&tmp_one);
 768
 769                 index = (index + 1) % rtlpci->rxringcount;
 770         }
 771
 772         rtlpci->rx_ring[rx_queue_idx].idx = index;
 773 }
 774
 775 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 776 {
 777         struct ieee80211_hw *hw = dev_id;
 778         struct rtl_priv *rtlpriv = rtl_priv(hw);
 779         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 780         unsigned long flags;
 781         u32 inta = 0;
 782         u32 intb = 0;
 783
 784         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 785
 786         /*read ISR: 4/8bytes */
 787         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 788
 789         /*Shared IRQ or HW disappared */
 790         if (!inta || inta == 0xffff)
 791                 goto done;
 792
 793         /*<1> beacon related */
 794         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 795                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 796                          ("beacon ok interrupt!\n"));
 797         }
 798
 799         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 800                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 801                          ("beacon err interrupt!\n"));
 802         }
 803
 804         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 805                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 806                          ("beacon interrupt!\n"));
 807         }
 808
 809         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 810                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 811                          ("prepare beacon for interrupt!\n"));
 812                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 813         }
 814
 815         /*<3> Tx related */
 816         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 817                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 818
 819         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 820                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 821                          ("Manage ok interrupt!\n"));
 822                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 823         }
 824
 825         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 826                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 827                          ("HIGH_QUEUE ok interrupt!\n"));
 828                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 829         }
 830
 831         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 832                 rtlpriv->link_info.num_tx_inperiod++;
 833
 834                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 835                          ("BK Tx OK interrupt!\n"));
 836                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 837         }
 838
 839         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 840                 rtlpriv->link_info.num_tx_inperiod++;
 841
 842                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 843                          ("BE TX OK interrupt!\n"));
 844                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 845         }
 846
 847         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 848                 rtlpriv->link_info.num_tx_inperiod++;
 849
 850                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 851                          ("VI TX OK interrupt!\n"));
 852                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 853         }
 854
 855         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 856                 rtlpriv->link_info.num_tx_inperiod++;
 857
 858                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 859                          ("Vo TX OK interrupt!\n"));
 860                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 861         }
 862
 863         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 864                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 865                         rtlpriv->link_info.num_tx_inperiod++;
 866
 867                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 868                                         ("CMD TX OK interrupt!\n"));
 869                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 870                 }
 871         }
 872
 873         /*<2> Rx related */
 874         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 875                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 876                 _rtl_pci_rx_interrupt(hw);
 877         }
 878
 879         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 880                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 881                          ("rx descriptor unavailable!\n"));
 882                 _rtl_pci_rx_interrupt(hw);
 883         }
 884
 885         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 886                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 887                 _rtl_pci_rx_interrupt(hw);
 888         }
 889
 890         if (rtlpriv->rtlhal.earlymode_enable)
 891                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 892
 893 done:
 894         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 895         return IRQ_HANDLED;
 896 }
 897
 898 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 899 {
 900         _rtl_pci_tx_chk_waitq(hw);
 901 }
 902
 903 static void _rtl_pci_ips_leave_tasklet(struct ieee80211_hw *hw)
 904 {
 905         rtl_lps_leave(hw);
 906 }
 907
 908 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 909 {
 910         struct rtl_priv *rtlpriv = rtl_priv(hw);
 911         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 912         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 913         struct rtl8192_tx_ring *ring = NULL;
 914         struct ieee80211_hdr *hdr = NULL;
 915         struct ieee80211_tx_info *info = NULL;
 916         struct sk_buff *pskb = NULL;
 917         struct rtl_tx_desc *pdesc = NULL;
 918         struct rtl_tcb_desc tcb_desc;
 919         u8 temp_one = 1;
 920
 921         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 922         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 923         pskb = __skb_dequeue(&ring->queue);
 924         if (pskb)
 925                 kfree_skb(pskb);
 926
 927         /*NB: the beacon data buffer must be 32-bit aligned. */
 928         pskb = ieee80211_beacon_get(hw, mac->vif);
 929         if (pskb == NULL)
 930                 return;
 931         hdr = rtl_get_hdr(pskb);
 932         info = IEEE80211_SKB_CB(pskb);
 933         pdesc = &ring->desc[0];
 934         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 935                 info, pskb, BEACON_QUEUE, &tcb_desc);
 936
 937         __skb_queue_tail(&ring->queue, pskb);
 938
 939         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 940                                     (u8 *)&temp_one);
 941
 942         return;
 943 }
 944
 945 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 946 {
 947         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 948         u8 i;
 949
 950         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 951                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 952
 953         /*
 954          *we just alloc 2 desc for beacon queue,
 955          *because we just need first desc in hw beacon.
 956          */
 957         rtlpci->txringcount[BEACON_QUEUE] = 2;
 958
 959         /*
 960          *BE queue need more descriptor for performance
 961          *consideration or, No more tx desc will happen,
 962          *and may cause mac80211 mem leakage.
 963          */
 964         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
 965
 966         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
 967         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
 968 }
 969
 970 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
 971                 struct pci_dev *pdev)
 972 {
 973         struct rtl_priv *rtlpriv = rtl_priv(hw);
 974         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 975         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 976         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 977
 978         rtlpci->up_first_time = true;
 979         rtlpci->being_init_adapter = false;
 980
 981         rtlhal->hw = hw;
 982         rtlpci->pdev = pdev;
 983
 984         /*Tx/Rx related var */
 985         _rtl_pci_init_trx_var(hw);
 986
 987         /*IBSS*/ mac->beacon_interval = 100;
 988
 989         /*AMPDU*/
 990         mac->min_space_cfg = 0;
 991         mac->max_mss_density = 0;
 992         /*set sane AMPDU defaults */
 993         mac->current_ampdu_density = 7;
 994         mac->current_ampdu_factor = 3;
 995
 996         /*QOS*/
 997         rtlpci->acm_method = eAcmWay2_SW;
 998
 999         /*task */
1000         tasklet_init(&rtlpriv->works.irq_tasklet,
1001                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1002                      (unsigned long)hw);
1003         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1004                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1005                      (unsigned long)hw);
1006         tasklet_init(&rtlpriv->works.ips_leave_tasklet,
1007                      (void (*)(unsigned long))_rtl_pci_ips_leave_tasklet,
1008                      (unsigned long)hw);
1009 }
1010
1011 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1012                                  unsigned int prio, unsigned int entries)
1013 {
1014         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1015         struct rtl_priv *rtlpriv = rtl_priv(hw);
1016         struct rtl_tx_desc *ring;
1017         dma_addr_t dma;
1018         u32 nextdescaddress;
1019         int i;
1020
1021         ring = pci_alloc_consistent(rtlpci->pdev,
1022                                     sizeof(*ring) * entries, &dma);
1023
1024         if (!ring || (unsigned long)ring & 0xFF) {
1025                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1026                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1027                 return -ENOMEM;
1028         }
1029
1030         memset(ring, 0, sizeof(*ring) * entries);
1031         rtlpci->tx_ring[prio].desc = ring;
1032         rtlpci->tx_ring[prio].dma = dma;
1033         rtlpci->tx_ring[prio].idx = 0;
1034         rtlpci->tx_ring[prio].entries = entries;
1035         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1036
1037         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1038                  ("queue:%d, ring_addr:%p\n", prio, ring));
1039
1040         for (i = 0; i < entries; i++) {
1041                 nextdescaddress = (u32) dma +
1042                                               ((i + 1) % entries) *
1043                                               sizeof(*ring);
1044
1045                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1046                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1047                                             (u8 *)&nextdescaddress);
1048         }
1049
1050         return 0;
1051 }
1052
1053 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1054 {
1055         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1056         struct rtl_priv *rtlpriv = rtl_priv(hw);
1057         struct rtl_rx_desc *entry = NULL;
1058         int i, rx_queue_idx;
1059         u8 tmp_one = 1;
1060
1061         /*
1062          *rx_queue_idx 0:RX_MPDU_QUEUE
1063          *rx_queue_idx 1:RX_CMD_QUEUE
1064          */
1065         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1066              rx_queue_idx++) {
1067                 rtlpci->rx_ring[rx_queue_idx].desc =
1068                     pci_alloc_consistent(rtlpci->pdev,
1069                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1070                                                 desc) * rtlpci->rxringcount,
1071                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1072
1073                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1074                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1075                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1076                                  ("Cannot allocate RX ring\n"));
1077                         return -ENOMEM;
1078                 }
1079
1080                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1081                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1082                        rtlpci->rxringcount);
1083
1084                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1085
1086                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1087                  * change will reduce memory fragmentation.
1088                  */
1089                 if (rtlpci->rxbuffersize > 4096 &&
1090                     rtlpriv->rtlhal.disable_amsdu_8k)
1091                         rtlpci->rxbuffersize = 4096;
1092
1093                 for (i = 0; i < rtlpci->rxringcount; i++) {
1094                         struct sk_buff *skb =
1095                             dev_alloc_skb(rtlpci->rxbuffersize);
1096                         u32 bufferaddress;
1097                         if (!skb)
1098                                 return 0;
1099                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1100
1101                         /*skb->dev = dev; */
1102
1103                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1104
1105                         /*
1106                          *just set skb->cb to mapping addr
1107                          *for pci_unmap_single use
1108                          */
1109                         *((dma_addr_t *) skb->cb) =
1110                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1111                                            rtlpci->rxbuffersize,
1112                                            PCI_DMA_FROMDEVICE);
1113
1114                         bufferaddress = (*((dma_addr_t *)skb->cb));
1115                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1116                                                     HW_DESC_RXBUFF_ADDR,
1117                                                     (u8 *)&bufferaddress);
1118                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1119                                                     HW_DESC_RXPKT_LEN,
1120                                                     (u8 *)&rtlpci->
1121                                                     rxbuffersize);
1122                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1123                                                     HW_DESC_RXOWN,
1124                                                     (u8 *)&tmp_one);
1125                 }
1126
1127                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1128                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1129         }
1130         return 0;
1131 }
1132
1133 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1134                 unsigned int prio)
1135 {
1136         struct rtl_priv *rtlpriv = rtl_priv(hw);
1137         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1138         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1139
1140         while (skb_queue_len(&ring->queue)) {
1141                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1142                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1143
1144                 pci_unmap_single(rtlpci->pdev,
1145                                  rtlpriv->cfg->
1146                                              ops->get_desc((u8 *) entry, true,
1147                                                    HW_DESC_TXBUFF_ADDR),
1148                                  skb->len, PCI_DMA_TODEVICE);
1149                 kfree_skb(skb);
1150                 ring->idx = (ring->idx + 1) % ring->entries;
1151         }
1152
1153         pci_free_consistent(rtlpci->pdev,
1154                             sizeof(*ring->desc) * ring->entries,
1155                             ring->desc, ring->dma);
1156         ring->desc = NULL;
1157 }
1158
1159 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1160 {
1161         int i, rx_queue_idx;
1162
1163         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1164         /*rx_queue_idx 1:RX_CMD_QUEUE */
1165         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1166              rx_queue_idx++) {
1167                 for (i = 0; i < rtlpci->rxringcount; i++) {
1168                         struct sk_buff *skb =
1169                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1170                         if (!skb)
1171                                 continue;
1172
1173                         pci_unmap_single(rtlpci->pdev,
1174                                          *((dma_addr_t *) skb->cb),
1175                                          rtlpci->rxbuffersize,
1176                                          PCI_DMA_FROMDEVICE);
1177                         kfree_skb(skb);
1178                 }
1179
1180                 pci_free_consistent(rtlpci->pdev,
1181                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1182                                            desc) * rtlpci->rxringcount,
1183                                     rtlpci->rx_ring[rx_queue_idx].desc,
1184                                     rtlpci->rx_ring[rx_queue_idx].dma);
1185                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1186         }
1187 }
1188
1189 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1190 {
1191         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1192         int ret;
1193         int i;
1194
1195         ret = _rtl_pci_init_rx_ring(hw);
1196         if (ret)
1197                 return ret;
1198
1199         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1200                 ret = _rtl_pci_init_tx_ring(hw, i,
1201                                  rtlpci->txringcount[i]);
1202                 if (ret)
1203                         goto err_free_rings;
1204         }
1205
1206         return 0;
1207
1208 err_free_rings:
1209         _rtl_pci_free_rx_ring(rtlpci);
1210
1211         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1212                 if (rtlpci->tx_ring[i].desc)
1213                         _rtl_pci_free_tx_ring(hw, i);
1214
1215         return 1;
1216 }
1217
1218 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1219 {
1220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1221         u32 i;
1222
1223         /*free rx rings */
1224         _rtl_pci_free_rx_ring(rtlpci);
1225
1226         /*free tx rings */
1227         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1228                 _rtl_pci_free_tx_ring(hw, i);
1229
1230         return 0;
1231 }
1232
1233 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1234 {
1235         struct rtl_priv *rtlpriv = rtl_priv(hw);
1236         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1237         int i, rx_queue_idx;
1238         unsigned long flags;
1239         u8 tmp_one = 1;
1240
1241         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1242         /*rx_queue_idx 1:RX_CMD_QUEUE */
1243         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1244              rx_queue_idx++) {
1245                 /*
1246                  *force the rx_ring[RX_MPDU_QUEUE/
1247                  *RX_CMD_QUEUE].idx to the first one
1248                  */
1249                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1250                         struct rtl_rx_desc *entry = NULL;
1251
1252                         for (i = 0; i < rtlpci->rxringcount; i++) {
1253                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1254                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1255                                                             false,
1256                                                             HW_DESC_RXOWN,
1257                                                             (u8 *)&tmp_one);
1258                         }
1259                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1260                 }
1261         }
1262
1263         /*
1264          *after reset, release previous pending packet,
1265          *and force the  tx idx to the first one
1266          */
1267         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1268         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1269                 if (rtlpci->tx_ring[i].desc) {
1270                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1271
1272                         while (skb_queue_len(&ring->queue)) {
1273                                 struct rtl_tx_desc *entry =
1274                                     &ring->desc[ring->idx];
1275                                 struct sk_buff *skb =
1276                                     __skb_dequeue(&ring->queue);
1277
1278                                 pci_unmap_single(rtlpci->pdev,
1279                                                  rtlpriv->cfg->ops->
1280                                                          get_desc((u8 *)
1281                                                          entry,
1282                                                          true,
1283                                                          HW_DESC_TXBUFF_ADDR),
1284                                                  skb->len, PCI_DMA_TODEVICE);
1285                                 kfree_skb(skb);
1286                                 ring->idx = (ring->idx + 1) % ring->entries;
1287                         }
1288                         ring->idx = 0;
1289                 }
1290         }
1291
1292         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1293
1294         return 0;
1295 }
1296
1297 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1298                                         struct sk_buff *skb)
1299 {
1300         struct rtl_priv *rtlpriv = rtl_priv(hw);
1301         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1302         struct ieee80211_sta *sta = info->control.sta;
1303         struct rtl_sta_info *sta_entry = NULL;
1304         u8 tid = rtl_get_tid(skb);
1305
1306         if (!sta)
1307                 return false;
1308         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1309
1310         if (!rtlpriv->rtlhal.earlymode_enable)
1311                 return false;
1312         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1313                 return false;
1314         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1315                 return false;
1316         if (tid > 7)
1317                 return false;
1318
1319         /* maybe every tid should be checked */
1320         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1321                 return false;
1322
1323         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1324         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1325         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1326
1327         return true;
1328 }
1329
1330 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1331                 struct rtl_tcb_desc *ptcb_desc)
1332 {
1333         struct rtl_priv *rtlpriv = rtl_priv(hw);
1334         struct rtl_sta_info *sta_entry = NULL;
1335         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1336         struct ieee80211_sta *sta = info->control.sta;
1337         struct rtl8192_tx_ring *ring;
1338         struct rtl_tx_desc *pdesc;
1339         u8 idx;
1340         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1341         unsigned long flags;
1342         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1343         __le16 fc = rtl_get_fc(skb);
1344         u8 *pda_addr = hdr->addr1;
1345         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1346         /*ssn */
1347         u8 tid = 0;
1348         u16 seq_number = 0;
1349         u8 own;
1350         u8 temp_one = 1;
1351
1352         if (ieee80211_is_auth(fc)) {
1353                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1354                 rtl_ips_nic_on(hw);
1355         }
1356
1357         if (rtlpriv->psc.sw_ps_enabled) {
1358                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1359                         !ieee80211_has_pm(fc))
1360                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1361         }
1362
1363         rtl_action_proc(hw, skb, true);
1364
1365         if (is_multicast_ether_addr(pda_addr))
1366                 rtlpriv->stats.txbytesmulticast += skb->len;
1367         else if (is_broadcast_ether_addr(pda_addr))
1368                 rtlpriv->stats.txbytesbroadcast += skb->len;
1369         else
1370                 rtlpriv->stats.txbytesunicast += skb->len;
1371
1372         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1373         ring = &rtlpci->tx_ring[hw_queue];
1374         if (hw_queue != BEACON_QUEUE)
1375                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1376                                 ring->entries;
1377         else
1378                 idx = 0;
1379
1380         pdesc = &ring->desc[idx];
1381         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1382                         true, HW_DESC_OWN);
1383
1384         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1385                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1386                          ("No more TX desc@%d, ring->idx = %d,"
1387                           "idx = %d, skb_queue_len = 0x%d\n",
1388                           hw_queue, ring->idx, idx,
1389                           skb_queue_len(&ring->queue)));
1390
1391                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1392                 return skb->len;
1393         }
1394
1395         if (ieee80211_is_data_qos(fc)) {
1396                 tid = rtl_get_tid(skb);
1397                 if (sta) {
1398                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1399                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1400                                       IEEE80211_SCTL_SEQ) >> 4;
1401                         seq_number += 1;
1402
1403                         if (!ieee80211_has_morefrags(hdr->frame_control))
1404                                 sta_entry->tids[tid].seq_number = seq_number;
1405                 }
1406         }
1407
1408         if (ieee80211_is_data(fc))
1409                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1410
1411         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1412                         info, skb, hw_queue, ptcb_desc);
1413
1414         __skb_queue_tail(&ring->queue, skb);
1415
1416         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1417                                     HW_DESC_OWN, (u8 *)&temp_one);
1418
1419
1420         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1421             hw_queue != BEACON_QUEUE) {
1422
1423                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1424                          ("less desc left, stop skb_queue@%d, "
1425                           "ring->idx = %d,"
1426                           "idx = %d, skb_queue_len = 0x%d\n",
1427                           hw_queue, ring->idx, idx,
1428                           skb_queue_len(&ring->queue)));
1429
1430                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1431         }
1432
1433         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1434
1435         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1436
1437         return 0;
1438 }
1439
1440 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1441 {
1442         struct rtl_priv *rtlpriv = rtl_priv(hw);
1443         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1444         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1445         u16 i = 0;
1446         int queue_id;
1447         struct rtl8192_tx_ring *ring;
1448
1449         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1450                 u32 queue_len;
1451                 ring = &pcipriv->dev.tx_ring[queue_id];
1452                 queue_len = skb_queue_len(&ring->queue);
1453                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1454                         queue_id == TXCMD_QUEUE) {
1455                         queue_id--;
1456                         continue;
1457                 } else {
1458                         msleep(20);
1459                         i++;
1460                 }
1461
1462                 /* we just wait 1s for all queues */
1463                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1464                         is_hal_stop(rtlhal) || i >= 200)
1465                         return;
1466         }
1467 }
1468
1469 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1470 {
1471         struct rtl_priv *rtlpriv = rtl_priv(hw);
1472         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1473
1474         _rtl_pci_deinit_trx_ring(hw);
1475
1476         synchronize_irq(rtlpci->pdev->irq);
1477         tasklet_kill(&rtlpriv->works.irq_tasklet);
1478         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1479
1480         flush_workqueue(rtlpriv->works.rtl_wq);
1481         destroy_workqueue(rtlpriv->works.rtl_wq);
1482
1483 }
1484
1485 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1486 {
1487         struct rtl_priv *rtlpriv = rtl_priv(hw);
1488         int err;
1489
1490         _rtl_pci_init_struct(hw, pdev);
1491
1492         err = _rtl_pci_init_trx_ring(hw);
1493         if (err) {
1494                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1495                          ("tx ring initialization failed"));
1496                 return err;
1497         }
1498
1499         return 1;
1500 }
1501
1502 static int rtl_pci_start(struct ieee80211_hw *hw)
1503 {
1504         struct rtl_priv *rtlpriv = rtl_priv(hw);
1505         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1506         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1507         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1508
1509         int err;
1510
1511         rtl_pci_reset_trx_ring(hw);
1512
1513         rtlpci->driver_is_goingto_unload = false;
1514         err = rtlpriv->cfg->ops->hw_init(hw);
1515         if (err) {
1516                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1517                          ("Failed to config hardware!\n"));
1518                 return err;
1519         }
1520
1521         rtlpriv->cfg->ops->enable_interrupt(hw);
1522         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1523
1524         rtl_init_rx_config(hw);
1525
1526         /*should be after adapter start and interrupt enable. */
1527         set_hal_start(rtlhal);
1528
1529         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1530
1531         rtlpci->up_first_time = false;
1532
1533         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1534         return 0;
1535 }
1536
1537 static void rtl_pci_stop(struct ieee80211_hw *hw)
1538 {
1539         struct rtl_priv *rtlpriv = rtl_priv(hw);
1540         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1541         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1542         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1543         unsigned long flags;
1544         u8 RFInProgressTimeOut = 0;
1545
1546         /*
1547          *should be before disable interrupt&adapter
1548          *and will do it immediately.
1549          */
1550         set_hal_stop(rtlhal);
1551
1552         rtlpriv->cfg->ops->disable_interrupt(hw);
1553         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1554
1555         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1556         while (ppsc->rfchange_inprogress) {
1557                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1558                 if (RFInProgressTimeOut > 100) {
1559                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1560                         break;
1561                 }
1562                 mdelay(1);
1563                 RFInProgressTimeOut++;
1564                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1565         }
1566         ppsc->rfchange_inprogress = true;
1567         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1568
1569         rtlpci->driver_is_goingto_unload = true;
1570         rtlpriv->cfg->ops->hw_disable(hw);
1571         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1572
1573         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1574         ppsc->rfchange_inprogress = false;
1575         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1576
1577         rtl_pci_enable_aspm(hw);
1578 }
1579
1580 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1581                 struct ieee80211_hw *hw)
1582 {
1583         struct rtl_priv *rtlpriv = rtl_priv(hw);
1584         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1585         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1586         struct pci_dev *bridge_pdev = pdev->bus->self;
1587         u16 venderid;
1588         u16 deviceid;
1589         u8 revisionid;
1590         u16 irqline;
1591         u8 tmp;
1592
1593         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1594         venderid = pdev->vendor;
1595         deviceid = pdev->device;
1596         pci_read_config_byte(pdev, 0x8, &revisionid);
1597         pci_read_config_word(pdev, 0x3C, &irqline);
1598
1599         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1600          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1601          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1602          * the correct driver is r8192e_pci, thus this routine should
1603          * return false.
1604          */
1605         if (deviceid == RTL_PCI_8192SE_DID &&
1606             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1607                 return false;
1608
1609         if (deviceid == RTL_PCI_8192_DID ||
1610             deviceid == RTL_PCI_0044_DID ||
1611             deviceid == RTL_PCI_0047_DID ||
1612             deviceid == RTL_PCI_8192SE_DID ||
1613             deviceid == RTL_PCI_8174_DID ||
1614             deviceid == RTL_PCI_8173_DID ||
1615             deviceid == RTL_PCI_8172_DID ||
1616             deviceid == RTL_PCI_8171_DID) {
1617                 switch (revisionid) {
1618                 case RTL_PCI_REVISION_ID_8192PCIE:
1619                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1620                                  ("8192 PCI-E is found - "
1621                                   "vid/did=%x/%x\n", venderid, deviceid));
1622                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1623                         break;
1624                 case RTL_PCI_REVISION_ID_8192SE:
1625                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1626                                  ("8192SE is found - "
1627                                   "vid/did=%x/%x\n", venderid, deviceid));
1628                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1629                         break;
1630                 default:
1631                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1632                                  ("Err: Unknown device - "
1633                                   "vid/did=%x/%x\n", venderid, deviceid));
1634                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1635                         break;
1636
1637                 }
1638         } else if (deviceid == RTL_PCI_8192CET_DID ||
1639                    deviceid == RTL_PCI_8192CE_DID ||
1640                    deviceid == RTL_PCI_8191CE_DID ||
1641                    deviceid == RTL_PCI_8188CE_DID) {
1642                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1643                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1644                          ("8192C PCI-E is found - "
1645                           "vid/did=%x/%x\n", venderid, deviceid));
1646         } else if (deviceid == RTL_PCI_8192DE_DID ||
1647                    deviceid == RTL_PCI_8192DE_DID2) {
1648                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1649                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1650                          ("8192D PCI-E is found - "
1651                           "vid/did=%x/%x\n", venderid, deviceid));
1652         } else {
1653                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1654                          ("Err: Unknown device -"
1655                           " vid/did=%x/%x\n", venderid, deviceid));
1656
1657                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1658         }
1659
1660         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1661                 if (revisionid == 0 || revisionid == 1) {
1662                         if (revisionid == 0) {
1663                                 RT_TRACE(rtlpriv, COMP_INIT,
1664                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1665                                 rtlhal->interfaceindex = 0;
1666                         } else if (revisionid == 1) {
1667                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1668                                         ("Find 92DE MAC1.\n"));
1669                                 rtlhal->interfaceindex = 1;
1670                         }
1671                 } else {
1672                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1673                                 ("Unknown device - "
1674                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1675                                 venderid, deviceid, revisionid));
1676                         rtlhal->interfaceindex = 0;
1677                 }
1678         }
1679         /*find bus info */
1680         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1681         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1682         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1683
1684         if (bridge_pdev) {
1685                 /*find bridge info if available */
1686                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1687                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1688                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1689                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1690                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1691                                          ("Pci Bridge Vendor is found index:"
1692                                          " %d\n", tmp));
1693                                 break;
1694                         }
1695                 }
1696         }
1697
1698         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1699                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1700                 pcipriv->ndis_adapter.pcibridge_busnum =
1701                     bridge_pdev->bus->number;
1702                 pcipriv->ndis_adapter.pcibridge_devnum =
1703                     PCI_SLOT(bridge_pdev->devfn);
1704                 pcipriv->ndis_adapter.pcibridge_funcnum =
1705                     PCI_FUNC(bridge_pdev->devfn);
1706                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1707                     pci_pcie_cap(bridge_pdev);
1708                 pcipriv->ndis_adapter.num4bytes =
1709                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1710
1711                 rtl_pci_get_linkcontrol_field(hw);
1712
1713                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1714                     PCI_BRIDGE_VENDOR_AMD) {
1715                         pcipriv->ndis_adapter.amd_l1_patch =
1716                             rtl_pci_get_amd_l1_patch(hw);
1717                 }
1718         }
1719
1720         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1721                  ("pcidev busnumber:devnumber:funcnumber:"
1722                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1723                   pcipriv->ndis_adapter.busnumber,
1724                   pcipriv->ndis_adapter.devnumber,
1725                   pcipriv->ndis_adapter.funcnumber,
1726                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1727
1728         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1729                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1730                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1731                   pcipriv->ndis_adapter.pcibridge_busnum,
1732                   pcipriv->ndis_adapter.pcibridge_devnum,
1733                   pcipriv->ndis_adapter.pcibridge_funcnum,
1734                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1735                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1736                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1737                   pcipriv->ndis_adapter.amd_l1_patch));
1738
1739         rtl_pci_parse_configuration(pdev, hw);
1740
1741         return true;
1742 }
1743
1744 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1745                             const struct pci_device_id *id)
1746 {
1747         struct ieee80211_hw *hw = NULL;
1748
1749         struct rtl_priv *rtlpriv = NULL;
1750         struct rtl_pci_priv *pcipriv = NULL;
1751         struct rtl_pci *rtlpci;
1752         unsigned long pmem_start, pmem_len, pmem_flags;
1753         int err;
1754
1755         err = pci_enable_device(pdev);
1756         if (err) {
1757                 RT_ASSERT(false,
1758                           ("%s : Cannot enable new PCI device\n",
1759                            pci_name(pdev)));
1760                 return err;
1761         }
1762
1763         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1764                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1765                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1766                                           "for consistent allocations\n"));
1767                         pci_disable_device(pdev);
1768                         return -ENOMEM;
1769                 }
1770         }
1771
1772         pci_set_master(pdev);
1773
1774         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1775                                 sizeof(struct rtl_priv), &rtl_ops);
1776         if (!hw) {
1777                 RT_ASSERT(false,
1778                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1779                 err = -ENOMEM;
1780                 goto fail1;
1781         }
1782
1783         SET_IEEE80211_DEV(hw, &pdev->dev);
1784         pci_set_drvdata(pdev, hw);
1785
1786         rtlpriv = hw->priv;
1787         pcipriv = (void *)rtlpriv->priv;
1788         pcipriv->dev.pdev = pdev;
1789
1790         /* init cfg & intf_ops */
1791         rtlpriv->rtlhal.interface = INTF_PCI;
1792         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1793         rtlpriv->intf_ops = &rtl_pci_ops;
1794
1795         /*
1796          *init dbgp flags before all
1797          *other functions, because we will
1798          *use it in other funtions like
1799          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1800          *you can not use these macro
1801          *before this
1802          */
1803         rtl_dbgp_flag_init(hw);
1804
1805         /* MEM map */
1806         err = pci_request_regions(pdev, KBUILD_MODNAME);
1807         if (err) {
1808                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1809                 return err;
1810         }
1811
1812         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1813         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1814         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1815
1816         /*shared mem start */
1817         rtlpriv->io.pci_mem_start =
1818                         (unsigned long)pci_iomap(pdev,
1819                         rtlpriv->cfg->bar_id, pmem_len);
1820         if (rtlpriv->io.pci_mem_start == 0) {
1821                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1822                 goto fail2;
1823         }
1824
1825         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1826                  ("mem mapped space: start: 0x%08lx len:%08lx "
1827                   "flags:%08lx, after map:0x%08lx\n",
1828                   pmem_start, pmem_len, pmem_flags,
1829                   rtlpriv->io.pci_mem_start));
1830
1831         /* Disable Clk Request */
1832         pci_write_config_byte(pdev, 0x81, 0);
1833         /* leave D3 mode */
1834         pci_write_config_byte(pdev, 0x44, 0);
1835         pci_write_config_byte(pdev, 0x04, 0x06);
1836         pci_write_config_byte(pdev, 0x04, 0x07);
1837
1838         /* find adapter */
1839         if (!_rtl_pci_find_adapter(pdev, hw))
1840                 goto fail3;
1841
1842         /* Init IO handler */
1843         _rtl_pci_io_handler_init(&pdev->dev, hw);
1844
1845         /*like read eeprom and so on */
1846         rtlpriv->cfg->ops->read_eeprom_info(hw);
1847
1848         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1849                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1850                          ("Can't init_sw_vars.\n"));
1851                 goto fail3;
1852         }
1853
1854         rtlpriv->cfg->ops->init_sw_leds(hw);
1855
1856         /*aspm */
1857         rtl_pci_init_aspm(hw);
1858
1859         /* Init mac80211 sw */
1860         err = rtl_init_core(hw);
1861         if (err) {
1862                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1863                          ("Can't allocate sw for mac80211.\n"));
1864                 goto fail3;
1865         }
1866
1867         /* Init PCI sw */
1868         err = !rtl_pci_init(hw, pdev);
1869         if (err) {
1870                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1871                          ("Failed to init PCI.\n"));
1872                 goto fail3;
1873         }
1874
1875         err = ieee80211_register_hw(hw);
1876         if (err) {
1877                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1878                          ("Can't register mac80211 hw.\n"));
1879                 goto fail3;
1880         } else {
1881                 rtlpriv->mac80211.mac80211_registered = 1;
1882         }
1883
1884         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1885         if (err) {
1886                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1887                          ("failed to create sysfs device attributes\n"));
1888                 goto fail3;
1889         }
1890
1891         /*init rfkill */
1892         rtl_init_rfkill(hw);
1893
1894         rtlpci = rtl_pcidev(pcipriv);
1895         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1896                           IRQF_SHARED, KBUILD_MODNAME, hw);
1897         if (err) {
1898                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1899                          ("%s: failed to register IRQ handler\n",
1900                           wiphy_name(hw->wiphy)));
1901                 goto fail3;
1902         } else {
1903                 rtlpci->irq_alloc = 1;
1904         }
1905
1906         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1907         return 0;
1908
1909 fail3:
1910         pci_set_drvdata(pdev, NULL);
1911         rtl_deinit_core(hw);
1912         _rtl_pci_io_handler_release(hw);
1913         ieee80211_free_hw(hw);
1914
1915         if (rtlpriv->io.pci_mem_start != 0)
1916                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1917
1918 fail2:
1919         pci_release_regions(pdev);
1920
1921 fail1:
1922
1923         pci_disable_device(pdev);
1924
1925         return -ENODEV;
1926
1927 }
1928 EXPORT_SYMBOL(rtl_pci_probe);
1929
1930 void rtl_pci_disconnect(struct pci_dev *pdev)
1931 {
1932         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1933         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1934         struct rtl_priv *rtlpriv = rtl_priv(hw);
1935         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1936         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1937
1938         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1939
1940         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1941
1942         /*ieee80211_unregister_hw will call ops_stop */
1943         if (rtlmac->mac80211_registered == 1) {
1944                 ieee80211_unregister_hw(hw);
1945                 rtlmac->mac80211_registered = 0;
1946         } else {
1947                 rtl_deinit_deferred_work(hw);
1948                 rtlpriv->intf_ops->adapter_stop(hw);
1949         }
1950
1951         /*deinit rfkill */
1952         rtl_deinit_rfkill(hw);
1953
1954         rtl_pci_deinit(hw);
1955         rtl_deinit_core(hw);
1956         _rtl_pci_io_handler_release(hw);
1957         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1958
1959         if (rtlpci->irq_alloc) {
1960                 free_irq(rtlpci->pdev->irq, hw);
1961                 rtlpci->irq_alloc = 0;
1962         }
1963
1964         if (rtlpriv->io.pci_mem_start != 0) {
1965                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1966                 pci_release_regions(pdev);
1967         }
1968
1969         pci_disable_device(pdev);
1970
1971         rtl_pci_disable_aspm(hw);
1972
1973         pci_set_drvdata(pdev, NULL);
1974
1975         ieee80211_free_hw(hw);
1976 }
1977 EXPORT_SYMBOL(rtl_pci_disconnect);
1978
1979 /***************************************
1980 kernel pci power state define:
1981 PCI_D0         ((pci_power_t __force) 0)
1982 PCI_D1         ((pci_power_t __force) 1)
1983 PCI_D2         ((pci_power_t __force) 2)
1984 PCI_D3hot      ((pci_power_t __force) 3)
1985 PCI_D3cold     ((pci_power_t __force) 4)
1986 PCI_UNKNOWN    ((pci_power_t __force) 5)
1987
1988 This function is called when system
1989 goes into suspend state mac80211 will
1990 call rtl_mac_stop() from the mac80211
1991 suspend function first, So there is
1992 no need to call hw_disable here.
1993 ****************************************/
1994 int rtl_pci_suspend(struct device *dev)
1995 {
1996         struct pci_dev *pdev = to_pci_dev(dev);
1997         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1998         struct rtl_priv *rtlpriv = rtl_priv(hw);
1999
2000         rtlpriv->cfg->ops->hw_suspend(hw);
2001         rtl_deinit_rfkill(hw);
2002
2003         return 0;
2004 }
2005 EXPORT_SYMBOL(rtl_pci_suspend);
2006
2007 int rtl_pci_resume(struct device *dev)
2008 {
2009         struct pci_dev *pdev = to_pci_dev(dev);
2010         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2011         struct rtl_priv *rtlpriv = rtl_priv(hw);
2012
2013         rtlpriv->cfg->ops->hw_resume(hw);
2014         rtl_init_rfkill(hw);
2015         return 0;
2016 }
2017 EXPORT_SYMBOL(rtl_pci_resume);
2018
2019 struct rtl_intf_ops rtl_pci_ops = {
2020         .read_efuse_byte = read_efuse_byte,
2021         .adapter_start = rtl_pci_start,
2022         .adapter_stop = rtl_pci_stop,
2023         .adapter_tx = rtl_pci_tx,
2024         .flush = rtl_pci_flush,
2025         .reset_trx_ring = rtl_pci_reset_trx_ring,
2026         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2027
2028         .disable_aspm = rtl_pci_disable_aspm,
2029         .enable_aspm = rtl_pci_enable_aspm,
2030 };