drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case not processed\n");
 183                 break;
 184         }
 185
 186         /* toshiba aspm issue, toshiba will set aspm selfly
 187          * so we should not set aspm in driver */
 188         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 189         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 190                 init_aspm == 0x43)
 191                 ppsc->support_aspm = false;
 192 }
 193
 194 static bool _rtl_pci_platform_switch_device_pci_aspm(
 195                         struct ieee80211_hw *hw,
 196                         u8 value)
 197 {
 198         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 199         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 200
 201         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 202                 value |= 0x40;
 203
 204         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 205
 206         return false;
 207 }
 208
 209 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 210 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 211 {
 212         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 213         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 214
 215         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 216
 217         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 218                 udelay(100);
 219 }
 220
 221 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 222 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 223 {
 224         struct rtl_priv *rtlpriv = rtl_priv(hw);
 225         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 226         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 227         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 228         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 229         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 230         /*Retrieve original configuration settings. */
 231         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 232         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 233                                 pcibridge_linkctrlreg;
 234         u16 aspmlevel = 0;
 235         u8 tmp_u1b = 0;
 236
 237         if (!ppsc->support_aspm)
 238                 return;
 239
 240         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 241                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 242                          "PCI(Bridge) UNKNOWN\n");
 243
 244                 return;
 245         }
 246
 247         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 248                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 249                 _rtl_pci_switch_clk_req(hw, 0x0);
 250         }
 251
 252         /*for promising device will in L0 state after an I/O. */
 253         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 254
 255         /*Set corresponding value. */
 256         aspmlevel |= BIT(0) | BIT(1);
 257         linkctrl_reg &= ~aspmlevel;
 258         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 259
 260         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 261         udelay(50);
 262
 263         /*4 Disable Pci Bridge ASPM */
 264         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 265                               pcibridge_linkctrlreg);
 266
 267         udelay(50);
 268 }
 269
 270 /*
 271  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 272  *power saving We should follow the sequence to enable
 273  *RTL8192SE first then enable Pci Bridge ASPM
 274  *or the system will show bluescreen.
 275  */
 276 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 277 {
 278         struct rtl_priv *rtlpriv = rtl_priv(hw);
 279         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 280         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 281         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 282         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 283         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 284         u16 aspmlevel;
 285         u8 u_pcibridge_aspmsetting;
 286         u8 u_device_aspmsetting;
 287
 288         if (!ppsc->support_aspm)
 289                 return;
 290
 291         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 292                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 293                          "PCI(Bridge) UNKNOWN\n");
 294                 return;
 295         }
 296
 297         /*4 Enable Pci Bridge ASPM */
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 307                               u_pcibridge_aspmsetting);
 308
 309         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 310                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 311                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 312                  u_pcibridge_aspmsetting);
 313
 314         udelay(50);
 315
 316         /*Get ASPM level (with/without Clock Req) */
 317         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 318         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 319
 320         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 321         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 322
 323         u_device_aspmsetting |= aspmlevel;
 324
 325         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 326
 327         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 328                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 329                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 330                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 331         }
 332         udelay(100);
 333 }
 334
 335 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 336 {
 337         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 338
 339         bool status = false;
 340         u8 offset_e0;
 341         unsigned offset_e4;
 342
 343         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 344
 345         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 346
 347         if (offset_e0 == 0xA0) {
 348                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 349                 if (offset_e4 & BIT(23))
 350                         status = true;
 351         }
 352
 353         return status;
 354 }
 355
 356 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 357                                      struct rtl_priv **buddy_priv)
 358 {
 359         struct rtl_priv *rtlpriv = rtl_priv(hw);
 360         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 361         bool find_buddy_priv = false;
 362         struct rtl_priv *tpriv = NULL;
 363         struct rtl_pci_priv *tpcipriv = NULL;
 364
 365         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 366                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 367                                     list) {
 368                         if (tpriv) {
 369                                 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                          "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                         pcipriv->ndis_adapter.funcnumber);
 373                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                          "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                         tpcipriv->ndis_adapter.funcnumber);
 376
 377                                 if ((pcipriv->ndis_adapter.busnumber ==
 378                                      tpcipriv->ndis_adapter.busnumber) &&
 379                                     (pcipriv->ndis_adapter.devnumber ==
 380                                     tpcipriv->ndis_adapter.devnumber) &&
 381                                     (pcipriv->ndis_adapter.funcnumber !=
 382                                     tpcipriv->ndis_adapter.funcnumber)) {
 383                                         find_buddy_priv = true;
 384                                         break;
 385                                 }
 386                         }
 387                 }
 388         }
 389
 390         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 391                  "find_buddy_priv %d\n", find_buddy_priv);
 392
 393         if (find_buddy_priv)
 394                 *buddy_priv = tpriv;
 395
 396         return find_buddy_priv;
 397 }
 398
 399 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 400 {
 401         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 402         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 403         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 404         u8 linkctrl_reg;
 405         u8 num4bbytes;
 406
 407         num4bbytes = (capabilityoffset + 0x10) / 4;
 408
 409         /*Read  Link Control Register */
 410         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 411
 412         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 413 }
 414
 415 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 416                 struct ieee80211_hw *hw)
 417 {
 418         struct rtl_priv *rtlpriv = rtl_priv(hw);
 419         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 420
 421         u8 tmp;
 422         u16 linkctrl_reg;
 423
 424         /*Link Control Register */
 425         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 426         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 427
 428         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 429                  pcipriv->ndis_adapter.linkctrl_reg);
 430
 431         pci_read_config_byte(pdev, 0x98, &tmp);
 432         tmp |= BIT(4);
 433         pci_write_config_byte(pdev, 0x98, tmp);
 434
 435         tmp = 0x17;
 436         pci_write_config_byte(pdev, 0x70f, tmp);
 437 }
 438
 439 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 440 {
 441         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 442
 443         _rtl_pci_update_default_setting(hw);
 444
 445         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 446                 /*Always enable ASPM & Clock Req. */
 447                 rtl_pci_enable_aspm(hw);
 448                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 449         }
 450
 451 }
 452
 453 static void _rtl_pci_io_handler_init(struct device *dev,
 454                                      struct ieee80211_hw *hw)
 455 {
 456         struct rtl_priv *rtlpriv = rtl_priv(hw);
 457
 458         rtlpriv->io.dev = dev;
 459
 460         rtlpriv->io.write8_async = pci_write8_async;
 461         rtlpriv->io.write16_async = pci_write16_async;
 462         rtlpriv->io.write32_async = pci_write32_async;
 463
 464         rtlpriv->io.read8_sync = pci_read8_sync;
 465         rtlpriv->io.read16_sync = pci_read16_sync;
 466         rtlpriv->io.read32_sync = pci_read32_sync;
 467
 468 }
 469
 470 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 471                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 472 {
 473         struct rtl_priv *rtlpriv = rtl_priv(hw);
 474         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 475         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 476         struct sk_buff *next_skb;
 477         u8 additionlen = FCS_LEN;
 478
 479         /* here open is 4, wep/tkip is 8, aes is 12*/
 480         if (info->control.hw_key)
 481                 additionlen += info->control.hw_key->icv_len;
 482
 483         /* The most skb num is 6 */
 484         tcb_desc->empkt_num = 0;
 485         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 486         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 487                 struct ieee80211_tx_info *next_info;
 488
 489                 next_info = IEEE80211_SKB_CB(next_skb);
 490                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 491                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 492                                 next_skb->len + additionlen;
 493                         tcb_desc->empkt_num++;
 494                 } else {
 495                         break;
 496                 }
 497
 498                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 499                                       next_skb))
 500                         break;
 501
 502                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 503                         break;
 504         }
 505         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 506
 507         return true;
 508 }
 509
 510 /* just for early mode now */
 511 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 512 {
 513         struct rtl_priv *rtlpriv = rtl_priv(hw);
 514         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 515         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 516         struct sk_buff *skb = NULL;
 517         struct ieee80211_tx_info *info = NULL;
 518         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 519         int tid;
 520
 521         if (!rtlpriv->rtlhal.earlymode_enable)
 522                 return;
 523
 524         if (rtlpriv->dm.supp_phymode_switch &&
 525             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 526             (rtlpriv->buddy_priv &&
 527             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 528                 return;
 529         /* we juse use em for BE/BK/VI/VO */
 530         for (tid = 7; tid >= 0; tid--) {
 531                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 532                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 533                 while (!mac->act_scanning &&
 534                        rtlpriv->psc.rfpwr_state == ERFON) {
 535                         struct rtl_tcb_desc tcb_desc;
 536                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 537
 538                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 539                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 540                             (ring->entries - skb_queue_len(&ring->queue) >
 541                              rtlhal->max_earlymode_num)) {
 542                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 543                         } else {
 544                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 545                                 break;
 546                         }
 547                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 548
 549                         /* Some macaddr can't do early mode. like
 550                          * multicast/broadcast/no_qos data */
 551                         info = IEEE80211_SKB_CB(skb);
 552                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 553                                 _rtl_update_earlymode_info(hw, skb,
 554                                                            &tcb_desc, tid);
 555
 556                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 557                 }
 558         }
 559 }
 560
 561
 562 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 563 {
 564         struct rtl_priv *rtlpriv = rtl_priv(hw);
 565         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 566
 567         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 568
 569         while (skb_queue_len(&ring->queue)) {
 570                 struct sk_buff *skb;
 571                 struct ieee80211_tx_info *info;
 572                 __le16 fc;
 573                 u8 tid;
 574                 u8 *entry;
 575
 576                 if (rtlpriv->use_new_trx_flow)
 577                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 578                 else
 579                         entry = (u8 *)(&ring->desc[ring->idx]);
 580
 581                 if (rtlpriv->cfg->ops->get_available_desc &&
 582                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 583                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 584                                  "no available desc!\n");
 585                         return;
 586                 }
 587
 588                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 589                         return;
 590                 ring->idx = (ring->idx + 1) % ring->entries;
 591
 592                 skb = __skb_dequeue(&ring->queue);
 593                 pci_unmap_single(rtlpci->pdev,
 594                                  rtlpriv->cfg->ops->
 595                                              get_desc((u8 *)entry, true,
 596                                                       HW_DESC_TXBUFF_ADDR),
 597                                  skb->len, PCI_DMA_TODEVICE);
 598
 599                 /* remove early mode header */
 600                 if (rtlpriv->rtlhal.earlymode_enable)
 601                         skb_pull(skb, EM_HDR_LEN);
 602
 603                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 604                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 605                          ring->idx,
 606                          skb_queue_len(&ring->queue),
 607                          *(u16 *)(skb->data + 22));
 608
 609                 if (prio == TXCMD_QUEUE) {
 610                         dev_kfree_skb(skb);
 611                         goto tx_status_ok;
 612
 613                 }
 614
 615                 /* for sw LPS, just after NULL skb send out, we can
 616                  * sure AP knows we are sleeping, we should not let
 617                  * rf sleep
 618                  */
 619                 fc = rtl_get_fc(skb);
 620                 if (ieee80211_is_nullfunc(fc)) {
 621                         if (ieee80211_has_pm(fc)) {
 622                                 rtlpriv->mac80211.offchan_delay = true;
 623                                 rtlpriv->psc.state_inap = true;
 624                         } else {
 625                                 rtlpriv->psc.state_inap = false;
 626                         }
 627                 }
 628                 if (ieee80211_is_action(fc)) {
 629                         struct ieee80211_mgmt *action_frame =
 630                                 (struct ieee80211_mgmt *)skb->data;
 631                         if (action_frame->u.action.u.ht_smps.action ==
 632                             WLAN_HT_ACTION_SMPS) {
 633                                 dev_kfree_skb(skb);
 634                                 goto tx_status_ok;
 635                         }
 636                 }
 637
 638                 /* update tid tx pkt num */
 639                 tid = rtl_get_tid(skb);
 640                 if (tid <= 7)
 641                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 642
 643                 info = IEEE80211_SKB_CB(skb);
 644                 ieee80211_tx_info_clear_status(info);
 645
 646                 info->flags |= IEEE80211_TX_STAT_ACK;
 647                 /*info->status.rates[0].count = 1; */
 648
 649                 ieee80211_tx_status_irqsafe(hw, skb);
 650
 651                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 652
 653                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 654                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 655                                  prio, ring->idx,
 656                                  skb_queue_len(&ring->queue));
 657
 658                         ieee80211_wake_queue(hw,
 659                                         skb_get_queue_mapping
 660                                         (skb));
 661                 }
 662 tx_status_ok:
 663                 skb = NULL;
 664         }
 665
 666         if (((rtlpriv->link_info.num_rx_inperiod +
 667                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 668                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 669                 rtlpriv->enter_ps = false;
 670                 schedule_work(&rtlpriv->works.lps_change_work);
 671         }
 672 }
 673
 674 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 675                                     struct sk_buff *new_skb, u8 *entry,
 676                                     int rxring_idx, int desc_idx)
 677 {
 678         struct rtl_priv *rtlpriv = rtl_priv(hw);
 679         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 680         u32 bufferaddress;
 681         u8 tmp_one = 1;
 682         struct sk_buff *skb;
 683
 684         if (likely(new_skb)) {
 685                 skb = new_skb;
 686                 goto remap;
 687         }
 688         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 689         if (!skb)
 690                 return 0;
 691
 692 remap:
 693         /* just set skb->cb to mapping addr for pci_unmap_single use */
 694         *((dma_addr_t *)skb->cb) =
 695                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 696                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 697         bufferaddress = *((dma_addr_t *)skb->cb);
 698         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 699                 return 0;
 700         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 701         if (rtlpriv->use_new_trx_flow) {
 702                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 703                                             HW_DESC_RX_PREPARE,
 704                                             (u8 *)&bufferaddress);
 705         } else {
 706                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 707                                             HW_DESC_RXBUFF_ADDR,
 708                                             (u8 *)&bufferaddress);
 709                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 710                                             HW_DESC_RXPKT_LEN,
 711                                             (u8 *)&rtlpci->rxbuffersize);
 712                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 713                                             HW_DESC_RXOWN,
 714                                             (u8 *)&tmp_one);
 715         }
 716         return 1;
 717 }
 718
 719 /* inorder to receive 8K AMSDU we have set skb to
 720  * 9100bytes in init rx ring, but if this packet is
 721  * not a AMSDU, this large packet will be sent to
 722  * TCP/IP directly, this cause big packet ping fail
 723  * like: "ping -s 65507", so here we will realloc skb
 724  * based on the true size of packet, Mac80211
 725  * Probably will do it better, but does not yet.
 726  *
 727  * Some platform will fail when alloc skb sometimes.
 728  * in this condition, we will send the old skb to
 729  * mac80211 directly, this will not cause any other
 730  * issues, but only this packet will be lost by TCP/IP
 731  */
 732 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 733                                     struct sk_buff *skb,
 734                                     struct ieee80211_rx_status rx_status)
 735 {
 736         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 737                 dev_kfree_skb_any(skb);
 738         } else {
 739                 struct sk_buff *uskb = NULL;
 740                 u8 *pdata;
 741
 742                 uskb = dev_alloc_skb(skb->len + 128);
 743                 if (likely(uskb)) {
 744                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 745                                sizeof(rx_status));
 746                         pdata = (u8 *)skb_put(uskb, skb->len);
 747                         memcpy(pdata, skb->data, skb->len);
 748                         dev_kfree_skb_any(skb);
 749                         ieee80211_rx_irqsafe(hw, uskb);
 750                 } else {
 751                         ieee80211_rx_irqsafe(hw, skb);
 752                 }
 753         }
 754 }
 755
 756 /*hsisr interrupt handler*/
 757 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 758 {
 759         struct rtl_priv *rtlpriv = rtl_priv(hw);
 760         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 761
 762         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 763                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 764                        rtlpci->sys_irq_mask);
 765 }
 766
 767 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 768 {
 769         struct rtl_priv *rtlpriv = rtl_priv(hw);
 770         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 771         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 772         struct ieee80211_rx_status rx_status = { 0 };
 773         unsigned int count = rtlpci->rxringcount;
 774         u8 own;
 775         u8 tmp_one;
 776         bool unicast = false;
 777         u8 hw_queue = 0;
 778         unsigned int rx_remained_cnt;
 779         struct rtl_stats stats = {
 780                 .signal = 0,
 781                 .rate = 0,
 782         };
 783
 784         /*RX NORMAL PKT */
 785         while (count--) {
 786                 struct ieee80211_hdr *hdr;
 787                 __le16 fc;
 788                 u16 len;
 789                 /*rx buffer descriptor */
 790                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 791                 /*if use new trx flow, it means wifi info */
 792                 struct rtl_rx_desc *pdesc = NULL;
 793                 /*rx pkt */
 794                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 795                                       rtlpci->rx_ring[rxring_idx].idx];
 796                 struct sk_buff *new_skb;
 797
 798                 if (rtlpriv->use_new_trx_flow) {
 799                         rx_remained_cnt =
 800                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 801                                                                       hw_queue);
 802                         if (rx_remained_cnt == 0)
 803                                 return;
 804
 805                 } else {        /* rx descriptor */
 806                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 807                                 rtlpci->rx_ring[rxring_idx].idx];
 808
 809                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 810                                                               false,
 811                                                               HW_DESC_OWN);
 812                         if (own) /* wait data to be filled by hardware */
 813                                 return;
 814                 }
 815
 816                 /* Reaching this point means: data is filled already
 817                  * AAAAAAttention !!!
 818                  * We can NOT access 'skb' before 'pci_unmap_single'
 819                  */
 820                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 821                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 822
 823                 /* get a new skb - if fail, old one will be reused */
 824                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 825                 if (unlikely(!new_skb))
 826                         goto no_new;
 827                 if (rtlpriv->use_new_trx_flow) {
 828                         buffer_desc =
 829                           &rtlpci->rx_ring[rxring_idx].buffer_desc
 830                                 [rtlpci->rx_ring[rxring_idx].idx];
 831                         /*means rx wifi info*/
 832                         pdesc = (struct rtl_rx_desc *)skb->data;
 833                 }
 834                 memset(&rx_status , 0 , sizeof(rx_status));
 835                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 836                                                  &rx_status, (u8 *)pdesc, skb);
 837
 838                 if (rtlpriv->use_new_trx_flow)
 839                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 840                                                            (u8 *)buffer_desc,
 841                                                            hw_queue);
 842
 843                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 844                                                   HW_DESC_RXPKT_LEN);
 845
 846                 if (skb->end - skb->tail > len) {
 847                         skb_put(skb, len);
 848                         if (rtlpriv->use_new_trx_flow)
 849                                 skb_reserve(skb, stats.rx_drvinfo_size +
 850                                             stats.rx_bufshift + 24);
 851                         else
 852                                 skb_reserve(skb, stats.rx_drvinfo_size +
 853                                             stats.rx_bufshift);
 854                 } else {
 855                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 856                                  "skb->end - skb->tail = %d, len is %d\n",
 857                                  skb->end - skb->tail, len);
 858                         dev_kfree_skb_any(skb);
 859                         goto new_trx_end;
 860                 }
 861                 /* handle command packet here */
 862                 if (rtlpriv->cfg->ops->rx_command_packet &&
 863                     rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
 864                                 dev_kfree_skb_any(skb);
 865                                 goto new_trx_end;
 866                 }
 867
 868                 /*
 869                  * NOTICE This can not be use for mac80211,
 870                  * this is done in mac80211 code,
 871                  * if done here sec DHCP will fail
 872                  * skb_trim(skb, skb->len - 4);
 873                  */
 874
 875                 hdr = rtl_get_hdr(skb);
 876                 fc = rtl_get_fc(skb);
 877
 878                 if (!stats.crc && !stats.hwerror) {
 879                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 880                                sizeof(rx_status));
 881
 882                         if (is_broadcast_ether_addr(hdr->addr1)) {
 883                                 ;/*TODO*/
 884                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 885                                 ;/*TODO*/
 886                         } else {
 887                                 unicast = true;
 888                                 rtlpriv->stats.rxbytesunicast += skb->len;
 889                         }
 890                         rtl_is_special_data(hw, skb, false);
 891
 892                         if (ieee80211_is_data(fc)) {
 893                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 894                                 if (unicast)
 895                                         rtlpriv->link_info.num_rx_inperiod++;
 896                         }
 897                         /* static bcn for roaming */
 898                         rtl_beacon_statistic(hw, skb);
 899                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 900                         /* for sw lps */
 901                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 902                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 903                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 904                             (rtlpriv->rtlhal.current_bandtype ==
 905                              BAND_ON_2_4G) &&
 906                             (ieee80211_is_beacon(fc) ||
 907                              ieee80211_is_probe_resp(fc))) {
 908                                 dev_kfree_skb_any(skb);
 909                         } else {
 910                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 911                         }
 912                 } else {
 913                         dev_kfree_skb_any(skb);
 914                 }
 915 new_trx_end:
 916                 if (rtlpriv->use_new_trx_flow) {
 917                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 918                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 919                                         RTL_PCI_MAX_RX_COUNT;
 920
 921                         rx_remained_cnt--;
 922                         rtl_write_word(rtlpriv, 0x3B4,
 923                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 924                 }
 925                 if (((rtlpriv->link_info.num_rx_inperiod +
 926                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 927                       (rtlpriv->link_info.num_rx_inperiod > 2)) {
 928                         rtlpriv->enter_ps = false;
 929                         schedule_work(&rtlpriv->works.lps_change_work);
 930                 }
 931                 skb = new_skb;
 932 no_new:
 933                 if (rtlpriv->use_new_trx_flow) {
 934                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 935                                                  rxring_idx,
 936                                                  rtlpci->rx_ring[rxring_idx].idx);
 937                 } else {
 938                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 939                                                  rxring_idx,
 940                                                  rtlpci->rx_ring[rxring_idx].idx);
 941                         if (rtlpci->rx_ring[rxring_idx].idx ==
 942                             rtlpci->rxringcount - 1)
 943                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 944                                                             false,
 945                                                             HW_DESC_RXERO,
 946                                                             (u8 *)&tmp_one);
 947                 }
 948                 rtlpci->rx_ring[rxring_idx].idx =
 949                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 950                                 rtlpci->rxringcount;
 951         }
 952 }
 953
 954 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 955 {
 956         struct ieee80211_hw *hw = dev_id;
 957         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 958         struct rtl_priv *rtlpriv = rtl_priv(hw);
 959         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 960         unsigned long flags;
 961         u32 inta = 0;
 962         u32 intb = 0;
 963         irqreturn_t ret = IRQ_HANDLED;
 964
 965         if (rtlpci->irq_enabled == 0)
 966                 return ret;
 967
 968         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 969         rtlpriv->cfg->ops->disable_interrupt(hw);
 970
 971         /*read ISR: 4/8bytes */
 972         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 973
 974         /*Shared IRQ or HW disappared */
 975         if (!inta || inta == 0xffff)
 976                 goto done;
 977
 978         /*<1> beacon related */
 979         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 980                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 981                          "beacon ok interrupt!\n");
 982         }
 983
 984         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 985                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 986                          "beacon err interrupt!\n");
 987         }
 988
 989         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 990                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 991         }
 992
 993         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 994                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 995                          "prepare beacon for interrupt!\n");
 996                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 997         }
 998
 999         /*<2> Tx related */
1000         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
1001                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
1002
1003         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
1004                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1005                          "Manage ok interrupt!\n");
1006                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
1007         }
1008
1009         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1010                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1011                          "HIGH_QUEUE ok interrupt!\n");
1012                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1013         }
1014
1015         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1016                 rtlpriv->link_info.num_tx_inperiod++;
1017
1018                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1019                          "BK Tx OK interrupt!\n");
1020                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1021         }
1022
1023         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1024                 rtlpriv->link_info.num_tx_inperiod++;
1025
1026                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1027                          "BE TX OK interrupt!\n");
1028                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1029         }
1030
1031         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1032                 rtlpriv->link_info.num_tx_inperiod++;
1033
1034                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1035                          "VI TX OK interrupt!\n");
1036                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1037         }
1038
1039         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1040                 rtlpriv->link_info.num_tx_inperiod++;
1041
1042                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1043                          "Vo TX OK interrupt!\n");
1044                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1045         }
1046
1047         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1048                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1049                         rtlpriv->link_info.num_tx_inperiod++;
1050
1051                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1052                                  "CMD TX OK interrupt!\n");
1053                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1054                 }
1055         }
1056
1057         /*<3> Rx related */
1058         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1059                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1060                 _rtl_pci_rx_interrupt(hw);
1061         }
1062
1063         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1064                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1065                          "rx descriptor unavailable!\n");
1066                 _rtl_pci_rx_interrupt(hw);
1067         }
1068
1069         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1070                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1071                 _rtl_pci_rx_interrupt(hw);
1072         }
1073
1074         /*<4> fw related*/
1075         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1076                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1077                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1078                                  "firmware interrupt!\n");
1079                         queue_delayed_work(rtlpriv->works.rtl_wq,
1080                                            &rtlpriv->works.fwevt_wq, 0);
1081                 }
1082         }
1083
1084         /*<5> hsisr related*/
1085         /* Only 8188EE & 8723BE Supported.
1086          * If Other ICs Come in, System will corrupt,
1087          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1088          * are not initialized
1089          */
1090         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1091             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1092                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1093                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1094                                  "hsisr interrupt!\n");
1095                         _rtl_pci_hs_interrupt(hw);
1096                 }
1097         }
1098
1099         if (rtlpriv->rtlhal.earlymode_enable)
1100                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1101
1102 done:
1103         rtlpriv->cfg->ops->enable_interrupt(hw);
1104         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1105         return ret;
1106 }
1107
1108 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1109 {
1110         _rtl_pci_tx_chk_waitq(hw);
1111 }
1112
1113 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1114 {
1115         struct rtl_priv *rtlpriv = rtl_priv(hw);
1116         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1117         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1118         struct rtl8192_tx_ring *ring = NULL;
1119         struct ieee80211_hdr *hdr = NULL;
1120         struct ieee80211_tx_info *info = NULL;
1121         struct sk_buff *pskb = NULL;
1122         struct rtl_tx_desc *pdesc = NULL;
1123         struct rtl_tcb_desc tcb_desc;
1124         /*This is for new trx flow*/
1125         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1126         u8 temp_one = 1;
1127
1128         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1129         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1130         pskb = __skb_dequeue(&ring->queue);
1131         if (pskb)
1132                 kfree_skb(pskb);
1133
1134         /*NB: the beacon data buffer must be 32-bit aligned. */
1135         pskb = ieee80211_beacon_get(hw, mac->vif);
1136         if (pskb == NULL)
1137                 return;
1138         hdr = rtl_get_hdr(pskb);
1139         info = IEEE80211_SKB_CB(pskb);
1140         pdesc = &ring->desc[0];
1141         if (rtlpriv->use_new_trx_flow)
1142                 pbuffer_desc = &ring->buffer_desc[0];
1143
1144         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1145                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1146                                         BEACON_QUEUE, &tcb_desc);
1147
1148         __skb_queue_tail(&ring->queue, pskb);
1149
1150         if (rtlpriv->use_new_trx_flow) {
1151                 temp_one = 4;
1152                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1153                                             HW_DESC_OWN, (u8 *)&temp_one);
1154         } else {
1155                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1156                                             &temp_one);
1157         }
1158         return;
1159 }
1160
1161 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1162 {
1163         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1164         struct rtl_priv *rtlpriv = rtl_priv(hw);
1165         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1166         u8 i;
1167         u16 desc_num;
1168
1169         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1170                 desc_num = TX_DESC_NUM_92E;
1171         else
1172                 desc_num = RT_TXDESC_NUM;
1173
1174         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1175                 rtlpci->txringcount[i] = desc_num;
1176
1177         /*
1178          *we just alloc 2 desc for beacon queue,
1179          *because we just need first desc in hw beacon.
1180          */
1181         rtlpci->txringcount[BEACON_QUEUE] = 2;
1182
1183         /*BE queue need more descriptor for performance
1184          *consideration or, No more tx desc will happen,
1185          *and may cause mac80211 mem leakage.
1186          */
1187         if (!rtl_priv(hw)->use_new_trx_flow)
1188                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1189
1190         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1191         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1192 }
1193
1194 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1195                 struct pci_dev *pdev)
1196 {
1197         struct rtl_priv *rtlpriv = rtl_priv(hw);
1198         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1199         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1200         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1201
1202         rtlpci->up_first_time = true;
1203         rtlpci->being_init_adapter = false;
1204
1205         rtlhal->hw = hw;
1206         rtlpci->pdev = pdev;
1207
1208         /*Tx/Rx related var */
1209         _rtl_pci_init_trx_var(hw);
1210
1211         /*IBSS*/ mac->beacon_interval = 100;
1212
1213         /*AMPDU*/
1214         mac->min_space_cfg = 0;
1215         mac->max_mss_density = 0;
1216         /*set sane AMPDU defaults */
1217         mac->current_ampdu_density = 7;
1218         mac->current_ampdu_factor = 3;
1219
1220         /*QOS*/
1221         rtlpci->acm_method = EACMWAY2_SW;
1222
1223         /*task */
1224         tasklet_init(&rtlpriv->works.irq_tasklet,
1225                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1226                      (unsigned long)hw);
1227         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1228                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1229                      (unsigned long)hw);
1230         INIT_WORK(&rtlpriv->works.lps_change_work,
1231                   rtl_lps_change_work_callback);
1232 }
1233
1234 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1235                                  unsigned int prio, unsigned int entries)
1236 {
1237         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1238         struct rtl_priv *rtlpriv = rtl_priv(hw);
1239         struct rtl_tx_buffer_desc *buffer_desc;
1240         struct rtl_tx_desc *desc;
1241         dma_addr_t buffer_desc_dma, desc_dma;
1242         u32 nextdescaddress;
1243         int i;
1244
1245         /* alloc tx buffer desc for new trx flow*/
1246         if (rtlpriv->use_new_trx_flow) {
1247                 buffer_desc =
1248                    pci_zalloc_consistent(rtlpci->pdev,
1249                                          sizeof(*buffer_desc) * entries,
1250                                          &buffer_desc_dma);
1251
1252                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1253                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1254                                  "Cannot allocate TX ring (prio = %d)\n",
1255                                  prio);
1256                         return -ENOMEM;
1257                 }
1258
1259                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1260                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1261
1262                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1263                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1264                 rtlpci->tx_ring[prio].avl_desc = entries;
1265         }
1266
1267         /* alloc dma for this ring */
1268         desc = pci_zalloc_consistent(rtlpci->pdev,
1269                                      sizeof(*desc) * entries, &desc_dma);
1270
1271         if (!desc || (unsigned long)desc & 0xFF) {
1272                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1273                          "Cannot allocate TX ring (prio = %d)\n", prio);
1274                 return -ENOMEM;
1275         }
1276
1277         rtlpci->tx_ring[prio].desc = desc;
1278         rtlpci->tx_ring[prio].dma = desc_dma;
1279
1280         rtlpci->tx_ring[prio].idx = 0;
1281         rtlpci->tx_ring[prio].entries = entries;
1282         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1283
1284         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1285                  prio, desc);
1286
1287         /* init every desc in this ring */
1288         if (!rtlpriv->use_new_trx_flow) {
1289                 for (i = 0; i < entries; i++) {
1290                         nextdescaddress = (u32)desc_dma +
1291                                           ((i + 1) % entries) *
1292                                           sizeof(*desc);
1293
1294                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1295                                                     true,
1296                                                     HW_DESC_TX_NEXTDESC_ADDR,
1297                                                     (u8 *)&nextdescaddress);
1298                 }
1299         }
1300         return 0;
1301 }
1302
1303 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1304 {
1305         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1306         struct rtl_priv *rtlpriv = rtl_priv(hw);
1307         int i;
1308
1309         if (rtlpriv->use_new_trx_flow) {
1310                 struct rtl_rx_buffer_desc *entry = NULL;
1311                 /* alloc dma for this ring */
1312                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1313                     pci_zalloc_consistent(rtlpci->pdev,
1314                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1315                                                  buffer_desc) *
1316                                                  rtlpci->rxringcount,
1317                                           &rtlpci->rx_ring[rxring_idx].dma);
1318                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1319                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1320                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1321                                  "Cannot allocate RX ring\n");
1322                         return -ENOMEM;
1323                 }
1324
1325                 /* init every desc in this ring */
1326                 rtlpci->rx_ring[rxring_idx].idx = 0;
1327                 for (i = 0; i < rtlpci->rxringcount; i++) {
1328                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1329                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1330                                                       rxring_idx, i))
1331                                 return -ENOMEM;
1332                 }
1333         } else {
1334                 struct rtl_rx_desc *entry = NULL;
1335                 u8 tmp_one = 1;
1336                 /* alloc dma for this ring */
1337                 rtlpci->rx_ring[rxring_idx].desc =
1338                     pci_zalloc_consistent(rtlpci->pdev,
1339                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1340                                           desc) * rtlpci->rxringcount,
1341                                           &rtlpci->rx_ring[rxring_idx].dma);
1342                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1343                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1344                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1345                                  "Cannot allocate RX ring\n");
1346                         return -ENOMEM;
1347                 }
1348
1349                 /* init every desc in this ring */
1350                 rtlpci->rx_ring[rxring_idx].idx = 0;
1351
1352                 for (i = 0; i < rtlpci->rxringcount; i++) {
1353                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1354                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1355                                                       rxring_idx, i))
1356                                 return -ENOMEM;
1357                 }
1358
1359                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1360                                             HW_DESC_RXERO, &tmp_one);
1361         }
1362         return 0;
1363 }
1364
1365 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1366                 unsigned int prio)
1367 {
1368         struct rtl_priv *rtlpriv = rtl_priv(hw);
1369         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1370         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1371
1372         /* free every desc in this ring */
1373         while (skb_queue_len(&ring->queue)) {
1374                 u8 *entry;
1375                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1376
1377                 if (rtlpriv->use_new_trx_flow)
1378                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1379                 else
1380                         entry = (u8 *)(&ring->desc[ring->idx]);
1381
1382                 pci_unmap_single(rtlpci->pdev,
1383                                  rtlpriv->cfg->
1384                                              ops->get_desc((u8 *)entry, true,
1385                                                    HW_DESC_TXBUFF_ADDR),
1386                                  skb->len, PCI_DMA_TODEVICE);
1387                 kfree_skb(skb);
1388                 ring->idx = (ring->idx + 1) % ring->entries;
1389         }
1390
1391         /* free dma of this ring */
1392         pci_free_consistent(rtlpci->pdev,
1393                             sizeof(*ring->desc) * ring->entries,
1394                             ring->desc, ring->dma);
1395         ring->desc = NULL;
1396         if (rtlpriv->use_new_trx_flow) {
1397                 pci_free_consistent(rtlpci->pdev,
1398                                     sizeof(*ring->buffer_desc) * ring->entries,
1399                                     ring->buffer_desc, ring->buffer_desc_dma);
1400                 ring->buffer_desc = NULL;
1401         }
1402 }
1403
1404 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1405 {
1406         struct rtl_priv *rtlpriv = rtl_priv(hw);
1407         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1408         int i;
1409
1410         /* free every desc in this ring */
1411         for (i = 0; i < rtlpci->rxringcount; i++) {
1412                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1413
1414                 if (!skb)
1415                         continue;
1416                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1417                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1418                 kfree_skb(skb);
1419         }
1420
1421         /* free dma of this ring */
1422         if (rtlpriv->use_new_trx_flow) {
1423                 pci_free_consistent(rtlpci->pdev,
1424                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1425                                     buffer_desc) * rtlpci->rxringcount,
1426                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1427                                     rtlpci->rx_ring[rxring_idx].dma);
1428                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1429         } else {
1430                 pci_free_consistent(rtlpci->pdev,
1431                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1432                                     rtlpci->rxringcount,
1433                                     rtlpci->rx_ring[rxring_idx].desc,
1434                                     rtlpci->rx_ring[rxring_idx].dma);
1435                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1436         }
1437 }
1438
1439 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1440 {
1441         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1442         int ret;
1443         int i, rxring_idx;
1444
1445         /* rxring_idx 0:RX_MPDU_QUEUE
1446          * rxring_idx 1:RX_CMD_QUEUE
1447          */
1448         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1449                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1450                 if (ret)
1451                         return ret;
1452         }
1453
1454         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1455                 ret = _rtl_pci_init_tx_ring(hw, i,
1456                                  rtlpci->txringcount[i]);
1457                 if (ret)
1458                         goto err_free_rings;
1459         }
1460
1461         return 0;
1462
1463 err_free_rings:
1464         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1465                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1466
1467         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1468                 if (rtlpci->tx_ring[i].desc ||
1469                     rtlpci->tx_ring[i].buffer_desc)
1470                         _rtl_pci_free_tx_ring(hw, i);
1471
1472         return 1;
1473 }
1474
1475 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1476 {
1477         u32 i, rxring_idx;
1478
1479         /*free rx rings */
1480         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1481                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1482
1483         /*free tx rings */
1484         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1485                 _rtl_pci_free_tx_ring(hw, i);
1486
1487         return 0;
1488 }
1489
1490 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1491 {
1492         struct rtl_priv *rtlpriv = rtl_priv(hw);
1493         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1494         int i, rxring_idx;
1495         unsigned long flags;
1496         u8 tmp_one = 1;
1497         u32 bufferaddress;
1498         /* rxring_idx 0:RX_MPDU_QUEUE */
1499         /* rxring_idx 1:RX_CMD_QUEUE */
1500         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1501                 /* force the rx_ring[RX_MPDU_QUEUE/
1502                  * RX_CMD_QUEUE].idx to the first one
1503                  *new trx flow, do nothing
1504                 */
1505                 if (!rtlpriv->use_new_trx_flow &&
1506                     rtlpci->rx_ring[rxring_idx].desc) {
1507                         struct rtl_rx_desc *entry = NULL;
1508
1509                         rtlpci->rx_ring[rxring_idx].idx = 0;
1510                         for (i = 0; i < rtlpci->rxringcount; i++) {
1511                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1512                                 bufferaddress =
1513                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1514                                   false , HW_DESC_RXBUFF_ADDR);
1515                                 memset((u8 *)entry , 0 ,
1516                                        sizeof(*rtlpci->rx_ring
1517                                        [rxring_idx].desc));/*clear one entry*/
1518                                 if (rtlpriv->use_new_trx_flow) {
1519                                         rtlpriv->cfg->ops->set_desc(hw,
1520                                             (u8 *)entry, false,
1521                                             HW_DESC_RX_PREPARE,
1522                                             (u8 *)&bufferaddress);
1523                                 } else {
1524                                         rtlpriv->cfg->ops->set_desc(hw,
1525                                             (u8 *)entry, false,
1526                                             HW_DESC_RXBUFF_ADDR,
1527                                             (u8 *)&bufferaddress);
1528                                         rtlpriv->cfg->ops->set_desc(hw,
1529                                             (u8 *)entry, false,
1530                                             HW_DESC_RXPKT_LEN,
1531                                             (u8 *)&rtlpci->rxbuffersize);
1532                                         rtlpriv->cfg->ops->set_desc(hw,
1533                                             (u8 *)entry, false,
1534                                             HW_DESC_RXOWN,
1535                                             (u8 *)&tmp_one);
1536                                 }
1537                         }
1538                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1539                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1540                 }
1541                 rtlpci->rx_ring[rxring_idx].idx = 0;
1542         }
1543
1544         /*
1545          *after reset, release previous pending packet,
1546          *and force the  tx idx to the first one
1547          */
1548         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1549         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1550                 if (rtlpci->tx_ring[i].desc ||
1551                     rtlpci->tx_ring[i].buffer_desc) {
1552                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1553
1554                         while (skb_queue_len(&ring->queue)) {
1555                                 u8 *entry;
1556                                 struct sk_buff *skb =
1557                                         __skb_dequeue(&ring->queue);
1558                                 if (rtlpriv->use_new_trx_flow)
1559                                         entry = (u8 *)(&ring->buffer_desc
1560                                                                 [ring->idx]);
1561                                 else
1562                                         entry = (u8 *)(&ring->desc[ring->idx]);
1563
1564                                 pci_unmap_single(rtlpci->pdev,
1565                                                  rtlpriv->cfg->ops->
1566                                                          get_desc((u8 *)
1567                                                          entry,
1568                                                          true,
1569                                                          HW_DESC_TXBUFF_ADDR),
1570                                                  skb->len, PCI_DMA_TODEVICE);
1571                                 kfree_skb(skb);
1572                                 ring->idx = (ring->idx + 1) % ring->entries;
1573                         }
1574                         ring->idx = 0;
1575                 }
1576         }
1577         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1578
1579         return 0;
1580 }
1581
1582 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1583                                         struct ieee80211_sta *sta,
1584                                         struct sk_buff *skb)
1585 {
1586         struct rtl_priv *rtlpriv = rtl_priv(hw);
1587         struct rtl_sta_info *sta_entry = NULL;
1588         u8 tid = rtl_get_tid(skb);
1589         __le16 fc = rtl_get_fc(skb);
1590
1591         if (!sta)
1592                 return false;
1593         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1594
1595         if (!rtlpriv->rtlhal.earlymode_enable)
1596                 return false;
1597         if (ieee80211_is_nullfunc(fc))
1598                 return false;
1599         if (ieee80211_is_qos_nullfunc(fc))
1600                 return false;
1601         if (ieee80211_is_pspoll(fc))
1602                 return false;
1603         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1604                 return false;
1605         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1606                 return false;
1607         if (tid > 7)
1608                 return false;
1609
1610         /* maybe every tid should be checked */
1611         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1612                 return false;
1613
1614         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1615         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1616         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1617
1618         return true;
1619 }
1620
1621 static int rtl_pci_tx(struct ieee80211_hw *hw,
1622                       struct ieee80211_sta *sta,
1623                       struct sk_buff *skb,
1624                       struct rtl_tcb_desc *ptcb_desc)
1625 {
1626         struct rtl_priv *rtlpriv = rtl_priv(hw);
1627         struct rtl_sta_info *sta_entry = NULL;
1628         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1629         struct rtl8192_tx_ring *ring;
1630         struct rtl_tx_desc *pdesc;
1631         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1632         u16 idx;
1633         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1634         unsigned long flags;
1635         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1636         __le16 fc = rtl_get_fc(skb);
1637         u8 *pda_addr = hdr->addr1;
1638         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1639         /*ssn */
1640         u8 tid = 0;
1641         u16 seq_number = 0;
1642         u8 own;
1643         u8 temp_one = 1;
1644
1645         if (ieee80211_is_mgmt(fc))
1646                 rtl_tx_mgmt_proc(hw, skb);
1647
1648         if (rtlpriv->psc.sw_ps_enabled) {
1649                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1650                         !ieee80211_has_pm(fc))
1651                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1652         }
1653
1654         rtl_action_proc(hw, skb, true);
1655
1656         if (is_multicast_ether_addr(pda_addr))
1657                 rtlpriv->stats.txbytesmulticast += skb->len;
1658         else if (is_broadcast_ether_addr(pda_addr))
1659                 rtlpriv->stats.txbytesbroadcast += skb->len;
1660         else
1661                 rtlpriv->stats.txbytesunicast += skb->len;
1662
1663         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1664         ring = &rtlpci->tx_ring[hw_queue];
1665         if (hw_queue != BEACON_QUEUE) {
1666                 if (rtlpriv->use_new_trx_flow)
1667                         idx = ring->cur_tx_wp;
1668                 else
1669                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1670                               ring->entries;
1671         } else {
1672                 idx = 0;
1673         }
1674
1675         pdesc = &ring->desc[idx];
1676         if (rtlpriv->use_new_trx_flow) {
1677                 ptx_bd_desc = &ring->buffer_desc[idx];
1678         } else {
1679                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1680                                 true, HW_DESC_OWN);
1681
1682                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1683                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1684                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1685                                  hw_queue, ring->idx, idx,
1686                                  skb_queue_len(&ring->queue));
1687
1688                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1689                                                flags);
1690                         return skb->len;
1691                 }
1692         }
1693
1694         if (rtlpriv->cfg->ops->get_available_desc &&
1695             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1696                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1697                                  "get_available_desc fail\n");
1698                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1699                                                flags);
1700                         return skb->len;
1701         }
1702
1703         if (ieee80211_is_data_qos(fc)) {
1704                 tid = rtl_get_tid(skb);
1705                 if (sta) {
1706                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1707                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1708                                       IEEE80211_SCTL_SEQ) >> 4;
1709                         seq_number += 1;
1710
1711                         if (!ieee80211_has_morefrags(hdr->frame_control))
1712                                 sta_entry->tids[tid].seq_number = seq_number;
1713                 }
1714         }
1715
1716         if (ieee80211_is_data(fc))
1717                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1718
1719         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1720                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1721
1722         __skb_queue_tail(&ring->queue, skb);
1723
1724         if (rtlpriv->use_new_trx_flow) {
1725                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1726                                             HW_DESC_OWN, &hw_queue);
1727         } else {
1728                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1729                                             HW_DESC_OWN, &temp_one);
1730         }
1731
1732         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1733             hw_queue != BEACON_QUEUE) {
1734                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1735                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1736                          hw_queue, ring->idx, idx,
1737                          skb_queue_len(&ring->queue));
1738
1739                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1740         }
1741
1742         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1743
1744         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1745
1746         return 0;
1747 }
1748
1749 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1750 {
1751         struct rtl_priv *rtlpriv = rtl_priv(hw);
1752         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1753         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1754         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1755         u16 i = 0;
1756         int queue_id;
1757         struct rtl8192_tx_ring *ring;
1758
1759         if (mac->skip_scan)
1760                 return;
1761
1762         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1763                 u32 queue_len;
1764
1765                 if (((queues >> queue_id) & 0x1) == 0) {
1766                         queue_id--;
1767                         continue;
1768                 }
1769                 ring = &pcipriv->dev.tx_ring[queue_id];
1770                 queue_len = skb_queue_len(&ring->queue);
1771                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1772                         queue_id == TXCMD_QUEUE) {
1773                         queue_id--;
1774                         continue;
1775                 } else {
1776                         msleep(20);
1777                         i++;
1778                 }
1779
1780                 /* we just wait 1s for all queues */
1781                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1782                         is_hal_stop(rtlhal) || i >= 200)
1783                         return;
1784         }
1785 }
1786
1787 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1788 {
1789         struct rtl_priv *rtlpriv = rtl_priv(hw);
1790         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1791
1792         _rtl_pci_deinit_trx_ring(hw);
1793
1794         synchronize_irq(rtlpci->pdev->irq);
1795         tasklet_kill(&rtlpriv->works.irq_tasklet);
1796         cancel_work_sync(&rtlpriv->works.lps_change_work);
1797
1798         flush_workqueue(rtlpriv->works.rtl_wq);
1799         destroy_workqueue(rtlpriv->works.rtl_wq);
1800
1801 }
1802
1803 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1804 {
1805         struct rtl_priv *rtlpriv = rtl_priv(hw);
1806         int err;
1807
1808         _rtl_pci_init_struct(hw, pdev);
1809
1810         err = _rtl_pci_init_trx_ring(hw);
1811         if (err) {
1812                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1813                          "tx ring initialization failed\n");
1814                 return err;
1815         }
1816
1817         return 0;
1818 }
1819
1820 static int rtl_pci_start(struct ieee80211_hw *hw)
1821 {
1822         struct rtl_priv *rtlpriv = rtl_priv(hw);
1823         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1824         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1825         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1826
1827         int err;
1828
1829         rtl_pci_reset_trx_ring(hw);
1830
1831         rtlpci->driver_is_goingto_unload = false;
1832         if (rtlpriv->cfg->ops->get_btc_status &&
1833             rtlpriv->cfg->ops->get_btc_status()) {
1834                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1835                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1836         }
1837         err = rtlpriv->cfg->ops->hw_init(hw);
1838         if (err) {
1839                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1840                          "Failed to config hardware!\n");
1841                 return err;
1842         }
1843
1844         rtlpriv->cfg->ops->enable_interrupt(hw);
1845         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1846
1847         rtl_init_rx_config(hw);
1848
1849         /*should be after adapter start and interrupt enable. */
1850         set_hal_start(rtlhal);
1851
1852         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1853
1854         rtlpci->up_first_time = false;
1855
1856         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1857         return 0;
1858 }
1859
1860 static void rtl_pci_stop(struct ieee80211_hw *hw)
1861 {
1862         struct rtl_priv *rtlpriv = rtl_priv(hw);
1863         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1864         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1865         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1866         unsigned long flags;
1867         u8 RFInProgressTimeOut = 0;
1868
1869         if (rtlpriv->cfg->ops->get_btc_status())
1870                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1871
1872         /*
1873          *should be before disable interrupt&adapter
1874          *and will do it immediately.
1875          */
1876         set_hal_stop(rtlhal);
1877
1878         rtlpci->driver_is_goingto_unload = true;
1879         rtlpriv->cfg->ops->disable_interrupt(hw);
1880         cancel_work_sync(&rtlpriv->works.lps_change_work);
1881
1882         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1883         while (ppsc->rfchange_inprogress) {
1884                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1885                 if (RFInProgressTimeOut > 100) {
1886                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1887                         break;
1888                 }
1889                 mdelay(1);
1890                 RFInProgressTimeOut++;
1891                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1892         }
1893         ppsc->rfchange_inprogress = true;
1894         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1895
1896         rtlpriv->cfg->ops->hw_disable(hw);
1897         /* some things are not needed if firmware not available */
1898         if (!rtlpriv->max_fw_size)
1899                 return;
1900         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1901
1902         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1903         ppsc->rfchange_inprogress = false;
1904         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1905
1906         rtl_pci_enable_aspm(hw);
1907 }
1908
1909 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1910                 struct ieee80211_hw *hw)
1911 {
1912         struct rtl_priv *rtlpriv = rtl_priv(hw);
1913         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1914         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1915         struct pci_dev *bridge_pdev = pdev->bus->self;
1916         u16 venderid;
1917         u16 deviceid;
1918         u8 revisionid;
1919         u16 irqline;
1920         u8 tmp;
1921
1922         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1923         venderid = pdev->vendor;
1924         deviceid = pdev->device;
1925         pci_read_config_byte(pdev, 0x8, &revisionid);
1926         pci_read_config_word(pdev, 0x3C, &irqline);
1927
1928         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1929          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1930          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1931          * the correct driver is r8192e_pci, thus this routine should
1932          * return false.
1933          */
1934         if (deviceid == RTL_PCI_8192SE_DID &&
1935             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1936                 return false;
1937
1938         if (deviceid == RTL_PCI_8192_DID ||
1939             deviceid == RTL_PCI_0044_DID ||
1940             deviceid == RTL_PCI_0047_DID ||
1941             deviceid == RTL_PCI_8192SE_DID ||
1942             deviceid == RTL_PCI_8174_DID ||
1943             deviceid == RTL_PCI_8173_DID ||
1944             deviceid == RTL_PCI_8172_DID ||
1945             deviceid == RTL_PCI_8171_DID) {
1946                 switch (revisionid) {
1947                 case RTL_PCI_REVISION_ID_8192PCIE:
1948                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1949                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1950                                  venderid, deviceid);
1951                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1952                         return false;
1953                 case RTL_PCI_REVISION_ID_8192SE:
1954                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1955                                  "8192SE is found - vid/did=%x/%x\n",
1956                                  venderid, deviceid);
1957                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1958                         break;
1959                 default:
1960                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1961                                  "Err: Unknown device - vid/did=%x/%x\n",
1962                                  venderid, deviceid);
1963                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1964                         break;
1965
1966                 }
1967         } else if (deviceid == RTL_PCI_8723AE_DID) {
1968                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1969                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1970                          "8723AE PCI-E is found - "
1971                          "vid/did=%x/%x\n", venderid, deviceid);
1972         } else if (deviceid == RTL_PCI_8192CET_DID ||
1973                    deviceid == RTL_PCI_8192CE_DID ||
1974                    deviceid == RTL_PCI_8191CE_DID ||
1975                    deviceid == RTL_PCI_8188CE_DID) {
1976                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1977                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1978                          "8192C PCI-E is found - vid/did=%x/%x\n",
1979                          venderid, deviceid);
1980         } else if (deviceid == RTL_PCI_8192DE_DID ||
1981                    deviceid == RTL_PCI_8192DE_DID2) {
1982                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1983                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1984                          "8192D PCI-E is found - vid/did=%x/%x\n",
1985                          venderid, deviceid);
1986         } else if (deviceid == RTL_PCI_8188EE_DID) {
1987                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1988                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1989                          "Find adapter, Hardware type is 8188EE\n");
1990         } else if (deviceid == RTL_PCI_8723BE_DID) {
1991                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1992                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1993                                  "Find adapter, Hardware type is 8723BE\n");
1994         } else if (deviceid == RTL_PCI_8192EE_DID) {
1995                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1996                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1997                                  "Find adapter, Hardware type is 8192EE\n");
1998         } else if (deviceid == RTL_PCI_8821AE_DID) {
1999                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2000                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2001                                  "Find adapter, Hardware type is 8821AE\n");
2002         } else if (deviceid == RTL_PCI_8812AE_DID) {
2003                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2004                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2005                                  "Find adapter, Hardware type is 8812AE\n");
2006         } else {
2007                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2008                          "Err: Unknown device - vid/did=%x/%x\n",
2009                          venderid, deviceid);
2010
2011                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2012         }
2013
2014         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2015                 if (revisionid == 0 || revisionid == 1) {
2016                         if (revisionid == 0) {
2017                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2018                                          "Find 92DE MAC0\n");
2019                                 rtlhal->interfaceindex = 0;
2020                         } else if (revisionid == 1) {
2021                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2022                                          "Find 92DE MAC1\n");
2023                                 rtlhal->interfaceindex = 1;
2024                         }
2025                 } else {
2026                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2027                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2028                                  venderid, deviceid, revisionid);
2029                         rtlhal->interfaceindex = 0;
2030                 }
2031         }
2032
2033         /* 92ee use new trx flow */
2034         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2035                 rtlpriv->use_new_trx_flow = true;
2036         else
2037                 rtlpriv->use_new_trx_flow = false;
2038
2039         /*find bus info */
2040         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2041         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2042         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2043
2044         /*find bridge info */
2045         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2046         /* some ARM have no bridge_pdev and will crash here
2047          * so we should check if bridge_pdev is NULL
2048          */
2049         if (bridge_pdev) {
2050                 /*find bridge info if available */
2051                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2052                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2053                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2054                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2055                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2056                                          "Pci Bridge Vendor is found index: %d\n",
2057                                          tmp);
2058                                 break;
2059                         }
2060                 }
2061         }
2062
2063         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2064                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2065                 pcipriv->ndis_adapter.pcibridge_busnum =
2066                     bridge_pdev->bus->number;
2067                 pcipriv->ndis_adapter.pcibridge_devnum =
2068                     PCI_SLOT(bridge_pdev->devfn);
2069                 pcipriv->ndis_adapter.pcibridge_funcnum =
2070                     PCI_FUNC(bridge_pdev->devfn);
2071                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2072                     pci_pcie_cap(bridge_pdev);
2073                 pcipriv->ndis_adapter.num4bytes =
2074                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2075
2076                 rtl_pci_get_linkcontrol_field(hw);
2077
2078                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2079                     PCI_BRIDGE_VENDOR_AMD) {
2080                         pcipriv->ndis_adapter.amd_l1_patch =
2081                             rtl_pci_get_amd_l1_patch(hw);
2082                 }
2083         }
2084
2085         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2086                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2087                  pcipriv->ndis_adapter.busnumber,
2088                  pcipriv->ndis_adapter.devnumber,
2089                  pcipriv->ndis_adapter.funcnumber,
2090                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2091
2092         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2093                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2094                  pcipriv->ndis_adapter.pcibridge_busnum,
2095                  pcipriv->ndis_adapter.pcibridge_devnum,
2096                  pcipriv->ndis_adapter.pcibridge_funcnum,
2097                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2098                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2099                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2100                  pcipriv->ndis_adapter.amd_l1_patch);
2101
2102         rtl_pci_parse_configuration(pdev, hw);
2103         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2104
2105         return true;
2106 }
2107
2108 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2109 {
2110         struct rtl_priv *rtlpriv = rtl_priv(hw);
2111         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2112         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2113         int ret;
2114
2115         ret = pci_enable_msi(rtlpci->pdev);
2116         if (ret < 0)
2117                 return ret;
2118
2119         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2120                           IRQF_SHARED, KBUILD_MODNAME, hw);
2121         if (ret < 0) {
2122                 pci_disable_msi(rtlpci->pdev);
2123                 return ret;
2124         }
2125
2126         rtlpci->using_msi = true;
2127
2128         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2129                  "MSI Interrupt Mode!\n");
2130         return 0;
2131 }
2132
2133 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2134 {
2135         struct rtl_priv *rtlpriv = rtl_priv(hw);
2136         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2137         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2138         int ret;
2139
2140         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2141                           IRQF_SHARED, KBUILD_MODNAME, hw);
2142         if (ret < 0)
2143                 return ret;
2144
2145         rtlpci->using_msi = false;
2146         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2147                  "Pin-based Interrupt Mode!\n");
2148         return 0;
2149 }
2150
2151 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2152 {
2153         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2154         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2155         int ret;
2156
2157         if (rtlpci->msi_support) {
2158                 ret = rtl_pci_intr_mode_msi(hw);
2159                 if (ret < 0)
2160                         ret = rtl_pci_intr_mode_legacy(hw);
2161         } else {
2162                 ret = rtl_pci_intr_mode_legacy(hw);
2163         }
2164         return ret;
2165 }
2166
2167 int rtl_pci_probe(struct pci_dev *pdev,
2168                             const struct pci_device_id *id)
2169 {
2170         struct ieee80211_hw *hw = NULL;
2171
2172         struct rtl_priv *rtlpriv = NULL;
2173         struct rtl_pci_priv *pcipriv = NULL;
2174         struct rtl_pci *rtlpci;
2175         unsigned long pmem_start, pmem_len, pmem_flags;
2176         int err;
2177
2178         err = pci_enable_device(pdev);
2179         if (err) {
2180                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2181                           pci_name(pdev));
2182                 return err;
2183         }
2184
2185         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2186                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2187                         RT_ASSERT(false,
2188                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2189                         err = -ENOMEM;
2190                         goto fail1;
2191                 }
2192         }
2193
2194         pci_set_master(pdev);
2195
2196         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2197                                 sizeof(struct rtl_priv), &rtl_ops);
2198         if (!hw) {
2199                 RT_ASSERT(false,
2200                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2201                 err = -ENOMEM;
2202                 goto fail1;
2203         }
2204
2205         SET_IEEE80211_DEV(hw, &pdev->dev);
2206         pci_set_drvdata(pdev, hw);
2207
2208         rtlpriv = hw->priv;
2209         rtlpriv->hw = hw;
2210         pcipriv = (void *)rtlpriv->priv;
2211         pcipriv->dev.pdev = pdev;
2212         init_completion(&rtlpriv->firmware_loading_complete);
2213         /*proximity init here*/
2214         rtlpriv->proximity.proxim_on = false;
2215
2216         pcipriv = (void *)rtlpriv->priv;
2217         pcipriv->dev.pdev = pdev;
2218
2219         /* init cfg & intf_ops */
2220         rtlpriv->rtlhal.interface = INTF_PCI;
2221         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2222         rtlpriv->intf_ops = &rtl_pci_ops;
2223         rtlpriv->glb_var = &rtl_global_var;
2224
2225         /*
2226          *init dbgp flags before all
2227          *other functions, because we will
2228          *use it in other funtions like
2229          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2230          *you can not use these macro
2231          *before this
2232          */
2233         rtl_dbgp_flag_init(hw);
2234
2235         /* MEM map */
2236         err = pci_request_regions(pdev, KBUILD_MODNAME);
2237         if (err) {
2238                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2239                 goto fail1;
2240         }
2241
2242         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2243         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2244         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2245
2246         /*shared mem start */
2247         rtlpriv->io.pci_mem_start =
2248                         (unsigned long)pci_iomap(pdev,
2249                         rtlpriv->cfg->bar_id, pmem_len);
2250         if (rtlpriv->io.pci_mem_start == 0) {
2251                 RT_ASSERT(false, "Can't map PCI mem\n");
2252                 err = -ENOMEM;
2253                 goto fail2;
2254         }
2255
2256         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2257                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2258                  pmem_start, pmem_len, pmem_flags,
2259                  rtlpriv->io.pci_mem_start);
2260
2261         /* Disable Clk Request */
2262         pci_write_config_byte(pdev, 0x81, 0);
2263         /* leave D3 mode */
2264         pci_write_config_byte(pdev, 0x44, 0);
2265         pci_write_config_byte(pdev, 0x04, 0x06);
2266         pci_write_config_byte(pdev, 0x04, 0x07);
2267
2268         /* find adapter */
2269         if (!_rtl_pci_find_adapter(pdev, hw)) {
2270                 err = -ENODEV;
2271                 goto fail3;
2272         }
2273
2274         /* Init IO handler */
2275         _rtl_pci_io_handler_init(&pdev->dev, hw);
2276
2277         /*like read eeprom and so on */
2278         rtlpriv->cfg->ops->read_eeprom_info(hw);
2279
2280         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2281                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2282                 err = -ENODEV;
2283                 goto fail3;
2284         }
2285         rtlpriv->cfg->ops->init_sw_leds(hw);
2286
2287         /*aspm */
2288         rtl_pci_init_aspm(hw);
2289
2290         /* Init mac80211 sw */
2291         err = rtl_init_core(hw);
2292         if (err) {
2293                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2294                          "Can't allocate sw for mac80211\n");
2295                 goto fail3;
2296         }
2297
2298         /* Init PCI sw */
2299         err = rtl_pci_init(hw, pdev);
2300         if (err) {
2301                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2302                 goto fail3;
2303         }
2304
2305         err = ieee80211_register_hw(hw);
2306         if (err) {
2307                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2308                          "Can't register mac80211 hw.\n");
2309                 err = -ENODEV;
2310                 goto fail3;
2311         }
2312         rtlpriv->mac80211.mac80211_registered = 1;
2313
2314         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2315         if (err) {
2316                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2317                          "failed to create sysfs device attributes\n");
2318                 goto fail3;
2319         }
2320
2321         /*init rfkill */
2322         rtl_init_rfkill(hw);    /* Init PCI sw */
2323
2324         rtlpci = rtl_pcidev(pcipriv);
2325         err = rtl_pci_intr_mode_decide(hw);
2326         if (err) {
2327                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2328                          "%s: failed to register IRQ handler\n",
2329                          wiphy_name(hw->wiphy));
2330                 goto fail3;
2331         }
2332         rtlpci->irq_alloc = 1;
2333
2334         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2335         return 0;
2336
2337 fail3:
2338         pci_set_drvdata(pdev, NULL);
2339         rtl_deinit_core(hw);
2340
2341         if (rtlpriv->io.pci_mem_start != 0)
2342                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2343
2344 fail2:
2345         pci_release_regions(pdev);
2346         complete(&rtlpriv->firmware_loading_complete);
2347
2348 fail1:
2349         if (hw)
2350                 ieee80211_free_hw(hw);
2351         pci_disable_device(pdev);
2352
2353         return err;
2354
2355 }
2356 EXPORT_SYMBOL(rtl_pci_probe);
2357
2358 void rtl_pci_disconnect(struct pci_dev *pdev)
2359 {
2360         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2361         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2362         struct rtl_priv *rtlpriv = rtl_priv(hw);
2363         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2364         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2365
2366         /* just in case driver is removed before firmware callback */
2367         wait_for_completion(&rtlpriv->firmware_loading_complete);
2368         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2369
2370         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2371
2372         /*ieee80211_unregister_hw will call ops_stop */
2373         if (rtlmac->mac80211_registered == 1) {
2374                 ieee80211_unregister_hw(hw);
2375                 rtlmac->mac80211_registered = 0;
2376         } else {
2377                 rtl_deinit_deferred_work(hw);
2378                 rtlpriv->intf_ops->adapter_stop(hw);
2379         }
2380         rtlpriv->cfg->ops->disable_interrupt(hw);
2381
2382         /*deinit rfkill */
2383         rtl_deinit_rfkill(hw);
2384
2385         rtl_pci_deinit(hw);
2386         rtl_deinit_core(hw);
2387         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2388
2389         if (rtlpci->irq_alloc) {
2390                 synchronize_irq(rtlpci->pdev->irq);
2391                 free_irq(rtlpci->pdev->irq, hw);
2392                 rtlpci->irq_alloc = 0;
2393         }
2394
2395         if (rtlpci->using_msi)
2396                 pci_disable_msi(rtlpci->pdev);
2397
2398         list_del(&rtlpriv->list);
2399         if (rtlpriv->io.pci_mem_start != 0) {
2400                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2401                 pci_release_regions(pdev);
2402         }
2403
2404         pci_disable_device(pdev);
2405
2406         rtl_pci_disable_aspm(hw);
2407
2408         pci_set_drvdata(pdev, NULL);
2409
2410         ieee80211_free_hw(hw);
2411 }
2412 EXPORT_SYMBOL(rtl_pci_disconnect);
2413
2414 #ifdef CONFIG_PM_SLEEP
2415 /***************************************
2416 kernel pci power state define:
2417 PCI_D0         ((pci_power_t __force) 0)
2418 PCI_D1         ((pci_power_t __force) 1)
2419 PCI_D2         ((pci_power_t __force) 2)
2420 PCI_D3hot      ((pci_power_t __force) 3)
2421 PCI_D3cold     ((pci_power_t __force) 4)
2422 PCI_UNKNOWN    ((pci_power_t __force) 5)
2423
2424 This function is called when system
2425 goes into suspend state mac80211 will
2426 call rtl_mac_stop() from the mac80211
2427 suspend function first, So there is
2428 no need to call hw_disable here.
2429 ****************************************/
2430 int rtl_pci_suspend(struct device *dev)
2431 {
2432         struct pci_dev *pdev = to_pci_dev(dev);
2433         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2434         struct rtl_priv *rtlpriv = rtl_priv(hw);
2435
2436         rtlpriv->cfg->ops->hw_suspend(hw);
2437         rtl_deinit_rfkill(hw);
2438
2439         return 0;
2440 }
2441 EXPORT_SYMBOL(rtl_pci_suspend);
2442
2443 int rtl_pci_resume(struct device *dev)
2444 {
2445         struct pci_dev *pdev = to_pci_dev(dev);
2446         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2447         struct rtl_priv *rtlpriv = rtl_priv(hw);
2448
2449         rtlpriv->cfg->ops->hw_resume(hw);
2450         rtl_init_rfkill(hw);
2451         return 0;
2452 }
2453 EXPORT_SYMBOL(rtl_pci_resume);
2454 #endif /* CONFIG_PM_SLEEP */
2455
2456 struct rtl_intf_ops rtl_pci_ops = {
2457         .read_efuse_byte = read_efuse_byte,
2458         .adapter_start = rtl_pci_start,
2459         .adapter_stop = rtl_pci_stop,
2460         .check_buddy_priv = rtl_pci_check_buddy_priv,
2461         .adapter_tx = rtl_pci_tx,
2462         .flush = rtl_pci_flush,
2463         .reset_trx_ring = rtl_pci_reset_trx_ring,
2464         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2465
2466         .disable_aspm = rtl_pci_disable_aspm,
2467         .enable_aspm = rtl_pci_enable_aspm,
2468 };