1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
20 #ifndef __RTL8723A_PG_H__
21 #define __RTL8723A_PG_H__
23 //====================================================
24 // EEPROM/Efuse PG Offset for 8723E/8723U/8723S
25 //====================================================
26 #define EEPROM_CCK_TX_PWR_INX_8723A 0x10
27 #define EEPROM_HT40_1S_TX_PWR_INX_8723A 0x16
28 #define EEPROM_HT20_TX_PWR_INX_DIFF_8723A 0x1C
29 #define EEPROM_OFDM_TX_PWR_INX_DIFF_8723A 0x1F
30 #define EEPROM_HT40_MAX_PWR_OFFSET_8723A 0x22
31 #define EEPROM_HT20_MAX_PWR_OFFSET_8723A 0x25
33 #define EEPROM_ChannelPlan_8723A 0x28
34 #define EEPROM_TSSI_A_8723A 0x29
35 #define EEPROM_THERMAL_METER_8723A 0x2A
36 #define RF_OPTION1_8723A 0x2B
37 #define RF_OPTION2_8723A 0x2C
38 #define RF_OPTION3_8723A 0x2D
39 #define RF_OPTION4_8723A 0x2E
40 #define EEPROM_VERSION_8723A 0x30
41 #define EEPROM_CustomID_8723A 0x31
42 #define EEPROM_SubCustomID_8723A 0x32
43 #define EEPROM_XTAL_K_8723A 0x33
44 #define EEPROM_Chipset_8723A 0x34
47 #define EEPROM_VID_8723AE 0x49
48 #define EEPROM_DID_8723AE 0x4B
49 #define EEPROM_SVID_8723AE 0x4D
50 #define EEPROM_SMID_8723AE 0x4F
51 #define EEPROM_MAC_ADDR_8723AE 0x67
54 #define EEPROM_MAC_ADDR_8723AU 0xC6
55 #define EEPROM_VID_8723AU 0xB7
56 #define EEPROM_PID_8723AU 0xB9
59 #define EEPROM_MAC_ADDR_8723AS 0xAA
61 //====================================================
62 // EEPROM/Efuse Value Type
63 //====================================================
64 #define EETYPE_TX_PWR 0x0
66 //====================================================
67 // EEPROM/Efuse Default Value
68 //====================================================
69 #define EEPROM_Default_CrystalCap_8723A 0x20
72 //----------------------------------------------------------------------------
73 // EEPROM/EFUSE data structure definition.
74 //----------------------------------------------------------------------------
75 #define MAX_RF_PATH_NUM 2
76 #define MAX_CHNL_GROUP 3+9
77 typedef struct _TxPowerInfo
79 u8 CCKIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
80 u8 HT40_1SIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
81 u8 HT40_2SIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
82 u8 HT20IndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
83 u8 OFDMIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
84 u8 HT40MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
85 u8 HT20MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
88 u8 TSSI_A_5G[3]; //5GL/5GM/5GH
90 } TxPowerInfo, *PTxPowerInfo;
94 #define MAX_CHNL_GROUP_24G 6
95 #define MAX_CHNL_GROUP_5G 14
97 // It must always set to 4, otherwise read efuse table secquence will be wrong.
98 #define MAX_TX_COUNT 4
100 typedef struct _TxPowerInfo24G
102 u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
103 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
104 //If only one tx, only BW20 and OFDM are used.
105 s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
106 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
107 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
108 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
109 } TxPowerInfo24G, *PTxPowerInfo24G;
111 typedef struct _TxPowerInfo5G
113 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G];
114 //If only one tx, only BW20, OFDM, BW80 and BW160 are used.
115 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
116 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
117 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
118 s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT];
119 s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT];
120 } TxPowerInfo5G, *PTxPowerInfo5G;
123 typedef enum _BT_Ant_NUM
127 } BT_Ant_NUM, *PBT_Ant_NUM;
129 typedef enum _BT_CoType
138 } BT_CoType, *PBT_CoType;
140 typedef enum _BT_RadioShared
143 BT_Radio_Individual = 1,
144 } BT_RadioShared, *PBT_RadioShared;