drivers/net/wireless/rtl818x/rtl8187/dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/etherdevice.h>
  28 #include <linux/eeprom_93cx6.h>
  29 #include <linux/module.h>
  30 #include <net/mac80211.h>
  31
  32 #include "rtl8187.h"
  33 #include "rtl8225.h"
  34 #ifdef CONFIG_RTL8187_LEDS
  35 #include "leds.h"
  36 #endif
  37 #include "rfkill.h"
  38
  39 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  40 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  41 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  42 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  43 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  44 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  45 MODULE_LICENSE("GPL");
  46
  47 static struct usb_device_id rtl8187_table[] = {
  48         /* Asus */
  49         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  50         /* Belkin */
  51         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  52         /* Realtek */
  53         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  54         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  55         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  56         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  57         /* Surecom */
  58         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  59         /* Logitech */
  60         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  61         /* Netgear */
  62         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  63         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  64         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  65         /* HP */
  66         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  67         /* Sitecom */
  68         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  69         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  70         {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  71         /* Sphairon Access Systems GmbH */
  72         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  73         /* Dick Smith Electronics */
  74         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  75         /* Abocom */
  76         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  77         /* Qcom */
  78         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  79         /* AirLive */
  80         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  81         /* Linksys */
  82         {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  83         {}
  84 };
  85
  86 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  87
  88 static const struct ieee80211_rate rtl818x_rates[] = {
  89         { .bitrate = 10, .hw_value = 0, },
  90         { .bitrate = 20, .hw_value = 1, },
  91         { .bitrate = 55, .hw_value = 2, },
  92         { .bitrate = 110, .hw_value = 3, },
  93         { .bitrate = 60, .hw_value = 4, },
  94         { .bitrate = 90, .hw_value = 5, },
  95         { .bitrate = 120, .hw_value = 6, },
  96         { .bitrate = 180, .hw_value = 7, },
  97         { .bitrate = 240, .hw_value = 8, },
  98         { .bitrate = 360, .hw_value = 9, },
  99         { .bitrate = 480, .hw_value = 10, },
 100         { .bitrate = 540, .hw_value = 11, },
 101 };
 102
 103 static const struct ieee80211_channel rtl818x_channels[] = {
 104         { .center_freq = 2412 },
 105         { .center_freq = 2417 },
 106         { .center_freq = 2422 },
 107         { .center_freq = 2427 },
 108         { .center_freq = 2432 },
 109         { .center_freq = 2437 },
 110         { .center_freq = 2442 },
 111         { .center_freq = 2447 },
 112         { .center_freq = 2452 },
 113         { .center_freq = 2457 },
 114         { .center_freq = 2462 },
 115         { .center_freq = 2467 },
 116         { .center_freq = 2472 },
 117         { .center_freq = 2484 },
 118 };
 119
 120 static void rtl8187_iowrite_async_cb(struct urb *urb)
 121 {
 122         kfree(urb->context);
 123 }
 124
 125 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 126                                   void *data, u16 len)
 127 {
 128         struct usb_ctrlrequest *dr;
 129         struct urb *urb;
 130         struct rtl8187_async_write_data {
 131                 u8 data[4];
 132                 struct usb_ctrlrequest dr;
 133         } *buf;
 134         int rc;
 135
 136         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 137         if (!buf)
 138                 return;
 139
 140         urb = usb_alloc_urb(0, GFP_ATOMIC);
 141         if (!urb) {
 142                 kfree(buf);
 143                 return;
 144         }
 145
 146         dr = &buf->dr;
 147
 148         dr->bRequestType = RTL8187_REQT_WRITE;
 149         dr->bRequest = RTL8187_REQ_SET_REG;
 150         dr->wValue = addr;
 151         dr->wIndex = 0;
 152         dr->wLength = cpu_to_le16(len);
 153
 154         memcpy(buf, data, len);
 155
 156         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 157                              (unsigned char *)dr, buf, len,
 158                              rtl8187_iowrite_async_cb, buf);
 159         usb_anchor_urb(urb, &priv->anchored);
 160         rc = usb_submit_urb(urb, GFP_ATOMIC);
 161         if (rc < 0) {
 162                 kfree(buf);
 163                 usb_unanchor_urb(urb);
 164         }
 165         usb_free_urb(urb);
 166 }
 167
 168 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 169                                            __le32 *addr, u32 val)
 170 {
 171         __le32 buf = cpu_to_le32(val);
 172
 173         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 174                               &buf, sizeof(buf));
 175 }
 176
 177 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 178 {
 179         struct rtl8187_priv *priv = dev->priv;
 180
 181         data <<= 8;
 182         data |= addr | 0x80;
 183
 184         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 185         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 186         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 187         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 188 }
 189
 190 static void rtl8187_tx_cb(struct urb *urb)
 191 {
 192         struct sk_buff *skb = (struct sk_buff *)urb->context;
 193         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 194         struct ieee80211_hw *hw = info->rate_driver_data[0];
 195         struct rtl8187_priv *priv = hw->priv;
 196
 197         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 198                                           sizeof(struct rtl8187_tx_hdr));
 199         ieee80211_tx_info_clear_status(info);
 200
 201         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 202                 if (priv->is_rtl8187b) {
 203                         skb_queue_tail(&priv->b_tx_status.queue, skb);
 204
 205                         /* queue is "full", discard last items */
 206                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 207                                 struct sk_buff *old_skb;
 208
 209                                 dev_dbg(&priv->udev->dev,
 210                                         "transmit status queue full\n");
 211
 212                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 213                                 ieee80211_tx_status_irqsafe(hw, old_skb);
 214                         }
 215                         return;
 216                 } else {
 217                         info->flags |= IEEE80211_TX_STAT_ACK;
 218                 }
 219         }
 220         if (priv->is_rtl8187b)
 221                 ieee80211_tx_status_irqsafe(hw, skb);
 222         else {
 223                 /* Retry information for the RTI8187 is only available by
 224                  * reading a register in the device. We are in interrupt mode
 225                  * here, thus queue the skb and finish on a work queue. */
 226                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 227                 ieee80211_queue_delayed_work(hw, &priv->work, 0);
 228         }
 229 }
 230
 231 static void rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 232 {
 233         struct rtl8187_priv *priv = dev->priv;
 234         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 235         struct ieee80211_hdr *tx_hdr =  (struct ieee80211_hdr *)(skb->data);
 236         unsigned int ep;
 237         void *buf;
 238         struct urb *urb;
 239         __le16 rts_dur = 0;
 240         u32 flags;
 241         int rc;
 242
 243         urb = usb_alloc_urb(0, GFP_ATOMIC);
 244         if (!urb) {
 245                 kfree_skb(skb);
 246                 return;
 247         }
 248
 249         flags = skb->len;
 250         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 251
 252         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 253         if (ieee80211_has_morefrags(tx_hdr->frame_control))
 254                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 255         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 256                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 257                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 258                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 259                                                  skb->len, info);
 260         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 261                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 262                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 263         }
 264
 265         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 266                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 267                         priv->seqno += 0x10;
 268                 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 269                 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 270         }
 271
 272         if (!priv->is_rtl8187b) {
 273                 struct rtl8187_tx_hdr *hdr =
 274                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 275                 hdr->flags = cpu_to_le32(flags);
 276                 hdr->len = 0;
 277                 hdr->rts_duration = rts_dur;
 278                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 279                 buf = hdr;
 280
 281                 ep = 2;
 282         } else {
 283                 /* fc needs to be calculated before skb_push() */
 284                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 285                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 286
 287                 struct rtl8187b_tx_hdr *hdr =
 288                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 289                 struct ieee80211_rate *txrate =
 290                         ieee80211_get_tx_rate(dev, info);
 291                 memset(hdr, 0, sizeof(*hdr));
 292                 hdr->flags = cpu_to_le32(flags);
 293                 hdr->rts_duration = rts_dur;
 294                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 295                 hdr->tx_duration =
 296                         ieee80211_generic_frame_duration(dev, priv->vif,
 297                                                          info->band,
 298                                                          skb->len, txrate);
 299                 buf = hdr;
 300
 301                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 302                         ep = 12;
 303                 else
 304                         ep = epmap[skb_get_queue_mapping(skb)];
 305         }
 306
 307         info->rate_driver_data[0] = dev;
 308         info->rate_driver_data[1] = urb;
 309
 310         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 311                           buf, skb->len, rtl8187_tx_cb, skb);
 312         urb->transfer_flags |= URB_ZERO_PACKET;
 313         usb_anchor_urb(urb, &priv->anchored);
 314         rc = usb_submit_urb(urb, GFP_ATOMIC);
 315         if (rc < 0) {
 316                 usb_unanchor_urb(urb);
 317                 kfree_skb(skb);
 318         }
 319         usb_free_urb(urb);
 320 }
 321
 322 static void rtl8187_rx_cb(struct urb *urb)
 323 {
 324         struct sk_buff *skb = (struct sk_buff *)urb->context;
 325         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 326         struct ieee80211_hw *dev = info->dev;
 327         struct rtl8187_priv *priv = dev->priv;
 328         struct ieee80211_rx_status rx_status = { 0 };
 329         int rate, signal;
 330         u32 flags;
 331         unsigned long f;
 332
 333         spin_lock_irqsave(&priv->rx_queue.lock, f);
 334         __skb_unlink(skb, &priv->rx_queue);
 335         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 336         skb_put(skb, urb->actual_length);
 337
 338         if (unlikely(urb->status)) {
 339                 dev_kfree_skb_irq(skb);
 340                 return;
 341         }
 342
 343         if (!priv->is_rtl8187b) {
 344                 struct rtl8187_rx_hdr *hdr =
 345                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 346                 flags = le32_to_cpu(hdr->flags);
 347                 /* As with the RTL8187B below, the AGC is used to calculate
 348                  * signal strength. In this case, the scaling
 349                  * constants are derived from the output of p54usb.
 350                  */
 351                 signal = -4 - ((27 * hdr->agc) >> 6);
 352                 rx_status.antenna = (hdr->signal >> 7) & 1;
 353                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 354         } else {
 355                 struct rtl8187b_rx_hdr *hdr =
 356                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 357                 /* The Realtek datasheet for the RTL8187B shows that the RX
 358                  * header contains the following quantities: signal quality,
 359                  * RSSI, AGC, the received power in dB, and the measured SNR.
 360                  * In testing, none of these quantities show qualitative
 361                  * agreement with AP signal strength, except for the AGC,
 362                  * which is inversely proportional to the strength of the
 363                  * signal. In the following, the signal strength
 364                  * is derived from the AGC. The arbitrary scaling constants
 365                  * are chosen to make the results close to the values obtained
 366                  * for a BCM4312 using b43 as the driver. The noise is ignored
 367                  * for now.
 368                  */
 369                 flags = le32_to_cpu(hdr->flags);
 370                 signal = 14 - hdr->agc / 2;
 371                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 372                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 373         }
 374
 375         rx_status.signal = signal;
 376         priv->signal = signal;
 377         rate = (flags >> 20) & 0xF;
 378         skb_trim(skb, flags & 0x0FFF);
 379         rx_status.rate_idx = rate;
 380         rx_status.freq = dev->conf.channel->center_freq;
 381         rx_status.band = dev->conf.channel->band;
 382         rx_status.flag |= RX_FLAG_MACTIME_MPDU;
 383         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 384                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 385         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 386         ieee80211_rx_irqsafe(dev, skb);
 387
 388         skb = dev_alloc_skb(RTL8187_MAX_RX);
 389         if (unlikely(!skb)) {
 390                 /* TODO check rx queue length and refill *somewhere* */
 391                 return;
 392         }
 393
 394         info = (struct rtl8187_rx_info *)skb->cb;
 395         info->urb = urb;
 396         info->dev = dev;
 397         urb->transfer_buffer = skb_tail_pointer(skb);
 398         urb->context = skb;
 399         skb_queue_tail(&priv->rx_queue, skb);
 400
 401         usb_anchor_urb(urb, &priv->anchored);
 402         if (usb_submit_urb(urb, GFP_ATOMIC)) {
 403                 usb_unanchor_urb(urb);
 404                 skb_unlink(skb, &priv->rx_queue);
 405                 dev_kfree_skb_irq(skb);
 406         }
 407 }
 408
 409 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 410 {
 411         struct rtl8187_priv *priv = dev->priv;
 412         struct urb *entry = NULL;
 413         struct sk_buff *skb;
 414         struct rtl8187_rx_info *info;
 415         int ret = 0;
 416
 417         while (skb_queue_len(&priv->rx_queue) < 16) {
 418                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 419                 if (!skb) {
 420                         ret = -ENOMEM;
 421                         goto err;
 422                 }
 423                 entry = usb_alloc_urb(0, GFP_KERNEL);
 424                 if (!entry) {
 425                         ret = -ENOMEM;
 426                         goto err;
 427                 }
 428                 usb_fill_bulk_urb(entry, priv->udev,
 429                                   usb_rcvbulkpipe(priv->udev,
 430                                   priv->is_rtl8187b ? 3 : 1),
 431                                   skb_tail_pointer(skb),
 432                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 433                 info = (struct rtl8187_rx_info *)skb->cb;
 434                 info->urb = entry;
 435                 info->dev = dev;
 436                 skb_queue_tail(&priv->rx_queue, skb);
 437                 usb_anchor_urb(entry, &priv->anchored);
 438                 ret = usb_submit_urb(entry, GFP_KERNEL);
 439                 if (ret) {
 440                         skb_unlink(skb, &priv->rx_queue);
 441                         usb_unanchor_urb(entry);
 442                         goto err;
 443                 }
 444                 usb_free_urb(entry);
 445         }
 446         return ret;
 447
 448 err:
 449         usb_free_urb(entry);
 450         kfree_skb(skb);
 451         usb_kill_anchored_urbs(&priv->anchored);
 452         return ret;
 453 }
 454
 455 static void rtl8187b_status_cb(struct urb *urb)
 456 {
 457         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 458         struct rtl8187_priv *priv = hw->priv;
 459         u64 val;
 460         unsigned int cmd_type;
 461
 462         if (unlikely(urb->status))
 463                 return;
 464
 465         /*
 466          * Read from status buffer:
 467          *
 468          * bits [30:31] = cmd type:
 469          * - 0 indicates tx beacon interrupt
 470          * - 1 indicates tx close descriptor
 471          *
 472          * In the case of tx beacon interrupt:
 473          * [0:9] = Last Beacon CW
 474          * [10:29] = reserved
 475          * [30:31] = 00b
 476          * [32:63] = Last Beacon TSF
 477          *
 478          * If it's tx close descriptor:
 479          * [0:7] = Packet Retry Count
 480          * [8:14] = RTS Retry Count
 481          * [15] = TOK
 482          * [16:27] = Sequence No
 483          * [28] = LS
 484          * [29] = FS
 485          * [30:31] = 01b
 486          * [32:47] = unused (reserved?)
 487          * [48:63] = MAC Used Time
 488          */
 489         val = le64_to_cpu(priv->b_tx_status.buf);
 490
 491         cmd_type = (val >> 30) & 0x3;
 492         if (cmd_type == 1) {
 493                 unsigned int pkt_rc, seq_no;
 494                 bool tok;
 495                 struct sk_buff *skb;
 496                 struct ieee80211_hdr *ieee80211hdr;
 497                 unsigned long flags;
 498
 499                 pkt_rc = val & 0xFF;
 500                 tok = val & (1 << 15);
 501                 seq_no = (val >> 16) & 0xFFF;
 502
 503                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 504                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 505                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 506
 507                         /*
 508                          * While testing, it was discovered that the seq_no
 509                          * doesn't actually contains the sequence number.
 510                          * Instead of returning just the 12 bits of sequence
 511                          * number, hardware is returning entire sequence control
 512                          * (fragment number plus sequence number) in a 12 bit
 513                          * only field overflowing after some time. As a
 514                          * workaround, just consider the lower bits, and expect
 515                          * it's unlikely we wrongly ack some sent data
 516                          */
 517                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 518                             & 0xFFF) == seq_no)
 519                                 break;
 520                 }
 521                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 522                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 523
 524                         __skb_unlink(skb, &priv->b_tx_status.queue);
 525                         if (tok)
 526                                 info->flags |= IEEE80211_TX_STAT_ACK;
 527                         info->status.rates[0].count = pkt_rc + 1;
 528
 529                         ieee80211_tx_status_irqsafe(hw, skb);
 530                 }
 531                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 532         }
 533
 534         usb_anchor_urb(urb, &priv->anchored);
 535         if (usb_submit_urb(urb, GFP_ATOMIC))
 536                 usb_unanchor_urb(urb);
 537 }
 538
 539 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 540 {
 541         struct rtl8187_priv *priv = dev->priv;
 542         struct urb *entry;
 543         int ret = 0;
 544
 545         entry = usb_alloc_urb(0, GFP_KERNEL);
 546         if (!entry)
 547                 return -ENOMEM;
 548
 549         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 550                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 551                           rtl8187b_status_cb, dev);
 552
 553         usb_anchor_urb(entry, &priv->anchored);
 554         ret = usb_submit_urb(entry, GFP_KERNEL);
 555         if (ret)
 556                 usb_unanchor_urb(entry);
 557         usb_free_urb(entry);
 558
 559         return ret;
 560 }
 561
 562 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
 563 {
 564         u32 anaparam, anaparam2;
 565         u8 anaparam3, reg;
 566
 567         if (!priv->is_rtl8187b) {
 568                 if (rfon) {
 569                         anaparam = RTL8187_RTL8225_ANAPARAM_ON;
 570                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
 571                 } else {
 572                         anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
 573                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
 574                 }
 575         } else {
 576                 if (rfon) {
 577                         anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
 578                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
 579                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
 580                 } else {
 581                         anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
 582                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
 583                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
 584                 }
 585         }
 586
 587         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 588                          RTL818X_EEPROM_CMD_CONFIG);
 589         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 590         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 591         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 592         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 593         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
 594         if (priv->is_rtl8187b)
 595                 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, anaparam3);
 596         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 597         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 598         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 599                          RTL818X_EEPROM_CMD_NORMAL);
 600 }
 601
 602 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 603 {
 604         struct rtl8187_priv *priv = dev->priv;
 605         u8 reg;
 606         int i;
 607
 608         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 609         reg &= (1 << 1);
 610         reg |= RTL818X_CMD_RESET;
 611         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 612
 613         i = 10;
 614         do {
 615                 msleep(2);
 616                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 617                       RTL818X_CMD_RESET))
 618                         break;
 619         } while (--i);
 620
 621         if (!i) {
 622                 wiphy_err(dev->wiphy, "Reset timeout!\n");
 623                 return -ETIMEDOUT;
 624         }
 625
 626         /* reload registers from eeprom */
 627         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 628
 629         i = 10;
 630         do {
 631                 msleep(4);
 632                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 633                       RTL818X_EEPROM_CMD_CONFIG))
 634                         break;
 635         } while (--i);
 636
 637         if (!i) {
 638                 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
 639                 return -ETIMEDOUT;
 640         }
 641
 642         return 0;
 643 }
 644
 645 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 646 {
 647         struct rtl8187_priv *priv = dev->priv;
 648         u8 reg;
 649         int res;
 650
 651         /* reset */
 652         rtl8187_set_anaparam(priv, true);
 653
 654         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 655
 656         msleep(200);
 657         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 658         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 659         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 660         msleep(200);
 661
 662         res = rtl8187_cmd_reset(dev);
 663         if (res)
 664                 return res;
 665
 666         rtl8187_set_anaparam(priv, true);
 667
 668         /* setup card */
 669         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 670         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 671
 672         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 673         rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 674         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 675
 676         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 677
 678         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 679         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 680         reg &= 0x3F;
 681         reg |= 0x80;
 682         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 683
 684         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 685
 686         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 687         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 688         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 689
 690         // TODO: set RESP_RATE and BRSR properly
 691         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 692         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 693
 694         /* host_usb_init */
 695         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 696         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 697         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 698         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 699         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 700         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 701         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 702         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 703         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 704         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 705         msleep(100);
 706
 707         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 708         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 709         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 710         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 711                          RTL818X_EEPROM_CMD_CONFIG);
 712         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 713         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 714                          RTL818X_EEPROM_CMD_NORMAL);
 715         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 716         msleep(100);
 717
 718         priv->rf->init(dev);
 719
 720         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 721         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 722         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 723         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 724         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 725         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 726         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 727
 728         return 0;
 729 }
 730
 731 static const u8 rtl8187b_reg_table[][3] = {
 732         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 733         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 734         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 735         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 736
 737         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 738         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 739         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
 740         {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
 741         {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 742
 743         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 744         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 745         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 746         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 747         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 748         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 749         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
 750
 751         {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
 752         {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
 753         {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
 754         {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
 755         {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 756
 757         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 758         {0x8F, 0x00, 0}
 759 };
 760
 761 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 762 {
 763         struct rtl8187_priv *priv = dev->priv;
 764         int res, i;
 765         u8 reg;
 766
 767         rtl8187_set_anaparam(priv, true);
 768
 769         /* Reset PLL sequence on 8187B. Realtek note: reduces power
 770          * consumption about 30 mA */
 771         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 772         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 773         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 774         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 775
 776         res = rtl8187_cmd_reset(dev);
 777         if (res)
 778                 return res;
 779
 780         rtl8187_set_anaparam(priv, true);
 781
 782         /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
 783          * RESP_RATE on 8187L in Realtek sources: each bit should be each
 784          * one of the 12 rates, all are enabled */
 785         rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
 786
 787         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 788         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 789         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 790
 791         /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
 792         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 793         rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
 794
 795         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 796
 797         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 798                          RTL818X_EEPROM_CMD_CONFIG);
 799         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 800         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 801         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 802                          RTL818X_EEPROM_CMD_NORMAL);
 803
 804         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 805         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 806                 rtl818x_iowrite8_idx(priv,
 807                                      (u8 *)(uintptr_t)
 808                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 809                                      rtl8187b_reg_table[i][1],
 810                                      rtl8187b_reg_table[i][2]);
 811         }
 812
 813         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 814         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 815
 816         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 817         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 818         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 819
 820         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 821
 822         /* RFSW_CTRL register */
 823         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 824
 825         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 826         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 827         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 828         msleep(100);
 829
 830         priv->rf->init(dev);
 831
 832         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 833         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 834         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 835
 836         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 837         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 838         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 839         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 840         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 841         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 842         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 843
 844         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 845         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 846         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 847         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 848         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 849         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 850         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 851         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 852         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 853         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 854         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 855         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 856         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 857
 858         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 859
 860         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 861
 862         priv->slot_time = 0x9;
 863         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 864         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 865         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 866         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 867         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 868
 869         /* ENEDCA flag must always be set, transmit issues? */
 870         rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 871
 872         return 0;
 873 }
 874
 875 static void rtl8187_work(struct work_struct *work)
 876 {
 877         /* The RTL8187 returns the retry count through register 0xFFFA. In
 878          * addition, it appears to be a cumulative retry count, not the
 879          * value for the current TX packet. When multiple TX entries are
 880          * waiting in the queue, the retry count will be the total for all.
 881          * The "error" may matter for purposes of rate setting, but there is
 882          * no other choice with this hardware.
 883          */
 884         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 885                                     work.work);
 886         struct ieee80211_tx_info *info;
 887         struct ieee80211_hw *dev = priv->dev;
 888         static u16 retry;
 889         u16 tmp;
 890         u16 avg_retry;
 891         int length;
 892
 893         mutex_lock(&priv->conf_mutex);
 894         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 895         length = skb_queue_len(&priv->b_tx_status.queue);
 896         if (unlikely(!length))
 897                 length = 1;
 898         if (unlikely(tmp < retry))
 899                 tmp = retry;
 900         avg_retry = (tmp - retry) / length;
 901         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 902                 struct sk_buff *old_skb;
 903
 904                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 905                 info = IEEE80211_SKB_CB(old_skb);
 906                 info->status.rates[0].count = avg_retry + 1;
 907                 if (info->status.rates[0].count > RETRY_COUNT)
 908                         info->flags &= ~IEEE80211_TX_STAT_ACK;
 909                 ieee80211_tx_status_irqsafe(dev, old_skb);
 910         }
 911         retry = tmp;
 912         mutex_unlock(&priv->conf_mutex);
 913 }
 914
 915 static int rtl8187_start(struct ieee80211_hw *dev)
 916 {
 917         struct rtl8187_priv *priv = dev->priv;
 918         u32 reg;
 919         int ret;
 920
 921         mutex_lock(&priv->conf_mutex);
 922
 923         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 924                                      rtl8187b_init_hw(dev);
 925         if (ret)
 926                 goto rtl8187_start_exit;
 927
 928         init_usb_anchor(&priv->anchored);
 929         priv->dev = dev;
 930
 931         if (priv->is_rtl8187b) {
 932                 reg = RTL818X_RX_CONF_MGMT |
 933                       RTL818X_RX_CONF_DATA |
 934                       RTL818X_RX_CONF_BROADCAST |
 935                       RTL818X_RX_CONF_NICMAC |
 936                       RTL818X_RX_CONF_BSSID |
 937                       (7 << 13 /* RX FIFO threshold NONE */) |
 938                       (7 << 10 /* MAX RX DMA */) |
 939                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 940                       RTL818X_RX_CONF_ONLYERLPKT |
 941                       RTL818X_RX_CONF_MULTICAST;
 942                 priv->rx_conf = reg;
 943                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 944
 945                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 946                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 947                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 948                 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 949                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 950
 951                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 952                                   RTL818X_TX_CONF_HW_SEQNUM |
 953                                   RTL818X_TX_CONF_DISREQQSIZE |
 954                                   (RETRY_COUNT << 8  /* short retry limit */) |
 955                                   (RETRY_COUNT << 0  /* long retry limit */) |
 956                                   (7 << 21 /* MAX TX DMA */));
 957                 rtl8187_init_urbs(dev);
 958                 rtl8187b_init_status_urb(dev);
 959                 goto rtl8187_start_exit;
 960         }
 961
 962         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 963
 964         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 965         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 966
 967         rtl8187_init_urbs(dev);
 968
 969         reg = RTL818X_RX_CONF_ONLYERLPKT |
 970               RTL818X_RX_CONF_RX_AUTORESETPHY |
 971               RTL818X_RX_CONF_BSSID |
 972               RTL818X_RX_CONF_MGMT |
 973               RTL818X_RX_CONF_DATA |
 974               (7 << 13 /* RX FIFO threshold NONE */) |
 975               (7 << 10 /* MAX RX DMA */) |
 976               RTL818X_RX_CONF_BROADCAST |
 977               RTL818X_RX_CONF_NICMAC;
 978
 979         priv->rx_conf = reg;
 980         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 981
 982         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 983         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 984         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 985         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 986
 987         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 988         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 989         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 990         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 991         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 992
 993         reg  = RTL818X_TX_CONF_CW_MIN |
 994                (7 << 21 /* MAX TX DMA */) |
 995                RTL818X_TX_CONF_NO_ICV;
 996         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 997
 998         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 999         reg |= RTL818X_CMD_TX_ENABLE;
1000         reg |= RTL818X_CMD_RX_ENABLE;
1001         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1002         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1003
1004 rtl8187_start_exit:
1005         mutex_unlock(&priv->conf_mutex);
1006         return ret;
1007 }
1008
1009 static void rtl8187_stop(struct ieee80211_hw *dev)
1010 {
1011         struct rtl8187_priv *priv = dev->priv;
1012         struct sk_buff *skb;
1013         u32 reg;
1014
1015         mutex_lock(&priv->conf_mutex);
1016         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1017
1018         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1019         reg &= ~RTL818X_CMD_TX_ENABLE;
1020         reg &= ~RTL818X_CMD_RX_ENABLE;
1021         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1022
1023         priv->rf->stop(dev);
1024         rtl8187_set_anaparam(priv, false);
1025
1026         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1027         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1028         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1029         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1030
1031         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1032                 dev_kfree_skb_any(skb);
1033
1034         usb_kill_anchored_urbs(&priv->anchored);
1035         mutex_unlock(&priv->conf_mutex);
1036
1037         if (!priv->is_rtl8187b)
1038                 cancel_delayed_work_sync(&priv->work);
1039 }
1040
1041 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1042 {
1043         struct rtl8187_priv *priv = dev->priv;
1044
1045         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1046                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1047 }
1048
1049
1050 static void rtl8187_beacon_work(struct work_struct *work)
1051 {
1052         struct rtl8187_vif *vif_priv =
1053                 container_of(work, struct rtl8187_vif, beacon_work.work);
1054         struct ieee80211_vif *vif =
1055                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
1056         struct ieee80211_hw *dev = vif_priv->dev;
1057         struct ieee80211_mgmt *mgmt;
1058         struct sk_buff *skb;
1059
1060         /* don't overflow the tx ring */
1061         if (ieee80211_queue_stopped(dev, 0))
1062                 goto resched;
1063
1064         /* grab a fresh beacon */
1065         skb = ieee80211_beacon_get(dev, vif);
1066         if (!skb)
1067                 goto resched;
1068
1069         /*
1070          * update beacon timestamp w/ TSF value
1071          * TODO: make hardware update beacon timestamp
1072          */
1073         mgmt = (struct ieee80211_mgmt *)skb->data;
1074         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
1075
1076         /* TODO: use actual beacon queue */
1077         skb_set_queue_mapping(skb, 0);
1078
1079         rtl8187_tx(dev, skb);
1080
1081 resched:
1082         /*
1083          * schedule next beacon
1084          * TODO: use hardware support for beacon timing
1085          */
1086         schedule_delayed_work(&vif_priv->beacon_work,
1087                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
1088 }
1089
1090
1091 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1092                                  struct ieee80211_vif *vif)
1093 {
1094         struct rtl8187_priv *priv = dev->priv;
1095         struct rtl8187_vif *vif_priv;
1096         int i;
1097         int ret = -EOPNOTSUPP;
1098
1099         mutex_lock(&priv->conf_mutex);
1100         if (priv->vif)
1101                 goto exit;
1102
1103         switch (vif->type) {
1104         case NL80211_IFTYPE_STATION:
1105         case NL80211_IFTYPE_ADHOC:
1106                 break;
1107         default:
1108                 goto exit;
1109         }
1110
1111         ret = 0;
1112         priv->vif = vif;
1113
1114         /* Initialize driver private area */
1115         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1116         vif_priv->dev = dev;
1117         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
1118         vif_priv->enable_beacon = false;
1119
1120
1121         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1122         for (i = 0; i < ETH_ALEN; i++)
1123                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1124                                  ((u8 *)vif->addr)[i]);
1125         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1126
1127 exit:
1128         mutex_unlock(&priv->conf_mutex);
1129         return ret;
1130 }
1131
1132 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1133                                      struct ieee80211_vif *vif)
1134 {
1135         struct rtl8187_priv *priv = dev->priv;
1136         mutex_lock(&priv->conf_mutex);
1137         priv->vif = NULL;
1138         mutex_unlock(&priv->conf_mutex);
1139 }
1140
1141 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1142 {
1143         struct rtl8187_priv *priv = dev->priv;
1144         struct ieee80211_conf *conf = &dev->conf;
1145         u32 reg;
1146
1147         mutex_lock(&priv->conf_mutex);
1148         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1149         /* Enable TX loopback on MAC level to avoid TX during channel
1150          * changes, as this has be seen to causes problems and the
1151          * card will stop work until next reset
1152          */
1153         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1154                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1155         priv->rf->set_chan(dev, conf);
1156         msleep(10);
1157         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1158
1159         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1160         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1161         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1162         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1163         mutex_unlock(&priv->conf_mutex);
1164         return 0;
1165 }
1166
1167 /*
1168  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1169  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1170  */
1171 static __le32 *rtl8187b_ac_addr[4] = {
1172         (__le32 *) 0xFFF0, /* AC_VO */
1173         (__le32 *) 0xFFF4, /* AC_VI */
1174         (__le32 *) 0xFFFC, /* AC_BK */
1175         (__le32 *) 0xFFF8, /* AC_BE */
1176 };
1177
1178 #define SIFS_TIME 0xa
1179
1180 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1181                              bool use_short_preamble)
1182 {
1183         if (priv->is_rtl8187b) {
1184                 u8 difs, eifs;
1185                 u16 ack_timeout;
1186                 int queue;
1187
1188                 if (use_short_slot) {
1189                         priv->slot_time = 0x9;
1190                         difs = 0x1c;
1191                         eifs = 0x53;
1192                 } else {
1193                         priv->slot_time = 0x14;
1194                         difs = 0x32;
1195                         eifs = 0x5b;
1196                 }
1197                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1198                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1199                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1200
1201                 /*
1202                  * BRSR+1 on 8187B is in fact EIFS register
1203                  * Value in units of 4 us
1204                  */
1205                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1206
1207                 /*
1208                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1209                  * register. In units of 4 us like eifs register
1210                  * ack_timeout = ack duration + plcp + difs + preamble
1211                  */
1212                 ack_timeout = 112 + 48 + difs;
1213                 if (use_short_preamble)
1214                         ack_timeout += 72;
1215                 else
1216                         ack_timeout += 144;
1217                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1218                                  DIV_ROUND_UP(ack_timeout, 4));
1219
1220                 for (queue = 0; queue < 4; queue++)
1221                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1222                                          priv->aifsn[queue] * priv->slot_time +
1223                                          SIFS_TIME);
1224         } else {
1225                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1226                 if (use_short_slot) {
1227                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1228                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1229                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1230                 } else {
1231                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1232                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1233                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1234                 }
1235         }
1236 }
1237
1238 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1239                                      struct ieee80211_vif *vif,
1240                                      struct ieee80211_bss_conf *info,
1241                                      u32 changed)
1242 {
1243         struct rtl8187_priv *priv = dev->priv;
1244         struct rtl8187_vif *vif_priv;
1245         int i;
1246         u8 reg;
1247
1248         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1249
1250         if (changed & BSS_CHANGED_BSSID) {
1251                 mutex_lock(&priv->conf_mutex);
1252                 for (i = 0; i < ETH_ALEN; i++)
1253                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1254                                          info->bssid[i]);
1255
1256                 if (priv->is_rtl8187b)
1257                         reg = RTL818X_MSR_ENEDCA;
1258                 else
1259                         reg = 0;
1260
1261                 if (is_valid_ether_addr(info->bssid)) {
1262                         if (vif->type == NL80211_IFTYPE_ADHOC)
1263                                 reg |= RTL818X_MSR_ADHOC;
1264                         else
1265                                 reg |= RTL818X_MSR_INFRA;
1266                 }
1267                 else
1268                         reg |= RTL818X_MSR_NO_LINK;
1269
1270                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1271
1272                 mutex_unlock(&priv->conf_mutex);
1273         }
1274
1275         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1276                 rtl8187_conf_erp(priv, info->use_short_slot,
1277                                  info->use_short_preamble);
1278
1279         if (changed & BSS_CHANGED_BEACON_ENABLED)
1280                 vif_priv->enable_beacon = info->enable_beacon;
1281
1282         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
1283                 cancel_delayed_work_sync(&vif_priv->beacon_work);
1284                 if (vif_priv->enable_beacon)
1285                         schedule_work(&vif_priv->beacon_work.work);
1286         }
1287
1288 }
1289
1290 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1291                                      struct netdev_hw_addr_list *mc_list)
1292 {
1293         return netdev_hw_addr_list_count(mc_list);
1294 }
1295
1296 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1297                                      unsigned int changed_flags,
1298                                      unsigned int *total_flags,
1299                                      u64 multicast)
1300 {
1301         struct rtl8187_priv *priv = dev->priv;
1302
1303         if (changed_flags & FIF_FCSFAIL)
1304                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1305         if (changed_flags & FIF_CONTROL)
1306                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1307         if (changed_flags & FIF_OTHER_BSS)
1308                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1309         if (*total_flags & FIF_ALLMULTI || multicast > 0)
1310                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1311         else
1312                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1313
1314         *total_flags = 0;
1315
1316         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1317                 *total_flags |= FIF_FCSFAIL;
1318         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1319                 *total_flags |= FIF_CONTROL;
1320         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1321                 *total_flags |= FIF_OTHER_BSS;
1322         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1323                 *total_flags |= FIF_ALLMULTI;
1324
1325         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1326 }
1327
1328 static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1329                            struct ieee80211_vif *vif, u16 queue,
1330                            const struct ieee80211_tx_queue_params *params)
1331 {
1332         struct rtl8187_priv *priv = dev->priv;
1333         u8 cw_min, cw_max;
1334
1335         if (queue > 3)
1336                 return -EINVAL;
1337
1338         cw_min = fls(params->cw_min);
1339         cw_max = fls(params->cw_max);
1340
1341         if (priv->is_rtl8187b) {
1342                 priv->aifsn[queue] = params->aifs;
1343
1344                 /*
1345                  * This is the structure of AC_*_PARAM registers in 8187B:
1346                  * - TXOP limit field, bit offset = 16
1347                  * - ECWmax, bit offset = 12
1348                  * - ECWmin, bit offset = 8
1349                  * - AIFS, bit offset = 0
1350                  */
1351                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1352                                   (params->txop << 16) | (cw_max << 12) |
1353                                   (cw_min << 8) | (params->aifs *
1354                                   priv->slot_time + SIFS_TIME));
1355         } else {
1356                 if (queue != 0)
1357                         return -EINVAL;
1358
1359                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1360                                  cw_min | (cw_max << 4));
1361         }
1362         return 0;
1363 }
1364
1365
1366 static const struct ieee80211_ops rtl8187_ops = {
1367         .tx                     = rtl8187_tx,
1368         .start                  = rtl8187_start,
1369         .stop                   = rtl8187_stop,
1370         .add_interface          = rtl8187_add_interface,
1371         .remove_interface       = rtl8187_remove_interface,
1372         .config                 = rtl8187_config,
1373         .bss_info_changed       = rtl8187_bss_info_changed,
1374         .prepare_multicast      = rtl8187_prepare_multicast,
1375         .configure_filter       = rtl8187_configure_filter,
1376         .conf_tx                = rtl8187_conf_tx,
1377         .rfkill_poll            = rtl8187_rfkill_poll,
1378         .get_tsf                = rtl8187_get_tsf,
1379 };
1380
1381 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1382 {
1383         struct ieee80211_hw *dev = eeprom->data;
1384         struct rtl8187_priv *priv = dev->priv;
1385         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1386
1387         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1388         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1389         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1390         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1391 }
1392
1393 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1394 {
1395         struct ieee80211_hw *dev = eeprom->data;
1396         struct rtl8187_priv *priv = dev->priv;
1397         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1398
1399         if (eeprom->reg_data_in)
1400                 reg |= RTL818X_EEPROM_CMD_WRITE;
1401         if (eeprom->reg_data_out)
1402                 reg |= RTL818X_EEPROM_CMD_READ;
1403         if (eeprom->reg_data_clock)
1404                 reg |= RTL818X_EEPROM_CMD_CK;
1405         if (eeprom->reg_chip_select)
1406                 reg |= RTL818X_EEPROM_CMD_CS;
1407
1408         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1409         udelay(10);
1410 }
1411
1412 static int __devinit rtl8187_probe(struct usb_interface *intf,
1413                                    const struct usb_device_id *id)
1414 {
1415         struct usb_device *udev = interface_to_usbdev(intf);
1416         struct ieee80211_hw *dev;
1417         struct rtl8187_priv *priv;
1418         struct eeprom_93cx6 eeprom;
1419         struct ieee80211_channel *channel;
1420         const char *chip_name;
1421         u16 txpwr, reg;
1422         u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1423         int err, i;
1424         u8 mac_addr[ETH_ALEN];
1425
1426         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1427         if (!dev) {
1428                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1429                 return -ENOMEM;
1430         }
1431
1432         priv = dev->priv;
1433         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1434
1435         /* allocate "DMA aware" buffer for register accesses */
1436         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1437         if (!priv->io_dmabuf) {
1438                 err = -ENOMEM;
1439                 goto err_free_dev;
1440         }
1441         mutex_init(&priv->io_mutex);
1442
1443         SET_IEEE80211_DEV(dev, &intf->dev);
1444         usb_set_intfdata(intf, dev);
1445         priv->udev = udev;
1446
1447         usb_get_dev(udev);
1448
1449         skb_queue_head_init(&priv->rx_queue);
1450
1451         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1452         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1453
1454         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1455         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1456         priv->map = (struct rtl818x_csr *)0xFF00;
1457
1458         priv->band.band = IEEE80211_BAND_2GHZ;
1459         priv->band.channels = priv->channels;
1460         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1461         priv->band.bitrates = priv->rates;
1462         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1463         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1464
1465
1466         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1467                      IEEE80211_HW_SIGNAL_DBM |
1468                      IEEE80211_HW_RX_INCLUDES_FCS;
1469         /* Initialize rate-control variables */
1470         dev->max_rates = 1;
1471         dev->max_rate_tries = RETRY_COUNT;
1472
1473         eeprom.data = dev;
1474         eeprom.register_read = rtl8187_eeprom_register_read;
1475         eeprom.register_write = rtl8187_eeprom_register_write;
1476         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1477                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1478         else
1479                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1480
1481         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1482         udelay(10);
1483
1484         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1485                                (__le16 __force *)mac_addr, 3);
1486         if (!is_valid_ether_addr(mac_addr)) {
1487                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1488                        "generated MAC address\n");
1489                 eth_random_addr(mac_addr);
1490         }
1491         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1492
1493         channel = priv->channels;
1494         for (i = 0; i < 3; i++) {
1495                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1496                                   &txpwr);
1497                 (*channel++).hw_value = txpwr & 0xFF;
1498                 (*channel++).hw_value = txpwr >> 8;
1499         }
1500         for (i = 0; i < 2; i++) {
1501                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1502                                   &txpwr);
1503                 (*channel++).hw_value = txpwr & 0xFF;
1504                 (*channel++).hw_value = txpwr >> 8;
1505         }
1506
1507         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1508                           &priv->txpwr_base);
1509
1510         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1511         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1512         /* 0 means asic B-cut, we should use SW 3 wire
1513          * bit-by-bit banging for radio. 1 means we can use
1514          * USB specific request to write radio registers */
1515         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1516         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1517         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1518
1519         if (!priv->is_rtl8187b) {
1520                 u32 reg32;
1521                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1522                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1523                 switch (reg32) {
1524                 case RTL818X_TX_CONF_R8187vD_B:
1525                         /* Some RTL8187B devices have a USB ID of 0x8187
1526                          * detect them here */
1527                         chip_name = "RTL8187BvB(early)";
1528                         priv->is_rtl8187b = 1;
1529                         priv->hw_rev = RTL8187BvB;
1530                         break;
1531                 case RTL818X_TX_CONF_R8187vD:
1532                         chip_name = "RTL8187vD";
1533                         break;
1534                 default:
1535                         chip_name = "RTL8187vB (default)";
1536                 }
1537        } else {
1538                 /*
1539                  * Force USB request to write radio registers for 8187B, Realtek
1540                  * only uses it in their sources
1541                  */
1542                 /*if (priv->asic_rev == 0) {
1543                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1544                                "requests to write to radio registers\n");
1545                         priv->asic_rev = 1;
1546                 }*/
1547                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1548                 case RTL818X_R8187B_B:
1549                         chip_name = "RTL8187BvB";
1550                         priv->hw_rev = RTL8187BvB;
1551                         break;
1552                 case RTL818X_R8187B_D:
1553                         chip_name = "RTL8187BvD";
1554                         priv->hw_rev = RTL8187BvD;
1555                         break;
1556                 case RTL818X_R8187B_E:
1557                         chip_name = "RTL8187BvE";
1558                         priv->hw_rev = RTL8187BvE;
1559                         break;
1560                 default:
1561                         chip_name = "RTL8187BvB (default)";
1562                         priv->hw_rev = RTL8187BvB;
1563                 }
1564         }
1565
1566         if (!priv->is_rtl8187b) {
1567                 for (i = 0; i < 2; i++) {
1568                         eeprom_93cx6_read(&eeprom,
1569                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1570                                           &txpwr);
1571                         (*channel++).hw_value = txpwr & 0xFF;
1572                         (*channel++).hw_value = txpwr >> 8;
1573                 }
1574         } else {
1575                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1576                                   &txpwr);
1577                 (*channel++).hw_value = txpwr & 0xFF;
1578
1579                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1580                 (*channel++).hw_value = txpwr & 0xFF;
1581
1582                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1583                 (*channel++).hw_value = txpwr & 0xFF;
1584                 (*channel++).hw_value = txpwr >> 8;
1585         }
1586         /* Handle the differing rfkill GPIO bit in different models */
1587         priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1588         if (product_id == 0x8197 || product_id == 0x8198) {
1589                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1590                 if (reg & 0xFF00)
1591                         priv->rfkill_mask = RFKILL_MASK_8198;
1592         }
1593         dev->vif_data_size = sizeof(struct rtl8187_vif);
1594         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1595                                       BIT(NL80211_IFTYPE_ADHOC) ;
1596
1597         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1598                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1599                        " info!\n");
1600
1601         priv->rf = rtl8187_detect_rf(dev);
1602         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1603                                   sizeof(struct rtl8187_tx_hdr) :
1604                                   sizeof(struct rtl8187b_tx_hdr);
1605         if (!priv->is_rtl8187b)
1606                 dev->queues = 1;
1607         else
1608                 dev->queues = 4;
1609
1610         err = ieee80211_register_hw(dev);
1611         if (err) {
1612                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1613                 goto err_free_dmabuf;
1614         }
1615         mutex_init(&priv->conf_mutex);
1616         skb_queue_head_init(&priv->b_tx_status.queue);
1617
1618         wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1619                    mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1620                    priv->rfkill_mask);
1621
1622 #ifdef CONFIG_RTL8187_LEDS
1623         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1624         reg &= 0xFF;
1625         rtl8187_leds_init(dev, reg);
1626 #endif
1627         rtl8187_rfkill_init(dev);
1628
1629         return 0;
1630
1631  err_free_dmabuf:
1632         kfree(priv->io_dmabuf);
1633  err_free_dev:
1634         ieee80211_free_hw(dev);
1635         usb_set_intfdata(intf, NULL);
1636         usb_put_dev(udev);
1637         return err;
1638 }
1639
1640 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1641 {
1642         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1643         struct rtl8187_priv *priv;
1644
1645         if (!dev)
1646                 return;
1647
1648 #ifdef CONFIG_RTL8187_LEDS
1649         rtl8187_leds_exit(dev);
1650 #endif
1651         rtl8187_rfkill_exit(dev);
1652         ieee80211_unregister_hw(dev);
1653
1654         priv = dev->priv;
1655         usb_reset_device(priv->udev);
1656         usb_put_dev(interface_to_usbdev(intf));
1657         kfree(priv->io_dmabuf);
1658         ieee80211_free_hw(dev);
1659 }
1660
1661 static struct usb_driver rtl8187_driver = {
1662         .name           = KBUILD_MODNAME,
1663         .id_table       = rtl8187_table,
1664         .probe          = rtl8187_probe,
1665         .disconnect     = __devexit_p(rtl8187_disconnect),
1666         .disable_hub_initiated_lpm = 1,
1667 };
1668
1669 module_usb_driver(rtl8187_driver);