drivers/net/wireless/rtl8188eu/include/rtl8723a_hal.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *\r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 #ifndef __RTL8723A_HAL_H__\r
  21 #define __RTL8723A_HAL_H__\r
  22 \r
  23 \r
  24 //#include "hal_com.h"\r
  25 #if 1\r
  26 #include "hal_data.h"\r
  27 #else\r
  28 #include "../hal/OUTSRC/odm_precomp.h"\r
  29 #endif\r
  30 \r
  31 #include "rtl8723a_spec.h"\r
  32 #include "rtl8723a_pg.h"\r
  33 #include "Hal8723APhyReg.h"\r
  34 #include "Hal8723APhyCfg.h"\r
  35 #include "rtl8723a_rf.h"\r
  36 #include "rtl8723a_dm.h"\r
  37 #include "rtl8723a_recv.h"\r
  38 #include "rtl8723a_xmit.h"\r
  39 #include "rtl8723a_cmd.h"\r
  40 #include "rtl8723a_led.h"\r
  41 #include "Hal8723PwrSeq.h"\r
  42 #ifdef DBG_CONFIG_ERROR_DETECT\r
  43 #include "rtl8723a_sreset.h"\r
  44 #endif\r
  45 \r
  46 \r
  47 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)\r
  48 \r
  49         //2TODO: We should define 8192S firmware related macro settings here!!\r
  50         #define RTL819X_DEFAULT_RF_TYPE                 RF_1T2R\r
  51         #define RTL819X_TOTAL_RF_PATH                           2\r
  52 \r
  53 //---------------------------------------------------------------------\r
  54 //              RTL8723S From file\r
  55 //---------------------------------------------------------------------\r
  56         #define RTL8723_FW_UMC_IMG                              "rtl8723S\\rtl8723fw.bin"\r
  57         #define RTL8723_FW_UMC_B_IMG                    "rtl8723S\\rtl8723fw_B.bin"\r
  58         #define RTL8723_PHY_REG                                 "rtl8723S\\PHY_REG_1T.txt"\r
  59         #define RTL8723_PHY_RADIO_A                             "rtl8723S\\radio_a_1T.txt"\r
  60         #define RTL8723_PHY_RADIO_B                             "rtl8723S\\radio_b_1T.txt"\r
  61         #define RTL8723_AGC_TAB                                 "rtl8723S\\AGC_TAB_1T.txt"\r
  62         #define RTL8723_PHY_MACREG                              "rtl8723S\\MAC_REG.txt"\r
  63         #define RTL8723_PHY_REG_PG                              "rtl8723S\\PHY_REG_PG.txt"\r
  64         #define RTL8723_PHY_REG_MP                              "rtl8723S\\PHY_REG_MP.txt"\r
  65 \r
  66 //---------------------------------------------------------------------\r
  67 //              RTL8723S From header\r
  68 //---------------------------------------------------------------------\r
  69 \r
  70         // Fw Array\r
  71         #define Rtl8723_FwImageArray                            Rtl8723SFwImgArray\r
  72         #define Rtl8723_FwUMCBCutImageArrayWithBT               Rtl8723SFwUMCBCutImgArrayWithBT\r
  73         #define Rtl8723_FwUMCBCutImageArrayWithoutBT    Rtl8723SFwUMCBCutImgArrayWithoutBT\r
  74 \r
  75         #define Rtl8723_ImgArrayLength                          Rtl8723SImgArrayLength\r
  76         #define Rtl8723_UMCBCutImgArrayWithBTLength             Rtl8723SUMCBCutImgArrayWithBTLength\r
  77         #define Rtl8723_UMCBCutImgArrayWithoutBTLength  Rtl8723SUMCBCutImgArrayWithoutBTLength\r
  78 \r
  79         #define Rtl8723_PHY_REG_Array_PG                        Rtl8723SPHY_REG_Array_PG\r
  80         #define Rtl8723_PHY_REG_Array_PGLength          Rtl8723SPHY_REG_Array_PGLength\r
  81 #if MP_DRIVER == 1\r
  82         #define Rtl8723E_FwBTImgArray                           Rtl8723EFwBTImgArray\r
  83         #define Rtl8723E_FwBTImgArrayLength                     Rtl8723EBTImgArrayLength\r
  84 \r
  85         #define Rtl8723_FwUMCBCutMPImageArray           Rtl8723SFwUMCBCutMPImgArray\r
  86         #define Rtl8723_UMCBCutMPImgArrayLength         Rtl8723SUMCBCutMPImgArrayLength\r
  87 \r
  88         #define Rtl8723_PHY_REG_Array_MP                        Rtl8723SPHY_REG_Array_MP\r
  89         #define Rtl8723_PHY_REG_Array_MPLength          Rtl8723SPHY_REG_Array_MPLength\r
  90 #endif\r
  91 \r
  92 #endif // CONFIG_SDIO_HCI\r
  93 \r
  94 #ifdef CONFIG_USB_HCI\r
  95 \r
  96         //2TODO: We should define 8192S firmware related macro settings here!!\r
  97         #define RTL819X_DEFAULT_RF_TYPE                 RF_1T2R\r
  98         #define RTL819X_TOTAL_RF_PATH                           2\r
  99 \r
 100         //TODO:  The following need to check!!\r
 101         #define RTL8723_FW_UMC_IMG                              "rtl8192CU\\rtl8723fw.bin"\r
 102         #define RTL8723_FW_UMC_B_IMG                    "rtl8192CU\\rtl8723fw_B.bin"\r
 103         #define RTL8723_PHY_REG                                 "rtl8723S\\PHY_REG_1T.txt"\r
 104         #define RTL8723_PHY_RADIO_A                             "rtl8723S\\radio_a_1T.txt"\r
 105         #define RTL8723_PHY_RADIO_B                             "rtl8723S\\radio_b_1T.txt"\r
 106         #define RTL8723_AGC_TAB                                 "rtl8723S\\AGC_TAB_1T.txt"\r
 107         #define RTL8723_PHY_MACREG                              "rtl8723S\\MAC_REG.txt"\r
 108         #define RTL8723_PHY_REG_PG                              "rtl8723S\\PHY_REG_PG.txt"\r
 109         #define RTL8723_PHY_REG_MP                              "rtl8723S\\PHY_REG_MP.txt"\r
 110 \r
 111 //---------------------------------------------------------------------\r
 112 //              RTL8723S From header\r
 113 //---------------------------------------------------------------------\r
 114 \r
 115         // Fw Array\r
 116         #define Rtl8723_FwImageArray                            Rtl8723UFwImgArray\r
 117         #define Rtl8723_FwUMCBCutImageArrayWithBT               Rtl8723UFwUMCBCutImgArrayWithBT\r
 118         #define Rtl8723_FwUMCBCutImageArrayWithoutBT    Rtl8723UFwUMCBCutImgArrayWithoutBT\r
 119 \r
 120         #define Rtl8723_ImgArrayLength                          Rtl8723UImgArrayLength\r
 121         #define Rtl8723_UMCBCutImgArrayWithBTLength             Rtl8723UUMCBCutImgArrayWithBTLength\r
 122         #define Rtl8723_UMCBCutImgArrayWithoutBTLength  Rtl8723UUMCBCutImgArrayWithoutBTLength\r
 123 \r
 124         #define Rtl8723_PHY_REG_Array_PG                        Rtl8723UPHY_REG_Array_PG\r
 125         #define Rtl8723_PHY_REG_Array_PGLength          Rtl8723UPHY_REG_Array_PGLength\r
 126 \r
 127 #if MP_DRIVER == 1\r
 128         #define Rtl8723E_FwBTImgArray                           Rtl8723EFwBTImgArray\r
 129         #define Rtl8723E_FwBTImgArrayLength                     Rtl8723EBTImgArrayLength\r
 130 \r
 131         #define Rtl8723_FwUMCBCutMPImageArray           Rtl8723SFwUMCBCutMPImgArray\r
 132         #define Rtl8723_UMCBCutMPImgArrayLength     Rtl8723SUMCBCutMPImgArrayLength\r
 133 \r
 134         #define Rtl8723_PHY_REG_Array_MP                        Rtl8723UPHY_REG_Array_MP\r
 135         #define Rtl8723_PHY_REG_Array_MPLength          Rtl8723UPHY_REG_Array_MPLength\r
 136 #endif\r
 137 #endif\r
 138 \r
 139 \r
 140 #define FW_8723A_SIZE                   0x8000\r
 141 #define FW_8723A_START_ADDRESS  0x1000\r
 142 #define FW_8723A_END_ADDRESS            0x1FFF //0x5FFF\r
 143 \r
 144 \r
 145 #define IS_FW_HEADER_EXIST_8723A(_pFwHdr)       ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\\r
 146                                                                         (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\\r
 147                                                                         (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)\r
 148 \r
 149 \r
 150 typedef struct _RT_FIRMWARE_8723A {\r
 151         FIRMWARE_SOURCE eFWSource;\r
 152 #ifdef CONFIG_EMBEDDED_FWIMG\r
 153         u8*                     szFwBuffer;\r
 154 #else\r
 155         u8                      szFwBuffer[FW_8723A_SIZE];\r
 156 #endif\r
 157         u32                     ulFwLength;\r
 158 \r
 159 #ifdef CONFIG_EMBEDDED_FWIMG\r
 160         u8*                     szBTFwBuffer;\r
 161 #else\r
 162         u8                      szBTFwBuffer[FW_8723A_SIZE];\r
 163 #endif\r
 164         u32                     ulBTFwLength;\r
 165 } RT_FIRMWARE_8723A, *PRT_FIRMWARE_8723A;\r
 166 \r
 167 //\r
 168 // This structure must be cared byte-ordering\r
 169 //\r
 170 // Added by tynli. 2009.12.04.\r
 171 typedef struct _RT_8723A_FIRMWARE_HDR\r
 172 {\r
 173         // 8-byte alinment required\r
 174 \r
 175         //--- LONG WORD 0 ----\r
 176         u16             Signature;      // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut\r
 177         u8              Category;       // AP/NIC and USB/PCI\r
 178         u8              Function;       // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions\r
 179         u16             Version;                // FW Version\r
 180         u8              Subversion;     // FW Subversion, default 0x00\r
 181         u16             Rsvd1;\r
 182 \r
 183 \r
 184         //--- LONG WORD 1 ----\r
 185         u8              Month;  // Release time Month field\r
 186         u8              Date;   // Release time Date field\r
 187         u8              Hour;   // Release time Hour field\r
 188         u8              Minute; // Release time Minute field\r
 189         u16             RamCodeSize;    // The size of RAM code\r
 190         u16             Rsvd2;\r
 191 \r
 192         //--- LONG WORD 2 ----\r
 193         u32             SvnIdx; // The SVN entry index\r
 194         u32             Rsvd3;\r
 195 \r
 196         //--- LONG WORD 3 ----\r
 197         u32             Rsvd4;\r
 198         u32             Rsvd5;\r
 199 }RT_8723A_FIRMWARE_HDR, *PRT_8723A_FIRMWARE_HDR;\r
 200 \r
 201 #define DRIVER_EARLY_INT_TIME_8723A             0x05\r
 202 #define BCN_DMA_ATIME_INT_TIME_8723A            0x02\r
 203 \r
 204 //For General Reserved Page Number(Beacon Queue is reserved page)\r
 205 //Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1\r
 206 #define BCNQ_PAGE_NUM_8723A             0x08\r
 207 \r
 208 #define TX_TOTAL_PAGE_NUMBER_8723A      (0xFF - BCNQ_PAGE_NUM_8723A)\r
 209 #define TX_PAGE_BOUNDARY_8723A          (TX_TOTAL_PAGE_NUMBER_8723A + 1)\r
 210 \r
 211 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A   TX_TOTAL_PAGE_NUMBER_8723A\r
 212 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8723A               (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A + 1)\r
 213 \r
 214 // For Normal Chip Setting\r
 215 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723A\r
 216 #define NORMAL_PAGE_NUM_HPQ_8723A               0x0C\r
 217 #define NORMAL_PAGE_NUM_LPQ_8723A               0x02\r
 218 #define NORMAL_PAGE_NUM_NPQ_8723A               0x02\r
 219 \r
 220 // Note: For Normal Chip Setting, modify later\r
 221 #define WMM_NORMAL_PAGE_NUM_HPQ_8723A           0x29\r
 222 #define WMM_NORMAL_PAGE_NUM_LPQ_8723A           0x1C\r
 223 #define WMM_NORMAL_PAGE_NUM_NPQ_8723A           0x1C\r
 224 \r
 225 \r
 226 //-------------------------------------------------------------------------\r
 227 //      Chip specific\r
 228 //-------------------------------------------------------------------------\r
 229 #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)\r
 230 #define CHIP_BONDING_92C_1T2R                   0x1\r
 231 #define CHIP_BONDING_88C_USB_MCARD              0x2\r
 232 #define CHIP_BONDING_88C_USB_HP                 0x1\r
 233 \r
 234 //-------------------------------------------------------------------------\r
 235 //      Channel Plan\r
 236 //-------------------------------------------------------------------------\r
 237 \r
 238 \r
 239 #define HAL_EFUSE_MEMORY\r
 240 \r
 241 #define EFUSE_REAL_CONTENT_LEN          512\r
 242 #define EFUSE_MAP_LEN                           128\r
 243 #define EFUSE_MAX_SECTION                       16\r
 244 #define EFUSE_IC_ID_OFFSET                      506     //For some inferiority IC purpose. added by Roger, 2009.09.02.\r
 245 #define AVAILABLE_EFUSE_ADDR(addr)      (addr < EFUSE_REAL_CONTENT_LEN)\r
 246 //\r
 247 // <Roger_Notes>\r
 248 // To prevent out of boundary programming case,\r
 249 // leave 1byte and program full section\r
 250 // 9bytes + 1byt + 5bytes and pre 1byte.\r
 251 // For worst case:\r
 252 // | 1byte|----8bytes----|1byte|--5bytes--|\r
 253 // |         |            Reserved(14bytes)           |\r
 254 //\r
 255 \r
 256 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.\r
 257 #define EFUSE_OOB_PROTECT_BYTES                 15\r
 258 \r
 259 #define EFUSE_REAL_CONTENT_LEN_8723A    512\r
 260 #define EFUSE_MAP_LEN_8723A                             256\r
 261 #define EFUSE_MAX_SECTION_8723A                 32\r
 262 \r
 263 //========================================================\r
 264 //                      EFUSE for BT definition\r
 265 //========================================================\r
 266 #define EFUSE_BT_REAL_BANK_CONTENT_LEN  512\r
 267 #define EFUSE_BT_REAL_CONTENT_LEN               1536    // 512*3\r
 268 #define EFUSE_BT_MAP_LEN                                1024    // 1k bytes\r
 269 #define EFUSE_BT_MAX_SECTION                    128             // 1024/8\r
 270 \r
 271 #define EFUSE_PROTECT_BYTES_BANK                16\r
 272 \r
 273 \r
 274 // Description: Determine the types of C2H events that are the same in driver and Fw.\r
 275 // Fisrt constructed by tynli. 2009.10.09.\r
 276 typedef enum _RTL8192C_C2H_EVT\r
 277 {\r
 278         C2H_DBG = 0,\r
 279         C2H_TSF = 1,\r
 280         C2H_AP_RPT_RSP = 2,\r
 281         C2H_CCX_TX_RPT = 3,     // The FW notify the report of the specific tx packet.\r
 282         C2H_BT_RSSI = 4,\r
 283         C2H_BT_OP_MODE = 5,\r
 284         C2H_EXT_RA_RPT = 6,\r
 285         C2H_HW_INFO_EXCH = 10,\r
 286         C2H_C2H_H2C_TEST = 11,\r
 287         C2H_BT_INFO = 12,\r
 288         C2H_BT_MP_INFO = 15,\r
 289         MAX_C2HEVENT\r
 290 } RTL8192C_C2H_EVT;\r
 291 \r
 292 \r
 293 #define INCLUDE_MULTI_FUNC_BT(_Adapter)         (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)\r
 294 #define INCLUDE_MULTI_FUNC_GPS(_Adapter)        (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)\r
 295 \r
 296 typedef struct rxreport_8723a\r
 297 {\r
 298         u32 pktlen:14;\r
 299         u32 crc32:1;\r
 300         u32 icverr:1;\r
 301         u32 drvinfosize:4;\r
 302         u32 security:3;\r
 303         u32 qos:1;\r
 304         u32 shift:2;\r
 305         u32 physt:1;\r
 306         u32 swdec:1;\r
 307         u32 ls:1;\r
 308         u32 fs:1;\r
 309         u32 eor:1;\r
 310         u32 own:1;\r
 311 \r
 312         u32 macid:5;\r
 313         u32 tid:4;\r
 314         u32 hwrsvd:4;\r
 315         u32 amsdu:1;\r
 316         u32 paggr:1;\r
 317         u32 faggr:1;\r
 318         u32 a1fit:4;\r
 319         u32 a2fit:4;\r
 320         u32 pam:1;\r
 321         u32 pwr:1;\r
 322         u32 md:1;\r
 323         u32 mf:1;\r
 324         u32 type:2;\r
 325         u32 mc:1;\r
 326         u32 bc:1;\r
 327 \r
 328         u32 seq:12;\r
 329         u32 frag:4;\r
 330         u32 nextpktlen:14;\r
 331         u32 nextind:1;\r
 332         u32 rsvd0831:1;\r
 333 \r
 334         u32 rxmcs:6;\r
 335         u32 rxht:1;\r
 336         u32 gf:1;\r
 337         u32 splcp:1;\r
 338         u32 bw:1;\r
 339         u32 htc:1;\r
 340         u32 eosp:1;\r
 341         u32 bssidfit:2;\r
 342         u32 rsvd1214:16;\r
 343         u32 unicastwake:1;\r
 344         u32 magicwake:1;\r
 345 \r
 346         u32 pattern0match:1;\r
 347         u32 pattern1match:1;\r
 348         u32 pattern2match:1;\r
 349         u32 pattern3match:1;\r
 350         u32 pattern4match:1;\r
 351         u32 pattern5match:1;\r
 352         u32 pattern6match:1;\r
 353         u32 pattern7match:1;\r
 354         u32 pattern8match:1;\r
 355         u32 pattern9match:1;\r
 356         u32 patternamatch:1;\r
 357         u32 patternbmatch:1;\r
 358         u32 patterncmatch:1;\r
 359         u32 rsvd1613:19;\r
 360 \r
 361         u32 tsfl;\r
 362 \r
 363         u32 bassn:12;\r
 364         u32 bavld:1;\r
 365         u32 rsvd2413:19;\r
 366 } RXREPORT, *PRXREPORT;\r
 367 \r
 368 typedef struct phystatus_8723a\r
 369 {\r
 370         u32 rxgain_a:7;\r
 371         u32 trsw_a:1;\r
 372         u32 rxgain_b:7;\r
 373         u32 trsw_b:1;\r
 374         u32 chcorr_l:16;\r
 375 \r
 376         u32 sigqualcck:8;\r
 377         u32 cfo_a:8;\r
 378         u32 cfo_b:8;\r
 379         u32 chcorr_h:8;\r
 380 \r
 381         u32 noisepwrdb_h:8;\r
 382         u32 cfo_tail_a:8;\r
 383         u32 cfo_tail_b:8;\r
 384         u32 rsvd0824:8;\r
 385 \r
 386         u32 rsvd1200:8;\r
 387         u32 rxevm_a:8;\r
 388         u32 rxevm_b:8;\r
 389         u32 rxsnr_a:8;\r
 390 \r
 391         u32 rxsnr_b:8;\r
 392         u32 noisepwrdb_l:8;\r
 393         u32 rsvd1616:8;\r
 394         u32 postsnr_a:8;\r
 395 \r
 396         u32 postsnr_b:8;\r
 397         u32 csi_a:8;\r
 398         u32 csi_b:8;\r
 399         u32 targetcsi_a:8;\r
 400 \r
 401         u32 targetcsi_b:8;\r
 402         u32 sigevm:8;\r
 403         u32 maxexpwr:8;\r
 404         u32 exintflag:1;\r
 405         u32 sgien:1;\r
 406         u32 rxsc:2;\r
 407         u32 idlelong:1;\r
 408         u32 anttrainen:1;\r
 409         u32 antselb:1;\r
 410         u32 antsel:1;\r
 411 } PHYSTATUS, *PPHYSTATUS;\r
 412 \r
 413 \r
 414 // rtl8723a_hal_init.c\r
 415 s32 rtl8723a_FirmwareDownload(PADAPTER padapter);\r
 416 void rtl8723a_FirmwareSelfReset(PADAPTER padapter);\r
 417 void rtl8723a_InitializeFirmwareVars(PADAPTER padapter);\r
 418 \r
 419 void rtl8723a_InitAntenna_Selection(PADAPTER padapter);\r
 420 void rtl8723a_DeinitAntenna_Selection(PADAPTER padapter);\r
 421 void rtl8723a_CheckAntenna_Selection(PADAPTER padapter);\r
 422 void rtl8723a_init_default_value(PADAPTER padapter);\r
 423 \r
 424 s32 InitLLTTable(PADAPTER padapter, u32 boundary);\r
 425 \r
 426 s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU);\r
 427 s32 CardDisableWithoutHWSM(PADAPTER padapter);\r
 428 \r
 429 // EFuse\r
 430 u8 GetEEPROMSize8723A(PADAPTER padapter);\r
 431 void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent);\r
 432 void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo);\r
 433 void Hal_EfuseParseTxPowerInfo_8723A(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail);\r
 434 void Hal_EfuseParseBTCoexistInfo_8723A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 435 void Hal_EfuseParseEEPROMVer(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 436 void rtl8723a_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 437 void Hal_EfuseParseCustomerID(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 438 void Hal_EfuseParseAntennaDiversity(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 439 void Hal_EfuseParseRateIndicationOption(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
 440 void Hal_EfuseParseXtal_8723A(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail);\r
 441 void Hal_EfuseParseThermalMeter_8723A(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail);\r
 442 \r
 443 //RT_CHANNEL_DOMAIN rtl8723a_HalMapChannelPlan(PADAPTER padapter, u8 HalChannelPlan);\r
 444 //VERSION_8192C rtl8723a_ReadChipVersion(PADAPTER padapter);\r
 445 //void rtl8723a_ReadBluetoothCoexistInfo(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoloadFail);\r
 446 void Hal_InitChannelPlan(PADAPTER padapter);\r
 447 \r
 448 void rtl8723a_set_hal_ops(struct hal_ops *pHalFunc);\r
 449 void SetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val);\r
 450 void GetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val);\r
 451 #ifdef CONFIG_BT_COEXIST\r
 452 void rtl8723a_SingleDualAntennaDetection(PADAPTER padapter);\r
 453 #endif\r
 454 int     FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware);\r
 455 \r
 456 // register\r
 457 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);\r
 458 void rtl8723a_InitBeaconParameters(PADAPTER padapter);\r
 459 void rtl8723a_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode);\r
 460 \r
 461 void rtl8723a_start_thread(_adapter *padapter);\r
 462 void rtl8723a_stop_thread(_adapter *padapter);\r
 463 \r
 464 s32 c2h_id_filter_ccx_8723a(u8 *buf);\r
 465 void _InitTransferPageSize(PADAPTER padapter);\r
 466 #endif// __RTL8723A_HAL_H__\r
 467 \r