drivers/net/wireless/rtl8188eu/hal/hal_com.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HAL_COM_C_
  21
  22 #include <drv_types.h>
  23
  24 #include "../hal/OUTSRC/odm_precomp.h"
  25
  26
  27 void dump_chip_info(HAL_VERSION ChipVersion)
  28 {
  29         int cnt = 0;
  30         u8 buf[128];
  31
  32         if(IS_81XXC(ChipVersion)){
  33                 cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
  34         }
  35         else if(IS_92D(ChipVersion)){
  36                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_");
  37         }
  38         else if(IS_8723_SERIES(ChipVersion)){
  39                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_");
  40         }
  41         else if(IS_8188E(ChipVersion)){
  42                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
  43         }
  44         else if(IS_8812_SERIES(ChipVersion)){
  45                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_");
  46         }
  47     else if(IS_8192E(ChipVersion)){
  48                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_");
  49         }
  50         else if(IS_8821_SERIES(ChipVersion)){
  51                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_");
  52         }
  53         else if(IS_8723B_SERIES(ChipVersion)){
  54                 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_");
  55         }
  56
  57         cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
  58         if(IS_CHIP_VENDOR_TSMC(ChipVersion))
  59                 cnt += sprintf((buf+cnt), "%s_","TSMC");
  60         else if(IS_CHIP_VENDOR_UMC(ChipVersion))
  61                 cnt += sprintf((buf+cnt), "%s_","UMC");
  62         else if(IS_CHIP_VENDOR_SMIC(ChipVersion))
  63                 cnt += sprintf((buf+cnt), "%s_","SMIC");
  64
  65         if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_");
  66         else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_");
  67         else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_");
  68         else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_");
  69         else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_");
  70         else if(IS_I_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "I_CUT_");
  71         else if(IS_J_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "J_CUT_");
  72         else if(IS_K_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "K_CUT_");
  73         else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
  74
  75         if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
  76         else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
  77         else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
  78         else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
  79
  80         cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
  81
  82         DBG_871X("%s", buf);
  83 }
  84
  85
  86 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK  0x80
  87
  88 /*
  89  * Description:
  90  *      Use hardware(efuse), driver parameter(registry) and default channel plan
  91  *      to decide which one should be used.
  92  *
  93  * Parameters:
  94  *      padapter                        pointer of adapter
  95  *      hw_channel_plan         channel plan from HW (efuse/eeprom)
  96  *                                              BIT[7] software configure mode; 0:Enable, 1:disable
  97  *                                              BIT[6:0] Channel Plan
  98  *      sw_channel_plan         channel plan from SW (registry/module param)
  99  *      def_channel_plan        channel plan used when HW/SW both invalid
 100  *      AutoLoadFail            efuse autoload fail or not
 101  *
 102  * Return:
 103  *      Final channel plan decision
 104  *
 105  */
 106 u8
 107 hal_com_config_channel_plan(
 108         IN      PADAPTER        padapter,
 109         IN      u8                      hw_channel_plan,
 110         IN      u8                      sw_channel_plan,
 111         IN      u8                      def_channel_plan,
 112         IN      BOOLEAN         AutoLoadFail
 113         )
 114 {
 115         PHAL_DATA_TYPE  pHalData;
 116         u8 hwConfig;
 117         u8 chnlPlan;
 118
 119
 120         pHalData = GET_HAL_DATA(padapter);
 121         pHalData->bDisableSWChannelPlan = _FALSE;
 122         chnlPlan = def_channel_plan;
 123
 124         if (0xFF == hw_channel_plan)
 125                 AutoLoadFail = _TRUE;
 126
 127         if (_FALSE == AutoLoadFail)
 128         {
 129                 u8 hw_chnlPlan;
 130
 131                 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
 132                 if (rtw_is_channel_plan_valid(hw_chnlPlan))
 133                 {
 134 #ifndef CONFIG_SW_CHANNEL_PLAN
 135                         if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
 136                                 pHalData->bDisableSWChannelPlan = _TRUE;
 137 #endif // !CONFIG_SW_CHANNEL_PLAN
 138
 139                         chnlPlan = hw_chnlPlan;
 140                 }
 141         }
 142
 143         if ((_FALSE == pHalData->bDisableSWChannelPlan)
 144                 && rtw_is_channel_plan_valid(sw_channel_plan))
 145         {
 146                 chnlPlan = sw_channel_plan;
 147         }
 148
 149         return chnlPlan;
 150 }
 151
 152 BOOLEAN
 153 HAL_IsLegalChannel(
 154         IN      PADAPTER        Adapter,
 155         IN      u32                     Channel
 156         )
 157 {
 158         BOOLEAN bLegalChannel = _TRUE;
 159
 160         if (Channel > 14) {
 161                 if(IsSupported5G(Adapter->registrypriv.wireless_mode) == _FALSE) {
 162                         bLegalChannel = _FALSE;
 163                         DBG_871X("Channel > 14 but wireless_mode do not support 5G\n");
 164                 }
 165         } else if ((Channel <= 14) && (Channel >=1)){
 166                 if(IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) {
 167                         bLegalChannel = _FALSE;
 168                         DBG_871X("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n");
 169                 }
 170         } else {
 171                 bLegalChannel = _FALSE;
 172                 DBG_871X("Channel is Invalid !!!\n");
 173         }
 174
 175         return bLegalChannel;
 176 }
 177
 178 u8      MRateToHwRate(u8 rate)
 179 {
 180         u8      ret = DESC_RATE1M;
 181
 182         switch(rate)
 183         {
 184                 case MGN_1M:                ret = DESC_RATE1M;  break;
 185                 case MGN_2M:                ret = DESC_RATE2M;  break;
 186                 case MGN_5_5M:              ret = DESC_RATE5_5M;        break;
 187                 case MGN_11M:               ret = DESC_RATE11M; break;
 188                 case MGN_6M:                ret = DESC_RATE6M;  break;
 189                 case MGN_9M:                ret = DESC_RATE9M;  break;
 190                 case MGN_12M:               ret = DESC_RATE12M; break;
 191                 case MGN_18M:               ret = DESC_RATE18M; break;
 192                 case MGN_24M:               ret = DESC_RATE24M; break;
 193                 case MGN_36M:               ret = DESC_RATE36M; break;
 194                 case MGN_48M:               ret = DESC_RATE48M; break;
 195                 case MGN_54M:               ret = DESC_RATE54M; break;
 196
 197                 case MGN_MCS0:              ret = DESC_RATEMCS0;        break;
 198                 case MGN_MCS1:              ret = DESC_RATEMCS1;        break;
 199                 case MGN_MCS2:              ret = DESC_RATEMCS2;        break;
 200                 case MGN_MCS3:              ret = DESC_RATEMCS3;        break;
 201                 case MGN_MCS4:              ret = DESC_RATEMCS4;        break;
 202                 case MGN_MCS5:              ret = DESC_RATEMCS5;        break;
 203                 case MGN_MCS6:              ret = DESC_RATEMCS6;        break;
 204                 case MGN_MCS7:              ret = DESC_RATEMCS7;        break;
 205                 case MGN_MCS8:              ret = DESC_RATEMCS8;        break;
 206                 case MGN_MCS9:              ret = DESC_RATEMCS9;        break;
 207                 case MGN_MCS10:         ret = DESC_RATEMCS10;   break;
 208                 case MGN_MCS11:         ret = DESC_RATEMCS11;   break;
 209                 case MGN_MCS12:         ret = DESC_RATEMCS12;   break;
 210                 case MGN_MCS13:         ret = DESC_RATEMCS13;   break;
 211                 case MGN_MCS14:         ret = DESC_RATEMCS14;   break;
 212                 case MGN_MCS15:         ret = DESC_RATEMCS15;   break;
 213                 case MGN_MCS16:             ret = DESC_RATEMCS16;       break;
 214                 case MGN_MCS17:             ret = DESC_RATEMCS17;       break;
 215                 case MGN_MCS18:             ret = DESC_RATEMCS18;       break;
 216                 case MGN_MCS19:             ret = DESC_RATEMCS19;       break;
 217                 case MGN_MCS20:         ret = DESC_RATEMCS20;   break;
 218                 case MGN_MCS21:         ret = DESC_RATEMCS21;   break;
 219                 case MGN_MCS22:         ret = DESC_RATEMCS22;   break;
 220                 case MGN_MCS23:         ret = DESC_RATEMCS23;   break;
 221                 case MGN_MCS24:         ret = DESC_RATEMCS24;   break;
 222                 case MGN_MCS25:         ret = DESC_RATEMCS25;   break;
 223                 case MGN_MCS26:             ret = DESC_RATEMCS26;       break;
 224                 case MGN_MCS27:             ret = DESC_RATEMCS27;       break;
 225                 case MGN_MCS28:             ret = DESC_RATEMCS28;       break;
 226                 case MGN_MCS29:             ret = DESC_RATEMCS29;       break;
 227                 case MGN_MCS30:         ret = DESC_RATEMCS30;   break;
 228                 case MGN_MCS31:         ret = DESC_RATEMCS31;   break;
 229
 230                 case MGN_VHT1SS_MCS0:   ret = DESC_RATEVHTSS1MCS0;      break;
 231                 case MGN_VHT1SS_MCS1:   ret = DESC_RATEVHTSS1MCS1;      break;
 232                 case MGN_VHT1SS_MCS2:   ret = DESC_RATEVHTSS1MCS2;      break;
 233                 case MGN_VHT1SS_MCS3:   ret = DESC_RATEVHTSS1MCS3;      break;
 234                 case MGN_VHT1SS_MCS4:   ret = DESC_RATEVHTSS1MCS4;      break;
 235                 case MGN_VHT1SS_MCS5:   ret = DESC_RATEVHTSS1MCS5;      break;
 236                 case MGN_VHT1SS_MCS6:   ret = DESC_RATEVHTSS1MCS6;      break;
 237                 case MGN_VHT1SS_MCS7:   ret = DESC_RATEVHTSS1MCS7;      break;
 238                 case MGN_VHT1SS_MCS8:   ret = DESC_RATEVHTSS1MCS8;      break;
 239                 case MGN_VHT1SS_MCS9:   ret = DESC_RATEVHTSS1MCS9;      break;
 240                 case MGN_VHT2SS_MCS0:   ret = DESC_RATEVHTSS2MCS0;      break;
 241                 case MGN_VHT2SS_MCS1:   ret = DESC_RATEVHTSS2MCS1;      break;
 242                 case MGN_VHT2SS_MCS2:   ret = DESC_RATEVHTSS2MCS2;      break;
 243                 case MGN_VHT2SS_MCS3:   ret = DESC_RATEVHTSS2MCS3;      break;
 244                 case MGN_VHT2SS_MCS4:   ret = DESC_RATEVHTSS2MCS4;      break;
 245                 case MGN_VHT2SS_MCS5:   ret = DESC_RATEVHTSS2MCS5;      break;
 246                 case MGN_VHT2SS_MCS6:   ret = DESC_RATEVHTSS2MCS6;      break;
 247                 case MGN_VHT2SS_MCS7:   ret = DESC_RATEVHTSS2MCS7;      break;
 248                 case MGN_VHT2SS_MCS8:   ret = DESC_RATEVHTSS2MCS8;      break;
 249                 case MGN_VHT2SS_MCS9:   ret = DESC_RATEVHTSS2MCS9;      break;
 250                 case MGN_VHT3SS_MCS0:   ret = DESC_RATEVHTSS3MCS0;      break;
 251                 case MGN_VHT3SS_MCS1:   ret = DESC_RATEVHTSS3MCS1;      break;
 252                 case MGN_VHT3SS_MCS2:   ret = DESC_RATEVHTSS3MCS2;      break;
 253                 case MGN_VHT3SS_MCS3:   ret = DESC_RATEVHTSS3MCS3;      break;
 254                 case MGN_VHT3SS_MCS4:   ret = DESC_RATEVHTSS3MCS4;      break;
 255                 case MGN_VHT3SS_MCS5:   ret = DESC_RATEVHTSS3MCS5;      break;
 256                 case MGN_VHT3SS_MCS6:   ret = DESC_RATEVHTSS3MCS6;      break;
 257                 case MGN_VHT3SS_MCS7:   ret = DESC_RATEVHTSS3MCS7;      break;
 258                 case MGN_VHT3SS_MCS8:   ret = DESC_RATEVHTSS3MCS8;      break;
 259                 case MGN_VHT3SS_MCS9:   ret = DESC_RATEVHTSS3MCS9;      break;
 260                 case MGN_VHT4SS_MCS0:   ret = DESC_RATEVHTSS4MCS0;      break;
 261                 case MGN_VHT4SS_MCS1:   ret = DESC_RATEVHTSS4MCS1;      break;
 262                 case MGN_VHT4SS_MCS2:   ret = DESC_RATEVHTSS4MCS2;      break;
 263                 case MGN_VHT4SS_MCS3:   ret = DESC_RATEVHTSS4MCS3;      break;
 264                 case MGN_VHT4SS_MCS4:   ret = DESC_RATEVHTSS4MCS4;      break;
 265                 case MGN_VHT4SS_MCS5:   ret = DESC_RATEVHTSS4MCS5;      break;
 266                 case MGN_VHT4SS_MCS6:   ret = DESC_RATEVHTSS4MCS6;      break;
 267                 case MGN_VHT4SS_MCS7:   ret = DESC_RATEVHTSS4MCS7;      break;
 268                 case MGN_VHT4SS_MCS8:   ret = DESC_RATEVHTSS4MCS8;      break;
 269                 case MGN_VHT4SS_MCS9:   ret = DESC_RATEVHTSS4MCS9;      break;
 270                 default:                break;
 271         }
 272
 273         return ret;
 274 }
 275
 276 u8      HwRateToMRate(u8 rate)
 277 {
 278         u8      ret_rate = MGN_1M;
 279
 280         switch(rate)
 281         {
 282
 283                 case DESC_RATE1M:                   ret_rate = MGN_1M;          break;
 284                 case DESC_RATE2M:                   ret_rate = MGN_2M;          break;
 285                 case DESC_RATE5_5M:             ret_rate = MGN_5_5M;    break;
 286                 case DESC_RATE11M:                  ret_rate = MGN_11M;         break;
 287                 case DESC_RATE6M:                   ret_rate = MGN_6M;          break;
 288                 case DESC_RATE9M:                   ret_rate = MGN_9M;          break;
 289                 case DESC_RATE12M:                  ret_rate = MGN_12M;         break;
 290                 case DESC_RATE18M:                  ret_rate = MGN_18M;         break;
 291                 case DESC_RATE24M:                  ret_rate = MGN_24M;         break;
 292                 case DESC_RATE36M:                  ret_rate = MGN_36M;         break;
 293                 case DESC_RATE48M:                  ret_rate = MGN_48M;         break;
 294                 case DESC_RATE54M:                  ret_rate = MGN_54M;         break;
 295                 case DESC_RATEMCS0:             ret_rate = MGN_MCS0;    break;
 296                 case DESC_RATEMCS1:             ret_rate = MGN_MCS1;    break;
 297                 case DESC_RATEMCS2:             ret_rate = MGN_MCS2;    break;
 298                 case DESC_RATEMCS3:             ret_rate = MGN_MCS3;    break;
 299                 case DESC_RATEMCS4:             ret_rate = MGN_MCS4;    break;
 300                 case DESC_RATEMCS5:             ret_rate = MGN_MCS5;    break;
 301                 case DESC_RATEMCS6:             ret_rate = MGN_MCS6;    break;
 302                 case DESC_RATEMCS7:             ret_rate = MGN_MCS7;    break;
 303                 case DESC_RATEMCS8:             ret_rate = MGN_MCS8;    break;
 304                 case DESC_RATEMCS9:             ret_rate = MGN_MCS9;    break;
 305                 case DESC_RATEMCS10:        ret_rate = MGN_MCS10;       break;
 306                 case DESC_RATEMCS11:        ret_rate = MGN_MCS11;       break;
 307                 case DESC_RATEMCS12:        ret_rate = MGN_MCS12;       break;
 308                 case DESC_RATEMCS13:        ret_rate = MGN_MCS13;       break;
 309                 case DESC_RATEMCS14:        ret_rate = MGN_MCS14;       break;
 310                 case DESC_RATEMCS15:        ret_rate = MGN_MCS15;       break;
 311                 case DESC_RATEMCS16:        ret_rate = MGN_MCS16;       break;
 312                 case DESC_RATEMCS17:        ret_rate = MGN_MCS17;       break;
 313                 case DESC_RATEMCS18:        ret_rate = MGN_MCS18;       break;
 314                 case DESC_RATEMCS19:        ret_rate = MGN_MCS19;       break;
 315                 case DESC_RATEMCS20:        ret_rate = MGN_MCS20;       break;
 316                 case DESC_RATEMCS21:        ret_rate = MGN_MCS21;       break;
 317                 case DESC_RATEMCS22:        ret_rate = MGN_MCS22;       break;
 318                 case DESC_RATEMCS23:        ret_rate = MGN_MCS23;       break;
 319                 case DESC_RATEMCS24:        ret_rate = MGN_MCS24;       break;
 320                 case DESC_RATEMCS25:        ret_rate = MGN_MCS25;       break;
 321                 case DESC_RATEMCS26:        ret_rate = MGN_MCS26;       break;
 322                 case DESC_RATEMCS27:        ret_rate = MGN_MCS27;       break;
 323                 case DESC_RATEMCS28:        ret_rate = MGN_MCS28;       break;
 324                 case DESC_RATEMCS29:        ret_rate = MGN_MCS29;       break;
 325                 case DESC_RATEMCS30:        ret_rate = MGN_MCS30;       break;
 326                 case DESC_RATEMCS31:        ret_rate = MGN_MCS31;       break;
 327                 case DESC_RATEVHTSS1MCS0:       ret_rate = MGN_VHT1SS_MCS0;             break;
 328                 case DESC_RATEVHTSS1MCS1:       ret_rate = MGN_VHT1SS_MCS1;             break;
 329                 case DESC_RATEVHTSS1MCS2:       ret_rate = MGN_VHT1SS_MCS2;             break;
 330                 case DESC_RATEVHTSS1MCS3:       ret_rate = MGN_VHT1SS_MCS3;             break;
 331                 case DESC_RATEVHTSS1MCS4:       ret_rate = MGN_VHT1SS_MCS4;             break;
 332                 case DESC_RATEVHTSS1MCS5:       ret_rate = MGN_VHT1SS_MCS5;             break;
 333                 case DESC_RATEVHTSS1MCS6:       ret_rate = MGN_VHT1SS_MCS6;             break;
 334                 case DESC_RATEVHTSS1MCS7:       ret_rate = MGN_VHT1SS_MCS7;             break;
 335                 case DESC_RATEVHTSS1MCS8:       ret_rate = MGN_VHT1SS_MCS8;             break;
 336                 case DESC_RATEVHTSS1MCS9:       ret_rate = MGN_VHT1SS_MCS9;             break;
 337                 case DESC_RATEVHTSS2MCS0:       ret_rate = MGN_VHT2SS_MCS0;             break;
 338                 case DESC_RATEVHTSS2MCS1:       ret_rate = MGN_VHT2SS_MCS1;             break;
 339                 case DESC_RATEVHTSS2MCS2:       ret_rate = MGN_VHT2SS_MCS2;             break;
 340                 case DESC_RATEVHTSS2MCS3:       ret_rate = MGN_VHT2SS_MCS3;             break;
 341                 case DESC_RATEVHTSS2MCS4:       ret_rate = MGN_VHT2SS_MCS4;             break;
 342                 case DESC_RATEVHTSS2MCS5:       ret_rate = MGN_VHT2SS_MCS5;             break;
 343                 case DESC_RATEVHTSS2MCS6:       ret_rate = MGN_VHT2SS_MCS6;             break;
 344                 case DESC_RATEVHTSS2MCS7:       ret_rate = MGN_VHT2SS_MCS7;             break;
 345                 case DESC_RATEVHTSS2MCS8:       ret_rate = MGN_VHT2SS_MCS8;             break;
 346                 case DESC_RATEVHTSS2MCS9:       ret_rate = MGN_VHT2SS_MCS9;             break;
 347                 case DESC_RATEVHTSS3MCS0:       ret_rate = MGN_VHT3SS_MCS0;             break;
 348                 case DESC_RATEVHTSS3MCS1:       ret_rate = MGN_VHT3SS_MCS1;             break;
 349                 case DESC_RATEVHTSS3MCS2:       ret_rate = MGN_VHT3SS_MCS2;             break;
 350                 case DESC_RATEVHTSS3MCS3:       ret_rate = MGN_VHT3SS_MCS3;             break;
 351                 case DESC_RATEVHTSS3MCS4:       ret_rate = MGN_VHT3SS_MCS4;             break;
 352                 case DESC_RATEVHTSS3MCS5:       ret_rate = MGN_VHT3SS_MCS5;             break;
 353                 case DESC_RATEVHTSS3MCS6:       ret_rate = MGN_VHT3SS_MCS6;             break;
 354                 case DESC_RATEVHTSS3MCS7:       ret_rate = MGN_VHT3SS_MCS7;             break;
 355                 case DESC_RATEVHTSS3MCS8:       ret_rate = MGN_VHT3SS_MCS8;             break;
 356                 case DESC_RATEVHTSS3MCS9:       ret_rate = MGN_VHT3SS_MCS9;             break;
 357                 case DESC_RATEVHTSS4MCS0:       ret_rate = MGN_VHT4SS_MCS0;             break;
 358                 case DESC_RATEVHTSS4MCS1:       ret_rate = MGN_VHT4SS_MCS1;             break;
 359                 case DESC_RATEVHTSS4MCS2:       ret_rate = MGN_VHT4SS_MCS2;             break;
 360                 case DESC_RATEVHTSS4MCS3:       ret_rate = MGN_VHT4SS_MCS3;             break;
 361                 case DESC_RATEVHTSS4MCS4:       ret_rate = MGN_VHT4SS_MCS4;             break;
 362                 case DESC_RATEVHTSS4MCS5:       ret_rate = MGN_VHT4SS_MCS5;             break;
 363                 case DESC_RATEVHTSS4MCS6:       ret_rate = MGN_VHT4SS_MCS6;             break;
 364                 case DESC_RATEVHTSS4MCS7:       ret_rate = MGN_VHT4SS_MCS7;             break;
 365                 case DESC_RATEVHTSS4MCS8:       ret_rate = MGN_VHT4SS_MCS8;             break;
 366                 case DESC_RATEVHTSS4MCS9:       ret_rate = MGN_VHT4SS_MCS9;             break;
 367
 368                 default:
 369                         DBG_871X("HwRateToMRate(): Non supported Rate [%x]!!!\n",rate );
 370                         break;
 371         }
 372
 373         return ret_rate;
 374 }
 375
 376 void    HalSetBrateCfg(
 377         IN PADAPTER             Adapter,
 378         IN u8                   *mBratesOS,
 379         OUT u16                 *pBrateCfg)
 380 {
 381         u8      i, is_brate, brate;
 382
 383         for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
 384         {
 385                 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
 386                 brate = mBratesOS[i] & 0x7f;
 387
 388                 if( is_brate )
 389                 {
 390                         switch(brate)
 391                         {
 392                                 case IEEE80211_CCK_RATE_1MB:    *pBrateCfg |= RATE_1M;  break;
 393                                 case IEEE80211_CCK_RATE_2MB:    *pBrateCfg |= RATE_2M;  break;
 394                                 case IEEE80211_CCK_RATE_5MB:    *pBrateCfg |= RATE_5_5M;break;
 395                                 case IEEE80211_CCK_RATE_11MB:   *pBrateCfg |= RATE_11M; break;
 396                                 case IEEE80211_OFDM_RATE_6MB:   *pBrateCfg |= RATE_6M;  break;
 397                                 case IEEE80211_OFDM_RATE_9MB:   *pBrateCfg |= RATE_9M;  break;
 398                                 case IEEE80211_OFDM_RATE_12MB:  *pBrateCfg |= RATE_12M; break;
 399                                 case IEEE80211_OFDM_RATE_18MB:  *pBrateCfg |= RATE_18M; break;
 400                                 case IEEE80211_OFDM_RATE_24MB:  *pBrateCfg |= RATE_24M; break;
 401                                 case IEEE80211_OFDM_RATE_36MB:  *pBrateCfg |= RATE_36M; break;
 402                                 case IEEE80211_OFDM_RATE_48MB:  *pBrateCfg |= RATE_48M; break;
 403                                 case IEEE80211_OFDM_RATE_54MB:  *pBrateCfg |= RATE_54M; break;
 404                         }
 405                 }
 406         }
 407 }
 408
 409 static VOID
 410 _OneOutPipeMapping(
 411         IN      PADAPTER        pAdapter
 412         )
 413 {
 414         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(pAdapter);
 415
 416         pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 417         pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
 418         pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE
 419         pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
 420
 421         pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 422         pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 423         pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
 424         pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 425 }
 426
 427 static VOID
 428 _TwoOutPipeMapping(
 429         IN      PADAPTER        pAdapter,
 430         IN      BOOLEAN         bWIFICfg
 431         )
 432 {
 433         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(pAdapter);
 434
 435         if(bWIFICfg){ //WMM
 436
 437                 //      BK,     BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 438                 //{  0,         1,      0,      1,      0,      0,      0,      0,              0       };
 439                 //0:H, 1:N
 440
 441                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO
 442                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
 443                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
 444                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
 445
 446                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 447                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 448                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
 449                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 450
 451         }
 452         else{//typical setting
 453
 454
 455                 //BK,   BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 456                 //{  1,         1,      0,      0,      0,      0,      0,      0,              0       };
 457                 //0:H, 1:N
 458
 459                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 460                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
 461                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
 462                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
 463
 464                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 465                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 466                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
 467                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 468
 469         }
 470
 471 }
 472
 473 static VOID _ThreeOutPipeMapping(
 474         IN      PADAPTER        pAdapter,
 475         IN      BOOLEAN         bWIFICfg
 476         )
 477 {
 478         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(pAdapter);
 479
 480         if(bWIFICfg){//for WMM
 481
 482                 //      BK,     BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 483                 //{  1,         2,      1,      0,      0,      0,      0,      0,              0       };
 484                 //0:H, 1:N, 2:L
 485
 486                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 487                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
 488                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
 489                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
 490
 491                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 492                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 493                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
 494                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 495
 496         }
 497         else{//typical setting
 498
 499
 500                 //      BK,     BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 501                 //{  2,         2,      1,      0,      0,      0,      0,      0,              0       };
 502                 //0:H, 1:N, 2:L
 503
 504                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 505                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
 506                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
 507                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
 508
 509                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 510                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 511                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
 512                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 513         }
 514
 515 }
 516 static VOID _FourOutPipeMapping(
 517         IN      PADAPTER        pAdapter,
 518         IN      BOOLEAN         bWIFICfg
 519         )
 520 {
 521         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(pAdapter);
 522
 523         if(bWIFICfg){//for WMM
 524
 525                 //      BK,     BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 526                 //{  1,         2,      1,      0,      0,      0,      0,      0,              0       };
 527                 //0:H, 1:N, 2:L ,3:E
 528
 529                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 530                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
 531                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
 532                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
 533
 534                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 535                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 536                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
 537                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 538
 539         }
 540         else{//typical setting
 541
 542
 543                 //      BK,     BE,     VI,     VO,     BCN,    CMD,MGT,HIGH,HCCA
 544                 //{  2,         2,      1,      0,      0,      0,      0,      0,              0       };
 545                 //0:H, 1:N, 2:L
 546
 547                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
 548                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
 549                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
 550                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
 551
 552                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
 553                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
 554                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
 555                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
 556         }
 557
 558 }
 559 BOOLEAN
 560 Hal_MappingOutPipe(
 561         IN      PADAPTER        pAdapter,
 562         IN      u8              NumOutPipe
 563         )
 564 {
 565         struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
 566
 567         BOOLEAN  bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
 568
 569         BOOLEAN result = _TRUE;
 570
 571         switch(NumOutPipe)
 572         {
 573                 case 2:
 574                         _TwoOutPipeMapping(pAdapter, bWIFICfg);
 575                         break;
 576                 case 3:
 577                 case 4:
 578                         _ThreeOutPipeMapping(pAdapter, bWIFICfg);
 579                         break;
 580                 case 1:
 581                         _OneOutPipeMapping(pAdapter);
 582                         break;
 583                 default:
 584                         result = _FALSE;
 585                         break;
 586         }
 587
 588         return result;
 589
 590 }
 591
 592 void hal_init_macaddr(_adapter *adapter)
 593 {
 594         rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
 595 #ifdef  CONFIG_CONCURRENT_MODE
 596         if (adapter->pbuddy_adapter)
 597                 rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr);
 598 #endif
 599 }
 600
 601 void rtw_init_hal_com_default_value(PADAPTER Adapter)
 602 {
 603         PHAL_DATA_TYPE  pHalData = GET_HAL_DATA(Adapter);
 604
 605         pHalData->AntDetection = 1;
 606 }
 607
 608 /*
 609 * C2H event format:
 610 * Field  TRIGGER                CONTENT    CMD_SEQ      CMD_LEN          CMD_ID
 611 * BITS   [127:120]      [119:16]      [15:8]              [7:4]            [3:0]
 612 */
 613
 614 void c2h_evt_clear(_adapter *adapter)
 615 {
 616         rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
 617 }
 618
 619 s32 c2h_evt_read(_adapter *adapter, u8 *buf)
 620 {
 621         s32 ret = _FAIL;
 622         struct c2h_evt_hdr *c2h_evt;
 623         int i;
 624         u8 trigger;
 625
 626         if (buf == NULL)
 627                 goto exit;
 628
 629 #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined (CONFIG_RTL8188E)
 630
 631         trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
 632
 633         if (trigger == C2H_EVT_HOST_CLOSE) {
 634                 goto exit; /* Not ready */
 635         } else if (trigger != C2H_EVT_FW_CLOSE) {
 636                 goto clear_evt; /* Not a valid value */
 637         }
 638
 639         c2h_evt = (struct c2h_evt_hdr *)buf;
 640
 641         _rtw_memset(c2h_evt, 0, 16);
 642
 643         *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
 644         *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
 645
 646         RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
 647                 &c2h_evt , sizeof(c2h_evt));
 648
 649         if (0) {
 650                 DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
 651                         , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
 652         }
 653
 654         /* Read the content */
 655         for (i = 0; i < c2h_evt->plen; i++)
 656                 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i);
 657
 658         RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
 659                 c2h_evt->payload, c2h_evt->plen);
 660
 661         ret = _SUCCESS;
 662
 663 clear_evt:
 664         /*
 665         * Clear event to notify FW we have read the command.
 666         * If this field isn't clear, the FW won't update the next command message.
 667         */
 668         c2h_evt_clear(adapter);
 669 #endif
 670 exit:
 671         return ret;
 672 }
 673
 674 /*
 675 * C2H event format:
 676 * Field    TRIGGER    CMD_LEN    CONTENT    CMD_SEQ    CMD_ID
 677 * BITS    [127:120]   [119:112]    [111:16]          [15:8]         [7:0]
 678 */
 679 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf)
 680 {
 681         s32 ret = _FAIL;
 682         struct c2h_evt_hdr_88xx *c2h_evt;
 683         int i;
 684         u8 trigger;
 685
 686         if (buf == NULL)
 687                 goto exit;
 688
 689 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B)
 690
 691         trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
 692
 693         if (trigger == C2H_EVT_HOST_CLOSE) {
 694                 goto exit; /* Not ready */
 695         } else if (trigger != C2H_EVT_FW_CLOSE) {
 696                 goto clear_evt; /* Not a valid value */
 697         }
 698
 699         c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
 700
 701         _rtw_memset(c2h_evt, 0, 16);
 702
 703         c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
 704         c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
 705         c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
 706
 707         RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
 708                 &c2h_evt , sizeof(c2h_evt));
 709
 710         if (0) {
 711                 DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
 712                         , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
 713         }
 714
 715         /* Read the content */
 716         for (i = 0; i < c2h_evt->plen; i++)
 717                 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
 718
 719         RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
 720                 c2h_evt->payload, c2h_evt->plen);
 721
 722         ret = _SUCCESS;
 723
 724 clear_evt:
 725         /*
 726         * Clear event to notify FW we have read the command.
 727         * If this field isn't clear, the FW won't update the next command message.
 728         */
 729         c2h_evt_clear(adapter);
 730 #endif
 731 exit:
 732         return ret;
 733 }
 734
 735
 736 u8  rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta)
 737 {
 738         if(IS_NEW_GENERATION_IC(adapter)){
 739                 return networktype_to_raid_ex(adapter,psta);
 740         }
 741         else{
 742                 return networktype_to_raid(adapter,psta);
 743         }
 744
 745 }
 746 u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type)
 747 {
 748
 749         u8 raid;
 750         if(IS_NEW_GENERATION_IC(adapter)){
 751
 752                 raid = (network_type & WIRELESS_11B)    ?RATEID_IDX_B
 753                                                                                         :RATEID_IDX_G;
 754         }
 755         else{
 756                 raid = (network_type & WIRELESS_11B)    ?RATR_INX_WIRELESS_B
 757                                                                                         :RATR_INX_WIRELESS_G;
 758         }
 759         return raid;
 760 }
 761
 762 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 763 {
 764         u8      i, rf_type, limit;
 765         u32     tx_ra_bitmap;
 766
 767         if(psta == NULL)
 768         {
 769                 return;
 770         }
 771
 772         tx_ra_bitmap = 0;
 773
 774         //b/g mode ra_bitmap
 775         for (i=0; i<sizeof(psta->bssrateset); i++)
 776         {
 777                 if (psta->bssrateset[i])
 778                         tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
 779         }
 780
 781 #ifdef CONFIG_80211N_HT
 782 #ifdef CONFIG_80211AC_VHT
 783         //AC mode ra_bitmap
 784         if(psta->vhtpriv.vht_option)
 785         {
 786                 tx_ra_bitmap |= (rtw_vht_rate_to_bitmap(psta->vhtpriv.vht_mcs_map) << 12);
 787         }
 788         else
 789 #endif //CONFIG_80211AC_VHT
 790         {
 791                 //n mode ra_bitmap
 792                 if(psta->htpriv.ht_option)
 793                 {
 794                         rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
 795                         if(rf_type == RF_2T2R)
 796                                 limit=16;// 2R
 797                         else
 798                                 limit=8;//  1R
 799
 800                         for (i=0; i<limit; i++) {
 801                                 if (psta->htpriv.ht_cap.supp_mcs_set[i/8] & BIT(i%8))
 802                                         tx_ra_bitmap |= BIT(i+12);
 803                         }
 804                 }
 805         }
 806 #endif //CONFIG_80211N_HT
 807
 808         psta->ra_mask = tx_ra_bitmap;
 809         psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
 810 }
 811
 812 void hw_var_port_switch(_adapter *adapter)
 813 {
 814 #ifdef CONFIG_CONCURRENT_MODE
 815 #ifdef CONFIG_RUNTIME_PORT_SWITCH
 816 /*
 817 0x102: MSR
 818 0x550: REG_BCN_CTRL
 819 0x551: REG_BCN_CTRL_1
 820 0x55A: REG_ATIMWND
 821 0x560: REG_TSFTR
 822 0x568: REG_TSFTR1
 823 0x570: REG_ATIMWND_1
 824 0x610: REG_MACID
 825 0x618: REG_BSSID
 826 0x700: REG_MACID1
 827 0x708: REG_BSSID1
 828 */
 829
 830         int i;
 831         u8 msr;
 832         u8 bcn_ctrl;
 833         u8 bcn_ctrl_1;
 834         u8 atimwnd[2];
 835         u8 atimwnd_1[2];
 836         u8 tsftr[8];
 837         u8 tsftr_1[8];
 838         u8 macid[6];
 839         u8 bssid[6];
 840         u8 macid_1[6];
 841         u8 bssid_1[6];
 842
 843         u8 iface_type;
 844
 845         msr = rtw_read8(adapter, MSR);
 846         bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
 847         bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
 848
 849         for (i=0; i<2; i++)
 850                 atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i);
 851         for (i=0; i<2; i++)
 852                 atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i);
 853
 854         for (i=0; i<8; i++)
 855                 tsftr[i] = rtw_read8(adapter, REG_TSFTR+i);
 856         for (i=0; i<8; i++)
 857                 tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i);
 858
 859         for (i=0; i<6; i++)
 860                 macid[i] = rtw_read8(adapter, REG_MACID+i);
 861
 862         for (i=0; i<6; i++)
 863                 bssid[i] = rtw_read8(adapter, REG_BSSID+i);
 864
 865         for (i=0; i<6; i++)
 866                 macid_1[i] = rtw_read8(adapter, REG_MACID1+i);
 867
 868         for (i=0; i<6; i++)
 869                 bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i);
 870
 871 #ifdef DBG_RUNTIME_PORT_SWITCH
 872         DBG_871X(FUNC_ADPT_FMT" before switch\n"
 873                 "msr:0x%02x\n"
 874                 "bcn_ctrl:0x%02x\n"
 875                 "bcn_ctrl_1:0x%02x\n"
 876                 "atimwnd:0x%04x\n"
 877                 "atimwnd_1:0x%04x\n"
 878                 "tsftr:%llu\n"
 879                 "tsftr1:%llu\n"
 880                 "macid:"MAC_FMT"\n"
 881                 "bssid:"MAC_FMT"\n"
 882                 "macid_1:"MAC_FMT"\n"
 883                 "bssid_1:"MAC_FMT"\n"
 884                 , FUNC_ADPT_ARG(adapter)
 885                 , msr
 886                 , bcn_ctrl
 887                 , bcn_ctrl_1
 888                 , *((u16*)atimwnd)
 889                 , *((u16*)atimwnd_1)
 890                 , *((u64*)tsftr)
 891                 , *((u64*)tsftr_1)
 892                 , MAC_ARG(macid)
 893                 , MAC_ARG(bssid)
 894                 , MAC_ARG(macid_1)
 895                 , MAC_ARG(bssid_1)
 896         );
 897 #endif /* DBG_RUNTIME_PORT_SWITCH */
 898
 899         /* disable bcn function, disable update TSF  */
 900         rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
 901         rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
 902
 903         /* switch msr */
 904         msr = (msr&0xf0) |((msr&0x03) << 2) | ((msr&0x0c) >> 2);
 905         rtw_write8(adapter, MSR, msr);
 906
 907         /* write port0 */
 908         rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1 & ~EN_BCN_FUNCTION);
 909         for (i=0; i<2; i++)
 910                 rtw_write8(adapter, REG_ATIMWND+i, atimwnd_1[i]);
 911         for (i=0; i<8; i++)
 912                 rtw_write8(adapter, REG_TSFTR+i, tsftr_1[i]);
 913         for (i=0; i<6; i++)
 914                 rtw_write8(adapter, REG_MACID+i, macid_1[i]);
 915         for (i=0; i<6; i++)
 916                 rtw_write8(adapter, REG_BSSID+i, bssid_1[i]);
 917
 918         /* write port1 */
 919         rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl & ~EN_BCN_FUNCTION);
 920         for (i=0; i<2; i++)
 921                 rtw_write8(adapter, REG_ATIMWND_1+1, atimwnd[i]);
 922         for (i=0; i<8; i++)
 923                 rtw_write8(adapter, REG_TSFTR1+i, tsftr[i]);
 924         for (i=0; i<6; i++)
 925                 rtw_write8(adapter, REG_MACID1+i, macid[i]);
 926         for (i=0; i<6; i++)
 927                 rtw_write8(adapter, REG_BSSID1+i, bssid[i]);
 928
 929         /* write bcn ctl */
 930 #ifdef CONFIG_BT_COEXIST
 931 #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)
 932         // always enable port0 beacon function for PSTDMA
 933         bcn_ctrl_1 |= EN_BCN_FUNCTION;
 934         // always disable port1 beacon function for PSTDMA
 935         bcn_ctrl &= ~EN_BCN_FUNCTION;
 936 #endif
 937 #endif
 938         rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1);
 939         rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl);
 940
 941         if (adapter->iface_type == IFACE_PORT0) {
 942                 adapter->iface_type = IFACE_PORT1;
 943                 adapter->pbuddy_adapter->iface_type = IFACE_PORT0;
 944                 DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n",
 945                         ADPT_ARG(adapter->pbuddy_adapter), ADPT_ARG(adapter));
 946         } else {
 947                 adapter->iface_type = IFACE_PORT0;
 948                 adapter->pbuddy_adapter->iface_type = IFACE_PORT1;
 949                 DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n",
 950                         ADPT_ARG(adapter), ADPT_ARG(adapter->pbuddy_adapter));
 951         }
 952
 953 #ifdef DBG_RUNTIME_PORT_SWITCH
 954         msr = rtw_read8(adapter, MSR);
 955         bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
 956         bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
 957
 958         for (i=0; i<2; i++)
 959                 atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i);
 960         for (i=0; i<2; i++)
 961                 atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i);
 962
 963         for (i=0; i<8; i++)
 964                 tsftr[i] = rtw_read8(adapter, REG_TSFTR+i);
 965         for (i=0; i<8; i++)
 966                 tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i);
 967
 968         for (i=0; i<6; i++)
 969                 macid[i] = rtw_read8(adapter, REG_MACID+i);
 970
 971         for (i=0; i<6; i++)
 972                 bssid[i] = rtw_read8(adapter, REG_BSSID+i);
 973
 974         for (i=0; i<6; i++)
 975                 macid_1[i] = rtw_read8(adapter, REG_MACID1+i);
 976
 977         for (i=0; i<6; i++)
 978                 bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i);
 979
 980         DBG_871X(FUNC_ADPT_FMT" after switch\n"
 981                 "msr:0x%02x\n"
 982                 "bcn_ctrl:0x%02x\n"
 983                 "bcn_ctrl_1:0x%02x\n"
 984                 "atimwnd:%u\n"
 985                 "atimwnd_1:%u\n"
 986                 "tsftr:%llu\n"
 987                 "tsftr1:%llu\n"
 988                 "macid:"MAC_FMT"\n"
 989                 "bssid:"MAC_FMT"\n"
 990                 "macid_1:"MAC_FMT"\n"
 991                 "bssid_1:"MAC_FMT"\n"
 992                 , FUNC_ADPT_ARG(adapter)
 993                 , msr
 994                 , bcn_ctrl
 995                 , bcn_ctrl_1
 996                 , *((u16*)atimwnd)
 997                 , *((u16*)atimwnd_1)
 998                 , *((u64*)tsftr)
 999                 , *((u64*)tsftr_1)
1000                 , MAC_ARG(macid)
1001                 , MAC_ARG(bssid)
1002                 , MAC_ARG(macid_1)
1003                 , MAC_ARG(bssid_1)
1004         );
1005 #endif /* DBG_RUNTIME_PORT_SWITCH */
1006
1007 #endif /* CONFIG_RUNTIME_PORT_SWITCH */
1008 #endif /* CONFIG_CONCURRENT_MODE */
1009 }
1010
1011 void SetHwReg(_adapter *adapter, u8 variable, u8 *val)
1012 {
1013         HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1014         DM_ODM_T *odm = &(hal_data->odmpriv);
1015
1016 _func_enter_;
1017
1018         switch (variable) {
1019         case HW_VAR_PORT_SWITCH:
1020                 hw_var_port_switch(adapter);
1021                 break;
1022         case HW_VAR_DM_FLAG:
1023                 odm->SupportAbility = *((u32*)val);
1024                 break;
1025         case HW_VAR_DM_FUNC_OP:
1026                 if (*((u8*)val) == _TRUE) {
1027                         /* save dm flag */
1028                         odm->BK_SupportAbility = odm->SupportAbility;
1029                 } else {
1030                         /* restore dm flag */
1031                         odm->SupportAbility = odm->BK_SupportAbility;
1032                 }
1033                 break;
1034         case HW_VAR_DM_FUNC_SET:
1035                 if(*((u32*)val) == DYNAMIC_ALL_FUNC_ENABLE){
1036                         struct dm_priv  *dm = &hal_data->dmpriv;
1037                         dm->DMFlag = dm->InitDMFlag;
1038                         odm->SupportAbility = dm->InitODMFlag;
1039                 } else {
1040                         odm->SupportAbility |= *((u32 *)val);
1041                 }
1042                 break;
1043         case HW_VAR_DM_FUNC_CLR:
1044                 /*
1045                 * input is already a mask to clear function
1046                 * don't invert it again! George,Lucas@20130513
1047                 */
1048                 odm->SupportAbility &= *((u32 *)val);
1049                 break;
1050         default:
1051                 if (0)
1052                 DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n",
1053                         FUNC_ADPT_ARG(adapter), variable);
1054                 break;
1055         }
1056
1057 _func_exit_;
1058 }
1059
1060 void GetHwReg(_adapter *adapter, u8 variable, u8 *val)
1061 {
1062         HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1063         DM_ODM_T *odm = &(hal_data->odmpriv);
1064
1065 _func_enter_;
1066
1067         switch (variable) {
1068         case HW_VAR_BASIC_RATE:
1069                 *((u16*)val) = hal_data->BasicRateSet;
1070                 break;
1071         case HW_VAR_DM_FLAG:
1072                 *((u32*)val) = odm->SupportAbility;
1073                 break;
1074         case HW_VAR_RF_TYPE:
1075                 *((u8*)val) = hal_data->rf_type;
1076                 break;
1077         default:
1078                 if (0)
1079                 DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n",
1080                         FUNC_ADPT_ARG(adapter), variable);
1081                 break;
1082         }
1083
1084 _func_exit_;
1085 }
1086
1087
1088
1089
1090 u8
1091 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
1092 {
1093         HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1094         DM_ODM_T *odm = &(hal_data->odmpriv);
1095         u8 bResult = _SUCCESS;
1096
1097         switch(variable) {
1098         case HW_DEF_FA_CNT_DUMP:
1099                 //ODM_COMP_COMMON
1100                 if(*((u8*)value))
1101                         odm->DebugComponents |= (ODM_COMP_DIG |ODM_COMP_FA_CNT);
1102                 else
1103                         odm->DebugComponents &= ~(ODM_COMP_DIG |ODM_COMP_FA_CNT);
1104                 break;
1105         case HAL_DEF_DBG_RX_INFO_DUMP:
1106                 {
1107                         PFALSE_ALARM_STATISTICS FalseAlmCnt = &(odm->FalseAlmCnt);
1108                         pDIG_T  pDM_DigTable = &odm->DM_DigTable;
1109
1110                         DBG_871X("============ Rx Info dump ===================\n");
1111                         DBG_871X("bLinked = %d, RSSI_Min = %d(%%), CurrentIGI = 0x%x \n",
1112                                 odm->bLinked, odm->RSSI_Min, pDM_DigTable->CurIGValue);
1113                         DBG_871X("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n",
1114                                 FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all);
1115
1116                         if(odm->bLinked){
1117                                 DBG_871X("RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
1118                                         HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
1119
1120                                 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
1121                                 rtw_dump_raw_rssi_info(adapter);
1122                                 #endif
1123                         }
1124                 }
1125                 break;
1126         case HW_DEF_ODM_DBG_FLAG:
1127                 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u8Byte*)value));
1128                 break;
1129         case HW_DEF_ODM_DBG_LEVEL:
1130                 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u4Byte*)value));
1131                 break;
1132         case HAL_DEF_DBG_DM_FUNC:
1133         {
1134                 u8 dm_func = *((u8*)value);
1135                 struct dm_priv *dm = &hal_data->dmpriv;
1136
1137                 if(dm_func == 0){ //disable all dynamic func
1138                         odm->SupportAbility = DYNAMIC_FUNC_DISABLE;
1139                         DBG_8192C("==> Disable all dynamic function...\n");
1140                 }
1141                 else if(dm_func == 1){//disable DIG
1142                         odm->SupportAbility  &= (~DYNAMIC_BB_DIG);
1143                         DBG_8192C("==> Disable DIG...\n");
1144                 }
1145                 else if(dm_func == 2){//disable High power
1146                         odm->SupportAbility  &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
1147                 }
1148                 else if(dm_func == 3){//disable tx power tracking
1149                         odm->SupportAbility  &= (~DYNAMIC_RF_CALIBRATION);
1150                         DBG_8192C("==> Disable tx power tracking...\n");
1151                 }
1152                 else if(dm_func == 4){//disable BT coexistence
1153                         dm->DMFlag &= (~DYNAMIC_FUNC_BT);
1154                 }
1155                 else if(dm_func == 5){//disable antenna diversity
1156                         odm->SupportAbility  &= (~DYNAMIC_BB_ANT_DIV);
1157                 }
1158                 else if(dm_func == 6){//turn on all dynamic func
1159                         if(!(odm->SupportAbility  & DYNAMIC_BB_DIG)) {
1160                                 DIG_T   *pDigTable = &odm->DM_DigTable;
1161                                 pDigTable->CurIGValue= rtw_read8(adapter, 0xc50);
1162                         }
1163                         dm->DMFlag |= DYNAMIC_FUNC_BT;
1164                         odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
1165                         DBG_8192C("==> Turn on all dynamic function...\n");
1166                 }
1167         }
1168                 break;
1169         case HAL_DEF_DBG_DUMP_RXPKT:
1170                 hal_data->bDumpRxPkt = *((u8*)value);
1171                 break;
1172         case HAL_DEF_DBG_DUMP_TXPKT:
1173                 hal_data->bDumpTxPkt = *((u8*)value);
1174                 break;
1175         case HAL_DEF_ANT_DETECT:
1176                 hal_data->AntDetection = *((u8 *)value);
1177                 break;
1178         default:
1179                 DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable);
1180                 bResult = _FAIL;
1181                 break;
1182         }
1183
1184         return bResult;
1185 }
1186
1187 u8
1188 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
1189 {
1190         HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1191         DM_ODM_T *odm = &(hal_data->odmpriv);
1192         u8 bResult = _SUCCESS;
1193
1194         switch(variable) {
1195         case HW_DEF_ODM_DBG_FLAG:
1196                 *((u8Byte*)value) = odm->DebugComponents;
1197                 break;
1198         case HW_DEF_ODM_DBG_LEVEL:
1199                 *((u4Byte*)value) = odm->DebugLevel;
1200                 break;
1201         case HAL_DEF_DBG_DM_FUNC:
1202                 *(( u32*)value) =hal_data->odmpriv.SupportAbility;
1203                 break;
1204         case HAL_DEF_DBG_DUMP_RXPKT:
1205                 *((u8*)value) = hal_data->bDumpRxPkt;
1206                 break;
1207         case HAL_DEF_DBG_DUMP_TXPKT:
1208                 *((u8*)value) = hal_data->bDumpTxPkt;
1209                 break;
1210         case HAL_DEF_ANT_DETECT:
1211                 *((u8 *)value) = hal_data->AntDetection;
1212                 break;
1213         case HAL_DEF_MACID_SLEEP:
1214                 *(u8*)value = _FALSE;
1215                 break;
1216         case HAL_DEF_TX_PAGE_SIZE:
1217                 *(( u32*)value) = PAGE_SIZE_128;
1218                 break;
1219         default:
1220                 DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable);
1221                 bResult = _FAIL;
1222                 break;
1223         }
1224
1225         return bResult;
1226 }
1227
1228 BOOLEAN
1229 eqNByte(
1230         u8*     str1,
1231         u8*     str2,
1232         u32     num
1233         )
1234 {
1235         if(num==0)
1236                 return _FALSE;
1237         while(num>0)
1238         {
1239                 num--;
1240                 if(str1[num]!=str2[num])
1241                         return _FALSE;
1242         }
1243         return _TRUE;
1244 }
1245
1246 //
1247 //      Description:
1248 //              Return TRUE if chTmp is represent for hex digit and
1249 //              FALSE otherwise.
1250 //
1251 //
1252 BOOLEAN
1253 IsHexDigit(
1254         IN              char            chTmp
1255 )
1256 {
1257         if( (chTmp >= '0' && chTmp <= '9') ||
1258                 (chTmp >= 'a' && chTmp <= 'f') ||
1259                 (chTmp >= 'A' && chTmp <= 'F') )
1260         {
1261                 return _TRUE;
1262         }
1263         else
1264         {
1265                 return _FALSE;
1266         }
1267 }
1268
1269
1270 //
1271 //      Description:
1272 //              Translate a character to hex digit.
1273 //
1274 u32
1275 MapCharToHexDigit(
1276         IN              char            chTmp
1277 )
1278 {
1279         if(chTmp >= '0' && chTmp <= '9')
1280                 return (chTmp - '0');
1281         else if(chTmp >= 'a' && chTmp <= 'f')
1282                 return (10 + (chTmp - 'a'));
1283         else if(chTmp >= 'A' && chTmp <= 'F')
1284                 return (10 + (chTmp - 'A'));
1285         else
1286                 return 0;
1287 }
1288
1289
1290
1291 //
1292 //      Description:
1293 //              Parse hex number from the string pucStr.
1294 //
1295 BOOLEAN
1296 GetHexValueFromString(
1297         IN              char*                   szStr,
1298         IN OUT  u32*                    pu4bVal,
1299         IN OUT  u32*                    pu4bMove
1300 )
1301 {
1302         char*           szScan = szStr;
1303
1304         // Check input parameter.
1305         if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL)
1306         {
1307                 DBG_871X("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove);
1308                 return _FALSE;
1309         }
1310
1311         // Initialize output.
1312         *pu4bMove = 0;
1313         *pu4bVal = 0;
1314
1315         // Skip leading space.
1316         while(  *szScan != '\0' &&
1317                         (*szScan == ' ' || *szScan == '\t') )
1318         {
1319                 szScan++;
1320                 (*pu4bMove)++;
1321         }
1322
1323         // Skip leading '0x' or '0X'.
1324         if(*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X'))
1325         {
1326                 szScan += 2;
1327                 (*pu4bMove) += 2;
1328         }
1329
1330         // Check if szScan is now pointer to a character for hex digit,
1331         // if not, it means this is not a valid hex number.
1332         if(!IsHexDigit(*szScan))
1333         {
1334                 return _FALSE;
1335         }
1336
1337         // Parse each digit.
1338         do
1339         {
1340                 (*pu4bVal) <<= 4;
1341                 *pu4bVal += MapCharToHexDigit(*szScan);
1342
1343                 szScan++;
1344                 (*pu4bMove)++;
1345         } while(IsHexDigit(*szScan));
1346
1347         return _TRUE;
1348 }
1349
1350 BOOLEAN
1351 GetFractionValueFromString(
1352         IN              char*                   szStr,
1353         IN OUT  u8*                             pInteger,
1354         IN OUT  u8*                             pFraction,
1355         IN OUT  u32*                    pu4bMove
1356 )
1357 {
1358         char    *szScan = szStr;
1359
1360         // Initialize output.
1361         *pu4bMove = 0;
1362         *pInteger = 0;
1363         *pFraction = 0;
1364
1365         // Skip leading space.
1366         while ( *szScan != '\0' &&      (*szScan == ' ' || *szScan == '\t') ) {
1367                 ++szScan;
1368                 ++(*pu4bMove);
1369         }
1370
1371         // Parse each digit.
1372         do {
1373                 (*pInteger) *= 10;
1374                 *pInteger += ( *szScan - '0' );
1375
1376                 ++szScan;
1377                 ++(*pu4bMove);
1378
1379                 if ( *szScan == '.' )
1380                 {
1381                         ++szScan;
1382                         ++(*pu4bMove);
1383
1384                         if ( *szScan < '0' || *szScan > '9' )
1385                                 return _FALSE;
1386                         else {
1387                                 *pFraction = *szScan - '0';
1388                                 ++szScan;
1389                                 ++(*pu4bMove);
1390                                 return _TRUE;
1391                         }
1392                 }
1393         } while(*szScan >= '0' && *szScan <= '9');
1394
1395         return _TRUE;
1396 }
1397
1398 //
1399 //      Description:
1400 //              Return TRUE if szStr is comment out with leading "//".
1401 //
1402 BOOLEAN
1403 IsCommentString(
1404         IN              char                    *szStr
1405 )
1406 {
1407         if(*szStr == '/' && *(szStr+1) == '/')
1408         {
1409                 return _TRUE;
1410         }
1411         else
1412         {
1413                 return _FALSE;
1414         }
1415 }
1416
1417 BOOLEAN
1418 GetU1ByteIntegerFromStringInDecimal(
1419         IN              char*   Str,
1420         IN OUT  u8*             pInt
1421         )
1422 {
1423         u16 i = 0;
1424         *pInt = 0;
1425
1426         while ( Str[i] != '\0' )
1427         {
1428                 if ( Str[i] >= '0' && Str[i] <= '9' )
1429                 {
1430                         *pInt *= 10;
1431                         *pInt += ( Str[i] - '0' );
1432                 }
1433                 else
1434                 {
1435                         return _FALSE;
1436                 }
1437                 ++i;
1438         }
1439
1440         return _TRUE;
1441 }
1442
1443 // <20121004, Kordan> For example,
1444 // ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]".
1445 // If RightQualifier does not exist, it will hang on in the while loop
1446 BOOLEAN
1447 ParseQualifiedString(
1448     IN          char*   In,
1449     IN OUT      u32*    Start,
1450     OUT         char*   Out,
1451     IN          char            LeftQualifier,
1452     IN          char            RightQualifier
1453     )
1454 {
1455         u32     i = 0, j = 0;
1456         char    c = In[(*Start)++];
1457
1458         if (c != LeftQualifier)
1459                 return _FALSE;
1460
1461         i = (*Start);
1462         while ((c = In[(*Start)++]) != RightQualifier)
1463                 ; // find ']'
1464         j = (*Start) - 2;
1465         strncpy((char *)Out, (const char*)(In+i), j-i+1);
1466
1467         return _TRUE;
1468 }
1469
1470 BOOLEAN
1471 isAllSpaceOrTab(
1472         u8*     data,
1473         u8      size
1474         )
1475 {
1476         u8      cnt = 0, NumOfSpaceAndTab = 0;
1477
1478         while( size > cnt )
1479         {
1480                 if ( data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0' )
1481                         ++NumOfSpaceAndTab;
1482
1483                 ++cnt;
1484         }
1485
1486         return size == NumOfSpaceAndTab;
1487 }
1488
1489
1490 void rtw_hal_check_rxfifo_full(_adapter *adapter)
1491 {
1492         struct dvobj_priv *psdpriv = adapter->dvobj;
1493         struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
1494         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(adapter);
1495         int save_cnt=_FALSE;
1496
1497         //switch counter to RX fifo
1498         if(IS_81XXC(pHalData->VersionID) || IS_92D(pHalData->VersionID)
1499                 || IS_8188E(pHalData->VersionID) || IS_8723_SERIES(pHalData->VersionID)
1500                 || IS_8812_SERIES(pHalData->VersionID) || IS_8821_SERIES(pHalData->VersionID))
1501         {
1502                 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0);
1503                 save_cnt = _TRUE;
1504         }
1505         else if(IS_8723B_SERIES(pHalData->VersionID) || IS_8192E(pHalData->VersionID))
1506         {
1507                 //printk("8723b or 8192e , MAC_667 set 0xf0\n");
1508                 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
1509                 save_cnt = _TRUE;
1510         }
1511         //todo: other chips
1512
1513         if(save_cnt)
1514         {
1515                 //rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0);
1516                 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
1517                 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
1518                 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
1519         }
1520 }
1521
1522 void linked_info_dump(_adapter *padapter,u8 benable)
1523 {
1524         struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
1525
1526         if(padapter->bLinkInfoDump == benable)
1527                 return;
1528
1529         DBG_871X("%s %s \n",__FUNCTION__,(benable)?"enable":"disable");
1530
1531         if(benable){
1532                 #ifdef CONFIG_LPS
1533                 pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;//keep org value
1534                 rtw_pm_set_lps(padapter,PS_MODE_ACTIVE);
1535                 #endif
1536
1537                 #ifdef CONFIG_IPS
1538                 pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;//keep org value
1539                 rtw_pm_set_ips(padapter,IPS_NONE);
1540                 #endif
1541         }
1542         else{
1543                 #ifdef CONFIG_IPS
1544                 rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode);
1545                 #endif // CONFIG_IPS
1546
1547                 #ifdef CONFIG_LPS
1548                 rtw_pm_set_lps(padapter, pwrctrlpriv->ips_org_mode);
1549                 #endif // CONFIG_LPS
1550         }
1551         padapter->bLinkInfoDump = benable ;
1552 }
1553
1554 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
1555 void rtw_get_raw_rssi_info(void *sel, _adapter *padapter)
1556 {
1557         u8 isCCKrate,rf_path;
1558         PHAL_DATA_TYPE  pHalData =  GET_HAL_DATA(padapter);
1559         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1560
1561         DBG_871X_SEL_NL(sel,"RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n",
1562                         HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
1563         isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE;
1564
1565         if(isCCKrate)
1566                 psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball;
1567
1568         for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
1569         {
1570                 DBG_871X_SEL_NL(sel,"RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)\n"
1571                         ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]);
1572
1573                 if(!isCCKrate){
1574                         DBG_871X_SEL_NL(sel,"\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n",
1575                         psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]);
1576                 }
1577         }
1578 }
1579
1580 void rtw_dump_raw_rssi_info(_adapter *padapter)
1581 {
1582         u8 isCCKrate,rf_path;
1583         PHAL_DATA_TYPE  pHalData =  GET_HAL_DATA(padapter);
1584         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1585         DBG_871X("============ RAW Rx Info dump ===================\n");
1586         DBG_871X("RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n",
1587                         HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
1588
1589         isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE;
1590
1591         if(isCCKrate)
1592                 psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball;
1593
1594         for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
1595         {
1596                 DBG_871X("RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)"
1597                         ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]);
1598
1599                 if(!isCCKrate){
1600                         printk(",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n",
1601                         psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]);
1602                 }else{
1603                         printk("\n");
1604                 }
1605         }
1606 }
1607
1608 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe)
1609 {
1610         u8 isCCKrate,rf_path;
1611         PHAL_DATA_TYPE  pHalData =  GET_HAL_DATA(padapter);
1612         struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
1613
1614         PODM_PHY_INFO_T pPhyInfo  = (PODM_PHY_INFO_T)(&pattrib->phy_info);
1615         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1616
1617         psample_pkt_rssi->data_rate = pattrib->data_rate;
1618         isCCKrate = (pattrib->data_rate <= DESC_RATE11M)?TRUE :FALSE;
1619
1620         psample_pkt_rssi->pwdball = pPhyInfo->RxPWDBAll;
1621         psample_pkt_rssi->pwr_all = pPhyInfo->RecvSignalPower;
1622
1623         for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
1624         {
1625                 psample_pkt_rssi->mimo_singal_strength[rf_path] = pPhyInfo->RxMIMOSignalStrength[rf_path];
1626                 psample_pkt_rssi->mimo_singal_quality[rf_path] = pPhyInfo->RxMIMOSignalQuality[rf_path];
1627                 if(!isCCKrate){
1628                         psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path];
1629                         psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path];
1630                 }
1631         }
1632 }
1633 #endif