drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_noisemonitor.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 //============================================================\r
  22 // include files\r
  23 //============================================================\r
  24 #include "mp_precomp.h"\r
  25 #include "phydm_precomp.h"\r
  26 #include "phydm_noisemonitor.h"\r
  27 \r
  28 //=================================================\r
  29 // This function is for inband noise test utility only\r
  30 // To obtain the inband noise level(dbm), do the following.\r
  31 // 1. disable DIG and Power Saving \r
  32 // 2. Set initial gain = 0x1a\r
  33 // 3. Stop updating idle time pwer report (for driver read)\r
  34 //      - 0x80c[25]\r
  35 //\r
  36 //=================================================\r
  37 \r
  38 #define Valid_Min                               -35\r
  39 #define Valid_Max                       10\r
  40 #define ValidCnt                                5       \r
  41 \r
  42 #if (DM_ODM_SUPPORT_TYPE &  (ODM_CE|ODM_WIN))\r
  43 \r
  44 s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T        pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time)\r
  45 {\r
  46         u4Byte                          tmp4b;  \r
  47         u1Byte                          max_rf_path=0,rf_path;  \r
  48         u1Byte                          reg_c50, reg_c58,valid_done=0;  \r
  49         struct noise_level              noise_data;\r
  50         u8Byte  start  = 0, func_start = 0,     func_end = 0;\r
  51 \r
  52         func_start = ODM_GetCurrentTime(pDM_Odm);\r
  53         pDM_Odm->noise_level.noise_all = 0;\r
  54         \r
  55         if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R))       \r
  56                 max_rf_path = 2;\r
  57         else\r
  58                 max_rf_path = 1;\r
  59         \r
  60         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n"));\r
  61 \r
  62         ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level));\r
  63         \r
  64         //\r
  65         // Step 1. Disable DIG && Set initial gain.\r
  66         //\r
  67         \r
  68         if(bPauseDIG)\r
  69         {\r
  70                 odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue);\r
  71         }\r
  72         //\r
  73         // Step 2. Disable all power save for read registers\r
  74         //\r
  75         //dcmd_DebugControlPowerSave(pAdapter, PSDisable);\r
  76 \r
  77         //\r
  78         // Step 3. Get noise power level\r
  79         //\r
  80         start = ODM_GetCurrentTime(pDM_Odm);\r
  81         while(1)\r
  82         {\r
  83                 \r
  84                 //Stop updating idle time pwer report (for driver read)\r
  85                 ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1);    \r
  86                 \r
  87                 //Read Noise Floor Report\r
  88                 tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord );\r
  89                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b));\r
  90                 \r
  91                 //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain);\r
  92                 //if(max_rf_path == 2)\r
  93                 //      ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain);\r
  94                 \r
  95                 //update idle time pwer report per 5us\r
  96                 ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0);\r
  97                 \r
  98                 noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff);         \r
  99                 noise_data.value[ODM_RF_PATH_B]  = (u1Byte)((tmp4b&0xff00)>>8);\r
 100         \r
 101                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", \r
 102                         noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B]));\r
 103 \r
 104                  for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) \r
 105                  {\r
 106                         noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path];\r
 107                         noise_data.sval[rf_path] /= 2;\r
 108                  }      \r
 109                         \r
 110                 \r
 111                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", \r
 112                         noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B]));\r
 113                 //ODM_delay_ms(10);\r
 114                 //ODM_sleep_ms(10);\r
 115 \r
 116                 for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) \r
 117                 {\r
 118                         if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min))\r
 119                         {\r
 120                                 noise_data.valid_cnt[rf_path]++;\r
 121                                 noise_data.sum[rf_path] += noise_data.sval[rf_path];\r
 122                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path]));\r
 123                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path]));\r
 124                                 if(noise_data.valid_cnt[rf_path] == ValidCnt)\r
 125                                 {                               \r
 126                                         valid_done++;\r
 127                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path]));\r
 128                                 }                               \r
 129                         \r
 130                         }\r
 131                         \r
 132                 }\r
 133 \r
 134                 //printk("####### valid_done:%d #############\n",valid_done);\r
 135                 if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time))\r
 136                 {\r
 137                         for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)\r
 138                         { \r
 139                                 //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]);\r
 140                                 if(noise_data.valid_cnt[rf_path])\r
 141                                         noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];               \r
 142                                 else\r
 143                                         noise_data.sum[rf_path]  = 0;\r
 144                         }\r
 145                         break;\r
 146                 }\r
 147         }\r
 148         reg_c50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0);\r
 149         reg_c50 &= ~BIT7;\r
 150         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50));\r
 151         pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = (u1Byte)(-110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]);\r
 152         pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A];\r
 153                 \r
 154         if(max_rf_path == 2){\r
 155                 reg_c58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0);\r
 156                 reg_c58 &= ~BIT7;\r
 157                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58));\r
 158                 pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = (u1Byte)(-110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]);\r
 159                 pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B];\r
 160         }\r
 161         pDM_Odm->noise_level.noise_all /= max_rf_path;\r
 162         \r
 163         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", \r
 164                 pDM_Odm->noise_level.noise[ODM_RF_PATH_A],\r
 165                 pDM_Odm->noise_level.noise[ODM_RF_PATH_B]));\r
 166 \r
 167         //\r
 168         // Step 4. Recover the Dig\r
 169         //\r
 170         if(bPauseDIG)\r
 171         {\r
 172                 odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue);\r
 173         }       \r
 174         func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; \r
 175         \r
 176         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n"));\r
 177         return pDM_Odm->noise_level.noise_all;\r
 178 \r
 179 }\r
 180 \r
 181 s2Byte  \r
 182 odm_InbandNoise_Monitor_ACSeries(PDM_ODM_T      pDM_Odm, u8 bPauseDIG, u8 IGIValue, u32 max_time\r
 183         )\r
 184 {\r
 185         s4Byte          rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/\r
 186         s4Byte          value32, pwdb_A = 0, sval, noise, sum;\r
 187         BOOLEAN         pd_flag;\r
 188         u1Byte                  i, valid_cnt;\r
 189         u8Byte  start = 0, func_start = 0, func_end = 0;\r
 190 \r
 191 \r
 192         if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A)))\r
 193                 return 0;\r
 194         \r
 195         func_start = ODM_GetCurrentTime(pDM_Odm);\r
 196         pDM_Odm->noise_level.noise_all = 0;\r
 197         \r
 198         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() ==>\n"));\r
 199         \r
 200         /* Step 1. Disable DIG && Set initial gain. */\r
 201         if (bPauseDIG)\r
 202                 odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue);\r
 203 \r
 204         /* Step 2. Disable all power save for read registers */\r
 205         /*dcmd_DebugControlPowerSave(pAdapter, PSDisable); */\r
 206 \r
 207         /* Step 3. Get noise power level */\r
 208         start = ODM_GetCurrentTime(pDM_Odm);\r
 209 \r
 210         /* reset counters */\r
 211         sum = 0;\r
 212         valid_cnt = 0;\r
 213 \r
 214         /* Step 3. Get noise power level */\r
 215         while (1) {\r
 216                 /*Set IGI=0x1C */\r
 217                 ODM_Write_DIG(pDM_Odm, 0x1C);\r
 218                 /*stop CK320&CK88 */\r
 219                 ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 1);\r
 220                 /*Read Path-A */\r
 221                 ODM_SetBBReg(pDM_Odm, 0x8FC, bMaskDWord, 0x200); /*set debug port*/\r
 222                 value32 = ODM_GetBBReg(pDM_Odm, 0xFA0, bMaskDWord); /*read debug port*/\r
 223                 \r
 224                 rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/\r
 225                 rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/\r
 226 \r
 227                 pd_flag = (BOOLEAN) ((value32 & BIT31) >> 31);\r
 228 \r
 229                 /*Not in packet detection period or Tx state */\r
 230                 if ((!pd_flag) || (rxi_buf_anta != 0x200)) {\r
 231                         /*sign conversion*/\r
 232                         rxi_buf_anta = ODM_SignConversion(rxi_buf_anta, 10);\r
 233                         rxq_buf_anta = ODM_SignConversion(rxq_buf_anta, 10);\r
 234 \r
 235                         pwdb_A = ODM_PWdB_Conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/\r
 236 \r
 237                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF));\r
 238                 }\r
 239                 /*Start CK320&CK88*/\r
 240                 ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 0);\r
 241                 /*BB Reset*/\r
 242                 ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) & (~BIT0));\r
 243                 ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) | BIT0);\r
 244                 /*PMAC Reset*/\r
 245                 ODM_Write1Byte(pDM_Odm, 0xB03, ODM_Read1Byte(pDM_Odm, 0xB03) & (~BIT0));\r
 246                 ODM_Write1Byte(pDM_Odm, 0xB03, ODM_Read1Byte(pDM_Odm, 0xB03) | BIT0);\r
 247                 /*CCK Reset*/\r
 248                 if (ODM_Read1Byte(pDM_Odm, 0x80B) & BIT4) {\r
 249                         ODM_Write1Byte(pDM_Odm, 0x80B, ODM_Read1Byte(pDM_Odm, 0x80B) & (~BIT4));\r
 250                         ODM_Write1Byte(pDM_Odm, 0x80B, ODM_Read1Byte(pDM_Odm, 0x80B) | BIT4);           \r
 251                 }\r
 252 \r
 253                 sval = pwdb_A;\r
 254 \r
 255                 if (sval < 0 && sval >= -27) {\r
 256                         if (valid_cnt < ValidCnt) {\r
 257                                 valid_cnt++;\r
 258                                 sum += sval;\r
 259                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval));\r
 260                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum));\r
 261                                 if ((valid_cnt >= ValidCnt) || (ODM_GetProgressingTime(pDM_Odm, start) > max_time)) {\r
 262                                         sum /= valid_cnt;\r
 263                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum)); \r
 264                                         break;\r
 265                                 }\r
 266                         }\r
 267                 }\r
 268         }\r
 269 \r
 270         /*ADC backoff is 12dB,*/ \r
 271         /*Ptarget=0x1C-110=-82dBm*/\r
 272         noise = sum + 12 + 0x1C - 110; \r
 273         \r
 274         /*Offset*/\r
 275         noise = noise - 3;\r
 276         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("noise = %d\n", noise));\r
 277         pDM_Odm->noise_level.noise_all = (s2Byte)noise;\r
 278 \r
 279         /* Step 4. Recover the Dig*/\r
 280         if (bPauseDIG)\r
 281                 odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue);\r
 282         \r
 283         func_end = ODM_GetProgressingTime(pDM_Odm, func_start);\r
 284         \r
 285         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() <==\n"));\r
 286 \r
 287         return pDM_Odm->noise_level.noise_all;\r
 288 }\r
 289 \r
 290 \r
 291 \r
 292 s2Byte\r
 293 ODM_InbandNoise_Monitor(PVOID pDM_VOID, u8 bPauseDIG, u8 IGIValue, u32 max_time)\r
 294 {\r
 295 \r
 296         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 297         if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)\r
 298                 return odm_InbandNoise_Monitor_ACSeries(pDM_Odm, bPauseDIG, IGIValue, max_time);\r
 299         else\r
 300                 return odm_InbandNoise_Monitor_NSeries(pDM_Odm, bPauseDIG, IGIValue, max_time);\r
 301 }\r
 302 \r
 303 #endif\r
 304 \r
 305 \r