drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_dfs.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 /*\r
  22 ============================================================\r
  23  include files\r
  24 ============================================================\r
  25 */\r
  26 \r
  27 #include "mp_precomp.h"\r
  28 #include "phydm_precomp.h"\r
  29 \r
  30 #if defined(CONFIG_PHYDM_DFS_MASTER)\r
  31 VOID phydm_radar_detect_reset(PVOID pDM_VOID)\r
  32 {\r
  33         PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  34
  35         ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0);\r
  36         ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 1);\r
  37 }
  38
  39 VOID phydm_radar_detect_disable(PVOID pDM_VOID)\r
  40 {\r
  41         PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  42 \r
  43         ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0);\r
  44 }
  45
  46 static VOID phydm_radar_detect_with_dbg_parm(PVOID pDM_VOID)
  47 {
  48         PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
  49
  50         ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, pDM_Odm->radar_detect_reg_918);
  51         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, pDM_Odm->radar_detect_reg_91c);
  52         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, pDM_Odm->radar_detect_reg_920);
  53         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, pDM_Odm->radar_detect_reg_924);
  54 }
  55
  56 /* Init radar detection parameters, called after ch, bw is set */\r
  57 VOID phydm_radar_detect_enable(PVOID pDM_VOID)\r
  58 {\r
  59         PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  60         u1Byte region_domain = pDM_Odm->DFS_RegionDomain;
  61         u1Byte c_channel = *(pDM_Odm->pChannel);
  62
  63         if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
  64                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));\r
  65                 return;
  66         }
  67
  68          if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) {\r
  69 \r
  70                 ODM_SetBBReg(pDM_Odm, 0x814, 0x3fffffff, 0x04cc4d10);
  71                 ODM_SetBBReg(pDM_Odm, 0x834, bMaskByte0, 0x06);
  72
  73                 if (pDM_Odm->radar_detect_dbg_parm_en) {
  74                         phydm_radar_detect_with_dbg_parm(pDM_Odm);
  75                         goto exit;
  76                 }
  77
  78                 if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
  79                         ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c17ecdf);
  80                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
  81                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0fa21a20);
  82                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0f69204);
  83
  84                 } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
  85                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
  86                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67234);
  87
  88                         if (c_channel >= 52 && c_channel <= 64) {
  89                                 ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16ecdf);
  90                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0f141a20);
  91                         } else {
  92                                 ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);
  93                                 if (pDM_Odm->pBandWidth == ODM_BW20M)
  94                                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64721a20);
  95                                 else
  96                                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68721a20);
  97                         }
  98
  99                 } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
 100                         ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);\r
 101                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
 102                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67231);
 103                         if (pDM_Odm->pBandWidth == ODM_BW20M)
 104                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64741a20);
 105                         else
 106                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68741a20);
 107                 } else {
 108                         /* not supported */
 109                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported DFS_RegionDomain:%d\n", region_domain));\r
 110                 }
 111
 112         } else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) {\r
 113         \r
 114                 ODM_SetBBReg(pDM_Odm, 0x814, 0x3fffffff, 0x04cc4d10);
 115                 ODM_SetBBReg(pDM_Odm, 0x834, bMaskByte0, 0x06);
 116
 117                 /* 8822B only, when BW = 20M, DFIR output is 40Mhz, but DFS input is 80MMHz, so it need to upgrade to 80MHz */\r
 118                 if (pDM_Odm->SupportICType & ODM_RTL8822B) {\r
 119                         if (pDM_Odm->pBandWidth == ODM_BW20M)
 120                                 ODM_SetBBReg(pDM_Odm, 0x1984, BIT26, 1);
 121                         else
 122                                 ODM_SetBBReg(pDM_Odm, 0x1984, BIT26, 0);
 123                 }
 124
 125                 if (pDM_Odm->radar_detect_dbg_parm_en) {
 126                         phydm_radar_detect_with_dbg_parm(pDM_Odm);
 127                         goto exit;
 128                 }
 129
 130                 if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
 131                         ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);
 132                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
 133                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0fa21a20);
 134                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0f57204);
 135
 136                 } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
 137                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
 138                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67234);
 139
 140                         if (c_channel >= 52 && c_channel <= 64) {
 141                                 ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16ecdf);
 142                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0f141a20);
 143                         } else {
 144                                 ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c166cdf);
 145                                 if (pDM_Odm->pBandWidth == ODM_BW20M)
 146                                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64721a20);
 147                                 else
 148                                         ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68721a20);
 149                         }
 150                 } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
 151                         ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c166cdf);
 152                         ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
 153                         ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67231);
 154                         if (pDM_Odm->pBandWidth == ODM_BW20M)
 155                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64741a20);
 156                         else
 157                                 ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68741a20);
 158                 } else {
 159                         /* not supported */
 160                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported DFS_RegionDomain:%d\n", region_domain));\r
 161                 }
 162         } else {
 163                 /* not supported IC type*/
 164                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported IC Type:%d\n", pDM_Odm->SupportICType));\r
 165         }
 166
 167 exit:
 168         phydm_radar_detect_reset(pDM_Odm);\r
 169 }
 170
 171 BOOLEAN phydm_radar_detect(PVOID pDM_VOID)\r
 172 {\r
 173         PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 174         BOOLEAN enable_DFS = FALSE;
 175         BOOLEAN radar_detected = FALSE;\r
 176         u1Byte region_domain = pDM_Odm->DFS_RegionDomain;
 177 \r
 178         if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
 179                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));\r
 180                 return FALSE;
 181         }
 182 \r
 183         if (ODM_GetBBReg(pDM_Odm , 0x924, BIT15))\r
 184                 enable_DFS = TRUE;\r
 185
 186         if ((ODM_GetBBReg(pDM_Odm , 0xf98, BIT17))\r
 187                 || (!(region_domain == PHYDM_DFS_DOMAIN_ETSI) && (ODM_GetBBReg(pDM_Odm , 0xf98, BIT19))))\r
 188                 radar_detected = TRUE;\r
 189
 190         if (enable_DFS && radar_detected) {
 191                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD
 192                         , ("Radar detect: enable_DFS:%d, radar_detected:%d\n"
 193                                 , enable_DFS, radar_detected));
 194 \r
 195                 phydm_radar_detect_reset(pDM_Odm);\r
 196         }
 197
 198 exit:
 199         return (enable_DFS && radar_detected);
 200 }\r
 201 #endif /* defined(CONFIG_PHYDM_DFS_MASTER) */\r
 202
 203 BOOLEAN
 204 phydm_dfs_master_enabled(
 205         IN              PVOID           pDM_VOID
 206         )
 207 {
 208 #ifdef CONFIG_PHYDM_DFS_MASTER
 209         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
 210
 211         return *pDM_Odm->dfs_master_enabled ? TRUE : FALSE;
 212 #else
 213         return FALSE;
 214 #endif
 215 }
 216
 217 VOID
 218 phydm_dfs_debug(
 219         IN              PVOID           pDM_VOID,
 220         IN              u4Byte          *const argv,
 221         IN              u4Byte          *_used,
 222         OUT             char            *output,
 223         IN              u4Byte          *_out_len
 224         )
 225 {
 226         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
 227         u4Byte used = *_used;
 228         u4Byte out_len = *_out_len;
 229
 230         switch (argv[0]) {
 231         case 1:
 232                 #if defined(CONFIG_PHYDM_DFS_MASTER)
 233                 /* set dbg parameters for radar detection instead of the default value */
 234                 if (argv[1] == 1) {
 235                         pDM_Odm->radar_detect_reg_918 = argv[2];
 236                         pDM_Odm->radar_detect_reg_91c = argv[3];
 237                         pDM_Odm->radar_detect_reg_920 = argv[4];
 238                         pDM_Odm->radar_detect_reg_924 = argv[5];
 239                         pDM_Odm->radar_detect_dbg_parm_en = 1;
 240
 241                         PHYDM_SNPRINTF((output+used, out_len-used, "Radar detection with dbg parameter\n"));
 242                         PHYDM_SNPRINTF((output+used, out_len-used, "reg918:0x%08X\n", pDM_Odm->radar_detect_reg_918));
 243                         PHYDM_SNPRINTF((output+used, out_len-used, "reg91c:0x%08X\n", pDM_Odm->radar_detect_reg_91c));
 244                         PHYDM_SNPRINTF((output+used, out_len-used, "reg920:0x%08X\n", pDM_Odm->radar_detect_reg_920));
 245                         PHYDM_SNPRINTF((output+used, out_len-used, "reg924:0x%08X\n", pDM_Odm->radar_detect_reg_924));
 246                 } else {
 247                         pDM_Odm->radar_detect_dbg_parm_en = 0;
 248                         PHYDM_SNPRINTF((output+used, out_len-used, "Radar detection with default parameter\n"));
 249                 }
 250                 phydm_radar_detect_enable(pDM_Odm);
 251                 #endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
 252
 253                 break;
 254         default:
 255                 break;
 256         }
 257 }
 258