drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 \r
  22 #ifndef __HALDMOUTSRC_H__\r
  23 #define __HALDMOUTSRC_H__\r
  24 \r
  25 //============================================================\r
  26 // include files\r
  27 //============================================================\r
  28 #include "phydm_pre_define.h"\r
  29 #include "phydm_dig.h"\r
  30 #include "phydm_edcaturbocheck.h"\r
  31 #include "phydm_pathdiv.h"\r
  32 #include "phydm_antdiv.h"\r
  33 #include "phydm_antdect.h"\r
  34 #include "phydm_dynamicbbpowersaving.h"\r
  35 #include "phydm_rainfo.h"\r
  36 #include "phydm_dynamictxpower.h"\r
  37 #include "phydm_cfotracking.h"\r
  38 #include "phydm_acs.h"\r
  39 #include "phydm_adaptivity.h"\r
  40 #include "phydm_iqk.h"\r
  41 #include "phydm_dfs.h"\r
  42 #include "phydm_ccx.h"\r
  43 #include "txbf/phydm_hal_txbf_api.h"\r
  44 \r
  45 #include "phydm_adc_sampling.h"\r
  46 \r
  47 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
  48 #include "phydm_beamforming.h"\r
  49 #endif\r
  50 \r
  51 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))\r
  52 #include "halphyrf_ap.h"\r
  53 #endif\r
  54 \r
  55 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))\r
  56 #include "phydm_noisemonitor.h"\r
  57 #include "halphyrf_ce.h"\r
  58 #endif\r
  59 \r
  60 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) \r
  61 #include "halphyrf_win.h"\r
  62 #include "phydm_noisemonitor.h"\r
  63 #endif\r
  64 \r
  65 //============================================================\r
  66 // Definition \r
  67 //============================================================\r
  68 //\r
  69 // 2011/09/22 MH Define all team supprt ability.\r
  70 //\r
  71 \r
  72 /* Traffic load decision */\r
  73 #define TRAFFIC_ULTRA_LOW       1\r
  74 #define TRAFFIC_LOW                     2\r
  75 #define TRAFFIC_MID                     3\r
  76 #define TRAFFIC_HIGH                    4\r
  77 \r
  78 #define NONE                    0\r
  79 \r
  80 /*NBI API------------------------------------*/\r
  81 #define NBI_ENABLE 1\r
  82 #define NBI_DISABLE 2\r
  83 \r
  84 #define NBI_TABLE_SIZE_128      27\r
  85 #define NBI_TABLE_SIZE_256      59\r
  86 \r
  87 #define NUM_START_CH_80M        7\r
  88 #define NUM_START_CH_40M        14\r
  89 \r
  90 #define CH_OFFSET_40M           2\r
  91 #define CH_OFFSET_80M           6\r
  92 \r
  93 /*CSI MASK API------------------------------------*/\r
  94 #define CSI_MASK_ENABLE 1\r
  95 #define CSI_MASK_DISABLE 2\r
  96 \r
  97 /*------------------------------------------------*/\r
  98 \r
  99 #define FFT_128_TYPE    1\r
 100 #define FFT_256_TYPE    2\r
 101 \r
 102 #define SET_SUCCESS     1\r
 103 #define SET_ERROR               2\r
 104 #define SET_NO_NEED     3\r
 105 \r
 106 #define FREQ_POSITIVE   1\r
 107 #define FREQ_NEGATIVE   2\r
 108 \r
 109 \r
 110 \r
 111 //============================================================\r
 112 // structure and define\r
 113 //============================================================\r
 114 \r
 115 //\r
 116 // 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.\r
 117 // We need to remove to other position???\r
 118 //\r
 119 #if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
 120 typedef         struct rtl8192cd_priv {\r
 121         u1Byte          temp;\r
 122 \r
 123 }rtl8192cd_priv, *prtl8192cd_priv;\r
 124 #endif\r
 125 \r
 126 \r
 127 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)\r
 128 typedef         struct _ADAPTER{\r
 129         u1Byte          temp;\r
 130         #ifdef AP_BUILD_WORKAROUND\r
 131         HAL_DATA_TYPE*          temp2;\r
 132         prtl8192cd_priv         priv;\r
 133         #endif\r
 134 }ADAPTER, *PADAPTER;\r
 135 #endif\r
 136 \r
 137 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)\r
 138 \r
 139 typedef         struct _WLAN_STA{\r
 140         u1Byte          temp;\r
 141 } WLAN_STA, *PRT_WLAN_STA;\r
 142 \r
 143 #endif\r
 144 \r
 145 typedef struct _Dynamic_Primary_CCA{\r
 146         u1Byte          PriCCA_flag;\r
 147         u1Byte          intf_flag;\r
 148         u1Byte          intf_type;  \r
 149         u1Byte          DupRTS_flag;\r
 150         u1Byte          Monitor_flag;\r
 151         u1Byte          CH_offset;\r
 152         u1Byte          MF_state;\r
 153 }Pri_CCA_T, *pPri_CCA_T;\r
 154 \r
 155 \r
 156 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)\r
 157         #ifdef ADSL_AP_BUILD_WORKAROUND\r
 158         #define MAX_TOLERANCE                   5\r
 159         #define IQK_DELAY_TIME                  1               /*ms*/\r
 160         #endif\r
 161 #endif  /*#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))*/\r
 162 \r
 163 #define         DM_Type_ByFW                    0\r
 164 #define         DM_Type_ByDriver                1\r
 165 \r
 166 //\r
 167 // Declare for common info\r
 168 //\r
 169 \r
 170 #define IQK_THRESHOLD                   8\r
 171 #define DPK_THRESHOLD                   4\r
 172 \r
 173 \r
 174 #if (DM_ODM_SUPPORT_TYPE &  (ODM_AP))\r
 175 __PACK typedef struct _ODM_Phy_Status_Info_\r
 176 {\r
 177         u1Byte          RxPWDBAll;\r
 178         u1Byte          SignalQuality;                                  /* in 0-100 index. */\r
 179         u1Byte          RxMIMOSignalStrength[4];                /* in 0~100 index */\r
 180         s1Byte          RxMIMOSignalQuality[4];         /* EVM */\r
 181         s1Byte          RxSNR[4];                                       /* per-path's SNR */\r
 182 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 183         u1Byte          RxCount:2;                                      /* RX path counter---*/\r
 184         u1Byte          BandWidth:2;\r
 185         u1Byte          rxsc:4;                                         /* sub-channel---*/\r
 186 #else\r
 187         u1Byte          BandWidth;\r
 188 #endif\r
 189 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 190         u1Byte          channel;                                                /* channel number---*/\r
 191         BOOLEAN         bMuPacket;                                      /* is MU packet or not---*/\r
 192         BOOLEAN         bBeamformed;                            /* BF packet---*/\r
 193 #endif\r
 194 } __WLAN_ATTRIB_PACK__ ODM_PHY_INFO_T, *PODM_PHY_INFO_T;\r
 195 \r
 196 typedef struct _ODM_Phy_Status_Info_Append_\r
 197 {\r
 198         u1Byte          MAC_CRC32;      \r
 199 \r
 200 }ODM_PHY_INFO_Append_T,*PODM_PHY_INFO_Append_T;\r
 201 \r
 202 #else\r
 203 \r
 204 typedef struct _ODM_Phy_Status_Info_\r
 205 {\r
 206         //\r
 207         // Be care, if you want to add any element please insert between \r
 208         // RxPWDBAll & SignalStrength.\r
 209         //\r
 210 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN))\r
 211         u4Byte          RxPWDBAll;      \r
 212 #else\r
 213         u1Byte          RxPWDBAll;      \r
 214 #endif\r
 215         u1Byte          SignalQuality;                          /* in 0-100 index. */\r
 216         s1Byte          RxMIMOSignalQuality[4];         /* per-path's EVM */\r
 217         u1Byte          RxMIMOEVMdbm[4];                        /* per-path's EVM dbm */\r
 218         u1Byte          RxMIMOSignalStrength[4];        /* in 0~100 index */\r
 219         s2Byte          Cfo_short[4];                           /* per-path's Cfo_short */\r
 220         s2Byte          Cfo_tail[4];                                    /* per-path's Cfo_tail */\r
 221         s1Byte          RxPower;                                        /* in dBm Translate from PWdB */\r
 222         s1Byte          RecvSignalPower;                        /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */\r
 223         u1Byte          BTRxRSSIPercentage;\r
 224         u1Byte          SignalStrength;                         /* in 0-100 index. */\r
 225         s1Byte          RxPwr[4];                                       /* per-path's pwdb */\r
 226         s1Byte          RxSNR[4];                                       /* per-path's SNR       */\r
 227 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 228         u1Byte          RxCount:2;                                      /* RX path counter---*/\r
 229         u1Byte          BandWidth:2;\r
 230         u1Byte          rxsc:4;                                         /* sub-channel---*/\r
 231 #else\r
 232         u1Byte          BandWidth;\r
 233 #endif\r
 234 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 235         u1Byte          btCoexPwrAdjust;\r
 236 #endif\r
 237 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 238         u1Byte          channel;                                                /* channel number---*/\r
 239         BOOLEAN         bMuPacket;                                      /* is MU packet or not---*/\r
 240         BOOLEAN         bBeamformed;                            /* BF packet---*/\r
 241 #endif\r
 242 }ODM_PHY_INFO_T,*PODM_PHY_INFO_T;\r
 243 #endif\r
 244 \r
 245 typedef struct _ODM_Per_Pkt_Info_\r
 246 {\r
 247         //u1Byte                Rate;   \r
 248         u1Byte          DataRate;\r
 249         u1Byte          StationID;\r
 250         BOOLEAN         bPacketMatchBSSID;\r
 251         BOOLEAN         bPacketToSelf;\r
 252         BOOLEAN         bPacketBeacon;\r
 253         BOOLEAN         bToSelf;\r
 254 }ODM_PACKET_INFO_T,*PODM_PACKET_INFO_T;\r
 255 \r
 256 \r
 257 typedef struct _ODM_Phy_Dbg_Info_\r
 258 {\r
 259         //ODM Write,debug info\r
 260         s1Byte          RxSNRdB[4];\r
 261         u4Byte          NumQryPhyStatus;\r
 262         u4Byte          NumQryPhyStatusCCK;\r
 263         u4Byte          NumQryPhyStatusOFDM;\r
 264 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 265         u4Byte          NumQryMuPkt;\r
 266         u4Byte          NumQryBfPkt;\r
 267         u4Byte          NumQryMuVhtPkt[40];\r
 268         u4Byte          NumQryVhtPkt[40];\r
 269 #endif\r
 270         u1Byte          NumQryBeaconPkt;\r
 271         //Others\r
 272         s4Byte          RxEVM[4];       \r
 273         \r
 274 }ODM_PHY_DBG_INFO_T;\r
 275 \r
 276 \r
 277 typedef struct _ODM_Mac_Status_Info_\r
 278 {\r
 279         u1Byte  test;\r
 280         \r
 281 }ODM_MAC_INFO;\r
 282 \r
 283 //\r
 284 // 2011/20/20 MH For MP driver RT_WLAN_STA =  STA_INFO_T\r
 285 // Please declare below ODM relative info in your STA info structure.\r
 286 //\r
 287 #if 1\r
 288 typedef         struct _ODM_STA_INFO{\r
 289         // Driver Write\r
 290         BOOLEAN         bUsed;                          // record the sta status link or not?\r
 291         //u1Byte                WirelessMode;           // \r
 292         u1Byte          IOTPeer;                        // Enum value.  HT_IOT_PEER_E\r
 293 \r
 294         // ODM Write\r
 295         //1 PHY_STATUS_INFO\r
 296         u1Byte          RSSI_Path[4];           // \r
 297         u1Byte          RSSI_Ave;\r
 298         u1Byte          RXEVM[4];\r
 299         u1Byte          RXSNR[4];\r
 300 \r
 301         // ODM Write\r
 302         //1 TX_INFO (may changed by IC)\r
 303         //TX_INFO_T             pTxInfo;                                // Define in IC folder. Move lower layer.\r
 304 #if 0\r
 305         u1Byte          ANTSEL_A;                       //in Jagar: 4bit; others: 2bit\r
 306         u1Byte          ANTSEL_B;                       //in Jagar: 4bit; others: 2bit\r
 307         u1Byte          ANTSEL_C;                       //only in Jagar: 4bit\r
 308         u1Byte          ANTSEL_D;                       //only in Jagar: 4bit\r
 309         u1Byte          TX_ANTL;                        //not in Jagar: 2bit\r
 310         u1Byte          TX_ANT_HT;                      //not in Jagar: 2bit\r
 311         u1Byte          TX_ANT_CCK;                     //not in Jagar: 2bit\r
 312         u1Byte          TXAGC_A;                        //not in Jagar: 4bit\r
 313         u1Byte          TXAGC_B;                        //not in Jagar: 4bit\r
 314         u1Byte          TXPWR_OFFSET;           //only in Jagar: 3bit\r
 315         u1Byte          TX_ANT;                         //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK\r
 316 #endif\r
 317 \r
 318         //\r
 319         //      Please use compile flag to disabe the strcutrue for other IC except 88E.\r
 320         //      Move To lower layer.\r
 321         //\r
 322         // ODM Write Wilson will handle this part(said by Luke.Lee)\r
 323         //TX_RPT_T              pTxRpt;                         // Define in IC folder. Move lower layer.\r
 324 #if 0   \r
 325         //1 For 88E RA (don't redefine the naming)\r
 326         u1Byte          rate_id;\r
 327         u1Byte          rate_SGI;\r
 328         u1Byte          rssi_sta_ra;\r
 329         u1Byte          SGI_enable;\r
 330         u1Byte          Decision_rate;\r
 331         u1Byte          Pre_rate;\r
 332         u1Byte          Active;\r
 333 \r
 334         // Driver write Wilson handle.\r
 335         //1 TX_RPT (don't redefine the naming)\r
 336         u2Byte          RTY[4];                         // ???\r
 337         u2Byte          TOTAL;                          // ???\r
 338         u2Byte          DROP;                           // ???\r
 339         //\r
 340         // Please use compile flag to disabe the strcutrue for other IC except 88E.\r
 341         //\r
 342 #endif\r
 343 \r
 344 }ODM_STA_INFO_T, *PODM_STA_INFO_T;\r
 345 #endif\r
 346 \r
 347 //\r
 348 // 2011/10/20 MH Define Common info enum for all team.\r
 349 //\r
 350 typedef enum _ODM_Common_Info_Definition\r
 351 {\r
 352 //-------------REMOVED CASE-----------//\r
 353         //ODM_CMNINFO_CCK_HP,\r
 354         //ODM_CMNINFO_RFPATH_ENABLE,            // Define as ODM write???       \r
 355         //ODM_CMNINFO_BT_COEXIST,                               // ODM_BT_COEXIST_E\r
 356         //ODM_CMNINFO_OP_MODE,                          // ODM_OPERATION_MODE_E\r
 357 //-------------REMOVED CASE-----------//\r
 358 \r
 359         //\r
 360         // Fixed value:\r
 361         //\r
 362 \r
 363         //-----------HOOK BEFORE REG INIT-----------//\r
 364         ODM_CMNINFO_PLATFORM = 0,\r
 365         ODM_CMNINFO_ABILITY,                                    // ODM_ABILITY_E\r
 366         ODM_CMNINFO_INTERFACE,                          // ODM_INTERFACE_E\r
 367         ODM_CMNINFO_MP_TEST_CHIP,\r
 368         ODM_CMNINFO_IC_TYPE,                                    // ODM_IC_TYPE_E\r
 369         ODM_CMNINFO_CUT_VER,                                    // ODM_CUT_VERSION_E\r
 370         ODM_CMNINFO_FAB_VER,                                    // ODM_FAB_E\r
 371         ODM_CMNINFO_RF_TYPE,                                    // ODM_RF_PATH_E or ODM_RF_TYPE_E?\r
 372         ODM_CMNINFO_RFE_TYPE, \r
 373         ODM_CMNINFO_BOARD_TYPE,                         // ODM_BOARD_TYPE_E\r
 374         ODM_CMNINFO_PACKAGE_TYPE,\r
 375         ODM_CMNINFO_EXT_LNA,                                    // TRUE\r
 376         ODM_CMNINFO_5G_EXT_LNA, \r
 377         ODM_CMNINFO_EXT_PA,\r
 378         ODM_CMNINFO_5G_EXT_PA,\r
 379         ODM_CMNINFO_GPA,\r
 380         ODM_CMNINFO_APA,\r
 381         ODM_CMNINFO_GLNA,\r
 382         ODM_CMNINFO_ALNA,\r
 383         ODM_CMNINFO_EXT_TRSW,\r
 384         ODM_CMNINFO_EXT_LNA_GAIN,\r
 385         ODM_CMNINFO_PATCH_ID,                           //CUSTOMER ID\r
 386         ODM_CMNINFO_BINHCT_TEST,\r
 387         ODM_CMNINFO_BWIFI_TEST,\r
 388         ODM_CMNINFO_SMART_CONCURRENT,\r
 389         ODM_CMNINFO_CONFIG_BB_RF,\r
 390         ODM_CMNINFO_DOMAIN_CODE_2G,\r
 391         ODM_CMNINFO_DOMAIN_CODE_5G,\r
 392         ODM_CMNINFO_IQKFWOFFLOAD,\r
 393         ODM_CMNINFO_IQKPAOFF,\r
 394         ODM_CMNINFO_HUBUSBMODE,\r
 395         ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS,\r
 396         ODM_CMNINFO_TX_TP,\r
 397         ODM_CMNINFO_RX_TP,\r
 398         ODM_CMNINFO_SOUNDING_SEQ,\r
 399         ODM_CMNINFO_REGRFKFREEENABLE,\r
 400         ODM_CMNINFO_RFKFREEENABLE,\r
 401         ODM_CMNINFO_NORMAL_RX_PATH_CHANGE,\r
 402         /*-----------HOOK BEFORE REG INIT-----------*/\r
 403 \r
 404 \r
 405         //\r
 406         // Dynamic value:\r
 407         //\r
 408 //--------- POINTER REFERENCE-----------//\r
 409         ODM_CMNINFO_MAC_PHY_MODE,                       // ODM_MAC_PHY_MODE_E\r
 410         ODM_CMNINFO_TX_UNI,\r
 411         ODM_CMNINFO_RX_UNI,\r
 412         ODM_CMNINFO_WM_MODE,                            // ODM_WIRELESS_MODE_E\r
 413         ODM_CMNINFO_BAND,                                       // ODM_BAND_TYPE_E\r
 414         ODM_CMNINFO_SEC_CHNL_OFFSET,            // ODM_SEC_CHNL_OFFSET_E\r
 415         ODM_CMNINFO_SEC_MODE,                           // ODM_SECURITY_E\r
 416         ODM_CMNINFO_BW,                                         // ODM_BW_E\r
 417         ODM_CMNINFO_CHNL,\r
 418         ODM_CMNINFO_FORCED_RATE,\r
 419         \r
 420         ODM_CMNINFO_DMSP_GET_VALUE,\r
 421         ODM_CMNINFO_BUDDY_ADAPTOR,\r
 422         ODM_CMNINFO_DMSP_IS_MASTER,\r
 423         ODM_CMNINFO_SCAN,\r
 424         ODM_CMNINFO_POWER_SAVING,\r
 425         ODM_CMNINFO_ONE_PATH_CCA,                       // ODM_CCA_PATH_E\r
 426         ODM_CMNINFO_DRV_STOP,\r
 427         ODM_CMNINFO_PNP_IN,\r
 428         ODM_CMNINFO_INIT_ON,\r
 429         ODM_CMNINFO_ANT_TEST,\r
 430         ODM_CMNINFO_NET_CLOSED,\r
 431         //ODM_CMNINFO_RTSTA_AID,                                // For win driver only?\r
 432         ODM_CMNINFO_FORCED_IGI_LB,\r
 433         ODM_CMNINFO_P2P_LINK,\r
 434         ODM_CMNINFO_FCS_MODE,\r
 435         ODM_CMNINFO_IS1ANTENNA,\r
 436         ODM_CMNINFO_RFDEFAULTPATH,\r
 437         ODM_CMNINFO_DFS_MASTER_ENABLE,\r
 438         ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC,\r
 439 //--------- POINTER REFERENCE-----------//\r
 440 \r
 441 //------------CALL BY VALUE-------------//\r
 442         ODM_CMNINFO_WIFI_DIRECT,\r
 443         ODM_CMNINFO_WIFI_DISPLAY,\r
 444         ODM_CMNINFO_LINK_IN_PROGRESS,                   \r
 445         ODM_CMNINFO_LINK,\r
 446         ODM_CMNINFO_STATION_STATE,\r
 447         ODM_CMNINFO_RSSI_MIN,\r
 448         ODM_CMNINFO_DBG_COMP,                           /* u4SByte*/\r
 449         ODM_CMNINFO_DBG_LEVEL,                          /* u4Byte*/\r
 450         ODM_CMNINFO_RA_THRESHOLD_HIGH,          /* u1Byte*/\r
 451         ODM_CMNINFO_RA_THRESHOLD_LOW,           /* u1Byte*/\r
 452         ODM_CMNINFO_RF_ANTENNA_TYPE,                    /* u1Byte*/\r
 453         ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH,\r
 454         ODM_CMNINFO_BE_FIX_TX_ANT,\r
 455         ODM_CMNINFO_BT_ENABLED,\r
 456         ODM_CMNINFO_BT_HS_CONNECT_PROCESS,\r
 457         ODM_CMNINFO_BT_HS_RSSI,\r
 458         ODM_CMNINFO_BT_OPERATION,\r
 459         ODM_CMNINFO_BT_LIMITED_DIG,                                     //Need to Limited Dig or not\r
 460         ODM_CMNINFO_BT_DIG,\r
 461         ODM_CMNINFO_BT_BUSY,                                    //Check Bt is using or not//neil        \r
 462         ODM_CMNINFO_BT_DISABLE_EDCA,\r
 463 #if(DM_ODM_SUPPORT_TYPE & ODM_AP)               // for repeater mode add by YuChen 2014.06.23\r
 464 #ifdef UNIVERSAL_REPEATER\r
 465         ODM_CMNINFO_VXD_LINK,\r
 466 #endif\r
 467 #endif\r
 468         ODM_CMNINFO_AP_TOTAL_NUM,\r
 469         ODM_CMNINFO_POWER_TRAINING,\r
 470         ODM_CMNINFO_DFS_REGION_DOMAIN,\r
 471 //------------CALL BY VALUE-------------//\r
 472 \r
 473         //\r
 474         // Dynamic ptr array hook itms.\r
 475         //\r
 476         ODM_CMNINFO_STA_STATUS,\r
 477         ODM_CMNINFO_PHY_STATUS,\r
 478         ODM_CMNINFO_MAC_STATUS,\r
 479         \r
 480         ODM_CMNINFO_MAX,\r
 481 \r
 482 \r
 483 }ODM_CMNINFO_E;\r
 484 \r
 485 typedef enum _PHYDM_API_Definition {\r
 486 \r
 487         PHYDM_API_NBI                   = 1,\r
 488         PHYDM_API_CSI_MASK,\r
 489 \r
 490         \r
 491 } PHYDM_API_E;\r
 492 \r
 493 \r
 494 //\r
 495 // 2011/10/20 MH Define ODM support ability.  ODM_CMNINFO_ABILITY\r
 496 //\r
 497 typedef enum _ODM_Support_Ability_Definition\r
 498 {\r
 499         //\r
 500         // BB ODM section BIT 0-19\r
 501         //\r
 502         ODM_BB_DIG                                      = BIT0,\r
 503         ODM_BB_RA_MASK                          = BIT1,\r
 504         ODM_BB_DYNAMIC_TXPWR            = BIT2,\r
 505         ODM_BB_FA_CNT                                   = BIT3,\r
 506         ODM_BB_RSSI_MONITOR                     = BIT4,\r
 507         ODM_BB_CCK_PD                                   = BIT5,\r
 508         ODM_BB_ANT_DIV                          = BIT6,\r
 509         ODM_BB_PWR_TRAIN                                = BIT8,\r
 510         ODM_BB_RATE_ADAPTIVE                    = BIT9,\r
 511         ODM_BB_PATH_DIV                         = BIT10,\r
 512         ODM_BB_ADAPTIVITY                               = BIT13,\r
 513         ODM_BB_CFO_TRACKING                     = BIT14,\r
 514         ODM_BB_NHM_CNT                          = BIT15,\r
 515         ODM_BB_PRIMARY_CCA                      = BIT16,\r
 516         ODM_BB_TXBF                                     = BIT17,\r
 517         ODM_BB_DYNAMIC_ARFR                     = BIT18,\r
 518         \r
 519         //\r
 520         // MAC DM section BIT 20-23\r
 521         //\r
 522         ODM_MAC_EDCA_TURBO                      = BIT20,\r
 523         ODM_MAC_EARLY_MODE                      = BIT21,\r
 524         \r
 525         //\r
 526         // RF ODM section BIT 24-31\r
 527         //\r
 528         ODM_RF_TX_PWR_TRACK                     = BIT24,\r
 529         ODM_RF_RX_GAIN_TRACK                    = BIT25,\r
 530         ODM_RF_CALIBRATION                      = BIT26,\r
 531         \r
 532 }ODM_ABILITY_E;\r
 533 \r
 534 \r
 535 // ODM_CMNINFO_ONE_PATH_CCA\r
 536 typedef enum tag_CCA_Path\r
 537 {\r
 538         ODM_CCA_2R              = 0,\r
 539         ODM_CCA_1R_A            = 1,\r
 540         ODM_CCA_1R_B            = 2,\r
 541 }ODM_CCA_PATH_E;\r
 542 \r
 543 typedef enum CCA_PATHDIV_EN {\r
 544         CCA_PATHDIV_DISABLE             = 0,\r
 545         CCA_PATHDIV_ENABLE              = 1,\r
 546 \r
 547 } CCA_PATHDIV_EN_E;\r
 548 \r
 549 \r
 550 typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{\r
 551         PHY_REG_PG_RELATIVE_VALUE = 0,\r
 552         PHY_REG_PG_EXACT_VALUE = 1\r
 553 } PHY_REG_PG_TYPE;\r
 554 \r
 555 //\r
 556 // 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration.\r
 557 //\r
 558 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
 559 #if (RT_PLATFORM != PLATFORM_LINUX)\r
 560 typedef \r
 561 #endif\r
 562         \r
 563 struct DM_Out_Source_Dynamic_Mechanism_Structure\r
 564 #else// for AP,ADSL,CE Team\r
 565 typedef  struct DM_Out_Source_Dynamic_Mechanism_Structure\r
 566 #endif\r
 567 {\r
 568         //      Add for different team use temporarily\r
 569         //\r
 570         PADAPTER                Adapter;                // For CE/NIC team\r
 571         prtl8192cd_priv priv;                   // For AP/ADSL team\r
 572         // WHen you use Adapter or priv pointer, you must make sure the pointer is ready.\r
 573         BOOLEAN                 odm_ready;\r
 574 \r
 575 #if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
 576         rtl8192cd_priv          fake_priv;\r
 577 #endif\r
 578 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)\r
 579         // ADSL_AP_BUILD_WORKAROUND\r
 580         ADAPTER                 fake_adapter;\r
 581 #endif\r
 582         \r
 583         PHY_REG_PG_TYPE         PhyRegPgValueType;\r
 584         u1Byte                          PhyRegPgVersion;\r
 585 \r
 586         u4Byte                  DebugComponents;\r
 587         u4Byte                  DebugLevel;\r
 588         \r
 589         u4Byte                  NumQryPhyStatusAll;     //CCK + OFDM\r
 590         u4Byte                  LastNumQryPhyStatusAll; \r
 591         u4Byte                  RxPWDBAve;\r
 592         BOOLEAN                 MPDIG_2G;               //off MPDIG\r
 593         u1Byte                  Times_2G;\r
 594         BOOLEAN                 bInitHwInfoByRfe;\r
 595         \r
 596 //------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//\r
 597         BOOLEAN                 bCckHighPower; \r
 598         u1Byte                  RFPathRxEnable;         // ODM_CMNINFO_RFPATH_ENABLE\r
 599         u1Byte                  ControlChannel;\r
 600 //------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//\r
 601 \r
 602 //--------REMOVED COMMON INFO----------//\r
 603         //u1Byte                                PseudoMacPhyMode;\r
 604         //BOOLEAN                       *BTCoexist;\r
 605         //BOOLEAN                       PseudoBtCoexist;\r
 606         //u1Byte                                OPMode;\r
 607         //BOOLEAN                       bAPMode;\r
 608         //BOOLEAN                       bClientMode;\r
 609         //BOOLEAN                       bAdHocMode;\r
 610         //BOOLEAN                       bSlaveOfDMSP;\r
 611 //--------REMOVED COMMON INFO----------//\r
 612 \r
 613 \r
 614 //1  COMMON INFORMATION\r
 615 \r
 616         //\r
 617         // Init Value\r
 618         //\r
 619 //-----------HOOK BEFORE REG INIT-----------//  \r
 620         // ODM Platform info AP/ADSL/CE/MP = 1/2/3/4\r
 621         u1Byte                  SupportPlatform;                \r
 622         // ODM Platform info WIN/AP/CE = 1/2/3\r
 623         u1Byte                  Normalrxpath;\r
 624         // ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K\r
 625         u4Byte                  SupportAbility;\r
 626         // ODM PCIE/USB/SDIO = 1/2/3\r
 627         u1Byte                  SupportInterface;                       \r
 628         // ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/...\r
 629         u4Byte                  SupportICType;  \r
 630         // Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/...\r
 631         u1Byte                  CutVersion;\r
 632         // Fab Version TSMC/UMC = 0/1\r
 633         u1Byte                  FabVersion;\r
 634         // RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/...\r
 635         u1Byte                  RFType;\r
 636         u1Byte                  RFEType;        \r
 637         // Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/...\r
 638         u1Byte                  BoardType;\r
 639         u1Byte                  PackageType;\r
 640         u2Byte                  TypeGLNA;\r
 641         u2Byte                  TypeGPA;\r
 642         u2Byte                  TypeALNA;\r
 643         u2Byte                  TypeAPA;\r
 644         // with external LNA  NO/Yes = 0/1\r
 645         u1Byte                  ExtLNA; // 2G\r
 646         u1Byte                  ExtLNA5G; //5G\r
 647         // with external PA  NO/Yes = 0/1\r
 648         u1Byte                  ExtPA; // 2G\r
 649         u1Byte                  ExtPA5G; //5G\r
 650         // with external TRSW  NO/Yes = 0/1\r
 651         u1Byte                  ExtTRSW;\r
 652         u1Byte                  ExtLNAGain; // 2G\r
 653         u1Byte                  PatchID; //Customer ID\r
 654         BOOLEAN                 bInHctTest;\r
 655         u1Byte                  WIFITest;\r
 656 \r
 657         BOOLEAN                 bDualMacSmartConcurrent;\r
 658         u4Byte                  BK_SupportAbility;\r
 659         u1Byte                  AntDivType;\r
 660         u1Byte                  with_extenal_ant_switch;\r
 661         BOOLEAN                 ConfigBBRF;\r
 662         u1Byte                  odm_Regulation2_4G;\r
 663         u1Byte                  odm_Regulation5G;\r
 664         u1Byte                  IQKFWOffload;\r
 665         BOOLEAN                 cck_new_agc;\r
 666 //-----------HOOK BEFORE REG INIT-----------//  \r
 667 \r
 668         //\r
 669         // Dynamic Value\r
 670         //      \r
 671 //--------- POINTER REFERENCE-----------//\r
 672 \r
 673         u1Byte                  u1Byte_temp;\r
 674         BOOLEAN                 BOOLEAN_temp;\r
 675         PADAPTER                PADAPTER_temp;\r
 676         \r
 677         // MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2\r
 678         u1Byte                  *pMacPhyMode;\r
 679         //TX Unicast byte count\r
 680         u8Byte                  *pNumTxBytesUnicast;\r
 681         //RX Unicast byte count\r
 682         u8Byte                  *pNumRxBytesUnicast;\r
 683         // Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3\r
 684         u1Byte                  *pWirelessMode; //ODM_WIRELESS_MODE_E\r
 685         // Frequence band 2.4G/5G = 0/1\r
 686         u1Byte                  *pBandType;\r
 687         // Secondary channel offset don't_care/below/above = 0/1/2\r
 688         u1Byte                  *pSecChOffset;\r
 689         // Security mode Open/WEP/AES/TKIP = 0/1/2/3\r
 690         u1Byte                  *pSecurity;\r
 691         // BW info 20M/40M/80M = 0/1/2\r
 692         u1Byte                  *pBandWidth;\r
 693         // Central channel location Ch1/Ch2/....\r
 694         u1Byte                  *pChannel;      //central channel number\r
 695         BOOLEAN                 DPK_Done;\r
 696         // Common info for 92D DMSP\r
 697         \r
 698         BOOLEAN                 *pbGetValueFromOtherMac;\r
 699         PADAPTER                *pBuddyAdapter;\r
 700         BOOLEAN                 *pbMasterOfDMSP; //MAC0: master, MAC1: slave\r
 701         // Common info for Status\r
 702         BOOLEAN                 *pbScanInProcess;\r
 703         BOOLEAN                 *pbPowerSaving;\r
 704         // CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E.\r
 705         u1Byte                  *pOnePathCCA;\r
 706         //pMgntInfo->AntennaTest\r
 707         u1Byte                  *pAntennaTest;\r
 708         BOOLEAN                 *pbNet_closed;\r
 709         //u1Byte                        *pAidMap;\r
 710         u1Byte                  *pu1ForcedIgiLb;\r
 711         BOOLEAN                 *pIsFcsModeEnable;\r
 712 /*--------- For 8723B IQK-----------*/\r
 713         BOOLEAN                 *pIs1Antenna;\r
 714         u1Byte                  *pRFDefaultPath;\r
 715         // 0:S1, 1:S0\r
 716         \r
 717 //--------- POINTER REFERENCE-----------//\r
 718         pu2Byte                 pForcedDataRate;\r
 719         pu1Byte                 HubUsbMode;\r
 720         BOOLEAN                 *pbFwDwRsvdPageInProgress;\r
 721         u4Byte                  *pCurrentTxTP;\r
 722         u4Byte                  *pCurrentRxTP;\r
 723         u1Byte                  *pSoundingSeq;\r
 724 //------------CALL BY VALUE-------------//\r
 725         BOOLEAN                 bLinkInProcess;\r
 726         BOOLEAN                 bWIFI_Direct;\r
 727         BOOLEAN                 bWIFI_Display;\r
 728         BOOLEAN                 bLinked;\r
 729         BOOLEAN                 bsta_state;\r
 730 #if(DM_ODM_SUPPORT_TYPE & ODM_AP)               // for repeater mode add by YuChen 2014.06.23\r
 731 #ifdef UNIVERSAL_REPEATER\r
 732         BOOLEAN                 VXD_bLinked;\r
 733 #endif\r
 734 #endif                                                                  // for repeater mode add by YuChen 2014.06.23   \r
 735         u1Byte                  RSSI_Min;       \r
 736         u1Byte                  InterfaceIndex; /*Add for 92D  dual MAC: 0--Mac0 1--Mac1*/\r
 737         BOOLEAN                 bIsMPChip;\r
 738         BOOLEAN                 bOneEntryOnly;\r
 739         BOOLEAN                 mp_mode;\r
 740         u4Byte                  OneEntry_MACID;\r
 741         u1Byte                  pre_number_linked_client;       \r
 742         u1Byte                  number_linked_client;\r
 743         u1Byte                  pre_number_active_client;       \r
 744         u1Byte                  number_active_client;\r
 745         // Common info for BTDM\r
 746         BOOLEAN                 bBtEnabled;                     // BT is enabled\r
 747         BOOLEAN                 bBtConnectProcess;      // BT HS is under connection progress.\r
 748         u1Byte                  btHsRssi;                               // BT HS mode wifi rssi value.\r
 749         BOOLEAN                 bBtHsOperation;         // BT HS mode is under progress\r
 750         u1Byte                  btHsDigVal;                     // use BT rssi to decide the DIG value\r
 751         BOOLEAN                 bBtDisableEdcaTurbo;    // Under some condition, don't enable the EDCA Turbo\r
 752         BOOLEAN                 bBtBusy;                        // BT is busy.\r
 753         BOOLEAN                 bBtLimitedDig;                  // BT is busy.\r
 754         BOOLEAN                 bDisablePhyApi;\r
 755 //------------CALL BY VALUE-------------//\r
 756         u1Byte                  RSSI_A;\r
 757         u1Byte                  RSSI_B;\r
 758         u1Byte                  RSSI_C;\r
 759         u1Byte                  RSSI_D;\r
 760         u8Byte                  RSSI_TRSW;      \r
 761         u8Byte                  RSSI_TRSW_H;\r
 762         u8Byte                  RSSI_TRSW_L;    \r
 763         u8Byte                  RSSI_TRSW_iso;\r
 764         u1Byte                  TXAntStatus;\r
 765         u1Byte                  RXAntStatus;\r
 766         u1Byte                  cck_lna_idx;\r
 767         u1Byte                  cck_vga_idx;\r
 768         u1Byte                  curr_station_id;\r
 769         u1Byte                  ofdm_agc_idx[4];\r
 770 \r
 771         u1Byte                  RxRate;\r
 772         BOOLEAN                 bNoisyState;\r
 773         u1Byte                  TxRate;\r
 774         u1Byte                  LinkedInterval;\r
 775         u1Byte                  preChannel;\r
 776         u4Byte                  TxagcOffsetValueA;\r
 777         BOOLEAN                 IsTxagcOffsetPositiveA;\r
 778         u4Byte                  TxagcOffsetValueB;\r
 779         BOOLEAN                 IsTxagcOffsetPositiveB;\r
 780         u4Byte                  tx_tp;\r
 781         u4Byte                  rx_tp;\r
 782         u4Byte                  total_tp;\r
 783         u8Byte                  curTxOkCnt;\r
 784         u8Byte                  curRxOkCnt;     \r
 785         u8Byte                  lastTxOkCnt;\r
 786         u8Byte                  lastRxOkCnt;\r
 787         u4Byte                  BbSwingOffsetA;\r
 788         BOOLEAN                 IsBbSwingOffsetPositiveA;\r
 789         u4Byte                  BbSwingOffsetB;\r
 790         BOOLEAN                 IsBbSwingOffsetPositiveB;\r
 791         u1Byte                  IGI_LowerBound;\r
 792         u1Byte                  IGI_UpperBound;\r
 793         u1Byte                  antdiv_rssi;\r
 794         u1Byte                  fat_comb_a;\r
 795         u1Byte                  fat_comb_b;\r
 796         u1Byte                  antdiv_intvl;\r
 797         u1Byte                  AntType;\r
 798         u1Byte                  pre_AntType;\r
 799         u1Byte                  antdiv_period;\r
 800         u1Byte                  evm_antdiv_period;\r
 801         u1Byte                  antdiv_select;\r
 802         u1Byte                  path_select;    \r
 803         u1Byte                  antdiv_evm_en;\r
 804         u1Byte                  bdc_holdstate;\r
 805         u1Byte                  NdpaPeriod;\r
 806         BOOLEAN                 H2C_RARpt_connect;\r
 807         BOOLEAN                 cck_agc_report_type;\r
 808         \r
 809         u1Byte                  dm_dig_max_TH;\r
 810         u1Byte                  dm_dig_min_TH;\r
 811         u1Byte                  print_agc;\r
 812         u1Byte                  TrafficLoad;\r
 813         u1Byte                  pre_TrafficLoad;\r
 814 \r
 815 \r
 816         //For Adaptivtiy\r
 817         u2Byte                  NHM_cnt_0;\r
 818         u2Byte                  NHM_cnt_1;\r
 819         s1Byte                  TH_L2H_default;\r
 820         s1Byte                  TH_EDCCA_HL_diff_default;\r
 821         s1Byte                  TH_L2H_ini;\r
 822         s1Byte                  TH_EDCCA_HL_diff;\r
 823         s1Byte                  TH_L2H_ini_mode2;\r
 824         s1Byte                  TH_EDCCA_HL_diff_mode2;\r
 825         BOOLEAN                 Carrier_Sense_enable;\r
 826         u1Byte                  Adaptivity_IGI_upper;\r
 827         BOOLEAN                 adaptivity_flag;\r
 828         u1Byte                  DCbackoff;\r
 829         BOOLEAN                 Adaptivity_enable;\r
 830         u1Byte                  APTotalNum;\r
 831         BOOLEAN                 EDCCA_enable;\r
 832         ADAPTIVITY_STATISTICS   Adaptivity;\r
 833         //For Adaptivtiy\r
 834         u1Byte                  LastUSBHub;\r
 835         u1Byte                  TxBfDataRate;\r
 836 \r
 837         u1Byte                  nbi_set_result;\r
 838         \r
 839         u1Byte                  c2h_cmd_start;\r
 840         u1Byte                  fw_debug_trace[60]; \r
 841         u1Byte                  pre_c2h_seq;\r
 842         BOOLEAN                 fw_buff_is_enpty;\r
 843         u4Byte                  data_frame_num;\r
 844 \r
 845         /*for noise detection*/\r
 846         BOOLEAN                 NoisyDecision; /*b_noisy*/\r
 847         BOOLEAN                 pre_b_noisy;    \r
 848         u4Byte                  NoisyDecision_Smooth;\r
 849 \r
 850 #if (DM_ODM_SUPPORT_TYPE &  (ODM_CE|ODM_WIN))\r
 851         ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM];\r
 852 #endif\r
 853         //\r
 854         //2 Define STA info.\r
 855         // _ODM_STA_INFO\r
 856         // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.??\r
 857         PSTA_INFO_T             pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM];\r
 858         u2Byte                  platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];            /* platform_macid_table[platform_macid] = phydm_macid */\r
 859 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)\r
 860         s4Byte                  AccumulatePWDB[ODM_ASSOCIATE_ENTRY_NUM];\r
 861 #endif\r
 862 \r
 863 #if (RATE_ADAPTIVE_SUPPORT == 1)\r
 864         u2Byte                  CurrminRptTime;\r
 865         ODM_RA_INFO_T   RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; //Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119\r
 866 #endif\r
 867         //\r
 868         // 2012/02/14 MH Add to share 88E ra with other SW team.\r
 869         // We need to colelct all support abilit to a proper area.\r
 870         //\r
 871         BOOLEAN                         RaSupport88E;\r
 872 \r
 873         // Define ...........\r
 874 \r
 875         // Latest packet phy info (ODM write)\r
 876         ODM_PHY_DBG_INFO_T       PhyDbgInfo;\r
 877         //PHY_INFO_88E          PhyInfo;\r
 878 \r
 879         // Latest packet phy info (ODM write)\r
 880         ODM_MAC_INFO            *pMacInfo;\r
 881         //MAC_INFO_88E          MacInfo;\r
 882 \r
 883         // Different Team independt structure??\r
 884 \r
 885         //\r
 886         //TX_RTP_CMN            TX_retrpo;\r
 887         //TX_RTP_88E            TX_retrpo;\r
 888         //TX_RTP_8195           TX_retrpo;\r
 889 \r
 890         //\r
 891         //ODM Structure\r
 892         //\r
 893 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
 894         #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))\r
 895         BDC_T                                   DM_BdcTable;\r
 896         #endif\r
 897         \r
 898         #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1\r
 899         SAT_T                                           dm_sat_table;\r
 900         #endif\r
 901         \r
 902 #endif\r
 903         FAT_T                                           DM_FatTable;\r
 904         DIG_T                                           DM_DigTable;\r
 905 \r
 906         PS_T                                            DM_PSTable;\r
 907         Pri_CCA_T                                       DM_PriCCA;\r
 908         RA_T                                            DM_RA_Table;  \r
 909         FALSE_ALARM_STATISTICS          FalseAlmCnt;\r
 910         FALSE_ALARM_STATISTICS          FlaseAlmCntBuddyAdapter;\r
 911         SWAT_T                                          DM_SWAT_Table;\r
 912         CFO_TRACKING                                    DM_CfoTrack;\r
 913         ACS                                                     DM_ACS;\r
 914         CCX_INFO                                        DM_CCX_INFO;\r
 915 #if (PHYDM_LA_MODE_SUPPORT == 1)\r
 916         RT_ADCSMP                                       adcsmp;\r
 917 #endif\r
 918 \r
 919 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)\r
 920         IQK_INFO        IQK_info;\r
 921 #endif\r
 922 \r
 923 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
 924         //Path Div Struct\r
 925         PATHDIV_PARA    pathIQK;\r
 926 #endif\r
 927 #if(defined(CONFIG_PATH_DIVERSITY))\r
 928         PATHDIV_T       DM_PathDiv;\r
 929 #endif  \r
 930 \r
 931         EDCA_T          DM_EDCA_Table;\r
 932         u4Byte          WMMEDCA_BE;\r
 933 \r
 934         // Copy from SD4 structure\r
 935         //\r
 936         // ==================================================\r
 937         //\r
 938 \r
 939         //common\r
 940         //u1Byte                DM_Type;        \r
 941         //u1Byte    PSD_Report_RXHP[80];   // Add By Gary\r
 942         //u1Byte    PSD_func_flag;               // Add By Gary\r
 943         //for DIG\r
 944         //u1Byte                bDMInitialGainEnable;\r
 945         //u1Byte                binitialized; // for dm_initial_gain_Multi_STA use.\r
 946 \r
 947         BOOLEAN                 *pbDriverStopped;\r
 948         BOOLEAN                 *pbDriverIsGoingToPnpSetPowerSleep;\r
 949         BOOLEAN                 *pinit_adpt_in_progress;\r
 950 \r
 951         //PSD\r
 952         BOOLEAN                 bUserAssignLevel;\r
 953         u1Byte                  RSSI_BT;                                /*come from BT*/\r
 954         BOOLEAN                 bPSDinProcess;\r
 955         BOOLEAN                 bPSDactive;\r
 956         BOOLEAN                 bDMInitialGainEnable;\r
 957 \r
 958         //MPT DIG\r
 959         RT_TIMER                MPT_DIGTimer;\r
 960         \r
 961         //for rate adaptive, in fact,  88c/92c fw will handle this\r
 962         u1Byte                  bUseRAMask;\r
 963 \r
 964         ODM_RATE_ADAPTIVE       RateAdaptive;\r
 965         #if (defined(CONFIG_ANT_DETECTION))\r
 966         ANT_DETECTED_INFO       AntDetectedInfo;        /* Antenna detected information for RSSI tool*/\r
 967         #endif\r
 968         ODM_RF_CAL_T    RFCalibrateInfo;\r
 969         u4Byte                  nIQK_Cnt;\r
 970         u4Byte                  nIQK_OK_Cnt;\r
 971         u4Byte                  nIQK_Fail_Cnt;\r
 972 \r
 973 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))   \r
 974         //\r
 975         // Power Training\r
 976         //\r
 977         u1Byte                  ForcePowerTrainingState;\r
 978         BOOLEAN                 bChangeState;\r
 979         u4Byte                  PT_score;\r
 980         u8Byte                  OFDM_RX_Cnt;\r
 981         u8Byte                  CCK_RX_Cnt;\r
 982 #endif\r
 983         BOOLEAN                 bDisablePowerTraining;\r
 984         u1Byte                  DynamicTxHighPowerLvl;\r
 985         u1Byte                  LastDTPLvl;\r
 986         u4Byte                  tx_agc_ofdm_18_6;\r
 987         u1Byte                  rx_pkt_type;\r
 988 \r
 989         //\r
 990         // ODM system resource.\r
 991         //\r
 992 \r
 993         // ODM relative time.\r
 994         RT_TIMER        PathDivSwitchTimer;\r
 995         //2011.09.27 add for Path Diversity\r
 996         RT_TIMER        CCKPathDiversityTimer;\r
 997         RT_TIMER        FastAntTrainingTimer;\r
 998         #ifdef ODM_EVM_ENHANCE_ANTDIV\r
 999         RT_TIMER                        EVM_FastAntTrainingTimer;\r
1000         #endif\r
1001         RT_TIMER                sbdcnt_timer;\r
1002 \r
1003         // ODM relative workitem.\r
1004 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1005 #if USE_WORKITEM\r
1006         RT_WORK_ITEM                    PathDivSwitchWorkitem;\r
1007         RT_WORK_ITEM                    CCKPathDiversityWorkitem;\r
1008         RT_WORK_ITEM                    FastAntTrainingWorkitem;\r
1009         RT_WORK_ITEM                    MPT_DIGWorkitem;\r
1010         RT_WORK_ITEM                    RaRptWorkitem;\r
1011         RT_WORK_ITEM                    sbdcnt_workitem;\r
1012 #endif\r
1013 #endif\r
1014 \r
1015 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))\r
1016 #if (BEAMFORMING_SUPPORT == 1)\r
1017         RT_BEAMFORMING_INFO BeamformingInfo;\r
1018 #endif \r
1019 #endif\r
1020 \r
1021 #ifdef CONFIG_PHYDM_DFS_MASTER\r
1022         u1Byte DFS_RegionDomain;\r
1023         pu1Byte dfs_master_enabled;\r
1024 \r
1025         /*====== phydm_radar_detect_with_dbg_parm start ======*/\r
1026         u1Byte radar_detect_dbg_parm_en;\r
1027         u4Byte radar_detect_reg_918;\r
1028         u4Byte radar_detect_reg_91c;\r
1029         u4Byte radar_detect_reg_920;\r
1030         u4Byte radar_detect_reg_924;\r
1031         /*====== phydm_radar_detect_with_dbg_parm end ======*/\r
1032 #endif\r
1033 \r
1034 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
1035         \r
1036 #if (RT_PLATFORM != PLATFORM_LINUX)\r
1037 } DM_ODM_T, *PDM_ODM_T;         // DM_Dynamic_Mechanism_Structure\r
1038 #else\r
1039 };\r
1040 #endif  \r
1041 \r
1042 #else// for AP,ADSL,CE Team\r
1043 } DM_ODM_T, *PDM_ODM_T;         // DM_Dynamic_Mechanism_Structure\r
1044 #endif\r
1045 \r
1046 \r
1047 typedef enum _PHYDM_STRUCTURE_TYPE{\r
1048         PHYDM_FALSEALMCNT,\r
1049         PHYDM_CFOTRACK,\r
1050         PHYDM_ADAPTIVITY,\r
1051         PHYDM_ROMINFO,\r
1052         \r
1053 }PHYDM_STRUCTURE_TYPE;\r
1054 \r
1055 \r
1056 \r
1057  typedef enum _ODM_RF_CONTENT{\r
1058         odm_radioa_txt = 0x1000,\r
1059         odm_radiob_txt = 0x1001,\r
1060         odm_radioc_txt = 0x1002,\r
1061         odm_radiod_txt = 0x1003\r
1062 } ODM_RF_CONTENT;\r
1063 \r
1064 typedef enum _ODM_BB_Config_Type{\r
1065         CONFIG_BB_PHY_REG,   \r
1066         CONFIG_BB_AGC_TAB,   \r
1067         CONFIG_BB_AGC_TAB_2G,\r
1068         CONFIG_BB_AGC_TAB_5G, \r
1069         CONFIG_BB_PHY_REG_PG,\r
1070         CONFIG_BB_PHY_REG_MP,\r
1071         CONFIG_BB_AGC_TAB_DIFF,\r
1072 } ODM_BB_Config_Type, *PODM_BB_Config_Type;\r
1073 \r
1074 typedef enum _ODM_RF_Config_Type{ \r
1075         CONFIG_RF_RADIO,\r
1076     CONFIG_RF_TXPWR_LMT,\r
1077 } ODM_RF_Config_Type, *PODM_RF_Config_Type;\r
1078 \r
1079 typedef enum _ODM_FW_Config_Type{\r
1080     CONFIG_FW_NIC,\r
1081     CONFIG_FW_NIC_2,\r
1082     CONFIG_FW_AP,\r
1083     CONFIG_FW_AP_2,\r
1084     CONFIG_FW_MP,\r
1085     CONFIG_FW_WoWLAN,\r
1086     CONFIG_FW_WoWLAN_2,\r
1087     CONFIG_FW_AP_WoWLAN,\r
1088     CONFIG_FW_BT,\r
1089 } ODM_FW_Config_Type;\r
1090 \r
1091 // Status code\r
1092 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)\r
1093 typedef enum _RT_STATUS{\r
1094         RT_STATUS_SUCCESS,\r
1095         RT_STATUS_FAILURE,\r
1096         RT_STATUS_PENDING,\r
1097         RT_STATUS_RESOURCE,\r
1098         RT_STATUS_INVALID_CONTEXT,\r
1099         RT_STATUS_INVALID_PARAMETER,\r
1100         RT_STATUS_NOT_SUPPORT,\r
1101         RT_STATUS_OS_API_FAILED,\r
1102 }RT_STATUS,*PRT_STATUS;\r
1103 #endif // end of RT_STATUS definition\r
1104 \r
1105 #ifdef REMOVE_PACK\r
1106 #pragma pack()\r
1107 #endif\r
1108 \r
1109 //3===========================================================\r
1110 //3 AGC RX High Power Mode\r
1111 //3===========================================================\r
1112 #define          LNA_Low_Gain_1                      0x64\r
1113 #define          LNA_Low_Gain_2                      0x5A\r
1114 #define          LNA_Low_Gain_3                      0x58\r
1115 \r
1116 #define          FA_RXHP_TH1                           5000\r
1117 #define          FA_RXHP_TH2                           1500\r
1118 #define          FA_RXHP_TH3                             800\r
1119 #define          FA_RXHP_TH4                             600\r
1120 #define          FA_RXHP_TH5                             500\r
1121 \r
1122 typedef enum tag_1R_CCA_Type_Definition\r
1123 {\r
1124         CCA_1R =0,\r
1125         CCA_2R = 1,\r
1126         CCA_MAX = 2,\r
1127 }DM_1R_CCA_E;\r
1128 \r
1129 typedef enum tag_RF_Type_Definition\r
1130 {\r
1131         RF_Save =0,\r
1132         RF_Normal = 1,\r
1133         RF_MAX = 2,\r
1134 }DM_RF_E;\r
1135 \r
1136 //\r
1137 // check Sta pointer valid or not\r
1138 //\r
1139 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))\r
1140 #define IS_STA_VALID(pSta)              (pSta && pSta->expire_to)\r
1141 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
1142 #define IS_STA_VALID(pSta)              (pSta && pSta->bUsed)\r
1143 #else\r
1144 #define IS_STA_VALID(pSta)              (pSta)\r
1145 #endif\r
1146 \r
1147 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP))\r
1148 \r
1149 BOOLEAN\r
1150 ODM_CheckPowerStatus(\r
1151         IN      PADAPTER                Adapter\r
1152         );\r
1153 \r
1154 #endif\r
1155 \r
1156 \r
1157 \r
1158 u4Byte odm_ConvertTo_dB(u4Byte Value);\r
1159 \r
1160 u4Byte odm_ConvertTo_linear(u4Byte Value);\r
1161 \r
1162 #if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE))\r
1163 \r
1164 u4Byte\r
1165 GetPSDData(\r
1166         PDM_ODM_T       pDM_Odm,\r
1167         unsigned int    point,\r
1168         u1Byte initial_gain_psd);\r
1169 \r
1170 #endif\r
1171 \r
1172 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)     \r
1173 VOID\r
1174 ODM_DMWatchdog_LPS(\r
1175         IN              PDM_ODM_T               pDM_Odm\r
1176 );\r
1177 #endif\r
1178 \r
1179 \r
1180 s4Byte\r
1181 ODM_PWdB_Conversion(\r
1182     IN  s4Byte X,\r
1183     IN  u4Byte TotalBit,\r
1184     IN  u4Byte DecimalBit\r
1185     );\r
1186 \r
1187 s4Byte\r
1188 ODM_SignConversion(\r
1189     IN  s4Byte value,\r
1190     IN  u4Byte TotalBit\r
1191     );\r
1192 \r
1193 void\r
1194 phydm_seq_sorting( \r
1195         IN              PVOID   pDM_VOID,\r
1196         IN OUT  u4Byte  *p_value,\r
1197         IN OUT  u4Byte  *rank_idx,      \r
1198         IN OUT  u4Byte  *p_idx_out,     \r
1199         IN              u1Byte  seq_length\r
1200 );\r
1201 \r
1202 VOID \r
1203 ODM_DMInit(\r
1204  IN     PDM_ODM_T       pDM_Odm\r
1205 );\r
1206 \r
1207 VOID\r
1208 ODM_DMReset(\r
1209         IN      PDM_ODM_T       pDM_Odm\r
1210         );\r
1211 \r
1212 VOID\r
1213 phydm_support_ability_debug(\r
1214         IN              PVOID           pDM_VOID,\r
1215         IN              u4Byte          *const dm_value,\r
1216         IN              u4Byte                  *_used,\r
1217         OUT             char                            *output,\r
1218         IN              u4Byte                  *_out_len\r
1219         );\r
1220 \r
1221 VOID\r
1222 phydm_config_trx_path(\r
1223         IN              PVOID           pDM_VOID,\r
1224         IN              u4Byte          *const dm_value,\r
1225         IN              u4Byte                  *_used,\r
1226         OUT             char                    *output,\r
1227         IN              u4Byte                  *_out_len\r
1228         );\r
1229 \r
1230 VOID\r
1231 ODM_DMWatchdog(\r
1232         IN              PDM_ODM_T                       pDM_Odm                 // For common use in the future\r
1233         );\r
1234 \r
1235 VOID\r
1236 ODM_CmnInfoInit(\r
1237         IN              PDM_ODM_T               pDM_Odm,\r
1238         IN              ODM_CMNINFO_E   CmnInfo,\r
1239         IN              u4Byte                  Value   \r
1240         );\r
1241 \r
1242 VOID\r
1243 ODM_CmnInfoHook(\r
1244         IN              PDM_ODM_T               pDM_Odm,\r
1245         IN              ODM_CMNINFO_E   CmnInfo,\r
1246         IN              PVOID                   pValue  \r
1247         );\r
1248 \r
1249 VOID\r
1250 ODM_CmnInfoPtrArrayHook(\r
1251         IN              PDM_ODM_T               pDM_Odm,\r
1252         IN              ODM_CMNINFO_E   CmnInfo,\r
1253         IN              u2Byte                  Index,\r
1254         IN              PVOID                   pValue  \r
1255         );\r
1256 \r
1257 VOID\r
1258 ODM_CmnInfoUpdate(\r
1259         IN              PDM_ODM_T               pDM_Odm,\r
1260         IN              u4Byte                  CmnInfo,\r
1261         IN              u8Byte                  Value   \r
1262         );\r
1263 \r
1264 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1265 VOID \r
1266 ODM_InitAllThreads(\r
1267     IN PDM_ODM_T        pDM_Odm \r
1268     );\r
1269 \r
1270 VOID\r
1271 ODM_StopAllThreads(\r
1272         IN PDM_ODM_T    pDM_Odm \r
1273         );\r
1274 #endif\r
1275 \r
1276 VOID \r
1277 ODM_InitAllTimers(\r
1278     IN PDM_ODM_T        pDM_Odm \r
1279     );\r
1280 \r
1281 VOID \r
1282 ODM_CancelAllTimers(\r
1283     IN PDM_ODM_T    pDM_Odm \r
1284     );\r
1285 \r
1286 VOID\r
1287 ODM_ReleaseAllTimers(\r
1288     IN PDM_ODM_T        pDM_Odm \r
1289     );\r
1290 \r
1291 \r
1292 \r
1293 \r
1294 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1295 VOID ODM_InitAllWorkItems(IN PDM_ODM_T  pDM_Odm );\r
1296 VOID ODM_FreeAllWorkItems(IN PDM_ODM_T  pDM_Odm );\r
1297 \r
1298 \r
1299 \r
1300 u8Byte\r
1301 PlatformDivision64(\r
1302         IN u8Byte       x,\r
1303         IN u8Byte       y\r
1304 );\r
1305 \r
1306 //====================================================\r
1307 //3 PathDiV End\r
1308 //====================================================\r
1309 \r
1310 \r
1311 #define DM_ChangeDynamicInitGainThresh          ODM_ChangeDynamicInitGainThresh\r
1312 \r
1313 typedef enum tag_DIG_Connect_Definition\r
1314 {\r
1315         DIG_STA_DISCONNECT = 0, \r
1316         DIG_STA_CONNECT = 1,\r
1317         DIG_STA_BEFORE_CONNECT = 2,\r
1318         DIG_MultiSTA_DISCONNECT = 3,\r
1319         DIG_MultiSTA_CONNECT = 4,\r
1320         DIG_CONNECT_MAX\r
1321 }DM_DIG_CONNECT_E;\r
1322 \r
1323 \r
1324 //\r
1325 // 2012/01/12 MH Check afapter status. Temp fix BSOD.\r
1326 //\r
1327 #define HAL_ADAPTER_STS_CHK(pDM_Odm)\\r
1328         if (pDM_Odm->Adapter == NULL)\\r
1329         {\\r
1330                 return;\\r
1331         }\\r
1332 \r
1333 #endif  // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1334 \r
1335 VOID\r
1336 ODM_AsocEntry_Init(\r
1337         IN              PDM_ODM_T               pDM_Odm\r
1338         );\r
1339 \r
1340 \r
1341 PVOID\r
1342 PhyDM_Get_Structure(\r
1343         IN              PDM_ODM_T               pDM_Odm,\r
1344         IN              u1Byte                  Structure_Type\r
1345 );\r
1346 \r
1347 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ||(DM_ODM_SUPPORT_TYPE == ODM_CE)\r
1348 /*===========================================================*/\r
1349 /* The following is for compile only*/\r
1350 /*===========================================================*/\r
1351 \r
1352 #define IS_HARDWARE_TYPE_8723A(_Adapter)                        FALSE\r
1353 #define IS_HARDWARE_TYPE_8723AE(_Adapter)                       FALSE\r
1354 #define IS_HARDWARE_TYPE_8192C(_Adapter)                        FALSE\r
1355 #define IS_HARDWARE_TYPE_8192D(_Adapter)                        FALSE\r
1356 #define RF_T_METER_92D                                  0x42\r
1357 \r
1358 \r
1359 #define GET_RX_STATUS_DESC_RX_MCS(__pRxStatusDesc)                              LE_BITS_TO_1BYTE( __pRxStatusDesc+12, 0, 6)\r
1360 \r
1361 #define         rConfig_ram64x16                                0xb2c\r
1362 \r
1363 #define TARGET_CHNL_NUM_2G_5G   59\r
1364 \r
1365 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1366 u1Byte GetRightChnlPlaceforIQK(u1Byte chnl);\r
1367 #endif\r
1368 \r
1369 //===========================================================\r
1370 #endif\r
1371 \r
1372 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
1373 void odm_dtc(PDM_ODM_T pDM_Odm);\r
1374 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */\r
1375 \r
1376 \r
1377 VOID phydm_NoisyDetection(IN    PDM_ODM_T       pDM_Odm );\r
1378 \r
1379 \r
1380 #endif\r
1381 \r
1382 VOID\r
1383 phydm_set_ext_switch(\r
1384         IN              PVOID           pDM_VOID,\r
1385         IN              u4Byte          *const dm_value,\r
1386         IN              u4Byte          *_used,\r
1387         OUT             char                    *output,\r
1388         IN              u4Byte          *_out_len       \r
1389 );\r
1390 \r
1391 VOID\r
1392 phydm_api_debug(\r
1393         IN              PVOID           pDM_VOID,\r
1394         IN              u4Byte          function_map,\r
1395         IN              u4Byte          *const dm_value,\r
1396         IN              u4Byte          *_used,\r
1397         OUT             char                    *output,\r
1398         IN              u4Byte          *_out_len\r
1399 );\r
1400 \r
1401 u1Byte\r
1402 phydm_nbi_setting(\r
1403         IN              PVOID           pDM_VOID,\r
1404         IN              u4Byte          enable,\r
1405         IN              u4Byte          channel,\r
1406         IN              u4Byte          bw,\r
1407         IN              u4Byte          f_interference,\r
1408         IN              u4Byte          Second_ch\r
1409 );\r
1410 \r