1 #ifndef HALMAC_POWER_SEQUENCE_CMD
2 #define HALMAC_POWER_SEQUENCE_CMD
4 #include "halmac_2_platform.h"
5 #include "halmac_type.h"
7 #define HALMAC_POLLING_READY_TIMEOUT_COUNT 10000
10 * The value of cmd : 4 bits
14 * offset : the read register offset
15 * msk : the mask of the read value
16 * value : N/A, left by 0
17 * Note : dirver shall implement this function by read & msk
19 #define HALMAC_PWR_CMD_READ 0x00
21 * offset: the read register offset
22 * msk: the mask of the write bits
24 * Note: driver shall implement this cmd by read & msk after write
26 #define HALMAC_PWR_CMD_WRITE 0x01
28 * offset: the read register offset
29 * msk: the mask of the polled value
30 * value: the value to be polled, masked by the msd field.
31 * Note: driver shall implement this cmd by
33 * if( (Read(offset) & msk) == (value & msk) )
35 * } while(not timeout);
37 #define HALMAC_PWR_CMD_POLLING 0x02
39 * offset: the value to delay
41 * value: the unit of delay, 0: us, 1: ms
43 #define HALMAC_PWR_CMD_DELAY 0x03
49 #define HALMAC_PWR_CMD_END 0x04
52 * The value of base : 4 bits
55 /* define the base address of each block */
56 #define HALMAC_PWR_BASEADDR_MAC 0x00
57 #define HALMAC_PWR_BASEADDR_USB 0x01
58 #define HALMAC_PWR_BASEADDR_PCIE 0x02
59 #define HALMAC_PWR_BASEADDR_SDIO 0x03
62 * The value of interface_msk : 4 bits
64 #define HALMAC_PWR_INTF_SDIO_MSK BIT(0)
65 #define HALMAC_PWR_INTF_USB_MSK BIT(1)
66 #define HALMAC_PWR_INTF_PCI_MSK BIT(2)
67 #define HALMAC_PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
70 * The value of fab_msk : 4 bits
72 #define HALMAC_PWR_FAB_TSMC_MSK BIT(0)
73 #define HALMAC_PWR_FAB_UMC_MSK BIT(1)
74 #define HALMAC_PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
77 * The value of cut_msk : 8 bits
79 #define HALMAC_PWR_CUT_TESTCHIP_MSK BIT(0)
80 #define HALMAC_PWR_CUT_A_MSK BIT(1)
81 #define HALMAC_PWR_CUT_B_MSK BIT(2)
82 #define HALMAC_PWR_CUT_C_MSK BIT(3)
83 #define HALMAC_PWR_CUT_D_MSK BIT(4)
84 #define HALMAC_PWR_CUT_E_MSK BIT(5)
85 #define HALMAC_PWR_CUT_F_MSK BIT(6)
86 #define HALMAC_PWR_CUT_G_MSK BIT(7)
87 #define HALMAC_PWR_CUT_ALL_MSK 0xFF
89 typedef enum _HALMAC_PWRSEQ_CMD_DELAY_UNIT_ {
90 HALMAC_PWRSEQ_DELAY_US,
91 HALMAC_PWRSEQ_DELAY_MS,
92 } HALMAC_PWRSEQ_DELAY_UNIT;
94 /* Don't care endian issue, because element of pwer seq vector is fixed address */
95 typedef struct _HALMAC_WL_PWR_CFG_ {
104 } HALMAC_WLAN_PWR_CFG, *PHALMAC_WLAN_PWR_CFG;