1 #ifndef __INC_HALMAC_BIT_8822B_H
2 #define __INC_HALMAC_BIT_8822B_H
4 #define CPU_OPT_WIDTH 0x1F
6 /* 2 REG_NOT_VALID_8822B */
8 /* 2 REG_SYS_ISO_CTRL_8822B */
9 #define BIT_PWC_EV12V_8822B BIT(15)
10 #define BIT_PWC_EV25V_8822B BIT(14)
11 #define BIT_PA33V_EN_8822B BIT(13)
12 #define BIT_PA12V_EN_8822B BIT(12)
13 #define BIT_UA33V_EN_8822B BIT(11)
14 #define BIT_UA12V_EN_8822B BIT(10)
15 #define BIT_ISO_RFDIO_8822B BIT(9)
16 #define BIT_ISO_EB2CORE_8822B BIT(8)
17 #define BIT_ISO_DIOE_8822B BIT(7)
18 #define BIT_ISO_WLPON2PP_8822B BIT(6)
19 #define BIT_ISO_IP2MAC_WA2PP_8822B BIT(5)
20 #define BIT_ISO_PD2CORE_8822B BIT(4)
21 #define BIT_ISO_PA2PCIE_8822B BIT(3)
22 #define BIT_ISO_UD2CORE_8822B BIT(2)
23 #define BIT_ISO_UA2USB_8822B BIT(1)
24 #define BIT_ISO_WD2PP_8822B BIT(0)
26 /* 2 REG_SYS_FUNC_EN_8822B */
27 #define BIT_FEN_MREGEN_8822B BIT(15)
28 #define BIT_FEN_HWPDN_8822B BIT(14)
29 #define BIT_EN_25_1_8822B BIT(13)
30 #define BIT_FEN_ELDR_8822B BIT(12)
31 #define BIT_FEN_DCORE_8822B BIT(11)
32 #define BIT_FEN_CPUEN_8822B BIT(10)
33 #define BIT_FEN_DIOE_8822B BIT(9)
34 #define BIT_FEN_PCIED_8822B BIT(8)
35 #define BIT_FEN_PPLL_8822B BIT(7)
36 #define BIT_FEN_PCIEA_8822B BIT(6)
37 #define BIT_FEN_DIO_PCIE_8822B BIT(5)
38 #define BIT_FEN_USBD_8822B BIT(4)
39 #define BIT_FEN_UPLL_8822B BIT(3)
40 #define BIT_FEN_USBA_8822B BIT(2)
41 #define BIT_FEN_BB_GLB_RSTN_8822B BIT(1)
42 #define BIT_FEN_BBRSTB_8822B BIT(0)
44 /* 2 REG_SYS_PW_CTRL_8822B */
45 #define BIT_SOP_EABM_8822B BIT(31)
46 #define BIT_SOP_ACKF_8822B BIT(30)
47 #define BIT_SOP_ERCK_8822B BIT(29)
48 #define BIT_SOP_ESWR_8822B BIT(28)
49 #define BIT_SOP_PWMM_8822B BIT(27)
50 #define BIT_SOP_EECK_8822B BIT(26)
51 #define BIT_SOP_EXTL_8822B BIT(24)
52 #define BIT_SYM_OP_RING_12M_8822B BIT(22)
53 #define BIT_ROP_SWPR_8822B BIT(21)
54 #define BIT_DIS_HW_LPLDM_8822B BIT(20)
55 #define BIT_OPT_SWRST_WLMCU_8822B BIT(19)
56 #define BIT_RDY_SYSPWR_8822B BIT(17)
57 #define BIT_EN_WLON_8822B BIT(16)
58 #define BIT_APDM_HPDN_8822B BIT(15)
59 #define BIT_AFSM_PCIE_SUS_EN_8822B BIT(12)
60 #define BIT_AFSM_WLSUS_EN_8822B BIT(11)
61 #define BIT_APFM_SWLPS_8822B BIT(10)
62 #define BIT_APFM_OFFMAC_8822B BIT(9)
63 #define BIT_APFN_ONMAC_8822B BIT(8)
64 #define BIT_CHIP_PDN_EN_8822B BIT(7)
65 #define BIT_RDY_MACDIS_8822B BIT(6)
66 #define BIT_RING_CLK_12M_EN_8822B BIT(4)
67 #define BIT_PFM_WOWL_8822B BIT(3)
68 #define BIT_PFM_LDKP_8822B BIT(2)
69 #define BIT_WL_HCI_ALD_8822B BIT(1)
70 #define BIT_PFM_LDALL_8822B BIT(0)
72 /* 2 REG_SYS_CLK_CTRL_8822B */
73 #define BIT_LDO_DUMMY_8822B BIT(15)
74 #define BIT_CPU_CLK_EN_8822B BIT(14)
75 #define BIT_SYMREG_CLK_EN_8822B BIT(13)
76 #define BIT_HCI_CLK_EN_8822B BIT(12)
77 #define BIT_MAC_CLK_EN_8822B BIT(11)
78 #define BIT_SEC_CLK_EN_8822B BIT(10)
79 #define BIT_PHY_SSC_RSTB_8822B BIT(9)
80 #define BIT_EXT_32K_EN_8822B BIT(8)
81 #define BIT_WL_CLK_TEST_8822B BIT(7)
82 #define BIT_OP_SPS_PWM_EN_8822B BIT(6)
83 #define BIT_LOADER_CLK_EN_8822B BIT(5)
84 #define BIT_MACSLP_8822B BIT(4)
85 #define BIT_WAKEPAD_EN_8822B BIT(3)
86 #define BIT_ROMD16V_EN_8822B BIT(2)
87 #define BIT_CKANA12M_EN_8822B BIT(1)
88 #define BIT_CNTD16V_EN_8822B BIT(0)
90 /* 2 REG_SYS_EEPROM_CTRL_8822B */
92 #define BIT_SHIFT_VPDIDX_8822B 8
93 #define BIT_MASK_VPDIDX_8822B 0xff
94 #define BIT_VPDIDX_8822B(x) (((x) & BIT_MASK_VPDIDX_8822B) << BIT_SHIFT_VPDIDX_8822B)
95 #define BIT_GET_VPDIDX_8822B(x) (((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)
98 #define BIT_SHIFT_EEM1_0_8822B 6
99 #define BIT_MASK_EEM1_0_8822B 0x3
100 #define BIT_EEM1_0_8822B(x) (((x) & BIT_MASK_EEM1_0_8822B) << BIT_SHIFT_EEM1_0_8822B)
101 #define BIT_GET_EEM1_0_8822B(x) (((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)
103 #define BIT_AUTOLOAD_SUS_8822B BIT(5)
104 #define BIT_EERPOMSEL_8822B BIT(4)
105 #define BIT_EECS_V1_8822B BIT(3)
106 #define BIT_EESK_V1_8822B BIT(2)
107 #define BIT_EEDI_V1_8822B BIT(1)
108 #define BIT_EEDO_V1_8822B BIT(0)
110 /* 2 REG_EE_VPD_8822B */
112 #define BIT_SHIFT_VPD_DATA_8822B 0
113 #define BIT_MASK_VPD_DATA_8822B 0xffffffffL
114 #define BIT_VPD_DATA_8822B(x) (((x) & BIT_MASK_VPD_DATA_8822B) << BIT_SHIFT_VPD_DATA_8822B)
115 #define BIT_GET_VPD_DATA_8822B(x) (((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)
118 /* 2 REG_SYS_SWR_CTRL1_8822B */
119 #define BIT_C2_L_BIT0_8822B BIT(31)
121 #define BIT_SHIFT_C1_L_8822B 29
122 #define BIT_MASK_C1_L_8822B 0x3
123 #define BIT_C1_L_8822B(x) (((x) & BIT_MASK_C1_L_8822B) << BIT_SHIFT_C1_L_8822B)
124 #define BIT_GET_C1_L_8822B(x) (((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)
127 #define BIT_SHIFT_REG_FREQ_L_8822B 25
128 #define BIT_MASK_REG_FREQ_L_8822B 0x7
129 #define BIT_REG_FREQ_L_8822B(x) (((x) & BIT_MASK_REG_FREQ_L_8822B) << BIT_SHIFT_REG_FREQ_L_8822B)
130 #define BIT_GET_REG_FREQ_L_8822B(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)
132 #define BIT_REG_EN_DUTY_8822B BIT(24)
134 #define BIT_SHIFT_REG_MODE_8822B 22
135 #define BIT_MASK_REG_MODE_8822B 0x3
136 #define BIT_REG_MODE_8822B(x) (((x) & BIT_MASK_REG_MODE_8822B) << BIT_SHIFT_REG_MODE_8822B)
137 #define BIT_GET_REG_MODE_8822B(x) (((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)
139 #define BIT_REG_EN_SP_8822B BIT(21)
140 #define BIT_REG_AUTO_L_8822B BIT(20)
141 #define BIT_SW18_SELD_BIT0_8822B BIT(19)
142 #define BIT_SW18_POWOCP_8822B BIT(18)
144 #define BIT_SHIFT_OCP_L1_8822B 15
145 #define BIT_MASK_OCP_L1_8822B 0x7
146 #define BIT_OCP_L1_8822B(x) (((x) & BIT_MASK_OCP_L1_8822B) << BIT_SHIFT_OCP_L1_8822B)
147 #define BIT_GET_OCP_L1_8822B(x) (((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)
150 #define BIT_SHIFT_CF_L_8822B 13
151 #define BIT_MASK_CF_L_8822B 0x3
152 #define BIT_CF_L_8822B(x) (((x) & BIT_MASK_CF_L_8822B) << BIT_SHIFT_CF_L_8822B)
153 #define BIT_GET_CF_L_8822B(x) (((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)
155 #define BIT_SW18_FPWM_8822B BIT(11)
156 #define BIT_SW18_SWEN_8822B BIT(9)
157 #define BIT_SW18_LDEN_8822B BIT(8)
158 #define BIT_MAC_ID_EN_8822B BIT(7)
159 #define BIT_AFE_BGEN_8822B BIT(0)
161 /* 2 REG_SYS_SWR_CTRL2_8822B */
162 #define BIT_POW_ZCD_L_8822B BIT(31)
163 #define BIT_AUTOZCD_L_8822B BIT(30)
165 #define BIT_SHIFT_REG_DELAY_8822B 28
166 #define BIT_MASK_REG_DELAY_8822B 0x3
167 #define BIT_REG_DELAY_8822B(x) (((x) & BIT_MASK_REG_DELAY_8822B) << BIT_SHIFT_REG_DELAY_8822B)
168 #define BIT_GET_REG_DELAY_8822B(x) (((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)
171 #define BIT_SHIFT_V15ADJ_L1_V1_8822B 24
172 #define BIT_MASK_V15ADJ_L1_V1_8822B 0x7
173 #define BIT_V15ADJ_L1_V1_8822B(x) (((x) & BIT_MASK_V15ADJ_L1_V1_8822B) << BIT_SHIFT_V15ADJ_L1_V1_8822B)
174 #define BIT_GET_V15ADJ_L1_V1_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)
177 #define BIT_SHIFT_VOL_L1_V1_8822B 20
178 #define BIT_MASK_VOL_L1_V1_8822B 0xf
179 #define BIT_VOL_L1_V1_8822B(x) (((x) & BIT_MASK_VOL_L1_V1_8822B) << BIT_SHIFT_VOL_L1_V1_8822B)
180 #define BIT_GET_VOL_L1_V1_8822B(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)
183 #define BIT_SHIFT_IN_L1_V1_8822B 17
184 #define BIT_MASK_IN_L1_V1_8822B 0x7
185 #define BIT_IN_L1_V1_8822B(x) (((x) & BIT_MASK_IN_L1_V1_8822B) << BIT_SHIFT_IN_L1_V1_8822B)
186 #define BIT_GET_IN_L1_V1_8822B(x) (((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)
189 #define BIT_SHIFT_TBOX_L1_8822B 15
190 #define BIT_MASK_TBOX_L1_8822B 0x3
191 #define BIT_TBOX_L1_8822B(x) (((x) & BIT_MASK_TBOX_L1_8822B) << BIT_SHIFT_TBOX_L1_8822B)
192 #define BIT_GET_TBOX_L1_8822B(x) (((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)
194 #define BIT_SW18_SEL_8822B BIT(13)
196 /* 2 REG_NOT_VALID_8822B */
197 #define BIT_SW18_SD_8822B BIT(10)
199 #define BIT_SHIFT_R3_L_8822B 7
200 #define BIT_MASK_R3_L_8822B 0x3
201 #define BIT_R3_L_8822B(x) (((x) & BIT_MASK_R3_L_8822B) << BIT_SHIFT_R3_L_8822B)
202 #define BIT_GET_R3_L_8822B(x) (((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)
205 #define BIT_SHIFT_SW18_R2_8822B 5
206 #define BIT_MASK_SW18_R2_8822B 0x3
207 #define BIT_SW18_R2_8822B(x) (((x) & BIT_MASK_SW18_R2_8822B) << BIT_SHIFT_SW18_R2_8822B)
208 #define BIT_GET_SW18_R2_8822B(x) (((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)
211 #define BIT_SHIFT_SW18_R1_8822B 3
212 #define BIT_MASK_SW18_R1_8822B 0x3
213 #define BIT_SW18_R1_8822B(x) (((x) & BIT_MASK_SW18_R1_8822B) << BIT_SHIFT_SW18_R1_8822B)
214 #define BIT_GET_SW18_R1_8822B(x) (((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)
217 #define BIT_SHIFT_C3_L_C3_8822B 1
218 #define BIT_MASK_C3_L_C3_8822B 0x3
219 #define BIT_C3_L_C3_8822B(x) (((x) & BIT_MASK_C3_L_C3_8822B) << BIT_SHIFT_C3_L_C3_8822B)
220 #define BIT_GET_C3_L_C3_8822B(x) (((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)
222 #define BIT_C2_L_BIT1_8822B BIT(0)
224 /* 2 REG_SYS_SWR_CTRL3_8822B */
225 #define BIT_SPS18_OCP_DIS_8822B BIT(31)
227 #define BIT_SHIFT_SPS18_OCP_TH_8822B 16
228 #define BIT_MASK_SPS18_OCP_TH_8822B 0x7fff
229 #define BIT_SPS18_OCP_TH_8822B(x) (((x) & BIT_MASK_SPS18_OCP_TH_8822B) << BIT_SHIFT_SPS18_OCP_TH_8822B)
230 #define BIT_GET_SPS18_OCP_TH_8822B(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)
233 #define BIT_SHIFT_OCP_WINDOW_8822B 0
234 #define BIT_MASK_OCP_WINDOW_8822B 0xffff
235 #define BIT_OCP_WINDOW_8822B(x) (((x) & BIT_MASK_OCP_WINDOW_8822B) << BIT_SHIFT_OCP_WINDOW_8822B)
236 #define BIT_GET_OCP_WINDOW_8822B(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)
239 /* 2 REG_RSV_CTRL_8822B */
240 #define BIT_HREG_DBG_8822B BIT(23)
241 #define BIT_WLMCUIOIF_8822B BIT(8)
242 #define BIT_LOCK_ALL_EN_8822B BIT(7)
243 #define BIT_R_DIS_PRST_8822B BIT(6)
244 #define BIT_WLOCK_1C_B6_8822B BIT(5)
245 #define BIT_WLOCK_40_8822B BIT(4)
246 #define BIT_WLOCK_08_8822B BIT(3)
247 #define BIT_WLOCK_04_8822B BIT(2)
248 #define BIT_WLOCK_00_8822B BIT(1)
249 #define BIT_WLOCK_ALL_8822B BIT(0)
251 /* 2 REG_RF_CTRL_8822B */
252 #define BIT_RF_SDMRSTB_8822B BIT(2)
253 #define BIT_RF_RSTB_8822B BIT(1)
254 #define BIT_RF_EN_8822B BIT(0)
256 /* 2 REG_AFE_LDO_CTRL_8822B */
258 #define BIT_SHIFT_LPLDH12_RSV_8822B 29
259 #define BIT_MASK_LPLDH12_RSV_8822B 0x7
260 #define BIT_LPLDH12_RSV_8822B(x) (((x) & BIT_MASK_LPLDH12_RSV_8822B) << BIT_SHIFT_LPLDH12_RSV_8822B)
261 #define BIT_GET_LPLDH12_RSV_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)
263 #define BIT_LPLDH12_SLP_8822B BIT(28)
265 #define BIT_SHIFT_LPLDH12_VADJ_8822B 24
266 #define BIT_MASK_LPLDH12_VADJ_8822B 0xf
267 #define BIT_LPLDH12_VADJ_8822B(x) (((x) & BIT_MASK_LPLDH12_VADJ_8822B) << BIT_SHIFT_LPLDH12_VADJ_8822B)
268 #define BIT_GET_LPLDH12_VADJ_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)
270 #define BIT_LDH12_EN_8822B BIT(16)
271 #define BIT_WLBBOFF_BIG_PWC_EN_8822B BIT(14)
272 #define BIT_WLBBOFF_SMALL_PWC_EN_8822B BIT(13)
273 #define BIT_WLMACOFF_BIG_PWC_EN_8822B BIT(12)
274 #define BIT_WLPON_PWC_EN_8822B BIT(11)
275 #define BIT_POW_REGU_P1_8822B BIT(10)
276 #define BIT_LDOV12W_EN_8822B BIT(8)
277 #define BIT_EX_XTAL_DRV_DIGI_8822B BIT(7)
278 #define BIT_EX_XTAL_DRV_USB_8822B BIT(6)
279 #define BIT_EX_XTAL_DRV_AFE_8822B BIT(5)
280 #define BIT_EX_XTAL_DRV_RF2_8822B BIT(4)
281 #define BIT_EX_XTAL_DRV_RF1_8822B BIT(3)
282 #define BIT_POW_REGU_P0_8822B BIT(2)
284 /* 2 REG_NOT_VALID_8822B */
285 #define BIT_POW_PLL_LDO_8822B BIT(0)
287 /* 2 REG_AFE_CTRL1_8822B */
288 #define BIT_AGPIO_GPE_8822B BIT(31)
290 #define BIT_SHIFT_XTAL_CAP_XI_8822B 25
291 #define BIT_MASK_XTAL_CAP_XI_8822B 0x3f
292 #define BIT_XTAL_CAP_XI_8822B(x) (((x) & BIT_MASK_XTAL_CAP_XI_8822B) << BIT_SHIFT_XTAL_CAP_XI_8822B)
293 #define BIT_GET_XTAL_CAP_XI_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)
296 #define BIT_SHIFT_XTAL_DRV_DIGI_8822B 23
297 #define BIT_MASK_XTAL_DRV_DIGI_8822B 0x3
298 #define BIT_XTAL_DRV_DIGI_8822B(x) (((x) & BIT_MASK_XTAL_DRV_DIGI_8822B) << BIT_SHIFT_XTAL_DRV_DIGI_8822B)
299 #define BIT_GET_XTAL_DRV_DIGI_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)
301 #define BIT_XTAL_DRV_USB_BIT1_8822B BIT(22)
303 #define BIT_SHIFT_MAC_CLK_SEL_8822B 20
304 #define BIT_MASK_MAC_CLK_SEL_8822B 0x3
305 #define BIT_MAC_CLK_SEL_8822B(x) (((x) & BIT_MASK_MAC_CLK_SEL_8822B) << BIT_SHIFT_MAC_CLK_SEL_8822B)
306 #define BIT_GET_MAC_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)
308 #define BIT_XTAL_DRV_USB_BIT0_8822B BIT(19)
310 #define BIT_SHIFT_XTAL_DRV_AFE_8822B 17
311 #define BIT_MASK_XTAL_DRV_AFE_8822B 0x3
312 #define BIT_XTAL_DRV_AFE_8822B(x) (((x) & BIT_MASK_XTAL_DRV_AFE_8822B) << BIT_SHIFT_XTAL_DRV_AFE_8822B)
313 #define BIT_GET_XTAL_DRV_AFE_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)
316 #define BIT_SHIFT_XTAL_DRV_RF2_8822B 15
317 #define BIT_MASK_XTAL_DRV_RF2_8822B 0x3
318 #define BIT_XTAL_DRV_RF2_8822B(x) (((x) & BIT_MASK_XTAL_DRV_RF2_8822B) << BIT_SHIFT_XTAL_DRV_RF2_8822B)
319 #define BIT_GET_XTAL_DRV_RF2_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)
322 #define BIT_SHIFT_XTAL_DRV_RF1_8822B 13
323 #define BIT_MASK_XTAL_DRV_RF1_8822B 0x3
324 #define BIT_XTAL_DRV_RF1_8822B(x) (((x) & BIT_MASK_XTAL_DRV_RF1_8822B) << BIT_SHIFT_XTAL_DRV_RF1_8822B)
325 #define BIT_GET_XTAL_DRV_RF1_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)
327 #define BIT_XTAL_DELAY_DIGI_8822B BIT(12)
328 #define BIT_XTAL_DELAY_USB_8822B BIT(11)
329 #define BIT_XTAL_DELAY_AFE_8822B BIT(10)
331 #define BIT_SHIFT_XTAL_LDO_VREF_8822B 7
332 #define BIT_MASK_XTAL_LDO_VREF_8822B 0x7
333 #define BIT_XTAL_LDO_VREF_8822B(x) (((x) & BIT_MASK_XTAL_LDO_VREF_8822B) << BIT_SHIFT_XTAL_LDO_VREF_8822B)
334 #define BIT_GET_XTAL_LDO_VREF_8822B(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)
336 #define BIT_XTAL_XQSEL_RF_8822B BIT(6)
337 #define BIT_XTAL_XQSEL_8822B BIT(5)
339 #define BIT_SHIFT_XTAL_GMN_V2_8822B 3
340 #define BIT_MASK_XTAL_GMN_V2_8822B 0x3
341 #define BIT_XTAL_GMN_V2_8822B(x) (((x) & BIT_MASK_XTAL_GMN_V2_8822B) << BIT_SHIFT_XTAL_GMN_V2_8822B)
342 #define BIT_GET_XTAL_GMN_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)
345 #define BIT_SHIFT_XTAL_GMP_V2_8822B 1
346 #define BIT_MASK_XTAL_GMP_V2_8822B 0x3
347 #define BIT_XTAL_GMP_V2_8822B(x) (((x) & BIT_MASK_XTAL_GMP_V2_8822B) << BIT_SHIFT_XTAL_GMP_V2_8822B)
348 #define BIT_GET_XTAL_GMP_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)
350 #define BIT_XTAL_EN_8822B BIT(0)
352 /* 2 REG_AFE_CTRL2_8822B */
354 #define BIT_SHIFT_REG_C3_V4_8822B 30
355 #define BIT_MASK_REG_C3_V4_8822B 0x3
356 #define BIT_REG_C3_V4_8822B(x) (((x) & BIT_MASK_REG_C3_V4_8822B) << BIT_SHIFT_REG_C3_V4_8822B)
357 #define BIT_GET_REG_C3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)
359 #define BIT_REG_CP_BIT1_8822B BIT(29)
361 #define BIT_SHIFT_REG_RS_V4_8822B 26
362 #define BIT_MASK_REG_RS_V4_8822B 0x7
363 #define BIT_REG_RS_V4_8822B(x) (((x) & BIT_MASK_REG_RS_V4_8822B) << BIT_SHIFT_REG_RS_V4_8822B)
364 #define BIT_GET_REG_RS_V4_8822B(x) (((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)
367 #define BIT_SHIFT_REG__CS_8822B 24
368 #define BIT_MASK_REG__CS_8822B 0x3
369 #define BIT_REG__CS_8822B(x) (((x) & BIT_MASK_REG__CS_8822B) << BIT_SHIFT_REG__CS_8822B)
370 #define BIT_GET_REG__CS_8822B(x) (((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)
373 #define BIT_SHIFT_REG_CP_OFFSET_8822B 21
374 #define BIT_MASK_REG_CP_OFFSET_8822B 0x7
375 #define BIT_REG_CP_OFFSET_8822B(x) (((x) & BIT_MASK_REG_CP_OFFSET_8822B) << BIT_SHIFT_REG_CP_OFFSET_8822B)
376 #define BIT_GET_REG_CP_OFFSET_8822B(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)
379 #define BIT_SHIFT_CP_BIAS_8822B 18
380 #define BIT_MASK_CP_BIAS_8822B 0x7
381 #define BIT_CP_BIAS_8822B(x) (((x) & BIT_MASK_CP_BIAS_8822B) << BIT_SHIFT_CP_BIAS_8822B)
382 #define BIT_GET_CP_BIAS_8822B(x) (((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)
384 #define BIT_REG_IDOUBLE_V2_8822B BIT(17)
385 #define BIT_EN_SYN_8822B BIT(16)
387 #define BIT_SHIFT_MCCO_8822B 14
388 #define BIT_MASK_MCCO_8822B 0x3
389 #define BIT_MCCO_8822B(x) (((x) & BIT_MASK_MCCO_8822B) << BIT_SHIFT_MCCO_8822B)
390 #define BIT_GET_MCCO_8822B(x) (((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)
393 #define BIT_SHIFT_REG_LDO_SEL_8822B 12
394 #define BIT_MASK_REG_LDO_SEL_8822B 0x3
395 #define BIT_REG_LDO_SEL_8822B(x) (((x) & BIT_MASK_REG_LDO_SEL_8822B) << BIT_SHIFT_REG_LDO_SEL_8822B)
396 #define BIT_GET_REG_LDO_SEL_8822B(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)
398 #define BIT_REG_KVCO_V2_8822B BIT(10)
399 #define BIT_AGPIO_GPO_8822B BIT(9)
401 #define BIT_SHIFT_AGPIO_DRV_8822B 7
402 #define BIT_MASK_AGPIO_DRV_8822B 0x3
403 #define BIT_AGPIO_DRV_8822B(x) (((x) & BIT_MASK_AGPIO_DRV_8822B) << BIT_SHIFT_AGPIO_DRV_8822B)
404 #define BIT_GET_AGPIO_DRV_8822B(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)
407 #define BIT_SHIFT_XTAL_CAP_XO_8822B 1
408 #define BIT_MASK_XTAL_CAP_XO_8822B 0x3f
409 #define BIT_XTAL_CAP_XO_8822B(x) (((x) & BIT_MASK_XTAL_CAP_XO_8822B) << BIT_SHIFT_XTAL_CAP_XO_8822B)
410 #define BIT_GET_XTAL_CAP_XO_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)
412 #define BIT_POW_PLL_8822B BIT(0)
414 /* 2 REG_AFE_CTRL3_8822B */
416 #define BIT_SHIFT_PS_8822B 7
417 #define BIT_MASK_PS_8822B 0x7
418 #define BIT_PS_8822B(x) (((x) & BIT_MASK_PS_8822B) << BIT_SHIFT_PS_8822B)
419 #define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)
421 #define BIT_PSEN_8822B BIT(6)
422 #define BIT_DOGENB_8822B BIT(5)
423 #define BIT_REG_MBIAS_8822B BIT(4)
425 #define BIT_SHIFT_REG_R3_V4_8822B 1
426 #define BIT_MASK_REG_R3_V4_8822B 0x7
427 #define BIT_REG_R3_V4_8822B(x) (((x) & BIT_MASK_REG_R3_V4_8822B) << BIT_SHIFT_REG_R3_V4_8822B)
428 #define BIT_GET_REG_R3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)
430 #define BIT_REG_CP_BIT0_8822B BIT(0)
432 /* 2 REG_EFUSE_CTRL_8822B */
433 #define BIT_EF_FLAG_8822B BIT(31)
435 #define BIT_SHIFT_EF_PGPD_8822B 28
436 #define BIT_MASK_EF_PGPD_8822B 0x7
437 #define BIT_EF_PGPD_8822B(x) (((x) & BIT_MASK_EF_PGPD_8822B) << BIT_SHIFT_EF_PGPD_8822B)
438 #define BIT_GET_EF_PGPD_8822B(x) (((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)
441 #define BIT_SHIFT_EF_RDT_8822B 24
442 #define BIT_MASK_EF_RDT_8822B 0xf
443 #define BIT_EF_RDT_8822B(x) (((x) & BIT_MASK_EF_RDT_8822B) << BIT_SHIFT_EF_RDT_8822B)
444 #define BIT_GET_EF_RDT_8822B(x) (((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)
447 #define BIT_SHIFT_EF_PGTS_8822B 20
448 #define BIT_MASK_EF_PGTS_8822B 0xf
449 #define BIT_EF_PGTS_8822B(x) (((x) & BIT_MASK_EF_PGTS_8822B) << BIT_SHIFT_EF_PGTS_8822B)
450 #define BIT_GET_EF_PGTS_8822B(x) (((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)
452 #define BIT_EF_PDWN_8822B BIT(19)
453 #define BIT_EF_ALDEN_8822B BIT(18)
455 #define BIT_SHIFT_EF_ADDR_8822B 8
456 #define BIT_MASK_EF_ADDR_8822B 0x3ff
457 #define BIT_EF_ADDR_8822B(x) (((x) & BIT_MASK_EF_ADDR_8822B) << BIT_SHIFT_EF_ADDR_8822B)
458 #define BIT_GET_EF_ADDR_8822B(x) (((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)
461 #define BIT_SHIFT_EF_DATA_8822B 0
462 #define BIT_MASK_EF_DATA_8822B 0xff
463 #define BIT_EF_DATA_8822B(x) (((x) & BIT_MASK_EF_DATA_8822B) << BIT_SHIFT_EF_DATA_8822B)
464 #define BIT_GET_EF_DATA_8822B(x) (((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)
467 /* 2 REG_LDO_EFUSE_CTRL_8822B */
468 #define BIT_LDOE25_EN_8822B BIT(31)
470 #define BIT_SHIFT_LDOE25_V12ADJ_L_8822B 27
471 #define BIT_MASK_LDOE25_V12ADJ_L_8822B 0xf
472 #define BIT_LDOE25_V12ADJ_L_8822B(x) (((x) & BIT_MASK_LDOE25_V12ADJ_L_8822B) << BIT_SHIFT_LDOE25_V12ADJ_L_8822B)
473 #define BIT_GET_LDOE25_V12ADJ_L_8822B(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & BIT_MASK_LDOE25_V12ADJ_L_8822B)
475 #define BIT_EF_CRES_SEL_8822B BIT(26)
477 #define BIT_SHIFT_EF_SCAN_START_V1_8822B 16
478 #define BIT_MASK_EF_SCAN_START_V1_8822B 0x3ff
479 #define BIT_EF_SCAN_START_V1_8822B(x) (((x) & BIT_MASK_EF_SCAN_START_V1_8822B) << BIT_SHIFT_EF_SCAN_START_V1_8822B)
480 #define BIT_GET_EF_SCAN_START_V1_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & BIT_MASK_EF_SCAN_START_V1_8822B)
483 #define BIT_SHIFT_EF_SCAN_END_8822B 12
484 #define BIT_MASK_EF_SCAN_END_8822B 0xf
485 #define BIT_EF_SCAN_END_8822B(x) (((x) & BIT_MASK_EF_SCAN_END_8822B) << BIT_SHIFT_EF_SCAN_END_8822B)
486 #define BIT_GET_EF_SCAN_END_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)
488 #define BIT_EF_PD_DIS_8822B BIT(11)
490 #define BIT_SHIFT_EF_CELL_SEL_8822B 8
491 #define BIT_MASK_EF_CELL_SEL_8822B 0x3
492 #define BIT_EF_CELL_SEL_8822B(x) (((x) & BIT_MASK_EF_CELL_SEL_8822B) << BIT_SHIFT_EF_CELL_SEL_8822B)
493 #define BIT_GET_EF_CELL_SEL_8822B(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)
495 #define BIT_EF_TRPT_8822B BIT(7)
497 #define BIT_SHIFT_EF_TTHD_8822B 0
498 #define BIT_MASK_EF_TTHD_8822B 0x7f
499 #define BIT_EF_TTHD_8822B(x) (((x) & BIT_MASK_EF_TTHD_8822B) << BIT_SHIFT_EF_TTHD_8822B)
500 #define BIT_GET_EF_TTHD_8822B(x) (((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)
503 /* 2 REG_PWR_OPTION_CTRL_8822B */
505 #define BIT_SHIFT_DBG_SEL_V1_8822B 16
506 #define BIT_MASK_DBG_SEL_V1_8822B 0xff
507 #define BIT_DBG_SEL_V1_8822B(x) (((x) & BIT_MASK_DBG_SEL_V1_8822B) << BIT_SHIFT_DBG_SEL_V1_8822B)
508 #define BIT_GET_DBG_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)
511 #define BIT_SHIFT_DBG_SEL_BYTE_8822B 14
512 #define BIT_MASK_DBG_SEL_BYTE_8822B 0x3
513 #define BIT_DBG_SEL_BYTE_8822B(x) (((x) & BIT_MASK_DBG_SEL_BYTE_8822B) << BIT_SHIFT_DBG_SEL_BYTE_8822B)
514 #define BIT_GET_DBG_SEL_BYTE_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)
517 #define BIT_SHIFT_STD_L1_V1_8822B 12
518 #define BIT_MASK_STD_L1_V1_8822B 0x3
519 #define BIT_STD_L1_V1_8822B(x) (((x) & BIT_MASK_STD_L1_V1_8822B) << BIT_SHIFT_STD_L1_V1_8822B)
520 #define BIT_GET_STD_L1_V1_8822B(x) (((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)
522 #define BIT_SYSON_DBG_PAD_E2_8822B BIT(11)
523 #define BIT_SYSON_LED_PAD_E2_8822B BIT(10)
524 #define BIT_SYSON_GPEE_PAD_E2_8822B BIT(9)
525 #define BIT_SYSON_PCI_PAD_E2_8822B BIT(8)
526 #define BIT_AUTO_SW_LDO_VOL_EN_8822B BIT(7)
528 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8822B 4
529 #define BIT_MASK_SYSON_SPS0WWV_WT_8822B 0x3
530 #define BIT_SYSON_SPS0WWV_WT_8822B(x) (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8822B) << BIT_SHIFT_SYSON_SPS0WWV_WT_8822B)
531 #define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & BIT_MASK_SYSON_SPS0WWV_WT_8822B)
534 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8822B 2
535 #define BIT_MASK_SYSON_SPS0LDO_WT_8822B 0x3
536 #define BIT_SYSON_SPS0LDO_WT_8822B(x) (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8822B) << BIT_SHIFT_SYSON_SPS0LDO_WT_8822B)
537 #define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & BIT_MASK_SYSON_SPS0LDO_WT_8822B)
540 #define BIT_SHIFT_SYSON_RCLK_SCALE_8822B 0
541 #define BIT_MASK_SYSON_RCLK_SCALE_8822B 0x3
542 #define BIT_SYSON_RCLK_SCALE_8822B(x) (((x) & BIT_MASK_SYSON_RCLK_SCALE_8822B) << BIT_SHIFT_SYSON_RCLK_SCALE_8822B)
543 #define BIT_GET_SYSON_RCLK_SCALE_8822B(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & BIT_MASK_SYSON_RCLK_SCALE_8822B)
546 /* 2 REG_CAL_TIMER_8822B */
548 #define BIT_SHIFT_MATCH_CNT_8822B 8
549 #define BIT_MASK_MATCH_CNT_8822B 0xff
550 #define BIT_MATCH_CNT_8822B(x) (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
551 #define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
554 #define BIT_SHIFT_CAL_SCAL_8822B 0
555 #define BIT_MASK_CAL_SCAL_8822B 0xff
556 #define BIT_CAL_SCAL_8822B(x) (((x) & BIT_MASK_CAL_SCAL_8822B) << BIT_SHIFT_CAL_SCAL_8822B)
557 #define BIT_GET_CAL_SCAL_8822B(x) (((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)
560 /* 2 REG_ACLK_MON_8822B */
562 #define BIT_SHIFT_RCLK_MON_8822B 5
563 #define BIT_MASK_RCLK_MON_8822B 0x7ff
564 #define BIT_RCLK_MON_8822B(x) (((x) & BIT_MASK_RCLK_MON_8822B) << BIT_SHIFT_RCLK_MON_8822B)
565 #define BIT_GET_RCLK_MON_8822B(x) (((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)
567 #define BIT_CAL_EN_8822B BIT(4)
569 #define BIT_SHIFT_DPSTU_8822B 2
570 #define BIT_MASK_DPSTU_8822B 0x3
571 #define BIT_DPSTU_8822B(x) (((x) & BIT_MASK_DPSTU_8822B) << BIT_SHIFT_DPSTU_8822B)
572 #define BIT_GET_DPSTU_8822B(x) (((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)
574 #define BIT_SUS_16X_8822B BIT(1)
576 /* 2 REG_GPIO_MUXCFG_8822B */
577 #define BIT_FSPI_EN_8822B BIT(19)
578 #define BIT_WL_RTS_EXT_32K_SEL_8822B BIT(18)
579 #define BIT_WLGP_SPI_EN_8822B BIT(16)
580 #define BIT_SIC_LBK_8822B BIT(15)
581 #define BIT_ENHTP_8822B BIT(14)
582 #define BIT_ENSIC_8822B BIT(12)
583 #define BIT_SIC_SWRST_8822B BIT(11)
584 #define BIT_PO_WIFI_PTA_PINS_8822B BIT(10)
585 #define BIT_PO_BT_PTA_PINS_8822B BIT(9)
586 #define BIT_ENUART_8822B BIT(8)
588 #define BIT_SHIFT_BTMODE_8822B 6
589 #define BIT_MASK_BTMODE_8822B 0x3
590 #define BIT_BTMODE_8822B(x) (((x) & BIT_MASK_BTMODE_8822B) << BIT_SHIFT_BTMODE_8822B)
591 #define BIT_GET_BTMODE_8822B(x) (((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)
593 #define BIT_ENBT_8822B BIT(5)
594 #define BIT_EROM_EN_8822B BIT(4)
595 #define BIT_WLRFE_6_7_EN_8822B BIT(3)
596 #define BIT_WLRFE_4_5_EN_8822B BIT(2)
598 #define BIT_SHIFT_GPIOSEL_8822B 0
599 #define BIT_MASK_GPIOSEL_8822B 0x3
600 #define BIT_GPIOSEL_8822B(x) (((x) & BIT_MASK_GPIOSEL_8822B) << BIT_SHIFT_GPIOSEL_8822B)
601 #define BIT_GET_GPIOSEL_8822B(x) (((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)
604 /* 2 REG_GPIO_PIN_CTRL_8822B */
606 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8822B 24
607 #define BIT_MASK_GPIO_MOD_7_TO_0_8822B 0xff
608 #define BIT_GPIO_MOD_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8822B) << BIT_SHIFT_GPIO_MOD_7_TO_0_8822B)
609 #define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & BIT_MASK_GPIO_MOD_7_TO_0_8822B)
612 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B 16
613 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B 0xff
614 #define BIT_GPIO_IO_SEL_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B) << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B)
615 #define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)
618 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8822B 8
619 #define BIT_MASK_GPIO_OUT_7_TO_0_8822B 0xff
620 #define BIT_GPIO_OUT_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8822B) << BIT_SHIFT_GPIO_OUT_7_TO_0_8822B)
621 #define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & BIT_MASK_GPIO_OUT_7_TO_0_8822B)
624 #define BIT_SHIFT_GPIO_IN_7_TO_0_8822B 0
625 #define BIT_MASK_GPIO_IN_7_TO_0_8822B 0xff
626 #define BIT_GPIO_IN_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_IN_7_TO_0_8822B) << BIT_SHIFT_GPIO_IN_7_TO_0_8822B)
627 #define BIT_GET_GPIO_IN_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & BIT_MASK_GPIO_IN_7_TO_0_8822B)
630 /* 2 REG_GPIO_INTM_8822B */
632 #define BIT_SHIFT_MUXDBG_SEL_8822B 30
633 #define BIT_MASK_MUXDBG_SEL_8822B 0x3
634 #define BIT_MUXDBG_SEL_8822B(x) (((x) & BIT_MASK_MUXDBG_SEL_8822B) << BIT_SHIFT_MUXDBG_SEL_8822B)
635 #define BIT_GET_MUXDBG_SEL_8822B(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)
637 #define BIT_EXTWOL_SEL_8822B BIT(17)
638 #define BIT_EXTWOL_EN_8822B BIT(16)
639 #define BIT_GPIOF_INT_MD_8822B BIT(15)
640 #define BIT_GPIOE_INT_MD_8822B BIT(14)
641 #define BIT_GPIOD_INT_MD_8822B BIT(13)
642 #define BIT_GPIOF_INT_MD_8822B BIT(15)
643 #define BIT_GPIOE_INT_MD_8822B BIT(14)
644 #define BIT_GPIOD_INT_MD_8822B BIT(13)
645 #define BIT_GPIOC_INT_MD_8822B BIT(12)
646 #define BIT_GPIOB_INT_MD_8822B BIT(11)
647 #define BIT_GPIOA_INT_MD_8822B BIT(10)
648 #define BIT_GPIO9_INT_MD_8822B BIT(9)
649 #define BIT_GPIO8_INT_MD_8822B BIT(8)
650 #define BIT_GPIO7_INT_MD_8822B BIT(7)
651 #define BIT_GPIO6_INT_MD_8822B BIT(6)
652 #define BIT_GPIO5_INT_MD_8822B BIT(5)
653 #define BIT_GPIO4_INT_MD_8822B BIT(4)
654 #define BIT_GPIO3_INT_MD_8822B BIT(3)
655 #define BIT_GPIO2_INT_MD_8822B BIT(2)
656 #define BIT_GPIO1_INT_MD_8822B BIT(1)
657 #define BIT_GPIO0_INT_MD_8822B BIT(0)
659 /* 2 REG_LED_CFG_8822B */
660 #define BIT_GPIO3_WL_CTRL_EN_8822B BIT(27)
661 #define BIT_LNAON_SEL_EN_8822B BIT(26)
662 #define BIT_PAPE_SEL_EN_8822B BIT(25)
663 #define BIT_DPDT_WLBT_SEL_8822B BIT(24)
664 #define BIT_DPDT_SEL_EN_8822B BIT(23)
665 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
666 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
667 #define BIT_LED2DIS_8822B BIT(21)
668 #define BIT_LED2PL_8822B BIT(20)
669 #define BIT_LED2SV_8822B BIT(19)
671 #define BIT_SHIFT_LED2CM_8822B 16
672 #define BIT_MASK_LED2CM_8822B 0x7
673 #define BIT_LED2CM_8822B(x) (((x) & BIT_MASK_LED2CM_8822B) << BIT_SHIFT_LED2CM_8822B)
674 #define BIT_GET_LED2CM_8822B(x) (((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)
676 #define BIT_LED1DIS_8822B BIT(15)
677 #define BIT_LED1PL_8822B BIT(12)
678 #define BIT_LED1SV_8822B BIT(11)
680 #define BIT_SHIFT_LED1CM_8822B 8
681 #define BIT_MASK_LED1CM_8822B 0x7
682 #define BIT_LED1CM_8822B(x) (((x) & BIT_MASK_LED1CM_8822B) << BIT_SHIFT_LED1CM_8822B)
683 #define BIT_GET_LED1CM_8822B(x) (((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)
685 #define BIT_LED0DIS_8822B BIT(7)
687 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B 5
688 #define BIT_MASK_AFE_LDO_SWR_CHECK_8822B 0x3
689 #define BIT_AFE_LDO_SWR_CHECK_8822B(x) (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B) << BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B)
690 #define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B)
692 #define BIT_LED0PL_8822B BIT(4)
693 #define BIT_LED0SV_8822B BIT(3)
695 #define BIT_SHIFT_LED0CM_8822B 0
696 #define BIT_MASK_LED0CM_8822B 0x7
697 #define BIT_LED0CM_8822B(x) (((x) & BIT_MASK_LED0CM_8822B) << BIT_SHIFT_LED0CM_8822B)
698 #define BIT_GET_LED0CM_8822B(x) (((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)
701 /* 2 REG_FSIMR_8822B */
702 #define BIT_FS_PDNINT_EN_8822B BIT(31)
703 #define BIT_NFC_INT_PAD_EN_8822B BIT(30)
704 #define BIT_FS_SPS_OCP_INT_EN_8822B BIT(29)
705 #define BIT_FS_PWMERR_INT_EN_8822B BIT(28)
706 #define BIT_FS_GPIOF_INT_EN_8822B BIT(27)
707 #define BIT_FS_GPIOE_INT_EN_8822B BIT(26)
708 #define BIT_FS_GPIOD_INT_EN_8822B BIT(25)
709 #define BIT_FS_GPIOC_INT_EN_8822B BIT(24)
710 #define BIT_FS_GPIOB_INT_EN_8822B BIT(23)
711 #define BIT_FS_GPIOA_INT_EN_8822B BIT(22)
712 #define BIT_FS_GPIO9_INT_EN_8822B BIT(21)
713 #define BIT_FS_GPIO8_INT_EN_8822B BIT(20)
714 #define BIT_FS_GPIO7_INT_EN_8822B BIT(19)
715 #define BIT_FS_GPIO6_INT_EN_8822B BIT(18)
716 #define BIT_FS_GPIO5_INT_EN_8822B BIT(17)
717 #define BIT_FS_GPIO4_INT_EN_8822B BIT(16)
718 #define BIT_FS_GPIO3_INT_EN_8822B BIT(15)
719 #define BIT_FS_GPIO2_INT_EN_8822B BIT(14)
720 #define BIT_FS_GPIO1_INT_EN_8822B BIT(13)
721 #define BIT_FS_GPIO0_INT_EN_8822B BIT(12)
722 #define BIT_FS_HCI_SUS_EN_8822B BIT(11)
723 #define BIT_FS_HCI_RES_EN_8822B BIT(10)
724 #define BIT_FS_HCI_RESET_EN_8822B BIT(9)
725 #define BIT_FS_BTON_STS_UPDATE_MSK_EN_8822B BIT(7)
726 #define BIT_ACT2RECOVERY_INT_EN_V1_8822B BIT(6)
727 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
728 #define BIT_HCI_TXDMA_REQ_HIMR_8822B BIT(4)
729 #define BIT_FS_32K_LEAVE_SETTING_MAK_8822B BIT(3)
730 #define BIT_FS_32K_ENTER_SETTING_MAK_8822B BIT(2)
731 #define BIT_FS_USB_LPMRSM_MSK_8822B BIT(1)
732 #define BIT_FS_USB_LPMINT_MSK_8822B BIT(0)
734 /* 2 REG_FSISR_8822B */
735 #define BIT_FS_PDNINT_8822B BIT(31)
736 #define BIT_FS_SPS_OCP_INT_8822B BIT(29)
737 #define BIT_FS_PWMERR_INT_8822B BIT(28)
738 #define BIT_FS_GPIOF_INT_8822B BIT(27)
739 #define BIT_FS_GPIOE_INT_8822B BIT(26)
740 #define BIT_FS_GPIOD_INT_8822B BIT(25)
741 #define BIT_FS_GPIOC_INT_8822B BIT(24)
742 #define BIT_FS_GPIOB_INT_8822B BIT(23)
743 #define BIT_FS_GPIOA_INT_8822B BIT(22)
744 #define BIT_FS_GPIO9_INT_8822B BIT(21)
745 #define BIT_FS_GPIO8_INT_8822B BIT(20)
746 #define BIT_FS_GPIO7_INT_8822B BIT(19)
747 #define BIT_FS_GPIO6_INT_8822B BIT(18)
748 #define BIT_FS_GPIO5_INT_8822B BIT(17)
749 #define BIT_FS_GPIO4_INT_8822B BIT(16)
750 #define BIT_FS_GPIO3_INT_8822B BIT(15)
751 #define BIT_FS_GPIO2_INT_8822B BIT(14)
752 #define BIT_FS_GPIO1_INT_8822B BIT(13)
753 #define BIT_FS_GPIO0_INT_8822B BIT(12)
754 #define BIT_FS_HCI_SUS_INT_8822B BIT(11)
755 #define BIT_FS_HCI_RES_INT_8822B BIT(10)
756 #define BIT_FS_HCI_RESET_INT_8822B BIT(9)
757 #define BIT_ACT2RECOVERY_8822B BIT(6)
758 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
759 #define BIT_HCI_TXDMA_REQ_HISR_8822B BIT(4)
760 #define BIT_FS_32K_LEAVE_SETTING_INT_8822B BIT(3)
761 #define BIT_FS_32K_ENTER_SETTING_INT_8822B BIT(2)
762 #define BIT_FS_USB_LPMRSM_INT_8822B BIT(1)
763 #define BIT_FS_USB_LPMINT_INT_8822B BIT(0)
765 /* 2 REG_HSIMR_8822B */
766 #define BIT_GPIOF_INT_EN_8822B BIT(31)
767 #define BIT_GPIOE_INT_EN_8822B BIT(30)
768 #define BIT_GPIOD_INT_EN_8822B BIT(29)
769 #define BIT_GPIOC_INT_EN_8822B BIT(28)
770 #define BIT_GPIOB_INT_EN_8822B BIT(27)
771 #define BIT_GPIOA_INT_EN_8822B BIT(26)
772 #define BIT_GPIO9_INT_EN_8822B BIT(25)
773 #define BIT_GPIO8_INT_EN_8822B BIT(24)
774 #define BIT_GPIO7_INT_EN_8822B BIT(23)
775 #define BIT_GPIO6_INT_EN_8822B BIT(22)
776 #define BIT_GPIO5_INT_EN_8822B BIT(21)
777 #define BIT_GPIO4_INT_EN_8822B BIT(20)
778 #define BIT_GPIO3_INT_EN_8822B BIT(19)
779 #define BIT_GPIO2_INT_EN_V1_8822B BIT(16)
780 #define BIT_GPIO1_INT_EN_8822B BIT(17)
781 #define BIT_GPIO0_INT_EN_8822B BIT(16)
782 #define BIT_PDNINT_EN_8822B BIT(7)
783 #define BIT_RON_INT_EN_8822B BIT(6)
784 #define BIT_SPS_OCP_INT_EN_8822B BIT(5)
785 #define BIT_GPIO15_0_INT_EN_8822B BIT(0)
787 /* 2 REG_HSISR_8822B */
788 #define BIT_GPIOF_INT_8822B BIT(31)
789 #define BIT_GPIOE_INT_8822B BIT(30)
790 #define BIT_GPIOD_INT_8822B BIT(29)
791 #define BIT_GPIOC_INT_8822B BIT(28)
792 #define BIT_GPIOB_INT_8822B BIT(27)
793 #define BIT_GPIOA_INT_8822B BIT(26)
794 #define BIT_GPIO9_INT_8822B BIT(25)
795 #define BIT_GPIO8_INT_8822B BIT(24)
796 #define BIT_GPIO7_INT_8822B BIT(23)
797 #define BIT_GPIO6_INT_8822B BIT(22)
798 #define BIT_GPIO5_INT_8822B BIT(21)
799 #define BIT_GPIO4_INT_8822B BIT(20)
800 #define BIT_GPIO3_INT_8822B BIT(19)
801 #define BIT_GPIO2_INT_V1_8822B BIT(16)
802 #define BIT_GPIO1_INT_8822B BIT(17)
803 #define BIT_GPIO0_INT_8822B BIT(16)
804 #define BIT_PDNINT_8822B BIT(7)
805 #define BIT_RON_INT_8822B BIT(6)
806 #define BIT_SPS_OCP_INT_8822B BIT(5)
807 #define BIT_GPIO15_0_INT_8822B BIT(0)
809 /* 2 REG_GPIO_EXT_CTRL_8822B */
811 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8822B 24
812 #define BIT_MASK_GPIO_MOD_15_TO_8_8822B 0xff
813 #define BIT_GPIO_MOD_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8822B) << BIT_SHIFT_GPIO_MOD_15_TO_8_8822B)
814 #define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & BIT_MASK_GPIO_MOD_15_TO_8_8822B)
817 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B 16
818 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B 0xff
819 #define BIT_GPIO_IO_SEL_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B) << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B)
820 #define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)
823 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8822B 8
824 #define BIT_MASK_GPIO_OUT_15_TO_8_8822B 0xff
825 #define BIT_GPIO_OUT_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8822B) << BIT_SHIFT_GPIO_OUT_15_TO_8_8822B)
826 #define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & BIT_MASK_GPIO_OUT_15_TO_8_8822B)
829 #define BIT_SHIFT_GPIO_IN_15_TO_8_8822B 0
830 #define BIT_MASK_GPIO_IN_15_TO_8_8822B 0xff
831 #define BIT_GPIO_IN_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_IN_15_TO_8_8822B) << BIT_SHIFT_GPIO_IN_15_TO_8_8822B)
832 #define BIT_GET_GPIO_IN_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & BIT_MASK_GPIO_IN_15_TO_8_8822B)
835 /* 2 REG_PAD_CTRL1_8822B */
836 #define BIT_PAPE_WLBT_SEL_8822B BIT(29)
837 #define BIT_LNAON_WLBT_SEL_8822B BIT(28)
838 #define BIT_BTGP_GPG3_FEN_8822B BIT(26)
839 #define BIT_BTGP_GPG2_FEN_8822B BIT(25)
840 #define BIT_BTGP_JTAG_EN_8822B BIT(24)
841 #define BIT_XTAL_CLK_EXTARNAL_EN_8822B BIT(23)
842 #define BIT_BTGP_UART0_EN_8822B BIT(22)
843 #define BIT_BTGP_UART1_EN_8822B BIT(21)
844 #define BIT_BTGP_SPI_EN_8822B BIT(20)
845 #define BIT_BTGP_GPIO_E2_8822B BIT(19)
846 #define BIT_BTGP_GPIO_EN_8822B BIT(18)
848 #define BIT_SHIFT_BTGP_GPIO_SL_8822B 16
849 #define BIT_MASK_BTGP_GPIO_SL_8822B 0x3
850 #define BIT_BTGP_GPIO_SL_8822B(x) (((x) & BIT_MASK_BTGP_GPIO_SL_8822B) << BIT_SHIFT_BTGP_GPIO_SL_8822B)
851 #define BIT_GET_BTGP_GPIO_SL_8822B(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)
853 #define BIT_PAD_SDIO_SR_8822B BIT(14)
854 #define BIT_GPIO14_OUTPUT_PL_8822B BIT(13)
855 #define BIT_HOST_WAKE_PAD_PULL_EN_8822B BIT(12)
856 #define BIT_HOST_WAKE_PAD_SL_8822B BIT(11)
857 #define BIT_PAD_LNAON_SR_8822B BIT(10)
858 #define BIT_PAD_LNAON_E2_8822B BIT(9)
859 #define BIT_SW_LNAON_G_SEL_DATA_8822B BIT(8)
860 #define BIT_SW_LNAON_A_SEL_DATA_8822B BIT(7)
861 #define BIT_PAD_PAPE_SR_8822B BIT(6)
862 #define BIT_PAD_PAPE_E2_8822B BIT(5)
863 #define BIT_SW_PAPE_G_SEL_DATA_8822B BIT(4)
864 #define BIT_SW_PAPE_A_SEL_DATA_8822B BIT(3)
865 #define BIT_PAD_DPDT_SR_8822B BIT(2)
866 #define BIT_PAD_DPDT_PAD_E2_8822B BIT(1)
867 #define BIT_SW_DPDT_SEL_DATA_8822B BIT(0)
869 /* 2 REG_WL_BT_PWR_CTRL_8822B */
870 #define BIT_ISO_BD2PP_8822B BIT(31)
871 #define BIT_LDOV12B_EN_8822B BIT(30)
872 #define BIT_CKEN_BTGPS_8822B BIT(29)
873 #define BIT_FEN_BTGPS_8822B BIT(28)
874 #define BIT_BTCPU_BOOTSEL_8822B BIT(27)
875 #define BIT_SPI_SPEEDUP_8822B BIT(26)
876 #define BIT_DEVWAKE_PAD_TYPE_SEL_8822B BIT(24)
877 #define BIT_CLKREQ_PAD_TYPE_SEL_8822B BIT(23)
878 #define BIT_ISO_BTPON2PP_8822B BIT(22)
879 #define BIT_BT_HWROF_EN_8822B BIT(19)
880 #define BIT_BT_FUNC_EN_8822B BIT(18)
881 #define BIT_BT_HWPDN_SL_8822B BIT(17)
882 #define BIT_BT_DISN_EN_8822B BIT(16)
883 #define BIT_BT_PDN_PULL_EN_8822B BIT(15)
884 #define BIT_WL_PDN_PULL_EN_8822B BIT(14)
885 #define BIT_EXTERNAL_REQUEST_PL_8822B BIT(13)
886 #define BIT_GPIO0_2_3_PULL_LOW_EN_8822B BIT(12)
887 #define BIT_ISO_BA2PP_8822B BIT(11)
888 #define BIT_BT_AFE_LDO_EN_8822B BIT(10)
889 #define BIT_BT_AFE_PLL_EN_8822B BIT(9)
890 #define BIT_BT_DIG_CLK_EN_8822B BIT(8)
891 #define BIT_WL_DRV_EXIST_IDX_8822B BIT(5)
892 #define BIT_DOP_EHPAD_8822B BIT(4)
893 #define BIT_WL_HWROF_EN_8822B BIT(3)
894 #define BIT_WL_FUNC_EN_8822B BIT(2)
895 #define BIT_WL_HWPDN_SL_8822B BIT(1)
896 #define BIT_WL_HWPDN_EN_8822B BIT(0)
898 /* 2 REG_SDM_DEBUG_8822B */
900 #define BIT_SHIFT_WLCLK_PHASE_8822B 0
901 #define BIT_MASK_WLCLK_PHASE_8822B 0x1f
902 #define BIT_WLCLK_PHASE_8822B(x) (((x) & BIT_MASK_WLCLK_PHASE_8822B) << BIT_SHIFT_WLCLK_PHASE_8822B)
903 #define BIT_GET_WLCLK_PHASE_8822B(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)
906 /* 2 REG_SYS_SDIO_CTRL_8822B */
907 #define BIT_DBG_GNT_WL_BT_8822B BIT(27)
908 #define BIT_LTE_MUX_CTRL_PATH_8822B BIT(26)
909 #define BIT_LTE_COEX_UART_8822B BIT(25)
910 #define BIT_3W_LTE_WL_GPIO_8822B BIT(24)
911 #define BIT_SDIO_INT_POLARITY_8822B BIT(19)
912 #define BIT_SDIO_INT_8822B BIT(18)
913 #define BIT_SDIO_OFF_EN_8822B BIT(17)
914 #define BIT_SDIO_ON_EN_8822B BIT(16)
915 #define BIT_PCIE_WAIT_TIMEOUT_EVENT_8822B BIT(10)
916 #define BIT_PCIE_WAIT_TIME_8822B BIT(9)
917 #define BIT_MPCIE_REFCLK_XTAL_SEL_8822B BIT(8)
919 /* 2 REG_HCI_OPT_CTRL_8822B */
921 #define BIT_SHIFT_TSFT_SEL_8822B 29
922 #define BIT_MASK_TSFT_SEL_8822B 0x7
923 #define BIT_TSFT_SEL_8822B(x) (((x) & BIT_MASK_TSFT_SEL_8822B) << BIT_SHIFT_TSFT_SEL_8822B)
924 #define BIT_GET_TSFT_SEL_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)
926 #define BIT_USB_HOST_PWR_OFF_EN_8822B BIT(12)
927 #define BIT_SYM_LPS_BLOCK_EN_8822B BIT(11)
928 #define BIT_USB_LPM_ACT_EN_8822B BIT(10)
929 #define BIT_USB_LPM_NY_8822B BIT(9)
930 #define BIT_USB_SUS_DIS_8822B BIT(8)
932 #define BIT_SHIFT_SDIO_PAD_E_8822B 5
933 #define BIT_MASK_SDIO_PAD_E_8822B 0x7
934 #define BIT_SDIO_PAD_E_8822B(x) (((x) & BIT_MASK_SDIO_PAD_E_8822B) << BIT_SHIFT_SDIO_PAD_E_8822B)
935 #define BIT_GET_SDIO_PAD_E_8822B(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)
937 #define BIT_USB_LPPLL_EN_8822B BIT(4)
938 #define BIT_ROP_SW15_8822B BIT(2)
939 #define BIT_PCI_CKRDY_OPT_8822B BIT(1)
940 #define BIT_PCI_VAUX_EN_8822B BIT(0)
942 /* 2 REG_AFE_CTRL4_8822B */
944 /* 2 REG_LDO_SWR_CTRL_8822B */
945 #define BIT_ZCD_HW_AUTO_EN_8822B BIT(27)
946 #define BIT_ZCD_REGSEL_8822B BIT(26)
948 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B 21
949 #define BIT_MASK_AUTO_ZCD_IN_CODE_8822B 0x1f
950 #define BIT_AUTO_ZCD_IN_CODE_8822B(x) (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B) << BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B)
951 #define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B)
954 #define BIT_SHIFT_ZCD_CODE_IN_L_8822B 16
955 #define BIT_MASK_ZCD_CODE_IN_L_8822B 0x1f
956 #define BIT_ZCD_CODE_IN_L_8822B(x) (((x) & BIT_MASK_ZCD_CODE_IN_L_8822B) << BIT_SHIFT_ZCD_CODE_IN_L_8822B)
957 #define BIT_GET_ZCD_CODE_IN_L_8822B(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)
960 #define BIT_SHIFT_LDO_HV5_DUMMY_8822B 14
961 #define BIT_MASK_LDO_HV5_DUMMY_8822B 0x3
962 #define BIT_LDO_HV5_DUMMY_8822B(x) (((x) & BIT_MASK_LDO_HV5_DUMMY_8822B) << BIT_SHIFT_LDO_HV5_DUMMY_8822B)
963 #define BIT_GET_LDO_HV5_DUMMY_8822B(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)
966 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B 12
967 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B 0x3
968 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B)
969 #define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)
972 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B 10
973 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B 0x3
974 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B)
975 #define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)
978 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B 8
979 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B 0x3
980 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B)
981 #define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)
983 #define BIT_REG_BYPASS_L_8822B BIT(7)
984 #define BIT_REG_LDOF_L_8822B BIT(6)
985 #define BIT_REG_TYPE_L_V1_8822B BIT(5)
986 #define BIT_ARENB_L_8822B BIT(3)
988 #define BIT_SHIFT_CFC_L_8822B 1
989 #define BIT_MASK_CFC_L_8822B 0x3
990 #define BIT_CFC_L_8822B(x) (((x) & BIT_MASK_CFC_L_8822B) << BIT_SHIFT_CFC_L_8822B)
991 #define BIT_GET_CFC_L_8822B(x) (((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)
993 #define BIT_REG_OCPS_L_V1_8822B BIT(0)
995 /* 2 REG_MCUFW_CTRL_8822B */
997 #define BIT_SHIFT_RPWM_8822B 24
998 #define BIT_MASK_RPWM_8822B 0xff
999 #define BIT_RPWM_8822B(x) (((x) & BIT_MASK_RPWM_8822B) << BIT_SHIFT_RPWM_8822B)
1000 #define BIT_GET_RPWM_8822B(x) (((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)
1002 #define BIT_ANA_PORT_EN_8822B BIT(22)
1003 #define BIT_MAC_PORT_EN_8822B BIT(21)
1004 #define BIT_BOOT_FSPI_EN_8822B BIT(20)
1005 #define BIT_ROM_DLEN_8822B BIT(19)
1007 #define BIT_SHIFT_ROM_PGE_8822B 16
1008 #define BIT_MASK_ROM_PGE_8822B 0x7
1009 #define BIT_ROM_PGE_8822B(x) (((x) & BIT_MASK_ROM_PGE_8822B) << BIT_SHIFT_ROM_PGE_8822B)
1010 #define BIT_GET_ROM_PGE_8822B(x) (((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)
1012 #define BIT_FW_INIT_RDY_8822B BIT(15)
1013 #define BIT_FW_DW_RDY_8822B BIT(14)
1015 #define BIT_SHIFT_CPU_CLK_SEL_8822B 12
1016 #define BIT_MASK_CPU_CLK_SEL_8822B 0x3
1017 #define BIT_CPU_CLK_SEL_8822B(x) (((x) & BIT_MASK_CPU_CLK_SEL_8822B) << BIT_SHIFT_CPU_CLK_SEL_8822B)
1018 #define BIT_GET_CPU_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)
1020 #define BIT_CCLK_CHG_MASK_8822B BIT(11)
1021 #define BIT_EMEM__TXBUF_CHKSUM_OK_8822B BIT(10)
1022 #define BIT_EMEM_TXBUF_DW_RDY_8822B BIT(9)
1023 #define BIT_EMEM_CHKSUM_OK_8822B BIT(8)
1024 #define BIT_EMEM_DW_OK_8822B BIT(7)
1025 #define BIT_DMEM_CHKSUM_OK_8822B BIT(6)
1026 #define BIT_DMEM_DW_OK_8822B BIT(5)
1027 #define BIT_IMEM_CHKSUM_OK_8822B BIT(4)
1028 #define BIT_IMEM_DW_OK_8822B BIT(3)
1029 #define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8822B BIT(2)
1030 #define BIT_IMEM_BOOT_LOAD_DW_OK_8822B BIT(1)
1031 #define BIT_MCUFWDL_EN_8822B BIT(0)
1033 /* 2 REG_MCU_TST_CFG_8822B */
1035 #define BIT_SHIFT_LBKTST_8822B 0
1036 #define BIT_MASK_LBKTST_8822B 0xffff
1037 #define BIT_LBKTST_8822B(x) (((x) & BIT_MASK_LBKTST_8822B) << BIT_SHIFT_LBKTST_8822B)
1038 #define BIT_GET_LBKTST_8822B(x) (((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)
1041 /* 2 REG_HMEBOX_E0_E1_8822B */
1043 #define BIT_SHIFT_HOST_MSG_E1_8822B 16
1044 #define BIT_MASK_HOST_MSG_E1_8822B 0xffff
1045 #define BIT_HOST_MSG_E1_8822B(x) (((x) & BIT_MASK_HOST_MSG_E1_8822B) << BIT_SHIFT_HOST_MSG_E1_8822B)
1046 #define BIT_GET_HOST_MSG_E1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)
1049 #define BIT_SHIFT_HOST_MSG_E0_8822B 0
1050 #define BIT_MASK_HOST_MSG_E0_8822B 0xffff
1051 #define BIT_HOST_MSG_E0_8822B(x) (((x) & BIT_MASK_HOST_MSG_E0_8822B) << BIT_SHIFT_HOST_MSG_E0_8822B)
1052 #define BIT_GET_HOST_MSG_E0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)
1055 /* 2 REG_HMEBOX_E2_E3_8822B */
1057 #define BIT_SHIFT_HOST_MSG_E3_8822B 16
1058 #define BIT_MASK_HOST_MSG_E3_8822B 0xffff
1059 #define BIT_HOST_MSG_E3_8822B(x) (((x) & BIT_MASK_HOST_MSG_E3_8822B) << BIT_SHIFT_HOST_MSG_E3_8822B)
1060 #define BIT_GET_HOST_MSG_E3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)
1063 #define BIT_SHIFT_HOST_MSG_E2_8822B 0
1064 #define BIT_MASK_HOST_MSG_E2_8822B 0xffff
1065 #define BIT_HOST_MSG_E2_8822B(x) (((x) & BIT_MASK_HOST_MSG_E2_8822B) << BIT_SHIFT_HOST_MSG_E2_8822B)
1066 #define BIT_GET_HOST_MSG_E2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)
1069 /* 2 REG_WLLPS_CTRL_8822B */
1070 #define BIT_WLLPSOP_EABM_8822B BIT(31)
1071 #define BIT_WLLPSOP_ACKF_8822B BIT(30)
1072 #define BIT_WLLPSOP_DLDM_8822B BIT(29)
1073 #define BIT_WLLPSOP_ESWR_8822B BIT(28)
1074 #define BIT_WLLPSOP_PWMM_8822B BIT(27)
1075 #define BIT_WLLPSOP_EECK_8822B BIT(26)
1076 #define BIT_WLLPSOP_WLMACOFF_8822B BIT(25)
1077 #define BIT_WLLPSOP_EXTAL_8822B BIT(24)
1078 #define BIT_WL_SYNPON_VOLTSPDN_8822B BIT(23)
1079 #define BIT_WLLPSOP_WLBBOFF_8822B BIT(22)
1080 #define BIT_WLLPSOP_WLMEM_DS_8822B BIT(21)
1082 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B 12
1083 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B 0xf
1084 #define BIT_LPLDH12_VADJ_STEP_DN_8822B(x) (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B) << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B)
1085 #define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)
1088 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B 8
1089 #define BIT_MASK_V15ADJ_L1_STEP_DN_8822B 0x7
1090 #define BIT_V15ADJ_L1_STEP_DN_8822B(x) (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B) << BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B)
1091 #define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B)
1093 #define BIT_REGU_32K_CLK_EN_8822B BIT(1)
1094 #define BIT_WL_LPS_EN_8822B BIT(0)
1096 /* 2 REG_AFE_CTRL5_8822B */
1097 #define BIT_BB_DBG_SEL_AFE_SDM_BIT0_8822B BIT(31)
1098 #define BIT_ORDER_SDM_8822B BIT(30)
1099 #define BIT_RFE_SEL_SDM_8822B BIT(29)
1101 #define BIT_SHIFT_REF_SEL_8822B 25
1102 #define BIT_MASK_REF_SEL_8822B 0xf
1103 #define BIT_REF_SEL_8822B(x) (((x) & BIT_MASK_REF_SEL_8822B) << BIT_SHIFT_REF_SEL_8822B)
1104 #define BIT_GET_REF_SEL_8822B(x) (((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)
1107 #define BIT_SHIFT_F0F_SDM_8822B 12
1108 #define BIT_MASK_F0F_SDM_8822B 0x1fff
1109 #define BIT_F0F_SDM_8822B(x) (((x) & BIT_MASK_F0F_SDM_8822B) << BIT_SHIFT_F0F_SDM_8822B)
1110 #define BIT_GET_F0F_SDM_8822B(x) (((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)
1113 #define BIT_SHIFT_F0N_SDM_8822B 9
1114 #define BIT_MASK_F0N_SDM_8822B 0x7
1115 #define BIT_F0N_SDM_8822B(x) (((x) & BIT_MASK_F0N_SDM_8822B) << BIT_SHIFT_F0N_SDM_8822B)
1116 #define BIT_GET_F0N_SDM_8822B(x) (((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)
1119 #define BIT_SHIFT_DIVN_SDM_8822B 3
1120 #define BIT_MASK_DIVN_SDM_8822B 0x3f
1121 #define BIT_DIVN_SDM_8822B(x) (((x) & BIT_MASK_DIVN_SDM_8822B) << BIT_SHIFT_DIVN_SDM_8822B)
1122 #define BIT_GET_DIVN_SDM_8822B(x) (((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)
1125 /* 2 REG_GPIO_DEBOUNCE_CTRL_8822B */
1126 #define BIT_WLGP_DBC1EN_8822B BIT(15)
1128 #define BIT_SHIFT_WLGP_DBC1_8822B 8
1129 #define BIT_MASK_WLGP_DBC1_8822B 0xf
1130 #define BIT_WLGP_DBC1_8822B(x) (((x) & BIT_MASK_WLGP_DBC1_8822B) << BIT_SHIFT_WLGP_DBC1_8822B)
1131 #define BIT_GET_WLGP_DBC1_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)
1133 #define BIT_WLGP_DBC0EN_8822B BIT(7)
1135 #define BIT_SHIFT_WLGP_DBC0_8822B 0
1136 #define BIT_MASK_WLGP_DBC0_8822B 0xf
1137 #define BIT_WLGP_DBC0_8822B(x) (((x) & BIT_MASK_WLGP_DBC0_8822B) << BIT_SHIFT_WLGP_DBC0_8822B)
1138 #define BIT_GET_WLGP_DBC0_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)
1141 /* 2 REG_RPWM2_8822B */
1143 #define BIT_SHIFT_RPWM2_8822B 16
1144 #define BIT_MASK_RPWM2_8822B 0xffff
1145 #define BIT_RPWM2_8822B(x) (((x) & BIT_MASK_RPWM2_8822B) << BIT_SHIFT_RPWM2_8822B)
1146 #define BIT_GET_RPWM2_8822B(x) (((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)
1149 /* 2 REG_SYSON_FSM_MON_8822B */
1151 #define BIT_SHIFT_FSM_MON_SEL_8822B 24
1152 #define BIT_MASK_FSM_MON_SEL_8822B 0x7
1153 #define BIT_FSM_MON_SEL_8822B(x) (((x) & BIT_MASK_FSM_MON_SEL_8822B) << BIT_SHIFT_FSM_MON_SEL_8822B)
1154 #define BIT_GET_FSM_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)
1156 #define BIT_DOP_ELDO_8822B BIT(23)
1157 #define BIT_FSM_MON_UPD_8822B BIT(15)
1159 #define BIT_SHIFT_FSM_PAR_8822B 0
1160 #define BIT_MASK_FSM_PAR_8822B 0x7fff
1161 #define BIT_FSM_PAR_8822B(x) (((x) & BIT_MASK_FSM_PAR_8822B) << BIT_SHIFT_FSM_PAR_8822B)
1162 #define BIT_GET_FSM_PAR_8822B(x) (((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)
1165 /* 2 REG_AFE_CTRL6_8822B */
1167 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0
1168 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0x7
1169 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1170 #define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1173 /* 2 REG_PMC_DBG_CTRL1_8822B */
1174 #define BIT_BT_INT_EN_8822B BIT(31)
1176 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B 16
1177 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8822B 0x7fff
1178 #define BIT_RD_WR_WIFI_BT_INFO_8822B(x) (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B) << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B)
1179 #define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)
1181 #define BIT_PMC_WR_OVF_8822B BIT(8)
1183 #define BIT_SHIFT_WLPMC_ERRINT_8822B 0
1184 #define BIT_MASK_WLPMC_ERRINT_8822B 0xff
1185 #define BIT_WLPMC_ERRINT_8822B(x) (((x) & BIT_MASK_WLPMC_ERRINT_8822B) << BIT_SHIFT_WLPMC_ERRINT_8822B)
1186 #define BIT_GET_WLPMC_ERRINT_8822B(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)
1189 /* 2 REG_AFE_CTRL7_8822B */
1191 #define BIT_SHIFT_SEL_V_8822B 30
1192 #define BIT_MASK_SEL_V_8822B 0x3
1193 #define BIT_SEL_V_8822B(x) (((x) & BIT_MASK_SEL_V_8822B) << BIT_SHIFT_SEL_V_8822B)
1194 #define BIT_GET_SEL_V_8822B(x) (((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)
1196 #define BIT_SEL_LDO_PC_8822B BIT(29)
1198 #define BIT_SHIFT_CK_MON_SEL_8822B 26
1199 #define BIT_MASK_CK_MON_SEL_8822B 0x7
1200 #define BIT_CK_MON_SEL_8822B(x) (((x) & BIT_MASK_CK_MON_SEL_8822B) << BIT_SHIFT_CK_MON_SEL_8822B)
1201 #define BIT_GET_CK_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)
1203 #define BIT_CK_MON_EN_8822B BIT(25)
1204 #define BIT_FREF_EDGE_8822B BIT(24)
1205 #define BIT_CK320M_EN_8822B BIT(23)
1206 #define BIT_CK_5M_EN_8822B BIT(22)
1207 #define BIT_TESTEN_8822B BIT(21)
1209 /* 2 REG_HIMR0_8822B */
1210 #define BIT_TIMEOUT_INTERRUPT2_MASK_8822B BIT(31)
1211 #define BIT_TIMEOUT_INTERRUTP1_MASK_8822B BIT(30)
1212 #define BIT_PSTIMEOUT_MSK_8822B BIT(29)
1213 #define BIT_GTINT4_MSK_8822B BIT(28)
1214 #define BIT_GTINT3_MSK_8822B BIT(27)
1215 #define BIT_TXBCN0ERR_MSK_8822B BIT(26)
1216 #define BIT_TXBCN0OK_MSK_8822B BIT(25)
1217 #define BIT_TSF_BIT32_TOGGLE_MSK_8822B BIT(24)
1218 #define BIT_BCNDMAINT0_MSK_8822B BIT(20)
1219 #define BIT_BCNDERR0_MSK_8822B BIT(16)
1220 #define BIT_HSISR_IND_ON_INT_MSK_8822B BIT(15)
1221 #define BIT_BCNDMAINT_E_MSK_8822B BIT(14)
1222 #define BIT_CTWEND_MSK_8822B BIT(12)
1223 #define BIT_HISR1_IND_MSK_8822B BIT(11)
1224 #define BIT_C2HCMD_MSK_8822B BIT(10)
1225 #define BIT_CPWM2_MSK_8822B BIT(9)
1226 #define BIT_CPWM_MSK_8822B BIT(8)
1227 #define BIT_HIGHDOK_MSK_8822B BIT(7)
1228 #define BIT_MGTDOK_MSK_8822B BIT(6)
1229 #define BIT_BKDOK_MSK_8822B BIT(5)
1230 #define BIT_BEDOK_MSK_8822B BIT(4)
1231 #define BIT_VIDOK_MSK_8822B BIT(3)
1232 #define BIT_VODOK_MSK_8822B BIT(2)
1233 #define BIT_RDU_MSK_8822B BIT(1)
1234 #define BIT_RXOK_MSK_8822B BIT(0)
1236 /* 2 REG_HISR0_8822B */
1237 #define BIT_TIMEOUT_INTERRUPT2_8822B BIT(31)
1238 #define BIT_TIMEOUT_INTERRUTP1_8822B BIT(30)
1239 #define BIT_PSTIMEOUT_8822B BIT(29)
1240 #define BIT_GTINT4_8822B BIT(28)
1241 #define BIT_GTINT3_8822B BIT(27)
1242 #define BIT_TXBCN0ERR_8822B BIT(26)
1243 #define BIT_TXBCN0OK_8822B BIT(25)
1244 #define BIT_TSF_BIT32_TOGGLE_8822B BIT(24)
1245 #define BIT_BCNDMAINT0_8822B BIT(20)
1246 #define BIT_BCNDERR0_8822B BIT(16)
1247 #define BIT_HSISR_IND_ON_INT_8822B BIT(15)
1248 #define BIT_BCNDMAINT_E_8822B BIT(14)
1249 #define BIT_CTWEND_8822B BIT(12)
1250 #define BIT_HISR1_IND_INT_8822B BIT(11)
1251 #define BIT_C2HCMD_8822B BIT(10)
1252 #define BIT_CPWM2_8822B BIT(9)
1253 #define BIT_CPWM_8822B BIT(8)
1254 #define BIT_HIGHDOK_8822B BIT(7)
1255 #define BIT_MGTDOK_8822B BIT(6)
1256 #define BIT_BKDOK_8822B BIT(5)
1257 #define BIT_BEDOK_8822B BIT(4)
1258 #define BIT_VIDOK_8822B BIT(3)
1259 #define BIT_VODOK_8822B BIT(2)
1260 #define BIT_RDU_8822B BIT(1)
1261 #define BIT_RXOK_8822B BIT(0)
1263 /* 2 REG_HIMR1_8822B */
1264 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1265 #define BIT_BTON_STS_UPDATE_MASK_8822B BIT(29)
1266 #define BIT_MCU_ERR_MASK_8822B BIT(28)
1267 #define BIT_BCNDMAINT7__MSK_8822B BIT(27)
1268 #define BIT_BCNDMAINT6__MSK_8822B BIT(26)
1269 #define BIT_BCNDMAINT5__MSK_8822B BIT(25)
1270 #define BIT_BCNDMAINT4__MSK_8822B BIT(24)
1271 #define BIT_BCNDMAINT3_MSK_8822B BIT(23)
1272 #define BIT_BCNDMAINT2_MSK_8822B BIT(22)
1273 #define BIT_BCNDMAINT1_MSK_8822B BIT(21)
1274 #define BIT_BCNDERR7_MSK_8822B BIT(20)
1275 #define BIT_BCNDERR6_MSK_8822B BIT(19)
1276 #define BIT_BCNDERR5_MSK_8822B BIT(18)
1277 #define BIT_BCNDERR4_MSK_8822B BIT(17)
1278 #define BIT_BCNDERR3_MSK_8822B BIT(16)
1279 #define BIT_BCNDERR2_MSK_8822B BIT(15)
1280 #define BIT_BCNDERR1_MSK_8822B BIT(14)
1281 #define BIT_ATIMEND_E_MSK_8822B BIT(13)
1282 #define BIT_ATIMEND__MSK_8822B BIT(12)
1283 #define BIT_TXERR_MSK_8822B BIT(11)
1284 #define BIT_RXERR_MSK_8822B BIT(10)
1285 #define BIT_TXFOVW_MSK_8822B BIT(9)
1286 #define BIT_FOVW_MSK_8822B BIT(8)
1287 #define BIT_CPU_MGQ_TXDONE_MSK_8822B BIT(5)
1288 #define BIT_PS_TIMER_C_MSK_8822B BIT(4)
1289 #define BIT_PS_TIMER_B_MSK_8822B BIT(3)
1290 #define BIT_PS_TIMER_A_MSK_8822B BIT(2)
1291 #define BIT_CPUMGQ_TX_TIMER_MSK_8822B BIT(1)
1293 /* 2 REG_HISR1_8822B */
1294 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1295 #define BIT_BTON_STS_UPDATE_INT_8822B BIT(29)
1296 #define BIT_MCU_ERR_8822B BIT(28)
1297 #define BIT_BCNDMAINT7_8822B BIT(27)
1298 #define BIT_BCNDMAINT6_8822B BIT(26)
1299 #define BIT_BCNDMAINT5_8822B BIT(25)
1300 #define BIT_BCNDMAINT4_8822B BIT(24)
1301 #define BIT_BCNDMAINT3_8822B BIT(23)
1302 #define BIT_BCNDMAINT2_8822B BIT(22)
1303 #define BIT_BCNDMAINT1_8822B BIT(21)
1304 #define BIT_BCNDERR7_8822B BIT(20)
1305 #define BIT_BCNDERR6_8822B BIT(19)
1306 #define BIT_BCNDERR5_8822B BIT(18)
1307 #define BIT_BCNDERR4_8822B BIT(17)
1308 #define BIT_BCNDERR3_8822B BIT(16)
1309 #define BIT_BCNDERR2_8822B BIT(15)
1310 #define BIT_BCNDERR1_8822B BIT(14)
1311 #define BIT_ATIMEND_E_8822B BIT(13)
1312 #define BIT_ATIMEND_8822B BIT(12)
1313 #define BIT_TXERR_INT_8822B BIT(11)
1314 #define BIT_RXERR_INT_8822B BIT(10)
1315 #define BIT_TXFOVW_8822B BIT(9)
1316 #define BIT_FOVW_8822B BIT(8)
1317 #define BIT_CPU_MGQ_TXDONE_8822B BIT(5)
1318 #define BIT_PS_TIMER_C_8822B BIT(4)
1319 #define BIT_PS_TIMER_B_8822B BIT(3)
1320 #define BIT_PS_TIMER_A_8822B BIT(2)
1321 #define BIT_CPUMGQ_TX_TIMER_8822B BIT(1)
1323 /* 2 REG_DBG_PORT_SEL_8822B */
1325 #define BIT_SHIFT_DEBUG_ST_8822B 0
1326 #define BIT_MASK_DEBUG_ST_8822B 0xffffffffL
1327 #define BIT_DEBUG_ST_8822B(x) (((x) & BIT_MASK_DEBUG_ST_8822B) << BIT_SHIFT_DEBUG_ST_8822B)
1328 #define BIT_GET_DEBUG_ST_8822B(x) (((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)
1331 /* 2 REG_PAD_CTRL2_8822B */
1332 #define BIT_USB3_USB2_TRANSITION_8822B BIT(20)
1334 #define BIT_SHIFT_USB23_SW_MODE_V1_8822B 18
1335 #define BIT_MASK_USB23_SW_MODE_V1_8822B 0x3
1336 #define BIT_USB23_SW_MODE_V1_8822B(x) (((x) & BIT_MASK_USB23_SW_MODE_V1_8822B) << BIT_SHIFT_USB23_SW_MODE_V1_8822B)
1337 #define BIT_GET_USB23_SW_MODE_V1_8822B(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & BIT_MASK_USB23_SW_MODE_V1_8822B)
1339 #define BIT_NO_PDN_CHIPOFF_V1_8822B BIT(17)
1340 #define BIT_RSM_EN_V1_8822B BIT(16)
1342 #define BIT_SHIFT_MATCH_CNT_8822B 8
1343 #define BIT_MASK_MATCH_CNT_8822B 0xff
1344 #define BIT_MATCH_CNT_8822B(x) (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
1345 #define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
1347 #define BIT_LD_B12V_EN_8822B BIT(7)
1348 #define BIT_EECS_IOSEL_V1_8822B BIT(6)
1349 #define BIT_EECS_DATA_O_V1_8822B BIT(5)
1350 #define BIT_EECS_DATA_I_V1_8822B BIT(4)
1351 #define BIT_EESK_IOSEL_V1_8822B BIT(2)
1352 #define BIT_EESK_DATA_O_V1_8822B BIT(1)
1353 #define BIT_EESK_DATA_I_V1_8822B BIT(0)
1355 /* 2 REG_NOT_VALID_8822B */
1357 /* 2 REG_PMC_DBG_CTRL2_8822B */
1359 #define BIT_SHIFT_EFUSE_BURN_GNT_8822B 24
1360 #define BIT_MASK_EFUSE_BURN_GNT_8822B 0xff
1361 #define BIT_EFUSE_BURN_GNT_8822B(x) (((x) & BIT_MASK_EFUSE_BURN_GNT_8822B) << BIT_SHIFT_EFUSE_BURN_GNT_8822B)
1362 #define BIT_GET_EFUSE_BURN_GNT_8822B(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & BIT_MASK_EFUSE_BURN_GNT_8822B)
1364 #define BIT_STOP_WL_PMC_8822B BIT(9)
1365 #define BIT_STOP_SYM_PMC_8822B BIT(8)
1366 #define BIT_REG_RST_WLPMC_8822B BIT(5)
1367 #define BIT_REG_RST_PD12N_8822B BIT(4)
1368 #define BIT_SYSON_DIS_WLREG_WRMSK_8822B BIT(3)
1369 #define BIT_SYSON_DIS_PMCREG_WRMSK_8822B BIT(2)
1371 #define BIT_SHIFT_SYSON_REG_ARB_8822B 0
1372 #define BIT_MASK_SYSON_REG_ARB_8822B 0x3
1373 #define BIT_SYSON_REG_ARB_8822B(x) (((x) & BIT_MASK_SYSON_REG_ARB_8822B) << BIT_SHIFT_SYSON_REG_ARB_8822B)
1374 #define BIT_GET_SYSON_REG_ARB_8822B(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)
1377 /* 2 REG_BIST_CTRL_8822B */
1378 #define BIT_BIST_USB_DIS_8822B BIT(27)
1379 #define BIT_BIST_PCI_DIS_8822B BIT(26)
1380 #define BIT_BIST_BT_DIS_8822B BIT(25)
1381 #define BIT_BIST_WL_DIS_8822B BIT(24)
1383 #define BIT_SHIFT_BIST_RPT_SEL_8822B 16
1384 #define BIT_MASK_BIST_RPT_SEL_8822B 0xf
1385 #define BIT_BIST_RPT_SEL_8822B(x) (((x) & BIT_MASK_BIST_RPT_SEL_8822B) << BIT_SHIFT_BIST_RPT_SEL_8822B)
1386 #define BIT_GET_BIST_RPT_SEL_8822B(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)
1388 #define BIT_BIST_RESUME_PS_8822B BIT(4)
1389 #define BIT_BIST_RESUME_8822B BIT(3)
1390 #define BIT_BIST_NORMAL_8822B BIT(2)
1391 #define BIT_BIST_RSTN_8822B BIT(1)
1392 #define BIT_BIST_CLK_EN_8822B BIT(0)
1394 /* 2 REG_BIST_RPT_8822B */
1396 #define BIT_SHIFT_MBIST_REPORT_8822B 0
1397 #define BIT_MASK_MBIST_REPORT_8822B 0xffffffffL
1398 #define BIT_MBIST_REPORT_8822B(x) (((x) & BIT_MASK_MBIST_REPORT_8822B) << BIT_SHIFT_MBIST_REPORT_8822B)
1399 #define BIT_GET_MBIST_REPORT_8822B(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)
1402 /* 2 REG_MEM_CTRL_8822B */
1403 #define BIT_UMEM_RME_8822B BIT(31)
1405 #define BIT_SHIFT_BT_SPRAM_8822B 28
1406 #define BIT_MASK_BT_SPRAM_8822B 0x3
1407 #define BIT_BT_SPRAM_8822B(x) (((x) & BIT_MASK_BT_SPRAM_8822B) << BIT_SHIFT_BT_SPRAM_8822B)
1408 #define BIT_GET_BT_SPRAM_8822B(x) (((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)
1411 #define BIT_SHIFT_BT_ROM_8822B 24
1412 #define BIT_MASK_BT_ROM_8822B 0xf
1413 #define BIT_BT_ROM_8822B(x) (((x) & BIT_MASK_BT_ROM_8822B) << BIT_SHIFT_BT_ROM_8822B)
1414 #define BIT_GET_BT_ROM_8822B(x) (((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)
1417 #define BIT_SHIFT_PCI_DPRAM_8822B 10
1418 #define BIT_MASK_PCI_DPRAM_8822B 0x3
1419 #define BIT_PCI_DPRAM_8822B(x) (((x) & BIT_MASK_PCI_DPRAM_8822B) << BIT_SHIFT_PCI_DPRAM_8822B)
1420 #define BIT_GET_PCI_DPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)
1423 #define BIT_SHIFT_PCI_SPRAM_8822B 8
1424 #define BIT_MASK_PCI_SPRAM_8822B 0x3
1425 #define BIT_PCI_SPRAM_8822B(x) (((x) & BIT_MASK_PCI_SPRAM_8822B) << BIT_SHIFT_PCI_SPRAM_8822B)
1426 #define BIT_GET_PCI_SPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)
1429 #define BIT_SHIFT_USB_SPRAM_8822B 6
1430 #define BIT_MASK_USB_SPRAM_8822B 0x3
1431 #define BIT_USB_SPRAM_8822B(x) (((x) & BIT_MASK_USB_SPRAM_8822B) << BIT_SHIFT_USB_SPRAM_8822B)
1432 #define BIT_GET_USB_SPRAM_8822B(x) (((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)
1435 #define BIT_SHIFT_USB_SPRF_8822B 4
1436 #define BIT_MASK_USB_SPRF_8822B 0x3
1437 #define BIT_USB_SPRF_8822B(x) (((x) & BIT_MASK_USB_SPRF_8822B) << BIT_SHIFT_USB_SPRF_8822B)
1438 #define BIT_GET_USB_SPRF_8822B(x) (((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)
1441 #define BIT_SHIFT_MCU_ROM_8822B 0
1442 #define BIT_MASK_MCU_ROM_8822B 0xf
1443 #define BIT_MCU_ROM_8822B(x) (((x) & BIT_MASK_MCU_ROM_8822B) << BIT_SHIFT_MCU_ROM_8822B)
1444 #define BIT_GET_MCU_ROM_8822B(x) (((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)
1447 /* 2 REG_AFE_CTRL8_8822B */
1448 #define BIT_SYN_AGPIO_8822B BIT(20)
1449 #define BIT_XTAL_LP_8822B BIT(4)
1450 #define BIT_XTAL_GM_SEP_8822B BIT(3)
1452 #define BIT_SHIFT_XTAL_SEL_TOK_8822B 0
1453 #define BIT_MASK_XTAL_SEL_TOK_8822B 0x7
1454 #define BIT_XTAL_SEL_TOK_8822B(x) (((x) & BIT_MASK_XTAL_SEL_TOK_8822B) << BIT_SHIFT_XTAL_SEL_TOK_8822B)
1455 #define BIT_GET_XTAL_SEL_TOK_8822B(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)
1458 /* 2 REG_USB_SIE_INTF_8822B */
1459 #define BIT_RD_SEL_8822B BIT(31)
1460 #define BIT_USB_SIE_INTF_WE_V1_8822B BIT(30)
1461 #define BIT_USB_SIE_INTF_BYIOREG_V1_8822B BIT(29)
1462 #define BIT_USB_SIE_SELECT_8822B BIT(28)
1464 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B 16
1465 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B 0x1ff
1466 #define BIT_USB_SIE_INTF_ADDR_V1_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B) << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B)
1467 #define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)
1470 #define BIT_SHIFT_USB_SIE_INTF_RD_8822B 8
1471 #define BIT_MASK_USB_SIE_INTF_RD_8822B 0xff
1472 #define BIT_USB_SIE_INTF_RD_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_RD_8822B) << BIT_SHIFT_USB_SIE_INTF_RD_8822B)
1473 #define BIT_GET_USB_SIE_INTF_RD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & BIT_MASK_USB_SIE_INTF_RD_8822B)
1476 #define BIT_SHIFT_USB_SIE_INTF_WD_8822B 0
1477 #define BIT_MASK_USB_SIE_INTF_WD_8822B 0xff
1478 #define BIT_USB_SIE_INTF_WD_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_WD_8822B) << BIT_SHIFT_USB_SIE_INTF_WD_8822B)
1479 #define BIT_GET_USB_SIE_INTF_WD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & BIT_MASK_USB_SIE_INTF_WD_8822B)
1482 /* 2 REG_PCIE_MIO_INTF_8822B */
1483 #define BIT_PCIE_MIO_BYIOREG_8822B BIT(13)
1484 #define BIT_PCIE_MIO_RE_8822B BIT(12)
1486 #define BIT_SHIFT_PCIE_MIO_WE_8822B 8
1487 #define BIT_MASK_PCIE_MIO_WE_8822B 0xf
1488 #define BIT_PCIE_MIO_WE_8822B(x) (((x) & BIT_MASK_PCIE_MIO_WE_8822B) << BIT_SHIFT_PCIE_MIO_WE_8822B)
1489 #define BIT_GET_PCIE_MIO_WE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)
1492 #define BIT_SHIFT_PCIE_MIO_ADDR_8822B 0
1493 #define BIT_MASK_PCIE_MIO_ADDR_8822B 0xff
1494 #define BIT_PCIE_MIO_ADDR_8822B(x) (((x) & BIT_MASK_PCIE_MIO_ADDR_8822B) << BIT_SHIFT_PCIE_MIO_ADDR_8822B)
1495 #define BIT_GET_PCIE_MIO_ADDR_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)
1498 /* 2 REG_PCIE_MIO_INTD_8822B */
1500 #define BIT_SHIFT_PCIE_MIO_DATA_8822B 0
1501 #define BIT_MASK_PCIE_MIO_DATA_8822B 0xffffffffL
1502 #define BIT_PCIE_MIO_DATA_8822B(x) (((x) & BIT_MASK_PCIE_MIO_DATA_8822B) << BIT_SHIFT_PCIE_MIO_DATA_8822B)
1503 #define BIT_GET_PCIE_MIO_DATA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)
1506 /* 2 REG_WLRF1_8822B */
1508 #define BIT_SHIFT_WLRF1_CTRL_8822B 24
1509 #define BIT_MASK_WLRF1_CTRL_8822B 0xff
1510 #define BIT_WLRF1_CTRL_8822B(x) (((x) & BIT_MASK_WLRF1_CTRL_8822B) << BIT_SHIFT_WLRF1_CTRL_8822B)
1511 #define BIT_GET_WLRF1_CTRL_8822B(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)
1514 /* 2 REG_SYS_CFG1_8822B */
1516 #define BIT_SHIFT_TRP_ICFG_8822B 28
1517 #define BIT_MASK_TRP_ICFG_8822B 0xf
1518 #define BIT_TRP_ICFG_8822B(x) (((x) & BIT_MASK_TRP_ICFG_8822B) << BIT_SHIFT_TRP_ICFG_8822B)
1519 #define BIT_GET_TRP_ICFG_8822B(x) (((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)
1521 #define BIT_RF_TYPE_ID_8822B BIT(27)
1522 #define BIT_BD_HCI_SEL_8822B BIT(26)
1523 #define BIT_BD_PKG_SEL_8822B BIT(25)
1524 #define BIT_SPSLDO_SEL_8822B BIT(24)
1525 #define BIT_RTL_ID_8822B BIT(23)
1526 #define BIT_PAD_HWPD_IDN_8822B BIT(22)
1527 #define BIT_TESTMODE_8822B BIT(20)
1529 #define BIT_SHIFT_VENDOR_ID_8822B 16
1530 #define BIT_MASK_VENDOR_ID_8822B 0xf
1531 #define BIT_VENDOR_ID_8822B(x) (((x) & BIT_MASK_VENDOR_ID_8822B) << BIT_SHIFT_VENDOR_ID_8822B)
1532 #define BIT_GET_VENDOR_ID_8822B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)
1535 #define BIT_SHIFT_CHIP_VER_8822B 12
1536 #define BIT_MASK_CHIP_VER_8822B 0xf
1537 #define BIT_CHIP_VER_8822B(x) (((x) & BIT_MASK_CHIP_VER_8822B) << BIT_SHIFT_CHIP_VER_8822B)
1538 #define BIT_GET_CHIP_VER_8822B(x) (((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)
1540 #define BIT_BD_MAC3_8822B BIT(11)
1541 #define BIT_BD_MAC1_8822B BIT(10)
1542 #define BIT_BD_MAC2_8822B BIT(9)
1543 #define BIT_SIC_IDLE_8822B BIT(8)
1544 #define BIT_SW_OFFLOAD_EN_8822B BIT(7)
1545 #define BIT_OCP_SHUTDN_8822B BIT(6)
1546 #define BIT_V15_VLD_8822B BIT(5)
1547 #define BIT_PCIRSTB_8822B BIT(4)
1548 #define BIT_PCLK_VLD_8822B BIT(3)
1549 #define BIT_UCLK_VLD_8822B BIT(2)
1550 #define BIT_ACLK_VLD_8822B BIT(1)
1551 #define BIT_XCLK_VLD_8822B BIT(0)
1553 /* 2 REG_SYS_STATUS1_8822B */
1555 #define BIT_SHIFT_RF_RL_ID_8822B 28
1556 #define BIT_MASK_RF_RL_ID_8822B 0xf
1557 #define BIT_RF_RL_ID_8822B(x) (((x) & BIT_MASK_RF_RL_ID_8822B) << BIT_SHIFT_RF_RL_ID_8822B)
1558 #define BIT_GET_RF_RL_ID_8822B(x) (((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)
1560 #define BIT_HPHY_ICFG_8822B BIT(19)
1562 #define BIT_SHIFT_SEL_0XC0_8822B 16
1563 #define BIT_MASK_SEL_0XC0_8822B 0x3
1564 #define BIT_SEL_0XC0_8822B(x) (((x) & BIT_MASK_SEL_0XC0_8822B) << BIT_SHIFT_SEL_0XC0_8822B)
1565 #define BIT_GET_SEL_0XC0_8822B(x) (((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)
1568 #define BIT_SHIFT_HCI_SEL_V3_8822B 12
1569 #define BIT_MASK_HCI_SEL_V3_8822B 0x7
1570 #define BIT_HCI_SEL_V3_8822B(x) (((x) & BIT_MASK_HCI_SEL_V3_8822B) << BIT_SHIFT_HCI_SEL_V3_8822B)
1571 #define BIT_GET_HCI_SEL_V3_8822B(x) (((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)
1573 #define BIT_USB_OPERATION_MODE_8822B BIT(10)
1574 #define BIT_BT_PDN_8822B BIT(9)
1575 #define BIT_AUTO_WLPON_8822B BIT(8)
1576 #define BIT_WL_MODE_8822B BIT(7)
1577 #define BIT_PKG_SEL_HCI_8822B BIT(6)
1579 #define BIT_SHIFT_PAD_HCI_SEL_V1_8822B 3
1580 #define BIT_MASK_PAD_HCI_SEL_V1_8822B 0x7
1581 #define BIT_PAD_HCI_SEL_V1_8822B(x) (((x) & BIT_MASK_PAD_HCI_SEL_V1_8822B) << BIT_SHIFT_PAD_HCI_SEL_V1_8822B)
1582 #define BIT_GET_PAD_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & BIT_MASK_PAD_HCI_SEL_V1_8822B)
1585 #define BIT_SHIFT_EFS_HCI_SEL_V1_8822B 0
1586 #define BIT_MASK_EFS_HCI_SEL_V1_8822B 0x7
1587 #define BIT_EFS_HCI_SEL_V1_8822B(x) (((x) & BIT_MASK_EFS_HCI_SEL_V1_8822B) << BIT_SHIFT_EFS_HCI_SEL_V1_8822B)
1588 #define BIT_GET_EFS_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & BIT_MASK_EFS_HCI_SEL_V1_8822B)
1591 /* 2 REG_SYS_STATUS2_8822B */
1592 #define BIT_SIO_ALDN_8822B BIT(19)
1593 #define BIT_USB_ALDN_8822B BIT(18)
1594 #define BIT_PCI_ALDN_8822B BIT(17)
1595 #define BIT_SYS_ALDN_8822B BIT(16)
1597 #define BIT_SHIFT_EPVID1_8822B 8
1598 #define BIT_MASK_EPVID1_8822B 0xff
1599 #define BIT_EPVID1_8822B(x) (((x) & BIT_MASK_EPVID1_8822B) << BIT_SHIFT_EPVID1_8822B)
1600 #define BIT_GET_EPVID1_8822B(x) (((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)
1603 #define BIT_SHIFT_EPVID0_8822B 0
1604 #define BIT_MASK_EPVID0_8822B 0xff
1605 #define BIT_EPVID0_8822B(x) (((x) & BIT_MASK_EPVID0_8822B) << BIT_SHIFT_EPVID0_8822B)
1606 #define BIT_GET_EPVID0_8822B(x) (((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)
1609 /* 2 REG_SYS_CFG2_8822B */
1610 #define BIT_HCI_SEL_EMBEDED_8822B BIT(8)
1612 #define BIT_SHIFT_HW_ID_8822B 0
1613 #define BIT_MASK_HW_ID_8822B 0xff
1614 #define BIT_HW_ID_8822B(x) (((x) & BIT_MASK_HW_ID_8822B) << BIT_SHIFT_HW_ID_8822B)
1615 #define BIT_GET_HW_ID_8822B(x) (((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)
1618 /* 2 REG_SYS_CFG3_8822B */
1619 #define BIT_PWC_MA33V_8822B BIT(15)
1620 #define BIT_PWC_MA12V_8822B BIT(14)
1621 #define BIT_PWC_MD12V_8822B BIT(13)
1622 #define BIT_PWC_PD12V_8822B BIT(12)
1623 #define BIT_PWC_UD12V_8822B BIT(11)
1624 #define BIT_ISO_MA2MD_8822B BIT(1)
1625 #define BIT_ISO_MD2PP_8822B BIT(0)
1627 /* 2 REG_SYS_CFG4_8822B */
1629 /* 2 REG_SYS_CFG5_8822B */
1630 #define BIT_LPS_STATUS_8822B BIT(3)
1631 #define BIT_HCI_TXDMA_BUSY_8822B BIT(2)
1632 #define BIT_HCI_TXDMA_ALLOW_8822B BIT(1)
1633 #define BIT_FW_CTRL_HCI_TXDMA_EN_8822B BIT(0)
1635 /* 2 REG_CPU_DMEM_CON_8822B */
1636 #define BIT_WDT_OPT_IOWRAPPER_8822B BIT(19)
1637 #define BIT_ANA_PORT_IDLE_8822B BIT(18)
1638 #define BIT_MAC_PORT_IDLE_8822B BIT(17)
1639 #define BIT_WL_PLATFORM_RST_8822B BIT(16)
1640 #define BIT_WL_SECURITY_CLK_8822B BIT(15)
1642 #define BIT_SHIFT_CPU_DMEM_CON_8822B 0
1643 #define BIT_MASK_CPU_DMEM_CON_8822B 0xff
1644 #define BIT_CPU_DMEM_CON_8822B(x) (((x) & BIT_MASK_CPU_DMEM_CON_8822B) << BIT_SHIFT_CPU_DMEM_CON_8822B)
1645 #define BIT_GET_CPU_DMEM_CON_8822B(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)
1648 /* 2 REG_BOOT_REASON_8822B */
1650 #define BIT_SHIFT_BOOT_REASON_8822B 0
1651 #define BIT_MASK_BOOT_REASON_8822B 0x7
1652 #define BIT_BOOT_REASON_8822B(x) (((x) & BIT_MASK_BOOT_REASON_8822B) << BIT_SHIFT_BOOT_REASON_8822B)
1653 #define BIT_GET_BOOT_REASON_8822B(x) (((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)
1656 /* 2 REG_NFCPAD_CTRL_8822B */
1657 #define BIT_PAD_SHUTDW_8822B BIT(18)
1658 #define BIT_SYSON_NFC_PAD_8822B BIT(17)
1659 #define BIT_NFC_INT_PAD_CTRL_8822B BIT(16)
1660 #define BIT_NFC_RFDIS_PAD_CTRL_8822B BIT(15)
1661 #define BIT_NFC_CLK_PAD_CTRL_8822B BIT(14)
1662 #define BIT_NFC_DATA_PAD_CTRL_8822B BIT(13)
1663 #define BIT_NFC_PAD_PULL_CTRL_8822B BIT(12)
1665 #define BIT_SHIFT_NFCPAD_IO_SEL_8822B 8
1666 #define BIT_MASK_NFCPAD_IO_SEL_8822B 0xf
1667 #define BIT_NFCPAD_IO_SEL_8822B(x) (((x) & BIT_MASK_NFCPAD_IO_SEL_8822B) << BIT_SHIFT_NFCPAD_IO_SEL_8822B)
1668 #define BIT_GET_NFCPAD_IO_SEL_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)
1671 #define BIT_SHIFT_NFCPAD_OUT_8822B 4
1672 #define BIT_MASK_NFCPAD_OUT_8822B 0xf
1673 #define BIT_NFCPAD_OUT_8822B(x) (((x) & BIT_MASK_NFCPAD_OUT_8822B) << BIT_SHIFT_NFCPAD_OUT_8822B)
1674 #define BIT_GET_NFCPAD_OUT_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)
1677 #define BIT_SHIFT_NFCPAD_IN_8822B 0
1678 #define BIT_MASK_NFCPAD_IN_8822B 0xf
1679 #define BIT_NFCPAD_IN_8822B(x) (((x) & BIT_MASK_NFCPAD_IN_8822B) << BIT_SHIFT_NFCPAD_IN_8822B)
1680 #define BIT_GET_NFCPAD_IN_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)
1683 /* 2 REG_HIMR2_8822B */
1684 #define BIT_BCNDMAINT_P4_MSK_8822B BIT(31)
1685 #define BIT_BCNDMAINT_P3_MSK_8822B BIT(30)
1686 #define BIT_BCNDMAINT_P2_MSK_8822B BIT(29)
1687 #define BIT_BCNDMAINT_P1_MSK_8822B BIT(28)
1688 #define BIT_ATIMEND7_MSK_8822B BIT(22)
1689 #define BIT_ATIMEND6_MSK_8822B BIT(21)
1690 #define BIT_ATIMEND5_MSK_8822B BIT(20)
1691 #define BIT_ATIMEND4_MSK_8822B BIT(19)
1692 #define BIT_ATIMEND3_MSK_8822B BIT(18)
1693 #define BIT_ATIMEND2_MSK_8822B BIT(17)
1694 #define BIT_ATIMEND1_MSK_8822B BIT(16)
1695 #define BIT_TXBCN7OK_MSK_8822B BIT(14)
1696 #define BIT_TXBCN6OK_MSK_8822B BIT(13)
1697 #define BIT_TXBCN5OK_MSK_8822B BIT(12)
1698 #define BIT_TXBCN4OK_MSK_8822B BIT(11)
1699 #define BIT_TXBCN3OK_MSK_8822B BIT(10)
1700 #define BIT_TXBCN2OK_MSK_8822B BIT(9)
1701 #define BIT_TXBCN1OK_MSK_V1_8822B BIT(8)
1702 #define BIT_TXBCN7ERR_MSK_8822B BIT(6)
1703 #define BIT_TXBCN6ERR_MSK_8822B BIT(5)
1704 #define BIT_TXBCN5ERR_MSK_8822B BIT(4)
1705 #define BIT_TXBCN4ERR_MSK_8822B BIT(3)
1706 #define BIT_TXBCN3ERR_MSK_8822B BIT(2)
1707 #define BIT_TXBCN2ERR_MSK_8822B BIT(1)
1708 #define BIT_TXBCN1ERR_MSK_V1_8822B BIT(0)
1710 /* 2 REG_HISR2_8822B */
1711 #define BIT_BCNDMAINT_P4_8822B BIT(31)
1712 #define BIT_BCNDMAINT_P3_8822B BIT(30)
1713 #define BIT_BCNDMAINT_P2_8822B BIT(29)
1714 #define BIT_BCNDMAINT_P1_8822B BIT(28)
1715 #define BIT_ATIMEND7_8822B BIT(22)
1716 #define BIT_ATIMEND6_8822B BIT(21)
1717 #define BIT_ATIMEND5_8822B BIT(20)
1718 #define BIT_ATIMEND4_8822B BIT(19)
1719 #define BIT_ATIMEND3_8822B BIT(18)
1720 #define BIT_ATIMEND2_8822B BIT(17)
1721 #define BIT_ATIMEND1_8822B BIT(16)
1722 #define BIT_TXBCN7OK_8822B BIT(14)
1723 #define BIT_TXBCN6OK_8822B BIT(13)
1724 #define BIT_TXBCN5OK_8822B BIT(12)
1725 #define BIT_TXBCN4OK_8822B BIT(11)
1726 #define BIT_TXBCN3OK_8822B BIT(10)
1727 #define BIT_TXBCN2OK_8822B BIT(9)
1728 #define BIT_TXBCN1OK_8822B BIT(8)
1729 #define BIT_TXBCN7ERR_8822B BIT(6)
1730 #define BIT_TXBCN6ERR_8822B BIT(5)
1731 #define BIT_TXBCN5ERR_8822B BIT(4)
1732 #define BIT_TXBCN4ERR_8822B BIT(3)
1733 #define BIT_TXBCN3ERR_8822B BIT(2)
1734 #define BIT_TXBCN2ERR_8822B BIT(1)
1735 #define BIT_TXBCN1ERR_8822B BIT(0)
1737 /* 2 REG_HIMR3_8822B */
1738 #define BIT_WDT_PLATFORM_INT_MSK_8822B BIT(18)
1739 #define BIT_WDT_CPU_INT_MSK_8822B BIT(17)
1740 #define BIT_SETH2CDOK_MASK_8822B BIT(16)
1741 #define BIT_H2C_CMD_FULL_MASK_8822B BIT(15)
1742 #define BIT_PWR_INT_127_MASK_8822B BIT(14)
1743 #define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8822B BIT(13)
1744 #define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8822B BIT(12)
1745 #define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8822B BIT(11)
1746 #define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8822B BIT(10)
1747 #define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8822B BIT(9)
1748 #define BIT_PWR_INT_127_MASK_V1_8822B BIT(8)
1749 #define BIT_PWR_INT_126TO96_MASK_8822B BIT(7)
1750 #define BIT_PWR_INT_95TO64_MASK_8822B BIT(6)
1751 #define BIT_PWR_INT_63TO32_MASK_8822B BIT(5)
1752 #define BIT_PWR_INT_31TO0_MASK_8822B BIT(4)
1753 #define BIT_DDMA0_LP_INT_MSK_8822B BIT(1)
1754 #define BIT_DDMA0_HP_INT_MSK_8822B BIT(0)
1756 /* 2 REG_HISR3_8822B */
1757 #define BIT_WDT_PLATFORM_INT_8822B BIT(18)
1758 #define BIT_WDT_CPU_INT_8822B BIT(17)
1759 #define BIT_SETH2CDOK_8822B BIT(16)
1760 #define BIT_H2C_CMD_FULL_8822B BIT(15)
1761 #define BIT_PWR_INT_127_8822B BIT(14)
1762 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8822B BIT(13)
1763 #define BIT_TXSHORTCUT_BKUPDATEOK_8822B BIT(12)
1764 #define BIT_TXSHORTCUT_BEUPDATEOK_8822B BIT(11)
1765 #define BIT_TXSHORTCUT_VIUPDATEOK_8822B BIT(10)
1766 #define BIT_TXSHORTCUT_VOUPDATEOK_8822B BIT(9)
1767 #define BIT_PWR_INT_127_V1_8822B BIT(8)
1768 #define BIT_PWR_INT_126TO96_8822B BIT(7)
1769 #define BIT_PWR_INT_95TO64_8822B BIT(6)
1770 #define BIT_PWR_INT_63TO32_8822B BIT(5)
1771 #define BIT_PWR_INT_31TO0_8822B BIT(4)
1772 #define BIT_DDMA0_LP_INT_8822B BIT(1)
1773 #define BIT_DDMA0_HP_INT_8822B BIT(0)
1775 /* 2 REG_SW_MDIO_8822B */
1776 #define BIT_DIS_TIMEOUT_IO_8822B BIT(24)
1778 /* 2 REG_SW_FLUSH_8822B */
1779 #define BIT_FLUSH_HOLDN_EN_8822B BIT(25)
1780 #define BIT_FLUSH_WR_EN_8822B BIT(24)
1781 #define BIT_SW_FLASH_CONTROL_8822B BIT(23)
1782 #define BIT_SW_FLASH_WEN_E_8822B BIT(19)
1783 #define BIT_SW_FLASH_HOLDN_E_8822B BIT(18)
1784 #define BIT_SW_FLASH_SO_E_8822B BIT(17)
1785 #define BIT_SW_FLASH_SI_E_8822B BIT(16)
1786 #define BIT_SW_FLASH_SK_O_8822B BIT(13)
1787 #define BIT_SW_FLASH_CEN_O_8822B BIT(12)
1788 #define BIT_SW_FLASH_WEN_O_8822B BIT(11)
1789 #define BIT_SW_FLASH_HOLDN_O_8822B BIT(10)
1790 #define BIT_SW_FLASH_SO_O_8822B BIT(9)
1791 #define BIT_SW_FLASH_SI_O_8822B BIT(8)
1792 #define BIT_SW_FLASH_WEN_I_8822B BIT(3)
1793 #define BIT_SW_FLASH_HOLDN_I_8822B BIT(2)
1794 #define BIT_SW_FLASH_SO_I_8822B BIT(1)
1795 #define BIT_SW_FLASH_SI_I_8822B BIT(0)
1797 /* 2 REG_H2C_PKT_READADDR_8822B */
1799 #define BIT_SHIFT_H2C_PKT_READADDR_8822B 0
1800 #define BIT_MASK_H2C_PKT_READADDR_8822B 0x3ffff
1801 #define BIT_H2C_PKT_READADDR_8822B(x) (((x) & BIT_MASK_H2C_PKT_READADDR_8822B) << BIT_SHIFT_H2C_PKT_READADDR_8822B)
1802 #define BIT_GET_H2C_PKT_READADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & BIT_MASK_H2C_PKT_READADDR_8822B)
1805 /* 2 REG_H2C_PKT_WRITEADDR_8822B */
1807 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8822B 0
1808 #define BIT_MASK_H2C_PKT_WRITEADDR_8822B 0x3ffff
1809 #define BIT_H2C_PKT_WRITEADDR_8822B(x) (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8822B) << BIT_SHIFT_H2C_PKT_WRITEADDR_8822B)
1810 #define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & BIT_MASK_H2C_PKT_WRITEADDR_8822B)
1813 /* 2 REG_MEM_PWR_CRTL_8822B */
1814 #define BIT_MEM_BB_SD_8822B BIT(17)
1815 #define BIT_MEM_BB_DS_8822B BIT(16)
1816 #define BIT_MEM_BT_DS_8822B BIT(10)
1817 #define BIT_MEM_SDIO_LS_8822B BIT(9)
1818 #define BIT_MEM_SDIO_DS_8822B BIT(8)
1819 #define BIT_MEM_USB_LS_8822B BIT(7)
1820 #define BIT_MEM_USB_DS_8822B BIT(6)
1821 #define BIT_MEM_PCI_LS_8822B BIT(5)
1822 #define BIT_MEM_PCI_DS_8822B BIT(4)
1823 #define BIT_MEM_WLMAC_LS_8822B BIT(3)
1824 #define BIT_MEM_WLMAC_DS_8822B BIT(2)
1825 #define BIT_MEM_WLMCU_LS_8822B BIT(1)
1826 #define BIT_MEM_WLMCU_DS_8822B BIT(0)
1828 /* 2 REG_FW_DBG0_8822B */
1830 #define BIT_SHIFT_FW_DBG0_8822B 0
1831 #define BIT_MASK_FW_DBG0_8822B 0xffffffffL
1832 #define BIT_FW_DBG0_8822B(x) (((x) & BIT_MASK_FW_DBG0_8822B) << BIT_SHIFT_FW_DBG0_8822B)
1833 #define BIT_GET_FW_DBG0_8822B(x) (((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)
1836 /* 2 REG_FW_DBG1_8822B */
1838 #define BIT_SHIFT_FW_DBG1_8822B 0
1839 #define BIT_MASK_FW_DBG1_8822B 0xffffffffL
1840 #define BIT_FW_DBG1_8822B(x) (((x) & BIT_MASK_FW_DBG1_8822B) << BIT_SHIFT_FW_DBG1_8822B)
1841 #define BIT_GET_FW_DBG1_8822B(x) (((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)
1844 /* 2 REG_FW_DBG2_8822B */
1846 #define BIT_SHIFT_FW_DBG2_8822B 0
1847 #define BIT_MASK_FW_DBG2_8822B 0xffffffffL
1848 #define BIT_FW_DBG2_8822B(x) (((x) & BIT_MASK_FW_DBG2_8822B) << BIT_SHIFT_FW_DBG2_8822B)
1849 #define BIT_GET_FW_DBG2_8822B(x) (((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)
1852 /* 2 REG_FW_DBG3_8822B */
1854 #define BIT_SHIFT_FW_DBG3_8822B 0
1855 #define BIT_MASK_FW_DBG3_8822B 0xffffffffL
1856 #define BIT_FW_DBG3_8822B(x) (((x) & BIT_MASK_FW_DBG3_8822B) << BIT_SHIFT_FW_DBG3_8822B)
1857 #define BIT_GET_FW_DBG3_8822B(x) (((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)
1860 /* 2 REG_FW_DBG4_8822B */
1862 #define BIT_SHIFT_FW_DBG4_8822B 0
1863 #define BIT_MASK_FW_DBG4_8822B 0xffffffffL
1864 #define BIT_FW_DBG4_8822B(x) (((x) & BIT_MASK_FW_DBG4_8822B) << BIT_SHIFT_FW_DBG4_8822B)
1865 #define BIT_GET_FW_DBG4_8822B(x) (((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)
1868 /* 2 REG_FW_DBG5_8822B */
1870 #define BIT_SHIFT_FW_DBG5_8822B 0
1871 #define BIT_MASK_FW_DBG5_8822B 0xffffffffL
1872 #define BIT_FW_DBG5_8822B(x) (((x) & BIT_MASK_FW_DBG5_8822B) << BIT_SHIFT_FW_DBG5_8822B)
1873 #define BIT_GET_FW_DBG5_8822B(x) (((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)
1876 /* 2 REG_FW_DBG6_8822B */
1878 #define BIT_SHIFT_FW_DBG6_8822B 0
1879 #define BIT_MASK_FW_DBG6_8822B 0xffffffffL
1880 #define BIT_FW_DBG6_8822B(x) (((x) & BIT_MASK_FW_DBG6_8822B) << BIT_SHIFT_FW_DBG6_8822B)
1881 #define BIT_GET_FW_DBG6_8822B(x) (((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)
1884 /* 2 REG_FW_DBG7_8822B */
1886 #define BIT_SHIFT_FW_DBG7_8822B 0
1887 #define BIT_MASK_FW_DBG7_8822B 0xffffffffL
1888 #define BIT_FW_DBG7_8822B(x) (((x) & BIT_MASK_FW_DBG7_8822B) << BIT_SHIFT_FW_DBG7_8822B)
1889 #define BIT_GET_FW_DBG7_8822B(x) (((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)
1892 /* 2 REG_NOT_VALID_8822B */
1894 /* 2 REG_CR_8822B */
1896 #define BIT_SHIFT_LBMODE_8822B 24
1897 #define BIT_MASK_LBMODE_8822B 0x1f
1898 #define BIT_LBMODE_8822B(x) (((x) & BIT_MASK_LBMODE_8822B) << BIT_SHIFT_LBMODE_8822B)
1899 #define BIT_GET_LBMODE_8822B(x) (((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)
1902 #define BIT_SHIFT_NETYPE1_8822B 18
1903 #define BIT_MASK_NETYPE1_8822B 0x3
1904 #define BIT_NETYPE1_8822B(x) (((x) & BIT_MASK_NETYPE1_8822B) << BIT_SHIFT_NETYPE1_8822B)
1905 #define BIT_GET_NETYPE1_8822B(x) (((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)
1908 #define BIT_SHIFT_NETYPE0_8822B 16
1909 #define BIT_MASK_NETYPE0_8822B 0x3
1910 #define BIT_NETYPE0_8822B(x) (((x) & BIT_MASK_NETYPE0_8822B) << BIT_SHIFT_NETYPE0_8822B)
1911 #define BIT_GET_NETYPE0_8822B(x) (((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)
1913 #define BIT_I2C_MAILBOX_EN_8822B BIT(12)
1914 #define BIT_SHCUT_EN_8822B BIT(11)
1915 #define BIT_32K_CAL_TMR_EN_8822B BIT(10)
1916 #define BIT_MAC_SEC_EN_8822B BIT(9)
1917 #define BIT_ENSWBCN_8822B BIT(8)
1918 #define BIT_MACRXEN_8822B BIT(7)
1919 #define BIT_MACTXEN_8822B BIT(6)
1920 #define BIT_SCHEDULE_EN_8822B BIT(5)
1921 #define BIT_PROTOCOL_EN_8822B BIT(4)
1922 #define BIT_RXDMA_EN_8822B BIT(3)
1923 #define BIT_TXDMA_EN_8822B BIT(2)
1924 #define BIT_HCI_RXDMA_EN_8822B BIT(1)
1925 #define BIT_HCI_TXDMA_EN_8822B BIT(0)
1927 /* 2 REG_TSF_CLK_STATE_8822B */
1928 #define BIT_TSF_CLK_STABLE_8822B BIT(15)
1930 /* 2 REG_TXDMA_PQ_MAP_8822B */
1932 #define BIT_SHIFT_TXDMA_HIQ_MAP_8822B 14
1933 #define BIT_MASK_TXDMA_HIQ_MAP_8822B 0x3
1934 #define BIT_TXDMA_HIQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_HIQ_MAP_8822B) << BIT_SHIFT_TXDMA_HIQ_MAP_8822B)
1935 #define BIT_GET_TXDMA_HIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)
1938 #define BIT_SHIFT_TXDMA_MGQ_MAP_8822B 12
1939 #define BIT_MASK_TXDMA_MGQ_MAP_8822B 0x3
1940 #define BIT_TXDMA_MGQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_MGQ_MAP_8822B) << BIT_SHIFT_TXDMA_MGQ_MAP_8822B)
1941 #define BIT_GET_TXDMA_MGQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)
1944 #define BIT_SHIFT_TXDMA_BKQ_MAP_8822B 10
1945 #define BIT_MASK_TXDMA_BKQ_MAP_8822B 0x3
1946 #define BIT_TXDMA_BKQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_BKQ_MAP_8822B) << BIT_SHIFT_TXDMA_BKQ_MAP_8822B)
1947 #define BIT_GET_TXDMA_BKQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)
1950 #define BIT_SHIFT_TXDMA_BEQ_MAP_8822B 8
1951 #define BIT_MASK_TXDMA_BEQ_MAP_8822B 0x3
1952 #define BIT_TXDMA_BEQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_BEQ_MAP_8822B) << BIT_SHIFT_TXDMA_BEQ_MAP_8822B)
1953 #define BIT_GET_TXDMA_BEQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)
1956 #define BIT_SHIFT_TXDMA_VIQ_MAP_8822B 6
1957 #define BIT_MASK_TXDMA_VIQ_MAP_8822B 0x3
1958 #define BIT_TXDMA_VIQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_VIQ_MAP_8822B) << BIT_SHIFT_TXDMA_VIQ_MAP_8822B)
1959 #define BIT_GET_TXDMA_VIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)
1962 #define BIT_SHIFT_TXDMA_VOQ_MAP_8822B 4
1963 #define BIT_MASK_TXDMA_VOQ_MAP_8822B 0x3
1964 #define BIT_TXDMA_VOQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_VOQ_MAP_8822B) << BIT_SHIFT_TXDMA_VOQ_MAP_8822B)
1965 #define BIT_GET_TXDMA_VOQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)
1967 #define BIT_RXDMA_AGG_EN_8822B BIT(2)
1968 #define BIT_RXSHFT_EN_8822B BIT(1)
1969 #define BIT_RXDMA_ARBBW_EN_8822B BIT(0)
1971 /* 2 REG_TRXFF_BNDY_8822B */
1973 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8822B 8
1974 #define BIT_MASK_RXFFOVFL_RSV_V2_8822B 0xf
1975 #define BIT_RXFFOVFL_RSV_V2_8822B(x) (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8822B) << BIT_SHIFT_RXFFOVFL_RSV_V2_8822B)
1976 #define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & BIT_MASK_RXFFOVFL_RSV_V2_8822B)
1979 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8822B 0
1980 #define BIT_MASK_TXPKTBUF_PGBNDY_8822B 0xff
1981 #define BIT_TXPKTBUF_PGBNDY_8822B(x) (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8822B) << BIT_SHIFT_TXPKTBUF_PGBNDY_8822B)
1982 #define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & BIT_MASK_TXPKTBUF_PGBNDY_8822B)
1985 /* 2 REG_PTA_I2C_MBOX_8822B */
1987 /* 2 REG_NOT_VALID_8822B */
1989 #define BIT_SHIFT_I2C_M_STATUS_8822B 8
1990 #define BIT_MASK_I2C_M_STATUS_8822B 0xf
1991 #define BIT_I2C_M_STATUS_8822B(x) (((x) & BIT_MASK_I2C_M_STATUS_8822B) << BIT_SHIFT_I2C_M_STATUS_8822B)
1992 #define BIT_GET_I2C_M_STATUS_8822B(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)
1995 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B 4
1996 #define BIT_MASK_I2C_M_BUS_GNT_FW_8822B 0x7
1997 #define BIT_I2C_M_BUS_GNT_FW_8822B(x) (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B) << BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B)
1998 #define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B)
2000 #define BIT_I2C_M_GNT_FW_8822B BIT(3)
2002 #define BIT_SHIFT_I2C_M_SPEED_8822B 1
2003 #define BIT_MASK_I2C_M_SPEED_8822B 0x3
2004 #define BIT_I2C_M_SPEED_8822B(x) (((x) & BIT_MASK_I2C_M_SPEED_8822B) << BIT_SHIFT_I2C_M_SPEED_8822B)
2005 #define BIT_GET_I2C_M_SPEED_8822B(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)
2007 #define BIT_I2C_M_UNLOCK_8822B BIT(0)
2009 /* 2 REG_RXFF_BNDY_8822B */
2011 /* 2 REG_NOT_VALID_8822B */
2013 #define BIT_SHIFT_RXFF0_BNDY_V2_8822B 0
2014 #define BIT_MASK_RXFF0_BNDY_V2_8822B 0x3ffff
2015 #define BIT_RXFF0_BNDY_V2_8822B(x) (((x) & BIT_MASK_RXFF0_BNDY_V2_8822B) << BIT_SHIFT_RXFF0_BNDY_V2_8822B)
2016 #define BIT_GET_RXFF0_BNDY_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)
2019 /* 2 REG_FE1IMR_8822B */
2020 #define BIT_FS_RXDMA2_DONE_INT_EN_8822B BIT(28)
2021 #define BIT_FS_RXDONE3_INT_EN_8822B BIT(27)
2022 #define BIT_FS_RXDONE2_INT_EN_8822B BIT(26)
2023 #define BIT_FS_RX_BCN_P4_INT_EN_8822B BIT(25)
2024 #define BIT_FS_RX_BCN_P3_INT_EN_8822B BIT(24)
2025 #define BIT_FS_RX_BCN_P2_INT_EN_8822B BIT(23)
2026 #define BIT_FS_RX_BCN_P1_INT_EN_8822B BIT(22)
2027 #define BIT_FS_RX_BCN_P0_INT_EN_8822B BIT(21)
2028 #define BIT_FS_RX_UMD0_INT_EN_8822B BIT(20)
2029 #define BIT_FS_RX_UMD1_INT_EN_8822B BIT(19)
2030 #define BIT_FS_RX_BMD0_INT_EN_8822B BIT(18)
2031 #define BIT_FS_RX_BMD1_INT_EN_8822B BIT(17)
2032 #define BIT_FS_RXDONE_INT_EN_8822B BIT(16)
2033 #define BIT_FS_WWLAN_INT_EN_8822B BIT(15)
2034 #define BIT_FS_SOUND_DONE_INT_EN_8822B BIT(14)
2035 #define BIT_FS_LP_STBY_INT_EN_8822B BIT(13)
2036 #define BIT_FS_TRL_MTR_INT_EN_8822B BIT(12)
2037 #define BIT_FS_BF1_PRETO_INT_EN_8822B BIT(11)
2038 #define BIT_FS_BF0_PRETO_INT_EN_8822B BIT(10)
2039 #define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8822B BIT(9)
2040 #define BIT_FS_LTE_COEX_EN_8822B BIT(6)
2041 #define BIT_FS_WLACTOFF_INT_EN_8822B BIT(5)
2042 #define BIT_FS_WLACTON_INT_EN_8822B BIT(4)
2043 #define BIT_FS_BTCMD_INT_EN_8822B BIT(3)
2044 #define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8822B BIT(2)
2045 #define BIT_FS_TRPC_TO_INT_EN_V1_8822B BIT(1)
2046 #define BIT_FS_RPC_O_T_INT_EN_V1_8822B BIT(0)
2048 /* 2 REG_FE1ISR_8822B */
2049 #define BIT_FS_RXDMA2_DONE_INT_8822B BIT(28)
2050 #define BIT_FS_RXDONE3_INT_8822B BIT(27)
2051 #define BIT_FS_RXDONE2_INT_8822B BIT(26)
2052 #define BIT_FS_RX_BCN_P4_INT_8822B BIT(25)
2053 #define BIT_FS_RX_BCN_P3_INT_8822B BIT(24)
2054 #define BIT_FS_RX_BCN_P2_INT_8822B BIT(23)
2055 #define BIT_FS_RX_BCN_P1_INT_8822B BIT(22)
2056 #define BIT_FS_RX_BCN_P0_INT_8822B BIT(21)
2057 #define BIT_FS_RX_UMD0_INT_8822B BIT(20)
2058 #define BIT_FS_RX_UMD1_INT_8822B BIT(19)
2059 #define BIT_FS_RX_BMD0_INT_8822B BIT(18)
2060 #define BIT_FS_RX_BMD1_INT_8822B BIT(17)
2061 #define BIT_FS_RXDONE_INT_8822B BIT(16)
2062 #define BIT_FS_WWLAN_INT_8822B BIT(15)
2063 #define BIT_FS_SOUND_DONE_INT_8822B BIT(14)
2064 #define BIT_FS_LP_STBY_INT_8822B BIT(13)
2065 #define BIT_FS_TRL_MTR_INT_8822B BIT(12)
2066 #define BIT_FS_BF1_PRETO_INT_8822B BIT(11)
2067 #define BIT_FS_BF0_PRETO_INT_8822B BIT(10)
2068 #define BIT_FS_PTCL_RELEASE_MACID_INT_8822B BIT(9)
2069 #define BIT_FS_LTE_COEX_INT_8822B BIT(6)
2070 #define BIT_FS_WLACTOFF_INT_8822B BIT(5)
2071 #define BIT_FS_WLACTON_INT_8822B BIT(4)
2072 #define BIT_FS_BCN_RX_INT_INT_8822B BIT(3)
2073 #define BIT_FS_MAILBOX_TO_I2C_INT_8822B BIT(2)
2074 #define BIT_FS_TRPC_TO_INT_8822B BIT(1)
2075 #define BIT_FS_RPC_O_T_INT_8822B BIT(0)
2077 /* 2 REG_NOT_VALID_8822B */
2079 /* 2 REG_CPWM_8822B */
2080 #define BIT_CPWM_TOGGLING_8822B BIT(31)
2082 #define BIT_SHIFT_CPWM_MOD_8822B 24
2083 #define BIT_MASK_CPWM_MOD_8822B 0x7f
2084 #define BIT_CPWM_MOD_8822B(x) (((x) & BIT_MASK_CPWM_MOD_8822B) << BIT_SHIFT_CPWM_MOD_8822B)
2085 #define BIT_GET_CPWM_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)
2088 /* 2 REG_FWIMR_8822B */
2089 #define BIT_FS_TXBCNOK_MB7_INT_EN_8822B BIT(31)
2090 #define BIT_FS_TXBCNOK_MB6_INT_EN_8822B BIT(30)
2091 #define BIT_FS_TXBCNOK_MB5_INT_EN_8822B BIT(29)
2092 #define BIT_FS_TXBCNOK_MB4_INT_EN_8822B BIT(28)
2093 #define BIT_FS_TXBCNOK_MB3_INT_EN_8822B BIT(27)
2094 #define BIT_FS_TXBCNOK_MB2_INT_EN_8822B BIT(26)
2095 #define BIT_FS_TXBCNOK_MB1_INT_EN_8822B BIT(25)
2096 #define BIT_FS_TXBCNOK_MB0_INT_EN_8822B BIT(24)
2097 #define BIT_FS_TXBCNERR_MB7_INT_EN_8822B BIT(23)
2098 #define BIT_FS_TXBCNERR_MB6_INT_EN_8822B BIT(22)
2099 #define BIT_FS_TXBCNERR_MB5_INT_EN_8822B BIT(21)
2100 #define BIT_FS_TXBCNERR_MB4_INT_EN_8822B BIT(20)
2101 #define BIT_FS_TXBCNERR_MB3_INT_EN_8822B BIT(19)
2102 #define BIT_FS_TXBCNERR_MB2_INT_EN_8822B BIT(18)
2103 #define BIT_FS_TXBCNERR_MB1_INT_EN_8822B BIT(17)
2104 #define BIT_FS_TXBCNERR_MB0_INT_EN_8822B BIT(16)
2105 #define BIT_CPU_MGQ_TXDONE_INT_EN_8822B BIT(15)
2106 #define BIT_SIFS_OVERSPEC_INT_EN_8822B BIT(14)
2107 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8822B BIT(13)
2108 #define BIT_FS_MGNTQFF_TO_INT_EN_8822B BIT(12)
2109 #define BIT_FS_DDMA1_LP_INT_EN_8822B BIT(11)
2110 #define BIT_FS_DDMA1_HP_INT_EN_8822B BIT(10)
2111 #define BIT_FS_DDMA0_LP_INT_EN_8822B BIT(9)
2112 #define BIT_FS_DDMA0_HP_INT_EN_8822B BIT(8)
2113 #define BIT_FS_TRXRPT_INT_EN_8822B BIT(7)
2114 #define BIT_FS_C2H_W_READY_INT_EN_8822B BIT(6)
2115 #define BIT_FS_HRCV_INT_EN_8822B BIT(5)
2116 #define BIT_FS_H2CCMD_INT_EN_8822B BIT(4)
2117 #define BIT_FS_TXPKTIN_INT_EN_8822B BIT(3)
2118 #define BIT_FS_ERRORHDL_INT_EN_8822B BIT(2)
2119 #define BIT_FS_TXCCX_INT_EN_8822B BIT(1)
2120 #define BIT_FS_TXCLOSE_INT_EN_8822B BIT(0)
2122 /* 2 REG_FWISR_8822B */
2123 #define BIT_FS_TXBCNOK_MB7_INT_8822B BIT(31)
2124 #define BIT_FS_TXBCNOK_MB6_INT_8822B BIT(30)
2125 #define BIT_FS_TXBCNOK_MB5_INT_8822B BIT(29)
2126 #define BIT_FS_TXBCNOK_MB4_INT_8822B BIT(28)
2127 #define BIT_FS_TXBCNOK_MB3_INT_8822B BIT(27)
2128 #define BIT_FS_TXBCNOK_MB2_INT_8822B BIT(26)
2129 #define BIT_FS_TXBCNOK_MB1_INT_8822B BIT(25)
2130 #define BIT_FS_TXBCNOK_MB0_INT_8822B BIT(24)
2131 #define BIT_FS_TXBCNERR_MB7_INT_8822B BIT(23)
2132 #define BIT_FS_TXBCNERR_MB6_INT_8822B BIT(22)
2133 #define BIT_FS_TXBCNERR_MB5_INT_8822B BIT(21)
2134 #define BIT_FS_TXBCNERR_MB4_INT_8822B BIT(20)
2135 #define BIT_FS_TXBCNERR_MB3_INT_8822B BIT(19)
2136 #define BIT_FS_TXBCNERR_MB2_INT_8822B BIT(18)
2137 #define BIT_FS_TXBCNERR_MB1_INT_8822B BIT(17)
2138 #define BIT_FS_TXBCNERR_MB0_INT_8822B BIT(16)
2139 #define BIT_CPU_MGQ_TXDONE_INT_8822B BIT(15)
2140 #define BIT_SIFS_OVERSPEC_INT_8822B BIT(14)
2141 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8822B BIT(13)
2142 #define BIT_FS_MGNTQFF_TO_INT_8822B BIT(12)
2143 #define BIT_FS_DDMA1_LP_INT_8822B BIT(11)
2144 #define BIT_FS_DDMA1_HP_INT_8822B BIT(10)
2145 #define BIT_FS_DDMA0_LP_INT_8822B BIT(9)
2146 #define BIT_FS_DDMA0_HP_INT_8822B BIT(8)
2147 #define BIT_FS_TRXRPT_INT_8822B BIT(7)
2148 #define BIT_FS_C2H_W_READY_INT_8822B BIT(6)
2149 #define BIT_FS_HRCV_INT_8822B BIT(5)
2150 #define BIT_FS_H2CCMD_INT_8822B BIT(4)
2151 #define BIT_FS_TXPKTIN_INT_8822B BIT(3)
2152 #define BIT_FS_ERRORHDL_INT_8822B BIT(2)
2153 #define BIT_FS_TXCCX_INT_8822B BIT(1)
2154 #define BIT_FS_TXCLOSE_INT_8822B BIT(0)
2156 /* 2 REG_FTIMR_8822B */
2157 #define BIT_PS_TIMER_C_EARLY_INT_EN_8822B BIT(23)
2158 #define BIT_PS_TIMER_B_EARLY_INT_EN_8822B BIT(22)
2159 #define BIT_PS_TIMER_A_EARLY_INT_EN_8822B BIT(21)
2160 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8822B BIT(20)
2161 #define BIT_PS_TIMER_C_INT_EN_8822B BIT(19)
2162 #define BIT_PS_TIMER_B_INT_EN_8822B BIT(18)
2163 #define BIT_PS_TIMER_A_INT_EN_8822B BIT(17)
2164 #define BIT_CPUMGQ_TX_TIMER_INT_EN_8822B BIT(16)
2165 #define BIT_FS_PS_TIMEOUT2_EN_8822B BIT(15)
2166 #define BIT_FS_PS_TIMEOUT1_EN_8822B BIT(14)
2167 #define BIT_FS_PS_TIMEOUT0_EN_8822B BIT(13)
2168 #define BIT_FS_GTINT8_EN_8822B BIT(8)
2169 #define BIT_FS_GTINT7_EN_8822B BIT(7)
2170 #define BIT_FS_GTINT6_EN_8822B BIT(6)
2171 #define BIT_FS_GTINT5_EN_8822B BIT(5)
2172 #define BIT_FS_GTINT4_EN_8822B BIT(4)
2173 #define BIT_FS_GTINT3_EN_8822B BIT(3)
2174 #define BIT_FS_GTINT2_EN_8822B BIT(2)
2175 #define BIT_FS_GTINT1_EN_8822B BIT(1)
2176 #define BIT_FS_GTINT0_EN_8822B BIT(0)
2178 /* 2 REG_FTISR_8822B */
2179 #define BIT_PS_TIMER_C_EARLY__INT_8822B BIT(23)
2180 #define BIT_PS_TIMER_B_EARLY__INT_8822B BIT(22)
2181 #define BIT_PS_TIMER_A_EARLY__INT_8822B BIT(21)
2182 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8822B BIT(20)
2183 #define BIT_PS_TIMER_C_INT_8822B BIT(19)
2184 #define BIT_PS_TIMER_B_INT_8822B BIT(18)
2185 #define BIT_PS_TIMER_A_INT_8822B BIT(17)
2186 #define BIT_CPUMGQ_TX_TIMER_INT_8822B BIT(16)
2187 #define BIT_FS_PS_TIMEOUT2_INT_8822B BIT(15)
2188 #define BIT_FS_PS_TIMEOUT1_INT_8822B BIT(14)
2189 #define BIT_FS_PS_TIMEOUT0_INT_8822B BIT(13)
2190 #define BIT_FS_GTINT8_INT_8822B BIT(8)
2191 #define BIT_FS_GTINT7_INT_8822B BIT(7)
2192 #define BIT_FS_GTINT6_INT_8822B BIT(6)
2193 #define BIT_FS_GTINT5_INT_8822B BIT(5)
2194 #define BIT_FS_GTINT4_INT_8822B BIT(4)
2195 #define BIT_FS_GTINT3_INT_8822B BIT(3)
2196 #define BIT_FS_GTINT2_INT_8822B BIT(2)
2197 #define BIT_FS_GTINT1_INT_8822B BIT(1)
2198 #define BIT_FS_GTINT0_INT_8822B BIT(0)
2200 /* 2 REG_PKTBUF_DBG_CTRL_8822B */
2202 #define BIT_SHIFT_PKTBUF_WRITE_EN_8822B 24
2203 #define BIT_MASK_PKTBUF_WRITE_EN_8822B 0xff
2204 #define BIT_PKTBUF_WRITE_EN_8822B(x) (((x) & BIT_MASK_PKTBUF_WRITE_EN_8822B) << BIT_SHIFT_PKTBUF_WRITE_EN_8822B)
2205 #define BIT_GET_PKTBUF_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & BIT_MASK_PKTBUF_WRITE_EN_8822B)
2207 #define BIT_TXRPTBUF_DBG_8822B BIT(23)
2209 /* 2 REG_NOT_VALID_8822B */
2210 #define BIT_TXPKTBUF_DBG_V2_8822B BIT(20)
2211 #define BIT_RXPKTBUF_DBG_8822B BIT(16)
2213 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8822B 0
2214 #define BIT_MASK_PKTBUF_DBG_ADDR_8822B 0x1fff
2215 #define BIT_PKTBUF_DBG_ADDR_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8822B) << BIT_SHIFT_PKTBUF_DBG_ADDR_8822B)
2216 #define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & BIT_MASK_PKTBUF_DBG_ADDR_8822B)
2219 /* 2 REG_PKTBUF_DBG_DATA_L_8822B */
2221 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B 0
2222 #define BIT_MASK_PKTBUF_DBG_DATA_L_8822B 0xffffffffL
2223 #define BIT_PKTBUF_DBG_DATA_L_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B) << BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B)
2224 #define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B)
2227 /* 2 REG_PKTBUF_DBG_DATA_H_8822B */
2229 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B 0
2230 #define BIT_MASK_PKTBUF_DBG_DATA_H_8822B 0xffffffffL
2231 #define BIT_PKTBUF_DBG_DATA_H_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B) << BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B)
2232 #define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B)
2235 /* 2 REG_CPWM2_8822B */
2237 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8822B 16
2238 #define BIT_MASK_L0S_TO_RCVY_NUM_8822B 0xff
2239 #define BIT_L0S_TO_RCVY_NUM_8822B(x) (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8822B) << BIT_SHIFT_L0S_TO_RCVY_NUM_8822B)
2240 #define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & BIT_MASK_L0S_TO_RCVY_NUM_8822B)
2242 #define BIT_CPWM2_TOGGLING_8822B BIT(15)
2244 #define BIT_SHIFT_CPWM2_MOD_8822B 0
2245 #define BIT_MASK_CPWM2_MOD_8822B 0x7fff
2246 #define BIT_CPWM2_MOD_8822B(x) (((x) & BIT_MASK_CPWM2_MOD_8822B) << BIT_SHIFT_CPWM2_MOD_8822B)
2247 #define BIT_GET_CPWM2_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)
2250 /* 2 REG_NOT_VALID_8822B */
2252 /* 2 REG_TC0_CTRL_8822B */
2253 #define BIT_TC0INT_EN_8822B BIT(26)
2254 #define BIT_TC0MODE_8822B BIT(25)
2255 #define BIT_TC0EN_8822B BIT(24)
2257 #define BIT_SHIFT_TC0DATA_8822B 0
2258 #define BIT_MASK_TC0DATA_8822B 0xffffff
2259 #define BIT_TC0DATA_8822B(x) (((x) & BIT_MASK_TC0DATA_8822B) << BIT_SHIFT_TC0DATA_8822B)
2260 #define BIT_GET_TC0DATA_8822B(x) (((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)
2263 /* 2 REG_TC1_CTRL_8822B */
2264 #define BIT_TC1INT_EN_8822B BIT(26)
2265 #define BIT_TC1MODE_8822B BIT(25)
2266 #define BIT_TC1EN_8822B BIT(24)
2268 #define BIT_SHIFT_TC1DATA_8822B 0
2269 #define BIT_MASK_TC1DATA_8822B 0xffffff
2270 #define BIT_TC1DATA_8822B(x) (((x) & BIT_MASK_TC1DATA_8822B) << BIT_SHIFT_TC1DATA_8822B)
2271 #define BIT_GET_TC1DATA_8822B(x) (((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)
2274 /* 2 REG_TC2_CTRL_8822B */
2275 #define BIT_TC2INT_EN_8822B BIT(26)
2276 #define BIT_TC2MODE_8822B BIT(25)
2277 #define BIT_TC2EN_8822B BIT(24)
2279 #define BIT_SHIFT_TC2DATA_8822B 0
2280 #define BIT_MASK_TC2DATA_8822B 0xffffff
2281 #define BIT_TC2DATA_8822B(x) (((x) & BIT_MASK_TC2DATA_8822B) << BIT_SHIFT_TC2DATA_8822B)
2282 #define BIT_GET_TC2DATA_8822B(x) (((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)
2285 /* 2 REG_TC3_CTRL_8822B */
2286 #define BIT_TC3INT_EN_8822B BIT(26)
2287 #define BIT_TC3MODE_8822B BIT(25)
2288 #define BIT_TC3EN_8822B BIT(24)
2290 #define BIT_SHIFT_TC3DATA_8822B 0
2291 #define BIT_MASK_TC3DATA_8822B 0xffffff
2292 #define BIT_TC3DATA_8822B(x) (((x) & BIT_MASK_TC3DATA_8822B) << BIT_SHIFT_TC3DATA_8822B)
2293 #define BIT_GET_TC3DATA_8822B(x) (((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)
2296 /* 2 REG_TC4_CTRL_8822B */
2297 #define BIT_TC4INT_EN_8822B BIT(26)
2298 #define BIT_TC4MODE_8822B BIT(25)
2299 #define BIT_TC4EN_8822B BIT(24)
2301 #define BIT_SHIFT_TC4DATA_8822B 0
2302 #define BIT_MASK_TC4DATA_8822B 0xffffff
2303 #define BIT_TC4DATA_8822B(x) (((x) & BIT_MASK_TC4DATA_8822B) << BIT_SHIFT_TC4DATA_8822B)
2304 #define BIT_GET_TC4DATA_8822B(x) (((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)
2307 /* 2 REG_TCUNIT_BASE_8822B */
2309 #define BIT_SHIFT_TCUNIT_BASE_8822B 0
2310 #define BIT_MASK_TCUNIT_BASE_8822B 0x3fff
2311 #define BIT_TCUNIT_BASE_8822B(x) (((x) & BIT_MASK_TCUNIT_BASE_8822B) << BIT_SHIFT_TCUNIT_BASE_8822B)
2312 #define BIT_GET_TCUNIT_BASE_8822B(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)
2315 /* 2 REG_TC5_CTRL_8822B */
2316 #define BIT_TC5INT_EN_8822B BIT(26)
2317 #define BIT_TC5MODE_8822B BIT(25)
2318 #define BIT_TC5EN_8822B BIT(24)
2320 #define BIT_SHIFT_TC5DATA_8822B 0
2321 #define BIT_MASK_TC5DATA_8822B 0xffffff
2322 #define BIT_TC5DATA_8822B(x) (((x) & BIT_MASK_TC5DATA_8822B) << BIT_SHIFT_TC5DATA_8822B)
2323 #define BIT_GET_TC5DATA_8822B(x) (((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)
2326 /* 2 REG_TC6_CTRL_8822B */
2327 #define BIT_TC6INT_EN_8822B BIT(26)
2328 #define BIT_TC6MODE_8822B BIT(25)
2329 #define BIT_TC6EN_8822B BIT(24)
2331 #define BIT_SHIFT_TC6DATA_8822B 0
2332 #define BIT_MASK_TC6DATA_8822B 0xffffff
2333 #define BIT_TC6DATA_8822B(x) (((x) & BIT_MASK_TC6DATA_8822B) << BIT_SHIFT_TC6DATA_8822B)
2334 #define BIT_GET_TC6DATA_8822B(x) (((x) >> BIT_SHIFT_TC6DATA_8822B) & BIT_MASK_TC6DATA_8822B)
2337 /* 2 REG_MBIST_FAIL_8822B */
2339 #define BIT_SHIFT_8051_MBIST_FAIL_8822B 26
2340 #define BIT_MASK_8051_MBIST_FAIL_8822B 0x7
2341 #define BIT_8051_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_8051_MBIST_FAIL_8822B) << BIT_SHIFT_8051_MBIST_FAIL_8822B)
2342 #define BIT_GET_8051_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8822B) & BIT_MASK_8051_MBIST_FAIL_8822B)
2345 #define BIT_SHIFT_USB_MBIST_FAIL_8822B 24
2346 #define BIT_MASK_USB_MBIST_FAIL_8822B 0x3
2347 #define BIT_USB_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_USB_MBIST_FAIL_8822B) << BIT_SHIFT_USB_MBIST_FAIL_8822B)
2348 #define BIT_GET_USB_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8822B) & BIT_MASK_USB_MBIST_FAIL_8822B)
2351 #define BIT_SHIFT_PCIE_MBIST_FAIL_8822B 16
2352 #define BIT_MASK_PCIE_MBIST_FAIL_8822B 0x3f
2353 #define BIT_PCIE_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_FAIL_8822B) << BIT_SHIFT_PCIE_MBIST_FAIL_8822B)
2354 #define BIT_GET_PCIE_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8822B) & BIT_MASK_PCIE_MBIST_FAIL_8822B)
2357 #define BIT_SHIFT_MAC_MBIST_FAIL_8822B 0
2358 #define BIT_MASK_MAC_MBIST_FAIL_8822B 0xfff
2359 #define BIT_MAC_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_MAC_MBIST_FAIL_8822B) << BIT_SHIFT_MAC_MBIST_FAIL_8822B)
2360 #define BIT_GET_MAC_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8822B) & BIT_MASK_MAC_MBIST_FAIL_8822B)
2363 /* 2 REG_MBIST_START_PAUSE_8822B */
2365 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8822B 26
2366 #define BIT_MASK_8051_MBIST_START_PAUSE_8822B 0x7
2367 #define BIT_8051_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8822B) << BIT_SHIFT_8051_MBIST_START_PAUSE_8822B)
2368 #define BIT_GET_8051_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8822B) & BIT_MASK_8051_MBIST_START_PAUSE_8822B)
2371 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8822B 24
2372 #define BIT_MASK_USB_MBIST_START_PAUSE_8822B 0x3
2373 #define BIT_USB_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8822B) << BIT_SHIFT_USB_MBIST_START_PAUSE_8822B)
2374 #define BIT_GET_USB_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8822B) & BIT_MASK_USB_MBIST_START_PAUSE_8822B)
2377 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B 16
2378 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8822B 0x3f
2379 #define BIT_PCIE_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B) << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B)
2380 #define BIT_GET_PCIE_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B)
2383 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B 0
2384 #define BIT_MASK_MAC_MBIST_START_PAUSE_8822B 0xfff
2385 #define BIT_MAC_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B) << BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B)
2386 #define BIT_GET_MAC_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B)
2389 /* 2 REG_MBIST_DONE_8822B */
2391 #define BIT_SHIFT_8051_MBIST_DONE_8822B 26
2392 #define BIT_MASK_8051_MBIST_DONE_8822B 0x7
2393 #define BIT_8051_MBIST_DONE_8822B(x) (((x) & BIT_MASK_8051_MBIST_DONE_8822B) << BIT_SHIFT_8051_MBIST_DONE_8822B)
2394 #define BIT_GET_8051_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8822B) & BIT_MASK_8051_MBIST_DONE_8822B)
2397 #define BIT_SHIFT_USB_MBIST_DONE_8822B 24
2398 #define BIT_MASK_USB_MBIST_DONE_8822B 0x3
2399 #define BIT_USB_MBIST_DONE_8822B(x) (((x) & BIT_MASK_USB_MBIST_DONE_8822B) << BIT_SHIFT_USB_MBIST_DONE_8822B)
2400 #define BIT_GET_USB_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8822B) & BIT_MASK_USB_MBIST_DONE_8822B)
2403 #define BIT_SHIFT_PCIE_MBIST_DONE_8822B 16
2404 #define BIT_MASK_PCIE_MBIST_DONE_8822B 0x3f
2405 #define BIT_PCIE_MBIST_DONE_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_DONE_8822B) << BIT_SHIFT_PCIE_MBIST_DONE_8822B)
2406 #define BIT_GET_PCIE_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8822B) & BIT_MASK_PCIE_MBIST_DONE_8822B)
2409 #define BIT_SHIFT_MAC_MBIST_DONE_8822B 0
2410 #define BIT_MASK_MAC_MBIST_DONE_8822B 0xfff
2411 #define BIT_MAC_MBIST_DONE_8822B(x) (((x) & BIT_MASK_MAC_MBIST_DONE_8822B) << BIT_SHIFT_MAC_MBIST_DONE_8822B)
2412 #define BIT_GET_MAC_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8822B) & BIT_MASK_MAC_MBIST_DONE_8822B)
2415 /* 2 REG_MBIST_FAIL_NRML_8822B */
2417 #define BIT_SHIFT_MBIST_FAIL_NRML_8822B 0
2418 #define BIT_MASK_MBIST_FAIL_NRML_8822B 0xffffffffL
2419 #define BIT_MBIST_FAIL_NRML_8822B(x) (((x) & BIT_MASK_MBIST_FAIL_NRML_8822B) << BIT_SHIFT_MBIST_FAIL_NRML_8822B)
2420 #define BIT_GET_MBIST_FAIL_NRML_8822B(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8822B) & BIT_MASK_MBIST_FAIL_NRML_8822B)
2423 /* 2 REG_AES_DECRPT_DATA_8822B */
2425 #define BIT_SHIFT_IPS_CFG_ADDR_8822B 0
2426 #define BIT_MASK_IPS_CFG_ADDR_8822B 0xff
2427 #define BIT_IPS_CFG_ADDR_8822B(x) (((x) & BIT_MASK_IPS_CFG_ADDR_8822B) << BIT_SHIFT_IPS_CFG_ADDR_8822B)
2428 #define BIT_GET_IPS_CFG_ADDR_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8822B) & BIT_MASK_IPS_CFG_ADDR_8822B)
2431 /* 2 REG_AES_DECRPT_CFG_8822B */
2433 #define BIT_SHIFT_IPS_CFG_DATA_8822B 0
2434 #define BIT_MASK_IPS_CFG_DATA_8822B 0xffffffffL
2435 #define BIT_IPS_CFG_DATA_8822B(x) (((x) & BIT_MASK_IPS_CFG_DATA_8822B) << BIT_SHIFT_IPS_CFG_DATA_8822B)
2436 #define BIT_GET_IPS_CFG_DATA_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8822B) & BIT_MASK_IPS_CFG_DATA_8822B)
2439 /* 2 REG_NOT_VALID_8822B */
2441 /* 2 REG_NOT_VALID_8822B */
2443 /* 2 REG_TMETER_8822B */
2444 #define BIT_TEMP_VALID_8822B BIT(31)
2446 #define BIT_SHIFT_TEMP_VALUE_8822B 24
2447 #define BIT_MASK_TEMP_VALUE_8822B 0x3f
2448 #define BIT_TEMP_VALUE_8822B(x) (((x) & BIT_MASK_TEMP_VALUE_8822B) << BIT_SHIFT_TEMP_VALUE_8822B)
2449 #define BIT_GET_TEMP_VALUE_8822B(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8822B) & BIT_MASK_TEMP_VALUE_8822B)
2452 #define BIT_SHIFT_REG_TMETER_TIMER_8822B 8
2453 #define BIT_MASK_REG_TMETER_TIMER_8822B 0xfff
2454 #define BIT_REG_TMETER_TIMER_8822B(x) (((x) & BIT_MASK_REG_TMETER_TIMER_8822B) << BIT_SHIFT_REG_TMETER_TIMER_8822B)
2455 #define BIT_GET_REG_TMETER_TIMER_8822B(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8822B) & BIT_MASK_REG_TMETER_TIMER_8822B)
2458 #define BIT_SHIFT_REG_TEMP_DELTA_8822B 2
2459 #define BIT_MASK_REG_TEMP_DELTA_8822B 0x3f
2460 #define BIT_REG_TEMP_DELTA_8822B(x) (((x) & BIT_MASK_REG_TEMP_DELTA_8822B) << BIT_SHIFT_REG_TEMP_DELTA_8822B)
2461 #define BIT_GET_REG_TEMP_DELTA_8822B(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8822B) & BIT_MASK_REG_TEMP_DELTA_8822B)
2463 #define BIT_REG_TMETER_EN_8822B BIT(0)
2465 /* 2 REG_OSC_32K_CTRL_8822B */
2467 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8822B 16
2468 #define BIT_MASK_OSC_32K_CLKGEN_0_8822B 0xffff
2469 #define BIT_OSC_32K_CLKGEN_0_8822B(x) (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8822B) << BIT_SHIFT_OSC_32K_CLKGEN_0_8822B)
2470 #define BIT_GET_OSC_32K_CLKGEN_0_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8822B) & BIT_MASK_OSC_32K_CLKGEN_0_8822B)
2473 #define BIT_SHIFT_OSC_32K_RES_COMP_8822B 4
2474 #define BIT_MASK_OSC_32K_RES_COMP_8822B 0x3
2475 #define BIT_OSC_32K_RES_COMP_8822B(x) (((x) & BIT_MASK_OSC_32K_RES_COMP_8822B) << BIT_SHIFT_OSC_32K_RES_COMP_8822B)
2476 #define BIT_GET_OSC_32K_RES_COMP_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8822B) & BIT_MASK_OSC_32K_RES_COMP_8822B)
2478 #define BIT_OSC_32K_OUT_SEL_8822B BIT(3)
2479 #define BIT_ISO_WL_2_OSC_32K_8822B BIT(1)
2480 #define BIT_POW_CKGEN_8822B BIT(0)
2482 /* 2 REG_32K_CAL_REG1_8822B */
2483 #define BIT_CAL_32K_REG_WR_8822B BIT(31)
2484 #define BIT_CAL_32K_DBG_SEL_8822B BIT(22)
2486 #define BIT_SHIFT_CAL_32K_REG_ADDR_8822B 16
2487 #define BIT_MASK_CAL_32K_REG_ADDR_8822B 0x3f
2488 #define BIT_CAL_32K_REG_ADDR_8822B(x) (((x) & BIT_MASK_CAL_32K_REG_ADDR_8822B) << BIT_SHIFT_CAL_32K_REG_ADDR_8822B)
2489 #define BIT_GET_CAL_32K_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8822B) & BIT_MASK_CAL_32K_REG_ADDR_8822B)
2492 #define BIT_SHIFT_CAL_32K_REG_DATA_8822B 0
2493 #define BIT_MASK_CAL_32K_REG_DATA_8822B 0xffff
2494 #define BIT_CAL_32K_REG_DATA_8822B(x) (((x) & BIT_MASK_CAL_32K_REG_DATA_8822B) << BIT_SHIFT_CAL_32K_REG_DATA_8822B)
2495 #define BIT_GET_CAL_32K_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8822B) & BIT_MASK_CAL_32K_REG_DATA_8822B)
2498 /* 2 REG_NOT_VALID_8822B */
2500 /* 2 REG_C2HEVT_8822B */
2502 #define BIT_SHIFT_C2HEVT_MSG_8822B 0
2503 #define BIT_MASK_C2HEVT_MSG_8822B 0xffffffffffffffffffffffffffffffffL
2504 #define BIT_C2HEVT_MSG_8822B(x) (((x) & BIT_MASK_C2HEVT_MSG_8822B) << BIT_SHIFT_C2HEVT_MSG_8822B)
2505 #define BIT_GET_C2HEVT_MSG_8822B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_8822B) & BIT_MASK_C2HEVT_MSG_8822B)
2508 /* 2 REG_SW_DEFINED_PAGE1_8822B */
2510 #define BIT_SHIFT_SW_DEFINED_PAGE1_8822B 0
2511 #define BIT_MASK_SW_DEFINED_PAGE1_8822B 0xffffffffffffffffL
2512 #define BIT_SW_DEFINED_PAGE1_8822B(x) (((x) & BIT_MASK_SW_DEFINED_PAGE1_8822B) << BIT_SHIFT_SW_DEFINED_PAGE1_8822B)
2513 #define BIT_GET_SW_DEFINED_PAGE1_8822B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_8822B) & BIT_MASK_SW_DEFINED_PAGE1_8822B)
2516 /* 2 REG_MCUTST_I_8822B */
2518 #define BIT_SHIFT_MCUDMSG_I_8822B 0
2519 #define BIT_MASK_MCUDMSG_I_8822B 0xffffffffL
2520 #define BIT_MCUDMSG_I_8822B(x) (((x) & BIT_MASK_MCUDMSG_I_8822B) << BIT_SHIFT_MCUDMSG_I_8822B)
2521 #define BIT_GET_MCUDMSG_I_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8822B) & BIT_MASK_MCUDMSG_I_8822B)
2524 /* 2 REG_MCUTST_II_8822B */
2526 #define BIT_SHIFT_MCUDMSG_II_8822B 0
2527 #define BIT_MASK_MCUDMSG_II_8822B 0xffffffffL
2528 #define BIT_MCUDMSG_II_8822B(x) (((x) & BIT_MASK_MCUDMSG_II_8822B) << BIT_SHIFT_MCUDMSG_II_8822B)
2529 #define BIT_GET_MCUDMSG_II_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8822B) & BIT_MASK_MCUDMSG_II_8822B)
2532 /* 2 REG_FMETHR_8822B */
2533 #define BIT_FMSG_INT_8822B BIT(31)
2535 #define BIT_SHIFT_FW_MSG_8822B 0
2536 #define BIT_MASK_FW_MSG_8822B 0xffffffffL
2537 #define BIT_FW_MSG_8822B(x) (((x) & BIT_MASK_FW_MSG_8822B) << BIT_SHIFT_FW_MSG_8822B)
2538 #define BIT_GET_FW_MSG_8822B(x) (((x) >> BIT_SHIFT_FW_MSG_8822B) & BIT_MASK_FW_MSG_8822B)
2541 /* 2 REG_HMETFR_8822B */
2543 #define BIT_SHIFT_HRCV_MSG_8822B 24
2544 #define BIT_MASK_HRCV_MSG_8822B 0xff
2545 #define BIT_HRCV_MSG_8822B(x) (((x) & BIT_MASK_HRCV_MSG_8822B) << BIT_SHIFT_HRCV_MSG_8822B)
2546 #define BIT_GET_HRCV_MSG_8822B(x) (((x) >> BIT_SHIFT_HRCV_MSG_8822B) & BIT_MASK_HRCV_MSG_8822B)
2548 #define BIT_INT_BOX3_8822B BIT(3)
2549 #define BIT_INT_BOX2_8822B BIT(2)
2550 #define BIT_INT_BOX1_8822B BIT(1)
2551 #define BIT_INT_BOX0_8822B BIT(0)
2553 /* 2 REG_HMEBOX0_8822B */
2555 #define BIT_SHIFT_HOST_MSG_0_8822B 0
2556 #define BIT_MASK_HOST_MSG_0_8822B 0xffffffffL
2557 #define BIT_HOST_MSG_0_8822B(x) (((x) & BIT_MASK_HOST_MSG_0_8822B) << BIT_SHIFT_HOST_MSG_0_8822B)
2558 #define BIT_GET_HOST_MSG_0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8822B) & BIT_MASK_HOST_MSG_0_8822B)
2561 /* 2 REG_HMEBOX1_8822B */
2563 #define BIT_SHIFT_HOST_MSG_1_8822B 0
2564 #define BIT_MASK_HOST_MSG_1_8822B 0xffffffffL
2565 #define BIT_HOST_MSG_1_8822B(x) (((x) & BIT_MASK_HOST_MSG_1_8822B) << BIT_SHIFT_HOST_MSG_1_8822B)
2566 #define BIT_GET_HOST_MSG_1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8822B) & BIT_MASK_HOST_MSG_1_8822B)
2569 /* 2 REG_HMEBOX2_8822B */
2571 #define BIT_SHIFT_HOST_MSG_2_8822B 0
2572 #define BIT_MASK_HOST_MSG_2_8822B 0xffffffffL
2573 #define BIT_HOST_MSG_2_8822B(x) (((x) & BIT_MASK_HOST_MSG_2_8822B) << BIT_SHIFT_HOST_MSG_2_8822B)
2574 #define BIT_GET_HOST_MSG_2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8822B) & BIT_MASK_HOST_MSG_2_8822B)
2577 /* 2 REG_HMEBOX3_8822B */
2579 #define BIT_SHIFT_HOST_MSG_3_8822B 0
2580 #define BIT_MASK_HOST_MSG_3_8822B 0xffffffffL
2581 #define BIT_HOST_MSG_3_8822B(x) (((x) & BIT_MASK_HOST_MSG_3_8822B) << BIT_SHIFT_HOST_MSG_3_8822B)
2582 #define BIT_GET_HOST_MSG_3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8822B) & BIT_MASK_HOST_MSG_3_8822B)
2585 /* 2 REG_LLT_INIT_8822B */
2587 #define BIT_SHIFT_LLTE_RWM_8822B 30
2588 #define BIT_MASK_LLTE_RWM_8822B 0x3
2589 #define BIT_LLTE_RWM_8822B(x) (((x) & BIT_MASK_LLTE_RWM_8822B) << BIT_SHIFT_LLTE_RWM_8822B)
2590 #define BIT_GET_LLTE_RWM_8822B(x) (((x) >> BIT_SHIFT_LLTE_RWM_8822B) & BIT_MASK_LLTE_RWM_8822B)
2593 #define BIT_SHIFT_LLTINI_PDATA_V1_8822B 16
2594 #define BIT_MASK_LLTINI_PDATA_V1_8822B 0xfff
2595 #define BIT_LLTINI_PDATA_V1_8822B(x) (((x) & BIT_MASK_LLTINI_PDATA_V1_8822B) << BIT_SHIFT_LLTINI_PDATA_V1_8822B)
2596 #define BIT_GET_LLTINI_PDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8822B) & BIT_MASK_LLTINI_PDATA_V1_8822B)
2599 #define BIT_SHIFT_LLTINI_HDATA_V1_8822B 0
2600 #define BIT_MASK_LLTINI_HDATA_V1_8822B 0xfff
2601 #define BIT_LLTINI_HDATA_V1_8822B(x) (((x) & BIT_MASK_LLTINI_HDATA_V1_8822B) << BIT_SHIFT_LLTINI_HDATA_V1_8822B)
2602 #define BIT_GET_LLTINI_HDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8822B) & BIT_MASK_LLTINI_HDATA_V1_8822B)
2605 /* 2 REG_LLT_INIT_ADDR_8822B */
2607 #define BIT_SHIFT_LLTINI_ADDR_V1_8822B 0
2608 #define BIT_MASK_LLTINI_ADDR_V1_8822B 0xfff
2609 #define BIT_LLTINI_ADDR_V1_8822B(x) (((x) & BIT_MASK_LLTINI_ADDR_V1_8822B) << BIT_SHIFT_LLTINI_ADDR_V1_8822B)
2610 #define BIT_GET_LLTINI_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8822B) & BIT_MASK_LLTINI_ADDR_V1_8822B)
2613 /* 2 REG_BB_ACCESS_CTRL_8822B */
2615 #define BIT_SHIFT_BB_WRITE_READ_8822B 30
2616 #define BIT_MASK_BB_WRITE_READ_8822B 0x3
2617 #define BIT_BB_WRITE_READ_8822B(x) (((x) & BIT_MASK_BB_WRITE_READ_8822B) << BIT_SHIFT_BB_WRITE_READ_8822B)
2618 #define BIT_GET_BB_WRITE_READ_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8822B) & BIT_MASK_BB_WRITE_READ_8822B)
2621 #define BIT_SHIFT_BB_WRITE_EN_8822B 12
2622 #define BIT_MASK_BB_WRITE_EN_8822B 0xf
2623 #define BIT_BB_WRITE_EN_8822B(x) (((x) & BIT_MASK_BB_WRITE_EN_8822B) << BIT_SHIFT_BB_WRITE_EN_8822B)
2624 #define BIT_GET_BB_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8822B) & BIT_MASK_BB_WRITE_EN_8822B)
2627 #define BIT_SHIFT_BB_ADDR_8822B 2
2628 #define BIT_MASK_BB_ADDR_8822B 0x1ff
2629 #define BIT_BB_ADDR_8822B(x) (((x) & BIT_MASK_BB_ADDR_8822B) << BIT_SHIFT_BB_ADDR_8822B)
2630 #define BIT_GET_BB_ADDR_8822B(x) (((x) >> BIT_SHIFT_BB_ADDR_8822B) & BIT_MASK_BB_ADDR_8822B)
2632 #define BIT_BB_ERRACC_8822B BIT(0)
2634 /* 2 REG_BB_ACCESS_DATA_8822B */
2636 #define BIT_SHIFT_BB_DATA_8822B 0
2637 #define BIT_MASK_BB_DATA_8822B 0xffffffffL
2638 #define BIT_BB_DATA_8822B(x) (((x) & BIT_MASK_BB_DATA_8822B) << BIT_SHIFT_BB_DATA_8822B)
2639 #define BIT_GET_BB_DATA_8822B(x) (((x) >> BIT_SHIFT_BB_DATA_8822B) & BIT_MASK_BB_DATA_8822B)
2642 /* 2 REG_HMEBOX_E0_8822B */
2644 #define BIT_SHIFT_HMEBOX_E0_8822B 0
2645 #define BIT_MASK_HMEBOX_E0_8822B 0xffffffffL
2646 #define BIT_HMEBOX_E0_8822B(x) (((x) & BIT_MASK_HMEBOX_E0_8822B) << BIT_SHIFT_HMEBOX_E0_8822B)
2647 #define BIT_GET_HMEBOX_E0_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8822B) & BIT_MASK_HMEBOX_E0_8822B)
2650 /* 2 REG_HMEBOX_E1_8822B */
2652 #define BIT_SHIFT_HMEBOX_E1_8822B 0
2653 #define BIT_MASK_HMEBOX_E1_8822B 0xffffffffL
2654 #define BIT_HMEBOX_E1_8822B(x) (((x) & BIT_MASK_HMEBOX_E1_8822B) << BIT_SHIFT_HMEBOX_E1_8822B)
2655 #define BIT_GET_HMEBOX_E1_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8822B) & BIT_MASK_HMEBOX_E1_8822B)
2658 /* 2 REG_HMEBOX_E2_8822B */
2660 #define BIT_SHIFT_HMEBOX_E2_8822B 0
2661 #define BIT_MASK_HMEBOX_E2_8822B 0xffffffffL
2662 #define BIT_HMEBOX_E2_8822B(x) (((x) & BIT_MASK_HMEBOX_E2_8822B) << BIT_SHIFT_HMEBOX_E2_8822B)
2663 #define BIT_GET_HMEBOX_E2_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8822B) & BIT_MASK_HMEBOX_E2_8822B)
2666 /* 2 REG_HMEBOX_E3_8822B */
2668 #define BIT_SHIFT_HMEBOX_E3_8822B 0
2669 #define BIT_MASK_HMEBOX_E3_8822B 0xffffffffL
2670 #define BIT_HMEBOX_E3_8822B(x) (((x) & BIT_MASK_HMEBOX_E3_8822B) << BIT_SHIFT_HMEBOX_E3_8822B)
2671 #define BIT_GET_HMEBOX_E3_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8822B) & BIT_MASK_HMEBOX_E3_8822B)
2674 /* 2 REG_NOT_VALID_8822B */
2676 /* 2 REG_CR_EXT_8822B */
2678 #define BIT_SHIFT_PHY_REQ_DELAY_8822B 24
2679 #define BIT_MASK_PHY_REQ_DELAY_8822B 0xf
2680 #define BIT_PHY_REQ_DELAY_8822B(x) (((x) & BIT_MASK_PHY_REQ_DELAY_8822B) << BIT_SHIFT_PHY_REQ_DELAY_8822B)
2681 #define BIT_GET_PHY_REQ_DELAY_8822B(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8822B) & BIT_MASK_PHY_REQ_DELAY_8822B)
2683 #define BIT_SPD_DOWN_8822B BIT(16)
2685 #define BIT_SHIFT_NETYPE4_8822B 4
2686 #define BIT_MASK_NETYPE4_8822B 0x3
2687 #define BIT_NETYPE4_8822B(x) (((x) & BIT_MASK_NETYPE4_8822B) << BIT_SHIFT_NETYPE4_8822B)
2688 #define BIT_GET_NETYPE4_8822B(x) (((x) >> BIT_SHIFT_NETYPE4_8822B) & BIT_MASK_NETYPE4_8822B)
2691 #define BIT_SHIFT_NETYPE3_8822B 2
2692 #define BIT_MASK_NETYPE3_8822B 0x3
2693 #define BIT_NETYPE3_8822B(x) (((x) & BIT_MASK_NETYPE3_8822B) << BIT_SHIFT_NETYPE3_8822B)
2694 #define BIT_GET_NETYPE3_8822B(x) (((x) >> BIT_SHIFT_NETYPE3_8822B) & BIT_MASK_NETYPE3_8822B)
2697 #define BIT_SHIFT_NETYPE2_8822B 0
2698 #define BIT_MASK_NETYPE2_8822B 0x3
2699 #define BIT_NETYPE2_8822B(x) (((x) & BIT_MASK_NETYPE2_8822B) << BIT_SHIFT_NETYPE2_8822B)
2700 #define BIT_GET_NETYPE2_8822B(x) (((x) >> BIT_SHIFT_NETYPE2_8822B) & BIT_MASK_NETYPE2_8822B)
2703 /* 2 REG_FWFF_8822B */
2705 #define BIT_SHIFT_PKTNUM_TH_V1_8822B 24
2706 #define BIT_MASK_PKTNUM_TH_V1_8822B 0xff
2707 #define BIT_PKTNUM_TH_V1_8822B(x) (((x) & BIT_MASK_PKTNUM_TH_V1_8822B) << BIT_SHIFT_PKTNUM_TH_V1_8822B)
2708 #define BIT_GET_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8822B) & BIT_MASK_PKTNUM_TH_V1_8822B)
2711 #define BIT_SHIFT_TIMER_TH_8822B 16
2712 #define BIT_MASK_TIMER_TH_8822B 0xff
2713 #define BIT_TIMER_TH_8822B(x) (((x) & BIT_MASK_TIMER_TH_8822B) << BIT_SHIFT_TIMER_TH_8822B)
2714 #define BIT_GET_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TIMER_TH_8822B) & BIT_MASK_TIMER_TH_8822B)
2717 #define BIT_SHIFT_RXPKT1ENADDR_8822B 0
2718 #define BIT_MASK_RXPKT1ENADDR_8822B 0xffff
2719 #define BIT_RXPKT1ENADDR_8822B(x) (((x) & BIT_MASK_RXPKT1ENADDR_8822B) << BIT_SHIFT_RXPKT1ENADDR_8822B)
2720 #define BIT_GET_RXPKT1ENADDR_8822B(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8822B) & BIT_MASK_RXPKT1ENADDR_8822B)
2723 /* 2 REG_RXFF_PTR_V1_8822B */
2725 /* 2 REG_NOT_VALID_8822B */
2727 #define BIT_SHIFT_RXFF0_RDPTR_V2_8822B 0
2728 #define BIT_MASK_RXFF0_RDPTR_V2_8822B 0x3ffff
2729 #define BIT_RXFF0_RDPTR_V2_8822B(x) (((x) & BIT_MASK_RXFF0_RDPTR_V2_8822B) << BIT_SHIFT_RXFF0_RDPTR_V2_8822B)
2730 #define BIT_GET_RXFF0_RDPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8822B) & BIT_MASK_RXFF0_RDPTR_V2_8822B)
2733 /* 2 REG_RXFF_WTR_V1_8822B */
2735 /* 2 REG_NOT_VALID_8822B */
2737 #define BIT_SHIFT_RXFF0_WTPTR_V2_8822B 0
2738 #define BIT_MASK_RXFF0_WTPTR_V2_8822B 0x3ffff
2739 #define BIT_RXFF0_WTPTR_V2_8822B(x) (((x) & BIT_MASK_RXFF0_WTPTR_V2_8822B) << BIT_SHIFT_RXFF0_WTPTR_V2_8822B)
2740 #define BIT_GET_RXFF0_WTPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8822B) & BIT_MASK_RXFF0_WTPTR_V2_8822B)
2743 /* 2 REG_FE2IMR_8822B */
2744 #define BIT__FE4ISR__IND_MSK_8822B BIT(29)
2745 #define BIT_FS_TXSC_DESC_DONE_INT_EN_8822B BIT(28)
2746 #define BIT_FS_TXSC_BKDONE_INT_EN_8822B BIT(27)
2747 #define BIT_FS_TXSC_BEDONE_INT_EN_8822B BIT(26)
2748 #define BIT_FS_TXSC_VIDONE_INT_EN_8822B BIT(25)
2749 #define BIT_FS_TXSC_VODONE_INT_EN_8822B BIT(24)
2750 #define BIT_FS_ATIM_MB7_INT_EN_8822B BIT(23)
2751 #define BIT_FS_ATIM_MB6_INT_EN_8822B BIT(22)
2752 #define BIT_FS_ATIM_MB5_INT_EN_8822B BIT(21)
2753 #define BIT_FS_ATIM_MB4_INT_EN_8822B BIT(20)
2754 #define BIT_FS_ATIM_MB3_INT_EN_8822B BIT(19)
2755 #define BIT_FS_ATIM_MB2_INT_EN_8822B BIT(18)
2756 #define BIT_FS_ATIM_MB1_INT_EN_8822B BIT(17)
2757 #define BIT_FS_ATIM_MB0_INT_EN_8822B BIT(16)
2758 #define BIT_FS_TBTT4INT_EN_8822B BIT(11)
2759 #define BIT_FS_TBTT3INT_EN_8822B BIT(10)
2760 #define BIT_FS_TBTT2INT_EN_8822B BIT(9)
2761 #define BIT_FS_TBTT1INT_EN_8822B BIT(8)
2762 #define BIT_FS_TBTT0_MB7INT_EN_8822B BIT(7)
2763 #define BIT_FS_TBTT0_MB6INT_EN_8822B BIT(6)
2764 #define BIT_FS_TBTT0_MB5INT_EN_8822B BIT(5)
2765 #define BIT_FS_TBTT0_MB4INT_EN_8822B BIT(4)
2766 #define BIT_FS_TBTT0_MB3INT_EN_8822B BIT(3)
2767 #define BIT_FS_TBTT0_MB2INT_EN_8822B BIT(2)
2768 #define BIT_FS_TBTT0_MB1INT_EN_8822B BIT(1)
2769 #define BIT_FS_TBTT0_INT_EN_8822B BIT(0)
2771 /* 2 REG_FE2ISR_8822B */
2772 #define BIT__FE4ISR__IND_INT_8822B BIT(29)
2773 #define BIT_FS_TXSC_DESC_DONE_INT_8822B BIT(28)
2774 #define BIT_FS_TXSC_BKDONE_INT_8822B BIT(27)
2775 #define BIT_FS_TXSC_BEDONE_INT_8822B BIT(26)
2776 #define BIT_FS_TXSC_VIDONE_INT_8822B BIT(25)
2777 #define BIT_FS_TXSC_VODONE_INT_8822B BIT(24)
2778 #define BIT_FS_ATIM_MB7_INT_8822B BIT(23)
2779 #define BIT_FS_ATIM_MB6_INT_8822B BIT(22)
2780 #define BIT_FS_ATIM_MB5_INT_8822B BIT(21)
2781 #define BIT_FS_ATIM_MB4_INT_8822B BIT(20)
2782 #define BIT_FS_ATIM_MB3_INT_8822B BIT(19)
2783 #define BIT_FS_ATIM_MB2_INT_8822B BIT(18)
2784 #define BIT_FS_ATIM_MB1_INT_8822B BIT(17)
2785 #define BIT_FS_ATIM_MB0_INT_8822B BIT(16)
2786 #define BIT_FS_TBTT4INT_8822B BIT(11)
2787 #define BIT_FS_TBTT3INT_8822B BIT(10)
2788 #define BIT_FS_TBTT2INT_8822B BIT(9)
2789 #define BIT_FS_TBTT1INT_8822B BIT(8)
2790 #define BIT_FS_TBTT0_MB7INT_8822B BIT(7)
2791 #define BIT_FS_TBTT0_MB6INT_8822B BIT(6)
2792 #define BIT_FS_TBTT0_MB5INT_8822B BIT(5)
2793 #define BIT_FS_TBTT0_MB4INT_8822B BIT(4)
2794 #define BIT_FS_TBTT0_MB3INT_8822B BIT(3)
2795 #define BIT_FS_TBTT0_MB2INT_8822B BIT(2)
2796 #define BIT_FS_TBTT0_MB1INT_8822B BIT(1)
2797 #define BIT_FS_TBTT0_INT_8822B BIT(0)
2799 /* 2 REG_FE3IMR_8822B */
2800 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT__EN_8822B BIT(31)
2801 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT__EN_8822B BIT(30)
2802 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT__EN_8822B BIT(29)
2803 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT__EN_8822B BIT(28)
2804 #define BIT_FS_BCNDMA4_INT_EN_8822B BIT(27)
2805 #define BIT_FS_BCNDMA3_INT_EN_8822B BIT(26)
2806 #define BIT_FS_BCNDMA2_INT_EN_8822B BIT(25)
2807 #define BIT_FS_BCNDMA1_INT_EN_8822B BIT(24)
2808 #define BIT_FS_BCNDMA0_MB7_INT_EN_8822B BIT(23)
2809 #define BIT_FS_BCNDMA0_MB6_INT_EN_8822B BIT(22)
2810 #define BIT_FS_BCNDMA0_MB5_INT_EN_8822B BIT(21)
2811 #define BIT_FS_BCNDMA0_MB4_INT_EN_8822B BIT(20)
2812 #define BIT_FS_BCNDMA0_MB3_INT_EN_8822B BIT(19)
2813 #define BIT_FS_BCNDMA0_MB2_INT_EN_8822B BIT(18)
2814 #define BIT_FS_BCNDMA0_MB1_INT_EN_8822B BIT(17)
2815 #define BIT_FS_BCNDMA0_INT_EN_8822B BIT(16)
2816 #define BIT_FS_MTI_BCNIVLEAR_INT__EN_8822B BIT(15)
2817 #define BIT_FS_BCNERLY4_INT_EN_8822B BIT(11)
2818 #define BIT_FS_BCNERLY3_INT_EN_8822B BIT(10)
2819 #define BIT_FS_BCNERLY2_INT_EN_8822B BIT(9)
2820 #define BIT_FS_BCNERLY1_INT_EN_8822B BIT(8)
2821 #define BIT_FS_BCNERLY0_MB7INT_EN_8822B BIT(7)
2822 #define BIT_FS_BCNERLY0_MB6INT_EN_8822B BIT(6)
2823 #define BIT_FS_BCNERLY0_MB5INT_EN_8822B BIT(5)
2824 #define BIT_FS_BCNERLY0_MB4INT_EN_8822B BIT(4)
2825 #define BIT_FS_BCNERLY0_MB3INT_EN_8822B BIT(3)
2826 #define BIT_FS_BCNERLY0_MB2INT_EN_8822B BIT(2)
2827 #define BIT_FS_BCNERLY0_MB1INT_EN_8822B BIT(1)
2828 #define BIT_FS_BCNERLY0_INT_EN_8822B BIT(0)
2830 /* 2 REG_FE3ISR_8822B */
2831 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT_8822B BIT(31)
2832 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT_8822B BIT(30)
2833 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT_8822B BIT(29)
2834 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT_8822B BIT(28)
2835 #define BIT_FS_BCNDMA4_INT_8822B BIT(27)
2836 #define BIT_FS_BCNDMA3_INT_8822B BIT(26)
2837 #define BIT_FS_BCNDMA2_INT_8822B BIT(25)
2838 #define BIT_FS_BCNDMA1_INT_8822B BIT(24)
2839 #define BIT_FS_BCNDMA0_MB7_INT_8822B BIT(23)
2840 #define BIT_FS_BCNDMA0_MB6_INT_8822B BIT(22)
2841 #define BIT_FS_BCNDMA0_MB5_INT_8822B BIT(21)
2842 #define BIT_FS_BCNDMA0_MB4_INT_8822B BIT(20)
2843 #define BIT_FS_BCNDMA0_MB3_INT_8822B BIT(19)
2844 #define BIT_FS_BCNDMA0_MB2_INT_8822B BIT(18)
2845 #define BIT_FS_BCNDMA0_MB1_INT_8822B BIT(17)
2846 #define BIT_FS_BCNDMA0_INT_8822B BIT(16)
2847 #define BIT_FS_MTI_BCNIVLEAR_INT_8822B BIT(15)
2848 #define BIT_FS_BCNERLY4_INT_8822B BIT(11)
2849 #define BIT_FS_BCNERLY3_INT_8822B BIT(10)
2850 #define BIT_FS_BCNERLY2_INT_8822B BIT(9)
2851 #define BIT_FS_BCNERLY1_INT_8822B BIT(8)
2852 #define BIT_FS_BCNERLY0_MB7INT_8822B BIT(7)
2853 #define BIT_FS_BCNERLY0_MB6INT_8822B BIT(6)
2854 #define BIT_FS_BCNERLY0_MB5INT_8822B BIT(5)
2855 #define BIT_FS_BCNERLY0_MB4INT_8822B BIT(4)
2856 #define BIT_FS_BCNERLY0_MB3INT_8822B BIT(3)
2857 #define BIT_FS_BCNERLY0_MB2INT_8822B BIT(2)
2858 #define BIT_FS_BCNERLY0_MB1INT_8822B BIT(1)
2859 #define BIT_FS_BCNERLY0_INT_8822B BIT(0)
2861 /* 2 REG_FE4IMR_8822B */
2862 #define BIT_FS_CLI3_TXPKTIN_INT_EN_8822B BIT(19)
2863 #define BIT_FS_CLI2_TXPKTIN_INT_EN_8822B BIT(18)
2864 #define BIT_FS_CLI1_TXPKTIN_INT_EN_8822B BIT(17)
2865 #define BIT_FS_CLI0_TXPKTIN_INT_EN_8822B BIT(16)
2866 #define BIT_FS_CLI3_RX_UMD0_INT_EN_8822B BIT(15)
2867 #define BIT_FS_CLI3_RX_UMD1_INT_EN_8822B BIT(14)
2868 #define BIT_FS_CLI3_RX_BMD0_INT_EN_8822B BIT(13)
2869 #define BIT_FS_CLI3_RX_BMD1_INT_EN_8822B BIT(12)
2870 #define BIT_FS_CLI2_RX_UMD0_INT_EN_8822B BIT(11)
2871 #define BIT_FS_CLI2_RX_UMD1_INT_EN_8822B BIT(10)
2872 #define BIT_FS_CLI2_RX_BMD0_INT_EN_8822B BIT(9)
2873 #define BIT_FS_CLI2_RX_BMD1_INT_EN_8822B BIT(8)
2874 #define BIT_FS_CLI1_RX_UMD0_INT_EN_8822B BIT(7)
2875 #define BIT_FS_CLI1_RX_UMD1_INT_EN_8822B BIT(6)
2876 #define BIT_FS_CLI1_RX_BMD0_INT_EN_8822B BIT(5)
2877 #define BIT_FS_CLI1_RX_BMD1_INT_EN_8822B BIT(4)
2878 #define BIT_FS_CLI0_RX_UMD0_INT_EN_8822B BIT(3)
2879 #define BIT_FS_CLI0_RX_UMD1_INT_EN_8822B BIT(2)
2880 #define BIT_FS_CLI0_RX_BMD0_INT_EN_8822B BIT(1)
2881 #define BIT_FS_CLI0_RX_BMD1_INT_EN_8822B BIT(0)
2883 /* 2 REG_FE4ISR_8822B */
2884 #define BIT_FS_CLI3_TXPKTIN_INT_8822B BIT(19)
2885 #define BIT_FS_CLI2_TXPKTIN_INT_8822B BIT(18)
2886 #define BIT_FS_CLI1_TXPKTIN_INT_8822B BIT(17)
2887 #define BIT_FS_CLI0_TXPKTIN_INT_8822B BIT(16)
2888 #define BIT_FS_CLI3_RX_UMD0_INT_8822B BIT(15)
2889 #define BIT_FS_CLI3_RX_UMD1_INT_8822B BIT(14)
2890 #define BIT_FS_CLI3_RX_BMD0_INT_8822B BIT(13)
2891 #define BIT_FS_CLI3_RX_BMD1_INT_8822B BIT(12)
2892 #define BIT_FS_CLI2_RX_UMD0_INT_8822B BIT(11)
2893 #define BIT_FS_CLI2_RX_UMD1_INT_8822B BIT(10)
2894 #define BIT_FS_CLI2_RX_BMD0_INT_8822B BIT(9)
2895 #define BIT_FS_CLI2_RX_BMD1_INT_8822B BIT(8)
2896 #define BIT_FS_CLI1_RX_UMD0_INT_8822B BIT(7)
2897 #define BIT_FS_CLI1_RX_UMD1_INT_8822B BIT(6)
2898 #define BIT_FS_CLI1_RX_BMD0_INT_8822B BIT(5)
2899 #define BIT_FS_CLI1_RX_BMD1_INT_8822B BIT(4)
2900 #define BIT_FS_CLI0_RX_UMD0_INT_8822B BIT(3)
2901 #define BIT_FS_CLI0_RX_UMD1_INT_8822B BIT(2)
2902 #define BIT_FS_CLI0_RX_BMD0_INT_8822B BIT(1)
2903 #define BIT_FS_CLI0_RX_BMD1_INT_8822B BIT(0)
2905 /* 2 REG_FT1IMR_8822B */
2906 #define BIT__FT2ISR__IND_MSK_8822B BIT(30)
2907 #define BIT_FTM_PTT_INT_EN_8822B BIT(29)
2908 #define BIT_RXFTMREQ_INT_EN_8822B BIT(28)
2909 #define BIT_RXFTM_INT_EN_8822B BIT(27)
2910 #define BIT_TXFTM_INT_EN_8822B BIT(26)
2911 #define BIT_FS_H2C_CMD_OK_INT_EN_8822B BIT(25)
2912 #define BIT_FS_H2C_CMD_FULL_INT_EN_8822B BIT(24)
2913 #define BIT_FS_MACID_PWRCHANGE5_INT_EN_8822B BIT(23)
2914 #define BIT_FS_MACID_PWRCHANGE4_INT_EN_8822B BIT(22)
2915 #define BIT_FS_MACID_PWRCHANGE3_INT_EN_8822B BIT(21)
2916 #define BIT_FS_MACID_PWRCHANGE2_INT_EN_8822B BIT(20)
2917 #define BIT_FS_MACID_PWRCHANGE1_INT_EN_8822B BIT(19)
2918 #define BIT_FS_MACID_PWRCHANGE0_INT_EN_8822B BIT(18)
2919 #define BIT_FS_CTWEND2_INT_EN_8822B BIT(17)
2920 #define BIT_FS_CTWEND1_INT_EN_8822B BIT(16)
2921 #define BIT_FS_CTWEND0_INT_EN_8822B BIT(15)
2922 #define BIT_FS_TX_NULL1_INT_EN_8822B BIT(14)
2923 #define BIT_FS_TX_NULL0_INT_EN_8822B BIT(13)
2924 #define BIT_FS_TSF_BIT32_TOGGLE_EN_8822B BIT(12)
2925 #define BIT_FS_P2P_RFON2_INT_EN_8822B BIT(11)
2926 #define BIT_FS_P2P_RFOFF2_INT_EN_8822B BIT(10)
2927 #define BIT_FS_P2P_RFON1_INT_EN_8822B BIT(9)
2928 #define BIT_FS_P2P_RFOFF1_INT_EN_8822B BIT(8)
2929 #define BIT_FS_P2P_RFON0_INT_EN_8822B BIT(7)
2930 #define BIT_FS_P2P_RFOFF0_INT_EN_8822B BIT(6)
2931 #define BIT_FS_RX_UAPSDMD1_EN_8822B BIT(5)
2932 #define BIT_FS_RX_UAPSDMD0_EN_8822B BIT(4)
2933 #define BIT_FS_TRIGGER_PKT_EN_8822B BIT(3)
2934 #define BIT_FS_EOSP_INT_EN_8822B BIT(2)
2935 #define BIT_FS_RPWM2_INT_EN_8822B BIT(1)
2936 #define BIT_FS_RPWM_INT_EN_8822B BIT(0)
2938 /* 2 REG_FT1ISR_8822B */
2939 #define BIT__FT2ISR__IND_INT_8822B BIT(30)
2940 #define BIT_FTM_PTT_INT_8822B BIT(29)
2941 #define BIT_RXFTMREQ_INT_8822B BIT(28)
2942 #define BIT_RXFTM_INT_8822B BIT(27)
2943 #define BIT_TXFTM_INT_8822B BIT(26)
2944 #define BIT_FS_H2C_CMD_OK_INT_8822B BIT(25)
2945 #define BIT_FS_H2C_CMD_FULL_INT_8822B BIT(24)
2946 #define BIT_FS_MACID_PWRCHANGE5_INT_8822B BIT(23)
2947 #define BIT_FS_MACID_PWRCHANGE4_INT_8822B BIT(22)
2948 #define BIT_FS_MACID_PWRCHANGE3_INT_8822B BIT(21)
2949 #define BIT_FS_MACID_PWRCHANGE2_INT_8822B BIT(20)
2950 #define BIT_FS_MACID_PWRCHANGE1_INT_8822B BIT(19)
2951 #define BIT_FS_MACID_PWRCHANGE0_INT_8822B BIT(18)
2952 #define BIT_FS_CTWEND2_INT_8822B BIT(17)
2953 #define BIT_FS_CTWEND1_INT_8822B BIT(16)
2954 #define BIT_FS_CTWEND0_INT_8822B BIT(15)
2955 #define BIT_FS_TX_NULL1_INT_8822B BIT(14)
2956 #define BIT_FS_TX_NULL0_INT_8822B BIT(13)
2957 #define BIT_FS_TSF_BIT32_TOGGLE_INT_8822B BIT(12)
2958 #define BIT_FS_P2P_RFON2_INT_8822B BIT(11)
2959 #define BIT_FS_P2P_RFOFF2_INT_8822B BIT(10)
2960 #define BIT_FS_P2P_RFON1_INT_8822B BIT(9)
2961 #define BIT_FS_P2P_RFOFF1_INT_8822B BIT(8)
2962 #define BIT_FS_P2P_RFON0_INT_8822B BIT(7)
2963 #define BIT_FS_P2P_RFOFF0_INT_8822B BIT(6)
2964 #define BIT_FS_RX_UAPSDMD1_INT_8822B BIT(5)
2965 #define BIT_FS_RX_UAPSDMD0_INT_8822B BIT(4)
2966 #define BIT_FS_TRIGGER_PKT_INT_8822B BIT(3)
2967 #define BIT_FS_EOSP_INT_8822B BIT(2)
2968 #define BIT_FS_RPWM2_INT_8822B BIT(1)
2969 #define BIT_FS_RPWM_INT_8822B BIT(0)
2971 /* 2 REG_SPWR0_8822B */
2973 #define BIT_SHIFT_MID_31TO0_8822B 0
2974 #define BIT_MASK_MID_31TO0_8822B 0xffffffffL
2975 #define BIT_MID_31TO0_8822B(x) (((x) & BIT_MASK_MID_31TO0_8822B) << BIT_SHIFT_MID_31TO0_8822B)
2976 #define BIT_GET_MID_31TO0_8822B(x) (((x) >> BIT_SHIFT_MID_31TO0_8822B) & BIT_MASK_MID_31TO0_8822B)
2979 /* 2 REG_SPWR1_8822B */
2981 #define BIT_SHIFT_MID_63TO32_8822B 0
2982 #define BIT_MASK_MID_63TO32_8822B 0xffffffffL
2983 #define BIT_MID_63TO32_8822B(x) (((x) & BIT_MASK_MID_63TO32_8822B) << BIT_SHIFT_MID_63TO32_8822B)
2984 #define BIT_GET_MID_63TO32_8822B(x) (((x) >> BIT_SHIFT_MID_63TO32_8822B) & BIT_MASK_MID_63TO32_8822B)
2987 /* 2 REG_SPWR2_8822B */
2989 #define BIT_SHIFT_MID_95O64_8822B 0
2990 #define BIT_MASK_MID_95O64_8822B 0xffffffffL
2991 #define BIT_MID_95O64_8822B(x) (((x) & BIT_MASK_MID_95O64_8822B) << BIT_SHIFT_MID_95O64_8822B)
2992 #define BIT_GET_MID_95O64_8822B(x) (((x) >> BIT_SHIFT_MID_95O64_8822B) & BIT_MASK_MID_95O64_8822B)
2995 /* 2 REG_SPWR3_8822B */
2997 #define BIT_SHIFT_MID_127TO96_8822B 0
2998 #define BIT_MASK_MID_127TO96_8822B 0xffffffffL
2999 #define BIT_MID_127TO96_8822B(x) (((x) & BIT_MASK_MID_127TO96_8822B) << BIT_SHIFT_MID_127TO96_8822B)
3000 #define BIT_GET_MID_127TO96_8822B(x) (((x) >> BIT_SHIFT_MID_127TO96_8822B) & BIT_MASK_MID_127TO96_8822B)
3003 /* 2 REG_POWSEQ_8822B */
3005 #define BIT_SHIFT_SEQNUM_MID_8822B 16
3006 #define BIT_MASK_SEQNUM_MID_8822B 0xffff
3007 #define BIT_SEQNUM_MID_8822B(x) (((x) & BIT_MASK_SEQNUM_MID_8822B) << BIT_SHIFT_SEQNUM_MID_8822B)
3008 #define BIT_GET_SEQNUM_MID_8822B(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8822B) & BIT_MASK_SEQNUM_MID_8822B)
3011 #define BIT_SHIFT_REF_MID_8822B 0
3012 #define BIT_MASK_REF_MID_8822B 0x7f
3013 #define BIT_REF_MID_8822B(x) (((x) & BIT_MASK_REF_MID_8822B) << BIT_SHIFT_REF_MID_8822B)
3014 #define BIT_GET_REF_MID_8822B(x) (((x) >> BIT_SHIFT_REF_MID_8822B) & BIT_MASK_REF_MID_8822B)
3017 /* 2 REG_TC7_CTRL_V1_8822B */
3018 #define BIT_TC7INT_EN_8822B BIT(26)
3019 #define BIT_TC7MODE_8822B BIT(25)
3020 #define BIT_TC7EN_8822B BIT(24)
3022 #define BIT_SHIFT_TC7DATA_8822B 0
3023 #define BIT_MASK_TC7DATA_8822B 0xffffff
3024 #define BIT_TC7DATA_8822B(x) (((x) & BIT_MASK_TC7DATA_8822B) << BIT_SHIFT_TC7DATA_8822B)
3025 #define BIT_GET_TC7DATA_8822B(x) (((x) >> BIT_SHIFT_TC7DATA_8822B) & BIT_MASK_TC7DATA_8822B)
3028 /* 2 REG_TC8_CTRL_V1_8822B */
3029 #define BIT_TC8INT_EN_8822B BIT(26)
3030 #define BIT_TC8MODE_8822B BIT(25)
3031 #define BIT_TC8EN_8822B BIT(24)
3033 #define BIT_SHIFT_TC8DATA_8822B 0
3034 #define BIT_MASK_TC8DATA_8822B 0xffffff
3035 #define BIT_TC8DATA_8822B(x) (((x) & BIT_MASK_TC8DATA_8822B) << BIT_SHIFT_TC8DATA_8822B)
3036 #define BIT_GET_TC8DATA_8822B(x) (((x) >> BIT_SHIFT_TC8DATA_8822B) & BIT_MASK_TC8DATA_8822B)
3039 /* 2 REG_FT2IMR_8822B */
3040 #define BIT_FS_CLI3_RX_UAPSDMD1_EN_8822B BIT(31)
3041 #define BIT_FS_CLI3_RX_UAPSDMD0_EN_8822B BIT(30)
3042 #define BIT_FS_CLI3_TRIGGER_PKT_EN_8822B BIT(29)
3043 #define BIT_FS_CLI3_EOSP_INT_EN_8822B BIT(28)
3044 #define BIT_FS_CLI2_RX_UAPSDMD1_EN_8822B BIT(27)
3045 #define BIT_FS_CLI2_RX_UAPSDMD0_EN_8822B BIT(26)
3046 #define BIT_FS_CLI2_TRIGGER_PKT_EN_8822B BIT(25)
3047 #define BIT_FS_CLI2_EOSP_INT_EN_8822B BIT(24)
3048 #define BIT_FS_CLI1_RX_UAPSDMD1_EN_8822B BIT(23)
3049 #define BIT_FS_CLI1_RX_UAPSDMD0_EN_8822B BIT(22)
3050 #define BIT_FS_CLI1_TRIGGER_PKT_EN_8822B BIT(21)
3051 #define BIT_FS_CLI1_EOSP_INT_EN_8822B BIT(20)
3052 #define BIT_FS_CLI0_RX_UAPSDMD1_EN_8822B BIT(19)
3053 #define BIT_FS_CLI0_RX_UAPSDMD0_EN_8822B BIT(18)
3054 #define BIT_FS_CLI0_TRIGGER_PKT_EN_8822B BIT(17)
3055 #define BIT_FS_CLI0_EOSP_INT_EN_8822B BIT(16)
3056 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_EN_8822B BIT(9)
3057 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_EN_8822B BIT(8)
3058 #define BIT_FS_CLI3_TX_NULL1_INT_EN_8822B BIT(7)
3059 #define BIT_FS_CLI3_TX_NULL0_INT_EN_8822B BIT(6)
3060 #define BIT_FS_CLI2_TX_NULL1_INT_EN_8822B BIT(5)
3061 #define BIT_FS_CLI2_TX_NULL0_INT_EN_8822B BIT(4)
3062 #define BIT_FS_CLI1_TX_NULL1_INT_EN_8822B BIT(3)
3063 #define BIT_FS_CLI1_TX_NULL0_INT_EN_8822B BIT(2)
3064 #define BIT_FS_CLI0_TX_NULL1_INT_EN_8822B BIT(1)
3065 #define BIT_FS_CLI0_TX_NULL0_INT_EN_8822B BIT(0)
3067 /* 2 REG_FT2ISR_8822B */
3068 #define BIT_FS_CLI3_RX_UAPSDMD1_INT_8822B BIT(31)
3069 #define BIT_FS_CLI3_RX_UAPSDMD0_INT_8822B BIT(30)
3070 #define BIT_FS_CLI3_TRIGGER_PKT_INT_8822B BIT(29)
3071 #define BIT_FS_CLI3_EOSP_INT_8822B BIT(28)
3072 #define BIT_FS_CLI2_RX_UAPSDMD1_INT_8822B BIT(27)
3073 #define BIT_FS_CLI2_RX_UAPSDMD0_INT_8822B BIT(26)
3074 #define BIT_FS_CLI2_TRIGGER_PKT_INT_8822B BIT(25)
3075 #define BIT_FS_CLI2_EOSP_INT_8822B BIT(24)
3076 #define BIT_FS_CLI1_RX_UAPSDMD1_INT_8822B BIT(23)
3077 #define BIT_FS_CLI1_RX_UAPSDMD0_INT_8822B BIT(22)
3078 #define BIT_FS_CLI1_TRIGGER_PKT_INT_8822B BIT(21)
3079 #define BIT_FS_CLI1_EOSP_INT_8822B BIT(20)
3080 #define BIT_FS_CLI0_RX_UAPSDMD1_INT_8822B BIT(19)
3081 #define BIT_FS_CLI0_RX_UAPSDMD0_INT_8822B BIT(18)
3082 #define BIT_FS_CLI0_TRIGGER_PKT_INT_8822B BIT(17)
3083 #define BIT_FS_CLI0_EOSP_INT_8822B BIT(16)
3084 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_INT_8822B BIT(9)
3085 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_INT_8822B BIT(8)
3086 #define BIT_FS_CLI3_TX_NULL1_INT_8822B BIT(7)
3087 #define BIT_FS_CLI3_TX_NULL0_INT_8822B BIT(6)
3088 #define BIT_FS_CLI2_TX_NULL1_INT_8822B BIT(5)
3089 #define BIT_FS_CLI2_TX_NULL0_INT_8822B BIT(4)
3090 #define BIT_FS_CLI1_TX_NULL1_INT_8822B BIT(3)
3091 #define BIT_FS_CLI1_TX_NULL0_INT_8822B BIT(2)
3092 #define BIT_FS_CLI0_TX_NULL1_INT_8822B BIT(1)
3093 #define BIT_FS_CLI0_TX_NULL0_INT_8822B BIT(0)
3095 /* 2 REG_MSG2_8822B */
3097 #define BIT_SHIFT_FW_MSG2_8822B 0
3098 #define BIT_MASK_FW_MSG2_8822B 0xffffffffL
3099 #define BIT_FW_MSG2_8822B(x) (((x) & BIT_MASK_FW_MSG2_8822B) << BIT_SHIFT_FW_MSG2_8822B)
3100 #define BIT_GET_FW_MSG2_8822B(x) (((x) >> BIT_SHIFT_FW_MSG2_8822B) & BIT_MASK_FW_MSG2_8822B)
3103 /* 2 REG_MSG3_8822B */
3105 #define BIT_SHIFT_FW_MSG3_8822B 0
3106 #define BIT_MASK_FW_MSG3_8822B 0xffffffffL
3107 #define BIT_FW_MSG3_8822B(x) (((x) & BIT_MASK_FW_MSG3_8822B) << BIT_SHIFT_FW_MSG3_8822B)
3108 #define BIT_GET_FW_MSG3_8822B(x) (((x) >> BIT_SHIFT_FW_MSG3_8822B) & BIT_MASK_FW_MSG3_8822B)
3111 /* 2 REG_MSG4_8822B */
3113 #define BIT_SHIFT_FW_MSG4_8822B 0
3114 #define BIT_MASK_FW_MSG4_8822B 0xffffffffL
3115 #define BIT_FW_MSG4_8822B(x) (((x) & BIT_MASK_FW_MSG4_8822B) << BIT_SHIFT_FW_MSG4_8822B)
3116 #define BIT_GET_FW_MSG4_8822B(x) (((x) >> BIT_SHIFT_FW_MSG4_8822B) & BIT_MASK_FW_MSG4_8822B)
3119 /* 2 REG_MSG5_8822B */
3121 #define BIT_SHIFT_FW_MSG5_8822B 0
3122 #define BIT_MASK_FW_MSG5_8822B 0xffffffffL
3123 #define BIT_FW_MSG5_8822B(x) (((x) & BIT_MASK_FW_MSG5_8822B) << BIT_SHIFT_FW_MSG5_8822B)
3124 #define BIT_GET_FW_MSG5_8822B(x) (((x) >> BIT_SHIFT_FW_MSG5_8822B) & BIT_MASK_FW_MSG5_8822B)
3127 /* 2 REG_NOT_VALID_8822B */
3129 /* 2 REG_FIFOPAGE_CTRL_1_8822B */
3131 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B 16
3132 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B 0xff
3133 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8822B(x) (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B) << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B)
3134 #define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B)
3137 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B 0
3138 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B 0xff
3139 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8822B(x) (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B) << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B)
3140 #define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B)
3143 /* 2 REG_FIFOPAGE_CTRL_2_8822B */
3144 #define BIT_BCN_VALID_1_V1_8822B BIT(31)
3146 #define BIT_SHIFT_BCN_HEAD_1_V1_8822B 16
3147 #define BIT_MASK_BCN_HEAD_1_V1_8822B 0xfff
3148 #define BIT_BCN_HEAD_1_V1_8822B(x) (((x) & BIT_MASK_BCN_HEAD_1_V1_8822B) << BIT_SHIFT_BCN_HEAD_1_V1_8822B)
3149 #define BIT_GET_BCN_HEAD_1_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8822B) & BIT_MASK_BCN_HEAD_1_V1_8822B)
3151 #define BIT_BCN_VALID_V1_8822B BIT(15)
3153 #define BIT_SHIFT_BCN_HEAD_V1_8822B 0
3154 #define BIT_MASK_BCN_HEAD_V1_8822B 0xfff
3155 #define BIT_BCN_HEAD_V1_8822B(x) (((x) & BIT_MASK_BCN_HEAD_V1_8822B) << BIT_SHIFT_BCN_HEAD_V1_8822B)
3156 #define BIT_GET_BCN_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8822B) & BIT_MASK_BCN_HEAD_V1_8822B)
3159 /* 2 REG_AUTO_LLT_V1_8822B */
3161 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 24
3162 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 0xff
3163 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3164 #define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3167 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8822B 8
3168 #define BIT_MASK_LLT_FREE_PAGE_V1_8822B 0xffff
3169 #define BIT_LLT_FREE_PAGE_V1_8822B(x) (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8822B) << BIT_SHIFT_LLT_FREE_PAGE_V1_8822B)
3170 #define BIT_GET_LLT_FREE_PAGE_V1_8822B(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8822B) & BIT_MASK_LLT_FREE_PAGE_V1_8822B)
3173 #define BIT_SHIFT_BLK_DESC_NUM_8822B 4
3174 #define BIT_MASK_BLK_DESC_NUM_8822B 0xf
3175 #define BIT_BLK_DESC_NUM_8822B(x) (((x) & BIT_MASK_BLK_DESC_NUM_8822B) << BIT_SHIFT_BLK_DESC_NUM_8822B)
3176 #define BIT_GET_BLK_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8822B) & BIT_MASK_BLK_DESC_NUM_8822B)
3178 #define BIT_R_BCN_HEAD_SEL_8822B BIT(3)
3179 #define BIT_R_EN_BCN_SW_HEAD_SEL_8822B BIT(2)
3180 #define BIT_LLT_DBG_SEL_8822B BIT(1)
3181 #define BIT_AUTO_INIT_LLT_V1_8822B BIT(0)
3183 /* 2 REG_TXDMA_OFFSET_CHK_8822B */
3184 #define BIT_EM_CHKSUM_FIN_8822B BIT(31)
3185 #define BIT_EMN_PCIE_DMA_MOD_8822B BIT(30)
3186 #define BIT_EN_TXQUE_CLR_8822B BIT(29)
3187 #define BIT_EN_PCIE_FIFO_MODE_8822B BIT(28)
3189 #define BIT_SHIFT_PG_UNDER_TH_V1_8822B 16
3190 #define BIT_MASK_PG_UNDER_TH_V1_8822B 0xfff
3191 #define BIT_PG_UNDER_TH_V1_8822B(x) (((x) & BIT_MASK_PG_UNDER_TH_V1_8822B) << BIT_SHIFT_PG_UNDER_TH_V1_8822B)
3192 #define BIT_GET_PG_UNDER_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8822B) & BIT_MASK_PG_UNDER_TH_V1_8822B)
3194 #define BIT_RESTORE_H2C_ADDRESS_8822B BIT(15)
3195 #define BIT_SDIO_TXDESC_CHKSUM_EN_8822B BIT(13)
3196 #define BIT_RST_RDPTR_8822B BIT(12)
3197 #define BIT_RST_WRPTR_8822B BIT(11)
3198 #define BIT_CHK_PG_TH_EN_8822B BIT(10)
3199 #define BIT_DROP_DATA_EN_8822B BIT(9)
3200 #define BIT_CHECK_OFFSET_EN_8822B BIT(8)
3202 #define BIT_SHIFT_CHECK_OFFSET_8822B 0
3203 #define BIT_MASK_CHECK_OFFSET_8822B 0xff
3204 #define BIT_CHECK_OFFSET_8822B(x) (((x) & BIT_MASK_CHECK_OFFSET_8822B) << BIT_SHIFT_CHECK_OFFSET_8822B)
3205 #define BIT_GET_CHECK_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8822B) & BIT_MASK_CHECK_OFFSET_8822B)
3208 /* 2 REG_TXDMA_STATUS_8822B */
3209 #define BIT_HI_OQT_UDN_8822B BIT(17)
3210 #define BIT_HI_OQT_OVF_8822B BIT(16)
3211 #define BIT_PAYLOAD_CHKSUM_ERR_8822B BIT(15)
3212 #define BIT_PAYLOAD_UDN_8822B BIT(14)
3213 #define BIT_PAYLOAD_OVF_8822B BIT(13)
3214 #define BIT_DSC_CHKSUM_FAIL_8822B BIT(12)
3215 #define BIT_UNKNOWN_QSEL_8822B BIT(11)
3216 #define BIT_EP_QSEL_DIFF_8822B BIT(10)
3217 #define BIT_TX_OFFS_UNMATCH_8822B BIT(9)
3218 #define BIT_TXOQT_UDN_8822B BIT(8)
3219 #define BIT_TXOQT_OVF_8822B BIT(7)
3220 #define BIT_TXDMA_SFF_UDN_8822B BIT(6)
3221 #define BIT_TXDMA_SFF_OVF_8822B BIT(5)
3222 #define BIT_LLT_NULL_PG_8822B BIT(4)
3223 #define BIT_PAGE_UDN_8822B BIT(3)
3224 #define BIT_PAGE_OVF_8822B BIT(2)
3225 #define BIT_TXFF_PG_UDN_8822B BIT(1)
3226 #define BIT_TXFF_PG_OVF_8822B BIT(0)
3228 /* 2 REG_TX_DMA_DBG_8822B */
3230 /* 2 REG_TQPNT1_8822B */
3232 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8822B 16
3233 #define BIT_MASK_HPQ_HIGH_TH_V1_8822B 0xfff
3234 #define BIT_HPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_HPQ_HIGH_TH_V1_8822B)
3235 #define BIT_GET_HPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8822B) & BIT_MASK_HPQ_HIGH_TH_V1_8822B)
3238 #define BIT_SHIFT_HPQ_LOW_TH_V1_8822B 0
3239 #define BIT_MASK_HPQ_LOW_TH_V1_8822B 0xfff
3240 #define BIT_HPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_HPQ_LOW_TH_V1_8822B) << BIT_SHIFT_HPQ_LOW_TH_V1_8822B)
3241 #define BIT_GET_HPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8822B) & BIT_MASK_HPQ_LOW_TH_V1_8822B)
3244 /* 2 REG_TQPNT2_8822B */
3246 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8822B 16
3247 #define BIT_MASK_NPQ_HIGH_TH_V1_8822B 0xfff
3248 #define BIT_NPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_NPQ_HIGH_TH_V1_8822B)
3249 #define BIT_GET_NPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8822B) & BIT_MASK_NPQ_HIGH_TH_V1_8822B)
3252 #define BIT_SHIFT_NPQ_LOW_TH_V1_8822B 0
3253 #define BIT_MASK_NPQ_LOW_TH_V1_8822B 0xfff
3254 #define BIT_NPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_NPQ_LOW_TH_V1_8822B) << BIT_SHIFT_NPQ_LOW_TH_V1_8822B)
3255 #define BIT_GET_NPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8822B) & BIT_MASK_NPQ_LOW_TH_V1_8822B)
3258 /* 2 REG_TQPNT3_8822B */
3260 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8822B 16
3261 #define BIT_MASK_LPQ_HIGH_TH_V1_8822B 0xfff
3262 #define BIT_LPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_LPQ_HIGH_TH_V1_8822B)
3263 #define BIT_GET_LPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8822B) & BIT_MASK_LPQ_HIGH_TH_V1_8822B)
3266 #define BIT_SHIFT_LPQ_LOW_TH_V1_8822B 0
3267 #define BIT_MASK_LPQ_LOW_TH_V1_8822B 0xfff
3268 #define BIT_LPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_LPQ_LOW_TH_V1_8822B) << BIT_SHIFT_LPQ_LOW_TH_V1_8822B)
3269 #define BIT_GET_LPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8822B) & BIT_MASK_LPQ_LOW_TH_V1_8822B)
3272 /* 2 REG_TQPNT4_8822B */
3274 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8822B 16
3275 #define BIT_MASK_EXQ_HIGH_TH_V1_8822B 0xfff
3276 #define BIT_EXQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8822B) << BIT_SHIFT_EXQ_HIGH_TH_V1_8822B)
3277 #define BIT_GET_EXQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8822B) & BIT_MASK_EXQ_HIGH_TH_V1_8822B)
3280 #define BIT_SHIFT_EXQ_LOW_TH_V1_8822B 0
3281 #define BIT_MASK_EXQ_LOW_TH_V1_8822B 0xfff
3282 #define BIT_EXQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_EXQ_LOW_TH_V1_8822B) << BIT_SHIFT_EXQ_LOW_TH_V1_8822B)
3283 #define BIT_GET_EXQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8822B) & BIT_MASK_EXQ_LOW_TH_V1_8822B)
3286 /* 2 REG_RQPN_CTRL_1_8822B */
3288 #define BIT_SHIFT_TXPKTNUM_H_8822B 16
3289 #define BIT_MASK_TXPKTNUM_H_8822B 0xffff
3290 #define BIT_TXPKTNUM_H_8822B(x) (((x) & BIT_MASK_TXPKTNUM_H_8822B) << BIT_SHIFT_TXPKTNUM_H_8822B)
3291 #define BIT_GET_TXPKTNUM_H_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8822B) & BIT_MASK_TXPKTNUM_H_8822B)
3294 #define BIT_SHIFT_TXPKTNUM_V2_8822B 0
3295 #define BIT_MASK_TXPKTNUM_V2_8822B 0xffff
3296 #define BIT_TXPKTNUM_V2_8822B(x) (((x) & BIT_MASK_TXPKTNUM_V2_8822B) << BIT_SHIFT_TXPKTNUM_V2_8822B)
3297 #define BIT_GET_TXPKTNUM_V2_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8822B) & BIT_MASK_TXPKTNUM_V2_8822B)
3300 /* 2 REG_RQPN_CTRL_2_8822B */
3301 #define BIT_LD_RQPN_8822B BIT(31)
3302 #define BIT_EXQ_PUBLIC_DIS_V1_8822B BIT(19)
3303 #define BIT_NPQ_PUBLIC_DIS_V1_8822B BIT(18)
3304 #define BIT_LPQ_PUBLIC_DIS_V1_8822B BIT(17)
3305 #define BIT_HPQ_PUBLIC_DIS_V1_8822B BIT(16)
3307 /* 2 REG_FIFOPAGE_INFO_1_8822B */
3309 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8822B 16
3310 #define BIT_MASK_HPQ_AVAL_PG_V1_8822B 0xfff
3311 #define BIT_HPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_HPQ_AVAL_PG_V1_8822B)
3312 #define BIT_GET_HPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8822B) & BIT_MASK_HPQ_AVAL_PG_V1_8822B)
3315 #define BIT_SHIFT_HPQ_V1_8822B 0
3316 #define BIT_MASK_HPQ_V1_8822B 0xfff
3317 #define BIT_HPQ_V1_8822B(x) (((x) & BIT_MASK_HPQ_V1_8822B) << BIT_SHIFT_HPQ_V1_8822B)
3318 #define BIT_GET_HPQ_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_V1_8822B) & BIT_MASK_HPQ_V1_8822B)
3321 /* 2 REG_FIFOPAGE_INFO_2_8822B */
3323 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8822B 16
3324 #define BIT_MASK_LPQ_AVAL_PG_V1_8822B 0xfff
3325 #define BIT_LPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_LPQ_AVAL_PG_V1_8822B)
3326 #define BIT_GET_LPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8822B) & BIT_MASK_LPQ_AVAL_PG_V1_8822B)
3329 #define BIT_SHIFT_LPQ_V1_8822B 0
3330 #define BIT_MASK_LPQ_V1_8822B 0xfff
3331 #define BIT_LPQ_V1_8822B(x) (((x) & BIT_MASK_LPQ_V1_8822B) << BIT_SHIFT_LPQ_V1_8822B)
3332 #define BIT_GET_LPQ_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_V1_8822B) & BIT_MASK_LPQ_V1_8822B)
3335 /* 2 REG_FIFOPAGE_INFO_3_8822B */
3337 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8822B 16
3338 #define BIT_MASK_NPQ_AVAL_PG_V1_8822B 0xfff
3339 #define BIT_NPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_NPQ_AVAL_PG_V1_8822B)
3340 #define BIT_GET_NPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8822B) & BIT_MASK_NPQ_AVAL_PG_V1_8822B)
3343 #define BIT_SHIFT_NPQ_V1_8822B 0
3344 #define BIT_MASK_NPQ_V1_8822B 0xfff
3345 #define BIT_NPQ_V1_8822B(x) (((x) & BIT_MASK_NPQ_V1_8822B) << BIT_SHIFT_NPQ_V1_8822B)
3346 #define BIT_GET_NPQ_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_V1_8822B) & BIT_MASK_NPQ_V1_8822B)
3349 /* 2 REG_FIFOPAGE_INFO_4_8822B */
3351 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8822B 16
3352 #define BIT_MASK_EXQ_AVAL_PG_V1_8822B 0xfff
3353 #define BIT_EXQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8822B) << BIT_SHIFT_EXQ_AVAL_PG_V1_8822B)
3354 #define BIT_GET_EXQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8822B) & BIT_MASK_EXQ_AVAL_PG_V1_8822B)
3357 #define BIT_SHIFT_EXQ_V1_8822B 0
3358 #define BIT_MASK_EXQ_V1_8822B 0xfff
3359 #define BIT_EXQ_V1_8822B(x) (((x) & BIT_MASK_EXQ_V1_8822B) << BIT_SHIFT_EXQ_V1_8822B)
3360 #define BIT_GET_EXQ_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_V1_8822B) & BIT_MASK_EXQ_V1_8822B)
3363 /* 2 REG_FIFOPAGE_INFO_5_8822B */
3365 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B 16
3366 #define BIT_MASK_PUBQ_AVAL_PG_V1_8822B 0xfff
3367 #define BIT_PUBQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B) << BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B)
3368 #define BIT_GET_PUBQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B)
3371 #define BIT_SHIFT_PUBQ_V1_8822B 0
3372 #define BIT_MASK_PUBQ_V1_8822B 0xfff
3373 #define BIT_PUBQ_V1_8822B(x) (((x) & BIT_MASK_PUBQ_V1_8822B) << BIT_SHIFT_PUBQ_V1_8822B)
3374 #define BIT_GET_PUBQ_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_V1_8822B) & BIT_MASK_PUBQ_V1_8822B)
3377 /* 2 REG_H2C_HEAD_8822B */
3379 #define BIT_SHIFT_H2C_HEAD_8822B 0
3380 #define BIT_MASK_H2C_HEAD_8822B 0x3ffff
3381 #define BIT_H2C_HEAD_8822B(x) (((x) & BIT_MASK_H2C_HEAD_8822B) << BIT_SHIFT_H2C_HEAD_8822B)
3382 #define BIT_GET_H2C_HEAD_8822B(x) (((x) >> BIT_SHIFT_H2C_HEAD_8822B) & BIT_MASK_H2C_HEAD_8822B)
3385 /* 2 REG_H2C_TAIL_8822B */
3387 #define BIT_SHIFT_H2C_TAIL_8822B 0
3388 #define BIT_MASK_H2C_TAIL_8822B 0x3ffff
3389 #define BIT_H2C_TAIL_8822B(x) (((x) & BIT_MASK_H2C_TAIL_8822B) << BIT_SHIFT_H2C_TAIL_8822B)
3390 #define BIT_GET_H2C_TAIL_8822B(x) (((x) >> BIT_SHIFT_H2C_TAIL_8822B) & BIT_MASK_H2C_TAIL_8822B)
3393 /* 2 REG_H2C_READ_ADDR_8822B */
3395 #define BIT_SHIFT_H2C_READ_ADDR_8822B 0
3396 #define BIT_MASK_H2C_READ_ADDR_8822B 0x3ffff
3397 #define BIT_H2C_READ_ADDR_8822B(x) (((x) & BIT_MASK_H2C_READ_ADDR_8822B) << BIT_SHIFT_H2C_READ_ADDR_8822B)
3398 #define BIT_GET_H2C_READ_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8822B) & BIT_MASK_H2C_READ_ADDR_8822B)
3401 /* 2 REG_H2C_WR_ADDR_8822B */
3403 #define BIT_SHIFT_H2C_WR_ADDR_8822B 0
3404 #define BIT_MASK_H2C_WR_ADDR_8822B 0x3ffff
3405 #define BIT_H2C_WR_ADDR_8822B(x) (((x) & BIT_MASK_H2C_WR_ADDR_8822B) << BIT_SHIFT_H2C_WR_ADDR_8822B)
3406 #define BIT_GET_H2C_WR_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8822B) & BIT_MASK_H2C_WR_ADDR_8822B)
3409 /* 2 REG_H2C_INFO_8822B */
3410 #define BIT_H2C_SPACE_VLD_8822B BIT(3)
3411 #define BIT_H2C_WR_ADDR_RST_8822B BIT(2)
3413 #define BIT_SHIFT_H2C_LEN_SEL_8822B 0
3414 #define BIT_MASK_H2C_LEN_SEL_8822B 0x3
3415 #define BIT_H2C_LEN_SEL_8822B(x) (((x) & BIT_MASK_H2C_LEN_SEL_8822B) << BIT_SHIFT_H2C_LEN_SEL_8822B)
3416 #define BIT_GET_H2C_LEN_SEL_8822B(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8822B) & BIT_MASK_H2C_LEN_SEL_8822B)
3419 /* 2 REG_RXDMA_AGG_PG_TH_8822B */
3421 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B 24
3422 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8822B 0xff
3423 #define BIT_RXDMA_AGG_OLD_MOD_8822B(x) (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B) << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B)
3424 #define BIT_GET_RXDMA_AGG_OLD_MOD_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B)
3427 #define BIT_SHIFT_PKT_NUM_WOL_8822B 16
3428 #define BIT_MASK_PKT_NUM_WOL_8822B 0xff
3429 #define BIT_PKT_NUM_WOL_8822B(x) (((x) & BIT_MASK_PKT_NUM_WOL_8822B) << BIT_SHIFT_PKT_NUM_WOL_8822B)
3430 #define BIT_GET_PKT_NUM_WOL_8822B(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8822B) & BIT_MASK_PKT_NUM_WOL_8822B)
3433 #define BIT_SHIFT_DMA_AGG_TO_8822B 8
3434 #define BIT_MASK_DMA_AGG_TO_8822B 0xf
3435 #define BIT_DMA_AGG_TO_8822B(x) (((x) & BIT_MASK_DMA_AGG_TO_8822B) << BIT_SHIFT_DMA_AGG_TO_8822B)
3436 #define BIT_GET_DMA_AGG_TO_8822B(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8822B) & BIT_MASK_DMA_AGG_TO_8822B)
3439 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B 0
3440 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B 0xf
3441 #define BIT_RXDMA_AGG_PG_TH_V1_8822B(x) (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B) << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B)
3442 #define BIT_GET_RXDMA_AGG_PG_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B)
3445 /* 2 REG_RXPKT_NUM_8822B */
3447 #define BIT_SHIFT_RXPKT_NUM_8822B 24
3448 #define BIT_MASK_RXPKT_NUM_8822B 0xff
3449 #define BIT_RXPKT_NUM_8822B(x) (((x) & BIT_MASK_RXPKT_NUM_8822B) << BIT_SHIFT_RXPKT_NUM_8822B)
3450 #define BIT_GET_RXPKT_NUM_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8822B) & BIT_MASK_RXPKT_NUM_8822B)
3453 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B 20
3454 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B 0xf
3455 #define BIT_FW_UPD_RDPTR19_TO_16_8822B(x) (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B) << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B)
3456 #define BIT_GET_FW_UPD_RDPTR19_TO_16_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B)
3458 #define BIT_RXDMA_REQ_8822B BIT(19)
3459 #define BIT_RW_RELEASE_EN_8822B BIT(18)
3460 #define BIT_RXDMA_IDLE_8822B BIT(17)
3461 #define BIT_RXPKT_RELEASE_POLL_8822B BIT(16)
3463 #define BIT_SHIFT_FW_UPD_RDPTR_8822B 0
3464 #define BIT_MASK_FW_UPD_RDPTR_8822B 0xffff
3465 #define BIT_FW_UPD_RDPTR_8822B(x) (((x) & BIT_MASK_FW_UPD_RDPTR_8822B) << BIT_SHIFT_FW_UPD_RDPTR_8822B)
3466 #define BIT_GET_FW_UPD_RDPTR_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8822B) & BIT_MASK_FW_UPD_RDPTR_8822B)
3469 /* 2 REG_RXDMA_STATUS_8822B */
3470 #define BIT_C2H_PKT_OVF_8822B BIT(7)
3471 #define BIT_AGG_CONFGI_ISSUE_8822B BIT(6)
3472 #define BIT_FW_POLL_ISSUE_8822B BIT(5)
3473 #define BIT_RX_DATA_UDN_8822B BIT(4)
3474 #define BIT_RX_SFF_UDN_8822B BIT(3)
3475 #define BIT_RX_SFF_OVF_8822B BIT(2)
3476 #define BIT_RXPKT_OVF_8822B BIT(0)
3478 /* 2 REG_RXDMA_DPR_8822B */
3480 #define BIT_SHIFT_RDE_DEBUG_8822B 0
3481 #define BIT_MASK_RDE_DEBUG_8822B 0xffffffffL
3482 #define BIT_RDE_DEBUG_8822B(x) (((x) & BIT_MASK_RDE_DEBUG_8822B) << BIT_SHIFT_RDE_DEBUG_8822B)
3483 #define BIT_GET_RDE_DEBUG_8822B(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8822B) & BIT_MASK_RDE_DEBUG_8822B)
3486 /* 2 REG_RXDMA_MODE_8822B */
3488 #define BIT_SHIFT_PKTNUM_TH_V2_8822B 24
3489 #define BIT_MASK_PKTNUM_TH_V2_8822B 0x1f
3490 #define BIT_PKTNUM_TH_V2_8822B(x) (((x) & BIT_MASK_PKTNUM_TH_V2_8822B) << BIT_SHIFT_PKTNUM_TH_V2_8822B)
3491 #define BIT_GET_PKTNUM_TH_V2_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8822B) & BIT_MASK_PKTNUM_TH_V2_8822B)
3493 #define BIT_TXBA_BREAK_USBAGG_8822B BIT(23)
3495 #define BIT_SHIFT_PKTLEN_PARA_8822B 16
3496 #define BIT_MASK_PKTLEN_PARA_8822B 0x7
3497 #define BIT_PKTLEN_PARA_8822B(x) (((x) & BIT_MASK_PKTLEN_PARA_8822B) << BIT_SHIFT_PKTLEN_PARA_8822B)
3498 #define BIT_GET_PKTLEN_PARA_8822B(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8822B) & BIT_MASK_PKTLEN_PARA_8822B)
3501 /* 2 REG_NOT_VALID_8822B */
3503 /* 2 REG_NOT_VALID_8822B */
3505 /* 2 REG_NOT_VALID_8822B */
3507 #define BIT_SHIFT_BURST_SIZE_8822B 4
3508 #define BIT_MASK_BURST_SIZE_8822B 0x3
3509 #define BIT_BURST_SIZE_8822B(x) (((x) & BIT_MASK_BURST_SIZE_8822B) << BIT_SHIFT_BURST_SIZE_8822B)
3510 #define BIT_GET_BURST_SIZE_8822B(x) (((x) >> BIT_SHIFT_BURST_SIZE_8822B) & BIT_MASK_BURST_SIZE_8822B)
3513 #define BIT_SHIFT_BURST_CNT_8822B 2
3514 #define BIT_MASK_BURST_CNT_8822B 0x3
3515 #define BIT_BURST_CNT_8822B(x) (((x) & BIT_MASK_BURST_CNT_8822B) << BIT_SHIFT_BURST_CNT_8822B)
3516 #define BIT_GET_BURST_CNT_8822B(x) (((x) >> BIT_SHIFT_BURST_CNT_8822B) & BIT_MASK_BURST_CNT_8822B)
3518 #define BIT_DMA_MODE_8822B BIT(1)
3520 /* 2 REG_C2H_PKT_8822B */
3522 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B 24
3523 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B 0xf
3524 #define BIT_R_C2H_STR_ADDR_16_TO_19_8822B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B) << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B)
3525 #define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B)
3527 #define BIT_R_C2H_PKT_REQ_8822B BIT(16)
3529 #define BIT_SHIFT_R_C2H_STR_ADDR_8822B 0
3530 #define BIT_MASK_R_C2H_STR_ADDR_8822B 0xffff
3531 #define BIT_R_C2H_STR_ADDR_8822B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_8822B) << BIT_SHIFT_R_C2H_STR_ADDR_8822B)
3532 #define BIT_GET_R_C2H_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8822B) & BIT_MASK_R_C2H_STR_ADDR_8822B)
3535 /* 2 REG_FWFF_C2H_8822B */
3537 #define BIT_SHIFT_C2H_DMA_ADDR_8822B 0
3538 #define BIT_MASK_C2H_DMA_ADDR_8822B 0x3ffff
3539 #define BIT_C2H_DMA_ADDR_8822B(x) (((x) & BIT_MASK_C2H_DMA_ADDR_8822B) << BIT_SHIFT_C2H_DMA_ADDR_8822B)
3540 #define BIT_GET_C2H_DMA_ADDR_8822B(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8822B) & BIT_MASK_C2H_DMA_ADDR_8822B)
3543 /* 2 REG_FWFF_CTRL_8822B */
3544 #define BIT_FWFF_DMAPKT_REQ_8822B BIT(31)
3546 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B 16
3547 #define BIT_MASK_FWFF_DMA_PKT_NUM_8822B 0xff
3548 #define BIT_FWFF_DMA_PKT_NUM_8822B(x) (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B) << BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B)
3549 #define BIT_GET_FWFF_DMA_PKT_NUM_8822B(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B)
3552 #define BIT_SHIFT_FWFF_STR_ADDR_8822B 0
3553 #define BIT_MASK_FWFF_STR_ADDR_8822B 0xffff
3554 #define BIT_FWFF_STR_ADDR_8822B(x) (((x) & BIT_MASK_FWFF_STR_ADDR_8822B) << BIT_SHIFT_FWFF_STR_ADDR_8822B)
3555 #define BIT_GET_FWFF_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8822B) & BIT_MASK_FWFF_STR_ADDR_8822B)
3558 /* 2 REG_FWFF_PKT_INFO_8822B */
3560 #define BIT_SHIFT_FWFF_PKT_QUEUED_8822B 16
3561 #define BIT_MASK_FWFF_PKT_QUEUED_8822B 0xff
3562 #define BIT_FWFF_PKT_QUEUED_8822B(x) (((x) & BIT_MASK_FWFF_PKT_QUEUED_8822B) << BIT_SHIFT_FWFF_PKT_QUEUED_8822B)
3563 #define BIT_GET_FWFF_PKT_QUEUED_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8822B) & BIT_MASK_FWFF_PKT_QUEUED_8822B)
3566 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B 0
3567 #define BIT_MASK_FWFF_PKT_STR_ADDR_8822B 0xffff
3568 #define BIT_FWFF_PKT_STR_ADDR_8822B(x) (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B) << BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B)
3569 #define BIT_GET_FWFF_PKT_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B)
3572 /* 2 REG_NOT_VALID_8822B */
3574 /* 2 REG_DDMA_CH0SA_8822B */
3576 #define BIT_SHIFT_DDMACH0_SA_8822B 0
3577 #define BIT_MASK_DDMACH0_SA_8822B 0xffffffffL
3578 #define BIT_DDMACH0_SA_8822B(x) (((x) & BIT_MASK_DDMACH0_SA_8822B) << BIT_SHIFT_DDMACH0_SA_8822B)
3579 #define BIT_GET_DDMACH0_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8822B) & BIT_MASK_DDMACH0_SA_8822B)
3582 /* 2 REG_DDMA_CH0DA_8822B */
3584 #define BIT_SHIFT_DDMACH0_DA_8822B 0
3585 #define BIT_MASK_DDMACH0_DA_8822B 0xffffffffL
3586 #define BIT_DDMACH0_DA_8822B(x) (((x) & BIT_MASK_DDMACH0_DA_8822B) << BIT_SHIFT_DDMACH0_DA_8822B)
3587 #define BIT_GET_DDMACH0_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8822B) & BIT_MASK_DDMACH0_DA_8822B)
3590 /* 2 REG_DDMA_CH0CTRL_8822B */
3591 #define BIT_DDMACH0_OWN_8822B BIT(31)
3592 #define BIT_DDMACH0_CHKSUM_EN_8822B BIT(29)
3593 #define BIT_DDMACH0_DA_W_DISABLE_8822B BIT(28)
3594 #define BIT_DDMACH0_CHKSUM_STS_8822B BIT(27)
3595 #define BIT_DDMACH0_DDMA_MODE_8822B BIT(26)
3596 #define BIT_DDMACH0_RESET_CHKSUM_STS_8822B BIT(25)
3597 #define BIT_DDMACH0_CHKSUM_CONT_8822B BIT(24)
3599 #define BIT_SHIFT_DDMACH0_DLEN_8822B 0
3600 #define BIT_MASK_DDMACH0_DLEN_8822B 0x3ffff
3601 #define BIT_DDMACH0_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH0_DLEN_8822B) << BIT_SHIFT_DDMACH0_DLEN_8822B)
3602 #define BIT_GET_DDMACH0_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8822B) & BIT_MASK_DDMACH0_DLEN_8822B)
3605 /* 2 REG_DDMA_CH1SA_8822B */
3607 #define BIT_SHIFT_DDMACH1_SA_8822B 0
3608 #define BIT_MASK_DDMACH1_SA_8822B 0xffffffffL
3609 #define BIT_DDMACH1_SA_8822B(x) (((x) & BIT_MASK_DDMACH1_SA_8822B) << BIT_SHIFT_DDMACH1_SA_8822B)
3610 #define BIT_GET_DDMACH1_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8822B) & BIT_MASK_DDMACH1_SA_8822B)
3613 /* 2 REG_DDMA_CH1DA_8822B */
3615 #define BIT_SHIFT_DDMACH1_DA_8822B 0
3616 #define BIT_MASK_DDMACH1_DA_8822B 0xffffffffL
3617 #define BIT_DDMACH1_DA_8822B(x) (((x) & BIT_MASK_DDMACH1_DA_8822B) << BIT_SHIFT_DDMACH1_DA_8822B)
3618 #define BIT_GET_DDMACH1_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8822B) & BIT_MASK_DDMACH1_DA_8822B)
3621 /* 2 REG_DDMA_CH1CTRL_8822B */
3622 #define BIT_DDMACH1_OWN_8822B BIT(31)
3623 #define BIT_DDMACH1_CHKSUM_EN_8822B BIT(29)
3624 #define BIT_DDMACH1_DA_W_DISABLE_8822B BIT(28)
3625 #define BIT_DDMACH1_CHKSUM_STS_8822B BIT(27)
3626 #define BIT_DDMACH1_DDMA_MODE_8822B BIT(26)
3627 #define BIT_DDMACH1_RESET_CHKSUM_STS_8822B BIT(25)
3628 #define BIT_DDMACH1_CHKSUM_CONT_8822B BIT(24)
3630 #define BIT_SHIFT_DDMACH1_DLEN_8822B 0
3631 #define BIT_MASK_DDMACH1_DLEN_8822B 0x3ffff
3632 #define BIT_DDMACH1_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH1_DLEN_8822B) << BIT_SHIFT_DDMACH1_DLEN_8822B)
3633 #define BIT_GET_DDMACH1_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8822B) & BIT_MASK_DDMACH1_DLEN_8822B)
3636 /* 2 REG_DDMA_CH2SA_8822B */
3638 #define BIT_SHIFT_DDMACH2_SA_8822B 0
3639 #define BIT_MASK_DDMACH2_SA_8822B 0xffffffffL
3640 #define BIT_DDMACH2_SA_8822B(x) (((x) & BIT_MASK_DDMACH2_SA_8822B) << BIT_SHIFT_DDMACH2_SA_8822B)
3641 #define BIT_GET_DDMACH2_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8822B) & BIT_MASK_DDMACH2_SA_8822B)
3644 /* 2 REG_DDMA_CH2DA_8822B */
3646 #define BIT_SHIFT_DDMACH2_DA_8822B 0
3647 #define BIT_MASK_DDMACH2_DA_8822B 0xffffffffL
3648 #define BIT_DDMACH2_DA_8822B(x) (((x) & BIT_MASK_DDMACH2_DA_8822B) << BIT_SHIFT_DDMACH2_DA_8822B)
3649 #define BIT_GET_DDMACH2_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8822B) & BIT_MASK_DDMACH2_DA_8822B)
3652 /* 2 REG_DDMA_CH2CTRL_8822B */
3653 #define BIT_DDMACH2_OWN_8822B BIT(31)
3654 #define BIT_DDMACH2_CHKSUM_EN_8822B BIT(29)
3655 #define BIT_DDMACH2_DA_W_DISABLE_8822B BIT(28)
3656 #define BIT_DDMACH2_CHKSUM_STS_8822B BIT(27)
3657 #define BIT_DDMACH2_DDMA_MODE_8822B BIT(26)
3658 #define BIT_DDMACH2_RESET_CHKSUM_STS_8822B BIT(25)
3659 #define BIT_DDMACH2_CHKSUM_CONT_8822B BIT(24)
3661 #define BIT_SHIFT_DDMACH2_DLEN_8822B 0
3662 #define BIT_MASK_DDMACH2_DLEN_8822B 0x3ffff
3663 #define BIT_DDMACH2_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH2_DLEN_8822B) << BIT_SHIFT_DDMACH2_DLEN_8822B)
3664 #define BIT_GET_DDMACH2_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8822B) & BIT_MASK_DDMACH2_DLEN_8822B)
3667 /* 2 REG_DDMA_CH3SA_8822B */
3669 #define BIT_SHIFT_DDMACH3_SA_8822B 0
3670 #define BIT_MASK_DDMACH3_SA_8822B 0xffffffffL
3671 #define BIT_DDMACH3_SA_8822B(x) (((x) & BIT_MASK_DDMACH3_SA_8822B) << BIT_SHIFT_DDMACH3_SA_8822B)
3672 #define BIT_GET_DDMACH3_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8822B) & BIT_MASK_DDMACH3_SA_8822B)
3675 /* 2 REG_DDMA_CH3DA_8822B */
3677 #define BIT_SHIFT_DDMACH3_DA_8822B 0
3678 #define BIT_MASK_DDMACH3_DA_8822B 0xffffffffL
3679 #define BIT_DDMACH3_DA_8822B(x) (((x) & BIT_MASK_DDMACH3_DA_8822B) << BIT_SHIFT_DDMACH3_DA_8822B)
3680 #define BIT_GET_DDMACH3_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8822B) & BIT_MASK_DDMACH3_DA_8822B)
3683 /* 2 REG_DDMA_CH3CTRL_8822B */
3684 #define BIT_DDMACH3_OWN_8822B BIT(31)
3685 #define BIT_DDMACH3_CHKSUM_EN_8822B BIT(29)
3686 #define BIT_DDMACH3_DA_W_DISABLE_8822B BIT(28)
3687 #define BIT_DDMACH3_CHKSUM_STS_8822B BIT(27)
3688 #define BIT_DDMACH3_DDMA_MODE_8822B BIT(26)
3689 #define BIT_DDMACH3_RESET_CHKSUM_STS_8822B BIT(25)
3690 #define BIT_DDMACH3_CHKSUM_CONT_8822B BIT(24)
3692 #define BIT_SHIFT_DDMACH3_DLEN_8822B 0
3693 #define BIT_MASK_DDMACH3_DLEN_8822B 0x3ffff
3694 #define BIT_DDMACH3_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH3_DLEN_8822B) << BIT_SHIFT_DDMACH3_DLEN_8822B)
3695 #define BIT_GET_DDMACH3_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8822B) & BIT_MASK_DDMACH3_DLEN_8822B)
3698 /* 2 REG_DDMA_CH4SA_8822B */
3700 #define BIT_SHIFT_DDMACH4_SA_8822B 0
3701 #define BIT_MASK_DDMACH4_SA_8822B 0xffffffffL
3702 #define BIT_DDMACH4_SA_8822B(x) (((x) & BIT_MASK_DDMACH4_SA_8822B) << BIT_SHIFT_DDMACH4_SA_8822B)
3703 #define BIT_GET_DDMACH4_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8822B) & BIT_MASK_DDMACH4_SA_8822B)
3706 /* 2 REG_DDMA_CH4DA_8822B */
3708 #define BIT_SHIFT_DDMACH4_DA_8822B 0
3709 #define BIT_MASK_DDMACH4_DA_8822B 0xffffffffL
3710 #define BIT_DDMACH4_DA_8822B(x) (((x) & BIT_MASK_DDMACH4_DA_8822B) << BIT_SHIFT_DDMACH4_DA_8822B)
3711 #define BIT_GET_DDMACH4_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8822B) & BIT_MASK_DDMACH4_DA_8822B)
3714 /* 2 REG_DDMA_CH4CTRL_8822B */
3715 #define BIT_DDMACH4_OWN_8822B BIT(31)
3716 #define BIT_DDMACH4_CHKSUM_EN_8822B BIT(29)
3717 #define BIT_DDMACH4_DA_W_DISABLE_8822B BIT(28)
3718 #define BIT_DDMACH4_CHKSUM_STS_8822B BIT(27)
3719 #define BIT_DDMACH4_DDMA_MODE_8822B BIT(26)
3720 #define BIT_DDMACH4_RESET_CHKSUM_STS_8822B BIT(25)
3721 #define BIT_DDMACH4_CHKSUM_CONT_8822B BIT(24)
3723 #define BIT_SHIFT_DDMACH4_DLEN_8822B 0
3724 #define BIT_MASK_DDMACH4_DLEN_8822B 0x3ffff
3725 #define BIT_DDMACH4_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH4_DLEN_8822B) << BIT_SHIFT_DDMACH4_DLEN_8822B)
3726 #define BIT_GET_DDMACH4_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8822B) & BIT_MASK_DDMACH4_DLEN_8822B)
3729 /* 2 REG_DDMA_CH5SA_8822B */
3731 #define BIT_SHIFT_DDMACH5_SA_8822B 0
3732 #define BIT_MASK_DDMACH5_SA_8822B 0xffffffffL
3733 #define BIT_DDMACH5_SA_8822B(x) (((x) & BIT_MASK_DDMACH5_SA_8822B) << BIT_SHIFT_DDMACH5_SA_8822B)
3734 #define BIT_GET_DDMACH5_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8822B) & BIT_MASK_DDMACH5_SA_8822B)
3737 /* 2 REG_DDMA_CH5DA_8822B */
3739 #define BIT_SHIFT_DDMACH5_DA_8822B 0
3740 #define BIT_MASK_DDMACH5_DA_8822B 0xffffffffL
3741 #define BIT_DDMACH5_DA_8822B(x) (((x) & BIT_MASK_DDMACH5_DA_8822B) << BIT_SHIFT_DDMACH5_DA_8822B)
3742 #define BIT_GET_DDMACH5_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8822B) & BIT_MASK_DDMACH5_DA_8822B)
3745 /* 2 REG_REG_DDMA_CH5CTRL_8822B */
3746 #define BIT_DDMACH5_OWN_8822B BIT(31)
3747 #define BIT_DDMACH5_CHKSUM_EN_8822B BIT(29)
3748 #define BIT_DDMACH5_DA_W_DISABLE_8822B BIT(28)
3749 #define BIT_DDMACH5_CHKSUM_STS_8822B BIT(27)
3750 #define BIT_DDMACH5_DDMA_MODE_8822B BIT(26)
3751 #define BIT_DDMACH5_RESET_CHKSUM_STS_8822B BIT(25)
3752 #define BIT_DDMACH5_CHKSUM_CONT_8822B BIT(24)
3754 #define BIT_SHIFT_DDMACH5_DLEN_8822B 0
3755 #define BIT_MASK_DDMACH5_DLEN_8822B 0x3ffff
3756 #define BIT_DDMACH5_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH5_DLEN_8822B) << BIT_SHIFT_DDMACH5_DLEN_8822B)
3757 #define BIT_GET_DDMACH5_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8822B) & BIT_MASK_DDMACH5_DLEN_8822B)
3760 /* 2 REG_DDMA_INT_MSK_8822B */
3761 #define BIT_DDMACH5_MSK_8822B BIT(5)
3762 #define BIT_DDMACH4_MSK_8822B BIT(4)
3763 #define BIT_DDMACH3_MSK_8822B BIT(3)
3764 #define BIT_DDMACH2_MSK_8822B BIT(2)
3765 #define BIT_DDMACH1_MSK_8822B BIT(1)
3766 #define BIT_DDMACH0_MSK_8822B BIT(0)
3768 /* 2 REG_DDMA_CHSTATUS_8822B */
3769 #define BIT_DDMACH5_BUSY_8822B BIT(5)
3770 #define BIT_DDMACH4_BUSY_8822B BIT(4)
3771 #define BIT_DDMACH3_BUSY_8822B BIT(3)
3772 #define BIT_DDMACH2_BUSY_8822B BIT(2)
3773 #define BIT_DDMACH1_BUSY_8822B BIT(1)
3774 #define BIT_DDMACH0_BUSY_8822B BIT(0)
3776 /* 2 REG_DDMA_CHKSUM_8822B */
3778 #define BIT_SHIFT_IDDMA0_CHKSUM_8822B 0
3779 #define BIT_MASK_IDDMA0_CHKSUM_8822B 0xffff
3780 #define BIT_IDDMA0_CHKSUM_8822B(x) (((x) & BIT_MASK_IDDMA0_CHKSUM_8822B) << BIT_SHIFT_IDDMA0_CHKSUM_8822B)
3781 #define BIT_GET_IDDMA0_CHKSUM_8822B(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8822B) & BIT_MASK_IDDMA0_CHKSUM_8822B)
3784 /* 2 REG_DDMA_MONITOR_8822B */
3785 #define BIT_IDDMA0_PERMU_UNDERFLOW_8822B BIT(14)
3786 #define BIT_IDDMA0_FIFO_UNDERFLOW_8822B BIT(13)
3787 #define BIT_IDDMA0_FIFO_OVERFLOW_8822B BIT(12)
3788 #define BIT_CH5_ERR_8822B BIT(5)
3789 #define BIT_CH4_ERR_8822B BIT(4)
3790 #define BIT_CH3_ERR_8822B BIT(3)
3791 #define BIT_CH2_ERR_8822B BIT(2)
3792 #define BIT_CH1_ERR_8822B BIT(1)
3793 #define BIT_CH0_ERR_8822B BIT(0)
3795 /* 2 REG_NOT_VALID_8822B */
3797 /* 2 REG_PCIE_CTRL_8822B */
3798 #define BIT_PCIEIO_PERSTB_SEL_8822B BIT(31)
3800 #define BIT_SHIFT_PCIE_MAX_RXDMA_8822B 28
3801 #define BIT_MASK_PCIE_MAX_RXDMA_8822B 0x7
3802 #define BIT_PCIE_MAX_RXDMA_8822B(x) (((x) & BIT_MASK_PCIE_MAX_RXDMA_8822B) << BIT_SHIFT_PCIE_MAX_RXDMA_8822B)
3803 #define BIT_GET_PCIE_MAX_RXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8822B) & BIT_MASK_PCIE_MAX_RXDMA_8822B)
3805 #define BIT_MULRW_8822B BIT(27)
3807 #define BIT_SHIFT_PCIE_MAX_TXDMA_8822B 24
3808 #define BIT_MASK_PCIE_MAX_TXDMA_8822B 0x7
3809 #define BIT_PCIE_MAX_TXDMA_8822B(x) (((x) & BIT_MASK_PCIE_MAX_TXDMA_8822B) << BIT_SHIFT_PCIE_MAX_TXDMA_8822B)
3810 #define BIT_GET_PCIE_MAX_TXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8822B) & BIT_MASK_PCIE_MAX_TXDMA_8822B)
3812 #define BIT_EN_CPL_TIMEOUT_PS_8822B BIT(22)
3813 #define BIT_REG_TXDMA_FAIL_PS_8822B BIT(21)
3814 #define BIT_PCIE_RST_TRXDMA_INTF_8822B BIT(20)
3815 #define BIT_EN_HWENTR_L1_8822B BIT(19)
3816 #define BIT_EN_ADV_CLKGATE_8822B BIT(18)
3817 #define BIT_PCIE_EN_SWENT_L23_8822B BIT(17)
3818 #define BIT_PCIE_EN_HWEXT_L1_8822B BIT(16)
3819 #define BIT_RX_CLOSE_EN_8822B BIT(15)
3820 #define BIT_STOP_BCNQ_8822B BIT(14)
3821 #define BIT_STOP_MGQ_8822B BIT(13)
3822 #define BIT_STOP_VOQ_8822B BIT(12)
3823 #define BIT_STOP_VIQ_8822B BIT(11)
3824 #define BIT_STOP_BEQ_8822B BIT(10)
3825 #define BIT_STOP_BKQ_8822B BIT(9)
3826 #define BIT_STOP_RXQ_8822B BIT(8)
3827 #define BIT_STOP_HI7Q_8822B BIT(7)
3828 #define BIT_STOP_HI6Q_8822B BIT(6)
3829 #define BIT_STOP_HI5Q_8822B BIT(5)
3830 #define BIT_STOP_HI4Q_8822B BIT(4)
3831 #define BIT_STOP_HI3Q_8822B BIT(3)
3832 #define BIT_STOP_HI2Q_8822B BIT(2)
3833 #define BIT_STOP_HI1Q_8822B BIT(1)
3834 #define BIT_STOP_HI0Q_8822B BIT(0)
3836 /* 2 REG_INT_MIG_8822B */
3838 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B 28
3839 #define BIT_MASK_TXTTIMER_MATCH_NUM_8822B 0xf
3840 #define BIT_TXTTIMER_MATCH_NUM_8822B(x) (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B) << BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B)
3841 #define BIT_GET_TXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B)
3844 #define BIT_SHIFT_TXPKT_NUM_MATCH_8822B 24
3845 #define BIT_MASK_TXPKT_NUM_MATCH_8822B 0xf
3846 #define BIT_TXPKT_NUM_MATCH_8822B(x) (((x) & BIT_MASK_TXPKT_NUM_MATCH_8822B) << BIT_SHIFT_TXPKT_NUM_MATCH_8822B)
3847 #define BIT_GET_TXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8822B) & BIT_MASK_TXPKT_NUM_MATCH_8822B)
3850 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B 20
3851 #define BIT_MASK_RXTTIMER_MATCH_NUM_8822B 0xf
3852 #define BIT_RXTTIMER_MATCH_NUM_8822B(x) (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B) << BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B)
3853 #define BIT_GET_RXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B)
3856 #define BIT_SHIFT_RXPKT_NUM_MATCH_8822B 16
3857 #define BIT_MASK_RXPKT_NUM_MATCH_8822B 0xf
3858 #define BIT_RXPKT_NUM_MATCH_8822B(x) (((x) & BIT_MASK_RXPKT_NUM_MATCH_8822B) << BIT_SHIFT_RXPKT_NUM_MATCH_8822B)
3859 #define BIT_GET_RXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8822B) & BIT_MASK_RXPKT_NUM_MATCH_8822B)
3862 #define BIT_SHIFT_MIGRATE_TIMER_8822B 0
3863 #define BIT_MASK_MIGRATE_TIMER_8822B 0xffff
3864 #define BIT_MIGRATE_TIMER_8822B(x) (((x) & BIT_MASK_MIGRATE_TIMER_8822B) << BIT_SHIFT_MIGRATE_TIMER_8822B)
3865 #define BIT_GET_MIGRATE_TIMER_8822B(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8822B) & BIT_MASK_MIGRATE_TIMER_8822B)
3868 /* 2 REG_BCNQ_TXBD_DESA_8822B */
3870 #define BIT_SHIFT_BCNQ_TXBD_DESA_8822B 0
3871 #define BIT_MASK_BCNQ_TXBD_DESA_8822B 0xffffffffffffffffL
3872 #define BIT_BCNQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BCNQ_TXBD_DESA_8822B) << BIT_SHIFT_BCNQ_TXBD_DESA_8822B)
3873 #define BIT_GET_BCNQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8822B) & BIT_MASK_BCNQ_TXBD_DESA_8822B)
3876 /* 2 REG_MGQ_TXBD_DESA_8822B */
3878 #define BIT_SHIFT_MGQ_TXBD_DESA_8822B 0
3879 #define BIT_MASK_MGQ_TXBD_DESA_8822B 0xffffffffffffffffL
3880 #define BIT_MGQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_MGQ_TXBD_DESA_8822B) << BIT_SHIFT_MGQ_TXBD_DESA_8822B)
3881 #define BIT_GET_MGQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8822B) & BIT_MASK_MGQ_TXBD_DESA_8822B)
3884 /* 2 REG_VOQ_TXBD_DESA_8822B */
3886 #define BIT_SHIFT_VOQ_TXBD_DESA_8822B 0
3887 #define BIT_MASK_VOQ_TXBD_DESA_8822B 0xffffffffffffffffL
3888 #define BIT_VOQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_VOQ_TXBD_DESA_8822B) << BIT_SHIFT_VOQ_TXBD_DESA_8822B)
3889 #define BIT_GET_VOQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8822B) & BIT_MASK_VOQ_TXBD_DESA_8822B)
3892 /* 2 REG_VIQ_TXBD_DESA_8822B */
3894 #define BIT_SHIFT_VIQ_TXBD_DESA_8822B 0
3895 #define BIT_MASK_VIQ_TXBD_DESA_8822B 0xffffffffffffffffL
3896 #define BIT_VIQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_VIQ_TXBD_DESA_8822B) << BIT_SHIFT_VIQ_TXBD_DESA_8822B)
3897 #define BIT_GET_VIQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8822B) & BIT_MASK_VIQ_TXBD_DESA_8822B)
3900 /* 2 REG_BEQ_TXBD_DESA_8822B */
3902 #define BIT_SHIFT_BEQ_TXBD_DESA_8822B 0
3903 #define BIT_MASK_BEQ_TXBD_DESA_8822B 0xffffffffffffffffL
3904 #define BIT_BEQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BEQ_TXBD_DESA_8822B) << BIT_SHIFT_BEQ_TXBD_DESA_8822B)
3905 #define BIT_GET_BEQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8822B) & BIT_MASK_BEQ_TXBD_DESA_8822B)
3908 /* 2 REG_BKQ_TXBD_DESA_8822B */
3910 #define BIT_SHIFT_BKQ_TXBD_DESA_8822B 0
3911 #define BIT_MASK_BKQ_TXBD_DESA_8822B 0xffffffffffffffffL
3912 #define BIT_BKQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BKQ_TXBD_DESA_8822B) << BIT_SHIFT_BKQ_TXBD_DESA_8822B)
3913 #define BIT_GET_BKQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8822B) & BIT_MASK_BKQ_TXBD_DESA_8822B)
3916 /* 2 REG_RXQ_RXBD_DESA_8822B */
3918 #define BIT_SHIFT_RXQ_RXBD_DESA_8822B 0
3919 #define BIT_MASK_RXQ_RXBD_DESA_8822B 0xffffffffffffffffL
3920 #define BIT_RXQ_RXBD_DESA_8822B(x) (((x) & BIT_MASK_RXQ_RXBD_DESA_8822B) << BIT_SHIFT_RXQ_RXBD_DESA_8822B)
3921 #define BIT_GET_RXQ_RXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8822B) & BIT_MASK_RXQ_RXBD_DESA_8822B)
3924 /* 2 REG_HI0Q_TXBD_DESA_8822B */
3926 #define BIT_SHIFT_HI0Q_TXBD_DESA_8822B 0
3927 #define BIT_MASK_HI0Q_TXBD_DESA_8822B 0xffffffffffffffffL
3928 #define BIT_HI0Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI0Q_TXBD_DESA_8822B) << BIT_SHIFT_HI0Q_TXBD_DESA_8822B)
3929 #define BIT_GET_HI0Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8822B) & BIT_MASK_HI0Q_TXBD_DESA_8822B)
3932 /* 2 REG_HI1Q_TXBD_DESA_8822B */
3934 #define BIT_SHIFT_HI1Q_TXBD_DESA_8822B 0
3935 #define BIT_MASK_HI1Q_TXBD_DESA_8822B 0xffffffffffffffffL
3936 #define BIT_HI1Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI1Q_TXBD_DESA_8822B) << BIT_SHIFT_HI1Q_TXBD_DESA_8822B)
3937 #define BIT_GET_HI1Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8822B) & BIT_MASK_HI1Q_TXBD_DESA_8822B)
3940 /* 2 REG_HI2Q_TXBD_DESA_8822B */
3942 #define BIT_SHIFT_HI2Q_TXBD_DESA_8822B 0
3943 #define BIT_MASK_HI2Q_TXBD_DESA_8822B 0xffffffffffffffffL
3944 #define BIT_HI2Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI2Q_TXBD_DESA_8822B) << BIT_SHIFT_HI2Q_TXBD_DESA_8822B)
3945 #define BIT_GET_HI2Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8822B) & BIT_MASK_HI2Q_TXBD_DESA_8822B)
3948 /* 2 REG_HI3Q_TXBD_DESA_8822B */
3950 #define BIT_SHIFT_HI3Q_TXBD_DESA_8822B 0
3951 #define BIT_MASK_HI3Q_TXBD_DESA_8822B 0xffffffffffffffffL
3952 #define BIT_HI3Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI3Q_TXBD_DESA_8822B) << BIT_SHIFT_HI3Q_TXBD_DESA_8822B)
3953 #define BIT_GET_HI3Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8822B) & BIT_MASK_HI3Q_TXBD_DESA_8822B)
3956 /* 2 REG_HI4Q_TXBD_DESA_8822B */
3958 #define BIT_SHIFT_HI4Q_TXBD_DESA_8822B 0
3959 #define BIT_MASK_HI4Q_TXBD_DESA_8822B 0xffffffffffffffffL
3960 #define BIT_HI4Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI4Q_TXBD_DESA_8822B) << BIT_SHIFT_HI4Q_TXBD_DESA_8822B)
3961 #define BIT_GET_HI4Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8822B) & BIT_MASK_HI4Q_TXBD_DESA_8822B)
3964 /* 2 REG_HI5Q_TXBD_DESA_8822B */
3966 #define BIT_SHIFT_HI5Q_TXBD_DESA_8822B 0
3967 #define BIT_MASK_HI5Q_TXBD_DESA_8822B 0xffffffffffffffffL
3968 #define BIT_HI5Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI5Q_TXBD_DESA_8822B) << BIT_SHIFT_HI5Q_TXBD_DESA_8822B)
3969 #define BIT_GET_HI5Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8822B) & BIT_MASK_HI5Q_TXBD_DESA_8822B)
3972 /* 2 REG_HI6Q_TXBD_DESA_8822B */
3974 #define BIT_SHIFT_HI6Q_TXBD_DESA_8822B 0
3975 #define BIT_MASK_HI6Q_TXBD_DESA_8822B 0xffffffffffffffffL
3976 #define BIT_HI6Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI6Q_TXBD_DESA_8822B) << BIT_SHIFT_HI6Q_TXBD_DESA_8822B)
3977 #define BIT_GET_HI6Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8822B) & BIT_MASK_HI6Q_TXBD_DESA_8822B)
3980 /* 2 REG_HI7Q_TXBD_DESA_8822B */
3982 #define BIT_SHIFT_HI7Q_TXBD_DESA_8822B 0
3983 #define BIT_MASK_HI7Q_TXBD_DESA_8822B 0xffffffffffffffffL
3984 #define BIT_HI7Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI7Q_TXBD_DESA_8822B) << BIT_SHIFT_HI7Q_TXBD_DESA_8822B)
3985 #define BIT_GET_HI7Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8822B) & BIT_MASK_HI7Q_TXBD_DESA_8822B)
3988 /* 2 REG_MGQ_TXBD_NUM_8822B */
3989 #define BIT_PCIE_MGQ_FLAG_8822B BIT(14)
3991 #define BIT_SHIFT_MGQ_DESC_MODE_8822B 12
3992 #define BIT_MASK_MGQ_DESC_MODE_8822B 0x3
3993 #define BIT_MGQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_MGQ_DESC_MODE_8822B) << BIT_SHIFT_MGQ_DESC_MODE_8822B)
3994 #define BIT_GET_MGQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8822B) & BIT_MASK_MGQ_DESC_MODE_8822B)
3997 #define BIT_SHIFT_MGQ_DESC_NUM_8822B 0
3998 #define BIT_MASK_MGQ_DESC_NUM_8822B 0xfff
3999 #define BIT_MGQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_MGQ_DESC_NUM_8822B) << BIT_SHIFT_MGQ_DESC_NUM_8822B)
4000 #define BIT_GET_MGQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8822B) & BIT_MASK_MGQ_DESC_NUM_8822B)
4003 /* 2 REG_RX_RXBD_NUM_8822B */
4004 #define BIT_SYS_32_64_8822B BIT(15)
4006 #define BIT_SHIFT_BCNQ_DESC_MODE_8822B 13
4007 #define BIT_MASK_BCNQ_DESC_MODE_8822B 0x3
4008 #define BIT_BCNQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BCNQ_DESC_MODE_8822B) << BIT_SHIFT_BCNQ_DESC_MODE_8822B)
4009 #define BIT_GET_BCNQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8822B) & BIT_MASK_BCNQ_DESC_MODE_8822B)
4011 #define BIT_PCIE_BCNQ_FLAG_8822B BIT(12)
4013 #define BIT_SHIFT_RXQ_DESC_NUM_8822B 0
4014 #define BIT_MASK_RXQ_DESC_NUM_8822B 0xfff
4015 #define BIT_RXQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_RXQ_DESC_NUM_8822B) << BIT_SHIFT_RXQ_DESC_NUM_8822B)
4016 #define BIT_GET_RXQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8822B) & BIT_MASK_RXQ_DESC_NUM_8822B)
4019 /* 2 REG_VOQ_TXBD_NUM_8822B */
4020 #define BIT_PCIE_VOQ_FLAG_8822B BIT(14)
4022 #define BIT_SHIFT_VOQ_DESC_MODE_8822B 12
4023 #define BIT_MASK_VOQ_DESC_MODE_8822B 0x3
4024 #define BIT_VOQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_VOQ_DESC_MODE_8822B) << BIT_SHIFT_VOQ_DESC_MODE_8822B)
4025 #define BIT_GET_VOQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8822B) & BIT_MASK_VOQ_DESC_MODE_8822B)
4028 #define BIT_SHIFT_VOQ_DESC_NUM_8822B 0
4029 #define BIT_MASK_VOQ_DESC_NUM_8822B 0xfff
4030 #define BIT_VOQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_VOQ_DESC_NUM_8822B) << BIT_SHIFT_VOQ_DESC_NUM_8822B)
4031 #define BIT_GET_VOQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8822B) & BIT_MASK_VOQ_DESC_NUM_8822B)
4034 /* 2 REG_VIQ_TXBD_NUM_8822B */
4035 #define BIT_PCIE_VIQ_FLAG_8822B BIT(14)
4037 #define BIT_SHIFT_VIQ_DESC_MODE_8822B 12
4038 #define BIT_MASK_VIQ_DESC_MODE_8822B 0x3
4039 #define BIT_VIQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_VIQ_DESC_MODE_8822B) << BIT_SHIFT_VIQ_DESC_MODE_8822B)
4040 #define BIT_GET_VIQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8822B) & BIT_MASK_VIQ_DESC_MODE_8822B)
4043 #define BIT_SHIFT_VIQ_DESC_NUM_8822B 0
4044 #define BIT_MASK_VIQ_DESC_NUM_8822B 0xfff
4045 #define BIT_VIQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_VIQ_DESC_NUM_8822B) << BIT_SHIFT_VIQ_DESC_NUM_8822B)
4046 #define BIT_GET_VIQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8822B) & BIT_MASK_VIQ_DESC_NUM_8822B)
4049 /* 2 REG_BEQ_TXBD_NUM_8822B */
4050 #define BIT_PCIE_BEQ_FLAG_8822B BIT(14)
4052 #define BIT_SHIFT_BEQ_DESC_MODE_8822B 12
4053 #define BIT_MASK_BEQ_DESC_MODE_8822B 0x3
4054 #define BIT_BEQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BEQ_DESC_MODE_8822B) << BIT_SHIFT_BEQ_DESC_MODE_8822B)
4055 #define BIT_GET_BEQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8822B) & BIT_MASK_BEQ_DESC_MODE_8822B)
4058 #define BIT_SHIFT_BEQ_DESC_NUM_8822B 0
4059 #define BIT_MASK_BEQ_DESC_NUM_8822B 0xfff
4060 #define BIT_BEQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_BEQ_DESC_NUM_8822B) << BIT_SHIFT_BEQ_DESC_NUM_8822B)
4061 #define BIT_GET_BEQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8822B) & BIT_MASK_BEQ_DESC_NUM_8822B)
4064 /* 2 REG_BKQ_TXBD_NUM_8822B */
4065 #define BIT_PCIE_BKQ_FLAG_8822B BIT(14)
4067 #define BIT_SHIFT_BKQ_DESC_MODE_8822B 12
4068 #define BIT_MASK_BKQ_DESC_MODE_8822B 0x3
4069 #define BIT_BKQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BKQ_DESC_MODE_8822B) << BIT_SHIFT_BKQ_DESC_MODE_8822B)
4070 #define BIT_GET_BKQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8822B) & BIT_MASK_BKQ_DESC_MODE_8822B)
4073 #define BIT_SHIFT_BKQ_DESC_NUM_8822B 0
4074 #define BIT_MASK_BKQ_DESC_NUM_8822B 0xfff
4075 #define BIT_BKQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_BKQ_DESC_NUM_8822B) << BIT_SHIFT_BKQ_DESC_NUM_8822B)
4076 #define BIT_GET_BKQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8822B) & BIT_MASK_BKQ_DESC_NUM_8822B)
4079 /* 2 REG_HI0Q_TXBD_NUM_8822B */
4080 #define BIT_HI0Q_FLAG_8822B BIT(14)
4082 #define BIT_SHIFT_HI0Q_DESC_MODE_8822B 12
4083 #define BIT_MASK_HI0Q_DESC_MODE_8822B 0x3
4084 #define BIT_HI0Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI0Q_DESC_MODE_8822B) << BIT_SHIFT_HI0Q_DESC_MODE_8822B)
4085 #define BIT_GET_HI0Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8822B) & BIT_MASK_HI0Q_DESC_MODE_8822B)
4088 #define BIT_SHIFT_HI0Q_DESC_NUM_8822B 0
4089 #define BIT_MASK_HI0Q_DESC_NUM_8822B 0xfff
4090 #define BIT_HI0Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI0Q_DESC_NUM_8822B) << BIT_SHIFT_HI0Q_DESC_NUM_8822B)
4091 #define BIT_GET_HI0Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8822B) & BIT_MASK_HI0Q_DESC_NUM_8822B)
4094 /* 2 REG_HI1Q_TXBD_NUM_8822B */
4095 #define BIT_HI1Q_FLAG_8822B BIT(14)
4097 #define BIT_SHIFT_HI1Q_DESC_MODE_8822B 12
4098 #define BIT_MASK_HI1Q_DESC_MODE_8822B 0x3
4099 #define BIT_HI1Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI1Q_DESC_MODE_8822B) << BIT_SHIFT_HI1Q_DESC_MODE_8822B)
4100 #define BIT_GET_HI1Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8822B) & BIT_MASK_HI1Q_DESC_MODE_8822B)
4103 #define BIT_SHIFT_HI1Q_DESC_NUM_8822B 0
4104 #define BIT_MASK_HI1Q_DESC_NUM_8822B 0xfff
4105 #define BIT_HI1Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI1Q_DESC_NUM_8822B) << BIT_SHIFT_HI1Q_DESC_NUM_8822B)
4106 #define BIT_GET_HI1Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8822B) & BIT_MASK_HI1Q_DESC_NUM_8822B)
4109 /* 2 REG_HI2Q_TXBD_NUM_8822B */
4110 #define BIT_HI2Q_FLAG_8822B BIT(14)
4112 #define BIT_SHIFT_HI2Q_DESC_MODE_8822B 12
4113 #define BIT_MASK_HI2Q_DESC_MODE_8822B 0x3
4114 #define BIT_HI2Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI2Q_DESC_MODE_8822B) << BIT_SHIFT_HI2Q_DESC_MODE_8822B)
4115 #define BIT_GET_HI2Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8822B) & BIT_MASK_HI2Q_DESC_MODE_8822B)
4118 #define BIT_SHIFT_HI2Q_DESC_NUM_8822B 0
4119 #define BIT_MASK_HI2Q_DESC_NUM_8822B 0xfff
4120 #define BIT_HI2Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI2Q_DESC_NUM_8822B) << BIT_SHIFT_HI2Q_DESC_NUM_8822B)
4121 #define BIT_GET_HI2Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8822B) & BIT_MASK_HI2Q_DESC_NUM_8822B)
4124 /* 2 REG_HI3Q_TXBD_NUM_8822B */
4125 #define BIT_HI3Q_FLAG_8822B BIT(14)
4127 #define BIT_SHIFT_HI3Q_DESC_MODE_8822B 12
4128 #define BIT_MASK_HI3Q_DESC_MODE_8822B 0x3
4129 #define BIT_HI3Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI3Q_DESC_MODE_8822B) << BIT_SHIFT_HI3Q_DESC_MODE_8822B)
4130 #define BIT_GET_HI3Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8822B) & BIT_MASK_HI3Q_DESC_MODE_8822B)
4133 #define BIT_SHIFT_HI3Q_DESC_NUM_8822B 0
4134 #define BIT_MASK_HI3Q_DESC_NUM_8822B 0xfff
4135 #define BIT_HI3Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI3Q_DESC_NUM_8822B) << BIT_SHIFT_HI3Q_DESC_NUM_8822B)
4136 #define BIT_GET_HI3Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8822B) & BIT_MASK_HI3Q_DESC_NUM_8822B)
4139 /* 2 REG_HI4Q_TXBD_NUM_8822B */
4140 #define BIT_HI4Q_FLAG_8822B BIT(14)
4142 #define BIT_SHIFT_HI4Q_DESC_MODE_8822B 12
4143 #define BIT_MASK_HI4Q_DESC_MODE_8822B 0x3
4144 #define BIT_HI4Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI4Q_DESC_MODE_8822B) << BIT_SHIFT_HI4Q_DESC_MODE_8822B)
4145 #define BIT_GET_HI4Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8822B) & BIT_MASK_HI4Q_DESC_MODE_8822B)
4148 #define BIT_SHIFT_HI4Q_DESC_NUM_8822B 0
4149 #define BIT_MASK_HI4Q_DESC_NUM_8822B 0xfff
4150 #define BIT_HI4Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI4Q_DESC_NUM_8822B) << BIT_SHIFT_HI4Q_DESC_NUM_8822B)
4151 #define BIT_GET_HI4Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8822B) & BIT_MASK_HI4Q_DESC_NUM_8822B)
4154 /* 2 REG_HI5Q_TXBD_NUM_8822B */
4155 #define BIT_HI5Q_FLAG_8822B BIT(14)
4157 #define BIT_SHIFT_HI5Q_DESC_MODE_8822B 12
4158 #define BIT_MASK_HI5Q_DESC_MODE_8822B 0x3
4159 #define BIT_HI5Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI5Q_DESC_MODE_8822B) << BIT_SHIFT_HI5Q_DESC_MODE_8822B)
4160 #define BIT_GET_HI5Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8822B) & BIT_MASK_HI5Q_DESC_MODE_8822B)
4163 #define BIT_SHIFT_HI5Q_DESC_NUM_8822B 0
4164 #define BIT_MASK_HI5Q_DESC_NUM_8822B 0xfff
4165 #define BIT_HI5Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI5Q_DESC_NUM_8822B) << BIT_SHIFT_HI5Q_DESC_NUM_8822B)
4166 #define BIT_GET_HI5Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8822B) & BIT_MASK_HI5Q_DESC_NUM_8822B)
4169 /* 2 REG_HI6Q_TXBD_NUM_8822B */
4170 #define BIT_HI6Q_FLAG_8822B BIT(14)
4172 #define BIT_SHIFT_HI6Q_DESC_MODE_8822B 12
4173 #define BIT_MASK_HI6Q_DESC_MODE_8822B 0x3
4174 #define BIT_HI6Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI6Q_DESC_MODE_8822B) << BIT_SHIFT_HI6Q_DESC_MODE_8822B)
4175 #define BIT_GET_HI6Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8822B) & BIT_MASK_HI6Q_DESC_MODE_8822B)
4178 #define BIT_SHIFT_HI6Q_DESC_NUM_8822B 0
4179 #define BIT_MASK_HI6Q_DESC_NUM_8822B 0xfff
4180 #define BIT_HI6Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI6Q_DESC_NUM_8822B) << BIT_SHIFT_HI6Q_DESC_NUM_8822B)
4181 #define BIT_GET_HI6Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8822B) & BIT_MASK_HI6Q_DESC_NUM_8822B)
4184 /* 2 REG_HI7Q_TXBD_NUM_8822B */
4185 #define BIT_HI7Q_FLAG_8822B BIT(14)
4187 #define BIT_SHIFT_HI7Q_DESC_MODE_8822B 12
4188 #define BIT_MASK_HI7Q_DESC_MODE_8822B 0x3
4189 #define BIT_HI7Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI7Q_DESC_MODE_8822B) << BIT_SHIFT_HI7Q_DESC_MODE_8822B)
4190 #define BIT_GET_HI7Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8822B) & BIT_MASK_HI7Q_DESC_MODE_8822B)
4193 #define BIT_SHIFT_HI7Q_DESC_NUM_8822B 0
4194 #define BIT_MASK_HI7Q_DESC_NUM_8822B 0xfff
4195 #define BIT_HI7Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI7Q_DESC_NUM_8822B) << BIT_SHIFT_HI7Q_DESC_NUM_8822B)
4196 #define BIT_GET_HI7Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8822B) & BIT_MASK_HI7Q_DESC_NUM_8822B)
4199 /* 2 REG_TSFTIMER_HCI_8822B */
4201 #define BIT_SHIFT_TSFT2_HCI_8822B 16
4202 #define BIT_MASK_TSFT2_HCI_8822B 0xffff
4203 #define BIT_TSFT2_HCI_8822B(x) (((x) & BIT_MASK_TSFT2_HCI_8822B) << BIT_SHIFT_TSFT2_HCI_8822B)
4204 #define BIT_GET_TSFT2_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8822B) & BIT_MASK_TSFT2_HCI_8822B)
4207 #define BIT_SHIFT_TSFT1_HCI_8822B 0
4208 #define BIT_MASK_TSFT1_HCI_8822B 0xffff
4209 #define BIT_TSFT1_HCI_8822B(x) (((x) & BIT_MASK_TSFT1_HCI_8822B) << BIT_SHIFT_TSFT1_HCI_8822B)
4210 #define BIT_GET_TSFT1_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8822B) & BIT_MASK_TSFT1_HCI_8822B)
4213 /* 2 REG_BD_RWPTR_CLR_8822B */
4214 #define BIT_CLR_HI7Q_HW_IDX_8822B BIT(29)
4215 #define BIT_CLR_HI6Q_HW_IDX_8822B BIT(28)
4216 #define BIT_CLR_HI5Q_HW_IDX_8822B BIT(27)
4217 #define BIT_CLR_HI4Q_HW_IDX_8822B BIT(26)
4218 #define BIT_CLR_HI3Q_HW_IDX_8822B BIT(25)
4219 #define BIT_CLR_HI2Q_HW_IDX_8822B BIT(24)
4220 #define BIT_CLR_HI1Q_HW_IDX_8822B BIT(23)
4221 #define BIT_CLR_HI0Q_HW_IDX_8822B BIT(22)
4222 #define BIT_CLR_BKQ_HW_IDX_8822B BIT(21)
4223 #define BIT_CLR_BEQ_HW_IDX_8822B BIT(20)
4224 #define BIT_CLR_VIQ_HW_IDX_8822B BIT(19)
4225 #define BIT_CLR_VOQ_HW_IDX_8822B BIT(18)
4226 #define BIT_CLR_MGQ_HW_IDX_8822B BIT(17)
4227 #define BIT_CLR_RXQ_HW_IDX_8822B BIT(16)
4228 #define BIT_CLR_HI7Q_HOST_IDX_8822B BIT(13)
4229 #define BIT_CLR_HI6Q_HOST_IDX_8822B BIT(12)
4230 #define BIT_CLR_HI5Q_HOST_IDX_8822B BIT(11)
4231 #define BIT_CLR_HI4Q_HOST_IDX_8822B BIT(10)
4232 #define BIT_CLR_HI3Q_HOST_IDX_8822B BIT(9)
4233 #define BIT_CLR_HI2Q_HOST_IDX_8822B BIT(8)
4234 #define BIT_CLR_HI1Q_HOST_IDX_8822B BIT(7)
4235 #define BIT_CLR_HI0Q_HOST_IDX_8822B BIT(6)
4236 #define BIT_CLR_BKQ_HOST_IDX_8822B BIT(5)
4237 #define BIT_CLR_BEQ_HOST_IDX_8822B BIT(4)
4238 #define BIT_CLR_VIQ_HOST_IDX_8822B BIT(3)
4239 #define BIT_CLR_VOQ_HOST_IDX_8822B BIT(2)
4240 #define BIT_CLR_MGQ_HOST_IDX_8822B BIT(1)
4241 #define BIT_CLR_RXQ_HOST_IDX_8822B BIT(0)
4243 /* 2 REG_VOQ_TXBD_IDX_8822B */
4245 #define BIT_SHIFT_VOQ_HW_IDX_8822B 16
4246 #define BIT_MASK_VOQ_HW_IDX_8822B 0xfff
4247 #define BIT_VOQ_HW_IDX_8822B(x) (((x) & BIT_MASK_VOQ_HW_IDX_8822B) << BIT_SHIFT_VOQ_HW_IDX_8822B)
4248 #define BIT_GET_VOQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8822B) & BIT_MASK_VOQ_HW_IDX_8822B)
4251 #define BIT_SHIFT_VOQ_HOST_IDX_8822B 0
4252 #define BIT_MASK_VOQ_HOST_IDX_8822B 0xfff
4253 #define BIT_VOQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_VOQ_HOST_IDX_8822B) << BIT_SHIFT_VOQ_HOST_IDX_8822B)
4254 #define BIT_GET_VOQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8822B) & BIT_MASK_VOQ_HOST_IDX_8822B)
4257 /* 2 REG_VIQ_TXBD_IDX_8822B */
4259 #define BIT_SHIFT_VIQ_HW_IDX_8822B 16
4260 #define BIT_MASK_VIQ_HW_IDX_8822B 0xfff
4261 #define BIT_VIQ_HW_IDX_8822B(x) (((x) & BIT_MASK_VIQ_HW_IDX_8822B) << BIT_SHIFT_VIQ_HW_IDX_8822B)
4262 #define BIT_GET_VIQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8822B) & BIT_MASK_VIQ_HW_IDX_8822B)
4265 #define BIT_SHIFT_VIQ_HOST_IDX_8822B 0
4266 #define BIT_MASK_VIQ_HOST_IDX_8822B 0xfff
4267 #define BIT_VIQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_VIQ_HOST_IDX_8822B) << BIT_SHIFT_VIQ_HOST_IDX_8822B)
4268 #define BIT_GET_VIQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8822B) & BIT_MASK_VIQ_HOST_IDX_8822B)
4271 /* 2 REG_BEQ_TXBD_IDX_8822B */
4273 #define BIT_SHIFT_BEQ_HW_IDX_8822B 16
4274 #define BIT_MASK_BEQ_HW_IDX_8822B 0xfff
4275 #define BIT_BEQ_HW_IDX_8822B(x) (((x) & BIT_MASK_BEQ_HW_IDX_8822B) << BIT_SHIFT_BEQ_HW_IDX_8822B)
4276 #define BIT_GET_BEQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8822B) & BIT_MASK_BEQ_HW_IDX_8822B)
4279 #define BIT_SHIFT_BEQ_HOST_IDX_8822B 0
4280 #define BIT_MASK_BEQ_HOST_IDX_8822B 0xfff
4281 #define BIT_BEQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_BEQ_HOST_IDX_8822B) << BIT_SHIFT_BEQ_HOST_IDX_8822B)
4282 #define BIT_GET_BEQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8822B) & BIT_MASK_BEQ_HOST_IDX_8822B)
4285 /* 2 REG_BKQ_TXBD_IDX_8822B */
4287 #define BIT_SHIFT_BKQ_HW_IDX_8822B 16
4288 #define BIT_MASK_BKQ_HW_IDX_8822B 0xfff
4289 #define BIT_BKQ_HW_IDX_8822B(x) (((x) & BIT_MASK_BKQ_HW_IDX_8822B) << BIT_SHIFT_BKQ_HW_IDX_8822B)
4290 #define BIT_GET_BKQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8822B) & BIT_MASK_BKQ_HW_IDX_8822B)
4293 #define BIT_SHIFT_BKQ_HOST_IDX_8822B 0
4294 #define BIT_MASK_BKQ_HOST_IDX_8822B 0xfff
4295 #define BIT_BKQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_BKQ_HOST_IDX_8822B) << BIT_SHIFT_BKQ_HOST_IDX_8822B)
4296 #define BIT_GET_BKQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8822B) & BIT_MASK_BKQ_HOST_IDX_8822B)
4299 /* 2 REG_MGQ_TXBD_IDX_8822B */
4301 #define BIT_SHIFT_MGQ_HW_IDX_8822B 16
4302 #define BIT_MASK_MGQ_HW_IDX_8822B 0xfff
4303 #define BIT_MGQ_HW_IDX_8822B(x) (((x) & BIT_MASK_MGQ_HW_IDX_8822B) << BIT_SHIFT_MGQ_HW_IDX_8822B)
4304 #define BIT_GET_MGQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8822B) & BIT_MASK_MGQ_HW_IDX_8822B)
4307 #define BIT_SHIFT_MGQ_HOST_IDX_8822B 0
4308 #define BIT_MASK_MGQ_HOST_IDX_8822B 0xfff
4309 #define BIT_MGQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_MGQ_HOST_IDX_8822B) << BIT_SHIFT_MGQ_HOST_IDX_8822B)
4310 #define BIT_GET_MGQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8822B) & BIT_MASK_MGQ_HOST_IDX_8822B)
4313 /* 2 REG_RXQ_RXBD_IDX_8822B */
4315 #define BIT_SHIFT_RXQ_HW_IDX_8822B 16
4316 #define BIT_MASK_RXQ_HW_IDX_8822B 0xfff
4317 #define BIT_RXQ_HW_IDX_8822B(x) (((x) & BIT_MASK_RXQ_HW_IDX_8822B) << BIT_SHIFT_RXQ_HW_IDX_8822B)
4318 #define BIT_GET_RXQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8822B) & BIT_MASK_RXQ_HW_IDX_8822B)
4321 #define BIT_SHIFT_RXQ_HOST_IDX_8822B 0
4322 #define BIT_MASK_RXQ_HOST_IDX_8822B 0xfff
4323 #define BIT_RXQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_RXQ_HOST_IDX_8822B) << BIT_SHIFT_RXQ_HOST_IDX_8822B)
4324 #define BIT_GET_RXQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8822B) & BIT_MASK_RXQ_HOST_IDX_8822B)
4327 /* 2 REG_HI0Q_TXBD_IDX_8822B */
4329 #define BIT_SHIFT_HI0Q_HW_IDX_8822B 16
4330 #define BIT_MASK_HI0Q_HW_IDX_8822B 0xfff
4331 #define BIT_HI0Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI0Q_HW_IDX_8822B) << BIT_SHIFT_HI0Q_HW_IDX_8822B)
4332 #define BIT_GET_HI0Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8822B) & BIT_MASK_HI0Q_HW_IDX_8822B)
4335 #define BIT_SHIFT_HI0Q_HOST_IDX_8822B 0
4336 #define BIT_MASK_HI0Q_HOST_IDX_8822B 0xfff
4337 #define BIT_HI0Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI0Q_HOST_IDX_8822B) << BIT_SHIFT_HI0Q_HOST_IDX_8822B)
4338 #define BIT_GET_HI0Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8822B) & BIT_MASK_HI0Q_HOST_IDX_8822B)
4341 /* 2 REG_HI1Q_TXBD_IDX_8822B */
4343 #define BIT_SHIFT_HI1Q_HW_IDX_8822B 16
4344 #define BIT_MASK_HI1Q_HW_IDX_8822B 0xfff
4345 #define BIT_HI1Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI1Q_HW_IDX_8822B) << BIT_SHIFT_HI1Q_HW_IDX_8822B)
4346 #define BIT_GET_HI1Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8822B) & BIT_MASK_HI1Q_HW_IDX_8822B)
4349 #define BIT_SHIFT_HI1Q_HOST_IDX_8822B 0
4350 #define BIT_MASK_HI1Q_HOST_IDX_8822B 0xfff
4351 #define BIT_HI1Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI1Q_HOST_IDX_8822B) << BIT_SHIFT_HI1Q_HOST_IDX_8822B)
4352 #define BIT_GET_HI1Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8822B) & BIT_MASK_HI1Q_HOST_IDX_8822B)
4355 /* 2 REG_HI2Q_TXBD_IDX_8822B */
4357 #define BIT_SHIFT_HI2Q_HW_IDX_8822B 16
4358 #define BIT_MASK_HI2Q_HW_IDX_8822B 0xfff
4359 #define BIT_HI2Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI2Q_HW_IDX_8822B) << BIT_SHIFT_HI2Q_HW_IDX_8822B)
4360 #define BIT_GET_HI2Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8822B) & BIT_MASK_HI2Q_HW_IDX_8822B)
4363 #define BIT_SHIFT_HI2Q_HOST_IDX_8822B 0
4364 #define BIT_MASK_HI2Q_HOST_IDX_8822B 0xfff
4365 #define BIT_HI2Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI2Q_HOST_IDX_8822B) << BIT_SHIFT_HI2Q_HOST_IDX_8822B)
4366 #define BIT_GET_HI2Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8822B) & BIT_MASK_HI2Q_HOST_IDX_8822B)
4369 /* 2 REG_HI3Q_TXBD_IDX_8822B */
4371 #define BIT_SHIFT_HI3Q_HW_IDX_8822B 16
4372 #define BIT_MASK_HI3Q_HW_IDX_8822B 0xfff
4373 #define BIT_HI3Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI3Q_HW_IDX_8822B) << BIT_SHIFT_HI3Q_HW_IDX_8822B)
4374 #define BIT_GET_HI3Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8822B) & BIT_MASK_HI3Q_HW_IDX_8822B)
4377 #define BIT_SHIFT_HI3Q_HOST_IDX_8822B 0
4378 #define BIT_MASK_HI3Q_HOST_IDX_8822B 0xfff
4379 #define BIT_HI3Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI3Q_HOST_IDX_8822B) << BIT_SHIFT_HI3Q_HOST_IDX_8822B)
4380 #define BIT_GET_HI3Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8822B) & BIT_MASK_HI3Q_HOST_IDX_8822B)
4383 /* 2 REG_HI4Q_TXBD_IDX_8822B */
4385 #define BIT_SHIFT_HI4Q_HW_IDX_8822B 16
4386 #define BIT_MASK_HI4Q_HW_IDX_8822B 0xfff
4387 #define BIT_HI4Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI4Q_HW_IDX_8822B) << BIT_SHIFT_HI4Q_HW_IDX_8822B)
4388 #define BIT_GET_HI4Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8822B) & BIT_MASK_HI4Q_HW_IDX_8822B)
4391 #define BIT_SHIFT_HI4Q_HOST_IDX_8822B 0
4392 #define BIT_MASK_HI4Q_HOST_IDX_8822B 0xfff
4393 #define BIT_HI4Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI4Q_HOST_IDX_8822B) << BIT_SHIFT_HI4Q_HOST_IDX_8822B)
4394 #define BIT_GET_HI4Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8822B) & BIT_MASK_HI4Q_HOST_IDX_8822B)
4397 /* 2 REG_HI5Q_TXBD_IDX_8822B */
4399 #define BIT_SHIFT_HI5Q_HW_IDX_8822B 16
4400 #define BIT_MASK_HI5Q_HW_IDX_8822B 0xfff
4401 #define BIT_HI5Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI5Q_HW_IDX_8822B) << BIT_SHIFT_HI5Q_HW_IDX_8822B)
4402 #define BIT_GET_HI5Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8822B) & BIT_MASK_HI5Q_HW_IDX_8822B)
4405 #define BIT_SHIFT_HI5Q_HOST_IDX_8822B 0
4406 #define BIT_MASK_HI5Q_HOST_IDX_8822B 0xfff
4407 #define BIT_HI5Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI5Q_HOST_IDX_8822B) << BIT_SHIFT_HI5Q_HOST_IDX_8822B)
4408 #define BIT_GET_HI5Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8822B) & BIT_MASK_HI5Q_HOST_IDX_8822B)
4411 /* 2 REG_HI6Q_TXBD_IDX_8822B */
4413 #define BIT_SHIFT_HI6Q_HW_IDX_8822B 16
4414 #define BIT_MASK_HI6Q_HW_IDX_8822B 0xfff
4415 #define BIT_HI6Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI6Q_HW_IDX_8822B) << BIT_SHIFT_HI6Q_HW_IDX_8822B)
4416 #define BIT_GET_HI6Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8822B) & BIT_MASK_HI6Q_HW_IDX_8822B)
4419 #define BIT_SHIFT_HI6Q_HOST_IDX_8822B 0
4420 #define BIT_MASK_HI6Q_HOST_IDX_8822B 0xfff
4421 #define BIT_HI6Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI6Q_HOST_IDX_8822B) << BIT_SHIFT_HI6Q_HOST_IDX_8822B)
4422 #define BIT_GET_HI6Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8822B) & BIT_MASK_HI6Q_HOST_IDX_8822B)
4425 /* 2 REG_HI7Q_TXBD_IDX_8822B */
4427 #define BIT_SHIFT_HI7Q_HW_IDX_8822B 16
4428 #define BIT_MASK_HI7Q_HW_IDX_8822B 0xfff
4429 #define BIT_HI7Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI7Q_HW_IDX_8822B) << BIT_SHIFT_HI7Q_HW_IDX_8822B)
4430 #define BIT_GET_HI7Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8822B) & BIT_MASK_HI7Q_HW_IDX_8822B)
4433 #define BIT_SHIFT_HI7Q_HOST_IDX_8822B 0
4434 #define BIT_MASK_HI7Q_HOST_IDX_8822B 0xfff
4435 #define BIT_HI7Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI7Q_HOST_IDX_8822B) << BIT_SHIFT_HI7Q_HOST_IDX_8822B)
4436 #define BIT_GET_HI7Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8822B) & BIT_MASK_HI7Q_HOST_IDX_8822B)
4439 /* 2 REG_DBG_SEL_V1_8822B */
4441 #define BIT_SHIFT_DBG_SEL_8822B 0
4442 #define BIT_MASK_DBG_SEL_8822B 0xff
4443 #define BIT_DBG_SEL_8822B(x) (((x) & BIT_MASK_DBG_SEL_8822B) << BIT_SHIFT_DBG_SEL_8822B)
4444 #define BIT_GET_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_8822B) & BIT_MASK_DBG_SEL_8822B)
4447 /* 2 REG_PCIE_HRPWM1_V1_8822B */
4449 #define BIT_SHIFT_PCIE_HRPWM_8822B 0
4450 #define BIT_MASK_PCIE_HRPWM_8822B 0xff
4451 #define BIT_PCIE_HRPWM_8822B(x) (((x) & BIT_MASK_PCIE_HRPWM_8822B) << BIT_SHIFT_PCIE_HRPWM_8822B)
4452 #define BIT_GET_PCIE_HRPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8822B) & BIT_MASK_PCIE_HRPWM_8822B)
4455 /* 2 REG_PCIE_HCPWM1_V1_8822B */
4457 #define BIT_SHIFT_PCIE_HCPWM_8822B 0
4458 #define BIT_MASK_PCIE_HCPWM_8822B 0xff
4459 #define BIT_PCIE_HCPWM_8822B(x) (((x) & BIT_MASK_PCIE_HCPWM_8822B) << BIT_SHIFT_PCIE_HCPWM_8822B)
4460 #define BIT_GET_PCIE_HCPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8822B) & BIT_MASK_PCIE_HCPWM_8822B)
4463 /* 2 REG_PCIE_CTRL2_8822B */
4464 #define BIT_DIS_TXDMA_PRE_8822B BIT(7)
4465 #define BIT_DIS_RXDMA_PRE_8822B BIT(6)
4467 #define BIT_SHIFT_HPS_CLKR_PCIE_8822B 4
4468 #define BIT_MASK_HPS_CLKR_PCIE_8822B 0x3
4469 #define BIT_HPS_CLKR_PCIE_8822B(x) (((x) & BIT_MASK_HPS_CLKR_PCIE_8822B) << BIT_SHIFT_HPS_CLKR_PCIE_8822B)
4470 #define BIT_GET_HPS_CLKR_PCIE_8822B(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8822B) & BIT_MASK_HPS_CLKR_PCIE_8822B)
4472 #define BIT_PCIE_INT_8822B BIT(3)
4473 #define BIT_TXFLAG_EXIT_L1_EN_8822B BIT(2)
4474 #define BIT_EN_RXDMA_ALIGN_8822B BIT(1)
4475 #define BIT_EN_TXDMA_ALIGN_8822B BIT(0)
4477 /* 2 REG_PCIE_HRPWM2_V1_8822B */
4479 #define BIT_SHIFT_PCIE_HRPWM2_8822B 0
4480 #define BIT_MASK_PCIE_HRPWM2_8822B 0xffff
4481 #define BIT_PCIE_HRPWM2_8822B(x) (((x) & BIT_MASK_PCIE_HRPWM2_8822B) << BIT_SHIFT_PCIE_HRPWM2_8822B)
4482 #define BIT_GET_PCIE_HRPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8822B) & BIT_MASK_PCIE_HRPWM2_8822B)
4485 /* 2 REG_PCIE_HCPWM2_V1_8822B */
4487 #define BIT_SHIFT_PCIE_HCPWM2_8822B 0
4488 #define BIT_MASK_PCIE_HCPWM2_8822B 0xffff
4489 #define BIT_PCIE_HCPWM2_8822B(x) (((x) & BIT_MASK_PCIE_HCPWM2_8822B) << BIT_SHIFT_PCIE_HCPWM2_8822B)
4490 #define BIT_GET_PCIE_HCPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8822B) & BIT_MASK_PCIE_HCPWM2_8822B)
4493 /* 2 REG_PCIE_H2C_MSG_V1_8822B */
4495 #define BIT_SHIFT_DRV2FW_INFO_8822B 0
4496 #define BIT_MASK_DRV2FW_INFO_8822B 0xffffffffL
4497 #define BIT_DRV2FW_INFO_8822B(x) (((x) & BIT_MASK_DRV2FW_INFO_8822B) << BIT_SHIFT_DRV2FW_INFO_8822B)
4498 #define BIT_GET_DRV2FW_INFO_8822B(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8822B) & BIT_MASK_DRV2FW_INFO_8822B)
4501 /* 2 REG_PCIE_C2H_MSG_V1_8822B */
4503 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B 0
4504 #define BIT_MASK_HCI_PCIE_C2H_MSG_8822B 0xffffffffL
4505 #define BIT_HCI_PCIE_C2H_MSG_8822B(x) (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B) << BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B)
4506 #define BIT_GET_HCI_PCIE_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B)
4509 /* 2 REG_DBI_WDATA_V1_8822B */
4511 #define BIT_SHIFT_DBI_WDATA_8822B 0
4512 #define BIT_MASK_DBI_WDATA_8822B 0xffffffffL
4513 #define BIT_DBI_WDATA_8822B(x) (((x) & BIT_MASK_DBI_WDATA_8822B) << BIT_SHIFT_DBI_WDATA_8822B)
4514 #define BIT_GET_DBI_WDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_WDATA_8822B) & BIT_MASK_DBI_WDATA_8822B)
4517 /* 2 REG_DBI_RDATA_V1_8822B */
4519 #define BIT_SHIFT_DBI_RDATA_8822B 0
4520 #define BIT_MASK_DBI_RDATA_8822B 0xffffffffL
4521 #define BIT_DBI_RDATA_8822B(x) (((x) & BIT_MASK_DBI_RDATA_8822B) << BIT_SHIFT_DBI_RDATA_8822B)
4522 #define BIT_GET_DBI_RDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_RDATA_8822B) & BIT_MASK_DBI_RDATA_8822B)
4525 /* 2 REG_DBI_FLAG_V1_8822B */
4526 #define BIT_EN_STUCK_DBG_8822B BIT(26)
4527 #define BIT_RX_STUCK_8822B BIT(25)
4528 #define BIT_TX_STUCK_8822B BIT(24)
4529 #define BIT_DBI_RFLAG_8822B BIT(17)
4530 #define BIT_DBI_WFLAG_8822B BIT(16)
4532 #define BIT_SHIFT_DBI_WREN_8822B 12
4533 #define BIT_MASK_DBI_WREN_8822B 0xf
4534 #define BIT_DBI_WREN_8822B(x) (((x) & BIT_MASK_DBI_WREN_8822B) << BIT_SHIFT_DBI_WREN_8822B)
4535 #define BIT_GET_DBI_WREN_8822B(x) (((x) >> BIT_SHIFT_DBI_WREN_8822B) & BIT_MASK_DBI_WREN_8822B)
4538 #define BIT_SHIFT_DBI_ADDR_8822B 0
4539 #define BIT_MASK_DBI_ADDR_8822B 0xfff
4540 #define BIT_DBI_ADDR_8822B(x) (((x) & BIT_MASK_DBI_ADDR_8822B) << BIT_SHIFT_DBI_ADDR_8822B)
4541 #define BIT_GET_DBI_ADDR_8822B(x) (((x) >> BIT_SHIFT_DBI_ADDR_8822B) & BIT_MASK_DBI_ADDR_8822B)
4544 /* 2 REG_MDIO_V1_8822B */
4546 #define BIT_SHIFT_MDIO_RDATA_8822B 16
4547 #define BIT_MASK_MDIO_RDATA_8822B 0xffff
4548 #define BIT_MDIO_RDATA_8822B(x) (((x) & BIT_MASK_MDIO_RDATA_8822B) << BIT_SHIFT_MDIO_RDATA_8822B)
4549 #define BIT_GET_MDIO_RDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8822B) & BIT_MASK_MDIO_RDATA_8822B)
4552 #define BIT_SHIFT_MDIO_WDATA_8822B 0
4553 #define BIT_MASK_MDIO_WDATA_8822B 0xffff
4554 #define BIT_MDIO_WDATA_8822B(x) (((x) & BIT_MASK_MDIO_WDATA_8822B) << BIT_SHIFT_MDIO_WDATA_8822B)
4555 #define BIT_GET_MDIO_WDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8822B) & BIT_MASK_MDIO_WDATA_8822B)
4558 /* 2 REG_PCIE_MIX_CFG_8822B */
4560 #define BIT_SHIFT_MDIO_PHY_ADDR_8822B 24
4561 #define BIT_MASK_MDIO_PHY_ADDR_8822B 0x1f
4562 #define BIT_MDIO_PHY_ADDR_8822B(x) (((x) & BIT_MASK_MDIO_PHY_ADDR_8822B) << BIT_SHIFT_MDIO_PHY_ADDR_8822B)
4563 #define BIT_GET_MDIO_PHY_ADDR_8822B(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8822B) & BIT_MASK_MDIO_PHY_ADDR_8822B)
4566 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B 10
4567 #define BIT_MASK_WATCH_DOG_RECORD_V1_8822B 0x3fff
4568 #define BIT_WATCH_DOG_RECORD_V1_8822B(x) (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B) << BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B)
4569 #define BIT_GET_WATCH_DOG_RECORD_V1_8822B(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B)
4571 #define BIT_R_IO_TIMEOUT_FLAG_V1_8822B BIT(9)
4572 #define BIT_EN_WATCH_DOG_8822B BIT(8)
4573 #define BIT_ECRC_EN_V1_8822B BIT(7)
4574 #define BIT_MDIO_RFLAG_V1_8822B BIT(6)
4575 #define BIT_MDIO_WFLAG_V1_8822B BIT(5)
4577 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8822B 0
4578 #define BIT_MASK_MDIO_REG_ADDR_V1_8822B 0x1f
4579 #define BIT_MDIO_REG_ADDR_V1_8822B(x) (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8822B) << BIT_SHIFT_MDIO_REG_ADDR_V1_8822B)
4580 #define BIT_GET_MDIO_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8822B) & BIT_MASK_MDIO_REG_ADDR_V1_8822B)
4583 /* 2 REG_HCI_MIX_CFG_8822B */
4584 #define BIT_HOST_GEN2_SUPPORT_8822B BIT(20)
4586 #define BIT_SHIFT_TXDMA_ERR_FLAG_8822B 16
4587 #define BIT_MASK_TXDMA_ERR_FLAG_8822B 0xf
4588 #define BIT_TXDMA_ERR_FLAG_8822B(x) (((x) & BIT_MASK_TXDMA_ERR_FLAG_8822B) << BIT_SHIFT_TXDMA_ERR_FLAG_8822B)
4589 #define BIT_GET_TXDMA_ERR_FLAG_8822B(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8822B) & BIT_MASK_TXDMA_ERR_FLAG_8822B)
4592 #define BIT_SHIFT_EARLY_MODE_SEL_8822B 12
4593 #define BIT_MASK_EARLY_MODE_SEL_8822B 0xf
4594 #define BIT_EARLY_MODE_SEL_8822B(x) (((x) & BIT_MASK_EARLY_MODE_SEL_8822B) << BIT_SHIFT_EARLY_MODE_SEL_8822B)
4595 #define BIT_GET_EARLY_MODE_SEL_8822B(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8822B) & BIT_MASK_EARLY_MODE_SEL_8822B)
4597 #define BIT_EPHY_RX50_EN_8822B BIT(11)
4599 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B 8
4600 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8822B 0x7
4601 #define BIT_MSI_TIMEOUT_ID_V1_8822B(x) (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B) << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B)
4602 #define BIT_GET_MSI_TIMEOUT_ID_V1_8822B(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B)
4604 #define BIT_RADDR_RD_8822B BIT(7)
4605 #define BIT_EN_MUL_TAG_8822B BIT(6)
4606 #define BIT_EN_EARLY_MODE_8822B BIT(5)
4607 #define BIT_L0S_LINK_OFF_8822B BIT(4)
4608 #define BIT_ACT_LINK_OFF_8822B BIT(3)
4609 #define BIT_EN_SLOW_MAC_TX_8822B BIT(2)
4610 #define BIT_EN_SLOW_MAC_RX_8822B BIT(1)
4612 /* 2 REG_STC_INT_CS_8822B(PCIE STATE CHANGE INTERRUPT CONTROL AND STATUS) */
4613 #define BIT_STC_INT_EN_8822B BIT(31)
4615 #define BIT_SHIFT_STC_INT_FLAG_8822B 16
4616 #define BIT_MASK_STC_INT_FLAG_8822B 0xff
4617 #define BIT_STC_INT_FLAG_8822B(x) (((x) & BIT_MASK_STC_INT_FLAG_8822B) << BIT_SHIFT_STC_INT_FLAG_8822B)
4618 #define BIT_GET_STC_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8822B) & BIT_MASK_STC_INT_FLAG_8822B)
4621 #define BIT_SHIFT_STC_INT_IDX_8822B 8
4622 #define BIT_MASK_STC_INT_IDX_8822B 0x7
4623 #define BIT_STC_INT_IDX_8822B(x) (((x) & BIT_MASK_STC_INT_IDX_8822B) << BIT_SHIFT_STC_INT_IDX_8822B)
4624 #define BIT_GET_STC_INT_IDX_8822B(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8822B) & BIT_MASK_STC_INT_IDX_8822B)
4627 #define BIT_SHIFT_STC_INT_REALTIME_CS_8822B 0
4628 #define BIT_MASK_STC_INT_REALTIME_CS_8822B 0x3f
4629 #define BIT_STC_INT_REALTIME_CS_8822B(x) (((x) & BIT_MASK_STC_INT_REALTIME_CS_8822B) << BIT_SHIFT_STC_INT_REALTIME_CS_8822B)
4630 #define BIT_GET_STC_INT_REALTIME_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8822B) & BIT_MASK_STC_INT_REALTIME_CS_8822B)
4633 /* 2 REG_ST_INT_CFG_8822B(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
4634 #define BIT_STC_INT_GRP_EN_8822B BIT(31)
4636 #define BIT_SHIFT_STC_INT_EXPECT_LS_8822B 8
4637 #define BIT_MASK_STC_INT_EXPECT_LS_8822B 0x3f
4638 #define BIT_STC_INT_EXPECT_LS_8822B(x) (((x) & BIT_MASK_STC_INT_EXPECT_LS_8822B) << BIT_SHIFT_STC_INT_EXPECT_LS_8822B)
4639 #define BIT_GET_STC_INT_EXPECT_LS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8822B) & BIT_MASK_STC_INT_EXPECT_LS_8822B)
4642 #define BIT_SHIFT_STC_INT_EXPECT_CS_8822B 0
4643 #define BIT_MASK_STC_INT_EXPECT_CS_8822B 0x3f
4644 #define BIT_STC_INT_EXPECT_CS_8822B(x) (((x) & BIT_MASK_STC_INT_EXPECT_CS_8822B) << BIT_SHIFT_STC_INT_EXPECT_CS_8822B)
4645 #define BIT_GET_STC_INT_EXPECT_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8822B) & BIT_MASK_STC_INT_EXPECT_CS_8822B)
4648 /* 2 REG_CMU_DLY_CTRL_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
4649 #define BIT_CMU_DLY_EN_8822B BIT(31)
4650 #define BIT_CMU_DLY_MODE_8822B BIT(30)
4652 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8822B 0
4653 #define BIT_MASK_CMU_DLY_PRE_DIV_8822B 0xff
4654 #define BIT_CMU_DLY_PRE_DIV_8822B(x) (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8822B) << BIT_SHIFT_CMU_DLY_PRE_DIV_8822B)
4655 #define BIT_GET_CMU_DLY_PRE_DIV_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8822B) & BIT_MASK_CMU_DLY_PRE_DIV_8822B)
4658 /* 2 REG_CMU_DLY_CFG_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
4660 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8822B 24
4661 #define BIT_MASK_CMU_DLY_LTR_A2I_8822B 0xff
4662 #define BIT_CMU_DLY_LTR_A2I_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8822B) << BIT_SHIFT_CMU_DLY_LTR_A2I_8822B)
4663 #define BIT_GET_CMU_DLY_LTR_A2I_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8822B) & BIT_MASK_CMU_DLY_LTR_A2I_8822B)
4666 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8822B 16
4667 #define BIT_MASK_CMU_DLY_LTR_I2A_8822B 0xff
4668 #define BIT_CMU_DLY_LTR_I2A_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8822B) << BIT_SHIFT_CMU_DLY_LTR_I2A_8822B)
4669 #define BIT_GET_CMU_DLY_LTR_I2A_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8822B) & BIT_MASK_CMU_DLY_LTR_I2A_8822B)
4672 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B 8
4673 #define BIT_MASK_CMU_DLY_LTR_IDLE_8822B 0xff
4674 #define BIT_CMU_DLY_LTR_IDLE_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B) << BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B)
4675 #define BIT_GET_CMU_DLY_LTR_IDLE_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B)
4678 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8822B 0
4679 #define BIT_MASK_CMU_DLY_LTR_ACT_8822B 0xff
4680 #define BIT_CMU_DLY_LTR_ACT_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8822B) << BIT_SHIFT_CMU_DLY_LTR_ACT_8822B)
4681 #define BIT_GET_CMU_DLY_LTR_ACT_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8822B) & BIT_MASK_CMU_DLY_LTR_ACT_8822B)
4684 /* 2 REG_H2CQ_TXBD_DESA_8822B */
4686 #define BIT_SHIFT_H2CQ_TXBD_DESA_8822B 0
4687 #define BIT_MASK_H2CQ_TXBD_DESA_8822B 0xffffffffffffffffL
4688 #define BIT_H2CQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_H2CQ_TXBD_DESA_8822B) << BIT_SHIFT_H2CQ_TXBD_DESA_8822B)
4689 #define BIT_GET_H2CQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8822B) & BIT_MASK_H2CQ_TXBD_DESA_8822B)
4692 /* 2 REG_H2CQ_TXBD_NUM_8822B */
4693 #define BIT_PCIE_H2CQ_FLAG_8822B BIT(14)
4695 #define BIT_SHIFT_H2CQ_DESC_MODE_8822B 12
4696 #define BIT_MASK_H2CQ_DESC_MODE_8822B 0x3
4697 #define BIT_H2CQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_H2CQ_DESC_MODE_8822B) << BIT_SHIFT_H2CQ_DESC_MODE_8822B)
4698 #define BIT_GET_H2CQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8822B) & BIT_MASK_H2CQ_DESC_MODE_8822B)
4701 #define BIT_SHIFT_H2CQ_DESC_NUM_8822B 0
4702 #define BIT_MASK_H2CQ_DESC_NUM_8822B 0xfff
4703 #define BIT_H2CQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_H2CQ_DESC_NUM_8822B) << BIT_SHIFT_H2CQ_DESC_NUM_8822B)
4704 #define BIT_GET_H2CQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8822B) & BIT_MASK_H2CQ_DESC_NUM_8822B)
4707 /* 2 REG_H2CQ_TXBD_IDX_8822B */
4709 #define BIT_SHIFT_H2CQ_HW_IDX_8822B 16
4710 #define BIT_MASK_H2CQ_HW_IDX_8822B 0xfff
4711 #define BIT_H2CQ_HW_IDX_8822B(x) (((x) & BIT_MASK_H2CQ_HW_IDX_8822B) << BIT_SHIFT_H2CQ_HW_IDX_8822B)
4712 #define BIT_GET_H2CQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8822B) & BIT_MASK_H2CQ_HW_IDX_8822B)
4715 #define BIT_SHIFT_H2CQ_HOST_IDX_8822B 0
4716 #define BIT_MASK_H2CQ_HOST_IDX_8822B 0xfff
4717 #define BIT_H2CQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_H2CQ_HOST_IDX_8822B) << BIT_SHIFT_H2CQ_HOST_IDX_8822B)
4718 #define BIT_GET_H2CQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8822B) & BIT_MASK_H2CQ_HOST_IDX_8822B)
4721 /* 2 REG_H2CQ_CSR_8822B[31:0] (H2CQ CONTROL AND STATUS) */
4722 #define BIT_H2CQ_FULL_8822B BIT(31)
4723 #define BIT_CLR_H2CQ_HOST_IDX_8822B BIT(16)
4724 #define BIT_CLR_H2CQ_HW_IDX_8822B BIT(8)
4726 /* 2 REG_Q0_INFO_8822B */
4728 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8822B 25
4729 #define BIT_MASK_QUEUEMACID_Q0_V1_8822B 0x7f
4730 #define BIT_QUEUEMACID_Q0_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q0_V1_8822B)
4731 #define BIT_GET_QUEUEMACID_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8822B) & BIT_MASK_QUEUEMACID_Q0_V1_8822B)
4734 #define BIT_SHIFT_QUEUEAC_Q0_V1_8822B 23
4735 #define BIT_MASK_QUEUEAC_Q0_V1_8822B 0x3
4736 #define BIT_QUEUEAC_Q0_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q0_V1_8822B) << BIT_SHIFT_QUEUEAC_Q0_V1_8822B)
4737 #define BIT_GET_QUEUEAC_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8822B) & BIT_MASK_QUEUEAC_Q0_V1_8822B)
4739 #define BIT_TIDEMPTY_Q0_V1_8822B BIT(22)
4741 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8822B 11
4742 #define BIT_MASK_TAIL_PKT_Q0_V2_8822B 0x7ff
4743 #define BIT_TAIL_PKT_Q0_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q0_V2_8822B)
4744 #define BIT_GET_TAIL_PKT_Q0_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8822B) & BIT_MASK_TAIL_PKT_Q0_V2_8822B)
4747 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8822B 0
4748 #define BIT_MASK_HEAD_PKT_Q0_V1_8822B 0x7ff
4749 #define BIT_HEAD_PKT_Q0_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q0_V1_8822B)
4750 #define BIT_GET_HEAD_PKT_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8822B) & BIT_MASK_HEAD_PKT_Q0_V1_8822B)
4753 /* 2 REG_Q1_INFO_8822B */
4755 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8822B 25
4756 #define BIT_MASK_QUEUEMACID_Q1_V1_8822B 0x7f
4757 #define BIT_QUEUEMACID_Q1_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q1_V1_8822B)
4758 #define BIT_GET_QUEUEMACID_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8822B) & BIT_MASK_QUEUEMACID_Q1_V1_8822B)
4761 #define BIT_SHIFT_QUEUEAC_Q1_V1_8822B 23
4762 #define BIT_MASK_QUEUEAC_Q1_V1_8822B 0x3
4763 #define BIT_QUEUEAC_Q1_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q1_V1_8822B) << BIT_SHIFT_QUEUEAC_Q1_V1_8822B)
4764 #define BIT_GET_QUEUEAC_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8822B) & BIT_MASK_QUEUEAC_Q1_V1_8822B)
4766 #define BIT_TIDEMPTY_Q1_V1_8822B BIT(22)
4768 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8822B 11
4769 #define BIT_MASK_TAIL_PKT_Q1_V2_8822B 0x7ff
4770 #define BIT_TAIL_PKT_Q1_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q1_V2_8822B)
4771 #define BIT_GET_TAIL_PKT_Q1_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8822B) & BIT_MASK_TAIL_PKT_Q1_V2_8822B)
4774 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8822B 0
4775 #define BIT_MASK_HEAD_PKT_Q1_V1_8822B 0x7ff
4776 #define BIT_HEAD_PKT_Q1_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q1_V1_8822B)
4777 #define BIT_GET_HEAD_PKT_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8822B) & BIT_MASK_HEAD_PKT_Q1_V1_8822B)
4780 /* 2 REG_Q2_INFO_8822B */
4782 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8822B 25
4783 #define BIT_MASK_QUEUEMACID_Q2_V1_8822B 0x7f
4784 #define BIT_QUEUEMACID_Q2_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q2_V1_8822B)
4785 #define BIT_GET_QUEUEMACID_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8822B) & BIT_MASK_QUEUEMACID_Q2_V1_8822B)
4788 #define BIT_SHIFT_QUEUEAC_Q2_V1_8822B 23
4789 #define BIT_MASK_QUEUEAC_Q2_V1_8822B 0x3
4790 #define BIT_QUEUEAC_Q2_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q2_V1_8822B) << BIT_SHIFT_QUEUEAC_Q2_V1_8822B)
4791 #define BIT_GET_QUEUEAC_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8822B) & BIT_MASK_QUEUEAC_Q2_V1_8822B)
4793 #define BIT_TIDEMPTY_Q2_V1_8822B BIT(22)
4795 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8822B 11
4796 #define BIT_MASK_TAIL_PKT_Q2_V2_8822B 0x7ff
4797 #define BIT_TAIL_PKT_Q2_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q2_V2_8822B)
4798 #define BIT_GET_TAIL_PKT_Q2_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8822B) & BIT_MASK_TAIL_PKT_Q2_V2_8822B)
4801 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8822B 0
4802 #define BIT_MASK_HEAD_PKT_Q2_V1_8822B 0x7ff
4803 #define BIT_HEAD_PKT_Q2_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q2_V1_8822B)
4804 #define BIT_GET_HEAD_PKT_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8822B) & BIT_MASK_HEAD_PKT_Q2_V1_8822B)
4807 /* 2 REG_Q3_INFO_8822B */
4809 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8822B 25
4810 #define BIT_MASK_QUEUEMACID_Q3_V1_8822B 0x7f
4811 #define BIT_QUEUEMACID_Q3_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q3_V1_8822B)
4812 #define BIT_GET_QUEUEMACID_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8822B) & BIT_MASK_QUEUEMACID_Q3_V1_8822B)
4815 #define BIT_SHIFT_QUEUEAC_Q3_V1_8822B 23
4816 #define BIT_MASK_QUEUEAC_Q3_V1_8822B 0x3
4817 #define BIT_QUEUEAC_Q3_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q3_V1_8822B) << BIT_SHIFT_QUEUEAC_Q3_V1_8822B)
4818 #define BIT_GET_QUEUEAC_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8822B) & BIT_MASK_QUEUEAC_Q3_V1_8822B)
4820 #define BIT_TIDEMPTY_Q3_V1_8822B BIT(22)
4822 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8822B 11
4823 #define BIT_MASK_TAIL_PKT_Q3_V2_8822B 0x7ff
4824 #define BIT_TAIL_PKT_Q3_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q3_V2_8822B)
4825 #define BIT_GET_TAIL_PKT_Q3_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8822B) & BIT_MASK_TAIL_PKT_Q3_V2_8822B)
4828 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8822B 0
4829 #define BIT_MASK_HEAD_PKT_Q3_V1_8822B 0x7ff
4830 #define BIT_HEAD_PKT_Q3_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q3_V1_8822B)
4831 #define BIT_GET_HEAD_PKT_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8822B) & BIT_MASK_HEAD_PKT_Q3_V1_8822B)
4834 /* 2 REG_MGQ_INFO_8822B */
4836 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B 25
4837 #define BIT_MASK_QUEUEMACID_MGQ_V1_8822B 0x7f
4838 #define BIT_QUEUEMACID_MGQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B)
4839 #define BIT_GET_QUEUEMACID_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B)
4842 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8822B 23
4843 #define BIT_MASK_QUEUEAC_MGQ_V1_8822B 0x3
4844 #define BIT_QUEUEAC_MGQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8822B) << BIT_SHIFT_QUEUEAC_MGQ_V1_8822B)
4845 #define BIT_GET_QUEUEAC_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8822B) & BIT_MASK_QUEUEAC_MGQ_V1_8822B)
4847 #define BIT_TIDEMPTY_MGQ_V1_8822B BIT(22)
4849 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B 11
4850 #define BIT_MASK_TAIL_PKT_MGQ_V2_8822B 0x7ff
4851 #define BIT_TAIL_PKT_MGQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B)
4852 #define BIT_GET_TAIL_PKT_MGQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B)
4855 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B 0
4856 #define BIT_MASK_HEAD_PKT_MGQ_V1_8822B 0x7ff
4857 #define BIT_HEAD_PKT_MGQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B)
4858 #define BIT_GET_HEAD_PKT_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B)
4861 /* 2 REG_HIQ_INFO_8822B */
4863 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B 25
4864 #define BIT_MASK_QUEUEMACID_HIQ_V1_8822B 0x7f
4865 #define BIT_QUEUEMACID_HIQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B)
4866 #define BIT_GET_QUEUEMACID_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B)
4869 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8822B 23
4870 #define BIT_MASK_QUEUEAC_HIQ_V1_8822B 0x3
4871 #define BIT_QUEUEAC_HIQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8822B) << BIT_SHIFT_QUEUEAC_HIQ_V1_8822B)
4872 #define BIT_GET_QUEUEAC_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8822B) & BIT_MASK_QUEUEAC_HIQ_V1_8822B)
4874 #define BIT_TIDEMPTY_HIQ_V1_8822B BIT(22)
4876 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B 11
4877 #define BIT_MASK_TAIL_PKT_HIQ_V2_8822B 0x7ff
4878 #define BIT_TAIL_PKT_HIQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B)
4879 #define BIT_GET_TAIL_PKT_HIQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B)
4882 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B 0
4883 #define BIT_MASK_HEAD_PKT_HIQ_V1_8822B 0x7ff
4884 #define BIT_HEAD_PKT_HIQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B)
4885 #define BIT_GET_HEAD_PKT_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B)
4888 /* 2 REG_BCNQ_INFO_8822B */
4890 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B 0
4891 #define BIT_MASK_BCNQ_HEAD_PG_V1_8822B 0xfff
4892 #define BIT_BCNQ_HEAD_PG_V1_8822B(x) (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B) << BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B)
4893 #define BIT_GET_BCNQ_HEAD_PG_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B)
4896 /* 2 REG_TXPKT_EMPTY_8822B */
4897 #define BIT_BCNQ_EMPTY_8822B BIT(11)
4898 #define BIT_HQQ_EMPTY_8822B BIT(10)
4899 #define BIT_MQQ_EMPTY_8822B BIT(9)
4900 #define BIT_MGQ_CPU_EMPTY_8822B BIT(8)
4901 #define BIT_AC7Q_EMPTY_8822B BIT(7)
4902 #define BIT_AC6Q_EMPTY_8822B BIT(6)
4903 #define BIT_AC5Q_EMPTY_8822B BIT(5)
4904 #define BIT_AC4Q_EMPTY_8822B BIT(4)
4905 #define BIT_AC3Q_EMPTY_8822B BIT(3)
4906 #define BIT_AC2Q_EMPTY_8822B BIT(2)
4907 #define BIT_AC1Q_EMPTY_8822B BIT(1)
4908 #define BIT_AC0Q_EMPTY_8822B BIT(0)
4910 /* 2 REG_CPU_MGQ_INFO_8822B */
4911 #define BIT_BCN1_POLL_8822B BIT(30)
4912 #define BIT_CPUMGT_POLL_8822B BIT(29)
4913 #define BIT_BCN_POLL_8822B BIT(28)
4914 #define BIT_CPUMGQ_FW_NUM_V1_8822B BIT(12)
4916 #define BIT_SHIFT_FW_FREE_TAIL_V1_8822B 0
4917 #define BIT_MASK_FW_FREE_TAIL_V1_8822B 0xfff
4918 #define BIT_FW_FREE_TAIL_V1_8822B(x) (((x) & BIT_MASK_FW_FREE_TAIL_V1_8822B) << BIT_SHIFT_FW_FREE_TAIL_V1_8822B)
4919 #define BIT_GET_FW_FREE_TAIL_V1_8822B(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8822B) & BIT_MASK_FW_FREE_TAIL_V1_8822B)
4922 /* 2 REG_FWHW_TXQ_CTRL_8822B */
4923 #define BIT_RTS_LIMIT_IN_OFDM_8822B BIT(23)
4924 #define BIT_EN_BCNQ_DL_8822B BIT(22)
4925 #define BIT_EN_RD_RESP_NAV_BK_8822B BIT(21)
4926 #define BIT_EN_WR_FREE_TAIL_8822B BIT(20)
4928 #define BIT_SHIFT_EN_QUEUE_RPT_8822B 8
4929 #define BIT_MASK_EN_QUEUE_RPT_8822B 0xff
4930 #define BIT_EN_QUEUE_RPT_8822B(x) (((x) & BIT_MASK_EN_QUEUE_RPT_8822B) << BIT_SHIFT_EN_QUEUE_RPT_8822B)
4931 #define BIT_GET_EN_QUEUE_RPT_8822B(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8822B) & BIT_MASK_EN_QUEUE_RPT_8822B)
4933 #define BIT_EN_RTY_BK_8822B BIT(7)
4934 #define BIT_EN_USE_INI_RAT_8822B BIT(6)
4935 #define BIT_EN_RTS_NAV_BK_8822B BIT(5)
4936 #define BIT_DIS_SSN_CHECK_8822B BIT(4)
4937 #define BIT_MACID_MATCH_RTS_8822B BIT(3)
4938 #define BIT_EN_BCN_TRXRPT_V1_8822B BIT(2)
4939 #define BIT_EN_FTMACKRPT_8822B BIT(1)
4940 #define BIT_EN_FTMRPT_8822B BIT(0)
4942 /* 2 REG_DATAFB_SEL_8822B */
4943 #define BIT__R_EN_RTY_BK_COD_8822B BIT(2)
4945 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B 0
4946 #define BIT_MASK__R_DATA_FALLBACK_SEL_8822B 0x3
4947 #define BIT__R_DATA_FALLBACK_SEL_8822B(x) (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B) << BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B)
4948 #define BIT_GET__R_DATA_FALLBACK_SEL_8822B(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B)
4951 /* 2 REG_BCNQ_BDNY_V1_8822B */
4953 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8822B 0
4954 #define BIT_MASK_BCNQ_PGBNDY_V1_8822B 0xfff
4955 #define BIT_BCNQ_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8822B) << BIT_SHIFT_BCNQ_PGBNDY_V1_8822B)
4956 #define BIT_GET_BCNQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8822B) & BIT_MASK_BCNQ_PGBNDY_V1_8822B)
4959 /* 2 REG_LIFETIME_EN_8822B */
4960 #define BIT_BT_INT_CPU_8822B BIT(7)
4961 #define BIT_BT_INT_PTA_8822B BIT(6)
4962 #define BIT_EN_CTRL_RTYBIT_8822B BIT(4)
4963 #define BIT_LIFETIME_BK_EN_8822B BIT(3)
4964 #define BIT_LIFETIME_BE_EN_8822B BIT(2)
4965 #define BIT_LIFETIME_VI_EN_8822B BIT(1)
4966 #define BIT_LIFETIME_VO_EN_8822B BIT(0)
4968 /* 2 REG_SPEC_SIFS_8822B */
4970 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B 8
4971 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B 0xff
4972 #define BIT_SPEC_SIFS_OFDM_PTCL_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B) << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B)
4973 #define BIT_GET_SPEC_SIFS_OFDM_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B)
4976 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B 0
4977 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B 0xff
4978 #define BIT_SPEC_SIFS_CCK_PTCL_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B)
4979 #define BIT_GET_SPEC_SIFS_CCK_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B)
4982 /* 2 REG_RETRY_LIMIT_8822B */
4984 #define BIT_SHIFT_SRL_8822B 8
4985 #define BIT_MASK_SRL_8822B 0x3f
4986 #define BIT_SRL_8822B(x) (((x) & BIT_MASK_SRL_8822B) << BIT_SHIFT_SRL_8822B)
4987 #define BIT_GET_SRL_8822B(x) (((x) >> BIT_SHIFT_SRL_8822B) & BIT_MASK_SRL_8822B)
4990 #define BIT_SHIFT_LRL_8822B 0
4991 #define BIT_MASK_LRL_8822B 0x3f
4992 #define BIT_LRL_8822B(x) (((x) & BIT_MASK_LRL_8822B) << BIT_SHIFT_LRL_8822B)
4993 #define BIT_GET_LRL_8822B(x) (((x) >> BIT_SHIFT_LRL_8822B) & BIT_MASK_LRL_8822B)
4996 /* 2 REG_TXBF_CTRL_8822B */
4997 #define BIT_R_ENABLE_NDPA_8822B BIT(31)
4998 #define BIT_USE_NDPA_PARAMETER_8822B BIT(30)
4999 #define BIT_R_PROP_TXBF_8822B BIT(29)
5000 #define BIT_R_EN_NDPA_INT_8822B BIT(28)
5001 #define BIT_R_TXBF1_80M_8822B BIT(27)
5002 #define BIT_R_TXBF1_40M_8822B BIT(26)
5003 #define BIT_R_TXBF1_20M_8822B BIT(25)
5005 #define BIT_SHIFT_R_TXBF1_AID_8822B 16
5006 #define BIT_MASK_R_TXBF1_AID_8822B 0x1ff
5007 #define BIT_R_TXBF1_AID_8822B(x) (((x) & BIT_MASK_R_TXBF1_AID_8822B) << BIT_SHIFT_R_TXBF1_AID_8822B)
5008 #define BIT_GET_R_TXBF1_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8822B) & BIT_MASK_R_TXBF1_AID_8822B)
5010 #define BIT_DIS_NDP_BFEN_8822B BIT(15)
5011 #define BIT_R_TXBCN_NOBLOCK_NDP_8822B BIT(14)
5012 #define BIT_R_TXBF0_80M_8822B BIT(11)
5013 #define BIT_R_TXBF0_40M_8822B BIT(10)
5014 #define BIT_R_TXBF0_20M_8822B BIT(9)
5016 #define BIT_SHIFT_R_TXBF0_AID_8822B 0
5017 #define BIT_MASK_R_TXBF0_AID_8822B 0x1ff
5018 #define BIT_R_TXBF0_AID_8822B(x) (((x) & BIT_MASK_R_TXBF0_AID_8822B) << BIT_SHIFT_R_TXBF0_AID_8822B)
5019 #define BIT_GET_R_TXBF0_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8822B) & BIT_MASK_R_TXBF0_AID_8822B)
5022 /* 2 REG_DARFRC_8822B */
5024 #define BIT_SHIFT_DARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5025 #define BIT_MASK_DARF_RC8_8822B 0x1f
5026 #define BIT_DARF_RC8_8822B(x) (((x) & BIT_MASK_DARF_RC8_8822B) << BIT_SHIFT_DARF_RC8_8822B)
5027 #define BIT_GET_DARF_RC8_8822B(x) (((x) >> BIT_SHIFT_DARF_RC8_8822B) & BIT_MASK_DARF_RC8_8822B)
5030 #define BIT_SHIFT_DARF_RC7_8822B (48 & CPU_OPT_WIDTH)
5031 #define BIT_MASK_DARF_RC7_8822B 0x1f
5032 #define BIT_DARF_RC7_8822B(x) (((x) & BIT_MASK_DARF_RC7_8822B) << BIT_SHIFT_DARF_RC7_8822B)
5033 #define BIT_GET_DARF_RC7_8822B(x) (((x) >> BIT_SHIFT_DARF_RC7_8822B) & BIT_MASK_DARF_RC7_8822B)
5036 #define BIT_SHIFT_DARF_RC6_8822B (40 & CPU_OPT_WIDTH)
5037 #define BIT_MASK_DARF_RC6_8822B 0x1f
5038 #define BIT_DARF_RC6_8822B(x) (((x) & BIT_MASK_DARF_RC6_8822B) << BIT_SHIFT_DARF_RC6_8822B)
5039 #define BIT_GET_DARF_RC6_8822B(x) (((x) >> BIT_SHIFT_DARF_RC6_8822B) & BIT_MASK_DARF_RC6_8822B)
5042 #define BIT_SHIFT_DARF_RC5_8822B (32 & CPU_OPT_WIDTH)
5043 #define BIT_MASK_DARF_RC5_8822B 0x1f
5044 #define BIT_DARF_RC5_8822B(x) (((x) & BIT_MASK_DARF_RC5_8822B) << BIT_SHIFT_DARF_RC5_8822B)
5045 #define BIT_GET_DARF_RC5_8822B(x) (((x) >> BIT_SHIFT_DARF_RC5_8822B) & BIT_MASK_DARF_RC5_8822B)
5048 #define BIT_SHIFT_DARF_RC4_8822B 24
5049 #define BIT_MASK_DARF_RC4_8822B 0x1f
5050 #define BIT_DARF_RC4_8822B(x) (((x) & BIT_MASK_DARF_RC4_8822B) << BIT_SHIFT_DARF_RC4_8822B)
5051 #define BIT_GET_DARF_RC4_8822B(x) (((x) >> BIT_SHIFT_DARF_RC4_8822B) & BIT_MASK_DARF_RC4_8822B)
5054 #define BIT_SHIFT_DARF_RC3_8822B 16
5055 #define BIT_MASK_DARF_RC3_8822B 0x1f
5056 #define BIT_DARF_RC3_8822B(x) (((x) & BIT_MASK_DARF_RC3_8822B) << BIT_SHIFT_DARF_RC3_8822B)
5057 #define BIT_GET_DARF_RC3_8822B(x) (((x) >> BIT_SHIFT_DARF_RC3_8822B) & BIT_MASK_DARF_RC3_8822B)
5060 #define BIT_SHIFT_DARF_RC2_8822B 8
5061 #define BIT_MASK_DARF_RC2_8822B 0x1f
5062 #define BIT_DARF_RC2_8822B(x) (((x) & BIT_MASK_DARF_RC2_8822B) << BIT_SHIFT_DARF_RC2_8822B)
5063 #define BIT_GET_DARF_RC2_8822B(x) (((x) >> BIT_SHIFT_DARF_RC2_8822B) & BIT_MASK_DARF_RC2_8822B)
5066 #define BIT_SHIFT_DARF_RC1_8822B 0
5067 #define BIT_MASK_DARF_RC1_8822B 0x1f
5068 #define BIT_DARF_RC1_8822B(x) (((x) & BIT_MASK_DARF_RC1_8822B) << BIT_SHIFT_DARF_RC1_8822B)
5069 #define BIT_GET_DARF_RC1_8822B(x) (((x) >> BIT_SHIFT_DARF_RC1_8822B) & BIT_MASK_DARF_RC1_8822B)
5072 /* 2 REG_RARFRC_8822B */
5074 #define BIT_SHIFT_RARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5075 #define BIT_MASK_RARF_RC8_8822B 0x1f
5076 #define BIT_RARF_RC8_8822B(x) (((x) & BIT_MASK_RARF_RC8_8822B) << BIT_SHIFT_RARF_RC8_8822B)
5077 #define BIT_GET_RARF_RC8_8822B(x) (((x) >> BIT_SHIFT_RARF_RC8_8822B) & BIT_MASK_RARF_RC8_8822B)
5080 #define BIT_SHIFT_RARF_RC7_8822B (48 & CPU_OPT_WIDTH)
5081 #define BIT_MASK_RARF_RC7_8822B 0x1f
5082 #define BIT_RARF_RC7_8822B(x) (((x) & BIT_MASK_RARF_RC7_8822B) << BIT_SHIFT_RARF_RC7_8822B)
5083 #define BIT_GET_RARF_RC7_8822B(x) (((x) >> BIT_SHIFT_RARF_RC7_8822B) & BIT_MASK_RARF_RC7_8822B)
5086 #define BIT_SHIFT_RARF_RC6_8822B (40 & CPU_OPT_WIDTH)
5087 #define BIT_MASK_RARF_RC6_8822B 0x1f
5088 #define BIT_RARF_RC6_8822B(x) (((x) & BIT_MASK_RARF_RC6_8822B) << BIT_SHIFT_RARF_RC6_8822B)
5089 #define BIT_GET_RARF_RC6_8822B(x) (((x) >> BIT_SHIFT_RARF_RC6_8822B) & BIT_MASK_RARF_RC6_8822B)
5092 #define BIT_SHIFT_RARF_RC5_8822B (32 & CPU_OPT_WIDTH)
5093 #define BIT_MASK_RARF_RC5_8822B 0x1f
5094 #define BIT_RARF_RC5_8822B(x) (((x) & BIT_MASK_RARF_RC5_8822B) << BIT_SHIFT_RARF_RC5_8822B)
5095 #define BIT_GET_RARF_RC5_8822B(x) (((x) >> BIT_SHIFT_RARF_RC5_8822B) & BIT_MASK_RARF_RC5_8822B)
5098 #define BIT_SHIFT_RARF_RC4_8822B 24
5099 #define BIT_MASK_RARF_RC4_8822B 0x1f
5100 #define BIT_RARF_RC4_8822B(x) (((x) & BIT_MASK_RARF_RC4_8822B) << BIT_SHIFT_RARF_RC4_8822B)
5101 #define BIT_GET_RARF_RC4_8822B(x) (((x) >> BIT_SHIFT_RARF_RC4_8822B) & BIT_MASK_RARF_RC4_8822B)
5104 #define BIT_SHIFT_RARF_RC3_8822B 16
5105 #define BIT_MASK_RARF_RC3_8822B 0x1f
5106 #define BIT_RARF_RC3_8822B(x) (((x) & BIT_MASK_RARF_RC3_8822B) << BIT_SHIFT_RARF_RC3_8822B)
5107 #define BIT_GET_RARF_RC3_8822B(x) (((x) >> BIT_SHIFT_RARF_RC3_8822B) & BIT_MASK_RARF_RC3_8822B)
5110 #define BIT_SHIFT_RARF_RC2_8822B 8
5111 #define BIT_MASK_RARF_RC2_8822B 0x1f
5112 #define BIT_RARF_RC2_8822B(x) (((x) & BIT_MASK_RARF_RC2_8822B) << BIT_SHIFT_RARF_RC2_8822B)
5113 #define BIT_GET_RARF_RC2_8822B(x) (((x) >> BIT_SHIFT_RARF_RC2_8822B) & BIT_MASK_RARF_RC2_8822B)
5116 #define BIT_SHIFT_RARF_RC1_8822B 0
5117 #define BIT_MASK_RARF_RC1_8822B 0x1f
5118 #define BIT_RARF_RC1_8822B(x) (((x) & BIT_MASK_RARF_RC1_8822B) << BIT_SHIFT_RARF_RC1_8822B)
5119 #define BIT_GET_RARF_RC1_8822B(x) (((x) >> BIT_SHIFT_RARF_RC1_8822B) & BIT_MASK_RARF_RC1_8822B)
5122 /* 2 REG_RRSR_8822B */
5124 #define BIT_SHIFT_RRSR_RSC_8822B 21
5125 #define BIT_MASK_RRSR_RSC_8822B 0x3
5126 #define BIT_RRSR_RSC_8822B(x) (((x) & BIT_MASK_RRSR_RSC_8822B) << BIT_SHIFT_RRSR_RSC_8822B)
5127 #define BIT_GET_RRSR_RSC_8822B(x) (((x) >> BIT_SHIFT_RRSR_RSC_8822B) & BIT_MASK_RRSR_RSC_8822B)
5129 #define BIT_RRSR_BW_8822B BIT(20)
5131 #define BIT_SHIFT_RRSC_BITMAP_8822B 0
5132 #define BIT_MASK_RRSC_BITMAP_8822B 0xfffff
5133 #define BIT_RRSC_BITMAP_8822B(x) (((x) & BIT_MASK_RRSC_BITMAP_8822B) << BIT_SHIFT_RRSC_BITMAP_8822B)
5134 #define BIT_GET_RRSC_BITMAP_8822B(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8822B) & BIT_MASK_RRSC_BITMAP_8822B)
5137 /* 2 REG_ARFR0_8822B */
5139 #define BIT_SHIFT_ARFR0_V1_8822B 0
5140 #define BIT_MASK_ARFR0_V1_8822B 0xffffffffffffffffL
5141 #define BIT_ARFR0_V1_8822B(x) (((x) & BIT_MASK_ARFR0_V1_8822B) << BIT_SHIFT_ARFR0_V1_8822B)
5142 #define BIT_GET_ARFR0_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR0_V1_8822B) & BIT_MASK_ARFR0_V1_8822B)
5145 /* 2 REG_ARFR1_V1_8822B */
5147 #define BIT_SHIFT_ARFR1_V1_8822B 0
5148 #define BIT_MASK_ARFR1_V1_8822B 0xffffffffffffffffL
5149 #define BIT_ARFR1_V1_8822B(x) (((x) & BIT_MASK_ARFR1_V1_8822B) << BIT_SHIFT_ARFR1_V1_8822B)
5150 #define BIT_GET_ARFR1_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR1_V1_8822B) & BIT_MASK_ARFR1_V1_8822B)
5153 /* 2 REG_CCK_CHECK_8822B */
5154 #define BIT_CHECK_CCK_EN_8822B BIT(7)
5155 #define BIT_EN_BCN_PKT_REL_8822B BIT(6)
5156 #define BIT_BCN_PORT_SEL_8822B BIT(5)
5157 #define BIT_MOREDATA_BYPASS_8822B BIT(4)
5158 #define BIT_EN_CLR_CMD_REL_BCN_PKT_8822B BIT(3)
5159 #define BIT_R_EN_SET_MOREDATA_8822B BIT(2)
5160 #define BIT__R_DIS_CLEAR_MACID_RELEASE_8822B BIT(1)
5161 #define BIT__R_MACID_RELEASE_EN_8822B BIT(0)
5163 /* 2 REG_AMPDU_MAX_TIME_V1_8822B */
5165 #define BIT_SHIFT_AMPDU_MAX_TIME_8822B 0
5166 #define BIT_MASK_AMPDU_MAX_TIME_8822B 0xff
5167 #define BIT_AMPDU_MAX_TIME_8822B(x) (((x) & BIT_MASK_AMPDU_MAX_TIME_8822B) << BIT_SHIFT_AMPDU_MAX_TIME_8822B)
5168 #define BIT_GET_AMPDU_MAX_TIME_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8822B) & BIT_MASK_AMPDU_MAX_TIME_8822B)
5171 /* 2 REG_BCNQ1_BDNY_V1_8822B */
5173 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B 0
5174 #define BIT_MASK_BCNQ1_PGBNDY_V1_8822B 0xfff
5175 #define BIT_BCNQ1_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B) << BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B)
5176 #define BIT_GET_BCNQ1_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B)
5179 /* 2 REG_AMPDU_MAX_LENGTH_8822B */
5181 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8822B 0
5182 #define BIT_MASK_AMPDU_MAX_LENGTH_8822B 0xffffffffL
5183 #define BIT_AMPDU_MAX_LENGTH_8822B(x) (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8822B) << BIT_SHIFT_AMPDU_MAX_LENGTH_8822B)
5184 #define BIT_GET_AMPDU_MAX_LENGTH_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8822B) & BIT_MASK_AMPDU_MAX_LENGTH_8822B)
5187 /* 2 REG_ACQ_STOP_8822B */
5188 #define BIT_AC7Q_STOP_8822B BIT(7)
5189 #define BIT_AC6Q_STOP_8822B BIT(6)
5190 #define BIT_AC5Q_STOP_8822B BIT(5)
5191 #define BIT_AC4Q_STOP_8822B BIT(4)
5192 #define BIT_AC3Q_STOP_8822B BIT(3)
5193 #define BIT_AC2Q_STOP_8822B BIT(2)
5194 #define BIT_AC1Q_STOP_8822B BIT(1)
5195 #define BIT_AC0Q_STOP_8822B BIT(0)
5197 /* 2 REG_NDPA_RATE_8822B */
5199 #define BIT_SHIFT_R_NDPA_RATE_V1_8822B 0
5200 #define BIT_MASK_R_NDPA_RATE_V1_8822B 0xff
5201 #define BIT_R_NDPA_RATE_V1_8822B(x) (((x) & BIT_MASK_R_NDPA_RATE_V1_8822B) << BIT_SHIFT_R_NDPA_RATE_V1_8822B)
5202 #define BIT_GET_R_NDPA_RATE_V1_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8822B) & BIT_MASK_R_NDPA_RATE_V1_8822B)
5205 /* 2 REG_TX_HANG_CTRL_8822B */
5206 #define BIT_R_EN_GNT_BT_AWAKE_8822B BIT(3)
5207 #define BIT_EN_EOF_V1_8822B BIT(2)
5208 #define BIT_DIS_OQT_BLOCK_8822B BIT(1)
5209 #define BIT_SEARCH_QUEUE_EN_8822B BIT(0)
5211 /* 2 REG_NDPA_OPT_CTRL_8822B */
5212 #define BIT_R_DIS_MACID_RELEASE_RTY_8822B BIT(5)
5214 #define BIT_SHIFT_BW_SIGTA_8822B 3
5215 #define BIT_MASK_BW_SIGTA_8822B 0x3
5216 #define BIT_BW_SIGTA_8822B(x) (((x) & BIT_MASK_BW_SIGTA_8822B) << BIT_SHIFT_BW_SIGTA_8822B)
5217 #define BIT_GET_BW_SIGTA_8822B(x) (((x) >> BIT_SHIFT_BW_SIGTA_8822B) & BIT_MASK_BW_SIGTA_8822B)
5219 #define BIT_EN_BAR_SIGTA_8822B BIT(2)
5221 #define BIT_SHIFT_R_NDPA_BW_8822B 0
5222 #define BIT_MASK_R_NDPA_BW_8822B 0x3
5223 #define BIT_R_NDPA_BW_8822B(x) (((x) & BIT_MASK_R_NDPA_BW_8822B) << BIT_SHIFT_R_NDPA_BW_8822B)
5224 #define BIT_GET_R_NDPA_BW_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8822B) & BIT_MASK_R_NDPA_BW_8822B)
5227 /* 2 REG_RD_RESP_PKT_TH_8822B */
5229 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B 0
5230 #define BIT_MASK_RD_RESP_PKT_TH_V1_8822B 0x3f
5231 #define BIT_RD_RESP_PKT_TH_V1_8822B(x) (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B) << BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B)
5232 #define BIT_GET_RD_RESP_PKT_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B)
5235 /* 2 REG_CMDQ_INFO_8822B */
5237 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B 25
5238 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8822B 0x7f
5239 #define BIT_QUEUEMACID_CMDQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B)
5240 #define BIT_GET_QUEUEMACID_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B)
5243 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B 23
5244 #define BIT_MASK_QUEUEAC_CMDQ_V1_8822B 0x3
5245 #define BIT_QUEUEAC_CMDQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B) << BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B)
5246 #define BIT_GET_QUEUEAC_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B)
5248 #define BIT_TIDEMPTY_CMDQ_V1_8822B BIT(22)
5250 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B 11
5251 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8822B 0x7ff
5252 #define BIT_TAIL_PKT_CMDQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B)
5253 #define BIT_GET_TAIL_PKT_CMDQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B)
5256 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B 0
5257 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8822B 0x7ff
5258 #define BIT_HEAD_PKT_CMDQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B)
5259 #define BIT_GET_HEAD_PKT_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B)
5262 /* 2 REG_Q4_INFO_8822B */
5264 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8822B 25
5265 #define BIT_MASK_QUEUEMACID_Q4_V1_8822B 0x7f
5266 #define BIT_QUEUEMACID_Q4_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q4_V1_8822B)
5267 #define BIT_GET_QUEUEMACID_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8822B) & BIT_MASK_QUEUEMACID_Q4_V1_8822B)
5270 #define BIT_SHIFT_QUEUEAC_Q4_V1_8822B 23
5271 #define BIT_MASK_QUEUEAC_Q4_V1_8822B 0x3
5272 #define BIT_QUEUEAC_Q4_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q4_V1_8822B) << BIT_SHIFT_QUEUEAC_Q4_V1_8822B)
5273 #define BIT_GET_QUEUEAC_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8822B) & BIT_MASK_QUEUEAC_Q4_V1_8822B)
5275 #define BIT_TIDEMPTY_Q4_V1_8822B BIT(22)
5277 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8822B 11
5278 #define BIT_MASK_TAIL_PKT_Q4_V2_8822B 0x7ff
5279 #define BIT_TAIL_PKT_Q4_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q4_V2_8822B)
5280 #define BIT_GET_TAIL_PKT_Q4_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8822B) & BIT_MASK_TAIL_PKT_Q4_V2_8822B)
5283 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8822B 0
5284 #define BIT_MASK_HEAD_PKT_Q4_V1_8822B 0x7ff
5285 #define BIT_HEAD_PKT_Q4_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q4_V1_8822B)
5286 #define BIT_GET_HEAD_PKT_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8822B) & BIT_MASK_HEAD_PKT_Q4_V1_8822B)
5289 /* 2 REG_Q5_INFO_8822B */
5291 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8822B 25
5292 #define BIT_MASK_QUEUEMACID_Q5_V1_8822B 0x7f
5293 #define BIT_QUEUEMACID_Q5_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q5_V1_8822B)
5294 #define BIT_GET_QUEUEMACID_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8822B) & BIT_MASK_QUEUEMACID_Q5_V1_8822B)
5297 #define BIT_SHIFT_QUEUEAC_Q5_V1_8822B 23
5298 #define BIT_MASK_QUEUEAC_Q5_V1_8822B 0x3
5299 #define BIT_QUEUEAC_Q5_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q5_V1_8822B) << BIT_SHIFT_QUEUEAC_Q5_V1_8822B)
5300 #define BIT_GET_QUEUEAC_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8822B) & BIT_MASK_QUEUEAC_Q5_V1_8822B)
5302 #define BIT_TIDEMPTY_Q5_V1_8822B BIT(22)
5304 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8822B 11
5305 #define BIT_MASK_TAIL_PKT_Q5_V2_8822B 0x7ff
5306 #define BIT_TAIL_PKT_Q5_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q5_V2_8822B)
5307 #define BIT_GET_TAIL_PKT_Q5_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8822B) & BIT_MASK_TAIL_PKT_Q5_V2_8822B)
5310 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8822B 0
5311 #define BIT_MASK_HEAD_PKT_Q5_V1_8822B 0x7ff
5312 #define BIT_HEAD_PKT_Q5_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q5_V1_8822B)
5313 #define BIT_GET_HEAD_PKT_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8822B) & BIT_MASK_HEAD_PKT_Q5_V1_8822B)
5316 /* 2 REG_Q6_INFO_8822B */
5318 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8822B 25
5319 #define BIT_MASK_QUEUEMACID_Q6_V1_8822B 0x7f
5320 #define BIT_QUEUEMACID_Q6_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q6_V1_8822B)
5321 #define BIT_GET_QUEUEMACID_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8822B) & BIT_MASK_QUEUEMACID_Q6_V1_8822B)
5324 #define BIT_SHIFT_QUEUEAC_Q6_V1_8822B 23
5325 #define BIT_MASK_QUEUEAC_Q6_V1_8822B 0x3
5326 #define BIT_QUEUEAC_Q6_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q6_V1_8822B) << BIT_SHIFT_QUEUEAC_Q6_V1_8822B)
5327 #define BIT_GET_QUEUEAC_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8822B) & BIT_MASK_QUEUEAC_Q6_V1_8822B)
5329 #define BIT_TIDEMPTY_Q6_V1_8822B BIT(22)
5331 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8822B 11
5332 #define BIT_MASK_TAIL_PKT_Q6_V2_8822B 0x7ff
5333 #define BIT_TAIL_PKT_Q6_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q6_V2_8822B)
5334 #define BIT_GET_TAIL_PKT_Q6_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8822B) & BIT_MASK_TAIL_PKT_Q6_V2_8822B)
5337 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8822B 0
5338 #define BIT_MASK_HEAD_PKT_Q6_V1_8822B 0x7ff
5339 #define BIT_HEAD_PKT_Q6_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q6_V1_8822B)
5340 #define BIT_GET_HEAD_PKT_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8822B) & BIT_MASK_HEAD_PKT_Q6_V1_8822B)
5343 /* 2 REG_Q7_INFO_8822B */
5345 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8822B 25
5346 #define BIT_MASK_QUEUEMACID_Q7_V1_8822B 0x7f
5347 #define BIT_QUEUEMACID_Q7_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q7_V1_8822B)
5348 #define BIT_GET_QUEUEMACID_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8822B) & BIT_MASK_QUEUEMACID_Q7_V1_8822B)
5351 #define BIT_SHIFT_QUEUEAC_Q7_V1_8822B 23
5352 #define BIT_MASK_QUEUEAC_Q7_V1_8822B 0x3
5353 #define BIT_QUEUEAC_Q7_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q7_V1_8822B) << BIT_SHIFT_QUEUEAC_Q7_V1_8822B)
5354 #define BIT_GET_QUEUEAC_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8822B) & BIT_MASK_QUEUEAC_Q7_V1_8822B)
5356 #define BIT_TIDEMPTY_Q7_V1_8822B BIT(22)
5358 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8822B 11
5359 #define BIT_MASK_TAIL_PKT_Q7_V2_8822B 0x7ff
5360 #define BIT_TAIL_PKT_Q7_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q7_V2_8822B)
5361 #define BIT_GET_TAIL_PKT_Q7_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8822B) & BIT_MASK_TAIL_PKT_Q7_V2_8822B)
5364 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8822B 0
5365 #define BIT_MASK_HEAD_PKT_Q7_V1_8822B 0x7ff
5366 #define BIT_HEAD_PKT_Q7_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q7_V1_8822B)
5367 #define BIT_GET_HEAD_PKT_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8822B) & BIT_MASK_HEAD_PKT_Q7_V1_8822B)
5370 /* 2 REG_WMAC_LBK_BUF_HD_V1_8822B */
5372 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B 0
5373 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B 0xfff
5374 #define BIT_WMAC_LBK_BUF_HEAD_V1_8822B(x) (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B) << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B)
5375 #define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B)
5378 /* 2 REG_MGQ_BDNY_V1_8822B */
5380 #define BIT_SHIFT_MGQ_PGBNDY_V1_8822B 0
5381 #define BIT_MASK_MGQ_PGBNDY_V1_8822B 0xfff
5382 #define BIT_MGQ_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_MGQ_PGBNDY_V1_8822B) << BIT_SHIFT_MGQ_PGBNDY_V1_8822B)
5383 #define BIT_GET_MGQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8822B) & BIT_MASK_MGQ_PGBNDY_V1_8822B)
5386 /* 2 REG_TXRPT_CTRL_8822B */
5388 #define BIT_SHIFT_TRXRPT_TIMER_TH_8822B 24
5389 #define BIT_MASK_TRXRPT_TIMER_TH_8822B 0xff
5390 #define BIT_TRXRPT_TIMER_TH_8822B(x) (((x) & BIT_MASK_TRXRPT_TIMER_TH_8822B) << BIT_SHIFT_TRXRPT_TIMER_TH_8822B)
5391 #define BIT_GET_TRXRPT_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8822B) & BIT_MASK_TRXRPT_TIMER_TH_8822B)
5394 #define BIT_SHIFT_TRXRPT_LEN_TH_8822B 16
5395 #define BIT_MASK_TRXRPT_LEN_TH_8822B 0xff
5396 #define BIT_TRXRPT_LEN_TH_8822B(x) (((x) & BIT_MASK_TRXRPT_LEN_TH_8822B) << BIT_SHIFT_TRXRPT_LEN_TH_8822B)
5397 #define BIT_GET_TRXRPT_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8822B) & BIT_MASK_TRXRPT_LEN_TH_8822B)
5400 #define BIT_SHIFT_TRXRPT_READ_PTR_8822B 8
5401 #define BIT_MASK_TRXRPT_READ_PTR_8822B 0xff
5402 #define BIT_TRXRPT_READ_PTR_8822B(x) (((x) & BIT_MASK_TRXRPT_READ_PTR_8822B) << BIT_SHIFT_TRXRPT_READ_PTR_8822B)
5403 #define BIT_GET_TRXRPT_READ_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8822B) & BIT_MASK_TRXRPT_READ_PTR_8822B)
5406 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8822B 0
5407 #define BIT_MASK_TRXRPT_WRITE_PTR_8822B 0xff
5408 #define BIT_TRXRPT_WRITE_PTR_8822B(x) (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8822B) << BIT_SHIFT_TRXRPT_WRITE_PTR_8822B)
5409 #define BIT_GET_TRXRPT_WRITE_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8822B) & BIT_MASK_TRXRPT_WRITE_PTR_8822B)
5412 /* 2 REG_INIRTS_RATE_SEL_8822B */
5413 #define BIT_LEAG_RTS_BW_DUP_8822B BIT(5)
5415 /* 2 REG_BASIC_CFEND_RATE_8822B */
5417 #define BIT_SHIFT_BASIC_CFEND_RATE_8822B 0
5418 #define BIT_MASK_BASIC_CFEND_RATE_8822B 0x1f
5419 #define BIT_BASIC_CFEND_RATE_8822B(x) (((x) & BIT_MASK_BASIC_CFEND_RATE_8822B) << BIT_SHIFT_BASIC_CFEND_RATE_8822B)
5420 #define BIT_GET_BASIC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8822B) & BIT_MASK_BASIC_CFEND_RATE_8822B)
5423 /* 2 REG_STBC_CFEND_RATE_8822B */
5425 #define BIT_SHIFT_STBC_CFEND_RATE_8822B 0
5426 #define BIT_MASK_STBC_CFEND_RATE_8822B 0x1f
5427 #define BIT_STBC_CFEND_RATE_8822B(x) (((x) & BIT_MASK_STBC_CFEND_RATE_8822B) << BIT_SHIFT_STBC_CFEND_RATE_8822B)
5428 #define BIT_GET_STBC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8822B) & BIT_MASK_STBC_CFEND_RATE_8822B)
5431 /* 2 REG_DATA_SC_8822B */
5433 #define BIT_SHIFT_TXSC_40M_8822B 4
5434 #define BIT_MASK_TXSC_40M_8822B 0xf
5435 #define BIT_TXSC_40M_8822B(x) (((x) & BIT_MASK_TXSC_40M_8822B) << BIT_SHIFT_TXSC_40M_8822B)
5436 #define BIT_GET_TXSC_40M_8822B(x) (((x) >> BIT_SHIFT_TXSC_40M_8822B) & BIT_MASK_TXSC_40M_8822B)
5439 #define BIT_SHIFT_TXSC_20M_8822B 0
5440 #define BIT_MASK_TXSC_20M_8822B 0xf
5441 #define BIT_TXSC_20M_8822B(x) (((x) & BIT_MASK_TXSC_20M_8822B) << BIT_SHIFT_TXSC_20M_8822B)
5442 #define BIT_GET_TXSC_20M_8822B(x) (((x) >> BIT_SHIFT_TXSC_20M_8822B) & BIT_MASK_TXSC_20M_8822B)
5445 /* 2 REG_MACID_SLEEP3_8822B */
5447 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8822B 0
5448 #define BIT_MASK_MACID127_96_PKTSLEEP_8822B 0xffffffffL
5449 #define BIT_MACID127_96_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8822B) << BIT_SHIFT_MACID127_96_PKTSLEEP_8822B)
5450 #define BIT_GET_MACID127_96_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8822B) & BIT_MASK_MACID127_96_PKTSLEEP_8822B)
5453 /* 2 REG_MACID_SLEEP1_8822B */
5455 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8822B 0
5456 #define BIT_MASK_MACID63_32_PKTSLEEP_8822B 0xffffffffL
5457 #define BIT_MACID63_32_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8822B) << BIT_SHIFT_MACID63_32_PKTSLEEP_8822B)
5458 #define BIT_GET_MACID63_32_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8822B) & BIT_MASK_MACID63_32_PKTSLEEP_8822B)
5461 /* 2 REG_ARFR2_V1_8822B */
5463 #define BIT_SHIFT_ARFR2_V1_8822B 0
5464 #define BIT_MASK_ARFR2_V1_8822B 0xffffffffffffffffL
5465 #define BIT_ARFR2_V1_8822B(x) (((x) & BIT_MASK_ARFR2_V1_8822B) << BIT_SHIFT_ARFR2_V1_8822B)
5466 #define BIT_GET_ARFR2_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR2_V1_8822B) & BIT_MASK_ARFR2_V1_8822B)
5469 /* 2 REG_ARFR3_V1_8822B */
5471 #define BIT_SHIFT_ARFR3_V1_8822B 0
5472 #define BIT_MASK_ARFR3_V1_8822B 0xffffffffffffffffL
5473 #define BIT_ARFR3_V1_8822B(x) (((x) & BIT_MASK_ARFR3_V1_8822B) << BIT_SHIFT_ARFR3_V1_8822B)
5474 #define BIT_GET_ARFR3_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR3_V1_8822B) & BIT_MASK_ARFR3_V1_8822B)
5477 /* 2 REG_ARFR4_8822B */
5479 #define BIT_SHIFT_ARFR4_8822B 0
5480 #define BIT_MASK_ARFR4_8822B 0xffffffffffffffffL
5481 #define BIT_ARFR4_8822B(x) (((x) & BIT_MASK_ARFR4_8822B) << BIT_SHIFT_ARFR4_8822B)
5482 #define BIT_GET_ARFR4_8822B(x) (((x) >> BIT_SHIFT_ARFR4_8822B) & BIT_MASK_ARFR4_8822B)
5485 /* 2 REG_ARFR5_8822B */
5487 #define BIT_SHIFT_ARFR5_8822B 0
5488 #define BIT_MASK_ARFR5_8822B 0xffffffffffffffffL
5489 #define BIT_ARFR5_8822B(x) (((x) & BIT_MASK_ARFR5_8822B) << BIT_SHIFT_ARFR5_8822B)
5490 #define BIT_GET_ARFR5_8822B(x) (((x) >> BIT_SHIFT_ARFR5_8822B) & BIT_MASK_ARFR5_8822B)
5493 /* 2 REG_TXRPT_START_OFFSET_8822B */
5495 #define BIT_SHIFT_MACID_MURATE_OFFSET_8822B 24
5496 #define BIT_MASK_MACID_MURATE_OFFSET_8822B 0xff
5497 #define BIT_MACID_MURATE_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_MURATE_OFFSET_8822B) << BIT_SHIFT_MACID_MURATE_OFFSET_8822B)
5498 #define BIT_GET_MACID_MURATE_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8822B) & BIT_MASK_MACID_MURATE_OFFSET_8822B)
5500 #define BIT_RPTFIFO_SIZE_OPT_8822B BIT(16)
5502 #define BIT_SHIFT_MACID_CTRL_OFFSET_8822B 8
5503 #define BIT_MASK_MACID_CTRL_OFFSET_8822B 0xff
5504 #define BIT_MACID_CTRL_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_CTRL_OFFSET_8822B) << BIT_SHIFT_MACID_CTRL_OFFSET_8822B)
5505 #define BIT_GET_MACID_CTRL_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8822B) & BIT_MASK_MACID_CTRL_OFFSET_8822B)
5508 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B 0
5509 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8822B 0xff
5510 #define BIT_AMPDU_TXRPT_OFFSET_8822B(x) (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B) << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B)
5511 #define BIT_GET_AMPDU_TXRPT_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B)
5514 /* 2 REG_POWER_STAGE1_8822B */
5515 #define BIT_PTA_WL_PRI_MASK_CPU_MGQ_8822B BIT(31)
5516 #define BIT_PTA_WL_PRI_MASK_BCNQ_8822B BIT(30)
5517 #define BIT_PTA_WL_PRI_MASK_HIQ_8822B BIT(29)
5518 #define BIT_PTA_WL_PRI_MASK_MGQ_8822B BIT(28)
5519 #define BIT_PTA_WL_PRI_MASK_BK_8822B BIT(27)
5520 #define BIT_PTA_WL_PRI_MASK_BE_8822B BIT(26)
5521 #define BIT_PTA_WL_PRI_MASK_VI_8822B BIT(25)
5522 #define BIT_PTA_WL_PRI_MASK_VO_8822B BIT(24)
5524 #define BIT_SHIFT_POWER_STAGE1_8822B 0
5525 #define BIT_MASK_POWER_STAGE1_8822B 0xffffff
5526 #define BIT_POWER_STAGE1_8822B(x) (((x) & BIT_MASK_POWER_STAGE1_8822B) << BIT_SHIFT_POWER_STAGE1_8822B)
5527 #define BIT_GET_POWER_STAGE1_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8822B) & BIT_MASK_POWER_STAGE1_8822B)
5530 /* 2 REG_POWER_STAGE2_8822B */
5531 #define BIT__R_CTRL_PKT_POW_ADJ_8822B BIT(24)
5533 #define BIT_SHIFT_POWER_STAGE2_8822B 0
5534 #define BIT_MASK_POWER_STAGE2_8822B 0xffffff
5535 #define BIT_POWER_STAGE2_8822B(x) (((x) & BIT_MASK_POWER_STAGE2_8822B) << BIT_SHIFT_POWER_STAGE2_8822B)
5536 #define BIT_GET_POWER_STAGE2_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8822B) & BIT_MASK_POWER_STAGE2_8822B)
5539 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8822B */
5541 #define BIT_SHIFT_PAD_NUM_THRES_8822B 24
5542 #define BIT_MASK_PAD_NUM_THRES_8822B 0x3f
5543 #define BIT_PAD_NUM_THRES_8822B(x) (((x) & BIT_MASK_PAD_NUM_THRES_8822B) << BIT_SHIFT_PAD_NUM_THRES_8822B)
5544 #define BIT_GET_PAD_NUM_THRES_8822B(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8822B) & BIT_MASK_PAD_NUM_THRES_8822B)
5546 #define BIT_R_DMA_THIS_QUEUE_BK_8822B BIT(23)
5547 #define BIT_R_DMA_THIS_QUEUE_BE_8822B BIT(22)
5548 #define BIT_R_DMA_THIS_QUEUE_VI_8822B BIT(21)
5549 #define BIT_R_DMA_THIS_QUEUE_VO_8822B BIT(20)
5551 #define BIT_SHIFT_R_TOTAL_LEN_TH_8822B 8
5552 #define BIT_MASK_R_TOTAL_LEN_TH_8822B 0xfff
5553 #define BIT_R_TOTAL_LEN_TH_8822B(x) (((x) & BIT_MASK_R_TOTAL_LEN_TH_8822B) << BIT_SHIFT_R_TOTAL_LEN_TH_8822B)
5554 #define BIT_GET_R_TOTAL_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8822B) & BIT_MASK_R_TOTAL_LEN_TH_8822B)
5556 #define BIT_EN_NEW_EARLY_8822B BIT(7)
5557 #define BIT_PRE_TX_CMD_8822B BIT(6)
5559 #define BIT_SHIFT_NUM_SCL_EN_8822B 4
5560 #define BIT_MASK_NUM_SCL_EN_8822B 0x3
5561 #define BIT_NUM_SCL_EN_8822B(x) (((x) & BIT_MASK_NUM_SCL_EN_8822B) << BIT_SHIFT_NUM_SCL_EN_8822B)
5562 #define BIT_GET_NUM_SCL_EN_8822B(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8822B) & BIT_MASK_NUM_SCL_EN_8822B)
5564 #define BIT_BK_EN_8822B BIT(3)
5565 #define BIT_BE_EN_8822B BIT(2)
5566 #define BIT_VI_EN_8822B BIT(1)
5567 #define BIT_VO_EN_8822B BIT(0)
5569 /* 2 REG_PKT_LIFE_TIME_8822B */
5571 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8822B 16
5572 #define BIT_MASK_PKT_LIFTIME_BEBK_8822B 0xffff
5573 #define BIT_PKT_LIFTIME_BEBK_8822B(x) (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8822B) << BIT_SHIFT_PKT_LIFTIME_BEBK_8822B)
5574 #define BIT_GET_PKT_LIFTIME_BEBK_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8822B) & BIT_MASK_PKT_LIFTIME_BEBK_8822B)
5577 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8822B 0
5578 #define BIT_MASK_PKT_LIFTIME_VOVI_8822B 0xffff
5579 #define BIT_PKT_LIFTIME_VOVI_8822B(x) (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8822B) << BIT_SHIFT_PKT_LIFTIME_VOVI_8822B)
5580 #define BIT_GET_PKT_LIFTIME_VOVI_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8822B) & BIT_MASK_PKT_LIFTIME_VOVI_8822B)
5583 /* 2 REG_STBC_SETTING_8822B */
5585 #define BIT_SHIFT_CDEND_TXTIME_L_8822B 4
5586 #define BIT_MASK_CDEND_TXTIME_L_8822B 0xf
5587 #define BIT_CDEND_TXTIME_L_8822B(x) (((x) & BIT_MASK_CDEND_TXTIME_L_8822B) << BIT_SHIFT_CDEND_TXTIME_L_8822B)
5588 #define BIT_GET_CDEND_TXTIME_L_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8822B) & BIT_MASK_CDEND_TXTIME_L_8822B)
5591 #define BIT_SHIFT_NESS_8822B 2
5592 #define BIT_MASK_NESS_8822B 0x3
5593 #define BIT_NESS_8822B(x) (((x) & BIT_MASK_NESS_8822B) << BIT_SHIFT_NESS_8822B)
5594 #define BIT_GET_NESS_8822B(x) (((x) >> BIT_SHIFT_NESS_8822B) & BIT_MASK_NESS_8822B)
5597 #define BIT_SHIFT_STBC_CFEND_8822B 0
5598 #define BIT_MASK_STBC_CFEND_8822B 0x3
5599 #define BIT_STBC_CFEND_8822B(x) (((x) & BIT_MASK_STBC_CFEND_8822B) << BIT_SHIFT_STBC_CFEND_8822B)
5600 #define BIT_GET_STBC_CFEND_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_8822B) & BIT_MASK_STBC_CFEND_8822B)
5603 /* 2 REG_STBC_SETTING2_8822B */
5605 #define BIT_SHIFT_CDEND_TXTIME_H_8822B 0
5606 #define BIT_MASK_CDEND_TXTIME_H_8822B 0x1f
5607 #define BIT_CDEND_TXTIME_H_8822B(x) (((x) & BIT_MASK_CDEND_TXTIME_H_8822B) << BIT_SHIFT_CDEND_TXTIME_H_8822B)
5608 #define BIT_GET_CDEND_TXTIME_H_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8822B) & BIT_MASK_CDEND_TXTIME_H_8822B)
5611 /* 2 REG_QUEUE_CTRL_8822B */
5612 #define BIT_PTA_EDCCA_EN_8822B BIT(5)
5613 #define BIT_PTA_WL_TX_EN_8822B BIT(4)
5614 #define BIT_R_USE_DATA_BW_8822B BIT(3)
5615 #define BIT_TRI_PKT_INT_MODE1_8822B BIT(2)
5616 #define BIT_TRI_PKT_INT_MODE0_8822B BIT(1)
5617 #define BIT_ACQ_MODE_SEL_8822B BIT(0)
5619 /* 2 REG_SINGLE_AMPDU_CTRL_8822B */
5620 #define BIT_EN_SINGLE_APMDU_8822B BIT(7)
5622 /* 2 REG_PROT_MODE_CTRL_8822B */
5624 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8822B 24
5625 #define BIT_MASK_RTS_MAX_AGG_NUM_8822B 0x3f
5626 #define BIT_RTS_MAX_AGG_NUM_8822B(x) (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8822B) << BIT_SHIFT_RTS_MAX_AGG_NUM_8822B)
5627 #define BIT_GET_RTS_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8822B) & BIT_MASK_RTS_MAX_AGG_NUM_8822B)
5630 #define BIT_SHIFT_MAX_AGG_NUM_8822B 16
5631 #define BIT_MASK_MAX_AGG_NUM_8822B 0x3f
5632 #define BIT_MAX_AGG_NUM_8822B(x) (((x) & BIT_MASK_MAX_AGG_NUM_8822B) << BIT_SHIFT_MAX_AGG_NUM_8822B)
5633 #define BIT_GET_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8822B) & BIT_MASK_MAX_AGG_NUM_8822B)
5636 #define BIT_SHIFT_RTS_TXTIME_TH_8822B 8
5637 #define BIT_MASK_RTS_TXTIME_TH_8822B 0xff
5638 #define BIT_RTS_TXTIME_TH_8822B(x) (((x) & BIT_MASK_RTS_TXTIME_TH_8822B) << BIT_SHIFT_RTS_TXTIME_TH_8822B)
5639 #define BIT_GET_RTS_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8822B) & BIT_MASK_RTS_TXTIME_TH_8822B)
5642 #define BIT_SHIFT_RTS_LEN_TH_8822B 0
5643 #define BIT_MASK_RTS_LEN_TH_8822B 0xff
5644 #define BIT_RTS_LEN_TH_8822B(x) (((x) & BIT_MASK_RTS_LEN_TH_8822B) << BIT_SHIFT_RTS_LEN_TH_8822B)
5645 #define BIT_GET_RTS_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8822B) & BIT_MASK_RTS_LEN_TH_8822B)
5648 /* 2 REG_BAR_MODE_CTRL_8822B */
5650 #define BIT_SHIFT_BAR_RTY_LMT_8822B 16
5651 #define BIT_MASK_BAR_RTY_LMT_8822B 0x3
5652 #define BIT_BAR_RTY_LMT_8822B(x) (((x) & BIT_MASK_BAR_RTY_LMT_8822B) << BIT_SHIFT_BAR_RTY_LMT_8822B)
5653 #define BIT_GET_BAR_RTY_LMT_8822B(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8822B) & BIT_MASK_BAR_RTY_LMT_8822B)
5656 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B 8
5657 #define BIT_MASK_BAR_PKT_TXTIME_TH_8822B 0xff
5658 #define BIT_BAR_PKT_TXTIME_TH_8822B(x) (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B) << BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B)
5659 #define BIT_GET_BAR_PKT_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B)
5661 #define BIT_BAR_EN_V1_8822B BIT(6)
5663 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B 0
5664 #define BIT_MASK_BAR_PKTNUM_TH_V1_8822B 0x3f
5665 #define BIT_BAR_PKTNUM_TH_V1_8822B(x) (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B) << BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B)
5666 #define BIT_GET_BAR_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B)
5669 /* 2 REG_RA_TRY_RATE_AGG_LMT_8822B */
5671 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B 0
5672 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B 0x3f
5673 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8822B(x) (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B) << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B)
5674 #define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8822B(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B)
5677 /* 2 REG_MACID_SLEEP2_8822B */
5679 #define BIT_SHIFT_MACID95_64PKTSLEEP_8822B 0
5680 #define BIT_MASK_MACID95_64PKTSLEEP_8822B 0xffffffffL
5681 #define BIT_MACID95_64PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID95_64PKTSLEEP_8822B) << BIT_SHIFT_MACID95_64PKTSLEEP_8822B)
5682 #define BIT_GET_MACID95_64PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8822B) & BIT_MASK_MACID95_64PKTSLEEP_8822B)
5685 /* 2 REG_MACID_SLEEP_8822B */
5687 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8822B 0
5688 #define BIT_MASK_MACID31_0_PKTSLEEP_8822B 0xffffffffL
5689 #define BIT_MACID31_0_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8822B) << BIT_SHIFT_MACID31_0_PKTSLEEP_8822B)
5690 #define BIT_GET_MACID31_0_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8822B) & BIT_MASK_MACID31_0_PKTSLEEP_8822B)
5693 /* 2 REG_HW_SEQ0_8822B */
5695 #define BIT_SHIFT_HW_SSN_SEQ0_8822B 0
5696 #define BIT_MASK_HW_SSN_SEQ0_8822B 0xfff
5697 #define BIT_HW_SSN_SEQ0_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ0_8822B) << BIT_SHIFT_HW_SSN_SEQ0_8822B)
5698 #define BIT_GET_HW_SSN_SEQ0_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8822B) & BIT_MASK_HW_SSN_SEQ0_8822B)
5701 /* 2 REG_HW_SEQ1_8822B */
5703 #define BIT_SHIFT_HW_SSN_SEQ1_8822B 0
5704 #define BIT_MASK_HW_SSN_SEQ1_8822B 0xfff
5705 #define BIT_HW_SSN_SEQ1_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ1_8822B) << BIT_SHIFT_HW_SSN_SEQ1_8822B)
5706 #define BIT_GET_HW_SSN_SEQ1_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8822B) & BIT_MASK_HW_SSN_SEQ1_8822B)
5709 /* 2 REG_HW_SEQ2_8822B */
5711 #define BIT_SHIFT_HW_SSN_SEQ2_8822B 0
5712 #define BIT_MASK_HW_SSN_SEQ2_8822B 0xfff
5713 #define BIT_HW_SSN_SEQ2_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ2_8822B) << BIT_SHIFT_HW_SSN_SEQ2_8822B)
5714 #define BIT_GET_HW_SSN_SEQ2_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8822B) & BIT_MASK_HW_SSN_SEQ2_8822B)
5717 /* 2 REG_HW_SEQ3_8822B */
5719 #define BIT_SHIFT_HW_SSN_SEQ3_8822B 0
5720 #define BIT_MASK_HW_SSN_SEQ3_8822B 0xfff
5721 #define BIT_HW_SSN_SEQ3_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ3_8822B) << BIT_SHIFT_HW_SSN_SEQ3_8822B)
5722 #define BIT_GET_HW_SSN_SEQ3_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8822B) & BIT_MASK_HW_SSN_SEQ3_8822B)
5725 /* 2 REG_NULL_PKT_STATUS_V1_8822B */
5727 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B 2
5728 #define BIT_MASK_PTCL_TOTAL_PG_V2_8822B 0x3fff
5729 #define BIT_PTCL_TOTAL_PG_V2_8822B(x) (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B) << BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B)
5730 #define BIT_GET_PTCL_TOTAL_PG_V2_8822B(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B)
5732 #define BIT_TX_NULL_1_8822B BIT(1)
5733 #define BIT_TX_NULL_0_8822B BIT(0)
5735 /* 2 REG_PTCL_ERR_STATUS_8822B */
5736 #define BIT_PTCL_RATE_TABLE_INVALID_8822B BIT(7)
5737 #define BIT_FTM_T2R_ERROR_8822B BIT(6)
5738 #define BIT_PTCL_ERR0_8822B BIT(5)
5739 #define BIT_PTCL_ERR1_8822B BIT(4)
5740 #define BIT_PTCL_ERR2_8822B BIT(3)
5741 #define BIT_PTCL_ERR3_8822B BIT(2)
5742 #define BIT_PTCL_ERR4_8822B BIT(1)
5743 #define BIT_PTCL_ERR5_8822B BIT(0)
5745 /* 2 REG_NULL_PKT_STATUS_EXTEND_8822B */
5746 #define BIT_CLI3_TX_NULL_1_8822B BIT(7)
5747 #define BIT_CLI3_TX_NULL_0_8822B BIT(6)
5748 #define BIT_CLI2_TX_NULL_1_8822B BIT(5)
5749 #define BIT_CLI2_TX_NULL_0_8822B BIT(4)
5750 #define BIT_CLI1_TX_NULL_1_8822B BIT(3)
5751 #define BIT_CLI1_TX_NULL_0_8822B BIT(2)
5752 #define BIT_CLI0_TX_NULL_1_8822B BIT(1)
5753 #define BIT_CLI0_TX_NULL_0_8822B BIT(0)
5755 /* 2 REG_VIDEO_ENHANCEMENT_FUN_8822B */
5756 #define BIT_VIDEO_JUST_DROP_8822B BIT(1)
5757 #define BIT_VIDEO_ENHANCEMENT_FUN_EN_8822B BIT(0)
5759 /* 2 REG_BT_POLLUTE_PKT_CNT_8822B */
5761 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B 0
5762 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8822B 0xffff
5763 #define BIT_BT_POLLUTE_PKT_CNT_8822B(x) (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B) << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B)
5764 #define BIT_GET_BT_POLLUTE_PKT_CNT_8822B(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B)
5767 /* 2 REG_NOT_VALID_8822B */
5769 /* 2 REG_PTCL_DBG_8822B */
5771 #define BIT_SHIFT_PTCL_DBG_8822B 0
5772 #define BIT_MASK_PTCL_DBG_8822B 0xffffffffL
5773 #define BIT_PTCL_DBG_8822B(x) (((x) & BIT_MASK_PTCL_DBG_8822B) << BIT_SHIFT_PTCL_DBG_8822B)
5774 #define BIT_GET_PTCL_DBG_8822B(x) (((x) >> BIT_SHIFT_PTCL_DBG_8822B) & BIT_MASK_PTCL_DBG_8822B)
5777 /* 2 REG_NOT_VALID_8822B */
5779 /* 2 REG_CPUMGQ_TIMER_CTRL2_8822B */
5781 #define BIT_SHIFT_TRI_HEAD_ADDR_8822B 16
5782 #define BIT_MASK_TRI_HEAD_ADDR_8822B 0xfff
5783 #define BIT_TRI_HEAD_ADDR_8822B(x) (((x) & BIT_MASK_TRI_HEAD_ADDR_8822B) << BIT_SHIFT_TRI_HEAD_ADDR_8822B)
5784 #define BIT_GET_TRI_HEAD_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8822B) & BIT_MASK_TRI_HEAD_ADDR_8822B)
5786 #define BIT_DROP_TH_EN_8822B BIT(8)
5788 #define BIT_SHIFT_DROP_TH_8822B 0
5789 #define BIT_MASK_DROP_TH_8822B 0xff
5790 #define BIT_DROP_TH_8822B(x) (((x) & BIT_MASK_DROP_TH_8822B) << BIT_SHIFT_DROP_TH_8822B)
5791 #define BIT_GET_DROP_TH_8822B(x) (((x) >> BIT_SHIFT_DROP_TH_8822B) & BIT_MASK_DROP_TH_8822B)
5794 /* 2 REG_NOT_VALID_8822B */
5796 /* 2 REG_DUMMY_PAGE4_V1_8822B */
5797 #define BIT_BCN_EN_EXTHWSEQ_8822B BIT(1)
5798 #define BIT_BCN_EN_HWSEQ_8822B BIT(0)
5800 /* 2 REG_MOREDATA_8822B */
5801 #define BIT_MOREDATA_CTRL2_EN_V1_8822B BIT(3)
5802 #define BIT_MOREDATA_CTRL1_EN_V1_8822B BIT(2)
5803 #define BIT_PKTIN_MOREDATA_REPLACE_ENABLE_V1_8822B BIT(0)
5805 /* 2 REG_NOT_VALID_8822B */
5807 /* 2 REG_Q0_Q1_INFO_8822B */
5808 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
5810 #define BIT_SHIFT_GTAB_ID_8822B 28
5811 #define BIT_MASK_GTAB_ID_8822B 0x7
5812 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
5813 #define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
5816 #define BIT_SHIFT_AC1_PKT_INFO_8822B 16
5817 #define BIT_MASK_AC1_PKT_INFO_8822B 0xfff
5818 #define BIT_AC1_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC1_PKT_INFO_8822B) << BIT_SHIFT_AC1_PKT_INFO_8822B)
5819 #define BIT_GET_AC1_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8822B) & BIT_MASK_AC1_PKT_INFO_8822B)
5821 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
5823 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
5824 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
5825 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
5826 #define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
5829 #define BIT_SHIFT_AC0_PKT_INFO_8822B 0
5830 #define BIT_MASK_AC0_PKT_INFO_8822B 0xfff
5831 #define BIT_AC0_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC0_PKT_INFO_8822B) << BIT_SHIFT_AC0_PKT_INFO_8822B)
5832 #define BIT_GET_AC0_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8822B) & BIT_MASK_AC0_PKT_INFO_8822B)
5835 /* 2 REG_Q2_Q3_INFO_8822B */
5836 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
5838 #define BIT_SHIFT_GTAB_ID_8822B 28
5839 #define BIT_MASK_GTAB_ID_8822B 0x7
5840 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
5841 #define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
5844 #define BIT_SHIFT_AC3_PKT_INFO_8822B 16
5845 #define BIT_MASK_AC3_PKT_INFO_8822B 0xfff
5846 #define BIT_AC3_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC3_PKT_INFO_8822B) << BIT_SHIFT_AC3_PKT_INFO_8822B)
5847 #define BIT_GET_AC3_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8822B) & BIT_MASK_AC3_PKT_INFO_8822B)
5849 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
5851 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
5852 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
5853 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
5854 #define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
5857 #define BIT_SHIFT_AC2_PKT_INFO_8822B 0
5858 #define BIT_MASK_AC2_PKT_INFO_8822B 0xfff
5859 #define BIT_AC2_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC2_PKT_INFO_8822B) << BIT_SHIFT_AC2_PKT_INFO_8822B)
5860 #define BIT_GET_AC2_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8822B) & BIT_MASK_AC2_PKT_INFO_8822B)
5863 /* 2 REG_Q4_Q5_INFO_8822B */
5864 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
5866 #define BIT_SHIFT_GTAB_ID_8822B 28
5867 #define BIT_MASK_GTAB_ID_8822B 0x7
5868 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
5869 #define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
5872 #define BIT_SHIFT_AC5_PKT_INFO_8822B 16
5873 #define BIT_MASK_AC5_PKT_INFO_8822B 0xfff
5874 #define BIT_AC5_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC5_PKT_INFO_8822B) << BIT_SHIFT_AC5_PKT_INFO_8822B)
5875 #define BIT_GET_AC5_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8822B) & BIT_MASK_AC5_PKT_INFO_8822B)
5877 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
5879 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
5880 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
5881 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
5882 #define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
5885 #define BIT_SHIFT_AC4_PKT_INFO_8822B 0
5886 #define BIT_MASK_AC4_PKT_INFO_8822B 0xfff
5887 #define BIT_AC4_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC4_PKT_INFO_8822B) << BIT_SHIFT_AC4_PKT_INFO_8822B)
5888 #define BIT_GET_AC4_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8822B) & BIT_MASK_AC4_PKT_INFO_8822B)
5891 /* 2 REG_Q6_Q7_INFO_8822B */
5892 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
5894 #define BIT_SHIFT_GTAB_ID_8822B 28
5895 #define BIT_MASK_GTAB_ID_8822B 0x7
5896 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
5897 #define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
5900 #define BIT_SHIFT_AC7_PKT_INFO_8822B 16
5901 #define BIT_MASK_AC7_PKT_INFO_8822B 0xfff
5902 #define BIT_AC7_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC7_PKT_INFO_8822B) << BIT_SHIFT_AC7_PKT_INFO_8822B)
5903 #define BIT_GET_AC7_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8822B) & BIT_MASK_AC7_PKT_INFO_8822B)
5905 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
5907 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
5908 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
5909 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
5910 #define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
5913 #define BIT_SHIFT_AC6_PKT_INFO_8822B 0
5914 #define BIT_MASK_AC6_PKT_INFO_8822B 0xfff
5915 #define BIT_AC6_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC6_PKT_INFO_8822B) << BIT_SHIFT_AC6_PKT_INFO_8822B)
5916 #define BIT_GET_AC6_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8822B) & BIT_MASK_AC6_PKT_INFO_8822B)
5919 /* 2 REG_MGQ_HIQ_INFO_8822B */
5921 #define BIT_SHIFT_HIQ_PKT_INFO_8822B 16
5922 #define BIT_MASK_HIQ_PKT_INFO_8822B 0xfff
5923 #define BIT_HIQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_HIQ_PKT_INFO_8822B) << BIT_SHIFT_HIQ_PKT_INFO_8822B)
5924 #define BIT_GET_HIQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8822B) & BIT_MASK_HIQ_PKT_INFO_8822B)
5927 #define BIT_SHIFT_MGQ_PKT_INFO_8822B 0
5928 #define BIT_MASK_MGQ_PKT_INFO_8822B 0xfff
5929 #define BIT_MGQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_MGQ_PKT_INFO_8822B) << BIT_SHIFT_MGQ_PKT_INFO_8822B)
5930 #define BIT_GET_MGQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8822B) & BIT_MASK_MGQ_PKT_INFO_8822B)
5933 /* 2 REG_CMDQ_BCNQ_INFO_8822B */
5935 #define BIT_SHIFT_CMDQ_PKT_INFO_8822B 16
5936 #define BIT_MASK_CMDQ_PKT_INFO_8822B 0xfff
5937 #define BIT_CMDQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_CMDQ_PKT_INFO_8822B) << BIT_SHIFT_CMDQ_PKT_INFO_8822B)
5938 #define BIT_GET_CMDQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8822B) & BIT_MASK_CMDQ_PKT_INFO_8822B)
5941 #define BIT_SHIFT_BCNQ_PKT_INFO_8822B 0
5942 #define BIT_MASK_BCNQ_PKT_INFO_8822B 0xfff
5943 #define BIT_BCNQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_BCNQ_PKT_INFO_8822B) << BIT_SHIFT_BCNQ_PKT_INFO_8822B)
5944 #define BIT_GET_BCNQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8822B) & BIT_MASK_BCNQ_PKT_INFO_8822B)
5947 /* 2 REG_USEREG_SETTING_8822B */
5948 #define BIT_NDPA_USEREG_8822B BIT(21)
5950 #define BIT_SHIFT_RETRY_USEREG_8822B 19
5951 #define BIT_MASK_RETRY_USEREG_8822B 0x3
5952 #define BIT_RETRY_USEREG_8822B(x) (((x) & BIT_MASK_RETRY_USEREG_8822B) << BIT_SHIFT_RETRY_USEREG_8822B)
5953 #define BIT_GET_RETRY_USEREG_8822B(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8822B) & BIT_MASK_RETRY_USEREG_8822B)
5956 #define BIT_SHIFT_TRYPKT_USEREG_8822B 17
5957 #define BIT_MASK_TRYPKT_USEREG_8822B 0x3
5958 #define BIT_TRYPKT_USEREG_8822B(x) (((x) & BIT_MASK_TRYPKT_USEREG_8822B) << BIT_SHIFT_TRYPKT_USEREG_8822B)
5959 #define BIT_GET_TRYPKT_USEREG_8822B(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8822B) & BIT_MASK_TRYPKT_USEREG_8822B)
5961 #define BIT_CTLPKT_USEREG_8822B BIT(16)
5963 /* 2 REG_AESIV_SETTING_8822B */
5965 #define BIT_SHIFT_AESIV_OFFSET_8822B 0
5966 #define BIT_MASK_AESIV_OFFSET_8822B 0xfff
5967 #define BIT_AESIV_OFFSET_8822B(x) (((x) & BIT_MASK_AESIV_OFFSET_8822B) << BIT_SHIFT_AESIV_OFFSET_8822B)
5968 #define BIT_GET_AESIV_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8822B) & BIT_MASK_AESIV_OFFSET_8822B)
5971 /* 2 REG_BF0_TIME_SETTING_8822B */
5972 #define BIT_BF0_TIMER_SET_8822B BIT(31)
5973 #define BIT_BF0_TIMER_CLR_8822B BIT(30)
5974 #define BIT_BF0_UPDATE_EN_8822B BIT(29)
5975 #define BIT_BF0_TIMER_EN_8822B BIT(28)
5977 #define BIT_SHIFT_BF0_PRETIME_OVER_8822B 16
5978 #define BIT_MASK_BF0_PRETIME_OVER_8822B 0xfff
5979 #define BIT_BF0_PRETIME_OVER_8822B(x) (((x) & BIT_MASK_BF0_PRETIME_OVER_8822B) << BIT_SHIFT_BF0_PRETIME_OVER_8822B)
5980 #define BIT_GET_BF0_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8822B) & BIT_MASK_BF0_PRETIME_OVER_8822B)
5983 #define BIT_SHIFT_BF0_LIFETIME_8822B 0
5984 #define BIT_MASK_BF0_LIFETIME_8822B 0xffff
5985 #define BIT_BF0_LIFETIME_8822B(x) (((x) & BIT_MASK_BF0_LIFETIME_8822B) << BIT_SHIFT_BF0_LIFETIME_8822B)
5986 #define BIT_GET_BF0_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8822B) & BIT_MASK_BF0_LIFETIME_8822B)
5989 /* 2 REG_BF1_TIME_SETTING_8822B */
5990 #define BIT_BF1_TIMER_SET_8822B BIT(31)
5991 #define BIT_BF1_TIMER_CLR_8822B BIT(30)
5992 #define BIT_BF1_UPDATE_EN_8822B BIT(29)
5993 #define BIT_BF1_TIMER_EN_8822B BIT(28)
5995 #define BIT_SHIFT_BF1_PRETIME_OVER_8822B 16
5996 #define BIT_MASK_BF1_PRETIME_OVER_8822B 0xfff
5997 #define BIT_BF1_PRETIME_OVER_8822B(x) (((x) & BIT_MASK_BF1_PRETIME_OVER_8822B) << BIT_SHIFT_BF1_PRETIME_OVER_8822B)
5998 #define BIT_GET_BF1_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8822B) & BIT_MASK_BF1_PRETIME_OVER_8822B)
6001 #define BIT_SHIFT_BF1_LIFETIME_8822B 0
6002 #define BIT_MASK_BF1_LIFETIME_8822B 0xffff
6003 #define BIT_BF1_LIFETIME_8822B(x) (((x) & BIT_MASK_BF1_LIFETIME_8822B) << BIT_SHIFT_BF1_LIFETIME_8822B)
6004 #define BIT_GET_BF1_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8822B) & BIT_MASK_BF1_LIFETIME_8822B)
6007 /* 2 REG_BF_TIMEOUT_EN_8822B */
6008 #define BIT_EN_VHT_LDPC_8822B BIT(9)
6009 #define BIT_EN_HT_LDPC_8822B BIT(8)
6010 #define BIT_BF1_TIMEOUT_EN_8822B BIT(1)
6011 #define BIT_BF0_TIMEOUT_EN_8822B BIT(0)
6013 /* 2 REG_MACID_RELEASE0_8822B */
6015 #define BIT_SHIFT_MACID31_0_RELEASE_8822B 0
6016 #define BIT_MASK_MACID31_0_RELEASE_8822B 0xffffffffL
6017 #define BIT_MACID31_0_RELEASE_8822B(x) (((x) & BIT_MASK_MACID31_0_RELEASE_8822B) << BIT_SHIFT_MACID31_0_RELEASE_8822B)
6018 #define BIT_GET_MACID31_0_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8822B) & BIT_MASK_MACID31_0_RELEASE_8822B)
6021 /* 2 REG_MACID_RELEASE1_8822B */
6023 #define BIT_SHIFT_MACID63_32_RELEASE_8822B 0
6024 #define BIT_MASK_MACID63_32_RELEASE_8822B 0xffffffffL
6025 #define BIT_MACID63_32_RELEASE_8822B(x) (((x) & BIT_MASK_MACID63_32_RELEASE_8822B) << BIT_SHIFT_MACID63_32_RELEASE_8822B)
6026 #define BIT_GET_MACID63_32_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8822B) & BIT_MASK_MACID63_32_RELEASE_8822B)
6029 /* 2 REG_MACID_RELEASE2_8822B */
6031 #define BIT_SHIFT_MACID95_64_RELEASE_8822B 0
6032 #define BIT_MASK_MACID95_64_RELEASE_8822B 0xffffffffL
6033 #define BIT_MACID95_64_RELEASE_8822B(x) (((x) & BIT_MASK_MACID95_64_RELEASE_8822B) << BIT_SHIFT_MACID95_64_RELEASE_8822B)
6034 #define BIT_GET_MACID95_64_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8822B) & BIT_MASK_MACID95_64_RELEASE_8822B)
6037 /* 2 REG_MACID_RELEASE3_8822B */
6039 #define BIT_SHIFT_MACID127_96_RELEASE_8822B 0
6040 #define BIT_MASK_MACID127_96_RELEASE_8822B 0xffffffffL
6041 #define BIT_MACID127_96_RELEASE_8822B(x) (((x) & BIT_MASK_MACID127_96_RELEASE_8822B) << BIT_SHIFT_MACID127_96_RELEASE_8822B)
6042 #define BIT_GET_MACID127_96_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8822B) & BIT_MASK_MACID127_96_RELEASE_8822B)
6045 /* 2 REG_MACID_RELEASE_SETTING_8822B */
6046 #define BIT_MACID_VALUE_8822B BIT(7)
6048 #define BIT_SHIFT_MACID_OFFSET_8822B 0
6049 #define BIT_MASK_MACID_OFFSET_8822B 0x7f
6050 #define BIT_MACID_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_OFFSET_8822B) << BIT_SHIFT_MACID_OFFSET_8822B)
6051 #define BIT_GET_MACID_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8822B) & BIT_MASK_MACID_OFFSET_8822B)
6054 /* 2 REG_FAST_EDCA_VOVI_SETTING_8822B */
6056 #define BIT_SHIFT_VI_FAST_EDCA_TO_8822B 24
6057 #define BIT_MASK_VI_FAST_EDCA_TO_8822B 0xff
6058 #define BIT_VI_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_VI_FAST_EDCA_TO_8822B) << BIT_SHIFT_VI_FAST_EDCA_TO_8822B)
6059 #define BIT_GET_VI_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8822B) & BIT_MASK_VI_FAST_EDCA_TO_8822B)
6061 #define BIT_VI_THRESHOLD_SEL_8822B BIT(23)
6063 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B 16
6064 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B 0x7f
6065 #define BIT_VI_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B)
6066 #define BIT_GET_VI_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B)
6069 #define BIT_SHIFT_VO_FAST_EDCA_TO_8822B 8
6070 #define BIT_MASK_VO_FAST_EDCA_TO_8822B 0xff
6071 #define BIT_VO_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_VO_FAST_EDCA_TO_8822B) << BIT_SHIFT_VO_FAST_EDCA_TO_8822B)
6072 #define BIT_GET_VO_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8822B) & BIT_MASK_VO_FAST_EDCA_TO_8822B)
6074 #define BIT_VO_THRESHOLD_SEL_8822B BIT(7)
6076 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B 0
6077 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B 0x7f
6078 #define BIT_VO_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B)
6079 #define BIT_GET_VO_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B)
6082 /* 2 REG_FAST_EDCA_BEBK_SETTING_8822B */
6084 #define BIT_SHIFT_BK_FAST_EDCA_TO_8822B 24
6085 #define BIT_MASK_BK_FAST_EDCA_TO_8822B 0xff
6086 #define BIT_BK_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_BK_FAST_EDCA_TO_8822B) << BIT_SHIFT_BK_FAST_EDCA_TO_8822B)
6087 #define BIT_GET_BK_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8822B) & BIT_MASK_BK_FAST_EDCA_TO_8822B)
6089 #define BIT_BK_THRESHOLD_SEL_8822B BIT(23)
6091 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B 16
6092 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B 0x7f
6093 #define BIT_BK_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B)
6094 #define BIT_GET_BK_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B)
6097 #define BIT_SHIFT_BE_FAST_EDCA_TO_8822B 8
6098 #define BIT_MASK_BE_FAST_EDCA_TO_8822B 0xff
6099 #define BIT_BE_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_BE_FAST_EDCA_TO_8822B) << BIT_SHIFT_BE_FAST_EDCA_TO_8822B)
6100 #define BIT_GET_BE_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8822B) & BIT_MASK_BE_FAST_EDCA_TO_8822B)
6102 #define BIT_BE_THRESHOLD_SEL_8822B BIT(7)
6104 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B 0
6105 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B 0x7f
6106 #define BIT_BE_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B)
6107 #define BIT_GET_BE_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B)
6110 /* 2 REG_MACID_DROP0_8822B */
6112 #define BIT_SHIFT_MACID31_0_DROP_8822B 0
6113 #define BIT_MASK_MACID31_0_DROP_8822B 0xffffffffL
6114 #define BIT_MACID31_0_DROP_8822B(x) (((x) & BIT_MASK_MACID31_0_DROP_8822B) << BIT_SHIFT_MACID31_0_DROP_8822B)
6115 #define BIT_GET_MACID31_0_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8822B) & BIT_MASK_MACID31_0_DROP_8822B)
6118 /* 2 REG_MACID_DROP1_8822B */
6120 #define BIT_SHIFT_MACID63_32_DROP_8822B 0
6121 #define BIT_MASK_MACID63_32_DROP_8822B 0xffffffffL
6122 #define BIT_MACID63_32_DROP_8822B(x) (((x) & BIT_MASK_MACID63_32_DROP_8822B) << BIT_SHIFT_MACID63_32_DROP_8822B)
6123 #define BIT_GET_MACID63_32_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8822B) & BIT_MASK_MACID63_32_DROP_8822B)
6126 /* 2 REG_MACID_DROP2_8822B */
6128 #define BIT_SHIFT_MACID95_64_DROP_8822B 0
6129 #define BIT_MASK_MACID95_64_DROP_8822B 0xffffffffL
6130 #define BIT_MACID95_64_DROP_8822B(x) (((x) & BIT_MASK_MACID95_64_DROP_8822B) << BIT_SHIFT_MACID95_64_DROP_8822B)
6131 #define BIT_GET_MACID95_64_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8822B) & BIT_MASK_MACID95_64_DROP_8822B)
6134 /* 2 REG_MACID_DROP3_8822B */
6136 #define BIT_SHIFT_MACID127_96_DROP_8822B 0
6137 #define BIT_MASK_MACID127_96_DROP_8822B 0xffffffffL
6138 #define BIT_MACID127_96_DROP_8822B(x) (((x) & BIT_MASK_MACID127_96_DROP_8822B) << BIT_SHIFT_MACID127_96_DROP_8822B)
6139 #define BIT_GET_MACID127_96_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8822B) & BIT_MASK_MACID127_96_DROP_8822B)
6142 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8822B */
6144 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B 0
6145 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B 0xffffffffL
6146 #define BIT_R_MACID_RELEASE_SUCCESS_0_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B)
6147 #define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B)
6150 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8822B */
6152 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B 0
6153 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B 0xffffffffL
6154 #define BIT_R_MACID_RELEASE_SUCCESS_1_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B)
6155 #define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B)
6158 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8822B */
6160 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B 0
6161 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B 0xffffffffL
6162 #define BIT_R_MACID_RELEASE_SUCCESS_2_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B)
6163 #define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B)
6166 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8822B */
6168 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B 0
6169 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B 0xffffffffL
6170 #define BIT_R_MACID_RELEASE_SUCCESS_3_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B)
6171 #define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B)
6174 /* 2 REG_MGG_FIFO_CRTL_8822B */
6175 #define BIT_R_MGG_FIFO_EN_8822B BIT(31)
6177 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B 28
6178 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B 0x7
6179 #define BIT_R_MGG_FIFO_PG_SIZE_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B) << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B)
6180 #define BIT_GET_R_MGG_FIFO_PG_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B)
6183 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8822B 16
6184 #define BIT_MASK_R_MGG_FIFO_START_PG_8822B 0xfff
6185 #define BIT_R_MGG_FIFO_START_PG_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8822B) << BIT_SHIFT_R_MGG_FIFO_START_PG_8822B)
6186 #define BIT_GET_R_MGG_FIFO_START_PG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8822B) & BIT_MASK_R_MGG_FIFO_START_PG_8822B)
6189 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8822B 14
6190 #define BIT_MASK_R_MGG_FIFO_SIZE_8822B 0x3
6191 #define BIT_R_MGG_FIFO_SIZE_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8822B) << BIT_SHIFT_R_MGG_FIFO_SIZE_8822B)
6192 #define BIT_GET_R_MGG_FIFO_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_SIZE_8822B)
6194 #define BIT_R_MGG_FIFO_PAUSE_8822B BIT(13)
6196 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8822B 8
6197 #define BIT_MASK_R_MGG_FIFO_RPTR_8822B 0x1f
6198 #define BIT_R_MGG_FIFO_RPTR_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8822B) << BIT_SHIFT_R_MGG_FIFO_RPTR_8822B)
6199 #define BIT_GET_R_MGG_FIFO_RPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8822B) & BIT_MASK_R_MGG_FIFO_RPTR_8822B)
6201 #define BIT_R_MGG_FIFO_OV_8822B BIT(7)
6202 #define BIT_R_MGG_FIFO_WPTR_ERROR_8822B BIT(6)
6203 #define BIT_R_EN_CPU_LIFETIME_8822B BIT(5)
6205 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8822B 0
6206 #define BIT_MASK_R_MGG_FIFO_WPTR_8822B 0x1f
6207 #define BIT_R_MGG_FIFO_WPTR_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8822B) << BIT_SHIFT_R_MGG_FIFO_WPTR_8822B)
6208 #define BIT_GET_R_MGG_FIFO_WPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8822B) & BIT_MASK_R_MGG_FIFO_WPTR_8822B)
6211 /* 2 REG_MGG_FIFO_INT_8822B */
6213 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B 16
6214 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B 0xffff
6215 #define BIT_R_MGG_FIFO_INT_FLAG_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B) << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B)
6216 #define BIT_GET_R_MGG_FIFO_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B)
6219 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B 0
6220 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8822B 0xffff
6221 #define BIT_R_MGG_FIFO_INT_MASK_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B) << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B)
6222 #define BIT_GET_R_MGG_FIFO_INT_MASK_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B)
6225 /* 2 REG_MGG_FIFO_LIFETIME_8822B */
6227 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B 16
6228 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8822B 0xffff
6229 #define BIT_R_MGG_FIFO_LIFETIME_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B) << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B)
6230 #define BIT_GET_R_MGG_FIFO_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B)
6233 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B 0
6234 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B 0xffff
6235 #define BIT_R_MGG_FIFO_VALID_MAP_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B) << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B)
6236 #define BIT_GET_R_MGG_FIFO_VALID_MAP_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B)
6239 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B */
6241 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0
6242 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0x7f
6243 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
6244 #define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
6247 /* 2 REG_MACID_SHCUT_OFFSET_8822B */
6249 #define BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B 0
6250 #define BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B 0xff
6251 #define BIT_MACID_SHCUT_OFFSET_V1_8822B(x) (((x) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B) << BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B)
6252 #define BIT_GET_MACID_SHCUT_OFFSET_V1_8822B(x) (((x) >> BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B)
6255 /* 2 REG_MU_TX_CTL_8822B */
6256 #define BIT_R_EN_REVERS_GTAB_8822B BIT(6)
6258 #define BIT_SHIFT_R_MU_TABLE_VALID_8822B 0
6259 #define BIT_MASK_R_MU_TABLE_VALID_8822B 0x3f
6260 #define BIT_R_MU_TABLE_VALID_8822B(x) (((x) & BIT_MASK_R_MU_TABLE_VALID_8822B) << BIT_SHIFT_R_MU_TABLE_VALID_8822B)
6261 #define BIT_GET_R_MU_TABLE_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8822B) & BIT_MASK_R_MU_TABLE_VALID_8822B)
6264 /* 2 REG_MU_STA_GID_VLD_8822B */
6266 /* 2 REG_NOT_VALID_8822B */
6268 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
6269 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
6270 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
6271 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
6274 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
6275 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
6276 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
6277 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
6280 /* 2 REG_MU_STA_USER_POS_INFO_8822B */
6282 /* 2 REG_NOT_VALID_8822B */
6284 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
6285 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
6286 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
6287 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
6290 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
6291 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
6292 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
6293 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
6296 /* 2 REG_MU_TRX_DBG_CNT_8822B */
6297 #define BIT_MU_DNGCNT_RST_8822B BIT(20)
6299 #define BIT_SHIFT_MU_DBGCNT_SEL_8822B 16
6300 #define BIT_MASK_MU_DBGCNT_SEL_8822B 0xf
6301 #define BIT_MU_DBGCNT_SEL_8822B(x) (((x) & BIT_MASK_MU_DBGCNT_SEL_8822B) << BIT_SHIFT_MU_DBGCNT_SEL_8822B)
6302 #define BIT_GET_MU_DBGCNT_SEL_8822B(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8822B) & BIT_MASK_MU_DBGCNT_SEL_8822B)
6305 #define BIT_SHIFT_MU_DNGCNT_8822B 0
6306 #define BIT_MASK_MU_DNGCNT_8822B 0xffff
6307 #define BIT_MU_DNGCNT_8822B(x) (((x) & BIT_MASK_MU_DNGCNT_8822B) << BIT_SHIFT_MU_DNGCNT_8822B)
6308 #define BIT_GET_MU_DNGCNT_8822B(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8822B) & BIT_MASK_MU_DNGCNT_8822B)
6311 /* 2 REG_NOT_VALID_8822B */
6313 /* 2 REG_EDCA_VO_PARAM_8822B */
6315 #define BIT_SHIFT_TXOPLIMIT_8822B 16
6316 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
6317 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
6318 #define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
6321 #define BIT_SHIFT_CW_8822B 8
6322 #define BIT_MASK_CW_8822B 0xff
6323 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
6324 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
6327 #define BIT_SHIFT_AIFS_8822B 0
6328 #define BIT_MASK_AIFS_8822B 0xff
6329 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
6330 #define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
6333 /* 2 REG_EDCA_VI_PARAM_8822B */
6335 /* 2 REG_NOT_VALID_8822B */
6337 #define BIT_SHIFT_TXOPLIMIT_8822B 16
6338 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
6339 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
6340 #define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
6343 #define BIT_SHIFT_CW_8822B 8
6344 #define BIT_MASK_CW_8822B 0xff
6345 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
6346 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
6349 #define BIT_SHIFT_AIFS_8822B 0
6350 #define BIT_MASK_AIFS_8822B 0xff
6351 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
6352 #define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
6355 /* 2 REG_EDCA_BE_PARAM_8822B */
6357 /* 2 REG_NOT_VALID_8822B */
6359 #define BIT_SHIFT_TXOPLIMIT_8822B 16
6360 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
6361 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
6362 #define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
6365 #define BIT_SHIFT_CW_8822B 8
6366 #define BIT_MASK_CW_8822B 0xff
6367 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
6368 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
6371 #define BIT_SHIFT_AIFS_8822B 0
6372 #define BIT_MASK_AIFS_8822B 0xff
6373 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
6374 #define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
6377 /* 2 REG_EDCA_BK_PARAM_8822B */
6379 /* 2 REG_NOT_VALID_8822B */
6381 #define BIT_SHIFT_TXOPLIMIT_8822B 16
6382 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
6383 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
6384 #define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
6387 #define BIT_SHIFT_CW_8822B 8
6388 #define BIT_MASK_CW_8822B 0xff
6389 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
6390 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
6393 #define BIT_SHIFT_AIFS_8822B 0
6394 #define BIT_MASK_AIFS_8822B 0xff
6395 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
6396 #define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
6399 /* 2 REG_BCNTCFG_8822B */
6401 #define BIT_SHIFT_BCNCW_MAX_8822B 12
6402 #define BIT_MASK_BCNCW_MAX_8822B 0xf
6403 #define BIT_BCNCW_MAX_8822B(x) (((x) & BIT_MASK_BCNCW_MAX_8822B) << BIT_SHIFT_BCNCW_MAX_8822B)
6404 #define BIT_GET_BCNCW_MAX_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8822B) & BIT_MASK_BCNCW_MAX_8822B)
6407 #define BIT_SHIFT_BCNCW_MIN_8822B 8
6408 #define BIT_MASK_BCNCW_MIN_8822B 0xf
6409 #define BIT_BCNCW_MIN_8822B(x) (((x) & BIT_MASK_BCNCW_MIN_8822B) << BIT_SHIFT_BCNCW_MIN_8822B)
6410 #define BIT_GET_BCNCW_MIN_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8822B) & BIT_MASK_BCNCW_MIN_8822B)
6413 #define BIT_SHIFT_BCNIFS_8822B 0
6414 #define BIT_MASK_BCNIFS_8822B 0xff
6415 #define BIT_BCNIFS_8822B(x) (((x) & BIT_MASK_BCNIFS_8822B) << BIT_SHIFT_BCNIFS_8822B)
6416 #define BIT_GET_BCNIFS_8822B(x) (((x) >> BIT_SHIFT_BCNIFS_8822B) & BIT_MASK_BCNIFS_8822B)
6419 /* 2 REG_PIFS_8822B */
6421 #define BIT_SHIFT_PIFS_8822B 0
6422 #define BIT_MASK_PIFS_8822B 0xff
6423 #define BIT_PIFS_8822B(x) (((x) & BIT_MASK_PIFS_8822B) << BIT_SHIFT_PIFS_8822B)
6424 #define BIT_GET_PIFS_8822B(x) (((x) >> BIT_SHIFT_PIFS_8822B) & BIT_MASK_PIFS_8822B)
6427 /* 2 REG_RDG_PIFS_8822B */
6429 #define BIT_SHIFT_RDG_PIFS_8822B 0
6430 #define BIT_MASK_RDG_PIFS_8822B 0xff
6431 #define BIT_RDG_PIFS_8822B(x) (((x) & BIT_MASK_RDG_PIFS_8822B) << BIT_SHIFT_RDG_PIFS_8822B)
6432 #define BIT_GET_RDG_PIFS_8822B(x) (((x) >> BIT_SHIFT_RDG_PIFS_8822B) & BIT_MASK_RDG_PIFS_8822B)
6435 /* 2 REG_SIFS_8822B */
6437 #define BIT_SHIFT_SIFS_OFDM_TRX_8822B 24
6438 #define BIT_MASK_SIFS_OFDM_TRX_8822B 0xff
6439 #define BIT_SIFS_OFDM_TRX_8822B(x) (((x) & BIT_MASK_SIFS_OFDM_TRX_8822B) << BIT_SHIFT_SIFS_OFDM_TRX_8822B)
6440 #define BIT_GET_SIFS_OFDM_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8822B) & BIT_MASK_SIFS_OFDM_TRX_8822B)
6443 #define BIT_SHIFT_SIFS_CCK_TRX_8822B 16
6444 #define BIT_MASK_SIFS_CCK_TRX_8822B 0xff
6445 #define BIT_SIFS_CCK_TRX_8822B(x) (((x) & BIT_MASK_SIFS_CCK_TRX_8822B) << BIT_SHIFT_SIFS_CCK_TRX_8822B)
6446 #define BIT_GET_SIFS_CCK_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8822B) & BIT_MASK_SIFS_CCK_TRX_8822B)
6449 #define BIT_SHIFT_SIFS_OFDM_CTX_8822B 8
6450 #define BIT_MASK_SIFS_OFDM_CTX_8822B 0xff
6451 #define BIT_SIFS_OFDM_CTX_8822B(x) (((x) & BIT_MASK_SIFS_OFDM_CTX_8822B) << BIT_SHIFT_SIFS_OFDM_CTX_8822B)
6452 #define BIT_GET_SIFS_OFDM_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8822B) & BIT_MASK_SIFS_OFDM_CTX_8822B)
6455 #define BIT_SHIFT_SIFS_CCK_CTX_8822B 0
6456 #define BIT_MASK_SIFS_CCK_CTX_8822B 0xff
6457 #define BIT_SIFS_CCK_CTX_8822B(x) (((x) & BIT_MASK_SIFS_CCK_CTX_8822B) << BIT_SHIFT_SIFS_CCK_CTX_8822B)
6458 #define BIT_GET_SIFS_CCK_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8822B) & BIT_MASK_SIFS_CCK_CTX_8822B)
6461 /* 2 REG_TSFTR_SYN_OFFSET_8822B */
6463 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8822B 0
6464 #define BIT_MASK_TSFTR_SNC_OFFSET_8822B 0xffff
6465 #define BIT_TSFTR_SNC_OFFSET_8822B(x) (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8822B) << BIT_SHIFT_TSFTR_SNC_OFFSET_8822B)
6466 #define BIT_GET_TSFTR_SNC_OFFSET_8822B(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8822B) & BIT_MASK_TSFTR_SNC_OFFSET_8822B)
6469 /* 2 REG_AGGR_BREAK_TIME_8822B */
6471 #define BIT_SHIFT_AGGR_BK_TIME_8822B 0
6472 #define BIT_MASK_AGGR_BK_TIME_8822B 0xff
6473 #define BIT_AGGR_BK_TIME_8822B(x) (((x) & BIT_MASK_AGGR_BK_TIME_8822B) << BIT_SHIFT_AGGR_BK_TIME_8822B)
6474 #define BIT_GET_AGGR_BK_TIME_8822B(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8822B) & BIT_MASK_AGGR_BK_TIME_8822B)
6477 /* 2 REG_SLOT_8822B */
6479 #define BIT_SHIFT_SLOT_8822B 0
6480 #define BIT_MASK_SLOT_8822B 0xff
6481 #define BIT_SLOT_8822B(x) (((x) & BIT_MASK_SLOT_8822B) << BIT_SHIFT_SLOT_8822B)
6482 #define BIT_GET_SLOT_8822B(x) (((x) >> BIT_SHIFT_SLOT_8822B) & BIT_MASK_SLOT_8822B)
6485 /* 2 REG_TX_PTCL_CTRL_8822B */
6486 #define BIT_DIS_EDCCA_8822B BIT(15)
6487 #define BIT_DIS_CCA_8822B BIT(14)
6488 #define BIT_LSIG_TXOP_TXCMD_NAV_8822B BIT(13)
6489 #define BIT_SIFS_BK_EN_8822B BIT(12)
6491 #define BIT_SHIFT_TXQ_NAV_MSK_8822B 8
6492 #define BIT_MASK_TXQ_NAV_MSK_8822B 0xf
6493 #define BIT_TXQ_NAV_MSK_8822B(x) (((x) & BIT_MASK_TXQ_NAV_MSK_8822B) << BIT_SHIFT_TXQ_NAV_MSK_8822B)
6494 #define BIT_GET_TXQ_NAV_MSK_8822B(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8822B) & BIT_MASK_TXQ_NAV_MSK_8822B)
6496 #define BIT_DIS_CW_8822B BIT(7)
6497 #define BIT_NAV_END_TXOP_8822B BIT(6)
6498 #define BIT_RDG_END_TXOP_8822B BIT(5)
6499 #define BIT_AC_INBCN_HOLD_8822B BIT(4)
6500 #define BIT_MGTQ_TXOP_EN_8822B BIT(3)
6501 #define BIT_MGTQ_RTSMF_EN_8822B BIT(2)
6502 #define BIT_HIQ_RTSMF_EN_8822B BIT(1)
6503 #define BIT_BCN_RTSMF_EN_8822B BIT(0)
6505 /* 2 REG_TXPAUSE_8822B */
6506 #define BIT_STOP_BCN_HI_MGT_8822B BIT(7)
6507 #define BIT_MAC_STOPBCNQ_8822B BIT(6)
6508 #define BIT_MAC_STOPHIQ_8822B BIT(5)
6509 #define BIT_MAC_STOPMGQ_8822B BIT(4)
6510 #define BIT_MAC_STOPBK_8822B BIT(3)
6511 #define BIT_MAC_STOPBE_8822B BIT(2)
6512 #define BIT_MAC_STOPVI_8822B BIT(1)
6513 #define BIT_MAC_STOPVO_8822B BIT(0)
6515 /* 2 REG_DIS_TXREQ_CLR_8822B */
6516 #define BIT_DIS_BT_CCA_8822B BIT(7)
6517 #define BIT_DIS_TXREQ_CLR_HI_8822B BIT(5)
6518 #define BIT_DIS_TXREQ_CLR_MGQ_8822B BIT(4)
6519 #define BIT_DIS_TXREQ_CLR_VO_8822B BIT(3)
6520 #define BIT_DIS_TXREQ_CLR_VI_8822B BIT(2)
6521 #define BIT_DIS_TXREQ_CLR_BE_8822B BIT(1)
6522 #define BIT_DIS_TXREQ_CLR_BK_8822B BIT(0)
6524 /* 2 REG_RD_CTRL_8822B */
6525 #define BIT_EN_CLR_TXREQ_INCCA_8822B BIT(15)
6526 #define BIT_DIS_TX_OVER_BCNQ_8822B BIT(14)
6527 #define BIT_EN_BCNERR_INCCCA_8822B BIT(13)
6528 #define BIT_EDCCA_MSK_CNTDOWN_EN_8822B BIT(11)
6529 #define BIT_DIS_TXOP_CFE_8822B BIT(10)
6530 #define BIT_DIS_LSIG_CFE_8822B BIT(9)
6531 #define BIT_DIS_STBC_CFE_8822B BIT(8)
6532 #define BIT_BKQ_RD_INIT_EN_8822B BIT(7)
6533 #define BIT_BEQ_RD_INIT_EN_8822B BIT(6)
6534 #define BIT_VIQ_RD_INIT_EN_8822B BIT(5)
6535 #define BIT_VOQ_RD_INIT_EN_8822B BIT(4)
6536 #define BIT_BKQ_RD_RESP_EN_8822B BIT(3)
6537 #define BIT_BEQ_RD_RESP_EN_8822B BIT(2)
6538 #define BIT_VIQ_RD_RESP_EN_8822B BIT(1)
6539 #define BIT_VOQ_RD_RESP_EN_8822B BIT(0)
6541 /* 2 REG_MBSSID_CTRL_8822B */
6542 #define BIT_MBID_BCNQ7_EN_8822B BIT(7)
6543 #define BIT_MBID_BCNQ6_EN_8822B BIT(6)
6544 #define BIT_MBID_BCNQ5_EN_8822B BIT(5)
6545 #define BIT_MBID_BCNQ4_EN_8822B BIT(4)
6546 #define BIT_MBID_BCNQ3_EN_8822B BIT(3)
6547 #define BIT_MBID_BCNQ2_EN_8822B BIT(2)
6548 #define BIT_MBID_BCNQ1_EN_8822B BIT(1)
6549 #define BIT_MBID_BCNQ0_EN_8822B BIT(0)
6551 /* 2 REG_P2PPS_CTRL_8822B */
6552 #define BIT_P2P_CTW_ALLSTASLEEP_8822B BIT(7)
6553 #define BIT_P2P_OFF_DISTX_EN_8822B BIT(6)
6554 #define BIT_PWR_MGT_EN_8822B BIT(5)
6555 #define BIT_P2P_NOA1_EN_8822B BIT(2)
6556 #define BIT_P2P_NOA0_EN_8822B BIT(1)
6558 /* 2 REG_PKT_LIFETIME_CTRL_8822B */
6559 #define BIT_EN_P2P_CTWND1_8822B BIT(23)
6560 #define BIT_EN_BKF_CLR_TXREQ_8822B BIT(22)
6561 #define BIT_EN_TSFBIT32_RST_P2P_8822B BIT(21)
6562 #define BIT_EN_BCN_TX_BTCCA_8822B BIT(20)
6563 #define BIT_DIS_PKT_TX_ATIM_8822B BIT(19)
6564 #define BIT_DIS_BCN_DIS_CTN_8822B BIT(18)
6565 #define BIT_EN_NAVEND_RST_TXOP_8822B BIT(17)
6566 #define BIT_EN_FILTER_CCA_8822B BIT(16)
6568 #define BIT_SHIFT_CCA_FILTER_THRS_8822B 8
6569 #define BIT_MASK_CCA_FILTER_THRS_8822B 0xff
6570 #define BIT_CCA_FILTER_THRS_8822B(x) (((x) & BIT_MASK_CCA_FILTER_THRS_8822B) << BIT_SHIFT_CCA_FILTER_THRS_8822B)
6571 #define BIT_GET_CCA_FILTER_THRS_8822B(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8822B) & BIT_MASK_CCA_FILTER_THRS_8822B)
6574 #define BIT_SHIFT_EDCCA_THRS_8822B 0
6575 #define BIT_MASK_EDCCA_THRS_8822B 0xff
6576 #define BIT_EDCCA_THRS_8822B(x) (((x) & BIT_MASK_EDCCA_THRS_8822B) << BIT_SHIFT_EDCCA_THRS_8822B)
6577 #define BIT_GET_EDCCA_THRS_8822B(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8822B) & BIT_MASK_EDCCA_THRS_8822B)
6580 /* 2 REG_P2PPS_SPEC_STATE_8822B */
6581 #define BIT_SPEC_POWER_STATE_8822B BIT(7)
6582 #define BIT_SPEC_CTWINDOW_ON_8822B BIT(6)
6583 #define BIT_SPEC_BEACON_AREA_ON_8822B BIT(5)
6584 #define BIT_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
6585 #define BIT_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
6586 #define BIT_SPEC_FORCE_DOZE1_8822B BIT(2)
6587 #define BIT_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
6588 #define BIT_SPEC_FORCE_DOZE0_8822B BIT(0)
6590 /* 2 REG_BAR_TX_CTRL_8822B */
6592 /* 2 REG_NOT_VALID_8822B */
6594 #define BIT_SHIFT_P2PON_DIS_TXTIME_8822B 0
6595 #define BIT_MASK_P2PON_DIS_TXTIME_8822B 0xff
6596 #define BIT_P2PON_DIS_TXTIME_8822B(x) (((x) & BIT_MASK_P2PON_DIS_TXTIME_8822B) << BIT_SHIFT_P2PON_DIS_TXTIME_8822B)
6597 #define BIT_GET_P2PON_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8822B) & BIT_MASK_P2PON_DIS_TXTIME_8822B)
6600 /* 2 REG_QUEUE_INCOL_THR_8822B */
6602 #define BIT_SHIFT_BK_QUEUE_THR_8822B 24
6603 #define BIT_MASK_BK_QUEUE_THR_8822B 0xff
6604 #define BIT_BK_QUEUE_THR_8822B(x) (((x) & BIT_MASK_BK_QUEUE_THR_8822B) << BIT_SHIFT_BK_QUEUE_THR_8822B)
6605 #define BIT_GET_BK_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BK_QUEUE_THR_8822B) & BIT_MASK_BK_QUEUE_THR_8822B)
6608 #define BIT_SHIFT_BE_QUEUE_THR_8822B 16
6609 #define BIT_MASK_BE_QUEUE_THR_8822B 0xff
6610 #define BIT_BE_QUEUE_THR_8822B(x) (((x) & BIT_MASK_BE_QUEUE_THR_8822B) << BIT_SHIFT_BE_QUEUE_THR_8822B)
6611 #define BIT_GET_BE_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BE_QUEUE_THR_8822B) & BIT_MASK_BE_QUEUE_THR_8822B)
6614 #define BIT_SHIFT_VI_QUEUE_THR_8822B 8
6615 #define BIT_MASK_VI_QUEUE_THR_8822B 0xff
6616 #define BIT_VI_QUEUE_THR_8822B(x) (((x) & BIT_MASK_VI_QUEUE_THR_8822B) << BIT_SHIFT_VI_QUEUE_THR_8822B)
6617 #define BIT_GET_VI_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VI_QUEUE_THR_8822B) & BIT_MASK_VI_QUEUE_THR_8822B)
6620 #define BIT_SHIFT_VO_QUEUE_THR_8822B 0
6621 #define BIT_MASK_VO_QUEUE_THR_8822B 0xff
6622 #define BIT_VO_QUEUE_THR_8822B(x) (((x) & BIT_MASK_VO_QUEUE_THR_8822B) << BIT_SHIFT_VO_QUEUE_THR_8822B)
6623 #define BIT_GET_VO_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VO_QUEUE_THR_8822B) & BIT_MASK_VO_QUEUE_THR_8822B)
6626 /* 2 REG_QUEUE_INCOL_EN_8822B */
6627 #define BIT_QUEUE_INCOL_EN_8822B BIT(16)
6629 #define BIT_SHIFT_BE_TRIGGER_NUM_8822B 12
6630 #define BIT_MASK_BE_TRIGGER_NUM_8822B 0xf
6631 #define BIT_BE_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_BE_TRIGGER_NUM_8822B) << BIT_SHIFT_BE_TRIGGER_NUM_8822B)
6632 #define BIT_GET_BE_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BE_TRIGGER_NUM_8822B) & BIT_MASK_BE_TRIGGER_NUM_8822B)
6635 #define BIT_SHIFT_BK_TRIGGER_NUM_8822B 8
6636 #define BIT_MASK_BK_TRIGGER_NUM_8822B 0xf
6637 #define BIT_BK_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_BK_TRIGGER_NUM_8822B) << BIT_SHIFT_BK_TRIGGER_NUM_8822B)
6638 #define BIT_GET_BK_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BK_TRIGGER_NUM_8822B) & BIT_MASK_BK_TRIGGER_NUM_8822B)
6641 #define BIT_SHIFT_VI_TRIGGER_NUM_8822B 4
6642 #define BIT_MASK_VI_TRIGGER_NUM_8822B 0xf
6643 #define BIT_VI_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_VI_TRIGGER_NUM_8822B) << BIT_SHIFT_VI_TRIGGER_NUM_8822B)
6644 #define BIT_GET_VI_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VI_TRIGGER_NUM_8822B) & BIT_MASK_VI_TRIGGER_NUM_8822B)
6647 #define BIT_SHIFT_VO_TRIGGER_NUM_8822B 0
6648 #define BIT_MASK_VO_TRIGGER_NUM_8822B 0xf
6649 #define BIT_VO_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_VO_TRIGGER_NUM_8822B) << BIT_SHIFT_VO_TRIGGER_NUM_8822B)
6650 #define BIT_GET_VO_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VO_TRIGGER_NUM_8822B) & BIT_MASK_VO_TRIGGER_NUM_8822B)
6653 /* 2 REG_TBTT_PROHIBIT_8822B */
6655 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B 8
6656 #define BIT_MASK_TBTT_HOLD_TIME_AP_8822B 0xfff
6657 #define BIT_TBTT_HOLD_TIME_AP_8822B(x) (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B) << BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B)
6658 #define BIT_GET_TBTT_HOLD_TIME_AP_8822B(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B)
6661 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B 0
6662 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8822B 0xf
6663 #define BIT_TBTT_PROHIBIT_SETUP_8822B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B) << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B)
6664 #define BIT_GET_TBTT_PROHIBIT_SETUP_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B)
6667 /* 2 REG_P2PPS_STATE_8822B */
6668 #define BIT_POWER_STATE_8822B BIT(7)
6669 #define BIT_CTWINDOW_ON_8822B BIT(6)
6670 #define BIT_BEACON_AREA_ON_8822B BIT(5)
6671 #define BIT_CTWIN_EARLY_DISTX_8822B BIT(4)
6672 #define BIT_NOA1_OFF_PERIOD_8822B BIT(3)
6673 #define BIT_FORCE_DOZE1_8822B BIT(2)
6674 #define BIT_NOA0_OFF_PERIOD_8822B BIT(1)
6675 #define BIT_FORCE_DOZE0_8822B BIT(0)
6677 /* 2 REG_RD_NAV_NXT_8822B */
6679 #define BIT_SHIFT_RD_NAV_PROT_NXT_8822B 0
6680 #define BIT_MASK_RD_NAV_PROT_NXT_8822B 0xffff
6681 #define BIT_RD_NAV_PROT_NXT_8822B(x) (((x) & BIT_MASK_RD_NAV_PROT_NXT_8822B) << BIT_SHIFT_RD_NAV_PROT_NXT_8822B)
6682 #define BIT_GET_RD_NAV_PROT_NXT_8822B(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8822B) & BIT_MASK_RD_NAV_PROT_NXT_8822B)
6685 /* 2 REG_NAV_PROT_LEN_8822B */
6687 #define BIT_SHIFT_NAV_PROT_LEN_8822B 0
6688 #define BIT_MASK_NAV_PROT_LEN_8822B 0xffff
6689 #define BIT_NAV_PROT_LEN_8822B(x) (((x) & BIT_MASK_NAV_PROT_LEN_8822B) << BIT_SHIFT_NAV_PROT_LEN_8822B)
6690 #define BIT_GET_NAV_PROT_LEN_8822B(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8822B) & BIT_MASK_NAV_PROT_LEN_8822B)
6693 /* 2 REG_BCN_CTRL_8822B */
6694 #define BIT_DIS_RX_BSSID_FIT_8822B BIT(6)
6695 #define BIT_P0_EN_TXBCN_RPT_8822B BIT(5)
6696 #define BIT_DIS_TSF_UDT_8822B BIT(4)
6697 #define BIT_EN_BCN_FUNCTION_8822B BIT(3)
6698 #define BIT_P0_EN_RXBCN_RPT_8822B BIT(2)
6699 #define BIT_EN_P2P_CTWINDOW_8822B BIT(1)
6700 #define BIT_EN_P2P_BCNQ_AREA_8822B BIT(0)
6702 /* 2 REG_BCN_CTRL_CLINT0_8822B */
6703 #define BIT_CLI0_DIS_RX_BSSID_FIT_8822B BIT(6)
6704 #define BIT_CLI0_DIS_TSF_UDT_8822B BIT(4)
6705 #define BIT_CLI0_EN_BCN_FUNCTION_8822B BIT(3)
6706 #define BIT_CLI0_EN_RXBCN_RPT_8822B BIT(2)
6707 #define BIT_CLI0_ENP2P_CTWINDOW_8822B BIT(1)
6708 #define BIT_CLI0_ENP2P_BCNQ_AREA_8822B BIT(0)
6710 /* 2 REG_MBID_NUM_8822B */
6711 #define BIT_EN_PRE_DL_BEACON_8822B BIT(3)
6713 #define BIT_SHIFT_MBID_BCN_NUM_8822B 0
6714 #define BIT_MASK_MBID_BCN_NUM_8822B 0x7
6715 #define BIT_MBID_BCN_NUM_8822B(x) (((x) & BIT_MASK_MBID_BCN_NUM_8822B) << BIT_SHIFT_MBID_BCN_NUM_8822B)
6716 #define BIT_GET_MBID_BCN_NUM_8822B(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8822B) & BIT_MASK_MBID_BCN_NUM_8822B)
6719 /* 2 REG_DUAL_TSF_RST_8822B */
6720 #define BIT_FREECNT_RST_8822B BIT(5)
6721 #define BIT_TSFTR_CLI3_RST_8822B BIT(4)
6722 #define BIT_TSFTR_CLI2_RST_8822B BIT(3)
6723 #define BIT_TSFTR_CLI1_RST_8822B BIT(2)
6724 #define BIT_TSFTR_CLI0_RST_8822B BIT(1)
6725 #define BIT_TSFTR_RST_8822B BIT(0)
6727 /* 2 REG_MBSSID_BCN_SPACE_8822B */
6729 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B 28
6730 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8822B 0x7
6731 #define BIT_BCN_TIMER_SEL_FWRD_8822B(x) (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B) << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B)
6732 #define BIT_GET_BCN_TIMER_SEL_FWRD_8822B(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B)
6735 #define BIT_SHIFT_BCN_SPACE_CLINT0_8822B 16
6736 #define BIT_MASK_BCN_SPACE_CLINT0_8822B 0xfff
6737 #define BIT_BCN_SPACE_CLINT0_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT0_8822B) << BIT_SHIFT_BCN_SPACE_CLINT0_8822B)
6738 #define BIT_GET_BCN_SPACE_CLINT0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8822B) & BIT_MASK_BCN_SPACE_CLINT0_8822B)
6741 #define BIT_SHIFT_BCN_SPACE0_8822B 0
6742 #define BIT_MASK_BCN_SPACE0_8822B 0xffff
6743 #define BIT_BCN_SPACE0_8822B(x) (((x) & BIT_MASK_BCN_SPACE0_8822B) << BIT_SHIFT_BCN_SPACE0_8822B)
6744 #define BIT_GET_BCN_SPACE0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8822B) & BIT_MASK_BCN_SPACE0_8822B)
6747 /* 2 REG_DRVERLYINT_8822B */
6749 #define BIT_SHIFT_DRVERLYITV_8822B 0
6750 #define BIT_MASK_DRVERLYITV_8822B 0xff
6751 #define BIT_DRVERLYITV_8822B(x) (((x) & BIT_MASK_DRVERLYITV_8822B) << BIT_SHIFT_DRVERLYITV_8822B)
6752 #define BIT_GET_DRVERLYITV_8822B(x) (((x) >> BIT_SHIFT_DRVERLYITV_8822B) & BIT_MASK_DRVERLYITV_8822B)
6755 /* 2 REG_BCNDMATIM_8822B */
6757 #define BIT_SHIFT_BCNDMATIM_8822B 0
6758 #define BIT_MASK_BCNDMATIM_8822B 0xff
6759 #define BIT_BCNDMATIM_8822B(x) (((x) & BIT_MASK_BCNDMATIM_8822B) << BIT_SHIFT_BCNDMATIM_8822B)
6760 #define BIT_GET_BCNDMATIM_8822B(x) (((x) >> BIT_SHIFT_BCNDMATIM_8822B) & BIT_MASK_BCNDMATIM_8822B)
6763 /* 2 REG_ATIMWND_8822B */
6765 #define BIT_SHIFT_ATIMWND0_8822B 0
6766 #define BIT_MASK_ATIMWND0_8822B 0xffff
6767 #define BIT_ATIMWND0_8822B(x) (((x) & BIT_MASK_ATIMWND0_8822B) << BIT_SHIFT_ATIMWND0_8822B)
6768 #define BIT_GET_ATIMWND0_8822B(x) (((x) >> BIT_SHIFT_ATIMWND0_8822B) & BIT_MASK_ATIMWND0_8822B)
6771 /* 2 REG_USTIME_TSF_8822B */
6773 #define BIT_SHIFT_USTIME_TSF_V1_8822B 0
6774 #define BIT_MASK_USTIME_TSF_V1_8822B 0xff
6775 #define BIT_USTIME_TSF_V1_8822B(x) (((x) & BIT_MASK_USTIME_TSF_V1_8822B) << BIT_SHIFT_USTIME_TSF_V1_8822B)
6776 #define BIT_GET_USTIME_TSF_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8822B) & BIT_MASK_USTIME_TSF_V1_8822B)
6779 /* 2 REG_BCN_MAX_ERR_8822B */
6781 #define BIT_SHIFT_BCN_MAX_ERR_8822B 0
6782 #define BIT_MASK_BCN_MAX_ERR_8822B 0xff
6783 #define BIT_BCN_MAX_ERR_8822B(x) (((x) & BIT_MASK_BCN_MAX_ERR_8822B) << BIT_SHIFT_BCN_MAX_ERR_8822B)
6784 #define BIT_GET_BCN_MAX_ERR_8822B(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8822B) & BIT_MASK_BCN_MAX_ERR_8822B)
6787 /* 2 REG_RXTSF_OFFSET_CCK_8822B */
6789 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8822B 0
6790 #define BIT_MASK_CCK_RXTSF_OFFSET_8822B 0xff
6791 #define BIT_CCK_RXTSF_OFFSET_8822B(x) (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8822B) << BIT_SHIFT_CCK_RXTSF_OFFSET_8822B)
6792 #define BIT_GET_CCK_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8822B) & BIT_MASK_CCK_RXTSF_OFFSET_8822B)
6795 /* 2 REG_RXTSF_OFFSET_OFDM_8822B */
6797 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B 0
6798 #define BIT_MASK_OFDM_RXTSF_OFFSET_8822B 0xff
6799 #define BIT_OFDM_RXTSF_OFFSET_8822B(x) (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B) << BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B)
6800 #define BIT_GET_OFDM_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B)
6803 /* 2 REG_TSFTR_8822B */
6805 #define BIT_SHIFT_TSF_TIMER_8822B 0
6806 #define BIT_MASK_TSF_TIMER_8822B 0xffffffffffffffffL
6807 #define BIT_TSF_TIMER_8822B(x) (((x) & BIT_MASK_TSF_TIMER_8822B) << BIT_SHIFT_TSF_TIMER_8822B)
6808 #define BIT_GET_TSF_TIMER_8822B(x) (((x) >> BIT_SHIFT_TSF_TIMER_8822B) & BIT_MASK_TSF_TIMER_8822B)
6811 /* 2 REG_FREERUN_CNT_8822B */
6813 #define BIT_SHIFT_FREERUN_CNT_8822B 0
6814 #define BIT_MASK_FREERUN_CNT_8822B 0xffffffffffffffffL
6815 #define BIT_FREERUN_CNT_8822B(x) (((x) & BIT_MASK_FREERUN_CNT_8822B) << BIT_SHIFT_FREERUN_CNT_8822B)
6816 #define BIT_GET_FREERUN_CNT_8822B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_8822B) & BIT_MASK_FREERUN_CNT_8822B)
6819 /* 2 REG_ATIMWND1_V1_8822B */
6821 #define BIT_SHIFT_ATIMWND1_V1_8822B 0
6822 #define BIT_MASK_ATIMWND1_V1_8822B 0xff
6823 #define BIT_ATIMWND1_V1_8822B(x) (((x) & BIT_MASK_ATIMWND1_V1_8822B) << BIT_SHIFT_ATIMWND1_V1_8822B)
6824 #define BIT_GET_ATIMWND1_V1_8822B(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8822B) & BIT_MASK_ATIMWND1_V1_8822B)
6827 /* 2 REG_TBTT_PROHIBIT_INFRA_8822B */
6829 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B 0
6830 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8822B 0xff
6831 #define BIT_TBTT_PROHIBIT_INFRA_8822B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B) << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B)
6832 #define BIT_GET_TBTT_PROHIBIT_INFRA_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B)
6835 /* 2 REG_CTWND_8822B */
6837 #define BIT_SHIFT_CTWND_8822B 0
6838 #define BIT_MASK_CTWND_8822B 0xff
6839 #define BIT_CTWND_8822B(x) (((x) & BIT_MASK_CTWND_8822B) << BIT_SHIFT_CTWND_8822B)
6840 #define BIT_GET_CTWND_8822B(x) (((x) >> BIT_SHIFT_CTWND_8822B) & BIT_MASK_CTWND_8822B)
6843 /* 2 REG_BCNIVLCUNT_8822B */
6845 #define BIT_SHIFT_BCNIVLCUNT_8822B 0
6846 #define BIT_MASK_BCNIVLCUNT_8822B 0x7f
6847 #define BIT_BCNIVLCUNT_8822B(x) (((x) & BIT_MASK_BCNIVLCUNT_8822B) << BIT_SHIFT_BCNIVLCUNT_8822B)
6848 #define BIT_GET_BCNIVLCUNT_8822B(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8822B) & BIT_MASK_BCNIVLCUNT_8822B)
6851 /* 2 REG_BCNDROPCTRL_8822B */
6852 #define BIT_BEACON_DROP_EN_8822B BIT(7)
6854 #define BIT_SHIFT_BEACON_DROP_IVL_8822B 0
6855 #define BIT_MASK_BEACON_DROP_IVL_8822B 0x7f
6856 #define BIT_BEACON_DROP_IVL_8822B(x) (((x) & BIT_MASK_BEACON_DROP_IVL_8822B) << BIT_SHIFT_BEACON_DROP_IVL_8822B)
6857 #define BIT_GET_BEACON_DROP_IVL_8822B(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8822B) & BIT_MASK_BEACON_DROP_IVL_8822B)
6860 /* 2 REG_HGQ_TIMEOUT_PERIOD_8822B */
6862 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B 0
6863 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B 0xff
6864 #define BIT_HGQ_TIMEOUT_PERIOD_8822B(x) (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B) << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B)
6865 #define BIT_GET_HGQ_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B)
6868 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8822B */
6870 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B 0
6871 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B 0xff
6872 #define BIT_TXCMD_TIMEOUT_PERIOD_8822B(x) (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B) << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B)
6873 #define BIT_GET_TXCMD_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B)
6876 /* 2 REG_MISC_CTRL_8822B */
6877 #define BIT_DIS_TRX_CAL_BCN_8822B BIT(5)
6878 #define BIT_DIS_TX_CAL_TBTT_8822B BIT(4)
6879 #define BIT_EN_FREECNT_8822B BIT(3)
6880 #define BIT_BCN_AGGRESSION_8822B BIT(2)
6882 #define BIT_SHIFT_DIS_SECONDARY_CCA_8822B 0
6883 #define BIT_MASK_DIS_SECONDARY_CCA_8822B 0x3
6884 #define BIT_DIS_SECONDARY_CCA_8822B(x) (((x) & BIT_MASK_DIS_SECONDARY_CCA_8822B) << BIT_SHIFT_DIS_SECONDARY_CCA_8822B)
6885 #define BIT_GET_DIS_SECONDARY_CCA_8822B(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8822B) & BIT_MASK_DIS_SECONDARY_CCA_8822B)
6888 /* 2 REG_BCN_CTRL_CLINT1_8822B */
6889 #define BIT_CLI1_DIS_RX_BSSID_FIT_8822B BIT(6)
6890 #define BIT_CLI1_DIS_TSF_UDT_8822B BIT(4)
6891 #define BIT_CLI1_EN_BCN_FUNCTION_8822B BIT(3)
6892 #define BIT_CLI1_EN_RXBCN_RPT_8822B BIT(2)
6893 #define BIT_CLI1_ENP2P_CTWINDOW_8822B BIT(1)
6894 #define BIT_CLI1_ENP2P_BCNQ_AREA_8822B BIT(0)
6896 /* 2 REG_BCN_CTRL_CLINT2_8822B */
6897 #define BIT_CLI2_DIS_RX_BSSID_FIT_8822B BIT(6)
6898 #define BIT_CLI2_DIS_TSF_UDT_8822B BIT(4)
6899 #define BIT_CLI2_EN_BCN_FUNCTION_8822B BIT(3)
6900 #define BIT_CLI2_EN_RXBCN_RPT_8822B BIT(2)
6901 #define BIT_CLI2_ENP2P_CTWINDOW_8822B BIT(1)
6902 #define BIT_CLI2_ENP2P_BCNQ_AREA_8822B BIT(0)
6904 /* 2 REG_BCN_CTRL_CLINT3_8822B */
6905 #define BIT_CLI3_DIS_RX_BSSID_FIT_8822B BIT(6)
6906 #define BIT_CLI3_DIS_TSF_UDT_8822B BIT(4)
6907 #define BIT_CLI3_EN_BCN_FUNCTION_8822B BIT(3)
6908 #define BIT_CLI3_EN_RXBCN_RPT_8822B BIT(2)
6909 #define BIT_CLI3_ENP2P_CTWINDOW_8822B BIT(1)
6910 #define BIT_CLI3_ENP2P_BCNQ_AREA_8822B BIT(0)
6912 /* 2 REG_EXTEND_CTRL_8822B */
6913 #define BIT_EN_TSFBIT32_RST_P2P2_8822B BIT(5)
6914 #define BIT_EN_TSFBIT32_RST_P2P1_8822B BIT(4)
6916 #define BIT_SHIFT_PORT_SEL_8822B 0
6917 #define BIT_MASK_PORT_SEL_8822B 0x7
6918 #define BIT_PORT_SEL_8822B(x) (((x) & BIT_MASK_PORT_SEL_8822B) << BIT_SHIFT_PORT_SEL_8822B)
6919 #define BIT_GET_PORT_SEL_8822B(x) (((x) >> BIT_SHIFT_PORT_SEL_8822B) & BIT_MASK_PORT_SEL_8822B)
6922 /* 2 REG_P2PPS1_SPEC_STATE_8822B */
6923 #define BIT_P2P1_SPEC_POWER_STATE_8822B BIT(7)
6924 #define BIT_P2P1_SPEC_CTWINDOW_ON_8822B BIT(6)
6925 #define BIT_P2P1_SPEC_BCN_AREA_ON_8822B BIT(5)
6926 #define BIT_P2P1_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
6927 #define BIT_P2P1_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
6928 #define BIT_P2P1_SPEC_FORCE_DOZE1_8822B BIT(2)
6929 #define BIT_P2P1_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
6930 #define BIT_P2P1_SPEC_FORCE_DOZE0_8822B BIT(0)
6932 /* 2 REG_P2PPS1_STATE_8822B */
6933 #define BIT_P2P1_POWER_STATE_8822B BIT(7)
6934 #define BIT_P2P1_CTWINDOW_ON_8822B BIT(6)
6935 #define BIT_P2P1_BEACON_AREA_ON_8822B BIT(5)
6936 #define BIT_P2P1_CTWIN_EARLY_DISTX_8822B BIT(4)
6937 #define BIT_P2P1_NOA1_OFF_PERIOD_8822B BIT(3)
6938 #define BIT_P2P1_FORCE_DOZE1_8822B BIT(2)
6939 #define BIT_P2P1_NOA0_OFF_PERIOD_8822B BIT(1)
6940 #define BIT_P2P1_FORCE_DOZE0_8822B BIT(0)
6942 /* 2 REG_P2PPS2_SPEC_STATE_8822B */
6943 #define BIT_P2P2_SPEC_POWER_STATE_8822B BIT(7)
6944 #define BIT_P2P2_SPEC_CTWINDOW_ON_8822B BIT(6)
6945 #define BIT_P2P2_SPEC_BCN_AREA_ON_8822B BIT(5)
6946 #define BIT_P2P2_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
6947 #define BIT_P2P2_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
6948 #define BIT_P2P2_SPEC_FORCE_DOZE1_8822B BIT(2)
6949 #define BIT_P2P2_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
6950 #define BIT_P2P2_SPEC_FORCE_DOZE0_8822B BIT(0)
6952 /* 2 REG_P2PPS2_STATE_8822B */
6953 #define BIT_P2P2_POWER_STATE_8822B BIT(7)
6954 #define BIT_P2P2_CTWINDOW_ON_8822B BIT(6)
6955 #define BIT_P2P2_BEACON_AREA_ON_8822B BIT(5)
6956 #define BIT_P2P2_CTWIN_EARLY_DISTX_8822B BIT(4)
6957 #define BIT_P2P2_NOA1_OFF_PERIOD_8822B BIT(3)
6958 #define BIT_P2P2_FORCE_DOZE1_8822B BIT(2)
6959 #define BIT_P2P2_NOA0_OFF_PERIOD_8822B BIT(1)
6960 #define BIT_P2P2_FORCE_DOZE0_8822B BIT(0)
6962 /* 2 REG_PS_TIMER0_8822B */
6964 #define BIT_SHIFT_PSTIMER0_INT_8822B 5
6965 #define BIT_MASK_PSTIMER0_INT_8822B 0x7ffffff
6966 #define BIT_PSTIMER0_INT_8822B(x) (((x) & BIT_MASK_PSTIMER0_INT_8822B) << BIT_SHIFT_PSTIMER0_INT_8822B)
6967 #define BIT_GET_PSTIMER0_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8822B) & BIT_MASK_PSTIMER0_INT_8822B)
6970 /* 2 REG_PS_TIMER1_8822B */
6972 #define BIT_SHIFT_PSTIMER1_INT_8822B 5
6973 #define BIT_MASK_PSTIMER1_INT_8822B 0x7ffffff
6974 #define BIT_PSTIMER1_INT_8822B(x) (((x) & BIT_MASK_PSTIMER1_INT_8822B) << BIT_SHIFT_PSTIMER1_INT_8822B)
6975 #define BIT_GET_PSTIMER1_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8822B) & BIT_MASK_PSTIMER1_INT_8822B)
6978 /* 2 REG_PS_TIMER2_8822B */
6980 #define BIT_SHIFT_PSTIMER2_INT_8822B 5
6981 #define BIT_MASK_PSTIMER2_INT_8822B 0x7ffffff
6982 #define BIT_PSTIMER2_INT_8822B(x) (((x) & BIT_MASK_PSTIMER2_INT_8822B) << BIT_SHIFT_PSTIMER2_INT_8822B)
6983 #define BIT_GET_PSTIMER2_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8822B) & BIT_MASK_PSTIMER2_INT_8822B)
6986 /* 2 REG_TBTT_CTN_AREA_8822B */
6988 #define BIT_SHIFT_TBTT_CTN_AREA_8822B 0
6989 #define BIT_MASK_TBTT_CTN_AREA_8822B 0xff
6990 #define BIT_TBTT_CTN_AREA_8822B(x) (((x) & BIT_MASK_TBTT_CTN_AREA_8822B) << BIT_SHIFT_TBTT_CTN_AREA_8822B)
6991 #define BIT_GET_TBTT_CTN_AREA_8822B(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8822B) & BIT_MASK_TBTT_CTN_AREA_8822B)
6994 /* 2 REG_FORCE_BCN_IFS_8822B */
6996 #define BIT_SHIFT_FORCE_BCN_IFS_8822B 0
6997 #define BIT_MASK_FORCE_BCN_IFS_8822B 0xff
6998 #define BIT_FORCE_BCN_IFS_8822B(x) (((x) & BIT_MASK_FORCE_BCN_IFS_8822B) << BIT_SHIFT_FORCE_BCN_IFS_8822B)
6999 #define BIT_GET_FORCE_BCN_IFS_8822B(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8822B) & BIT_MASK_FORCE_BCN_IFS_8822B)
7002 /* 2 REG_TXOP_MIN_8822B */
7004 #define BIT_SHIFT_TXOP_MIN_8822B 0
7005 #define BIT_MASK_TXOP_MIN_8822B 0x3fff
7006 #define BIT_TXOP_MIN_8822B(x) (((x) & BIT_MASK_TXOP_MIN_8822B) << BIT_SHIFT_TXOP_MIN_8822B)
7007 #define BIT_GET_TXOP_MIN_8822B(x) (((x) >> BIT_SHIFT_TXOP_MIN_8822B) & BIT_MASK_TXOP_MIN_8822B)
7010 /* 2 REG_PRE_BKF_TIME_8822B */
7012 #define BIT_SHIFT_PRE_BKF_TIME_8822B 0
7013 #define BIT_MASK_PRE_BKF_TIME_8822B 0xff
7014 #define BIT_PRE_BKF_TIME_8822B(x) (((x) & BIT_MASK_PRE_BKF_TIME_8822B) << BIT_SHIFT_PRE_BKF_TIME_8822B)
7015 #define BIT_GET_PRE_BKF_TIME_8822B(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8822B) & BIT_MASK_PRE_BKF_TIME_8822B)
7018 /* 2 REG_CROSS_TXOP_CTRL_8822B */
7019 #define BIT_DTIM_BYPASS_8822B BIT(2)
7020 #define BIT_RTS_NAV_TXOP_8822B BIT(1)
7021 #define BIT_NOT_CROSS_TXOP_8822B BIT(0)
7023 /* 2 REG_ATIMWND2_8822B */
7025 #define BIT_SHIFT_ATIMWND2_8822B 0
7026 #define BIT_MASK_ATIMWND2_8822B 0xff
7027 #define BIT_ATIMWND2_8822B(x) (((x) & BIT_MASK_ATIMWND2_8822B) << BIT_SHIFT_ATIMWND2_8822B)
7028 #define BIT_GET_ATIMWND2_8822B(x) (((x) >> BIT_SHIFT_ATIMWND2_8822B) & BIT_MASK_ATIMWND2_8822B)
7031 /* 2 REG_ATIMWND3_8822B */
7033 #define BIT_SHIFT_ATIMWND3_8822B 0
7034 #define BIT_MASK_ATIMWND3_8822B 0xff
7035 #define BIT_ATIMWND3_8822B(x) (((x) & BIT_MASK_ATIMWND3_8822B) << BIT_SHIFT_ATIMWND3_8822B)
7036 #define BIT_GET_ATIMWND3_8822B(x) (((x) >> BIT_SHIFT_ATIMWND3_8822B) & BIT_MASK_ATIMWND3_8822B)
7039 /* 2 REG_ATIMWND4_8822B */
7041 #define BIT_SHIFT_ATIMWND4_8822B 0
7042 #define BIT_MASK_ATIMWND4_8822B 0xff
7043 #define BIT_ATIMWND4_8822B(x) (((x) & BIT_MASK_ATIMWND4_8822B) << BIT_SHIFT_ATIMWND4_8822B)
7044 #define BIT_GET_ATIMWND4_8822B(x) (((x) >> BIT_SHIFT_ATIMWND4_8822B) & BIT_MASK_ATIMWND4_8822B)
7047 /* 2 REG_ATIMWND5_8822B */
7049 #define BIT_SHIFT_ATIMWND5_8822B 0
7050 #define BIT_MASK_ATIMWND5_8822B 0xff
7051 #define BIT_ATIMWND5_8822B(x) (((x) & BIT_MASK_ATIMWND5_8822B) << BIT_SHIFT_ATIMWND5_8822B)
7052 #define BIT_GET_ATIMWND5_8822B(x) (((x) >> BIT_SHIFT_ATIMWND5_8822B) & BIT_MASK_ATIMWND5_8822B)
7055 /* 2 REG_ATIMWND6_8822B */
7057 #define BIT_SHIFT_ATIMWND6_8822B 0
7058 #define BIT_MASK_ATIMWND6_8822B 0xff
7059 #define BIT_ATIMWND6_8822B(x) (((x) & BIT_MASK_ATIMWND6_8822B) << BIT_SHIFT_ATIMWND6_8822B)
7060 #define BIT_GET_ATIMWND6_8822B(x) (((x) >> BIT_SHIFT_ATIMWND6_8822B) & BIT_MASK_ATIMWND6_8822B)
7063 /* 2 REG_ATIMWND7_8822B */
7065 #define BIT_SHIFT_ATIMWND7_8822B 0
7066 #define BIT_MASK_ATIMWND7_8822B 0xff
7067 #define BIT_ATIMWND7_8822B(x) (((x) & BIT_MASK_ATIMWND7_8822B) << BIT_SHIFT_ATIMWND7_8822B)
7068 #define BIT_GET_ATIMWND7_8822B(x) (((x) >> BIT_SHIFT_ATIMWND7_8822B) & BIT_MASK_ATIMWND7_8822B)
7071 /* 2 REG_ATIMUGT_8822B */
7073 #define BIT_SHIFT_ATIM_URGENT_8822B 0
7074 #define BIT_MASK_ATIM_URGENT_8822B 0xff
7075 #define BIT_ATIM_URGENT_8822B(x) (((x) & BIT_MASK_ATIM_URGENT_8822B) << BIT_SHIFT_ATIM_URGENT_8822B)
7076 #define BIT_GET_ATIM_URGENT_8822B(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8822B) & BIT_MASK_ATIM_URGENT_8822B)
7079 /* 2 REG_HIQ_NO_LMT_EN_8822B */
7080 #define BIT_HIQ_NO_LMT_EN_VAP7_8822B BIT(7)
7081 #define BIT_HIQ_NO_LMT_EN_VAP6_8822B BIT(6)
7082 #define BIT_HIQ_NO_LMT_EN_VAP5_8822B BIT(5)
7083 #define BIT_HIQ_NO_LMT_EN_VAP4_8822B BIT(4)
7084 #define BIT_HIQ_NO_LMT_EN_VAP3_8822B BIT(3)
7085 #define BIT_HIQ_NO_LMT_EN_VAP2_8822B BIT(2)
7086 #define BIT_HIQ_NO_LMT_EN_VAP1_8822B BIT(1)
7087 #define BIT_HIQ_NO_LMT_EN_ROOT_8822B BIT(0)
7089 /* 2 REG_DTIM_COUNTER_ROOT_8822B */
7091 #define BIT_SHIFT_DTIM_COUNT_ROOT_8822B 0
7092 #define BIT_MASK_DTIM_COUNT_ROOT_8822B 0xff
7093 #define BIT_DTIM_COUNT_ROOT_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_ROOT_8822B) << BIT_SHIFT_DTIM_COUNT_ROOT_8822B)
7094 #define BIT_GET_DTIM_COUNT_ROOT_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8822B) & BIT_MASK_DTIM_COUNT_ROOT_8822B)
7097 /* 2 REG_DTIM_COUNTER_VAP1_8822B */
7099 #define BIT_SHIFT_DTIM_COUNT_VAP1_8822B 0
7100 #define BIT_MASK_DTIM_COUNT_VAP1_8822B 0xff
7101 #define BIT_DTIM_COUNT_VAP1_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP1_8822B) << BIT_SHIFT_DTIM_COUNT_VAP1_8822B)
7102 #define BIT_GET_DTIM_COUNT_VAP1_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8822B) & BIT_MASK_DTIM_COUNT_VAP1_8822B)
7105 /* 2 REG_DTIM_COUNTER_VAP2_8822B */
7107 #define BIT_SHIFT_DTIM_COUNT_VAP2_8822B 0
7108 #define BIT_MASK_DTIM_COUNT_VAP2_8822B 0xff
7109 #define BIT_DTIM_COUNT_VAP2_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP2_8822B) << BIT_SHIFT_DTIM_COUNT_VAP2_8822B)
7110 #define BIT_GET_DTIM_COUNT_VAP2_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8822B) & BIT_MASK_DTIM_COUNT_VAP2_8822B)
7113 /* 2 REG_DTIM_COUNTER_VAP3_8822B */
7115 #define BIT_SHIFT_DTIM_COUNT_VAP3_8822B 0
7116 #define BIT_MASK_DTIM_COUNT_VAP3_8822B 0xff
7117 #define BIT_DTIM_COUNT_VAP3_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP3_8822B) << BIT_SHIFT_DTIM_COUNT_VAP3_8822B)
7118 #define BIT_GET_DTIM_COUNT_VAP3_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8822B) & BIT_MASK_DTIM_COUNT_VAP3_8822B)
7121 /* 2 REG_DTIM_COUNTER_VAP4_8822B */
7123 #define BIT_SHIFT_DTIM_COUNT_VAP4_8822B 0
7124 #define BIT_MASK_DTIM_COUNT_VAP4_8822B 0xff
7125 #define BIT_DTIM_COUNT_VAP4_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP4_8822B) << BIT_SHIFT_DTIM_COUNT_VAP4_8822B)
7126 #define BIT_GET_DTIM_COUNT_VAP4_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8822B) & BIT_MASK_DTIM_COUNT_VAP4_8822B)
7129 /* 2 REG_DTIM_COUNTER_VAP5_8822B */
7131 #define BIT_SHIFT_DTIM_COUNT_VAP5_8822B 0
7132 #define BIT_MASK_DTIM_COUNT_VAP5_8822B 0xff
7133 #define BIT_DTIM_COUNT_VAP5_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP5_8822B) << BIT_SHIFT_DTIM_COUNT_VAP5_8822B)
7134 #define BIT_GET_DTIM_COUNT_VAP5_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8822B) & BIT_MASK_DTIM_COUNT_VAP5_8822B)
7137 /* 2 REG_DTIM_COUNTER_VAP6_8822B */
7139 #define BIT_SHIFT_DTIM_COUNT_VAP6_8822B 0
7140 #define BIT_MASK_DTIM_COUNT_VAP6_8822B 0xff
7141 #define BIT_DTIM_COUNT_VAP6_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP6_8822B) << BIT_SHIFT_DTIM_COUNT_VAP6_8822B)
7142 #define BIT_GET_DTIM_COUNT_VAP6_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8822B) & BIT_MASK_DTIM_COUNT_VAP6_8822B)
7145 /* 2 REG_DTIM_COUNTER_VAP7_8822B */
7147 #define BIT_SHIFT_DTIM_COUNT_VAP7_8822B 0
7148 #define BIT_MASK_DTIM_COUNT_VAP7_8822B 0xff
7149 #define BIT_DTIM_COUNT_VAP7_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP7_8822B) << BIT_SHIFT_DTIM_COUNT_VAP7_8822B)
7150 #define BIT_GET_DTIM_COUNT_VAP7_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8822B) & BIT_MASK_DTIM_COUNT_VAP7_8822B)
7153 /* 2 REG_DIS_ATIM_8822B */
7154 #define BIT_DIS_ATIM_VAP7_8822B BIT(7)
7155 #define BIT_DIS_ATIM_VAP6_8822B BIT(6)
7156 #define BIT_DIS_ATIM_VAP5_8822B BIT(5)
7157 #define BIT_DIS_ATIM_VAP4_8822B BIT(4)
7158 #define BIT_DIS_ATIM_VAP3_8822B BIT(3)
7159 #define BIT_DIS_ATIM_VAP2_8822B BIT(2)
7160 #define BIT_DIS_ATIM_VAP1_8822B BIT(1)
7161 #define BIT_DIS_ATIM_ROOT_8822B BIT(0)
7163 /* 2 REG_EARLY_128US_8822B */
7165 #define BIT_SHIFT_TSFT_SEL_TIMER1_8822B 3
7166 #define BIT_MASK_TSFT_SEL_TIMER1_8822B 0x7
7167 #define BIT_TSFT_SEL_TIMER1_8822B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER1_8822B) << BIT_SHIFT_TSFT_SEL_TIMER1_8822B)
7168 #define BIT_GET_TSFT_SEL_TIMER1_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8822B) & BIT_MASK_TSFT_SEL_TIMER1_8822B)
7171 #define BIT_SHIFT_EARLY_128US_8822B 0
7172 #define BIT_MASK_EARLY_128US_8822B 0x7
7173 #define BIT_EARLY_128US_8822B(x) (((x) & BIT_MASK_EARLY_128US_8822B) << BIT_SHIFT_EARLY_128US_8822B)
7174 #define BIT_GET_EARLY_128US_8822B(x) (((x) >> BIT_SHIFT_EARLY_128US_8822B) & BIT_MASK_EARLY_128US_8822B)
7177 /* 2 REG_P2PPS1_CTRL_8822B */
7178 #define BIT_P2P1_CTW_ALLSTASLEEP_8822B BIT(7)
7179 #define BIT_P2P1_OFF_DISTX_EN_8822B BIT(6)
7180 #define BIT_P2P1_PWR_MGT_EN_8822B BIT(5)
7181 #define BIT_P2P1_NOA1_EN_8822B BIT(2)
7182 #define BIT_P2P1_NOA0_EN_8822B BIT(1)
7184 /* 2 REG_P2PPS2_CTRL_8822B */
7185 #define BIT_P2P2_CTW_ALLSTASLEEP_8822B BIT(7)
7186 #define BIT_P2P2_OFF_DISTX_EN_8822B BIT(6)
7187 #define BIT_P2P2_PWR_MGT_EN_8822B BIT(5)
7188 #define BIT_P2P2_NOA1_EN_8822B BIT(2)
7189 #define BIT_P2P2_NOA0_EN_8822B BIT(1)
7191 /* 2 REG_TIMER0_SRC_SEL_8822B */
7193 #define BIT_SHIFT_SYNC_CLI_SEL_8822B 4
7194 #define BIT_MASK_SYNC_CLI_SEL_8822B 0x7
7195 #define BIT_SYNC_CLI_SEL_8822B(x) (((x) & BIT_MASK_SYNC_CLI_SEL_8822B) << BIT_SHIFT_SYNC_CLI_SEL_8822B)
7196 #define BIT_GET_SYNC_CLI_SEL_8822B(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8822B) & BIT_MASK_SYNC_CLI_SEL_8822B)
7199 #define BIT_SHIFT_TSFT_SEL_TIMER0_8822B 0
7200 #define BIT_MASK_TSFT_SEL_TIMER0_8822B 0x7
7201 #define BIT_TSFT_SEL_TIMER0_8822B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER0_8822B) << BIT_SHIFT_TSFT_SEL_TIMER0_8822B)
7202 #define BIT_GET_TSFT_SEL_TIMER0_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8822B) & BIT_MASK_TSFT_SEL_TIMER0_8822B)
7205 /* 2 REG_NOA_UNIT_SEL_8822B */
7207 #define BIT_SHIFT_NOA_UNIT2_SEL_8822B 8
7208 #define BIT_MASK_NOA_UNIT2_SEL_8822B 0x7
7209 #define BIT_NOA_UNIT2_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT2_SEL_8822B) << BIT_SHIFT_NOA_UNIT2_SEL_8822B)
7210 #define BIT_GET_NOA_UNIT2_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8822B) & BIT_MASK_NOA_UNIT2_SEL_8822B)
7213 #define BIT_SHIFT_NOA_UNIT1_SEL_8822B 4
7214 #define BIT_MASK_NOA_UNIT1_SEL_8822B 0x7
7215 #define BIT_NOA_UNIT1_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT1_SEL_8822B) << BIT_SHIFT_NOA_UNIT1_SEL_8822B)
7216 #define BIT_GET_NOA_UNIT1_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8822B) & BIT_MASK_NOA_UNIT1_SEL_8822B)
7219 #define BIT_SHIFT_NOA_UNIT0_SEL_8822B 0
7220 #define BIT_MASK_NOA_UNIT0_SEL_8822B 0x7
7221 #define BIT_NOA_UNIT0_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT0_SEL_8822B) << BIT_SHIFT_NOA_UNIT0_SEL_8822B)
7222 #define BIT_GET_NOA_UNIT0_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8822B) & BIT_MASK_NOA_UNIT0_SEL_8822B)
7225 /* 2 REG_P2POFF_DIS_TXTIME_8822B */
7227 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8822B 0
7228 #define BIT_MASK_P2POFF_DIS_TXTIME_8822B 0xff
7229 #define BIT_P2POFF_DIS_TXTIME_8822B(x) (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8822B) << BIT_SHIFT_P2POFF_DIS_TXTIME_8822B)
7230 #define BIT_GET_P2POFF_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8822B) & BIT_MASK_P2POFF_DIS_TXTIME_8822B)
7233 /* 2 REG_MBSSID_BCN_SPACE2_8822B */
7235 #define BIT_SHIFT_BCN_SPACE_CLINT2_8822B 16
7236 #define BIT_MASK_BCN_SPACE_CLINT2_8822B 0xfff
7237 #define BIT_BCN_SPACE_CLINT2_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT2_8822B) << BIT_SHIFT_BCN_SPACE_CLINT2_8822B)
7238 #define BIT_GET_BCN_SPACE_CLINT2_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8822B) & BIT_MASK_BCN_SPACE_CLINT2_8822B)
7241 #define BIT_SHIFT_BCN_SPACE_CLINT1_8822B 0
7242 #define BIT_MASK_BCN_SPACE_CLINT1_8822B 0xfff
7243 #define BIT_BCN_SPACE_CLINT1_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT1_8822B) << BIT_SHIFT_BCN_SPACE_CLINT1_8822B)
7244 #define BIT_GET_BCN_SPACE_CLINT1_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8822B) & BIT_MASK_BCN_SPACE_CLINT1_8822B)
7247 /* 2 REG_MBSSID_BCN_SPACE3_8822B */
7249 #define BIT_SHIFT_SUB_BCN_SPACE_8822B 16
7250 #define BIT_MASK_SUB_BCN_SPACE_8822B 0xff
7251 #define BIT_SUB_BCN_SPACE_8822B(x) (((x) & BIT_MASK_SUB_BCN_SPACE_8822B) << BIT_SHIFT_SUB_BCN_SPACE_8822B)
7252 #define BIT_GET_SUB_BCN_SPACE_8822B(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8822B) & BIT_MASK_SUB_BCN_SPACE_8822B)
7255 #define BIT_SHIFT_BCN_SPACE_CLINT3_8822B 0
7256 #define BIT_MASK_BCN_SPACE_CLINT3_8822B 0xfff
7257 #define BIT_BCN_SPACE_CLINT3_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT3_8822B) << BIT_SHIFT_BCN_SPACE_CLINT3_8822B)
7258 #define BIT_GET_BCN_SPACE_CLINT3_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8822B) & BIT_MASK_BCN_SPACE_CLINT3_8822B)
7261 /* 2 REG_ACMHWCTRL_8822B */
7262 #define BIT_BEQ_ACM_STATUS_8822B BIT(7)
7263 #define BIT_VIQ_ACM_STATUS_8822B BIT(6)
7264 #define BIT_VOQ_ACM_STATUS_8822B BIT(5)
7265 #define BIT_BEQ_ACM_EN_8822B BIT(3)
7266 #define BIT_VIQ_ACM_EN_8822B BIT(2)
7267 #define BIT_VOQ_ACM_EN_8822B BIT(1)
7268 #define BIT_ACMHWEN_8822B BIT(0)
7270 /* 2 REG_ACMRSTCTRL_8822B */
7271 #define BIT_BE_ACM_RESET_USED_TIME_8822B BIT(2)
7272 #define BIT_VI_ACM_RESET_USED_TIME_8822B BIT(1)
7273 #define BIT_VO_ACM_RESET_USED_TIME_8822B BIT(0)
7275 /* 2 REG_ACMAVG_8822B */
7277 #define BIT_SHIFT_AVGPERIOD_8822B 0
7278 #define BIT_MASK_AVGPERIOD_8822B 0xffff
7279 #define BIT_AVGPERIOD_8822B(x) (((x) & BIT_MASK_AVGPERIOD_8822B) << BIT_SHIFT_AVGPERIOD_8822B)
7280 #define BIT_GET_AVGPERIOD_8822B(x) (((x) >> BIT_SHIFT_AVGPERIOD_8822B) & BIT_MASK_AVGPERIOD_8822B)
7283 /* 2 REG_VO_ADMTIME_8822B */
7285 #define BIT_SHIFT_VO_ADMITTED_TIME_8822B 0
7286 #define BIT_MASK_VO_ADMITTED_TIME_8822B 0xffff
7287 #define BIT_VO_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_VO_ADMITTED_TIME_8822B) << BIT_SHIFT_VO_ADMITTED_TIME_8822B)
7288 #define BIT_GET_VO_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8822B) & BIT_MASK_VO_ADMITTED_TIME_8822B)
7291 /* 2 REG_VI_ADMTIME_8822B */
7293 #define BIT_SHIFT_VI_ADMITTED_TIME_8822B 0
7294 #define BIT_MASK_VI_ADMITTED_TIME_8822B 0xffff
7295 #define BIT_VI_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_VI_ADMITTED_TIME_8822B) << BIT_SHIFT_VI_ADMITTED_TIME_8822B)
7296 #define BIT_GET_VI_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8822B) & BIT_MASK_VI_ADMITTED_TIME_8822B)
7299 /* 2 REG_BE_ADMTIME_8822B */
7301 #define BIT_SHIFT_BE_ADMITTED_TIME_8822B 0
7302 #define BIT_MASK_BE_ADMITTED_TIME_8822B 0xffff
7303 #define BIT_BE_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_BE_ADMITTED_TIME_8822B) << BIT_SHIFT_BE_ADMITTED_TIME_8822B)
7304 #define BIT_GET_BE_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8822B) & BIT_MASK_BE_ADMITTED_TIME_8822B)
7307 /* 2 REG_EDCA_RANDOM_GEN_8822B */
7309 #define BIT_SHIFT_RANDOM_GEN_8822B 0
7310 #define BIT_MASK_RANDOM_GEN_8822B 0xffffff
7311 #define BIT_RANDOM_GEN_8822B(x) (((x) & BIT_MASK_RANDOM_GEN_8822B) << BIT_SHIFT_RANDOM_GEN_8822B)
7312 #define BIT_GET_RANDOM_GEN_8822B(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8822B) & BIT_MASK_RANDOM_GEN_8822B)
7315 /* 2 REG_TXCMD_NOA_SEL_8822B */
7317 #define BIT_SHIFT_NOA_SEL_8822B 4
7318 #define BIT_MASK_NOA_SEL_8822B 0x7
7319 #define BIT_NOA_SEL_8822B(x) (((x) & BIT_MASK_NOA_SEL_8822B) << BIT_SHIFT_NOA_SEL_8822B)
7320 #define BIT_GET_NOA_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_SEL_8822B) & BIT_MASK_NOA_SEL_8822B)
7323 #define BIT_SHIFT_TXCMD_SEG_SEL_8822B 0
7324 #define BIT_MASK_TXCMD_SEG_SEL_8822B 0xf
7325 #define BIT_TXCMD_SEG_SEL_8822B(x) (((x) & BIT_MASK_TXCMD_SEG_SEL_8822B) << BIT_SHIFT_TXCMD_SEG_SEL_8822B)
7326 #define BIT_GET_TXCMD_SEG_SEL_8822B(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8822B) & BIT_MASK_TXCMD_SEG_SEL_8822B)
7329 /* 2 REG_NOA_PARAM_8822B */
7331 #define BIT_SHIFT_NOA_COUNT_8822B (96 & CPU_OPT_WIDTH)
7332 #define BIT_MASK_NOA_COUNT_8822B 0xff
7333 #define BIT_NOA_COUNT_8822B(x) (((x) & BIT_MASK_NOA_COUNT_8822B) << BIT_SHIFT_NOA_COUNT_8822B)
7334 #define BIT_GET_NOA_COUNT_8822B(x) (((x) >> BIT_SHIFT_NOA_COUNT_8822B) & BIT_MASK_NOA_COUNT_8822B)
7337 #define BIT_SHIFT_NOA_START_TIME_8822B (64 & CPU_OPT_WIDTH)
7338 #define BIT_MASK_NOA_START_TIME_8822B 0xffffffffL
7339 #define BIT_NOA_START_TIME_8822B(x) (((x) & BIT_MASK_NOA_START_TIME_8822B) << BIT_SHIFT_NOA_START_TIME_8822B)
7340 #define BIT_GET_NOA_START_TIME_8822B(x) (((x) >> BIT_SHIFT_NOA_START_TIME_8822B) & BIT_MASK_NOA_START_TIME_8822B)
7343 #define BIT_SHIFT_NOA_INTERVAL_8822B (32 & CPU_OPT_WIDTH)
7344 #define BIT_MASK_NOA_INTERVAL_8822B 0xffffffffL
7345 #define BIT_NOA_INTERVAL_8822B(x) (((x) & BIT_MASK_NOA_INTERVAL_8822B) << BIT_SHIFT_NOA_INTERVAL_8822B)
7346 #define BIT_GET_NOA_INTERVAL_8822B(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_8822B) & BIT_MASK_NOA_INTERVAL_8822B)
7349 #define BIT_SHIFT_NOA_DURATION_8822B 0
7350 #define BIT_MASK_NOA_DURATION_8822B 0xffffffffL
7351 #define BIT_NOA_DURATION_8822B(x) (((x) & BIT_MASK_NOA_DURATION_8822B) << BIT_SHIFT_NOA_DURATION_8822B)
7352 #define BIT_GET_NOA_DURATION_8822B(x) (((x) >> BIT_SHIFT_NOA_DURATION_8822B) & BIT_MASK_NOA_DURATION_8822B)
7355 /* 2 REG_P2P_RST_8822B */
7356 #define BIT_P2P2_PWR_RST1_8822B BIT(5)
7357 #define BIT_P2P2_PWR_RST0_8822B BIT(4)
7358 #define BIT_P2P1_PWR_RST1_8822B BIT(3)
7359 #define BIT_P2P1_PWR_RST0_8822B BIT(2)
7360 #define BIT_P2P_PWR_RST1_V1_8822B BIT(1)
7361 #define BIT_P2P_PWR_RST0_V1_8822B BIT(0)
7363 /* 2 REG_SCHEDULER_RST_8822B */
7364 #define BIT_SYNC_CLI_8822B BIT(1)
7365 #define BIT_SCHEDULER_RST_V1_8822B BIT(0)
7367 /* 2 REG_SCH_TXCMD_8822B */
7369 #define BIT_SHIFT_SCH_TXCMD_8822B 0
7370 #define BIT_MASK_SCH_TXCMD_8822B 0xffffffffL
7371 #define BIT_SCH_TXCMD_8822B(x) (((x) & BIT_MASK_SCH_TXCMD_8822B) << BIT_SHIFT_SCH_TXCMD_8822B)
7372 #define BIT_GET_SCH_TXCMD_8822B(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8822B) & BIT_MASK_SCH_TXCMD_8822B)
7375 /* 2 REG_PAGE5_DUMMY_8822B */
7377 /* 2 REG_CPUMGQ_TX_TIMER_8822B */
7379 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B 0
7380 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B 0xffffffffL
7381 #define BIT_CPUMGQ_TX_TIMER_V1_8822B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B) << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B)
7382 #define BIT_GET_CPUMGQ_TX_TIMER_V1_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B)
7385 /* 2 REG_PS_TIMER_A_8822B */
7387 #define BIT_SHIFT_PS_TIMER_A_V1_8822B 0
7388 #define BIT_MASK_PS_TIMER_A_V1_8822B 0xffffffffL
7389 #define BIT_PS_TIMER_A_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_V1_8822B) << BIT_SHIFT_PS_TIMER_A_V1_8822B)
7390 #define BIT_GET_PS_TIMER_A_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8822B) & BIT_MASK_PS_TIMER_A_V1_8822B)
7393 /* 2 REG_PS_TIMER_B_8822B */
7395 #define BIT_SHIFT_PS_TIMER_B_V1_8822B 0
7396 #define BIT_MASK_PS_TIMER_B_V1_8822B 0xffffffffL
7397 #define BIT_PS_TIMER_B_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_V1_8822B) << BIT_SHIFT_PS_TIMER_B_V1_8822B)
7398 #define BIT_GET_PS_TIMER_B_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8822B) & BIT_MASK_PS_TIMER_B_V1_8822B)
7401 /* 2 REG_PS_TIMER_C_8822B */
7403 #define BIT_SHIFT_PS_TIMER_C_V1_8822B 0
7404 #define BIT_MASK_PS_TIMER_C_V1_8822B 0xffffffffL
7405 #define BIT_PS_TIMER_C_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_V1_8822B) << BIT_SHIFT_PS_TIMER_C_V1_8822B)
7406 #define BIT_GET_PS_TIMER_C_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8822B) & BIT_MASK_PS_TIMER_C_V1_8822B)
7409 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8822B */
7410 #define BIT_CPUMGQ_TIMER_EN_8822B BIT(31)
7411 #define BIT_CPUMGQ_TX_EN_8822B BIT(28)
7413 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B 24
7414 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B 0x7
7415 #define BIT_CPUMGQ_TIMER_TSF_SEL_8822B(x) (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B) << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B)
7416 #define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B)
7418 #define BIT_PS_TIMER_C_EN_8822B BIT(23)
7420 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B 16
7421 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8822B 0x7
7422 #define BIT_PS_TIMER_C_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B)
7423 #define BIT_GET_PS_TIMER_C_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B)
7425 #define BIT_PS_TIMER_B_EN_8822B BIT(15)
7427 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B 8
7428 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8822B 0x7
7429 #define BIT_PS_TIMER_B_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B)
7430 #define BIT_GET_PS_TIMER_B_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B)
7432 #define BIT_PS_TIMER_A_EN_8822B BIT(7)
7434 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B 0
7435 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8822B 0x7
7436 #define BIT_PS_TIMER_A_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B)
7437 #define BIT_GET_PS_TIMER_A_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B)
7440 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8822B */
7442 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B 0
7443 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B 0xff
7444 #define BIT_CPUMGQ_TX_TIMER_EARLY_8822B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B) << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B)
7445 #define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B)
7448 /* 2 REG_PS_TIMER_A_EARLY_8822B */
7450 #define BIT_SHIFT_PS_TIMER_A_EARLY_8822B 0
7451 #define BIT_MASK_PS_TIMER_A_EARLY_8822B 0xff
7452 #define BIT_PS_TIMER_A_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_EARLY_8822B) << BIT_SHIFT_PS_TIMER_A_EARLY_8822B)
7453 #define BIT_GET_PS_TIMER_A_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8822B) & BIT_MASK_PS_TIMER_A_EARLY_8822B)
7456 /* 2 REG_PS_TIMER_B_EARLY_8822B */
7458 #define BIT_SHIFT_PS_TIMER_B_EARLY_8822B 0
7459 #define BIT_MASK_PS_TIMER_B_EARLY_8822B 0xff
7460 #define BIT_PS_TIMER_B_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_EARLY_8822B) << BIT_SHIFT_PS_TIMER_B_EARLY_8822B)
7461 #define BIT_GET_PS_TIMER_B_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8822B) & BIT_MASK_PS_TIMER_B_EARLY_8822B)
7464 /* 2 REG_PS_TIMER_C_EARLY_8822B */
7466 #define BIT_SHIFT_PS_TIMER_C_EARLY_8822B 0
7467 #define BIT_MASK_PS_TIMER_C_EARLY_8822B 0xff
7468 #define BIT_PS_TIMER_C_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_EARLY_8822B) << BIT_SHIFT_PS_TIMER_C_EARLY_8822B)
7469 #define BIT_GET_PS_TIMER_C_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8822B) & BIT_MASK_PS_TIMER_C_EARLY_8822B)
7472 /* 2 REG_NOT_VALID_8822B */
7474 /* 2 REG_BWOPMODE_8822B (BW OPERATION MODE REGISTER) */
7476 /* 2 REG_WMAC_FWPKT_CR_8822B */
7477 #define BIT_FWEN_8822B BIT(7)
7478 #define BIT_PHYSTS_PKT_CTRL_8822B BIT(6)
7479 #define BIT_APPHDR_MIDSRCH_FAIL_8822B BIT(4)
7480 #define BIT_FWPARSING_EN_8822B BIT(3)
7482 #define BIT_SHIFT_APPEND_MHDR_LEN_8822B 0
7483 #define BIT_MASK_APPEND_MHDR_LEN_8822B 0x7
7484 #define BIT_APPEND_MHDR_LEN_8822B(x) (((x) & BIT_MASK_APPEND_MHDR_LEN_8822B) << BIT_SHIFT_APPEND_MHDR_LEN_8822B)
7485 #define BIT_GET_APPEND_MHDR_LEN_8822B(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8822B) & BIT_MASK_APPEND_MHDR_LEN_8822B)
7488 /* 2 REG_WMAC_CR_8822B (WMAC CR AND APSD CONTROL REGISTER) */
7489 #define BIT_IC_MACPHY_M_8822B BIT(0)
7491 /* 2 REG_TCR_8822B (TRANSMISSION CONFIGURATION REGISTER) */
7492 #define BIT_WMAC_EN_RTS_ADDR_8822B BIT(31)
7493 #define BIT_WMAC_DISABLE_CCK_8822B BIT(30)
7494 #define BIT_WMAC_RAW_LEN_8822B BIT(29)
7495 #define BIT_WMAC_NOTX_IN_RXNDP_8822B BIT(28)
7496 #define BIT_WMAC_EN_EOF_8822B BIT(27)
7497 #define BIT_WMAC_BF_SEL_8822B BIT(26)
7498 #define BIT_WMAC_ANTMODE_SEL_8822B BIT(25)
7499 #define BIT_WMAC_TCRPWRMGT_HWCTL_8822B BIT(24)
7500 #define BIT_WMAC_SMOOTH_VAL_8822B BIT(23)
7501 #define BIT_FETCH_MPDU_AFTER_WSEC_RDY_8822B BIT(20)
7502 #define BIT_WMAC_TCR_EN_20MST_8822B BIT(19)
7503 #define BIT_WMAC_DIS_SIGTA_8822B BIT(18)
7504 #define BIT_WMAC_DIS_A2B0_8822B BIT(17)
7505 #define BIT_WMAC_MSK_SIGBCRC_8822B BIT(16)
7506 #define BIT_WMAC_TCR_ERRSTEN_3_8822B BIT(15)
7507 #define BIT_WMAC_TCR_ERRSTEN_2_8822B BIT(14)
7508 #define BIT_WMAC_TCR_ERRSTEN_1_8822B BIT(13)
7509 #define BIT_WMAC_TCR_ERRSTEN_0_8822B BIT(12)
7510 #define BIT_WMAC_TCR_TXSK_PERPKT_8822B BIT(11)
7511 #define BIT_ICV_8822B BIT(10)
7512 #define BIT_CFEND_FORMAT_8822B BIT(9)
7513 #define BIT_CRC_8822B BIT(8)
7514 #define BIT_PWRBIT_OW_EN_8822B BIT(7)
7515 #define BIT_PWR_ST_8822B BIT(6)
7516 #define BIT_WMAC_TCR_UPD_TIMIE_8822B BIT(5)
7517 #define BIT_WMAC_TCR_UPD_HGQMD_8822B BIT(4)
7518 #define BIT_VHTSIGA1_TXPS_8822B BIT(3)
7519 #define BIT_PAD_SEL_8822B BIT(2)
7520 #define BIT_DIS_GCLK_8822B BIT(1)
7522 /* 2 REG_RCR_8822B (RECEIVE CONFIGURATION REGISTER) */
7523 #define BIT_APP_FCS_8822B BIT(31)
7524 #define BIT_APP_MIC_8822B BIT(30)
7525 #define BIT_APP_ICV_8822B BIT(29)
7526 #define BIT_APP_PHYSTS_8822B BIT(28)
7527 #define BIT_APP_BASSN_8822B BIT(27)
7528 #define BIT_VHT_DACK_8822B BIT(26)
7529 #define BIT_TCPOFLD_EN_8822B BIT(25)
7530 #define BIT_ENMBID_8822B BIT(24)
7531 #define BIT_LSIGEN_8822B BIT(23)
7532 #define BIT_MFBEN_8822B BIT(22)
7533 #define BIT_DISCHKPPDLLEN_8822B BIT(21)
7534 #define BIT_PKTCTL_DLEN_8822B BIT(20)
7535 #define BIT_TIM_PARSER_EN_8822B BIT(18)
7536 #define BIT_BC_MD_EN_8822B BIT(17)
7537 #define BIT_UC_MD_EN_8822B BIT(16)
7538 #define BIT_RXSK_PERPKT_8822B BIT(15)
7539 #define BIT_HTC_LOC_CTRL_8822B BIT(14)
7540 #define BIT_RPFM_CAM_ENABLE_8822B BIT(12)
7541 #define BIT_TA_BCN_8822B BIT(11)
7542 #define BIT_DISDECMYPKT_8822B BIT(10)
7543 #define BIT_AICV_8822B BIT(9)
7544 #define BIT_ACRC32_8822B BIT(8)
7545 #define BIT_CBSSID_BCN_8822B BIT(7)
7546 #define BIT_CBSSID_DATA_8822B BIT(6)
7547 #define BIT_APWRMGT_8822B BIT(5)
7548 #define BIT_ADD3_8822B BIT(4)
7549 #define BIT_AB_8822B BIT(3)
7550 #define BIT_AM_8822B BIT(2)
7551 #define BIT_APM_8822B BIT(1)
7552 #define BIT_AAP_8822B BIT(0)
7554 /* 2 REG_RX_DRVINFO_SZ_8822B (RX DRIVER INFO SIZE REGISTER) */
7555 #define BIT_PHYSTS_PER_PKT_MODE_8822B BIT(7)
7557 #define BIT_SHIFT_DRVINFO_SZ_V1_8822B 0
7558 #define BIT_MASK_DRVINFO_SZ_V1_8822B 0xf
7559 #define BIT_DRVINFO_SZ_V1_8822B(x) (((x) & BIT_MASK_DRVINFO_SZ_V1_8822B) << BIT_SHIFT_DRVINFO_SZ_V1_8822B)
7560 #define BIT_GET_DRVINFO_SZ_V1_8822B(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8822B) & BIT_MASK_DRVINFO_SZ_V1_8822B)
7563 /* 2 REG_RX_DLK_TIME_8822B (RX DEADLOCK TIME REGISTER) */
7565 #define BIT_SHIFT_RX_DLK_TIME_8822B 0
7566 #define BIT_MASK_RX_DLK_TIME_8822B 0xff
7567 #define BIT_RX_DLK_TIME_8822B(x) (((x) & BIT_MASK_RX_DLK_TIME_8822B) << BIT_SHIFT_RX_DLK_TIME_8822B)
7568 #define BIT_GET_RX_DLK_TIME_8822B(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8822B) & BIT_MASK_RX_DLK_TIME_8822B)
7571 /* 2 REG_RX_PKT_LIMIT_8822B (RX PACKET LENGTH LIMIT REGISTER) */
7573 #define BIT_SHIFT_RXPKTLMT_8822B 0
7574 #define BIT_MASK_RXPKTLMT_8822B 0x3f
7575 #define BIT_RXPKTLMT_8822B(x) (((x) & BIT_MASK_RXPKTLMT_8822B) << BIT_SHIFT_RXPKTLMT_8822B)
7576 #define BIT_GET_RXPKTLMT_8822B(x) (((x) >> BIT_SHIFT_RXPKTLMT_8822B) & BIT_MASK_RXPKTLMT_8822B)
7579 /* 2 REG_MACID_8822B (MAC ID REGISTER) */
7581 #define BIT_SHIFT_MACID_8822B 0
7582 #define BIT_MASK_MACID_8822B 0xffffffffffffL
7583 #define BIT_MACID_8822B(x) (((x) & BIT_MASK_MACID_8822B) << BIT_SHIFT_MACID_8822B)
7584 #define BIT_GET_MACID_8822B(x) (((x) >> BIT_SHIFT_MACID_8822B) & BIT_MASK_MACID_8822B)
7587 /* 2 REG_BSSID_8822B (BSSID REGISTER) */
7589 #define BIT_SHIFT_BSSID_8822B 0
7590 #define BIT_MASK_BSSID_8822B 0xffffffffffffL
7591 #define BIT_BSSID_8822B(x) (((x) & BIT_MASK_BSSID_8822B) << BIT_SHIFT_BSSID_8822B)
7592 #define BIT_GET_BSSID_8822B(x) (((x) >> BIT_SHIFT_BSSID_8822B) & BIT_MASK_BSSID_8822B)
7595 /* 2 REG_MAR_8822B (MULTICAST ADDRESS REGISTER) */
7597 #define BIT_SHIFT_MAR_8822B 0
7598 #define BIT_MASK_MAR_8822B 0xffffffffffffffffL
7599 #define BIT_MAR_8822B(x) (((x) & BIT_MASK_MAR_8822B) << BIT_SHIFT_MAR_8822B)
7600 #define BIT_GET_MAR_8822B(x) (((x) >> BIT_SHIFT_MAR_8822B) & BIT_MASK_MAR_8822B)
7603 /* 2 REG_MBIDCAMCFG_1_8822B (MBSSID CAM CONFIGURATION REGISTER) */
7605 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8822B 0
7606 #define BIT_MASK_MBIDCAM_RWDATA_L_8822B 0xffffffffL
7607 #define BIT_MBIDCAM_RWDATA_L_8822B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8822B) << BIT_SHIFT_MBIDCAM_RWDATA_L_8822B)
7608 #define BIT_GET_MBIDCAM_RWDATA_L_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8822B) & BIT_MASK_MBIDCAM_RWDATA_L_8822B)
7611 /* 2 REG_MBIDCAMCFG_2_8822B (MBSSID CAM CONFIGURATION REGISTER) */
7612 #define BIT_MBIDCAM_POLL_8822B BIT(31)
7613 #define BIT_MBIDCAM_WT_EN_8822B BIT(30)
7615 #define BIT_SHIFT_MBIDCAM_ADDR_8822B 24
7616 #define BIT_MASK_MBIDCAM_ADDR_8822B 0x1f
7617 #define BIT_MBIDCAM_ADDR_8822B(x) (((x) & BIT_MASK_MBIDCAM_ADDR_8822B) << BIT_SHIFT_MBIDCAM_ADDR_8822B)
7618 #define BIT_GET_MBIDCAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8822B) & BIT_MASK_MBIDCAM_ADDR_8822B)
7620 #define BIT_MBIDCAM_VALID_8822B BIT(23)
7621 #define BIT_LSIC_TXOP_EN_8822B BIT(17)
7622 #define BIT_CTS_EN_8822B BIT(16)
7624 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8822B 0
7625 #define BIT_MASK_MBIDCAM_RWDATA_H_8822B 0xffff
7626 #define BIT_MBIDCAM_RWDATA_H_8822B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8822B) << BIT_SHIFT_MBIDCAM_RWDATA_H_8822B)
7627 #define BIT_GET_MBIDCAM_RWDATA_H_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8822B) & BIT_MASK_MBIDCAM_RWDATA_H_8822B)
7630 /* 2 REG_ZLD_NUM_8822B */
7632 #define BIT_SHIFT_ZLD_NUM_8822B 0
7633 #define BIT_MASK_ZLD_NUM_8822B 0xff
7634 #define BIT_ZLD_NUM_8822B(x) (((x) & BIT_MASK_ZLD_NUM_8822B) << BIT_SHIFT_ZLD_NUM_8822B)
7635 #define BIT_GET_ZLD_NUM_8822B(x) (((x) >> BIT_SHIFT_ZLD_NUM_8822B) & BIT_MASK_ZLD_NUM_8822B)
7638 /* 2 REG_UDF_THSD_8822B */
7640 #define BIT_SHIFT_UDF_THSD_8822B 0
7641 #define BIT_MASK_UDF_THSD_8822B 0xff
7642 #define BIT_UDF_THSD_8822B(x) (((x) & BIT_MASK_UDF_THSD_8822B) << BIT_SHIFT_UDF_THSD_8822B)
7643 #define BIT_GET_UDF_THSD_8822B(x) (((x) >> BIT_SHIFT_UDF_THSD_8822B) & BIT_MASK_UDF_THSD_8822B)
7646 /* 2 REG_WMAC_TCR_TSFT_OFS_8822B */
7648 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B 0
7649 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8822B 0xffff
7650 #define BIT_WMAC_TCR_TSFT_OFS_8822B(x) (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B) << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B)
7651 #define BIT_GET_WMAC_TCR_TSFT_OFS_8822B(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B)
7654 /* 2 REG_MCU_TEST_2_V1_8822B */
7656 #define BIT_SHIFT_MCU_RSVD_2_V1_8822B 0
7657 #define BIT_MASK_MCU_RSVD_2_V1_8822B 0xffff
7658 #define BIT_MCU_RSVD_2_V1_8822B(x) (((x) & BIT_MASK_MCU_RSVD_2_V1_8822B) << BIT_SHIFT_MCU_RSVD_2_V1_8822B)
7659 #define BIT_GET_MCU_RSVD_2_V1_8822B(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8822B) & BIT_MASK_MCU_RSVD_2_V1_8822B)
7662 /* 2 REG_WMAC_TXTIMEOUT_8822B */
7664 #define BIT_SHIFT_WMAC_TXTIMEOUT_8822B 0
7665 #define BIT_MASK_WMAC_TXTIMEOUT_8822B 0xff
7666 #define BIT_WMAC_TXTIMEOUT_8822B(x) (((x) & BIT_MASK_WMAC_TXTIMEOUT_8822B) << BIT_SHIFT_WMAC_TXTIMEOUT_8822B)
7667 #define BIT_GET_WMAC_TXTIMEOUT_8822B(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8822B) & BIT_MASK_WMAC_TXTIMEOUT_8822B)
7670 /* 2 REG_STMP_THSD_8822B */
7672 #define BIT_SHIFT_STMP_THSD_8822B 0
7673 #define BIT_MASK_STMP_THSD_8822B 0xff
7674 #define BIT_STMP_THSD_8822B(x) (((x) & BIT_MASK_STMP_THSD_8822B) << BIT_SHIFT_STMP_THSD_8822B)
7675 #define BIT_GET_STMP_THSD_8822B(x) (((x) >> BIT_SHIFT_STMP_THSD_8822B) & BIT_MASK_STMP_THSD_8822B)
7678 /* 2 REG_MAC_SPEC_SIFS_8822B (SPECIFICATION SIFS REGISTER) */
7680 #define BIT_SHIFT_SPEC_SIFS_OFDM_8822B 8
7681 #define BIT_MASK_SPEC_SIFS_OFDM_8822B 0xff
7682 #define BIT_SPEC_SIFS_OFDM_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_8822B) << BIT_SHIFT_SPEC_SIFS_OFDM_8822B)
7683 #define BIT_GET_SPEC_SIFS_OFDM_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8822B) & BIT_MASK_SPEC_SIFS_OFDM_8822B)
7686 #define BIT_SHIFT_SPEC_SIFS_CCK_8822B 0
7687 #define BIT_MASK_SPEC_SIFS_CCK_8822B 0xff
7688 #define BIT_SPEC_SIFS_CCK_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_8822B)
7689 #define BIT_GET_SPEC_SIFS_CCK_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8822B) & BIT_MASK_SPEC_SIFS_CCK_8822B)
7692 /* 2 REG_USTIME_EDCA_8822B (US TIME TUNING FOR EDCA REGISTER) */
7694 #define BIT_SHIFT_USTIME_EDCA_V1_8822B 0
7695 #define BIT_MASK_USTIME_EDCA_V1_8822B 0x1ff
7696 #define BIT_USTIME_EDCA_V1_8822B(x) (((x) & BIT_MASK_USTIME_EDCA_V1_8822B) << BIT_SHIFT_USTIME_EDCA_V1_8822B)
7697 #define BIT_GET_USTIME_EDCA_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8822B) & BIT_MASK_USTIME_EDCA_V1_8822B)
7700 /* 2 REG_RESP_SIFS_OFDM_8822B (RESPONSE SIFS FOR OFDM REGISTER) */
7702 #define BIT_SHIFT_SIFS_R2T_OFDM_8822B 8
7703 #define BIT_MASK_SIFS_R2T_OFDM_8822B 0xff
7704 #define BIT_SIFS_R2T_OFDM_8822B(x) (((x) & BIT_MASK_SIFS_R2T_OFDM_8822B) << BIT_SHIFT_SIFS_R2T_OFDM_8822B)
7705 #define BIT_GET_SIFS_R2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8822B) & BIT_MASK_SIFS_R2T_OFDM_8822B)
7708 #define BIT_SHIFT_SIFS_T2T_OFDM_8822B 0
7709 #define BIT_MASK_SIFS_T2T_OFDM_8822B 0xff
7710 #define BIT_SIFS_T2T_OFDM_8822B(x) (((x) & BIT_MASK_SIFS_T2T_OFDM_8822B) << BIT_SHIFT_SIFS_T2T_OFDM_8822B)
7711 #define BIT_GET_SIFS_T2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8822B) & BIT_MASK_SIFS_T2T_OFDM_8822B)
7714 /* 2 REG_RESP_SIFS_CCK_8822B (RESPONSE SIFS FOR CCK REGISTER) */
7716 #define BIT_SHIFT_SIFS_R2T_CCK_8822B 8
7717 #define BIT_MASK_SIFS_R2T_CCK_8822B 0xff
7718 #define BIT_SIFS_R2T_CCK_8822B(x) (((x) & BIT_MASK_SIFS_R2T_CCK_8822B) << BIT_SHIFT_SIFS_R2T_CCK_8822B)
7719 #define BIT_GET_SIFS_R2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8822B) & BIT_MASK_SIFS_R2T_CCK_8822B)
7722 #define BIT_SHIFT_SIFS_T2T_CCK_8822B 0
7723 #define BIT_MASK_SIFS_T2T_CCK_8822B 0xff
7724 #define BIT_SIFS_T2T_CCK_8822B(x) (((x) & BIT_MASK_SIFS_T2T_CCK_8822B) << BIT_SHIFT_SIFS_T2T_CCK_8822B)
7725 #define BIT_GET_SIFS_T2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8822B) & BIT_MASK_SIFS_T2T_CCK_8822B)
7728 /* 2 REG_EIFS_8822B (EIFS REGISTER) */
7730 #define BIT_SHIFT_EIFS_8822B 0
7731 #define BIT_MASK_EIFS_8822B 0xffff
7732 #define BIT_EIFS_8822B(x) (((x) & BIT_MASK_EIFS_8822B) << BIT_SHIFT_EIFS_8822B)
7733 #define BIT_GET_EIFS_8822B(x) (((x) >> BIT_SHIFT_EIFS_8822B) & BIT_MASK_EIFS_8822B)
7736 /* 2 REG_CTS2TO_8822B (CTS2 TIMEOUT REGISTER) */
7738 #define BIT_SHIFT_CTS2TO_8822B 0
7739 #define BIT_MASK_CTS2TO_8822B 0xff
7740 #define BIT_CTS2TO_8822B(x) (((x) & BIT_MASK_CTS2TO_8822B) << BIT_SHIFT_CTS2TO_8822B)
7741 #define BIT_GET_CTS2TO_8822B(x) (((x) >> BIT_SHIFT_CTS2TO_8822B) & BIT_MASK_CTS2TO_8822B)
7744 /* 2 REG_ACKTO_8822B (ACK TIMEOUT REGISTER) */
7746 #define BIT_SHIFT_ACKTO_8822B 0
7747 #define BIT_MASK_ACKTO_8822B 0xff
7748 #define BIT_ACKTO_8822B(x) (((x) & BIT_MASK_ACKTO_8822B) << BIT_SHIFT_ACKTO_8822B)
7749 #define BIT_GET_ACKTO_8822B(x) (((x) >> BIT_SHIFT_ACKTO_8822B) & BIT_MASK_ACKTO_8822B)
7752 /* 2 REG_NAV_CTRL_8822B (NAV CONTROL REGISTER) */
7754 #define BIT_SHIFT_NAV_UPPER_8822B 16
7755 #define BIT_MASK_NAV_UPPER_8822B 0xff
7756 #define BIT_NAV_UPPER_8822B(x) (((x) & BIT_MASK_NAV_UPPER_8822B) << BIT_SHIFT_NAV_UPPER_8822B)
7757 #define BIT_GET_NAV_UPPER_8822B(x) (((x) >> BIT_SHIFT_NAV_UPPER_8822B) & BIT_MASK_NAV_UPPER_8822B)
7760 #define BIT_SHIFT_RXMYRTS_NAV_8822B 8
7761 #define BIT_MASK_RXMYRTS_NAV_8822B 0xf
7762 #define BIT_RXMYRTS_NAV_8822B(x) (((x) & BIT_MASK_RXMYRTS_NAV_8822B) << BIT_SHIFT_RXMYRTS_NAV_8822B)
7763 #define BIT_GET_RXMYRTS_NAV_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8822B) & BIT_MASK_RXMYRTS_NAV_8822B)
7766 #define BIT_SHIFT_RTSRST_8822B 0
7767 #define BIT_MASK_RTSRST_8822B 0xff
7768 #define BIT_RTSRST_8822B(x) (((x) & BIT_MASK_RTSRST_8822B) << BIT_SHIFT_RTSRST_8822B)
7769 #define BIT_GET_RTSRST_8822B(x) (((x) >> BIT_SHIFT_RTSRST_8822B) & BIT_MASK_RTSRST_8822B)
7772 /* 2 REG_BACAMCMD_8822B (BLOCK ACK CAM COMMAND REGISTER) */
7773 #define BIT_BACAM_POLL_8822B BIT(31)
7774 #define BIT_BACAM_RST_8822B BIT(17)
7775 #define BIT_BACAM_RW_8822B BIT(16)
7777 #define BIT_SHIFT_TXSBM_8822B 14
7778 #define BIT_MASK_TXSBM_8822B 0x3
7779 #define BIT_TXSBM_8822B(x) (((x) & BIT_MASK_TXSBM_8822B) << BIT_SHIFT_TXSBM_8822B)
7780 #define BIT_GET_TXSBM_8822B(x) (((x) >> BIT_SHIFT_TXSBM_8822B) & BIT_MASK_TXSBM_8822B)
7783 #define BIT_SHIFT_BACAM_ADDR_8822B 0
7784 #define BIT_MASK_BACAM_ADDR_8822B 0x3f
7785 #define BIT_BACAM_ADDR_8822B(x) (((x) & BIT_MASK_BACAM_ADDR_8822B) << BIT_SHIFT_BACAM_ADDR_8822B)
7786 #define BIT_GET_BACAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8822B) & BIT_MASK_BACAM_ADDR_8822B)
7789 /* 2 REG_BACAMCONTENT_8822B (BLOCK ACK CAM CONTENT REGISTER) */
7791 #define BIT_SHIFT_BA_CONTENT_H_8822B (32 & CPU_OPT_WIDTH)
7792 #define BIT_MASK_BA_CONTENT_H_8822B 0xffffffffL
7793 #define BIT_BA_CONTENT_H_8822B(x) (((x) & BIT_MASK_BA_CONTENT_H_8822B) << BIT_SHIFT_BA_CONTENT_H_8822B)
7794 #define BIT_GET_BA_CONTENT_H_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8822B) & BIT_MASK_BA_CONTENT_H_8822B)
7797 #define BIT_SHIFT_BA_CONTENT_L_8822B 0
7798 #define BIT_MASK_BA_CONTENT_L_8822B 0xffffffffL
7799 #define BIT_BA_CONTENT_L_8822B(x) (((x) & BIT_MASK_BA_CONTENT_L_8822B) << BIT_SHIFT_BA_CONTENT_L_8822B)
7800 #define BIT_GET_BA_CONTENT_L_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8822B) & BIT_MASK_BA_CONTENT_L_8822B)
7803 /* 2 REG_NOT_VALID_8822B */
7804 #define BIT_BITMAP_VO_8822B BIT(7)
7805 #define BIT_BITMAP_VI_8822B BIT(6)
7806 #define BIT_BITMAP_BE_8822B BIT(5)
7807 #define BIT_BITMAP_BK_8822B BIT(4)
7809 #define BIT_SHIFT_BITMAP_CONDITION_8822B 2
7810 #define BIT_MASK_BITMAP_CONDITION_8822B 0x3
7811 #define BIT_BITMAP_CONDITION_8822B(x) (((x) & BIT_MASK_BITMAP_CONDITION_8822B) << BIT_SHIFT_BITMAP_CONDITION_8822B)
7812 #define BIT_GET_BITMAP_CONDITION_8822B(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8822B) & BIT_MASK_BITMAP_CONDITION_8822B)
7814 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8822B BIT(1)
7815 #define BIT_BITMAP_FORCE_8822B BIT(0)
7817 /* 2 REG_TX_RX_8822B STATUS */
7819 #define BIT_SHIFT_RXPKT_TYPE_8822B 2
7820 #define BIT_MASK_RXPKT_TYPE_8822B 0x3f
7821 #define BIT_RXPKT_TYPE_8822B(x) (((x) & BIT_MASK_RXPKT_TYPE_8822B) << BIT_SHIFT_RXPKT_TYPE_8822B)
7822 #define BIT_GET_RXPKT_TYPE_8822B(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8822B) & BIT_MASK_RXPKT_TYPE_8822B)
7824 #define BIT_TXACT_IND_8822B BIT(1)
7825 #define BIT_RXACT_IND_8822B BIT(0)
7827 /* 2 REG_WMAC_BACAM_RPMEN_8822B */
7829 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B 2
7830 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8822B 0x3f
7831 #define BIT_BITMAP_SSNBK_COUNTER_8822B(x) (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B) << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B)
7832 #define BIT_GET_BITMAP_SSNBK_COUNTER_8822B(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B)
7834 #define BIT_BITMAP_EN_8822B BIT(1)
7835 #define BIT_WMAC_BACAM_RPMEN_8822B BIT(0)
7837 /* 2 REG_LBDLY_8822B (LOOPBACK DELAY REGISTER) */
7839 #define BIT_SHIFT_LBDLY_8822B 0
7840 #define BIT_MASK_LBDLY_8822B 0x1f
7841 #define BIT_LBDLY_8822B(x) (((x) & BIT_MASK_LBDLY_8822B) << BIT_SHIFT_LBDLY_8822B)
7842 #define BIT_GET_LBDLY_8822B(x) (((x) >> BIT_SHIFT_LBDLY_8822B) & BIT_MASK_LBDLY_8822B)
7845 /* 2 REG_RXERR_RPT_8822B (RX ERROR REPORT REGISTER) */
7847 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B 28
7848 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B 0xf
7849 #define BIT_RXERR_RPT_SEL_V1_3_0_8822B(x) (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B) << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B)
7850 #define BIT_GET_RXERR_RPT_SEL_V1_3_0_8822B(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B)
7852 #define BIT_RXERR_RPT_RST_8822B BIT(27)
7853 #define BIT_RXERR_RPT_SEL_V1_4_8822B BIT(26)
7854 #define BIT_W1S_8822B BIT(23)
7855 #define BIT_UD_SELECT_BSSID_8822B BIT(22)
7857 #define BIT_SHIFT_UD_SUB_TYPE_8822B 18
7858 #define BIT_MASK_UD_SUB_TYPE_8822B 0xf
7859 #define BIT_UD_SUB_TYPE_8822B(x) (((x) & BIT_MASK_UD_SUB_TYPE_8822B) << BIT_SHIFT_UD_SUB_TYPE_8822B)
7860 #define BIT_GET_UD_SUB_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8822B) & BIT_MASK_UD_SUB_TYPE_8822B)
7863 #define BIT_SHIFT_UD_TYPE_8822B 16
7864 #define BIT_MASK_UD_TYPE_8822B 0x3
7865 #define BIT_UD_TYPE_8822B(x) (((x) & BIT_MASK_UD_TYPE_8822B) << BIT_SHIFT_UD_TYPE_8822B)
7866 #define BIT_GET_UD_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_TYPE_8822B) & BIT_MASK_UD_TYPE_8822B)
7869 #define BIT_SHIFT_RPT_COUNTER_8822B 0
7870 #define BIT_MASK_RPT_COUNTER_8822B 0xffff
7871 #define BIT_RPT_COUNTER_8822B(x) (((x) & BIT_MASK_RPT_COUNTER_8822B) << BIT_SHIFT_RPT_COUNTER_8822B)
7872 #define BIT_GET_RPT_COUNTER_8822B(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8822B) & BIT_MASK_RPT_COUNTER_8822B)
7875 /* 2 REG_WMAC_TRXPTCL_CTL_8822B (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
7877 #define BIT_SHIFT_ACKBA_TYPSEL_8822B (60 & CPU_OPT_WIDTH)
7878 #define BIT_MASK_ACKBA_TYPSEL_8822B 0xf
7879 #define BIT_ACKBA_TYPSEL_8822B(x) (((x) & BIT_MASK_ACKBA_TYPSEL_8822B) << BIT_SHIFT_ACKBA_TYPSEL_8822B)
7880 #define BIT_GET_ACKBA_TYPSEL_8822B(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8822B) & BIT_MASK_ACKBA_TYPSEL_8822B)
7883 #define BIT_SHIFT_ACKBA_ACKPCHK_8822B (56 & CPU_OPT_WIDTH)
7884 #define BIT_MASK_ACKBA_ACKPCHK_8822B 0xf
7885 #define BIT_ACKBA_ACKPCHK_8822B(x) (((x) & BIT_MASK_ACKBA_ACKPCHK_8822B) << BIT_SHIFT_ACKBA_ACKPCHK_8822B)
7886 #define BIT_GET_ACKBA_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8822B) & BIT_MASK_ACKBA_ACKPCHK_8822B)
7889 #define BIT_SHIFT_ACKBAR_TYPESEL_8822B (48 & CPU_OPT_WIDTH)
7890 #define BIT_MASK_ACKBAR_TYPESEL_8822B 0xff
7891 #define BIT_ACKBAR_TYPESEL_8822B(x) (((x) & BIT_MASK_ACKBAR_TYPESEL_8822B) << BIT_SHIFT_ACKBAR_TYPESEL_8822B)
7892 #define BIT_GET_ACKBAR_TYPESEL_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8822B) & BIT_MASK_ACKBAR_TYPESEL_8822B)
7895 #define BIT_SHIFT_ACKBAR_ACKPCHK_8822B (44 & CPU_OPT_WIDTH)
7896 #define BIT_MASK_ACKBAR_ACKPCHK_8822B 0xf
7897 #define BIT_ACKBAR_ACKPCHK_8822B(x) (((x) & BIT_MASK_ACKBAR_ACKPCHK_8822B) << BIT_SHIFT_ACKBAR_ACKPCHK_8822B)
7898 #define BIT_GET_ACKBAR_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8822B) & BIT_MASK_ACKBAR_ACKPCHK_8822B)
7900 #define BIT_RXBA_IGNOREA2_8822B BIT(42)
7901 #define BIT_EN_SAVE_ALL_TXOPADDR_8822B BIT(41)
7902 #define BIT_EN_TXCTS_TO_TXOPOWNER_INRXNAV_8822B BIT(40)
7903 #define BIT_DIS_TXBA_AMPDUFCSERR_8822B BIT(39)
7904 #define BIT_DIS_TXBA_RXBARINFULL_8822B BIT(38)
7905 #define BIT_DIS_TXCFE_INFULL_8822B BIT(37)
7906 #define BIT_DIS_TXCTS_INFULL_8822B BIT(36)
7907 #define BIT_EN_TXACKBA_IN_TX_RDG_8822B BIT(35)
7908 #define BIT_EN_TXACKBA_IN_TXOP_8822B BIT(34)
7909 #define BIT_EN_TXCTS_IN_RXNAV_8822B BIT(33)
7910 #define BIT_EN_TXCTS_INTXOP_8822B BIT(32)
7911 #define BIT_BLK_EDCA_BBSLP_8822B BIT(31)
7912 #define BIT_BLK_EDCA_BBSBY_8822B BIT(30)
7913 #define BIT_ACKTO_BLOCK_SCH_EN_8822B BIT(27)
7914 #define BIT_EIFS_BLOCK_SCH_EN_8822B BIT(26)
7915 #define BIT_PLCPCHK_RST_EIFS_8822B BIT(25)
7916 #define BIT_CCA_RST_EIFS_8822B BIT(24)
7917 #define BIT_DIS_UPD_MYRXPKTNAV_8822B BIT(23)
7918 #define BIT_EARLY_TXBA_8822B BIT(22)
7920 #define BIT_SHIFT_RESP_CHNBUSY_8822B 20
7921 #define BIT_MASK_RESP_CHNBUSY_8822B 0x3
7922 #define BIT_RESP_CHNBUSY_8822B(x) (((x) & BIT_MASK_RESP_CHNBUSY_8822B) << BIT_SHIFT_RESP_CHNBUSY_8822B)
7923 #define BIT_GET_RESP_CHNBUSY_8822B(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8822B) & BIT_MASK_RESP_CHNBUSY_8822B)
7925 #define BIT_RESP_DCTS_EN_8822B BIT(19)
7926 #define BIT_RESP_DCFE_EN_8822B BIT(18)
7927 #define BIT_RESP_SPLCPEN_8822B BIT(17)
7928 #define BIT_RESP_SGIEN_8822B BIT(16)
7929 #define BIT_RESP_LDPC_EN_8822B BIT(15)
7930 #define BIT_DIS_RESP_ACKINCCA_8822B BIT(14)
7931 #define BIT_DIS_RESP_CTSINCCA_8822B BIT(13)
7933 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B 10
7934 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B 0x7
7935 #define BIT_R_WMAC_SECOND_CCA_TIMER_8822B(x) (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B) << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B)
7936 #define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B)
7939 #define BIT_SHIFT_RFMOD_8822B 7
7940 #define BIT_MASK_RFMOD_8822B 0x3
7941 #define BIT_RFMOD_8822B(x) (((x) & BIT_MASK_RFMOD_8822B) << BIT_SHIFT_RFMOD_8822B)
7942 #define BIT_GET_RFMOD_8822B(x) (((x) >> BIT_SHIFT_RFMOD_8822B) & BIT_MASK_RFMOD_8822B)
7945 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B 5
7946 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8822B 0x3
7947 #define BIT_RESP_CTS_DYNBW_SEL_8822B(x) (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B) << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B)
7948 #define BIT_GET_RESP_CTS_DYNBW_SEL_8822B(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B)
7950 #define BIT_DLY_TX_WAIT_RXANTSEL_8822B BIT(4)
7951 #define BIT_TXRESP_BY_RXANTSEL_8822B BIT(3)
7953 #define BIT_SHIFT_ORIG_DCTS_CHK_8822B 0
7954 #define BIT_MASK_ORIG_DCTS_CHK_8822B 0x3
7955 #define BIT_ORIG_DCTS_CHK_8822B(x) (((x) & BIT_MASK_ORIG_DCTS_CHK_8822B) << BIT_SHIFT_ORIG_DCTS_CHK_8822B)
7956 #define BIT_GET_ORIG_DCTS_CHK_8822B(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8822B) & BIT_MASK_ORIG_DCTS_CHK_8822B)
7959 /* 2 REG_CAMCMD_8822B (CAM COMMAND REGISTER) */
7960 #define BIT_SECCAM_POLLING_8822B BIT(31)
7961 #define BIT_SECCAM_CLR_8822B BIT(30)
7962 #define BIT_MFBCAM_CLR_8822B BIT(29)
7963 #define BIT_SECCAM_WE_8822B BIT(16)
7965 #define BIT_SHIFT_SECCAM_ADDR_V2_8822B 0
7966 #define BIT_MASK_SECCAM_ADDR_V2_8822B 0x3ff
7967 #define BIT_SECCAM_ADDR_V2_8822B(x) (((x) & BIT_MASK_SECCAM_ADDR_V2_8822B) << BIT_SHIFT_SECCAM_ADDR_V2_8822B)
7968 #define BIT_GET_SECCAM_ADDR_V2_8822B(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8822B) & BIT_MASK_SECCAM_ADDR_V2_8822B)
7971 /* 2 REG_CAMWRITE_8822B (CAM WRITE REGISTER) */
7973 #define BIT_SHIFT_CAMW_DATA_8822B 0
7974 #define BIT_MASK_CAMW_DATA_8822B 0xffffffffL
7975 #define BIT_CAMW_DATA_8822B(x) (((x) & BIT_MASK_CAMW_DATA_8822B) << BIT_SHIFT_CAMW_DATA_8822B)
7976 #define BIT_GET_CAMW_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMW_DATA_8822B) & BIT_MASK_CAMW_DATA_8822B)
7979 /* 2 REG_CAMREAD_8822B (CAM READ REGISTER) */
7981 #define BIT_SHIFT_CAMR_DATA_8822B 0
7982 #define BIT_MASK_CAMR_DATA_8822B 0xffffffffL
7983 #define BIT_CAMR_DATA_8822B(x) (((x) & BIT_MASK_CAMR_DATA_8822B) << BIT_SHIFT_CAMR_DATA_8822B)
7984 #define BIT_GET_CAMR_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMR_DATA_8822B) & BIT_MASK_CAMR_DATA_8822B)
7987 /* 2 REG_CAMDBG_8822B (CAM DEBUG REGISTER) */
7988 #define BIT_SECCAM_INFO_8822B BIT(31)
7989 #define BIT_SEC_KEYFOUND_8822B BIT(15)
7991 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8822B 12
7992 #define BIT_MASK_CAMDBG_SEC_TYPE_8822B 0x7
7993 #define BIT_CAMDBG_SEC_TYPE_8822B(x) (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8822B) << BIT_SHIFT_CAMDBG_SEC_TYPE_8822B)
7994 #define BIT_GET_CAMDBG_SEC_TYPE_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8822B) & BIT_MASK_CAMDBG_SEC_TYPE_8822B)
7996 #define BIT_CAMDBG_EXT_SECTYPE_8822B BIT(11)
7998 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B 5
7999 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B 0x1f
8000 #define BIT_CAMDBG_MIC_KEY_IDX_8822B(x) (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B) << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B)
8001 #define BIT_GET_CAMDBG_MIC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B)
8004 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B 0
8005 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B 0x1f
8006 #define BIT_CAMDBG_SEC_KEY_IDX_8822B(x) (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B) << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B)
8007 #define BIT_GET_CAMDBG_SEC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B)
8010 /* 2 REG_RXFILTER_ACTION_1_8822B */
8012 #define BIT_SHIFT_RXFILTER_ACTION_1_8822B 0
8013 #define BIT_MASK_RXFILTER_ACTION_1_8822B 0xff
8014 #define BIT_RXFILTER_ACTION_1_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_1_8822B) << BIT_SHIFT_RXFILTER_ACTION_1_8822B)
8015 #define BIT_GET_RXFILTER_ACTION_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8822B) & BIT_MASK_RXFILTER_ACTION_1_8822B)
8018 /* 2 REG_RXFILTER_CATEGORY_1_8822B */
8020 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8822B 0
8021 #define BIT_MASK_RXFILTER_CATEGORY_1_8822B 0xff
8022 #define BIT_RXFILTER_CATEGORY_1_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_1_8822B)
8023 #define BIT_GET_RXFILTER_CATEGORY_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8822B) & BIT_MASK_RXFILTER_CATEGORY_1_8822B)
8026 /* 2 REG_SECCFG_8822B (SECURITY CONFIGURATION REGISTER) */
8027 #define BIT_DIS_GCLK_WAPI_8822B BIT(15)
8028 #define BIT_DIS_GCLK_AES_8822B BIT(14)
8029 #define BIT_DIS_GCLK_TKIP_8822B BIT(13)
8030 #define BIT_AES_SEL_QC_1_8822B BIT(12)
8031 #define BIT_AES_SEL_QC_0_8822B BIT(11)
8032 #define BIT_CHK_BMC_8822B BIT(9)
8033 #define BIT_CHK_KEYID_8822B BIT(8)
8034 #define BIT_RXBCUSEDK_8822B BIT(7)
8035 #define BIT_TXBCUSEDK_8822B BIT(6)
8036 #define BIT_NOSKMC_8822B BIT(5)
8037 #define BIT_SKBYA2_8822B BIT(4)
8038 #define BIT_RXDEC_8822B BIT(3)
8039 #define BIT_TXENC_8822B BIT(2)
8040 #define BIT_RXUHUSEDK_8822B BIT(1)
8041 #define BIT_TXUHUSEDK_8822B BIT(0)
8043 /* 2 REG_RXFILTER_ACTION_3_8822B */
8045 #define BIT_SHIFT_RXFILTER_ACTION_3_8822B 0
8046 #define BIT_MASK_RXFILTER_ACTION_3_8822B 0xff
8047 #define BIT_RXFILTER_ACTION_3_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_3_8822B) << BIT_SHIFT_RXFILTER_ACTION_3_8822B)
8048 #define BIT_GET_RXFILTER_ACTION_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8822B) & BIT_MASK_RXFILTER_ACTION_3_8822B)
8051 /* 2 REG_RXFILTER_CATEGORY_3_8822B */
8053 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8822B 0
8054 #define BIT_MASK_RXFILTER_CATEGORY_3_8822B 0xff
8055 #define BIT_RXFILTER_CATEGORY_3_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_3_8822B)
8056 #define BIT_GET_RXFILTER_CATEGORY_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8822B) & BIT_MASK_RXFILTER_CATEGORY_3_8822B)
8059 /* 2 REG_RXFILTER_ACTION_2_8822B */
8061 #define BIT_SHIFT_RXFILTER_ACTION_2_8822B 0
8062 #define BIT_MASK_RXFILTER_ACTION_2_8822B 0xff
8063 #define BIT_RXFILTER_ACTION_2_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_2_8822B) << BIT_SHIFT_RXFILTER_ACTION_2_8822B)
8064 #define BIT_GET_RXFILTER_ACTION_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8822B) & BIT_MASK_RXFILTER_ACTION_2_8822B)
8067 /* 2 REG_RXFILTER_CATEGORY_2_8822B */
8069 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8822B 0
8070 #define BIT_MASK_RXFILTER_CATEGORY_2_8822B 0xff
8071 #define BIT_RXFILTER_CATEGORY_2_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_2_8822B)
8072 #define BIT_GET_RXFILTER_CATEGORY_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8822B) & BIT_MASK_RXFILTER_CATEGORY_2_8822B)
8075 /* 2 REG_RXFLTMAP4_8822B (RX FILTER MAP GROUP 4) */
8076 #define BIT_CTRLFLT15EN_FW_8822B BIT(15)
8077 #define BIT_CTRLFLT14EN_FW_8822B BIT(14)
8078 #define BIT_CTRLFLT13EN_FW_8822B BIT(13)
8079 #define BIT_CTRLFLT12EN_FW_8822B BIT(12)
8080 #define BIT_CTRLFLT11EN_FW_8822B BIT(11)
8081 #define BIT_CTRLFLT10EN_FW_8822B BIT(10)
8082 #define BIT_CTRLFLT9EN_FW_8822B BIT(9)
8083 #define BIT_CTRLFLT8EN_FW_8822B BIT(8)
8084 #define BIT_CTRLFLT7EN_FW_8822B BIT(7)
8085 #define BIT_CTRLFLT6EN_FW_8822B BIT(6)
8086 #define BIT_CTRLFLT5EN_FW_8822B BIT(5)
8087 #define BIT_CTRLFLT4EN_FW_8822B BIT(4)
8088 #define BIT_CTRLFLT3EN_FW_8822B BIT(3)
8089 #define BIT_CTRLFLT2EN_FW_8822B BIT(2)
8090 #define BIT_CTRLFLT1EN_FW_8822B BIT(1)
8091 #define BIT_CTRLFLT0EN_FW_8822B BIT(0)
8093 /* 2 REG_RXFLTMAP3_8822B (RX FILTER MAP GROUP 3) */
8094 #define BIT_MGTFLT15EN_FW_8822B BIT(15)
8095 #define BIT_MGTFLT14EN_FW_8822B BIT(14)
8096 #define BIT_MGTFLT13EN_FW_8822B BIT(13)
8097 #define BIT_MGTFLT12EN_FW_8822B BIT(12)
8098 #define BIT_MGTFLT11EN_FW_8822B BIT(11)
8099 #define BIT_MGTFLT10EN_FW_8822B BIT(10)
8100 #define BIT_MGTFLT9EN_FW_8822B BIT(9)
8101 #define BIT_MGTFLT8EN_FW_8822B BIT(8)
8102 #define BIT_MGTFLT7EN_FW_8822B BIT(7)
8103 #define BIT_MGTFLT6EN_FW_8822B BIT(6)
8104 #define BIT_MGTFLT5EN_FW_8822B BIT(5)
8105 #define BIT_MGTFLT4EN_FW_8822B BIT(4)
8106 #define BIT_MGTFLT3EN_FW_8822B BIT(3)
8107 #define BIT_MGTFLT2EN_FW_8822B BIT(2)
8108 #define BIT_MGTFLT1EN_FW_8822B BIT(1)
8109 #define BIT_MGTFLT0EN_FW_8822B BIT(0)
8111 /* 2 REG_RXFLTMAP6_8822B (RX FILTER MAP GROUP 3) */
8112 #define BIT_ACTIONFLT15EN_FW_8822B BIT(15)
8113 #define BIT_ACTIONFLT14EN_FW_8822B BIT(14)
8114 #define BIT_ACTIONFLT13EN_FW_8822B BIT(13)
8115 #define BIT_ACTIONFLT12EN_FW_8822B BIT(12)
8116 #define BIT_ACTIONFLT11EN_FW_8822B BIT(11)
8117 #define BIT_ACTIONFLT10EN_FW_8822B BIT(10)
8118 #define BIT_ACTIONFLT9EN_FW_8822B BIT(9)
8119 #define BIT_ACTIONFLT8EN_FW_8822B BIT(8)
8120 #define BIT_ACTIONFLT7EN_FW_8822B BIT(7)
8121 #define BIT_ACTIONFLT6EN_FW_8822B BIT(6)
8122 #define BIT_ACTIONFLT5EN_FW_8822B BIT(5)
8123 #define BIT_ACTIONFLT4EN_FW_8822B BIT(4)
8124 #define BIT_ACTIONFLT3EN_FW_8822B BIT(3)
8125 #define BIT_ACTIONFLT2EN_FW_8822B BIT(2)
8126 #define BIT_ACTIONFLT1EN_FW_8822B BIT(1)
8127 #define BIT_ACTIONFLT0EN_FW_8822B BIT(0)
8129 /* 2 REG_RXFLTMAP5_8822B (RX FILTER MAP GROUP 3) */
8130 #define BIT_DATAFLT15EN_FW_8822B BIT(15)
8131 #define BIT_DATAFLT14EN_FW_8822B BIT(14)
8132 #define BIT_DATAFLT13EN_FW_8822B BIT(13)
8133 #define BIT_DATAFLT12EN_FW_8822B BIT(12)
8134 #define BIT_DATAFLT11EN_FW_8822B BIT(11)
8135 #define BIT_DATAFLT10EN_FW_8822B BIT(10)
8136 #define BIT_DATAFLT9EN_FW_8822B BIT(9)
8137 #define BIT_DATAFLT8EN_FW_8822B BIT(8)
8138 #define BIT_DATAFLT7EN_FW_8822B BIT(7)
8139 #define BIT_DATAFLT6EN_FW_8822B BIT(6)
8140 #define BIT_DATAFLT5EN_FW_8822B BIT(5)
8141 #define BIT_DATAFLT4EN_FW_8822B BIT(4)
8142 #define BIT_DATAFLT3EN_FW_8822B BIT(3)
8143 #define BIT_DATAFLT2EN_FW_8822B BIT(2)
8144 #define BIT_DATAFLT1EN_FW_8822B BIT(1)
8145 #define BIT_DATAFLT0EN_FW_8822B BIT(0)
8147 /* 2 REG_WMMPS_UAPSD_TID_8822B (WMM POWER SAVE UAPSD TID REGISTER) */
8148 #define BIT_WMMPS_UAPSD_TID7_8822B BIT(7)
8149 #define BIT_WMMPS_UAPSD_TID6_8822B BIT(6)
8150 #define BIT_WMMPS_UAPSD_TID5_8822B BIT(5)
8151 #define BIT_WMMPS_UAPSD_TID4_8822B BIT(4)
8152 #define BIT_WMMPS_UAPSD_TID3_8822B BIT(3)
8153 #define BIT_WMMPS_UAPSD_TID2_8822B BIT(2)
8154 #define BIT_WMMPS_UAPSD_TID1_8822B BIT(1)
8155 #define BIT_WMMPS_UAPSD_TID0_8822B BIT(0)
8157 /* 2 REG_PS_RX_INFO_8822B (POWER SAVE RX INFORMATION REGISTER) */
8159 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B 5
8160 #define BIT_MASK_PORTSEL__PS_RX_INFO_8822B 0x7
8161 #define BIT_PORTSEL__PS_RX_INFO_8822B(x) (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B) << BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B)
8162 #define BIT_GET_PORTSEL__PS_RX_INFO_8822B(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B)
8164 #define BIT_RXCTRLIN0_8822B BIT(4)
8165 #define BIT_RXMGTIN0_8822B BIT(3)
8166 #define BIT_RXDATAIN2_8822B BIT(2)
8167 #define BIT_RXDATAIN1_8822B BIT(1)
8168 #define BIT_RXDATAIN0_8822B BIT(0)
8170 /* 2 REG_NAN_RX_TSF_FILTER_8822B(NAN_RX_TSF_ADDRESS_FILTER) */
8171 #define BIT_CHK_TSF_TA_8822B BIT(2)
8172 #define BIT_CHK_TSF_CBSSID_8822B BIT(1)
8173 #define BIT_CHK_TSF_EN_8822B BIT(0)
8175 /* 2 REG_WOW_CTRL_8822B (WAKE ON WLAN CONTROL REGISTER) */
8177 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B 6
8178 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8822B 0x3
8179 #define BIT_PSF_BSSIDSEL_B2B1_8822B(x) (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B) << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B)
8180 #define BIT_GET_PSF_BSSIDSEL_B2B1_8822B(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B)
8182 #define BIT_WOWHCI_8822B BIT(5)
8183 #define BIT_PSF_BSSIDSEL_B0_8822B BIT(4)
8184 #define BIT_UWF_8822B BIT(3)
8185 #define BIT_MAGIC_8822B BIT(2)
8186 #define BIT_WOWEN_8822B BIT(1)
8187 #define BIT_FORCE_WAKEUP_8822B BIT(0)
8189 /* 2 REG_LPNAV_CTRL_8822B (LOW POWER NAV CONTROL REGISTER) */
8190 #define BIT_LPNAV_EN_8822B BIT(31)
8192 #define BIT_SHIFT_LPNAV_EARLY_8822B 16
8193 #define BIT_MASK_LPNAV_EARLY_8822B 0x7fff
8194 #define BIT_LPNAV_EARLY_8822B(x) (((x) & BIT_MASK_LPNAV_EARLY_8822B) << BIT_SHIFT_LPNAV_EARLY_8822B)
8195 #define BIT_GET_LPNAV_EARLY_8822B(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8822B) & BIT_MASK_LPNAV_EARLY_8822B)
8198 #define BIT_SHIFT_LPNAV_TH_8822B 0
8199 #define BIT_MASK_LPNAV_TH_8822B 0xffff
8200 #define BIT_LPNAV_TH_8822B(x) (((x) & BIT_MASK_LPNAV_TH_8822B) << BIT_SHIFT_LPNAV_TH_8822B)
8201 #define BIT_GET_LPNAV_TH_8822B(x) (((x) >> BIT_SHIFT_LPNAV_TH_8822B) & BIT_MASK_LPNAV_TH_8822B)
8204 /* 2 REG_WKFMCAM_CMD_8822B (WAKEUP FRAME CAM COMMAND REGISTER) */
8205 #define BIT_WKFCAM_POLLING_V1_8822B BIT(31)
8206 #define BIT_WKFCAM_CLR_V1_8822B BIT(30)
8207 #define BIT_WKFCAM_WE_8822B BIT(16)
8209 #define BIT_SHIFT_WKFCAM_ADDR_V1_8822B 7
8210 #define BIT_MASK_WKFCAM_ADDR_V1_8822B 0x1ff
8211 #define BIT_WKFCAM_ADDR_V1_8822B(x) (((x) & BIT_MASK_WKFCAM_ADDR_V1_8822B) << BIT_SHIFT_WKFCAM_ADDR_V1_8822B)
8212 #define BIT_GET_WKFCAM_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V1_8822B) & BIT_MASK_WKFCAM_ADDR_V1_8822B)
8215 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B 0
8216 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8822B 0xff
8217 #define BIT_WKFCAM_CAM_NUM_V1_8822B(x) (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B) << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B)
8218 #define BIT_GET_WKFCAM_CAM_NUM_V1_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B)
8221 /* 2 REG_WKFMCAM_RWD_8822B (WAKEUP FRAME READ/WRITE DATA) */
8223 #define BIT_SHIFT_WKFMCAM_RWD_8822B 0
8224 #define BIT_MASK_WKFMCAM_RWD_8822B 0xffffffffL
8225 #define BIT_WKFMCAM_RWD_8822B(x) (((x) & BIT_MASK_WKFMCAM_RWD_8822B) << BIT_SHIFT_WKFMCAM_RWD_8822B)
8226 #define BIT_GET_WKFMCAM_RWD_8822B(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8822B) & BIT_MASK_WKFMCAM_RWD_8822B)
8229 /* 2 REG_RXFLTMAP1_8822B (RX FILTER MAP GROUP 1) */
8230 #define BIT_CTRLFLT15EN_8822B BIT(15)
8231 #define BIT_CTRLFLT14EN_8822B BIT(14)
8232 #define BIT_CTRLFLT13EN_8822B BIT(13)
8233 #define BIT_CTRLFLT12EN_8822B BIT(12)
8234 #define BIT_CTRLFLT11EN_8822B BIT(11)
8235 #define BIT_CTRLFLT10EN_8822B BIT(10)
8236 #define BIT_CTRLFLT9EN_8822B BIT(9)
8237 #define BIT_CTRLFLT8EN_8822B BIT(8)
8238 #define BIT_CTRLFLT7EN_8822B BIT(7)
8239 #define BIT_CTRLFLT6EN_8822B BIT(6)
8240 #define BIT_CTRLFLT5EN_8822B BIT(5)
8241 #define BIT_CTRLFLT4EN_8822B BIT(4)
8242 #define BIT_CTRLFLT3EN_8822B BIT(3)
8243 #define BIT_CTRLFLT2EN_8822B BIT(2)
8244 #define BIT_CTRLFLT1EN_8822B BIT(1)
8245 #define BIT_CTRLFLT0EN_8822B BIT(0)
8247 /* 2 REG_RXFLTMAP0_8822B (RX FILTER MAP GROUP 0) */
8248 #define BIT_MGTFLT15EN_8822B BIT(15)
8249 #define BIT_MGTFLT14EN_8822B BIT(14)
8250 #define BIT_MGTFLT13EN_8822B BIT(13)
8251 #define BIT_MGTFLT12EN_8822B BIT(12)
8252 #define BIT_MGTFLT11EN_8822B BIT(11)
8253 #define BIT_MGTFLT10EN_8822B BIT(10)
8254 #define BIT_MGTFLT9EN_8822B BIT(9)
8255 #define BIT_MGTFLT8EN_8822B BIT(8)
8256 #define BIT_MGTFLT7EN_8822B BIT(7)
8257 #define BIT_MGTFLT6EN_8822B BIT(6)
8258 #define BIT_MGTFLT5EN_8822B BIT(5)
8259 #define BIT_MGTFLT4EN_8822B BIT(4)
8260 #define BIT_MGTFLT3EN_8822B BIT(3)
8261 #define BIT_MGTFLT2EN_8822B BIT(2)
8262 #define BIT_MGTFLT1EN_8822B BIT(1)
8263 #define BIT_MGTFLT0EN_8822B BIT(0)
8265 /* 2 REG_NOT_VALID_8822B */
8267 /* 2 REG_RXFLTMAP_8822B (RX FILTER MAP GROUP 2) */
8268 #define BIT_DATAFLT15EN_8822B BIT(15)
8269 #define BIT_DATAFLT14EN_8822B BIT(14)
8270 #define BIT_DATAFLT13EN_8822B BIT(13)
8271 #define BIT_DATAFLT12EN_8822B BIT(12)
8272 #define BIT_DATAFLT11EN_8822B BIT(11)
8273 #define BIT_DATAFLT10EN_8822B BIT(10)
8274 #define BIT_DATAFLT9EN_8822B BIT(9)
8275 #define BIT_DATAFLT8EN_8822B BIT(8)
8276 #define BIT_DATAFLT7EN_8822B BIT(7)
8277 #define BIT_DATAFLT6EN_8822B BIT(6)
8278 #define BIT_DATAFLT5EN_8822B BIT(5)
8279 #define BIT_DATAFLT4EN_8822B BIT(4)
8280 #define BIT_DATAFLT3EN_8822B BIT(3)
8281 #define BIT_DATAFLT2EN_8822B BIT(2)
8282 #define BIT_DATAFLT1EN_8822B BIT(1)
8283 #define BIT_DATAFLT0EN_8822B BIT(0)
8285 /* 2 REG_BCN_PSR_RPT_8822B (BEACON PARSER REPORT REGISTER) */
8287 #define BIT_SHIFT_DTIM_CNT_8822B 24
8288 #define BIT_MASK_DTIM_CNT_8822B 0xff
8289 #define BIT_DTIM_CNT_8822B(x) (((x) & BIT_MASK_DTIM_CNT_8822B) << BIT_SHIFT_DTIM_CNT_8822B)
8290 #define BIT_GET_DTIM_CNT_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT_8822B) & BIT_MASK_DTIM_CNT_8822B)
8293 #define BIT_SHIFT_DTIM_PERIOD_8822B 16
8294 #define BIT_MASK_DTIM_PERIOD_8822B 0xff
8295 #define BIT_DTIM_PERIOD_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD_8822B) << BIT_SHIFT_DTIM_PERIOD_8822B)
8296 #define BIT_GET_DTIM_PERIOD_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8822B) & BIT_MASK_DTIM_PERIOD_8822B)
8298 #define BIT_DTIM_8822B BIT(15)
8299 #define BIT_TIM_8822B BIT(14)
8301 #define BIT_SHIFT_PS_AID_0_8822B 0
8302 #define BIT_MASK_PS_AID_0_8822B 0x7ff
8303 #define BIT_PS_AID_0_8822B(x) (((x) & BIT_MASK_PS_AID_0_8822B) << BIT_SHIFT_PS_AID_0_8822B)
8304 #define BIT_GET_PS_AID_0_8822B(x) (((x) >> BIT_SHIFT_PS_AID_0_8822B) & BIT_MASK_PS_AID_0_8822B)
8307 /* 2 REG_FLC_TRPC_8822B (TIMER OF FLC_RPC) */
8308 #define BIT_FLC_RPCT_V1_8822B BIT(7)
8309 #define BIT_MODE_8822B BIT(6)
8311 #define BIT_SHIFT_TRPCD_8822B 0
8312 #define BIT_MASK_TRPCD_8822B 0x3f
8313 #define BIT_TRPCD_8822B(x) (((x) & BIT_MASK_TRPCD_8822B) << BIT_SHIFT_TRPCD_8822B)
8314 #define BIT_GET_TRPCD_8822B(x) (((x) >> BIT_SHIFT_TRPCD_8822B) & BIT_MASK_TRPCD_8822B)
8317 /* 2 REG_FLC_PTS_8822B (PKT TYPE SELECTION OF FLC_RPC T) */
8318 #define BIT_CMF_8822B BIT(2)
8319 #define BIT_CCF_8822B BIT(1)
8320 #define BIT_CDF_8822B BIT(0)
8322 /* 2 REG_FLC_RPCT_8822B (FLC_RPC THRESHOLD) */
8324 #define BIT_SHIFT_FLC_RPCT_8822B 0
8325 #define BIT_MASK_FLC_RPCT_8822B 0xff
8326 #define BIT_FLC_RPCT_8822B(x) (((x) & BIT_MASK_FLC_RPCT_8822B) << BIT_SHIFT_FLC_RPCT_8822B)
8327 #define BIT_GET_FLC_RPCT_8822B(x) (((x) >> BIT_SHIFT_FLC_RPCT_8822B) & BIT_MASK_FLC_RPCT_8822B)
8330 /* 2 REG_FLC_RPC_8822B (FW LPS CONDITION -- RX PKT COUNTER) */
8332 #define BIT_SHIFT_FLC_RPC_8822B 0
8333 #define BIT_MASK_FLC_RPC_8822B 0xff
8334 #define BIT_FLC_RPC_8822B(x) (((x) & BIT_MASK_FLC_RPC_8822B) << BIT_SHIFT_FLC_RPC_8822B)
8335 #define BIT_GET_FLC_RPC_8822B(x) (((x) >> BIT_SHIFT_FLC_RPC_8822B) & BIT_MASK_FLC_RPC_8822B)
8338 /* 2 REG_RXPKTMON_CTRL_8822B */
8340 #define BIT_SHIFT_RXBKQPKT_SEQ_8822B 20
8341 #define BIT_MASK_RXBKQPKT_SEQ_8822B 0xf
8342 #define BIT_RXBKQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXBKQPKT_SEQ_8822B) << BIT_SHIFT_RXBKQPKT_SEQ_8822B)
8343 #define BIT_GET_RXBKQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8822B) & BIT_MASK_RXBKQPKT_SEQ_8822B)
8346 #define BIT_SHIFT_RXBEQPKT_SEQ_8822B 16
8347 #define BIT_MASK_RXBEQPKT_SEQ_8822B 0xf
8348 #define BIT_RXBEQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXBEQPKT_SEQ_8822B) << BIT_SHIFT_RXBEQPKT_SEQ_8822B)
8349 #define BIT_GET_RXBEQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8822B) & BIT_MASK_RXBEQPKT_SEQ_8822B)
8352 #define BIT_SHIFT_RXVIQPKT_SEQ_8822B 12
8353 #define BIT_MASK_RXVIQPKT_SEQ_8822B 0xf
8354 #define BIT_RXVIQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXVIQPKT_SEQ_8822B) << BIT_SHIFT_RXVIQPKT_SEQ_8822B)
8355 #define BIT_GET_RXVIQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8822B) & BIT_MASK_RXVIQPKT_SEQ_8822B)
8358 #define BIT_SHIFT_RXVOQPKT_SEQ_8822B 8
8359 #define BIT_MASK_RXVOQPKT_SEQ_8822B 0xf
8360 #define BIT_RXVOQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXVOQPKT_SEQ_8822B) << BIT_SHIFT_RXVOQPKT_SEQ_8822B)
8361 #define BIT_GET_RXVOQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8822B) & BIT_MASK_RXVOQPKT_SEQ_8822B)
8363 #define BIT_RXBKQPKT_ERR_8822B BIT(7)
8364 #define BIT_RXBEQPKT_ERR_8822B BIT(6)
8365 #define BIT_RXVIQPKT_ERR_8822B BIT(5)
8366 #define BIT_RXVOQPKT_ERR_8822B BIT(4)
8367 #define BIT_RXDMA_MON_EN_8822B BIT(2)
8368 #define BIT_RXPKT_MON_RST_8822B BIT(1)
8369 #define BIT_RXPKT_MON_EN_8822B BIT(0)
8371 /* 2 REG_STATE_MON_8822B */
8373 #define BIT_SHIFT_STATE_SEL_8822B 24
8374 #define BIT_MASK_STATE_SEL_8822B 0x1f
8375 #define BIT_STATE_SEL_8822B(x) (((x) & BIT_MASK_STATE_SEL_8822B) << BIT_SHIFT_STATE_SEL_8822B)
8376 #define BIT_GET_STATE_SEL_8822B(x) (((x) >> BIT_SHIFT_STATE_SEL_8822B) & BIT_MASK_STATE_SEL_8822B)
8379 #define BIT_SHIFT_STATE_INFO_8822B 8
8380 #define BIT_MASK_STATE_INFO_8822B 0xff
8381 #define BIT_STATE_INFO_8822B(x) (((x) & BIT_MASK_STATE_INFO_8822B) << BIT_SHIFT_STATE_INFO_8822B)
8382 #define BIT_GET_STATE_INFO_8822B(x) (((x) >> BIT_SHIFT_STATE_INFO_8822B) & BIT_MASK_STATE_INFO_8822B)
8384 #define BIT_UPD_NXT_STATE_8822B BIT(7)
8386 #define BIT_SHIFT_CUR_STATE_8822B 0
8387 #define BIT_MASK_CUR_STATE_8822B 0x7f
8388 #define BIT_CUR_STATE_8822B(x) (((x) & BIT_MASK_CUR_STATE_8822B) << BIT_SHIFT_CUR_STATE_8822B)
8389 #define BIT_GET_CUR_STATE_8822B(x) (((x) >> BIT_SHIFT_CUR_STATE_8822B) & BIT_MASK_CUR_STATE_8822B)
8392 /* 2 REG_ERROR_MON_8822B */
8393 #define BIT_MACRX_ERR_1_8822B BIT(17)
8394 #define BIT_MACRX_ERR_0_8822B BIT(16)
8395 #define BIT_MACTX_ERR_3_8822B BIT(3)
8396 #define BIT_MACTX_ERR_2_8822B BIT(2)
8397 #define BIT_MACTX_ERR_1_8822B BIT(1)
8398 #define BIT_MACTX_ERR_0_8822B BIT(0)
8400 /* 2 REG_SEARCH_MACID_8822B */
8401 #define BIT_EN_TXRPTBUF_CLK_8822B BIT(31)
8403 #define BIT_SHIFT_INFO_INDEX_OFFSET_8822B 16
8404 #define BIT_MASK_INFO_INDEX_OFFSET_8822B 0x1fff
8405 #define BIT_INFO_INDEX_OFFSET_8822B(x) (((x) & BIT_MASK_INFO_INDEX_OFFSET_8822B) << BIT_SHIFT_INFO_INDEX_OFFSET_8822B)
8406 #define BIT_GET_INFO_INDEX_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8822B) & BIT_MASK_INFO_INDEX_OFFSET_8822B)
8408 #define BIT_WMAC_SRCH_FIFOFULL_8822B BIT(15)
8409 #define BIT_DIS_INFOSRCH_8822B BIT(14)
8410 #define BIT_DISABLE_B0_8822B BIT(13)
8412 #define BIT_SHIFT_INFO_ADDR_OFFSET_8822B 0
8413 #define BIT_MASK_INFO_ADDR_OFFSET_8822B 0x1fff
8414 #define BIT_INFO_ADDR_OFFSET_8822B(x) (((x) & BIT_MASK_INFO_ADDR_OFFSET_8822B) << BIT_SHIFT_INFO_ADDR_OFFSET_8822B)
8415 #define BIT_GET_INFO_ADDR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8822B) & BIT_MASK_INFO_ADDR_OFFSET_8822B)
8418 /* 2 REG_BT_COEX_TABLE_8822B (BT-COEXISTENCE CONTROL REGISTER) */
8419 #define BIT_PRI_MASK_RX_RESP_8822B BIT(126)
8420 #define BIT_PRI_MASK_RXOFDM_8822B BIT(125)
8421 #define BIT_PRI_MASK_RXCCK_8822B BIT(124)
8423 #define BIT_SHIFT_PRI_MASK_TXAC_8822B (117 & CPU_OPT_WIDTH)
8424 #define BIT_MASK_PRI_MASK_TXAC_8822B 0x7f
8425 #define BIT_PRI_MASK_TXAC_8822B(x) (((x) & BIT_MASK_PRI_MASK_TXAC_8822B) << BIT_SHIFT_PRI_MASK_TXAC_8822B)
8426 #define BIT_GET_PRI_MASK_TXAC_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8822B) & BIT_MASK_PRI_MASK_TXAC_8822B)
8429 #define BIT_SHIFT_PRI_MASK_NAV_8822B (109 & CPU_OPT_WIDTH)
8430 #define BIT_MASK_PRI_MASK_NAV_8822B 0xff
8431 #define BIT_PRI_MASK_NAV_8822B(x) (((x) & BIT_MASK_PRI_MASK_NAV_8822B) << BIT_SHIFT_PRI_MASK_NAV_8822B)
8432 #define BIT_GET_PRI_MASK_NAV_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8822B) & BIT_MASK_PRI_MASK_NAV_8822B)
8434 #define BIT_PRI_MASK_CCK_8822B BIT(108)
8435 #define BIT_PRI_MASK_OFDM_8822B BIT(107)
8436 #define BIT_PRI_MASK_RTY_8822B BIT(106)
8438 #define BIT_SHIFT_PRI_MASK_NUM_8822B (102 & CPU_OPT_WIDTH)
8439 #define BIT_MASK_PRI_MASK_NUM_8822B 0xf
8440 #define BIT_PRI_MASK_NUM_8822B(x) (((x) & BIT_MASK_PRI_MASK_NUM_8822B) << BIT_SHIFT_PRI_MASK_NUM_8822B)
8441 #define BIT_GET_PRI_MASK_NUM_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8822B) & BIT_MASK_PRI_MASK_NUM_8822B)
8444 #define BIT_SHIFT_PRI_MASK_TYPE_8822B (98 & CPU_OPT_WIDTH)
8445 #define BIT_MASK_PRI_MASK_TYPE_8822B 0xf
8446 #define BIT_PRI_MASK_TYPE_8822B(x) (((x) & BIT_MASK_PRI_MASK_TYPE_8822B) << BIT_SHIFT_PRI_MASK_TYPE_8822B)
8447 #define BIT_GET_PRI_MASK_TYPE_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8822B) & BIT_MASK_PRI_MASK_TYPE_8822B)
8449 #define BIT_OOB_8822B BIT(97)
8450 #define BIT_ANT_SEL_8822B BIT(96)
8452 #define BIT_SHIFT_BREAK_TABLE_2_8822B (80 & CPU_OPT_WIDTH)
8453 #define BIT_MASK_BREAK_TABLE_2_8822B 0xffff
8454 #define BIT_BREAK_TABLE_2_8822B(x) (((x) & BIT_MASK_BREAK_TABLE_2_8822B) << BIT_SHIFT_BREAK_TABLE_2_8822B)
8455 #define BIT_GET_BREAK_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8822B) & BIT_MASK_BREAK_TABLE_2_8822B)
8458 #define BIT_SHIFT_BREAK_TABLE_1_8822B (64 & CPU_OPT_WIDTH)
8459 #define BIT_MASK_BREAK_TABLE_1_8822B 0xffff
8460 #define BIT_BREAK_TABLE_1_8822B(x) (((x) & BIT_MASK_BREAK_TABLE_1_8822B) << BIT_SHIFT_BREAK_TABLE_1_8822B)
8461 #define BIT_GET_BREAK_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8822B) & BIT_MASK_BREAK_TABLE_1_8822B)
8464 #define BIT_SHIFT_COEX_TABLE_2_8822B (32 & CPU_OPT_WIDTH)
8465 #define BIT_MASK_COEX_TABLE_2_8822B 0xffffffffL
8466 #define BIT_COEX_TABLE_2_8822B(x) (((x) & BIT_MASK_COEX_TABLE_2_8822B) << BIT_SHIFT_COEX_TABLE_2_8822B)
8467 #define BIT_GET_COEX_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8822B) & BIT_MASK_COEX_TABLE_2_8822B)
8470 #define BIT_SHIFT_COEX_TABLE_1_8822B 0
8471 #define BIT_MASK_COEX_TABLE_1_8822B 0xffffffffL
8472 #define BIT_COEX_TABLE_1_8822B(x) (((x) & BIT_MASK_COEX_TABLE_1_8822B) << BIT_SHIFT_COEX_TABLE_1_8822B)
8473 #define BIT_GET_COEX_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8822B) & BIT_MASK_COEX_TABLE_1_8822B)
8476 /* 2 REG_RXCMD_0_8822B */
8477 #define BIT_RXCMD_EN_8822B BIT(31)
8479 #define BIT_SHIFT_RXCMD_INFO_8822B 0
8480 #define BIT_MASK_RXCMD_INFO_8822B 0x7fffffffL
8481 #define BIT_RXCMD_INFO_8822B(x) (((x) & BIT_MASK_RXCMD_INFO_8822B) << BIT_SHIFT_RXCMD_INFO_8822B)
8482 #define BIT_GET_RXCMD_INFO_8822B(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8822B) & BIT_MASK_RXCMD_INFO_8822B)
8485 /* 2 REG_RXCMD_1_8822B */
8487 #define BIT_SHIFT_RXCMD_PRD_8822B 0
8488 #define BIT_MASK_RXCMD_PRD_8822B 0xffff
8489 #define BIT_RXCMD_PRD_8822B(x) (((x) & BIT_MASK_RXCMD_PRD_8822B) << BIT_SHIFT_RXCMD_PRD_8822B)
8490 #define BIT_GET_RXCMD_PRD_8822B(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8822B) & BIT_MASK_RXCMD_PRD_8822B)
8493 /* 2 REG_NOT_VALID_8822B */
8495 /* 2 REG_WMAC_RESP_TXINFO_8822B (RESPONSE TXINFO REGISTER) */
8497 #define BIT_SHIFT_WMAC_RESP_MFB_8822B 25
8498 #define BIT_MASK_WMAC_RESP_MFB_8822B 0x7f
8499 #define BIT_WMAC_RESP_MFB_8822B(x) (((x) & BIT_MASK_WMAC_RESP_MFB_8822B) << BIT_SHIFT_WMAC_RESP_MFB_8822B)
8500 #define BIT_GET_WMAC_RESP_MFB_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8822B) & BIT_MASK_WMAC_RESP_MFB_8822B)
8503 #define BIT_SHIFT_WMAC_ANTINF_SEL_8822B 23
8504 #define BIT_MASK_WMAC_ANTINF_SEL_8822B 0x3
8505 #define BIT_WMAC_ANTINF_SEL_8822B(x) (((x) & BIT_MASK_WMAC_ANTINF_SEL_8822B) << BIT_SHIFT_WMAC_ANTINF_SEL_8822B)
8506 #define BIT_GET_WMAC_ANTINF_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8822B) & BIT_MASK_WMAC_ANTINF_SEL_8822B)
8509 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8822B 21
8510 #define BIT_MASK_WMAC_ANTSEL_SEL_8822B 0x3
8511 #define BIT_WMAC_ANTSEL_SEL_8822B(x) (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8822B) << BIT_SHIFT_WMAC_ANTSEL_SEL_8822B)
8512 #define BIT_GET_WMAC_ANTSEL_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8822B) & BIT_MASK_WMAC_ANTSEL_SEL_8822B)
8515 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B 18
8516 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8822B 0x7
8517 #define BIT_R_WMAC_RESP_TXPOWER_8822B(x) (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B) << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B)
8518 #define BIT_GET_R_WMAC_RESP_TXPOWER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B)
8521 #define BIT_SHIFT_WMAC_RESP_TXANT_8822B 0
8522 #define BIT_MASK_WMAC_RESP_TXANT_8822B 0x3ffff
8523 #define BIT_WMAC_RESP_TXANT_8822B(x) (((x) & BIT_MASK_WMAC_RESP_TXANT_8822B) << BIT_SHIFT_WMAC_RESP_TXANT_8822B)
8524 #define BIT_GET_WMAC_RESP_TXANT_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8822B) & BIT_MASK_WMAC_RESP_TXANT_8822B)
8527 /* 2 REG_BBPSF_CTRL_8822B */
8528 #define BIT_CTL_IDLE_CLR_CSI_RPT_8822B BIT(31)
8529 #define BIT_WMAC_USE_NDPARATE_8822B BIT(30)
8531 #define BIT_SHIFT_WMAC_CSI_RATE_8822B 24
8532 #define BIT_MASK_WMAC_CSI_RATE_8822B 0x3f
8533 #define BIT_WMAC_CSI_RATE_8822B(x) (((x) & BIT_MASK_WMAC_CSI_RATE_8822B) << BIT_SHIFT_WMAC_CSI_RATE_8822B)
8534 #define BIT_GET_WMAC_CSI_RATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8822B) & BIT_MASK_WMAC_CSI_RATE_8822B)
8537 #define BIT_SHIFT_WMAC_RESP_TXRATE_8822B 16
8538 #define BIT_MASK_WMAC_RESP_TXRATE_8822B 0xff
8539 #define BIT_WMAC_RESP_TXRATE_8822B(x) (((x) & BIT_MASK_WMAC_RESP_TXRATE_8822B) << BIT_SHIFT_WMAC_RESP_TXRATE_8822B)
8540 #define BIT_GET_WMAC_RESP_TXRATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8822B) & BIT_MASK_WMAC_RESP_TXRATE_8822B)
8542 #define BIT_BBPSF_MPDUCHKEN_8822B BIT(5)
8543 #define BIT_BBPSF_MHCHKEN_8822B BIT(4)
8544 #define BIT_BBPSF_ERRCHKEN_8822B BIT(3)
8546 #define BIT_SHIFT_BBPSF_ERRTHR_8822B 0
8547 #define BIT_MASK_BBPSF_ERRTHR_8822B 0x7
8548 #define BIT_BBPSF_ERRTHR_8822B(x) (((x) & BIT_MASK_BBPSF_ERRTHR_8822B) << BIT_SHIFT_BBPSF_ERRTHR_8822B)
8549 #define BIT_GET_BBPSF_ERRTHR_8822B(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8822B) & BIT_MASK_BBPSF_ERRTHR_8822B)
8552 /* 2 REG_NOT_VALID_8822B */
8554 /* 2 REG_P2P_RX_BCN_NOA_8822B (P2P RX BEACON NOA REGISTER) */
8555 #define BIT_NOA_PARSER_EN_8822B BIT(15)
8556 #define BIT_BSSID_SEL_8822B BIT(14)
8558 #define BIT_SHIFT_P2P_OUI_TYPE_8822B 0
8559 #define BIT_MASK_P2P_OUI_TYPE_8822B 0xff
8560 #define BIT_P2P_OUI_TYPE_8822B(x) (((x) & BIT_MASK_P2P_OUI_TYPE_8822B) << BIT_SHIFT_P2P_OUI_TYPE_8822B)
8561 #define BIT_GET_P2P_OUI_TYPE_8822B(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8822B) & BIT_MASK_P2P_OUI_TYPE_8822B)
8564 /* 2 REG_ASSOCIATED_BFMER0_INFO_8822B (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
8566 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B (48 & CPU_OPT_WIDTH)
8567 #define BIT_MASK_R_WMAC_TXCSI_AID0_8822B 0x1ff
8568 #define BIT_R_WMAC_TXCSI_AID0_8822B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B) << BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B)
8569 #define BIT_GET_R_WMAC_TXCSI_AID0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B)
8572 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B 0
8573 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B 0xffffffffffffL
8574 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8822B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B)
8575 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B)
8578 /* 2 REG_ASSOCIATED_BFMER1_INFO_8822B (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
8580 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B (48 & CPU_OPT_WIDTH)
8581 #define BIT_MASK_R_WMAC_TXCSI_AID1_8822B 0x1ff
8582 #define BIT_R_WMAC_TXCSI_AID1_8822B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B) << BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B)
8583 #define BIT_GET_R_WMAC_TXCSI_AID1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B)
8586 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B 0
8587 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B 0xffffffffffffL
8588 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8822B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B)
8589 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B)
8592 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8822B (TX CSI REPORT PARAMETER REGISTER) */
8594 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B 16
8595 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8822B 0xfff
8596 #define BIT_R_WMAC_BFINFO_20M_1_8822B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B) << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B)
8597 #define BIT_GET_R_WMAC_BFINFO_20M_1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B)
8600 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B 0
8601 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8822B 0xfff
8602 #define BIT_R_WMAC_BFINFO_20M_0_8822B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B) << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B)
8603 #define BIT_GET_R_WMAC_BFINFO_20M_0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B)
8606 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8822B (TX CSI REPORT PARAMETER_BW40 REGISTER) */
8608 #define BIT_SHIFT_WMAC_RESP_ANTCD_8822B 0
8609 #define BIT_MASK_WMAC_RESP_ANTCD_8822B 0xf
8610 #define BIT_WMAC_RESP_ANTCD_8822B(x) (((x) & BIT_MASK_WMAC_RESP_ANTCD_8822B) << BIT_SHIFT_WMAC_RESP_ANTCD_8822B)
8611 #define BIT_GET_WMAC_RESP_ANTCD_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8822B) & BIT_MASK_WMAC_RESP_ANTCD_8822B)
8614 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8822B (TX CSI REPORT PARAMETER_BW80 REGISTER) */
8616 /* 2 REG_BCN_PSR_RPT2_8822B (BEACON PARSER REPORT REGISTER2) */
8618 #define BIT_SHIFT_DTIM_CNT2_8822B 24
8619 #define BIT_MASK_DTIM_CNT2_8822B 0xff
8620 #define BIT_DTIM_CNT2_8822B(x) (((x) & BIT_MASK_DTIM_CNT2_8822B) << BIT_SHIFT_DTIM_CNT2_8822B)
8621 #define BIT_GET_DTIM_CNT2_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8822B) & BIT_MASK_DTIM_CNT2_8822B)
8624 #define BIT_SHIFT_DTIM_PERIOD2_8822B 16
8625 #define BIT_MASK_DTIM_PERIOD2_8822B 0xff
8626 #define BIT_DTIM_PERIOD2_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD2_8822B) << BIT_SHIFT_DTIM_PERIOD2_8822B)
8627 #define BIT_GET_DTIM_PERIOD2_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8822B) & BIT_MASK_DTIM_PERIOD2_8822B)
8629 #define BIT_DTIM2_8822B BIT(15)
8630 #define BIT_TIM2_8822B BIT(14)
8632 #define BIT_SHIFT_PS_AID_2_8822B 0
8633 #define BIT_MASK_PS_AID_2_8822B 0x7ff
8634 #define BIT_PS_AID_2_8822B(x) (((x) & BIT_MASK_PS_AID_2_8822B) << BIT_SHIFT_PS_AID_2_8822B)
8635 #define BIT_GET_PS_AID_2_8822B(x) (((x) >> BIT_SHIFT_PS_AID_2_8822B) & BIT_MASK_PS_AID_2_8822B)
8638 /* 2 REG_BCN_PSR_RPT3_8822B (BEACON PARSER REPORT REGISTER3) */
8640 #define BIT_SHIFT_DTIM_CNT3_8822B 24
8641 #define BIT_MASK_DTIM_CNT3_8822B 0xff
8642 #define BIT_DTIM_CNT3_8822B(x) (((x) & BIT_MASK_DTIM_CNT3_8822B) << BIT_SHIFT_DTIM_CNT3_8822B)
8643 #define BIT_GET_DTIM_CNT3_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8822B) & BIT_MASK_DTIM_CNT3_8822B)
8646 #define BIT_SHIFT_DTIM_PERIOD3_8822B 16
8647 #define BIT_MASK_DTIM_PERIOD3_8822B 0xff
8648 #define BIT_DTIM_PERIOD3_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD3_8822B) << BIT_SHIFT_DTIM_PERIOD3_8822B)
8649 #define BIT_GET_DTIM_PERIOD3_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8822B) & BIT_MASK_DTIM_PERIOD3_8822B)
8651 #define BIT_DTIM3_8822B BIT(15)
8652 #define BIT_TIM3_8822B BIT(14)
8654 #define BIT_SHIFT_PS_AID_3_8822B 0
8655 #define BIT_MASK_PS_AID_3_8822B 0x7ff
8656 #define BIT_PS_AID_3_8822B(x) (((x) & BIT_MASK_PS_AID_3_8822B) << BIT_SHIFT_PS_AID_3_8822B)
8657 #define BIT_GET_PS_AID_3_8822B(x) (((x) >> BIT_SHIFT_PS_AID_3_8822B) & BIT_MASK_PS_AID_3_8822B)
8660 /* 2 REG_BCN_PSR_RPT4_8822B (BEACON PARSER REPORT REGISTER4) */
8662 #define BIT_SHIFT_DTIM_CNT4_8822B 24
8663 #define BIT_MASK_DTIM_CNT4_8822B 0xff
8664 #define BIT_DTIM_CNT4_8822B(x) (((x) & BIT_MASK_DTIM_CNT4_8822B) << BIT_SHIFT_DTIM_CNT4_8822B)
8665 #define BIT_GET_DTIM_CNT4_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8822B) & BIT_MASK_DTIM_CNT4_8822B)
8668 #define BIT_SHIFT_DTIM_PERIOD4_8822B 16
8669 #define BIT_MASK_DTIM_PERIOD4_8822B 0xff
8670 #define BIT_DTIM_PERIOD4_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD4_8822B) << BIT_SHIFT_DTIM_PERIOD4_8822B)
8671 #define BIT_GET_DTIM_PERIOD4_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8822B) & BIT_MASK_DTIM_PERIOD4_8822B)
8673 #define BIT_DTIM4_8822B BIT(15)
8674 #define BIT_TIM4_8822B BIT(14)
8676 #define BIT_SHIFT_PS_AID_4_8822B 0
8677 #define BIT_MASK_PS_AID_4_8822B 0x7ff
8678 #define BIT_PS_AID_4_8822B(x) (((x) & BIT_MASK_PS_AID_4_8822B) << BIT_SHIFT_PS_AID_4_8822B)
8679 #define BIT_GET_PS_AID_4_8822B(x) (((x) >> BIT_SHIFT_PS_AID_4_8822B) & BIT_MASK_PS_AID_4_8822B)
8682 /* 2 REG_A1_ADDR_MASK_8822B (A1 ADDR MASK REGISTER) */
8684 #define BIT_SHIFT_A1_ADDR_MASK_8822B 0
8685 #define BIT_MASK_A1_ADDR_MASK_8822B 0xffffffffL
8686 #define BIT_A1_ADDR_MASK_8822B(x) (((x) & BIT_MASK_A1_ADDR_MASK_8822B) << BIT_SHIFT_A1_ADDR_MASK_8822B)
8687 #define BIT_GET_A1_ADDR_MASK_8822B(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8822B) & BIT_MASK_A1_ADDR_MASK_8822B)
8690 /* 2 REG_MACID2_8822B (MAC ID2 REGISTER) */
8692 #define BIT_SHIFT_MACID2_8822B 0
8693 #define BIT_MASK_MACID2_8822B 0xffffffffffffL
8694 #define BIT_MACID2_8822B(x) (((x) & BIT_MASK_MACID2_8822B) << BIT_SHIFT_MACID2_8822B)
8695 #define BIT_GET_MACID2_8822B(x) (((x) >> BIT_SHIFT_MACID2_8822B) & BIT_MASK_MACID2_8822B)
8698 /* 2 REG_BSSID2_8822B (BSSID2 REGISTER) */
8700 #define BIT_SHIFT_BSSID2_8822B 0
8701 #define BIT_MASK_BSSID2_8822B 0xffffffffffffL
8702 #define BIT_BSSID2_8822B(x) (((x) & BIT_MASK_BSSID2_8822B) << BIT_SHIFT_BSSID2_8822B)
8703 #define BIT_GET_BSSID2_8822B(x) (((x) >> BIT_SHIFT_BSSID2_8822B) & BIT_MASK_BSSID2_8822B)
8706 /* 2 REG_MACID3_8822B (MAC ID3 REGISTER) */
8708 #define BIT_SHIFT_MACID3_8822B 0
8709 #define BIT_MASK_MACID3_8822B 0xffffffffffffL
8710 #define BIT_MACID3_8822B(x) (((x) & BIT_MASK_MACID3_8822B) << BIT_SHIFT_MACID3_8822B)
8711 #define BIT_GET_MACID3_8822B(x) (((x) >> BIT_SHIFT_MACID3_8822B) & BIT_MASK_MACID3_8822B)
8714 /* 2 REG_BSSID3_8822B (BSSID3 REGISTER) */
8716 #define BIT_SHIFT_BSSID3_8822B 0
8717 #define BIT_MASK_BSSID3_8822B 0xffffffffffffL
8718 #define BIT_BSSID3_8822B(x) (((x) & BIT_MASK_BSSID3_8822B) << BIT_SHIFT_BSSID3_8822B)
8719 #define BIT_GET_BSSID3_8822B(x) (((x) >> BIT_SHIFT_BSSID3_8822B) & BIT_MASK_BSSID3_8822B)
8722 /* 2 REG_MACID4_8822B (MAC ID4 REGISTER) */
8724 #define BIT_SHIFT_MACID4_8822B 0
8725 #define BIT_MASK_MACID4_8822B 0xffffffffffffL
8726 #define BIT_MACID4_8822B(x) (((x) & BIT_MASK_MACID4_8822B) << BIT_SHIFT_MACID4_8822B)
8727 #define BIT_GET_MACID4_8822B(x) (((x) >> BIT_SHIFT_MACID4_8822B) & BIT_MASK_MACID4_8822B)
8730 /* 2 REG_BSSID4_8822B (BSSID4 REGISTER) */
8732 #define BIT_SHIFT_BSSID4_8822B 0
8733 #define BIT_MASK_BSSID4_8822B 0xffffffffffffL
8734 #define BIT_BSSID4_8822B(x) (((x) & BIT_MASK_BSSID4_8822B) << BIT_SHIFT_BSSID4_8822B)
8735 #define BIT_GET_BSSID4_8822B(x) (((x) >> BIT_SHIFT_BSSID4_8822B) & BIT_MASK_BSSID4_8822B)
8738 /* 2 REG_NOA_REPORT_8822B */
8740 /* 2 REG_PWRBIT_SETTING_8822B */
8741 #define BIT_CLI3_PWRBIT_OW_EN_8822B BIT(7)
8742 #define BIT_CLI3_PWR_ST_8822B BIT(6)
8743 #define BIT_CLI2_PWRBIT_OW_EN_8822B BIT(5)
8744 #define BIT_CLI2_PWR_ST_8822B BIT(4)
8745 #define BIT_CLI1_PWRBIT_OW_EN_8822B BIT(3)
8746 #define BIT_CLI1_PWR_ST_8822B BIT(2)
8747 #define BIT_CLI0_PWRBIT_OW_EN_8822B BIT(1)
8748 #define BIT_CLI0_PWR_ST_8822B BIT(0)
8750 /* 2 REG_NOT_VALID_8822B */
8752 /* 2 REG_NOT_VALID_8822B */
8754 /* 2 REG_NOT_VALID_8822B */
8756 /* 2 REG_NOT_VALID_8822B */
8758 /* 2 REG_NOT_VALID_8822B */
8760 /* 2 REG_NOT_VALID_8822B */
8762 /* 2 REG_NOT_VALID_8822B */
8764 /* 2 REG_NOT_VALID_8822B */
8766 /* 2 REG_NOT_VALID_8822B */
8768 /* 2 REG_NOT_VALID_8822B */
8770 /* 2 REG_NOT_VALID_8822B */
8772 /* 2 REG_NOT_VALID_8822B */
8774 /* 2 REG_NOT_VALID_8822B */
8776 /* 2 REG_NOT_VALID_8822B */
8778 /* 2 REG_NOT_VALID_8822B */
8780 /* 2 REG_TRANSMIT_ADDRSS_0_8822B (TA0 REGISTER) */
8782 #define BIT_SHIFT_TA0_8822B 0
8783 #define BIT_MASK_TA0_8822B 0xffffffffffffL
8784 #define BIT_TA0_8822B(x) (((x) & BIT_MASK_TA0_8822B) << BIT_SHIFT_TA0_8822B)
8785 #define BIT_GET_TA0_8822B(x) (((x) >> BIT_SHIFT_TA0_8822B) & BIT_MASK_TA0_8822B)
8788 /* 2 REG_TRANSMIT_ADDRSS_1_8822B (TA1 REGISTER) */
8790 #define BIT_SHIFT_TA1_8822B 0
8791 #define BIT_MASK_TA1_8822B 0xffffffffffffL
8792 #define BIT_TA1_8822B(x) (((x) & BIT_MASK_TA1_8822B) << BIT_SHIFT_TA1_8822B)
8793 #define BIT_GET_TA1_8822B(x) (((x) >> BIT_SHIFT_TA1_8822B) & BIT_MASK_TA1_8822B)
8796 /* 2 REG_TRANSMIT_ADDRSS_2_8822B (TA2 REGISTER) */
8798 #define BIT_SHIFT_TA2_8822B 0
8799 #define BIT_MASK_TA2_8822B 0xffffffffffffL
8800 #define BIT_TA2_8822B(x) (((x) & BIT_MASK_TA2_8822B) << BIT_SHIFT_TA2_8822B)
8801 #define BIT_GET_TA2_8822B(x) (((x) >> BIT_SHIFT_TA2_8822B) & BIT_MASK_TA2_8822B)
8804 /* 2 REG_TRANSMIT_ADDRSS_3_8822B (TA3 REGISTER) */
8806 #define BIT_SHIFT_TA3_8822B 0
8807 #define BIT_MASK_TA3_8822B 0xffffffffffffL
8808 #define BIT_TA3_8822B(x) (((x) & BIT_MASK_TA3_8822B) << BIT_SHIFT_TA3_8822B)
8809 #define BIT_GET_TA3_8822B(x) (((x) >> BIT_SHIFT_TA3_8822B) & BIT_MASK_TA3_8822B)
8812 /* 2 REG_TRANSMIT_ADDRSS_4_8822B (TA4 REGISTER) */
8814 #define BIT_SHIFT_TA4_8822B 0
8815 #define BIT_MASK_TA4_8822B 0xffffffffffffL
8816 #define BIT_TA4_8822B(x) (((x) & BIT_MASK_TA4_8822B) << BIT_SHIFT_TA4_8822B)
8817 #define BIT_GET_TA4_8822B(x) (((x) >> BIT_SHIFT_TA4_8822B) & BIT_MASK_TA4_8822B)
8820 /* 2 REG_NOT_VALID_8822B */
8822 /* 2 REG_MACID1_8822B */
8824 #define BIT_SHIFT_MACID1_8822B 0
8825 #define BIT_MASK_MACID1_8822B 0xffffffffffffL
8826 #define BIT_MACID1_8822B(x) (((x) & BIT_MASK_MACID1_8822B) << BIT_SHIFT_MACID1_8822B)
8827 #define BIT_GET_MACID1_8822B(x) (((x) >> BIT_SHIFT_MACID1_8822B) & BIT_MASK_MACID1_8822B)
8830 /* 2 REG_BSSID1_8822B */
8832 #define BIT_SHIFT_BSSID1_8822B 0
8833 #define BIT_MASK_BSSID1_8822B 0xffffffffffffL
8834 #define BIT_BSSID1_8822B(x) (((x) & BIT_MASK_BSSID1_8822B) << BIT_SHIFT_BSSID1_8822B)
8835 #define BIT_GET_BSSID1_8822B(x) (((x) >> BIT_SHIFT_BSSID1_8822B) & BIT_MASK_BSSID1_8822B)
8838 /* 2 REG_BCN_PSR_RPT1_8822B */
8840 #define BIT_SHIFT_DTIM_CNT1_8822B 24
8841 #define BIT_MASK_DTIM_CNT1_8822B 0xff
8842 #define BIT_DTIM_CNT1_8822B(x) (((x) & BIT_MASK_DTIM_CNT1_8822B) << BIT_SHIFT_DTIM_CNT1_8822B)
8843 #define BIT_GET_DTIM_CNT1_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8822B) & BIT_MASK_DTIM_CNT1_8822B)
8846 #define BIT_SHIFT_DTIM_PERIOD1_8822B 16
8847 #define BIT_MASK_DTIM_PERIOD1_8822B 0xff
8848 #define BIT_DTIM_PERIOD1_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD1_8822B) << BIT_SHIFT_DTIM_PERIOD1_8822B)
8849 #define BIT_GET_DTIM_PERIOD1_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8822B) & BIT_MASK_DTIM_PERIOD1_8822B)
8851 #define BIT_DTIM1_8822B BIT(15)
8852 #define BIT_TIM1_8822B BIT(14)
8854 #define BIT_SHIFT_PS_AID_1_8822B 0
8855 #define BIT_MASK_PS_AID_1_8822B 0x7ff
8856 #define BIT_PS_AID_1_8822B(x) (((x) & BIT_MASK_PS_AID_1_8822B) << BIT_SHIFT_PS_AID_1_8822B)
8857 #define BIT_GET_PS_AID_1_8822B(x) (((x) >> BIT_SHIFT_PS_AID_1_8822B) & BIT_MASK_PS_AID_1_8822B)
8860 /* 2 REG_ASSOCIATED_BFMEE_SEL_8822B */
8861 #define BIT_TXUSER_ID1_8822B BIT(25)
8863 #define BIT_SHIFT_AID1_8822B 16
8864 #define BIT_MASK_AID1_8822B 0x1ff
8865 #define BIT_AID1_8822B(x) (((x) & BIT_MASK_AID1_8822B) << BIT_SHIFT_AID1_8822B)
8866 #define BIT_GET_AID1_8822B(x) (((x) >> BIT_SHIFT_AID1_8822B) & BIT_MASK_AID1_8822B)
8868 #define BIT_TXUSER_ID0_8822B BIT(9)
8870 #define BIT_SHIFT_AID0_8822B 0
8871 #define BIT_MASK_AID0_8822B 0x1ff
8872 #define BIT_AID0_8822B(x) (((x) & BIT_MASK_AID0_8822B) << BIT_SHIFT_AID0_8822B)
8873 #define BIT_GET_AID0_8822B(x) (((x) >> BIT_SHIFT_AID0_8822B) & BIT_MASK_AID0_8822B)
8876 /* 2 REG_SND_PTCL_CTRL_8822B */
8878 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B 24
8879 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8822B 0xff
8880 #define BIT_NDP_RX_STANDBY_TIMER_8822B(x) (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B) << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B)
8881 #define BIT_GET_NDP_RX_STANDBY_TIMER_8822B(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B)
8884 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B 16
8885 #define BIT_MASK_CSI_RPT_OFFSET_HT_8822B 0xff
8886 #define BIT_CSI_RPT_OFFSET_HT_8822B(x) (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B) << BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B)
8887 #define BIT_GET_CSI_RPT_OFFSET_HT_8822B(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B)
8890 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B 8
8891 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8822B 0xff
8892 #define BIT_R_WMAC_VHT_CATEGORY_8822B(x) (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B) << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B)
8893 #define BIT_GET_R_WMAC_VHT_CATEGORY_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B)
8895 #define BIT_R_WMAC_USE_NSTS_8822B BIT(7)
8896 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8822B BIT(6)
8897 #define BIT_R_DISABLE_CHECK_VHTSIGA_CRC_8822B BIT(5)
8898 #define BIT_R_WMAC_BFPARAM_SEL_8822B BIT(4)
8899 #define BIT_R_WMAC_CSISEQ_SEL_8822B BIT(3)
8900 #define BIT_R_WMAC_CSI_WITHHTC_EN_8822B BIT(2)
8901 #define BIT_R_WMAC_HT_NDPA_EN_8822B BIT(1)
8902 #define BIT_R_WMAC_VHT_NDPA_EN_8822B BIT(0)
8904 /* 2 REG_RX_CSI_RPT_INFO_8822B */
8906 /* 2 REG_NS_ARP_CTRL_8822B */
8907 #define BIT_R_WMAC_NSARP_RSPEN_8822B BIT(15)
8908 #define BIT_R_WMAC_NSARP_RARP_8822B BIT(9)
8909 #define BIT_R_WMAC_NSARP_RIPV6_8822B BIT(8)
8911 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B 6
8912 #define BIT_MASK_R_WMAC_NSARP_MODEN_8822B 0x3
8913 #define BIT_R_WMAC_NSARP_MODEN_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B) << BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B)
8914 #define BIT_GET_R_WMAC_NSARP_MODEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B)
8917 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B 4
8918 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B 0x3
8919 #define BIT_R_WMAC_NSARP_RSPFTP_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B) << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B)
8920 #define BIT_GET_R_WMAC_NSARP_RSPFTP_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B)
8923 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B 0
8924 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B 0xf
8925 #define BIT_R_WMAC_NSARP_RSPSEC_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B) << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B)
8926 #define BIT_GET_R_WMAC_NSARP_RSPSEC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B)
8929 /* 2 REG_NS_ARP_INFO_8822B */
8930 #define BIT_REQ_IS_MCNS_8822B BIT(23)
8931 #define BIT_REQ_IS_UCNS_8822B BIT(22)
8932 #define BIT_REQ_IS_USNS_8822B BIT(21)
8933 #define BIT_REQ_IS_ARP_8822B BIT(20)
8934 #define BIT_EXPRSP_MH_WITHQC_8822B BIT(19)
8936 #define BIT_SHIFT_EXPRSP_SECTYPE_8822B 16
8937 #define BIT_MASK_EXPRSP_SECTYPE_8822B 0x7
8938 #define BIT_EXPRSP_SECTYPE_8822B(x) (((x) & BIT_MASK_EXPRSP_SECTYPE_8822B) << BIT_SHIFT_EXPRSP_SECTYPE_8822B)
8939 #define BIT_GET_EXPRSP_SECTYPE_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8822B) & BIT_MASK_EXPRSP_SECTYPE_8822B)
8942 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B 8
8943 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B 0xff
8944 #define BIT_EXPRSP_CHKSM_7_TO_0_8822B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B) << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B)
8945 #define BIT_GET_EXPRSP_CHKSM_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B)
8948 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B 0
8949 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B 0xff
8950 #define BIT_EXPRSP_CHKSM_15_TO_8_8822B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B) << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B)
8951 #define BIT_GET_EXPRSP_CHKSM_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B)
8954 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8822B */
8956 #define BIT_SHIFT_WMAC_ARPIP_8822B 0
8957 #define BIT_MASK_WMAC_ARPIP_8822B 0xffffffffL
8958 #define BIT_WMAC_ARPIP_8822B(x) (((x) & BIT_MASK_WMAC_ARPIP_8822B) << BIT_SHIFT_WMAC_ARPIP_8822B)
8959 #define BIT_GET_WMAC_ARPIP_8822B(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8822B) & BIT_MASK_WMAC_ARPIP_8822B)
8962 /* 2 REG_BEAMFORMING_INFO_NSARP_8822B */
8964 #define BIT_SHIFT_BEAMFORMING_INFO_8822B 0
8965 #define BIT_MASK_BEAMFORMING_INFO_8822B 0xffffffffL
8966 #define BIT_BEAMFORMING_INFO_8822B(x) (((x) & BIT_MASK_BEAMFORMING_INFO_8822B) << BIT_SHIFT_BEAMFORMING_INFO_8822B)
8967 #define BIT_GET_BEAMFORMING_INFO_8822B(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8822B) & BIT_MASK_BEAMFORMING_INFO_8822B)
8970 /* 2 REG_NOT_VALID_8822B */
8972 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B 0
8973 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B 0xffffffffffffffffffffffffffffffffL
8974 #define BIT_R_WMAC_IPV6_MYIPAD_8822B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B)
8975 #define BIT_GET_R_WMAC_IPV6_MYIPAD_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B)
8978 /* 2 REG_RSVD_0X740_8822B */
8980 /* 2 REG_WMAC_RTX_CTX_SUBTYPE_CFG_8822B */
8982 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B 4
8983 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B 0xf
8984 #define BIT_R_WMAC_CTX_SUBTYPE_8822B(x) (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B) << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B)
8985 #define BIT_GET_R_WMAC_CTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B)
8988 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B 0
8989 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B 0xf
8990 #define BIT_R_WMAC_RTX_SUBTYPE_8822B(x) (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B) << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B)
8991 #define BIT_GET_R_WMAC_RTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B)
8994 /* 2 REG_WMAC_SWAES_CFG_8822B */
8996 /* 2 REG_BT_COEX_V2_8822B */
8997 #define BIT_GNT_BT_POLARITY_8822B BIT(12)
8998 #define BIT_GNT_BT_BYPASS_PRIORITY_8822B BIT(8)
9000 #define BIT_SHIFT_TIMER_8822B 0
9001 #define BIT_MASK_TIMER_8822B 0xff
9002 #define BIT_TIMER_8822B(x) (((x) & BIT_MASK_TIMER_8822B) << BIT_SHIFT_TIMER_8822B)
9003 #define BIT_GET_TIMER_8822B(x) (((x) >> BIT_SHIFT_TIMER_8822B) & BIT_MASK_TIMER_8822B)
9006 /* 2 REG_BT_COEX_8822B */
9007 #define BIT_R_GNT_BT_RFC_SW_8822B BIT(12)
9008 #define BIT_R_GNT_BT_RFC_SW_EN_8822B BIT(11)
9009 #define BIT_R_GNT_BT_BB_SW_8822B BIT(10)
9010 #define BIT_R_GNT_BT_BB_SW_EN_8822B BIT(9)
9011 #define BIT_R_BT_CNT_THREN_8822B BIT(8)
9013 #define BIT_SHIFT_R_BT_CNT_THR_8822B 0
9014 #define BIT_MASK_R_BT_CNT_THR_8822B 0xff
9015 #define BIT_R_BT_CNT_THR_8822B(x) (((x) & BIT_MASK_R_BT_CNT_THR_8822B) << BIT_SHIFT_R_BT_CNT_THR_8822B)
9016 #define BIT_GET_R_BT_CNT_THR_8822B(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8822B) & BIT_MASK_R_BT_CNT_THR_8822B)
9019 /* 2 REG_WLAN_ACT_MASK_CTRL_8822B */
9020 #define BIT_WLRX_TER_BY_CTL_8822B BIT(43)
9021 #define BIT_WLRX_TER_BY_AD_8822B BIT(42)
9022 #define BIT_ANT_DIVERSITY_SEL_8822B BIT(41)
9023 #define BIT_ANTSEL_FOR_BT_CTRL_EN_8822B BIT(40)
9024 #define BIT_WLACT_LOW_GNTWL_EN_8822B BIT(34)
9025 #define BIT_WLACT_HIGH_GNTBT_EN_8822B BIT(33)
9026 #define BIT_NAV_UPPER_V1_8822B BIT(32)
9028 #define BIT_SHIFT_RXMYRTS_NAV_V1_8822B 8
9029 #define BIT_MASK_RXMYRTS_NAV_V1_8822B 0xff
9030 #define BIT_RXMYRTS_NAV_V1_8822B(x) (((x) & BIT_MASK_RXMYRTS_NAV_V1_8822B) << BIT_SHIFT_RXMYRTS_NAV_V1_8822B)
9031 #define BIT_GET_RXMYRTS_NAV_V1_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8822B) & BIT_MASK_RXMYRTS_NAV_V1_8822B)
9034 #define BIT_SHIFT_RTSRST_V1_8822B 0
9035 #define BIT_MASK_RTSRST_V1_8822B 0xff
9036 #define BIT_RTSRST_V1_8822B(x) (((x) & BIT_MASK_RTSRST_V1_8822B) << BIT_SHIFT_RTSRST_V1_8822B)
9037 #define BIT_GET_RTSRST_V1_8822B(x) (((x) >> BIT_SHIFT_RTSRST_V1_8822B) & BIT_MASK_RTSRST_V1_8822B)
9040 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8822B */
9042 #define BIT_SHIFT_BT_STAT_DELAY_8822B 12
9043 #define BIT_MASK_BT_STAT_DELAY_8822B 0xf
9044 #define BIT_BT_STAT_DELAY_8822B(x) (((x) & BIT_MASK_BT_STAT_DELAY_8822B) << BIT_SHIFT_BT_STAT_DELAY_8822B)
9045 #define BIT_GET_BT_STAT_DELAY_8822B(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8822B) & BIT_MASK_BT_STAT_DELAY_8822B)
9048 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8822B 8
9049 #define BIT_MASK_BT_TRX_INIT_DETECT_8822B 0xf
9050 #define BIT_BT_TRX_INIT_DETECT_8822B(x) (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8822B) << BIT_SHIFT_BT_TRX_INIT_DETECT_8822B)
9051 #define BIT_GET_BT_TRX_INIT_DETECT_8822B(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8822B) & BIT_MASK_BT_TRX_INIT_DETECT_8822B)
9054 #define BIT_SHIFT_BT_PRI_DETECT_TO_8822B 4
9055 #define BIT_MASK_BT_PRI_DETECT_TO_8822B 0xf
9056 #define BIT_BT_PRI_DETECT_TO_8822B(x) (((x) & BIT_MASK_BT_PRI_DETECT_TO_8822B) << BIT_SHIFT_BT_PRI_DETECT_TO_8822B)
9057 #define BIT_GET_BT_PRI_DETECT_TO_8822B(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8822B) & BIT_MASK_BT_PRI_DETECT_TO_8822B)
9059 #define BIT_R_GRANTALL_WLMASK_8822B BIT(3)
9060 #define BIT_STATIS_BT_EN_8822B BIT(2)
9061 #define BIT_WL_ACT_MASK_ENABLE_8822B BIT(1)
9062 #define BIT_ENHANCED_BT_8822B BIT(0)
9064 /* 2 REG_BT_ACT_STATISTICS_8822B */
9066 #define BIT_SHIFT_STATIS_BT_LO_RX_8822B (48 & CPU_OPT_WIDTH)
9067 #define BIT_MASK_STATIS_BT_LO_RX_8822B 0xffff
9068 #define BIT_STATIS_BT_LO_RX_8822B(x) (((x) & BIT_MASK_STATIS_BT_LO_RX_8822B) << BIT_SHIFT_STATIS_BT_LO_RX_8822B)
9069 #define BIT_GET_STATIS_BT_LO_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_8822B) & BIT_MASK_STATIS_BT_LO_RX_8822B)
9072 #define BIT_SHIFT_STATIS_BT_LO_TX_8822B (32 & CPU_OPT_WIDTH)
9073 #define BIT_MASK_STATIS_BT_LO_TX_8822B 0xffff
9074 #define BIT_STATIS_BT_LO_TX_8822B(x) (((x) & BIT_MASK_STATIS_BT_LO_TX_8822B) << BIT_SHIFT_STATIS_BT_LO_TX_8822B)
9075 #define BIT_GET_STATIS_BT_LO_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_8822B) & BIT_MASK_STATIS_BT_LO_TX_8822B)
9078 #define BIT_SHIFT_STATIS_BT_HI_RX_8822B 16
9079 #define BIT_MASK_STATIS_BT_HI_RX_8822B 0xffff
9080 #define BIT_STATIS_BT_HI_RX_8822B(x) (((x) & BIT_MASK_STATIS_BT_HI_RX_8822B) << BIT_SHIFT_STATIS_BT_HI_RX_8822B)
9081 #define BIT_GET_STATIS_BT_HI_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8822B) & BIT_MASK_STATIS_BT_HI_RX_8822B)
9084 #define BIT_SHIFT_STATIS_BT_HI_TX_8822B 0
9085 #define BIT_MASK_STATIS_BT_HI_TX_8822B 0xffff
9086 #define BIT_STATIS_BT_HI_TX_8822B(x) (((x) & BIT_MASK_STATIS_BT_HI_TX_8822B) << BIT_SHIFT_STATIS_BT_HI_TX_8822B)
9087 #define BIT_GET_STATIS_BT_HI_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8822B) & BIT_MASK_STATIS_BT_HI_TX_8822B)
9090 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8822B */
9092 #define BIT_SHIFT_R_BT_CMD_RPT_8822B 16
9093 #define BIT_MASK_R_BT_CMD_RPT_8822B 0xffff
9094 #define BIT_R_BT_CMD_RPT_8822B(x) (((x) & BIT_MASK_R_BT_CMD_RPT_8822B) << BIT_SHIFT_R_BT_CMD_RPT_8822B)
9095 #define BIT_GET_R_BT_CMD_RPT_8822B(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8822B) & BIT_MASK_R_BT_CMD_RPT_8822B)
9098 #define BIT_SHIFT_R_RPT_FROM_BT_8822B 8
9099 #define BIT_MASK_R_RPT_FROM_BT_8822B 0xff
9100 #define BIT_R_RPT_FROM_BT_8822B(x) (((x) & BIT_MASK_R_RPT_FROM_BT_8822B) << BIT_SHIFT_R_RPT_FROM_BT_8822B)
9101 #define BIT_GET_R_RPT_FROM_BT_8822B(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8822B) & BIT_MASK_R_RPT_FROM_BT_8822B)
9104 #define BIT_SHIFT_BT_HID_ISR_SET_8822B 6
9105 #define BIT_MASK_BT_HID_ISR_SET_8822B 0x3
9106 #define BIT_BT_HID_ISR_SET_8822B(x) (((x) & BIT_MASK_BT_HID_ISR_SET_8822B) << BIT_SHIFT_BT_HID_ISR_SET_8822B)
9107 #define BIT_GET_BT_HID_ISR_SET_8822B(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8822B) & BIT_MASK_BT_HID_ISR_SET_8822B)
9109 #define BIT_TDMA_BT_START_NOTIFY_8822B BIT(5)
9110 #define BIT_ENABLE_TDMA_FW_MODE_8822B BIT(4)
9111 #define BIT_ENABLE_PTA_TDMA_MODE_8822B BIT(3)
9112 #define BIT_ENABLE_COEXIST_TAB_IN_TDMA_8822B BIT(2)
9113 #define BIT_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA_8822B BIT(1)
9114 #define BIT_RTK_BT_ENABLE_8822B BIT(0)
9116 /* 2 REG_BT_STATUS_REPORT_REGISTER_8822B */
9118 #define BIT_SHIFT_BT_PROFILE_8822B 24
9119 #define BIT_MASK_BT_PROFILE_8822B 0xff
9120 #define BIT_BT_PROFILE_8822B(x) (((x) & BIT_MASK_BT_PROFILE_8822B) << BIT_SHIFT_BT_PROFILE_8822B)
9121 #define BIT_GET_BT_PROFILE_8822B(x) (((x) >> BIT_SHIFT_BT_PROFILE_8822B) & BIT_MASK_BT_PROFILE_8822B)
9124 #define BIT_SHIFT_BT_POWER_8822B 16
9125 #define BIT_MASK_BT_POWER_8822B 0xff
9126 #define BIT_BT_POWER_8822B(x) (((x) & BIT_MASK_BT_POWER_8822B) << BIT_SHIFT_BT_POWER_8822B)
9127 #define BIT_GET_BT_POWER_8822B(x) (((x) >> BIT_SHIFT_BT_POWER_8822B) & BIT_MASK_BT_POWER_8822B)
9130 #define BIT_SHIFT_BT_PREDECT_STATUS_8822B 8
9131 #define BIT_MASK_BT_PREDECT_STATUS_8822B 0xff
9132 #define BIT_BT_PREDECT_STATUS_8822B(x) (((x) & BIT_MASK_BT_PREDECT_STATUS_8822B) << BIT_SHIFT_BT_PREDECT_STATUS_8822B)
9133 #define BIT_GET_BT_PREDECT_STATUS_8822B(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8822B) & BIT_MASK_BT_PREDECT_STATUS_8822B)
9136 #define BIT_SHIFT_BT_CMD_INFO_8822B 0
9137 #define BIT_MASK_BT_CMD_INFO_8822B 0xff
9138 #define BIT_BT_CMD_INFO_8822B(x) (((x) & BIT_MASK_BT_CMD_INFO_8822B) << BIT_SHIFT_BT_CMD_INFO_8822B)
9139 #define BIT_GET_BT_CMD_INFO_8822B(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8822B) & BIT_MASK_BT_CMD_INFO_8822B)
9142 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8822B */
9143 #define BIT_EN_MAC_NULL_PKT_NOTIFY_8822B BIT(31)
9144 #define BIT_EN_WLAN_RPT_AND_BT_QUERY_8822B BIT(30)
9145 #define BIT_EN_BT_STSTUS_RPT_8822B BIT(29)
9146 #define BIT_EN_BT_POWER_8822B BIT(28)
9147 #define BIT_EN_BT_CHANNEL_8822B BIT(27)
9148 #define BIT_EN_BT_SLOT_CHANGE_8822B BIT(26)
9149 #define BIT_EN_BT_PROFILE_OR_HID_8822B BIT(25)
9150 #define BIT_WLAN_RPT_NOTIFY_8822B BIT(24)
9152 #define BIT_SHIFT_WLAN_RPT_DATA_8822B 16
9153 #define BIT_MASK_WLAN_RPT_DATA_8822B 0xff
9154 #define BIT_WLAN_RPT_DATA_8822B(x) (((x) & BIT_MASK_WLAN_RPT_DATA_8822B) << BIT_SHIFT_WLAN_RPT_DATA_8822B)
9155 #define BIT_GET_WLAN_RPT_DATA_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8822B) & BIT_MASK_WLAN_RPT_DATA_8822B)
9158 #define BIT_SHIFT_CMD_ID_8822B 8
9159 #define BIT_MASK_CMD_ID_8822B 0xff
9160 #define BIT_CMD_ID_8822B(x) (((x) & BIT_MASK_CMD_ID_8822B) << BIT_SHIFT_CMD_ID_8822B)
9161 #define BIT_GET_CMD_ID_8822B(x) (((x) >> BIT_SHIFT_CMD_ID_8822B) & BIT_MASK_CMD_ID_8822B)
9164 #define BIT_SHIFT_BT_DATA_8822B 0
9165 #define BIT_MASK_BT_DATA_8822B 0xff
9166 #define BIT_BT_DATA_8822B(x) (((x) & BIT_MASK_BT_DATA_8822B) << BIT_SHIFT_BT_DATA_8822B)
9167 #define BIT_GET_BT_DATA_8822B(x) (((x) >> BIT_SHIFT_BT_DATA_8822B) & BIT_MASK_BT_DATA_8822B)
9170 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8822B */
9172 #define BIT_SHIFT_WLAN_RPT_TO_8822B 0
9173 #define BIT_MASK_WLAN_RPT_TO_8822B 0xff
9174 #define BIT_WLAN_RPT_TO_8822B(x) (((x) & BIT_MASK_WLAN_RPT_TO_8822B) << BIT_SHIFT_WLAN_RPT_TO_8822B)
9175 #define BIT_GET_WLAN_RPT_TO_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8822B) & BIT_MASK_WLAN_RPT_TO_8822B)
9178 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8822B */
9180 #define BIT_SHIFT_ISOLATION_CHK_8822B 1
9181 #define BIT_MASK_ISOLATION_CHK_8822B 0x7fffffffffffffffffffL
9182 #define BIT_ISOLATION_CHK_8822B(x) (((x) & BIT_MASK_ISOLATION_CHK_8822B) << BIT_SHIFT_ISOLATION_CHK_8822B)
9183 #define BIT_GET_ISOLATION_CHK_8822B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_8822B) & BIT_MASK_ISOLATION_CHK_8822B)
9185 #define BIT_ISOLATION_EN_8822B BIT(0)
9187 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8822B */
9188 #define BIT_BT_HID_ISR_8822B BIT(7)
9189 #define BIT_BT_QUERY_ISR_8822B BIT(6)
9190 #define BIT_MAC_NULL_PKT_NOTIFY_ISR_8822B BIT(5)
9191 #define BIT_WLAN_RPT_ISR_8822B BIT(4)
9192 #define BIT_BT_POWER_ISR_8822B BIT(3)
9193 #define BIT_BT_CHANNEL_ISR_8822B BIT(2)
9194 #define BIT_BT_SLOT_CHANGE_ISR_8822B BIT(1)
9195 #define BIT_BT_PROFILE_ISR_8822B BIT(0)
9197 /* 2 REG_BT_TDMA_TIME_REGISTER_8822B */
9199 #define BIT_SHIFT_BT_TIME_8822B 6
9200 #define BIT_MASK_BT_TIME_8822B 0x3ffffff
9201 #define BIT_BT_TIME_8822B(x) (((x) & BIT_MASK_BT_TIME_8822B) << BIT_SHIFT_BT_TIME_8822B)
9202 #define BIT_GET_BT_TIME_8822B(x) (((x) >> BIT_SHIFT_BT_TIME_8822B) & BIT_MASK_BT_TIME_8822B)
9205 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B 0
9206 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8822B 0x3f
9207 #define BIT_BT_RPT_SAMPLE_RATE_8822B(x) (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B) << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B)
9208 #define BIT_GET_BT_RPT_SAMPLE_RATE_8822B(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B)
9211 /* 2 REG_BT_ACT_REGISTER_8822B */
9213 #define BIT_SHIFT_BT_EISR_EN_8822B 16
9214 #define BIT_MASK_BT_EISR_EN_8822B 0xff
9215 #define BIT_BT_EISR_EN_8822B(x) (((x) & BIT_MASK_BT_EISR_EN_8822B) << BIT_SHIFT_BT_EISR_EN_8822B)
9216 #define BIT_GET_BT_EISR_EN_8822B(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8822B) & BIT_MASK_BT_EISR_EN_8822B)
9218 #define BIT_BT_ACT_FALLING_ISR_8822B BIT(10)
9219 #define BIT_BT_ACT_RISING_ISR_8822B BIT(9)
9220 #define BIT_TDMA_TO_ISR_8822B BIT(8)
9222 #define BIT_SHIFT_BT_CH_8822B 0
9223 #define BIT_MASK_BT_CH_8822B 0xff
9224 #define BIT_BT_CH_8822B(x) (((x) & BIT_MASK_BT_CH_8822B) << BIT_SHIFT_BT_CH_8822B)
9225 #define BIT_GET_BT_CH_8822B(x) (((x) >> BIT_SHIFT_BT_CH_8822B) & BIT_MASK_BT_CH_8822B)
9228 /* 2 REG_OBFF_CTRL_BASIC_8822B */
9229 #define BIT_OBFF_EN_V1_8822B BIT(31)
9231 #define BIT_SHIFT_OBFF_STATE_V1_8822B 28
9232 #define BIT_MASK_OBFF_STATE_V1_8822B 0x3
9233 #define BIT_OBFF_STATE_V1_8822B(x) (((x) & BIT_MASK_OBFF_STATE_V1_8822B) << BIT_SHIFT_OBFF_STATE_V1_8822B)
9234 #define BIT_GET_OBFF_STATE_V1_8822B(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8822B) & BIT_MASK_OBFF_STATE_V1_8822B)
9236 #define BIT_OBFF_ACT_RXDMA_EN_8822B BIT(27)
9237 #define BIT_OBFF_BLOCK_INT_EN_8822B BIT(26)
9238 #define BIT_OBFF_AUTOACT_EN_8822B BIT(25)
9239 #define BIT_OBFF_AUTOIDLE_EN_8822B BIT(24)
9241 #define BIT_SHIFT_WAKE_MAX_PLS_8822B 20
9242 #define BIT_MASK_WAKE_MAX_PLS_8822B 0x7
9243 #define BIT_WAKE_MAX_PLS_8822B(x) (((x) & BIT_MASK_WAKE_MAX_PLS_8822B) << BIT_SHIFT_WAKE_MAX_PLS_8822B)
9244 #define BIT_GET_WAKE_MAX_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8822B) & BIT_MASK_WAKE_MAX_PLS_8822B)
9247 #define BIT_SHIFT_WAKE_MIN_PLS_8822B 16
9248 #define BIT_MASK_WAKE_MIN_PLS_8822B 0x7
9249 #define BIT_WAKE_MIN_PLS_8822B(x) (((x) & BIT_MASK_WAKE_MIN_PLS_8822B) << BIT_SHIFT_WAKE_MIN_PLS_8822B)
9250 #define BIT_GET_WAKE_MIN_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8822B) & BIT_MASK_WAKE_MIN_PLS_8822B)
9253 #define BIT_SHIFT_WAKE_MAX_F2F_8822B 12
9254 #define BIT_MASK_WAKE_MAX_F2F_8822B 0x7
9255 #define BIT_WAKE_MAX_F2F_8822B(x) (((x) & BIT_MASK_WAKE_MAX_F2F_8822B) << BIT_SHIFT_WAKE_MAX_F2F_8822B)
9256 #define BIT_GET_WAKE_MAX_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8822B) & BIT_MASK_WAKE_MAX_F2F_8822B)
9259 #define BIT_SHIFT_WAKE_MIN_F2F_8822B 8
9260 #define BIT_MASK_WAKE_MIN_F2F_8822B 0x7
9261 #define BIT_WAKE_MIN_F2F_8822B(x) (((x) & BIT_MASK_WAKE_MIN_F2F_8822B) << BIT_SHIFT_WAKE_MIN_F2F_8822B)
9262 #define BIT_GET_WAKE_MIN_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8822B) & BIT_MASK_WAKE_MIN_F2F_8822B)
9264 #define BIT_APP_CPU_ACT_V1_8822B BIT(3)
9265 #define BIT_APP_OBFF_V1_8822B BIT(2)
9266 #define BIT_APP_IDLE_V1_8822B BIT(1)
9267 #define BIT_APP_INIT_V1_8822B BIT(0)
9269 /* 2 REG_OBFF_CTRL2_TIMER_8822B */
9271 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B 24
9272 #define BIT_MASK_RX_HIGH_TIMER_IDX_8822B 0x7
9273 #define BIT_RX_HIGH_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B) << BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B)
9274 #define BIT_GET_RX_HIGH_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B)
9277 #define BIT_SHIFT_RX_MED_TIMER_IDX_8822B 16
9278 #define BIT_MASK_RX_MED_TIMER_IDX_8822B 0x7
9279 #define BIT_RX_MED_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_MED_TIMER_IDX_8822B) << BIT_SHIFT_RX_MED_TIMER_IDX_8822B)
9280 #define BIT_GET_RX_MED_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8822B) & BIT_MASK_RX_MED_TIMER_IDX_8822B)
9283 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8822B 8
9284 #define BIT_MASK_RX_LOW_TIMER_IDX_8822B 0x7
9285 #define BIT_RX_LOW_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8822B) << BIT_SHIFT_RX_LOW_TIMER_IDX_8822B)
9286 #define BIT_GET_RX_LOW_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8822B) & BIT_MASK_RX_LOW_TIMER_IDX_8822B)
9289 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B 0
9290 #define BIT_MASK_OBFF_INT_TIMER_IDX_8822B 0x7
9291 #define BIT_OBFF_INT_TIMER_IDX_8822B(x) (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B) << BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B)
9292 #define BIT_GET_OBFF_INT_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B)
9295 /* 2 REG_LTR_CTRL_BASIC_8822B */
9296 #define BIT_LTR_EN_V1_8822B BIT(31)
9297 #define BIT_LTR_HW_EN_V1_8822B BIT(30)
9298 #define BIT_LRT_ACT_CTS_EN_8822B BIT(29)
9299 #define BIT_LTR_ACT_RXPKT_EN_8822B BIT(28)
9300 #define BIT_LTR_ACT_RXDMA_EN_8822B BIT(27)
9301 #define BIT_LTR_IDLE_NO_SNOOP_8822B BIT(26)
9302 #define BIT_SPDUP_MGTPKT_8822B BIT(25)
9303 #define BIT_RX_AGG_EN_8822B BIT(24)
9304 #define BIT_APP_LTR_ACT_8822B BIT(23)
9305 #define BIT_APP_LTR_IDLE_8822B BIT(22)
9307 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B 20
9308 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8822B 0x3
9309 #define BIT_HIGH_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B) << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B)
9310 #define BIT_GET_HIGH_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B)
9313 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8822B 18
9314 #define BIT_MASK_MED_RATE_TRIG_SEL_8822B 0x3
9315 #define BIT_MED_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8822B) << BIT_SHIFT_MED_RATE_TRIG_SEL_8822B)
9316 #define BIT_GET_MED_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8822B) & BIT_MASK_MED_RATE_TRIG_SEL_8822B)
9319 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B 16
9320 #define BIT_MASK_LOW_RATE_TRIG_SEL_8822B 0x3
9321 #define BIT_LOW_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B) << BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B)
9322 #define BIT_GET_LOW_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B)
9325 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8822B 8
9326 #define BIT_MASK_HIGH_RATE_BD_IDX_8822B 0x7f
9327 #define BIT_HIGH_RATE_BD_IDX_8822B(x) (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8822B) << BIT_SHIFT_HIGH_RATE_BD_IDX_8822B)
9328 #define BIT_GET_HIGH_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8822B) & BIT_MASK_HIGH_RATE_BD_IDX_8822B)
9331 #define BIT_SHIFT_LOW_RATE_BD_IDX_8822B 0
9332 #define BIT_MASK_LOW_RATE_BD_IDX_8822B 0x7f
9333 #define BIT_LOW_RATE_BD_IDX_8822B(x) (((x) & BIT_MASK_LOW_RATE_BD_IDX_8822B) << BIT_SHIFT_LOW_RATE_BD_IDX_8822B)
9334 #define BIT_GET_LOW_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8822B) & BIT_MASK_LOW_RATE_BD_IDX_8822B)
9337 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8822B */
9339 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B 24
9340 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8822B 0x7
9341 #define BIT_RX_EMPTY_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B) << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B)
9342 #define BIT_GET_RX_EMPTY_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B)
9345 #define BIT_SHIFT_RX_AFULL_TH_IDX_8822B 20
9346 #define BIT_MASK_RX_AFULL_TH_IDX_8822B 0x7
9347 #define BIT_RX_AFULL_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_AFULL_TH_IDX_8822B) << BIT_SHIFT_RX_AFULL_TH_IDX_8822B)
9348 #define BIT_GET_RX_AFULL_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8822B) & BIT_MASK_RX_AFULL_TH_IDX_8822B)
9351 #define BIT_SHIFT_RX_HIGH_TH_IDX_8822B 16
9352 #define BIT_MASK_RX_HIGH_TH_IDX_8822B 0x7
9353 #define BIT_RX_HIGH_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_HIGH_TH_IDX_8822B) << BIT_SHIFT_RX_HIGH_TH_IDX_8822B)
9354 #define BIT_GET_RX_HIGH_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8822B) & BIT_MASK_RX_HIGH_TH_IDX_8822B)
9357 #define BIT_SHIFT_RX_MED_TH_IDX_8822B 12
9358 #define BIT_MASK_RX_MED_TH_IDX_8822B 0x7
9359 #define BIT_RX_MED_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_MED_TH_IDX_8822B) << BIT_SHIFT_RX_MED_TH_IDX_8822B)
9360 #define BIT_GET_RX_MED_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8822B) & BIT_MASK_RX_MED_TH_IDX_8822B)
9363 #define BIT_SHIFT_RX_LOW_TH_IDX_8822B 8
9364 #define BIT_MASK_RX_LOW_TH_IDX_8822B 0x7
9365 #define BIT_RX_LOW_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_LOW_TH_IDX_8822B) << BIT_SHIFT_RX_LOW_TH_IDX_8822B)
9366 #define BIT_GET_RX_LOW_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8822B) & BIT_MASK_RX_LOW_TH_IDX_8822B)
9369 #define BIT_SHIFT_LTR_SPACE_IDX_8822B 4
9370 #define BIT_MASK_LTR_SPACE_IDX_8822B 0x3
9371 #define BIT_LTR_SPACE_IDX_8822B(x) (((x) & BIT_MASK_LTR_SPACE_IDX_8822B) << BIT_SHIFT_LTR_SPACE_IDX_8822B)
9372 #define BIT_GET_LTR_SPACE_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8822B) & BIT_MASK_LTR_SPACE_IDX_8822B)
9375 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B 0
9376 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8822B 0x7
9377 #define BIT_LTR_IDLE_TIMER_IDX_8822B(x) (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B) << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B)
9378 #define BIT_GET_LTR_IDLE_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B)
9381 /* 2 REG_LTR_IDLE_LATENCY_V1_8822B */
9383 #define BIT_SHIFT_LTR_IDLE_L_8822B 0
9384 #define BIT_MASK_LTR_IDLE_L_8822B 0xffffffffL
9385 #define BIT_LTR_IDLE_L_8822B(x) (((x) & BIT_MASK_LTR_IDLE_L_8822B) << BIT_SHIFT_LTR_IDLE_L_8822B)
9386 #define BIT_GET_LTR_IDLE_L_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8822B) & BIT_MASK_LTR_IDLE_L_8822B)
9389 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8822B */
9391 #define BIT_SHIFT_LTR_ACT_L_8822B 0
9392 #define BIT_MASK_LTR_ACT_L_8822B 0xffffffffL
9393 #define BIT_LTR_ACT_L_8822B(x) (((x) & BIT_MASK_LTR_ACT_L_8822B) << BIT_SHIFT_LTR_ACT_L_8822B)
9394 #define BIT_GET_LTR_ACT_L_8822B(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8822B) & BIT_MASK_LTR_ACT_L_8822B)
9397 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8822B */
9398 #define BIT_APPEND_MACID_IN_RESP_EN_8822B BIT(50)
9399 #define BIT_ADDR2_MATCH_EN_8822B BIT(49)
9400 #define BIT_ANTTRN_EN_8822B BIT(48)
9402 #define BIT_SHIFT_TRAIN_STA_ADDR_8822B 0
9403 #define BIT_MASK_TRAIN_STA_ADDR_8822B 0xffffffffffffL
9404 #define BIT_TRAIN_STA_ADDR_8822B(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_8822B) << BIT_SHIFT_TRAIN_STA_ADDR_8822B)
9405 #define BIT_GET_TRAIN_STA_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_8822B) & BIT_MASK_TRAIN_STA_ADDR_8822B)
9408 /* 2 REG_RSVD_0X7B4_8822B */
9410 /* 2 REG_WMAC_PKTCNT_RWD_8822B */
9412 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8822B 4
9413 #define BIT_MASK_PKTCNT_BSSIDMAP_8822B 0xf
9414 #define BIT_PKTCNT_BSSIDMAP_8822B(x) (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8822B) << BIT_SHIFT_PKTCNT_BSSIDMAP_8822B)
9415 #define BIT_GET_PKTCNT_BSSIDMAP_8822B(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8822B) & BIT_MASK_PKTCNT_BSSIDMAP_8822B)
9417 #define BIT_PKTCNT_CNTRST_8822B BIT(1)
9418 #define BIT_PKTCNT_CNTEN_8822B BIT(0)
9420 /* 2 REG_WMAC_PKTCNT_CTRL_8822B */
9421 #define BIT_WMAC_PKTCNT_TRST_8822B BIT(9)
9422 #define BIT_WMAC_PKTCNT_FEN_8822B BIT(8)
9424 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B 0
9425 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8822B 0xff
9426 #define BIT_WMAC_PKTCNT_CFGAD_8822B(x) (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B) << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B)
9427 #define BIT_GET_WMAC_PKTCNT_CFGAD_8822B(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B)
9430 /* 2 REG_IQ_DUMP_8822B */
9432 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B (64 & CPU_OPT_WIDTH)
9433 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B 0xffffffffL
9434 #define BIT_R_WMAC_MATCH_REF_MAC_8822B(x) (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B) << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B)
9435 #define BIT_GET_R_WMAC_MATCH_REF_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B)
9438 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B (32 & CPU_OPT_WIDTH)
9439 #define BIT_MASK_R_WMAC_MASK_LA_MAC_8822B 0xffffffffL
9440 #define BIT_R_WMAC_MASK_LA_MAC_8822B(x) (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B) << BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B)
9441 #define BIT_GET_R_WMAC_MASK_LA_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B)
9444 #define BIT_SHIFT_DUMP_OK_ADDR_8822B 15
9445 #define BIT_MASK_DUMP_OK_ADDR_8822B 0x1ffff
9446 #define BIT_DUMP_OK_ADDR_8822B(x) (((x) & BIT_MASK_DUMP_OK_ADDR_8822B) << BIT_SHIFT_DUMP_OK_ADDR_8822B)
9447 #define BIT_GET_DUMP_OK_ADDR_8822B(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8822B) & BIT_MASK_DUMP_OK_ADDR_8822B)
9450 #define BIT_SHIFT_R_TRIG_TIME_SEL_8822B 8
9451 #define BIT_MASK_R_TRIG_TIME_SEL_8822B 0x7f
9452 #define BIT_R_TRIG_TIME_SEL_8822B(x) (((x) & BIT_MASK_R_TRIG_TIME_SEL_8822B) << BIT_SHIFT_R_TRIG_TIME_SEL_8822B)
9453 #define BIT_GET_R_TRIG_TIME_SEL_8822B(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8822B) & BIT_MASK_R_TRIG_TIME_SEL_8822B)
9456 #define BIT_SHIFT_R_MAC_TRIG_SEL_8822B 6
9457 #define BIT_MASK_R_MAC_TRIG_SEL_8822B 0x3
9458 #define BIT_R_MAC_TRIG_SEL_8822B(x) (((x) & BIT_MASK_R_MAC_TRIG_SEL_8822B) << BIT_SHIFT_R_MAC_TRIG_SEL_8822B)
9459 #define BIT_GET_R_MAC_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8822B) & BIT_MASK_R_MAC_TRIG_SEL_8822B)
9461 #define BIT_MAC_TRIG_REG_8822B BIT(5)
9463 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B 3
9464 #define BIT_MASK_R_LEVEL_PULSE_SEL_8822B 0x3
9465 #define BIT_R_LEVEL_PULSE_SEL_8822B(x) (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B) << BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B)
9466 #define BIT_GET_R_LEVEL_PULSE_SEL_8822B(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B)
9468 #define BIT_EN_LA_MAC_8822B BIT(2)
9469 #define BIT_R_EN_IQDUMP_8822B BIT(1)
9470 #define BIT_R_IQDATA_DUMP_8822B BIT(0)
9472 /* 2 REG_WMAC_FTM_CTL_8822B */
9473 #define BIT_RXFTM_TXACK_SC_8822B BIT(6)
9474 #define BIT_RXFTM_TXACK_BW_8822B BIT(5)
9475 #define BIT_RXFTM_EN_8822B BIT(3)
9476 #define BIT_RXFTMREQ_BYDRV_8822B BIT(2)
9477 #define BIT_RXFTMREQ_EN_8822B BIT(1)
9478 #define BIT_FTM_EN_8822B BIT(0)
9480 /* 2 REG_WMAC_IQ_MDPK_FUNC_8822B */
9482 /* 2 REG_WMAC_OPTION_FUNCTION_8822B */
9484 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B (64 & CPU_OPT_WIDTH)
9485 #define BIT_MASK_R_WMAC_RX_FIL_LEN_8822B 0xffff
9486 #define BIT_R_WMAC_RX_FIL_LEN_8822B(x) (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B) << BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B)
9487 #define BIT_GET_R_WMAC_RX_FIL_LEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B)
9490 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B (56 & CPU_OPT_WIDTH)
9491 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B 0xff
9492 #define BIT_R_WMAC_RXFIFO_FULL_TH_8822B(x) (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B) << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B)
9493 #define BIT_GET_R_WMAC_RXFIFO_FULL_TH_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B)
9495 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_8822B BIT(55)
9496 #define BIT_R_WMAC_RXRST_DLY_8822B BIT(54)
9497 #define BIT_R_WMAC_SRCH_TXRPT_REF_DROP_8822B BIT(53)
9498 #define BIT_R_WMAC_SRCH_TXRPT_UA1_8822B BIT(52)
9499 #define BIT_R_WMAC_SRCH_TXRPT_TYPE_8822B BIT(51)
9500 #define BIT_R_WMAC_NDP_RST_8822B BIT(50)
9501 #define BIT_R_WMAC_POWINT_EN_8822B BIT(49)
9502 #define BIT_R_WMAC_SRCH_TXRPT_PERPKT_8822B BIT(48)
9503 #define BIT_R_WMAC_SRCH_TXRPT_MID_8822B BIT(47)
9504 #define BIT_R_WMAC_PFIN_TOEN_8822B BIT(46)
9505 #define BIT_R_WMAC_FIL_SECERR_8822B BIT(45)
9506 #define BIT_R_WMAC_FIL_CTLPKTLEN_8822B BIT(44)
9507 #define BIT_R_WMAC_FIL_FCTYPE_8822B BIT(43)
9508 #define BIT_R_WMAC_FIL_FCPROVER_8822B BIT(42)
9509 #define BIT_R_WMAC_PHYSTS_SNIF_8822B BIT(41)
9510 #define BIT_R_WMAC_PHYSTS_PLCP_8822B BIT(40)
9511 #define BIT_R_MAC_TCR_VBONF_RD_8822B BIT(39)
9512 #define BIT_R_WMAC_TCR_MPAR_NDP_8822B BIT(38)
9513 #define BIT_R_WMAC_NDP_FILTER_8822B BIT(37)
9514 #define BIT_R_WMAC_RXLEN_SEL_8822B BIT(36)
9515 #define BIT_R_WMAC_RXLEN_SEL1_8822B BIT(35)
9516 #define BIT_R_OFDM_FILTER_8822B BIT(34)
9517 #define BIT_R_WMAC_CHK_OFDM_LEN_8822B BIT(33)
9518 #define BIT_R_WMAC_CHK_CCK_LEN_8822B BIT(32)
9520 #define BIT_SHIFT_R_OFDM_LEN_8822B 26
9521 #define BIT_MASK_R_OFDM_LEN_8822B 0x3f
9522 #define BIT_R_OFDM_LEN_8822B(x) (((x) & BIT_MASK_R_OFDM_LEN_8822B) << BIT_SHIFT_R_OFDM_LEN_8822B)
9523 #define BIT_GET_R_OFDM_LEN_8822B(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8822B) & BIT_MASK_R_OFDM_LEN_8822B)
9526 #define BIT_SHIFT_R_CCK_LEN_8822B 0
9527 #define BIT_MASK_R_CCK_LEN_8822B 0xffff
9528 #define BIT_R_CCK_LEN_8822B(x) (((x) & BIT_MASK_R_CCK_LEN_8822B) << BIT_SHIFT_R_CCK_LEN_8822B)
9529 #define BIT_GET_R_CCK_LEN_8822B(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8822B) & BIT_MASK_R_CCK_LEN_8822B)
9532 /* 2 REG_RX_FILTER_FUNCTION_8822B */
9533 #define BIT_R_WMAC_MHRDDY_LATCH_8822B BIT(14)
9534 #define BIT_R_WMAC_MHRDDY_CLR_8822B BIT(13)
9535 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8822B BIT(12)
9536 #define BIT_WMAC_DIS_VHT_PLCP_CHK_MU_8822B BIT(11)
9537 #define BIT_R_CHK_DELIMIT_LEN_8822B BIT(10)
9538 #define BIT_R_REAPTER_ADDR_MATCH_8822B BIT(9)
9539 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY_8822B BIT(8)
9540 #define BIT_R_LATCH_MACHRDY_8822B BIT(7)
9541 #define BIT_R_WMAC_RXFIL_REND_8822B BIT(6)
9542 #define BIT_R_WMAC_MPDURDY_CLR_8822B BIT(5)
9543 #define BIT_R_WMAC_CLRRXSEC_8822B BIT(4)
9544 #define BIT_R_WMAC_RXFIL_RDEL_8822B BIT(3)
9545 #define BIT_R_WMAC_RXFIL_FCSE_8822B BIT(2)
9546 #define BIT_R_WMAC_RXFIL_MESH_DEL_8822B BIT(1)
9547 #define BIT_R_WMAC_RXFIL_MASKM_8822B BIT(0)
9549 /* 2 REG_NDP_SIG_8822B */
9551 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B 0
9552 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8822B 0x1fffff
9553 #define BIT_R_WMAC_TXNDP_SIGB_8822B(x) (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B) << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B)
9554 #define BIT_GET_R_WMAC_TXNDP_SIGB_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B)
9557 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8822B */
9559 #define BIT_SHIFT_R_MAC_DEBUG_8822B (32 & CPU_OPT_WIDTH)
9560 #define BIT_MASK_R_MAC_DEBUG_8822B 0xffffffffL
9561 #define BIT_R_MAC_DEBUG_8822B(x) (((x) & BIT_MASK_R_MAC_DEBUG_8822B) << BIT_SHIFT_R_MAC_DEBUG_8822B)
9562 #define BIT_GET_R_MAC_DEBUG_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_8822B) & BIT_MASK_R_MAC_DEBUG_8822B)
9565 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8822B 8
9566 #define BIT_MASK_R_MAC_DBG_SHIFT_8822B 0x7
9567 #define BIT_R_MAC_DBG_SHIFT_8822B(x) (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8822B) << BIT_SHIFT_R_MAC_DBG_SHIFT_8822B)
9568 #define BIT_GET_R_MAC_DBG_SHIFT_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8822B) & BIT_MASK_R_MAC_DBG_SHIFT_8822B)
9571 #define BIT_SHIFT_R_MAC_DBG_SEL_8822B 0
9572 #define BIT_MASK_R_MAC_DBG_SEL_8822B 0x3
9573 #define BIT_R_MAC_DBG_SEL_8822B(x) (((x) & BIT_MASK_R_MAC_DBG_SEL_8822B) << BIT_SHIFT_R_MAC_DBG_SEL_8822B)
9574 #define BIT_GET_R_MAC_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8822B) & BIT_MASK_R_MAC_DBG_SEL_8822B)
9577 /* 2 REG_RTS_ADDRESS_0_8822B */
9579 /* 2 REG_RTS_ADDRESS_1_8822B */
9581 /* 2 REG__RPFM_MAP1_8822B (RX PAYLOAD FILTER MAP FRAME TYPE CONTROL REGISTER GROUP 1 */
9582 #define BIT_DATA_RPFM15EN_8822B BIT(15)
9583 #define BIT_DATA_RPFM14EN_8822B BIT(14)
9584 #define BIT_DATA_RPFM13EN_8822B BIT(13)
9585 #define BIT_DATA_RPFM12EN_8822B BIT(12)
9586 #define BIT_DATA_RPFM11EN_8822B BIT(11)
9587 #define BIT_DATA_RPFM10EN_8822B BIT(10)
9588 #define BIT_DATA_RPFM9EN_8822B BIT(9)
9589 #define BIT_DATA_RPFM8EN_8822B BIT(8)
9590 #define BIT_DATA_RPFM7EN_8822B BIT(7)
9591 #define BIT_DATA_RPFM6EN_8822B BIT(6)
9592 #define BIT_DATA_RPFM5EN_8822B BIT(5)
9593 #define BIT_DATA_RPFM4EN_8822B BIT(4)
9594 #define BIT_DATA_RPFM3EN_8822B BIT(3)
9595 #define BIT_DATA_RPFM2EN_8822B BIT(2)
9596 #define BIT_DATA_RPFM1EN_8822B BIT(1)
9597 #define BIT_DATA_RPFM0EN_8822B BIT(0)
9599 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8822B */
9600 #define BIT_LTECOEX_ACCESS_START_V1_8822B BIT(31)
9601 #define BIT_LTECOEX_WRITE_MODE_V1_8822B BIT(30)
9602 #define BIT_LTECOEX_READY_BIT_V1_8822B BIT(29)
9604 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8822B 16
9605 #define BIT_MASK_WRITE_BYTE_EN_V1_8822B 0xf
9606 #define BIT_WRITE_BYTE_EN_V1_8822B(x) (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8822B) << BIT_SHIFT_WRITE_BYTE_EN_V1_8822B)
9607 #define BIT_GET_WRITE_BYTE_EN_V1_8822B(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8822B) & BIT_MASK_WRITE_BYTE_EN_V1_8822B)
9610 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B 0
9611 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8822B 0xffff
9612 #define BIT_LTECOEX_REG_ADDR_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B) << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B)
9613 #define BIT_GET_LTECOEX_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B)
9616 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8822B */
9618 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8822B 0
9619 #define BIT_MASK_LTECOEX_W_DATA_V1_8822B 0xffffffffL
9620 #define BIT_LTECOEX_W_DATA_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8822B) << BIT_SHIFT_LTECOEX_W_DATA_V1_8822B)
9621 #define BIT_GET_LTECOEX_W_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8822B) & BIT_MASK_LTECOEX_W_DATA_V1_8822B)
9624 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8822B */
9626 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8822B 0
9627 #define BIT_MASK_LTECOEX_R_DATA_V1_8822B 0xffffffffL
9628 #define BIT_LTECOEX_R_DATA_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8822B) << BIT_SHIFT_LTECOEX_R_DATA_V1_8822B)
9629 #define BIT_GET_LTECOEX_R_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8822B) & BIT_MASK_LTECOEX_R_DATA_V1_8822B)
9632 /* 2 REG_NOT_VALID_8822B */
9634 /* 2 REG_SDIO_TX_CTRL_8822B */
9636 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8822B 16
9637 #define BIT_MASK_SDIO_INT_TIMEOUT_8822B 0xffff
9638 #define BIT_SDIO_INT_TIMEOUT_8822B(x) (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8822B) << BIT_SHIFT_SDIO_INT_TIMEOUT_8822B)
9639 #define BIT_GET_SDIO_INT_TIMEOUT_8822B(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8822B) & BIT_MASK_SDIO_INT_TIMEOUT_8822B)
9641 #define BIT_IO_ERR_STATUS_8822B BIT(15)
9642 #define BIT_REPLY_ERRCRC_IN_DATA_8822B BIT(9)
9643 #define BIT_EN_CMD53_OVERLAP_8822B BIT(8)
9644 #define BIT_REPLY_ERR_IN_R5_8822B BIT(7)
9645 #define BIT_R18A_EN_8822B BIT(6)
9646 #define BIT_INIT_CMD_EN_8822B BIT(5)
9647 #define BIT_EN_RXDMA_MASK_INT_8822B BIT(2)
9648 #define BIT_EN_MASK_TIMER_8822B BIT(1)
9649 #define BIT_CMD_ERR_STOP_INT_EN_8822B BIT(0)
9651 /* 2 REG_SDIO_HIMR_8822B */
9652 #define BIT_SDIO_CRCERR_MSK_8822B BIT(31)
9653 #define BIT_SDIO_HSISR3_IND_MSK_8822B BIT(30)
9654 #define BIT_SDIO_HSISR2_IND_MSK_8822B BIT(29)
9655 #define BIT_SDIO_HEISR_IND_MSK_8822B BIT(28)
9656 #define BIT_SDIO_CTWEND_MSK_8822B BIT(27)
9657 #define BIT_SDIO_ATIMEND_E_MSK_8822B BIT(26)
9658 #define BIT_SDIIO_ATIMEND_MSK_8822B BIT(25)
9659 #define BIT_SDIO_OCPINT_MSK_8822B BIT(24)
9660 #define BIT_SDIO_PSTIMEOUT_MSK_8822B BIT(23)
9661 #define BIT_SDIO_GTINT4_MSK_8822B BIT(22)
9662 #define BIT_SDIO_GTINT3_MSK_8822B BIT(21)
9663 #define BIT_SDIO_HSISR_IND_MSK_8822B BIT(20)
9664 #define BIT_SDIO_CPWM2_MSK_8822B BIT(19)
9665 #define BIT_SDIO_CPWM1_MSK_8822B BIT(18)
9666 #define BIT_SDIO_C2HCMD_INT_MSK_8822B BIT(17)
9667 #define BIT_SDIO_BCNERLY_INT_MSK_8822B BIT(16)
9668 #define BIT_SDIO_TXBCNERR_MSK_8822B BIT(7)
9669 #define BIT_SDIO_TXBCNOK_MSK_8822B BIT(6)
9670 #define BIT_SDIO_RXFOVW_MSK_8822B BIT(5)
9671 #define BIT_SDIO_TXFOVW_MSK_8822B BIT(4)
9672 #define BIT_SDIO_RXERR_MSK_8822B BIT(3)
9673 #define BIT_SDIO_TXERR_MSK_8822B BIT(2)
9674 #define BIT_SDIO_AVAL_MSK_8822B BIT(1)
9675 #define BIT_RX_REQUEST_MSK_8822B BIT(0)
9677 /* 2 REG_SDIO_HISR_8822B */
9678 #define BIT_SDIO_CRCERR_8822B BIT(31)
9679 #define BIT_SDIO_HSISR3_IND_8822B BIT(30)
9680 #define BIT_SDIO_HSISR2_IND_8822B BIT(29)
9681 #define BIT_SDIO_HEISR_IND_8822B BIT(28)
9682 #define BIT_SDIO_CTWEND_8822B BIT(27)
9683 #define BIT_SDIO_ATIMEND_E_8822B BIT(26)
9684 #define BIT_SDIO_ATIMEND_8822B BIT(25)
9685 #define BIT_SDIO_OCPINT_8822B BIT(24)
9686 #define BIT_SDIO_PSTIMEOUT_8822B BIT(23)
9687 #define BIT_SDIO_GTINT4_8822B BIT(22)
9688 #define BIT_SDIO_GTINT3_8822B BIT(21)
9689 #define BIT_SDIO_HSISR_IND_8822B BIT(20)
9690 #define BIT_SDIO_CPWM2_8822B BIT(19)
9691 #define BIT_SDIO_CPWM1_8822B BIT(18)
9692 #define BIT_SDIO_C2HCMD_INT_8822B BIT(17)
9693 #define BIT_SDIO_BCNERLY_INT_8822B BIT(16)
9694 #define BIT_SDIO_TXBCNERR_8822B BIT(7)
9695 #define BIT_SDIO_TXBCNOK_8822B BIT(6)
9696 #define BIT_SDIO_RXFOVW_8822B BIT(5)
9697 #define BIT_SDIO_TXFOVW_8822B BIT(4)
9698 #define BIT_SDIO_RXERR_8822B BIT(3)
9699 #define BIT_SDIO_TXERR_8822B BIT(2)
9700 #define BIT_SDIO_AVAL_8822B BIT(1)
9701 #define BIT_RX_REQUEST_8822B BIT(0)
9703 /* 2 REG_SDIO_RX_REQ_LEN_8822B */
9705 #define BIT_SHIFT_RX_REQ_LEN_V1_8822B 0
9706 #define BIT_MASK_RX_REQ_LEN_V1_8822B 0x3ffff
9707 #define BIT_RX_REQ_LEN_V1_8822B(x) (((x) & BIT_MASK_RX_REQ_LEN_V1_8822B) << BIT_SHIFT_RX_REQ_LEN_V1_8822B)
9708 #define BIT_GET_RX_REQ_LEN_V1_8822B(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8822B) & BIT_MASK_RX_REQ_LEN_V1_8822B)
9711 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8822B */
9713 #define BIT_SHIFT_FREE_TXPG_SEQ_8822B 0
9714 #define BIT_MASK_FREE_TXPG_SEQ_8822B 0xff
9715 #define BIT_FREE_TXPG_SEQ_8822B(x) (((x) & BIT_MASK_FREE_TXPG_SEQ_8822B) << BIT_SHIFT_FREE_TXPG_SEQ_8822B)
9716 #define BIT_GET_FREE_TXPG_SEQ_8822B(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8822B) & BIT_MASK_FREE_TXPG_SEQ_8822B)
9719 /* 2 REG_SDIO_FREE_TXPG_8822B */
9721 #define BIT_SHIFT_MID_FREEPG_V1_8822B 16
9722 #define BIT_MASK_MID_FREEPG_V1_8822B 0xfff
9723 #define BIT_MID_FREEPG_V1_8822B(x) (((x) & BIT_MASK_MID_FREEPG_V1_8822B) << BIT_SHIFT_MID_FREEPG_V1_8822B)
9724 #define BIT_GET_MID_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8822B) & BIT_MASK_MID_FREEPG_V1_8822B)
9727 #define BIT_SHIFT_HIQ_FREEPG_V1_8822B 0
9728 #define BIT_MASK_HIQ_FREEPG_V1_8822B 0xfff
9729 #define BIT_HIQ_FREEPG_V1_8822B(x) (((x) & BIT_MASK_HIQ_FREEPG_V1_8822B) << BIT_SHIFT_HIQ_FREEPG_V1_8822B)
9730 #define BIT_GET_HIQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8822B) & BIT_MASK_HIQ_FREEPG_V1_8822B)
9733 /* 2 REG_SDIO_FREE_TXPG2_8822B */
9735 #define BIT_SHIFT_PUB_FREEPG_V1_8822B 16
9736 #define BIT_MASK_PUB_FREEPG_V1_8822B 0xfff
9737 #define BIT_PUB_FREEPG_V1_8822B(x) (((x) & BIT_MASK_PUB_FREEPG_V1_8822B) << BIT_SHIFT_PUB_FREEPG_V1_8822B)
9738 #define BIT_GET_PUB_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8822B) & BIT_MASK_PUB_FREEPG_V1_8822B)
9741 #define BIT_SHIFT_LOW_FREEPG_V1_8822B 0
9742 #define BIT_MASK_LOW_FREEPG_V1_8822B 0xfff
9743 #define BIT_LOW_FREEPG_V1_8822B(x) (((x) & BIT_MASK_LOW_FREEPG_V1_8822B) << BIT_SHIFT_LOW_FREEPG_V1_8822B)
9744 #define BIT_GET_LOW_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8822B) & BIT_MASK_LOW_FREEPG_V1_8822B)
9747 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8822B */
9749 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B 24
9750 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8822B 0xff
9751 #define BIT_NOAC_OQT_FREEPG_V1_8822B(x) (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B) << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B)
9752 #define BIT_GET_NOAC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B)
9755 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8822B 16
9756 #define BIT_MASK_AC_OQT_FREEPG_V1_8822B 0xff
9757 #define BIT_AC_OQT_FREEPG_V1_8822B(x) (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8822B) << BIT_SHIFT_AC_OQT_FREEPG_V1_8822B)
9758 #define BIT_GET_AC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8822B) & BIT_MASK_AC_OQT_FREEPG_V1_8822B)
9761 #define BIT_SHIFT_EXQ_FREEPG_V1_8822B 0
9762 #define BIT_MASK_EXQ_FREEPG_V1_8822B 0xfff
9763 #define BIT_EXQ_FREEPG_V1_8822B(x) (((x) & BIT_MASK_EXQ_FREEPG_V1_8822B) << BIT_SHIFT_EXQ_FREEPG_V1_8822B)
9764 #define BIT_GET_EXQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8822B) & BIT_MASK_EXQ_FREEPG_V1_8822B)
9767 /* 2 REG_SDIO_HTSFR_INFO_8822B */
9769 #define BIT_SHIFT_HTSFR1_8822B 16
9770 #define BIT_MASK_HTSFR1_8822B 0xffff
9771 #define BIT_HTSFR1_8822B(x) (((x) & BIT_MASK_HTSFR1_8822B) << BIT_SHIFT_HTSFR1_8822B)
9772 #define BIT_GET_HTSFR1_8822B(x) (((x) >> BIT_SHIFT_HTSFR1_8822B) & BIT_MASK_HTSFR1_8822B)
9775 #define BIT_SHIFT_HTSFR0_8822B 0
9776 #define BIT_MASK_HTSFR0_8822B 0xffff
9777 #define BIT_HTSFR0_8822B(x) (((x) & BIT_MASK_HTSFR0_8822B) << BIT_SHIFT_HTSFR0_8822B)
9778 #define BIT_GET_HTSFR0_8822B(x) (((x) >> BIT_SHIFT_HTSFR0_8822B) & BIT_MASK_HTSFR0_8822B)
9781 /* 2 REG_SDIO_HCPWM1_V2_8822B */
9782 #define BIT_TOGGLING_8822B BIT(7)
9783 #define BIT_WWLAN_8822B BIT(3)
9784 #define BIT_RPS_ST_8822B BIT(2)
9785 #define BIT_WLAN_TRX_8822B BIT(1)
9786 #define BIT_SYS_CLK_8822B BIT(0)
9788 /* 2 REG_SDIO_HCPWM2_V2_8822B */
9790 /* 2 REG_SDIO_INDIRECT_REG_CFG_8822B */
9791 #define BIT_INDIRECT_REG_RDY_8822B BIT(20)
9792 #define BIT_INDIRECT_REG_R_8822B BIT(19)
9793 #define BIT_INDIRECT_REG_W_8822B BIT(18)
9795 #define BIT_SHIFT_INDIRECT_REG_SIZE_8822B 16
9796 #define BIT_MASK_INDIRECT_REG_SIZE_8822B 0x3
9797 #define BIT_INDIRECT_REG_SIZE_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_SIZE_8822B) << BIT_SHIFT_INDIRECT_REG_SIZE_8822B)
9798 #define BIT_GET_INDIRECT_REG_SIZE_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8822B) & BIT_MASK_INDIRECT_REG_SIZE_8822B)
9801 #define BIT_SHIFT_INDIRECT_REG_ADDR_8822B 0
9802 #define BIT_MASK_INDIRECT_REG_ADDR_8822B 0xffff
9803 #define BIT_INDIRECT_REG_ADDR_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_ADDR_8822B) << BIT_SHIFT_INDIRECT_REG_ADDR_8822B)
9804 #define BIT_GET_INDIRECT_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8822B) & BIT_MASK_INDIRECT_REG_ADDR_8822B)
9807 /* 2 REG_SDIO_INDIRECT_REG_DATA_8822B */
9809 #define BIT_SHIFT_INDIRECT_REG_DATA_8822B 0
9810 #define BIT_MASK_INDIRECT_REG_DATA_8822B 0xffffffffL
9811 #define BIT_INDIRECT_REG_DATA_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_DATA_8822B) << BIT_SHIFT_INDIRECT_REG_DATA_8822B)
9812 #define BIT_GET_INDIRECT_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8822B) & BIT_MASK_INDIRECT_REG_DATA_8822B)
9815 /* 2 REG_SDIO_H2C_8822B */
9817 #define BIT_SHIFT_SDIO_H2C_MSG_8822B 0
9818 #define BIT_MASK_SDIO_H2C_MSG_8822B 0xffffffffL
9819 #define BIT_SDIO_H2C_MSG_8822B(x) (((x) & BIT_MASK_SDIO_H2C_MSG_8822B) << BIT_SHIFT_SDIO_H2C_MSG_8822B)
9820 #define BIT_GET_SDIO_H2C_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8822B) & BIT_MASK_SDIO_H2C_MSG_8822B)
9823 /* 2 REG_SDIO_C2H_8822B */
9825 #define BIT_SHIFT_SDIO_C2H_MSG_8822B 0
9826 #define BIT_MASK_SDIO_C2H_MSG_8822B 0xffffffffL
9827 #define BIT_SDIO_C2H_MSG_8822B(x) (((x) & BIT_MASK_SDIO_C2H_MSG_8822B) << BIT_SHIFT_SDIO_C2H_MSG_8822B)
9828 #define BIT_GET_SDIO_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8822B) & BIT_MASK_SDIO_C2H_MSG_8822B)
9831 /* 2 REG_SDIO_HRPWM1_8822B */
9832 #define BIT_TOGGLING_8822B BIT(7)
9833 #define BIT_WWLAN_8822B BIT(3)
9834 #define BIT_RPS_ST_8822B BIT(2)
9835 #define BIT_WLAN_TRX_8822B BIT(1)
9836 #define BIT_SYS_CLK_8822B BIT(0)
9838 /* 2 REG_SDIO_HRPWM2_8822B */
9840 /* 2 REG_SDIO_HPS_CLKR_8822B */
9842 /* 2 REG_SDIO_BUS_CTRL_8822B */
9843 #define BIT_PAD_CLK_XHGE_EN_8822B BIT(3)
9844 #define BIT_INTER_CLK_EN_8822B BIT(2)
9845 #define BIT_EN_RPT_TXCRC_8822B BIT(1)
9846 #define BIT_DIS_RXDMA_STS_8822B BIT(0)
9848 /* 2 REG_SDIO_HSUS_CTRL_8822B */
9849 #define BIT_INTR_CTRL_8822B BIT(4)
9850 #define BIT_SDIO_VOLTAGE_8822B BIT(3)
9851 #define BIT_BYPASS_INIT_8822B BIT(2)
9852 #define BIT_HCI_RESUME_RDY_8822B BIT(1)
9853 #define BIT_HCI_SUS_REQ_8822B BIT(0)
9855 /* 2 REG_SDIO_RESPONSE_TIMER_8822B */
9857 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8822B 0
9858 #define BIT_MASK_CMDIN_2RESP_TIMER_8822B 0xffff
9859 #define BIT_CMDIN_2RESP_TIMER_8822B(x) (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8822B) << BIT_SHIFT_CMDIN_2RESP_TIMER_8822B)
9860 #define BIT_GET_CMDIN_2RESP_TIMER_8822B(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8822B) & BIT_MASK_CMDIN_2RESP_TIMER_8822B)
9863 /* 2 REG_SDIO_CMD_CRC_8822B */
9865 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8822B 0
9866 #define BIT_MASK_SDIO_CMD_CRC_V1_8822B 0xff
9867 #define BIT_SDIO_CMD_CRC_V1_8822B(x) (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8822B) << BIT_SHIFT_SDIO_CMD_CRC_V1_8822B)
9868 #define BIT_GET_SDIO_CMD_CRC_V1_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8822B) & BIT_MASK_SDIO_CMD_CRC_V1_8822B)
9871 /* 2 REG_SDIO_HSISR_8822B */
9872 #define BIT_DRV_WLAN_INT_CLR_8822B BIT(1)
9873 #define BIT_DRV_WLAN_INT_8822B BIT(0)
9875 /* 2 REG_SDIO_HSIMR_8822B */
9876 #define BIT_HISR_MASK_8822B BIT(0)
9878 /* 2 REG_SDIO_ERR_RPT_8822B */
9879 #define BIT_HR_FF_OVF_8822B BIT(6)
9880 #define BIT_HR_FF_UDN_8822B BIT(5)
9881 #define BIT_TXDMA_BUSY_ERR_8822B BIT(4)
9882 #define BIT_TXDMA_VLD_ERR_8822B BIT(3)
9883 #define BIT_QSEL_UNKOWN_ERR_8822B BIT(2)
9884 #define BIT_QSEL_MIS_ERR_8822B BIT(1)
9885 #define BIT_SDIO_OVERRD_ERR_8822B BIT(0)
9887 /* 2 REG_SDIO_CMD_ERRCNT_8822B */
9889 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8822B 0
9890 #define BIT_MASK_CMD_CRC_ERR_CNT_8822B 0xff
9891 #define BIT_CMD_CRC_ERR_CNT_8822B(x) (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8822B) << BIT_SHIFT_CMD_CRC_ERR_CNT_8822B)
9892 #define BIT_GET_CMD_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8822B) & BIT_MASK_CMD_CRC_ERR_CNT_8822B)
9895 /* 2 REG_SDIO_DATA_ERRCNT_8822B */
9897 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8822B 0
9898 #define BIT_MASK_DATA_CRC_ERR_CNT_8822B 0xff
9899 #define BIT_DATA_CRC_ERR_CNT_8822B(x) (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8822B) << BIT_SHIFT_DATA_CRC_ERR_CNT_8822B)
9900 #define BIT_GET_DATA_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8822B) & BIT_MASK_DATA_CRC_ERR_CNT_8822B)
9903 /* 2 REG_SDIO_CMD_ERR_CONTENT_8822B */
9905 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B 0
9906 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B 0xffffffffffL
9907 #define BIT_SDIO_CMD_ERR_CONTENT_8822B(x) (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B) << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B)
9908 #define BIT_GET_SDIO_CMD_ERR_CONTENT_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B)
9911 /* 2 REG_SDIO_CRC_ERR_IDX_8822B */
9912 #define BIT_D3_CRC_ERR_8822B BIT(4)
9913 #define BIT_D2_CRC_ERR_8822B BIT(3)
9914 #define BIT_D1_CRC_ERR_8822B BIT(2)
9915 #define BIT_D0_CRC_ERR_8822B BIT(1)
9916 #define BIT_CMD_CRC_ERR_8822B BIT(0)
9918 /* 2 REG_SDIO_DATA_CRC_8822B */
9920 #define BIT_SHIFT_SDIO_DATA_CRC_8822B 0
9921 #define BIT_MASK_SDIO_DATA_CRC_8822B 0xff
9922 #define BIT_SDIO_DATA_CRC_8822B(x) (((x) & BIT_MASK_SDIO_DATA_CRC_8822B) << BIT_SHIFT_SDIO_DATA_CRC_8822B)
9923 #define BIT_GET_SDIO_DATA_CRC_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8822B) & BIT_MASK_SDIO_DATA_CRC_8822B)
9926 /* 2 REG_SDIO_DATA_REPLY_TIME_8822B */
9928 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B 0
9929 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8822B 0x7
9930 #define BIT_SDIO_DATA_REPLY_TIME_8822B(x) (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B) << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B)
9931 #define BIT_GET_SDIO_DATA_REPLY_TIME_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B)