1 #ifndef __HALBTC_OUT_SRC_H__
2 #define __HALBTC_OUT_SRC_H__
5 #define BTC_COEX_OFFLOAD 0
6 #define BTC_TMP_BUF_SHORT 20
8 extern u1Byte gl_btc_trace_buf[];
9 #define BTC_SPRINTF rsprintf
10 #define BTC_TRACE(_MSG_)\
12 if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\
13 RTW_INFO("%s", _MSG_);\
16 #define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len)
19 #define NORMAL_EXEC FALSE
20 #define FORCE_EXEC TRUE
22 #define BTC_RF_OFF 0x0
30 #define BTC_SMSP SINGLEMAC_SINGLEPHY
31 #define BTC_DMDP DUALMAC_DUALPHY
32 #define BTC_DMSP DUALMAC_SINGLEPHY
33 #define BTC_MP_UNKNOWN 0xff
35 #define BT_COEX_ANT_TYPE_PG 0
36 #define BT_COEX_ANT_TYPE_ANTDIV 1
37 #define BT_COEX_ANT_TYPE_DETECTED 2
39 #define BTC_MIMO_PS_STATIC 0 /* 1ss */
40 #define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */
42 #define BTC_RATE_DISABLE 0
43 #define BTC_RATE_ENABLE 1
45 /* single Antenna definition */
46 #define BTC_ANT_PATH_WIFI 0
47 #define BTC_ANT_PATH_BT 1
48 #define BTC_ANT_PATH_PTA 2
49 #define BTC_ANT_PATH_WIFI5G 3
50 #define BTC_ANT_PATH_AUTO 4
51 /* dual Antenna definition */
52 #define BTC_ANT_WIFI_AT_MAIN 0
53 #define BTC_ANT_WIFI_AT_AUX 1
54 #define BTC_ANT_WIFI_AT_DIVERSITY 2
55 /* coupler Antenna definition */
56 #define BTC_ANT_WIFI_AT_CPL_MAIN 0
57 #define BTC_ANT_WIFI_AT_CPL_AUX 1
59 typedef enum _BTC_POWERSAVE_TYPE {
60 BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */
64 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE;
66 typedef enum _BTC_BT_REG_TYPE {
69 BTC_BT_REG_BLUEWIZE = 2,
70 BTC_BT_REG_VENDOR = 3,
73 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE;
75 typedef enum _BTC_CHIP_INTERFACE {
81 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE;
83 typedef enum _BTC_CHIP_TYPE {
87 BTC_CHIP_RTL8723A = 3,
89 BTC_CHIP_RTL8723B = 5,
91 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE;
93 /* following is for wifi link status */
94 #define WIFI_STA_CONNECTED BIT0
95 #define WIFI_AP_CONNECTED BIT1
96 #define WIFI_HS_CONNECTED BIT2
97 #define WIFI_P2P_GO_CONNECTED BIT3
98 #define WIFI_P2P_GC_CONNECTED BIT4
100 /* following is for command line utility */
101 #define CL_SPRINTF rsprintf
102 #define CL_PRINTF DCMD_Printf
104 struct btc_board_info {
105 /* The following is some board information */
107 u8 pg_ant_num; /* pg ant number */
108 u8 btdm_ant_num; /* ant number for btdm */
109 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */
110 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */
111 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */
112 boolean tfbga_package; /* for Antenna detect threshold */
113 boolean btdm_ant_det_finish;
114 boolean btdm_ant_det_already_init_phydm;
118 boolean btdm_ant_det_complete_fail;
120 boolean ant_det_result_five_complete;
124 typedef enum _BTC_DBG_OPCODE {
125 BTC_DBG_SET_COEX_NORMAL = 0x0,
126 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
127 BTC_DBG_SET_COEX_BT_ONLY = 0x2,
128 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3,
129 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4,
130 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5,
131 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6,
133 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE;
135 typedef enum _BTC_RSSI_STATE {
136 BTC_RSSI_STATE_HIGH = 0x0,
137 BTC_RSSI_STATE_MEDIUM = 0x1,
138 BTC_RSSI_STATE_LOW = 0x2,
139 BTC_RSSI_STATE_STAY_HIGH = 0x3,
140 BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
141 BTC_RSSI_STATE_STAY_LOW = 0x5,
143 } BTC_RSSI_STATE, *PBTC_RSSI_STATE;
144 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE)
145 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE)
146 #define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE)
148 typedef enum _BTC_WIFI_ROLE {
149 BTC_ROLE_STATION = 0x0,
152 BTC_ROLE_HS_MODE = 0x3,
154 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE;
156 typedef enum _BTC_WIRELESS_FREQ {
160 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ;
162 typedef enum _BTC_WIFI_BW_MODE {
163 BTC_WIFI_BW_LEGACY = 0x0,
164 BTC_WIFI_BW_HT20 = 0x1,
165 BTC_WIFI_BW_HT40 = 0x2,
166 BTC_WIFI_BW_HT80 = 0x3,
167 BTC_WIFI_BW_HT160 = 0x4,
169 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE;
171 typedef enum _BTC_WIFI_TRAFFIC_DIR {
172 BTC_WIFI_TRAFFIC_TX = 0x0,
173 BTC_WIFI_TRAFFIC_RX = 0x1,
175 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR;
177 typedef enum _BTC_WIFI_PNP {
178 BTC_WIFI_PNP_WAKE_UP = 0x0,
179 BTC_WIFI_PNP_SLEEP = 0x1,
180 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2,
182 } BTC_WIFI_PNP, *PBTC_WIFI_PNP;
184 typedef enum _BTC_IOT_PEER {
185 BTC_IOT_PEER_UNKNOWN = 0,
186 BTC_IOT_PEER_REALTEK = 1,
187 BTC_IOT_PEER_REALTEK_92SE = 2,
188 BTC_IOT_PEER_BROADCOM = 3,
189 BTC_IOT_PEER_RALINK = 4,
190 BTC_IOT_PEER_ATHEROS = 5,
191 BTC_IOT_PEER_CISCO = 6,
192 BTC_IOT_PEER_MERU = 7,
193 BTC_IOT_PEER_MARVELL = 8,
194 BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */
195 BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
196 BTC_IOT_PEER_AIRGO = 11,
197 BTC_IOT_PEER_INTEL = 12,
198 BTC_IOT_PEER_RTK_APCLIENT = 13,
199 BTC_IOT_PEER_REALTEK_81XX = 14,
200 BTC_IOT_PEER_REALTEK_WOW = 15,
201 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16,
202 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17,
204 } BTC_IOT_PEER, *PBTC_IOT_PEER;
206 /* for 8723b-d cut large current issue */
207 typedef enum _BTC_WIFI_COEX_STATE {
210 BTC_WIFI_STAT_NORMAL_OFF,
211 BTC_WIFI_STAT_MP_OFF,
212 BTC_WIFI_STAT_NORMAL,
213 BTC_WIFI_STAT_ANT_DIV,
215 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE;
217 typedef enum _BTC_ANT_TYPE {
224 } BTC_ANT_TYPE, *PBTC_ANT_TYPE;
226 typedef enum _BTC_VENDOR {
230 } BTC_VENDOR, *PBTC_VENDOR;
233 /* defined for BFP_BTC_GET */
234 typedef enum _BTC_GET_TYPE {
236 BTC_GET_BL_HS_OPERATION,
237 BTC_GET_BL_HS_CONNECTING,
238 BTC_GET_BL_WIFI_FW_READY,
239 BTC_GET_BL_WIFI_CONNECTED,
240 BTC_GET_BL_WIFI_BUSY,
241 BTC_GET_BL_WIFI_SCAN,
242 BTC_GET_BL_WIFI_LINK,
243 BTC_GET_BL_WIFI_ROAM,
244 BTC_GET_BL_WIFI_4_WAY_PROGRESS,
245 BTC_GET_BL_WIFI_UNDER_5G,
246 BTC_GET_BL_WIFI_AP_MODE_ENABLE,
247 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
248 BTC_GET_BL_WIFI_UNDER_B_MODE,
249 BTC_GET_BL_EXT_SWITCH,
250 BTC_GET_BL_WIFI_IS_IN_MP_MODE,
251 BTC_GET_BL_IS_ASUS_8723B,
254 BTC_GET_S4_WIFI_RSSI,
259 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
260 BTC_GET_U4_WIFI_FW_VER,
261 BTC_GET_U4_WIFI_LINK_STATUS,
262 BTC_GET_U4_BT_PATCH_VER,
264 BTC_GET_U4_SUPPORTED_VERSION,
265 BTC_GET_U4_SUPPORTED_FEATURE,
266 BTC_GET_U4_WIFI_IQK_TOTAL,
267 BTC_GET_U4_WIFI_IQK_OK,
268 BTC_GET_U4_WIFI_IQK_FAIL,
271 BTC_GET_U1_WIFI_DOT11_CHNL,
272 BTC_GET_U1_WIFI_CENTRAL_CHNL,
273 BTC_GET_U1_WIFI_HS_CHNL,
274 BTC_GET_U1_WIFI_P2P_CHNL,
275 BTC_GET_U1_MAC_PHY_MODE,
280 /*===== for 1Ant ======*/
284 } BTC_GET_TYPE, *PBTC_GET_TYPE;
286 /* defined for BFP_BTC_SET */
287 typedef enum _BTC_SET_TYPE {
289 BTC_SET_BL_BT_DISABLE,
290 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
291 BTC_SET_BL_BT_TRAFFIC_BUSY,
292 BTC_SET_BL_BT_LIMITED_DIG,
293 BTC_SET_BL_FORCE_TO_ROAM,
294 BTC_SET_BL_TO_REJ_AP_AGG_PKT,
295 BTC_SET_BL_BT_CTRL_AGG_SIZE,
296 BTC_SET_BL_INC_SCAN_DEV_NUM,
297 BTC_SET_BL_BT_TX_RX_MASK,
298 BTC_SET_BL_MIRACAST_PLUS_BT,
301 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
302 BTC_SET_U1_AGG_BUF_SIZE,
304 /* type trigger some action */
305 BTC_SET_ACT_GET_BT_RSSI,
306 BTC_SET_ACT_AGGREGATE_CTRL,
307 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
308 /*===== for 1Ant ======*/
312 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
315 /* type trigger some action */
316 BTC_SET_ACT_LEAVE_LPS,
317 BTC_SET_ACT_ENTER_LPS,
318 BTC_SET_ACT_NORMAL_LPS,
319 BTC_SET_ACT_DISABLE_LOW_POWER,
320 BTC_SET_ACT_UPDATE_RAMASK,
321 BTC_SET_ACT_SEND_MIMO_PS,
322 /* BT Coex related */
323 BTC_SET_ACT_CTRL_BT_INFO,
324 BTC_SET_ACT_CTRL_BT_COEX,
325 BTC_SET_ACT_CTRL_8723B_ANT,
326 /*=================*/
328 } BTC_SET_TYPE, *PBTC_SET_TYPE;
330 typedef enum _BTC_DBG_DISP_TYPE {
331 BTC_DBG_DISP_COEX_STATISTICS = 0x0,
332 BTC_DBG_DISP_BT_LINK_INFO = 0x1,
333 BTC_DBG_DISP_WIFI_STATUS = 0x2,
335 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE;
337 typedef enum _BTC_NOTIFY_TYPE_IPS {
341 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS;
342 typedef enum _BTC_NOTIFY_TYPE_LPS {
343 BTC_LPS_DISABLE = 0x0,
344 BTC_LPS_ENABLE = 0x1,
346 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS;
347 typedef enum _BTC_NOTIFY_TYPE_SCAN {
348 BTC_SCAN_FINISH = 0x0,
349 BTC_SCAN_START = 0x1,
350 BTC_SCAN_START_2G = 0x2,
352 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN;
353 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND {
354 BTC_NOT_SWITCH = 0x0,
355 BTC_SWITCH_TO_24G = 0x1,
356 BTC_SWITCH_TO_5G = 0x2,
357 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3,
359 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND;
360 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE {
361 BTC_ASSOCIATE_FINISH = 0x0,
362 BTC_ASSOCIATE_START = 0x1,
363 BTC_ASSOCIATE_5G_FINISH = 0x2,
364 BTC_ASSOCIATE_5G_START = 0x3,
366 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE;
367 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS {
368 BTC_MEDIA_DISCONNECT = 0x0,
369 BTC_MEDIA_CONNECT = 0x1,
371 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS;
372 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET {
373 BTC_PACKET_UNKNOWN = 0x0,
374 BTC_PACKET_DHCP = 0x1,
375 BTC_PACKET_ARP = 0x2,
376 BTC_PACKET_EAPOL = 0x3,
378 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET;
379 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION {
380 BTC_STACK_OP_NONE = 0x0,
381 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
382 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
384 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION;
387 typedef enum _BTC_ANTENNA_POS {
388 BTC_ANTENNA_AT_MAIN_PORT = 0x1,
389 BTC_ANTENNA_AT_AUX_PORT = 0x2,
390 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS;
393 typedef enum _BTC_BT_OFFON {
396 } BTC_BTOFFON, *PBTC_BT_OFFON;
398 /*==================================================
399 For following block is for coex offload
400 ==================================================*/
401 typedef struct _COL_H2C {
406 } COL_H2C, *PCOL_H2C;
408 #define COL_C2H_ACK_HDR_LEN 3
409 typedef struct _COL_C2H_ACK {
415 } COL_C2H_ACK, *PCOL_C2H_ACK;
417 #define COL_C2H_IND_HDR_LEN 3
418 typedef struct _COL_C2H_IND {
423 } COL_C2H_IND, *PCOL_C2H_IND;
425 /*============================================
426 NOTE: for debug message, the following define should match
427 the strings in coexH2cResultString.
428 ============================================*/
429 typedef enum _COL_H2C_STATUS {
431 COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */
432 COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */
433 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */
434 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */
435 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */
436 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */
437 /* other COL status start from here */
438 COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */
439 COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */
440 COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */
441 COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */
442 COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */
444 } COL_H2C_STATUS, *PCOL_H2C_STATUS;
446 #define COL_MAX_H2C_REQ_NUM 16
448 #define COL_H2C_BUF_LEN 20
449 typedef enum _COL_OPCODE {
450 COL_OP_WIFI_STATUS_NOTIFY = 0x0,
451 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1,
452 COL_OP_WIFI_INFO_NOTIFY = 0x2,
453 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3,
454 COL_OP_SET_CONTROL = 0x4,
455 COL_OP_GET_CONTROL = 0x5,
456 COL_OP_WIFI_OPCODE_MAX
457 } COL_OPCODE, *PCOL_OPCODE;
459 typedef enum _COL_IND_TYPE {
460 COL_IND_BT_INFO = 0x0,
461 COL_IND_PSTDMA = 0x1,
462 COL_IND_LIMITED_TX_RX = 0x2,
463 COL_IND_COEX_TABLE = 0x3,
466 } COL_IND_TYPE, *PCOL_IND_TYPE;
468 typedef struct _COL_SINGLE_H2C_RECORD {
469 u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */
471 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */
473 u4Byte count; /* the total number of the sent h2c command */
474 u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */
475 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD;
477 typedef struct _COL_SINGLE_C2H_IND_RECORD {
478 u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */
480 u4Byte count; /* the total number of the rcvd c2h indication */
481 u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */
482 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD;
484 typedef struct _BTC_OFFLOAD {
485 /* H2C command related */
488 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX];
490 /* C2H Ack related */
492 u4Byte status[COL_STATUS_MAX];
493 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */
494 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN];
495 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM];
497 /* C2H Indication related */
499 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX];
500 u4Byte c2h_ind_status[COL_STATUS_MAX];
501 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN];
503 } BTC_OFFLOAD, *PBTC_OFFLOAD;
504 extern BTC_OFFLOAD gl_coex_offload;
505 /*==================================================*/
509 IN PVOID pBtcContext,
514 IN PVOID pBtcContext,
519 IN PVOID pBtcContext,
524 IN PVOID pBtcContext,
529 (*BFP_BTC_W1_BIT_MASK)(
530 IN PVOID pBtcContext,
537 IN PVOID pBtcContext,
543 IN PVOID pBtcContext,
548 (*BFP_BTC_LOCAL_REG_W1)(
549 IN PVOID pBtcContext,
554 (*BFP_BTC_SET_BB_REG)(
555 IN PVOID pBtcContext,
561 (*BFP_BTC_GET_BB_REG)(
562 IN PVOID pBtcContext,
567 (*BFP_BTC_SET_RF_REG)(
568 IN PVOID pBtcContext,
575 (*BFP_BTC_GET_RF_REG)(
576 IN PVOID pBtcContext,
583 IN PVOID pBtcContext,
586 IN pu1Byte pCmdBuffer
603 (*BFP_BTC_SET_BT_REG)(
604 IN PVOID pBtcContext,
610 (*BFP_BTC_SET_BT_ANT_DETECTION)(
611 IN PVOID pBtcContext,
617 (*BFP_BTC_SET_BT_TRX_MASK)(
618 IN PVOID pBtcContext,
619 IN u1Byte bt_trx_mask
623 (*BFP_BTC_GET_BT_REG)(
624 IN PVOID pBtcContext,
629 (*BFP_BTC_DISP_DBG_MSG)(
634 typedef COL_H2C_STATUS
635 (*BFP_BTC_COEX_H2C_PROCESS)(
638 IN u1Byte opcode_ver,
640 IN u1Byte h2c_par_len
644 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)(
649 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)(
654 (*BFP_BTC_GET_PHYDM_VERSION)(
659 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)(
661 IN u1Byte RA_offset_direction,
662 IN u1Byte RA_threshold_offset
666 (*BTC_PHYDM_CMNINFOQUERY)(
672 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)(
678 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)(
683 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)(
684 IN PVOID pBtcContext,
689 (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)(
690 IN PVOID pBtcContext,
697 boolean bt_enable_disable_change;
698 u8 rssi_adjust_for_agc_table_on;
699 u8 rssi_adjust_for_1ant_coex_type;
700 boolean pre_bt_ctrl_agg_buf_size;
701 boolean bt_ctrl_agg_buf_size;
702 boolean pre_reject_agg_pkt;
703 boolean reject_agg_pkt;
704 boolean increase_scan_dev_num;
705 boolean bt_tx_rx_mask;
713 u32 get_bt_fw_ver_cnt;
715 boolean miracast_plus_bt;
717 boolean bt_disable_low_pwr;
721 boolean force_to_roam; /* for 1Ant solution */
727 struct btc_stack_info {
728 boolean profile_notified;
729 u16 hci_version; /* stack hci version */
731 boolean bt_link_exist;
738 boolean unknown_acl_exist;
742 struct btc_bt_link_info {
743 boolean bt_link_exist;
744 boolean bt_hi_pri_link_exist;
757 struct btc_statistics {
760 u32 cnt_pre_load_firmware;
761 u32 cnt_init_hw_config;
762 u32 cnt_init_coex_dm;
766 u32 cnt_connect_notify;
767 u32 cnt_media_status_notify;
768 u32 cnt_specific_packet_notify;
769 u32 cnt_bt_info_notify;
770 u32 cnt_rf_status_notify;
772 u32 cnt_coex_dm_switch;
773 u32 cnt_stack_operation_notify;
778 BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/
779 PVOID Adapter; /*default adapter*/
780 struct btc_board_info board_info;
781 struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/
782 struct btc_stack_info stack_info;
783 struct btc_bt_link_info bt_link_info;
784 BTC_CHIP_INTERFACE chip_interface;
788 BOOLEAN stop_coex_dm;
789 BOOLEAN manual_control;
790 BOOLEAN bdontenterLPS;
792 struct btc_statistics statistics;
793 u1Byte pwrModeVal[10];
795 /* function pointers */
797 BFP_BTC_R1 btc_read_1byte;
798 BFP_BTC_W1 btc_write_1byte;
799 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask;
800 BFP_BTC_R2 btc_read_2byte;
801 BFP_BTC_W2 btc_write_2byte;
802 BFP_BTC_R4 btc_read_4byte;
803 BFP_BTC_W4 btc_write_4byte;
804 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte;
805 /* read/write bb related */
806 BFP_BTC_SET_BB_REG btc_set_bb_reg;
807 BFP_BTC_GET_BB_REG btc_get_bb_reg;
809 /* read/write rf related */
810 BFP_BTC_SET_RF_REG btc_set_rf_reg;
811 BFP_BTC_GET_RF_REG btc_get_rf_reg;
813 /* fill h2c related */
814 BFP_BTC_FILL_H2C btc_fill_h2c;
816 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg;
817 /* normal get/set related */
821 BFP_BTC_GET_BT_REG btc_get_bt_reg;
822 BFP_BTC_SET_BT_REG btc_set_bt_reg;
824 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection;
826 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process;
827 BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask;
828 BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature;
829 BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version;
830 BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version;
831 BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold;
832 BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter;
833 BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt;
834 BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt;
835 BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt;
836 BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt;
838 typedef struct btc_coexist *PBTC_COEXIST;
840 extern struct btc_coexist GLBtCoexist;
843 EXhalbtcoutsrc_InitlizeVariables(
847 EXhalbtcoutsrc_PowerOnSetting(
848 IN PBTC_COEXIST pBtCoexist
851 EXhalbtcoutsrc_PreLoadFirmware(
852 IN PBTC_COEXIST pBtCoexist
855 EXhalbtcoutsrc_InitHwConfig(
856 IN PBTC_COEXIST pBtCoexist,
860 EXhalbtcoutsrc_InitCoexDm(
861 IN PBTC_COEXIST pBtCoexist
864 EXhalbtcoutsrc_IpsNotify(
865 IN PBTC_COEXIST pBtCoexist,
869 EXhalbtcoutsrc_LpsNotify(
870 IN PBTC_COEXIST pBtCoexist,
874 EXhalbtcoutsrc_ScanNotify(
875 IN PBTC_COEXIST pBtCoexist,
879 EXhalbtcoutsrc_SetAntennaPathNotify(
880 IN PBTC_COEXIST pBtCoexist,
884 EXhalbtcoutsrc_ConnectNotify(
885 IN PBTC_COEXIST pBtCoexist,
889 EXhalbtcoutsrc_MediaStatusNotify(
890 IN PBTC_COEXIST pBtCoexist,
891 IN RT_MEDIA_STATUS mediaStatus
894 EXhalbtcoutsrc_SpecificPacketNotify(
895 IN PBTC_COEXIST pBtCoexist,
899 EXhalbtcoutsrc_BtInfoNotify(
900 IN PBTC_COEXIST pBtCoexist,
905 EXhalbtcoutsrc_RfStatusNotify(
906 IN PBTC_COEXIST pBtCoexist,
910 EXhalbtcoutsrc_StackOperationNotify(
911 IN PBTC_COEXIST pBtCoexist,
915 EXhalbtcoutsrc_HaltNotify(
916 IN PBTC_COEXIST pBtCoexist
919 EXhalbtcoutsrc_PnpNotify(
920 IN PBTC_COEXIST pBtCoexist,
924 EXhalbtcoutsrc_CoexDmSwitch(
925 IN PBTC_COEXIST pBtCoexist
928 EXhalbtcoutsrc_Periodical(
929 IN PBTC_COEXIST pBtCoexist
932 EXhalbtcoutsrc_DbgControl(
933 IN PBTC_COEXIST pBtCoexist,
939 EXhalbtcoutsrc_AntennaDetection(
940 IN PBTC_COEXIST pBtCoexist,
947 EXhalbtcoutsrc_StackUpdateProfileInfo(
951 EXhalbtcoutsrc_SetHciVersion(
955 EXhalbtcoutsrc_SetBtPatchVersion(
956 IN u2Byte btHciVersion,
957 IN u2Byte btPatchVersion
960 EXhalbtcoutsrc_UpdateMinBtRssi(
965 EXhalbtcoutsrc_SetBtExist(
970 EXhalbtcoutsrc_SetChipType(
974 EXhalbtcoutsrc_SetAntNum(
979 EXhalbtcoutsrc_SetSingleAntPath(
980 IN u1Byte singleAntPath
983 EXhalbtcoutsrc_DisplayBtCoexInfo(
984 IN PBTC_COEXIST pBtCoexist
987 EXhalbtcoutsrc_DisplayAntDetection(
988 IN PBTC_COEXIST pBtCoexist
991 #define MASKBYTE0 0xff
992 #define MASKBYTE1 0xff00
993 #define MASKBYTE2 0xff0000
994 #define MASKBYTE3 0xff000000
995 #define MASKHWORD 0xffff0000
996 #define MASKLWORD 0x0000ffff
997 #define MASKDWORD 0xffffffff
998 #define MASK12BITS 0xfff
999 #define MASKH4BITS 0xf0000000
1000 #define MASKOFDM_D 0xffc00000
1001 #define MASKCCK 0x3f3f3f3f