1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
20 #ifndef __HAL_COMMON_H__
21 #define __HAL_COMMON_H__
23 #include "HalVerDef.h"
26 #include "hal_phy_reg.h"
27 #include "hal_com_reg.h"
28 #include "hal_com_phycfg.h"
30 /*------------------------------ Tx Desc definition Macro ------------------------*/
31 //#pragma mark -- Tx Desc related definition. --
32 //----------------------------------------------------------------------------
33 //-----------------------------------------------------------
35 //-----------------------------------------------------------
36 // CCK Rates, TxHT = 0
37 #define DESC_RATE1M 0x00
38 #define DESC_RATE2M 0x01
39 #define DESC_RATE5_5M 0x02
40 #define DESC_RATE11M 0x03
42 // OFDM Rates, TxHT = 0
43 #define DESC_RATE6M 0x04
44 #define DESC_RATE9M 0x05
45 #define DESC_RATE12M 0x06
46 #define DESC_RATE18M 0x07
47 #define DESC_RATE24M 0x08
48 #define DESC_RATE36M 0x09
49 #define DESC_RATE48M 0x0a
50 #define DESC_RATE54M 0x0b
52 // MCS Rates, TxHT = 1
53 #define DESC_RATEMCS0 0x0c
54 #define DESC_RATEMCS1 0x0d
55 #define DESC_RATEMCS2 0x0e
56 #define DESC_RATEMCS3 0x0f
57 #define DESC_RATEMCS4 0x10
58 #define DESC_RATEMCS5 0x11
59 #define DESC_RATEMCS6 0x12
60 #define DESC_RATEMCS7 0x13
61 #define DESC_RATEMCS8 0x14
62 #define DESC_RATEMCS9 0x15
63 #define DESC_RATEMCS10 0x16
64 #define DESC_RATEMCS11 0x17
65 #define DESC_RATEMCS12 0x18
66 #define DESC_RATEMCS13 0x19
67 #define DESC_RATEMCS14 0x1a
68 #define DESC_RATEMCS15 0x1b
69 #define DESC_RATEMCS16 0x1C
70 #define DESC_RATEMCS17 0x1D
71 #define DESC_RATEMCS18 0x1E
72 #define DESC_RATEMCS19 0x1F
73 #define DESC_RATEMCS20 0x20
74 #define DESC_RATEMCS21 0x21
75 #define DESC_RATEMCS22 0x22
76 #define DESC_RATEMCS23 0x23
77 #define DESC_RATEMCS24 0x24
78 #define DESC_RATEMCS25 0x25
79 #define DESC_RATEMCS26 0x26
80 #define DESC_RATEMCS27 0x27
81 #define DESC_RATEMCS28 0x28
82 #define DESC_RATEMCS29 0x29
83 #define DESC_RATEMCS30 0x2A
84 #define DESC_RATEMCS31 0x2B
85 #define DESC_RATEVHTSS1MCS0 0x2C
86 #define DESC_RATEVHTSS1MCS1 0x2D
87 #define DESC_RATEVHTSS1MCS2 0x2E
88 #define DESC_RATEVHTSS1MCS3 0x2F
89 #define DESC_RATEVHTSS1MCS4 0x30
90 #define DESC_RATEVHTSS1MCS5 0x31
91 #define DESC_RATEVHTSS1MCS6 0x32
92 #define DESC_RATEVHTSS1MCS7 0x33
93 #define DESC_RATEVHTSS1MCS8 0x34
94 #define DESC_RATEVHTSS1MCS9 0x35
95 #define DESC_RATEVHTSS2MCS0 0x36
96 #define DESC_RATEVHTSS2MCS1 0x37
97 #define DESC_RATEVHTSS2MCS2 0x38
98 #define DESC_RATEVHTSS2MCS3 0x39
99 #define DESC_RATEVHTSS2MCS4 0x3A
100 #define DESC_RATEVHTSS2MCS5 0x3B
101 #define DESC_RATEVHTSS2MCS6 0x3C
102 #define DESC_RATEVHTSS2MCS7 0x3D
103 #define DESC_RATEVHTSS2MCS8 0x3E
104 #define DESC_RATEVHTSS2MCS9 0x3F
105 #define DESC_RATEVHTSS3MCS0 0x40
106 #define DESC_RATEVHTSS3MCS1 0x41
107 #define DESC_RATEVHTSS3MCS2 0x42
108 #define DESC_RATEVHTSS3MCS3 0x43
109 #define DESC_RATEVHTSS3MCS4 0x44
110 #define DESC_RATEVHTSS3MCS5 0x45
111 #define DESC_RATEVHTSS3MCS6 0x46
112 #define DESC_RATEVHTSS3MCS7 0x47
113 #define DESC_RATEVHTSS3MCS8 0x48
114 #define DESC_RATEVHTSS3MCS9 0x49
115 #define DESC_RATEVHTSS4MCS0 0x4A
116 #define DESC_RATEVHTSS4MCS1 0x4B
117 #define DESC_RATEVHTSS4MCS2 0x4C
118 #define DESC_RATEVHTSS4MCS3 0x4D
119 #define DESC_RATEVHTSS4MCS4 0x4E
120 #define DESC_RATEVHTSS4MCS5 0x4F
121 #define DESC_RATEVHTSS4MCS6 0x50
122 #define DESC_RATEVHTSS4MCS7 0x51
123 #define DESC_RATEVHTSS4MCS8 0x52
124 #define DESC_RATEVHTSS4MCS9 0x53
126 #define HDATA_RATE(rate)\
127 (rate==DESC_RATE1M)?"CCK_1M":\
128 (rate==DESC_RATE2M)?"CCK_2M":\
129 (rate==DESC_RATE5_5M)?"CCK5_5M":\
130 (rate==DESC_RATE11M)?"CCK_11M":\
131 (rate==DESC_RATE6M)?"OFDM_6M":\
132 (rate==DESC_RATE9M)?"OFDM_9M":\
133 (rate==DESC_RATE12M)?"OFDM_12M":\
134 (rate==DESC_RATE18M)?"OFDM_18M":\
135 (rate==DESC_RATE24M)?"OFDM_24M":\
136 (rate==DESC_RATE36M)?"OFDM_36M":\
137 (rate==DESC_RATE48M)?"OFDM_48M":\
138 (rate==DESC_RATE54M)?"OFDM_54M":\
139 (rate==DESC_RATEMCS0)?"MCS0":\
140 (rate==DESC_RATEMCS1)?"MCS1":\
141 (rate==DESC_RATEMCS2)?"MCS2":\
142 (rate==DESC_RATEMCS3)?"MCS3":\
143 (rate==DESC_RATEMCS4)?"MCS4":\
144 (rate==DESC_RATEMCS5)?"MCS5":\
145 (rate==DESC_RATEMCS6)?"MCS6":\
146 (rate==DESC_RATEMCS7)?"MCS7":\
147 (rate==DESC_RATEMCS8)?"MCS8":\
148 (rate==DESC_RATEMCS9)?"MCS9":\
149 (rate==DESC_RATEMCS10)?"MCS10":\
150 (rate==DESC_RATEMCS11)?"MCS11":\
151 (rate==DESC_RATEMCS12)?"MCS12":\
152 (rate==DESC_RATEMCS13)?"MCS13":\
153 (rate==DESC_RATEMCS14)?"MCS14":\
154 (rate==DESC_RATEMCS15)?"MCS15":\
155 (rate==DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0":\
156 (rate==DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1":\
157 (rate==DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2":\
158 (rate==DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3":\
159 (rate==DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4":\
160 (rate==DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5":\
161 (rate==DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6":\
162 (rate==DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7":\
163 (rate==DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8":\
164 (rate==DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9":\
165 (rate==DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0":\
166 (rate==DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1":\
167 (rate==DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2":\
168 (rate==DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3":\
169 (rate==DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4":\
170 (rate==DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5":\
171 (rate==DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6":\
172 (rate==DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7":\
173 (rate==DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8":\
174 (rate==DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9":"UNKNOW"
181 typedef enum _RT_MEDIA_STATUS {
182 RT_MEDIA_DISCONNECT = 0,
186 #define MAX_DLFW_PAGE_SIZE 4096 // @ page : 4k bytes
187 typedef enum _FIRMWARE_SOURCE {
188 FW_SOURCE_IMG_FILE = 0,
189 FW_SOURCE_HEADER_FILE = 1, //from header file
190 } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
193 // BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
194 //#define MAX_TX_QUEUE 9
196 #define TX_SELE_HQ BIT(0) // High Queue
197 #define TX_SELE_LQ BIT(1) // Low Queue
198 #define TX_SELE_NQ BIT(2) // Normal Queue
199 #define TX_SELE_EQ BIT(3) // Extern Queue
201 #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
202 #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len)&0xFF ? 1:0))
203 #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0))
204 #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0))
207 void dump_chip_info(HAL_VERSION ChipVersion);
209 u8 //return the final channel plan decision
210 hal_com_config_channel_plan(
211 IN PADAPTER padapter,
212 IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
213 IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
214 IN u8 def_channel_plan, //channel plan used when the former two is invalid
215 IN BOOLEAN AutoLoadFail
224 u8 MRateToHwRate(u8 rate);
226 u8 HwRateToMRate(u8 rate);
235 IN PADAPTER pAdapter,
239 void hal_init_macaddr(_adapter *adapter);
241 void rtw_init_hal_com_default_value(PADAPTER Adapter);
243 void c2h_evt_clear(_adapter *adapter);
244 s32 c2h_evt_read(_adapter *adapter, u8 *buf);
245 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
247 u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta);
248 u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type);
249 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta);
251 void hw_var_port_switch(_adapter *adapter);
253 void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
254 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
255 void rtw_hal_check_rxfifo_full(_adapter *adapter);
257 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
258 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
278 GetHexValueFromString(
285 GetFractionValueFromString(
288 IN OUT u8* pFraction,
298 ParseQualifiedString(
302 IN char LeftQualifier,
303 IN char RightQualifier
307 GetU1ByteIntegerFromStringInDecimal(
318 void linked_info_dump(_adapter *padapter,u8 benable);
319 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
320 void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
321 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
322 void rtw_dump_raw_rssi_info(_adapter *padapter);
326 #ifdef CONFIG_RF_GAIN_OFFSET
327 void rtw_bb_rf_gain_offset(_adapter *padapter);
328 #endif //CONFIG_RF_GAIN_OFFSET
329 u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel);
330 #endif //__HAL_COMMON_H__