drivers/net/wireless/rockchip_wlan/rtl8189es/hal/rtl8188e/rtl8188e_sreset.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *\r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 #define _RTL8188E_SRESET_C_\r
  21 \r
  22 //#include <rtl8188e_sreset.h>\r
  23 #include <rtl8188e_hal.h>\r
  24 \r
  25 #ifdef DBG_CONFIG_ERROR_DETECT\r
  26 \r
  27 void rtl8188e_sreset_xmit_status_check(_adapter *padapter)\r
  28 {\r
  29         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);\r
  30         struct sreset_priv *psrtpriv = &pHalData->srestpriv;\r
  31 \r
  32         unsigned long current_time;\r
  33         struct xmit_priv        *pxmitpriv = &padapter->xmitpriv;\r
  34         unsigned int diff_time;\r
  35         u32 txdma_status;\r
  36         \r
  37         if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){\r
  38                 DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);   \r
  39                 rtw_hal_sreset_reset(padapter);\r
  40         }\r
  41 #ifdef CONFIG_USB_HCI\r
  42         //total xmit irp = 4\r
  43         //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);\r
  44         //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)\r
  45         current_time = rtw_get_current_time();\r
  46 \r
  47         if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {\r
  48 \r
  49                 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);\r
  50 \r
  51                 if (diff_time > 2000) {\r
  52                         if (psrtpriv->last_tx_complete_time == 0) {\r
  53                                 psrtpriv->last_tx_complete_time = current_time;\r
  54                         }\r
  55                         else{\r
  56                                 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);\r
  57                                 if (diff_time > 4000) {\r
  58                                         u32 ability;\r
  59 \r
  60                                         //padapter->Wifi_Error_Status = WIFI_TX_HANG;\r
  61                                         rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&ability);\r
  62 \r
  63                                         DBG_871X("%s tx hang %s\n", __FUNCTION__,\r
  64                                                 (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : "");\r
  65 \r
  66                                         if (!(ability & ODM_BB_ADAPTIVITY))\r
  67                                                 rtw_hal_sreset_reset(padapter);\r
  68                                 }\r
  69                         }\r
  70                 }\r
  71         }\r
  72 #endif //CONFIG_USB_HCI\r
  73 \r
  74         if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {\r
  75                 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;\r
  76                 rtw_hal_sreset_reset(padapter);\r
  77                 return;\r
  78         }\r
  79 }\r
  80 \r
  81 void rtl8188e_sreset_linked_status_check(_adapter *padapter)\r
  82 {\r
  83         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);\r
  84         struct sreset_priv *psrtpriv = &pHalData->srestpriv;\r
  85 \r
  86         u32 rx_dma_status = 0;\r
  87         u8 fw_status=0;\r
  88         rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);\r
  89         if(rx_dma_status!= 0x00){\r
  90                 DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status);\r
  91                 rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status);\r
  92         }       \r
  93         fw_status = rtw_read8(padapter,REG_FMETHR);\r
  94         if(fw_status != 0x00)\r
  95         {               \r
  96                 if(fw_status == 1)\r
  97                         DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!   \n",__FUNCTION__,fw_status);\r
  98                 else if(fw_status == 2)\r
  99                         DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!   \n",__FUNCTION__,fw_status);\r
 100         }\r
 101 #if 0\r
 102         u32 regc50,regc58,reg824,reg800;\r
 103         regc50 = rtw_read32(padapter,0xc50);\r
 104         regc58 = rtw_read32(padapter,0xc58);\r
 105         reg824 = rtw_read32(padapter,0x824);\r
 106         reg800 = rtw_read32(padapter,0x800);\r
 107         if(     ((regc50&0xFFFFFF00)!= 0x69543400)||\r
 108                 ((regc58&0xFFFFFF00)!= 0x69543400)||\r
 109                 (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||\r
 110                 ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))\r
 111         {\r
 112                 DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,\r
 113                         regc50, regc58, reg824, reg800);\r
 114                 rtw_hal_sreset_reset(padapter);\r
 115         }\r
 116 #endif\r
 117 \r
 118         if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {\r
 119                 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;\r
 120                 rtw_hal_sreset_reset(padapter);\r
 121                 return;\r
 122         }\r
 123 }\r
 124 #endif\r
 125 \r