1 /******************************************************************************
\r
3 * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
\r
5 * This program is free software; you can redistribute it and/or modify it
\r
6 * under the terms of version 2 of the GNU General Public License as
\r
7 * published by the Free Software Foundation.
\r
9 * This program is distributed in the hope that it will be useful, but WITHOUT
\r
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
14 * You should have received a copy of the GNU General Public License along with
\r
15 * this program; if not, write to the Free Software Foundation, Inc.,
\r
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
\r
19 ******************************************************************************/
\r
20 #ifndef __RTL8192E_HAL_H__
\r
21 #define __RTL8192E_HAL_H__
\r
23 //#include "hal_com.h"
\r
25 #include "hal_data.h"
\r
27 //include HAL Related header after HAL Related compiling flags
\r
28 #include "rtl8192e_spec.h"
\r
29 #include "rtl8192e_rf.h"
\r
30 #include "rtl8192e_dm.h"
\r
31 #include "rtl8192e_recv.h"
\r
32 #include "rtl8192e_xmit.h"
\r
33 #include "rtl8192e_cmd.h"
\r
34 #include "rtl8192e_led.h"
\r
35 #include "Hal8192EPwrSeq.h"
\r
36 #include "Hal8192EPhyReg.h"
\r
37 #include "Hal8192EPhyCfg.h"
\r
40 #ifdef DBG_CONFIG_ERROR_DETECT
\r
41 #include "rtl8192e_sreset.h"
\r
45 //---------------------------------------------------------------------
\r
46 // RTL8192E From header
\r
47 //---------------------------------------------------------------------
\r
48 #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin"
\r
49 #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin"
\r
50 #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt"
\r
51 #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt"
\r
52 #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt"
\r
53 #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt"
\r
54 #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt"
\r
55 #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt"
\r
56 #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt"
\r
57 #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt"
\r
58 #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt"
\r
59 #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt"
\r
61 //---------------------------------------------------------------------
\r
62 // RTL8192E Power Configuration CMDs for PCIe interface
\r
63 //---------------------------------------------------------------------
\r
64 #define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow
\r
65 #define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow
\r
66 #define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow
\r
67 #define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow
\r
68 #define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow
\r
69 #define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow
\r
70 #define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow
\r
71 #define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow
\r
72 #define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow
\r
75 #if 1 // download firmware related data structure
\r
76 #define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k
\r
77 #define FW_START_ADDRESS 0x1000
\r
78 #define FW_END_ADDRESS 0x5FFF
\r
81 #define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0)
\r
85 typedef struct _RT_FIRMWARE_8192E {
\r
86 FIRMWARE_SOURCE eFWSource;
\r
87 #ifdef CONFIG_EMBEDDED_FWIMG
\r
90 u8 szFwBuffer[FW_SIZE_8192E];
\r
93 } RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E;
\r
96 // This structure must be cared byte-ordering
\r
98 // Added by tynli. 2009.12.04.
\r
100 //=====================================================
\r
101 // Firmware Header(8-byte alinment required)
\r
102 //=====================================================
\r
103 //--- LONG WORD 0 ----
\r
104 #define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
\r
105 #define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI
\r
106 #define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
\r
107 #define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version
\r
108 #define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00
\r
109 #define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8)
\r
111 //--- LONG WORD 1 ----
\r
112 #define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field
\r
113 #define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field
\r
114 #define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field
\r
115 #define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field
\r
116 #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code
\r
117 #define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)
\r
119 //--- LONG WORD 2 ----
\r
120 #define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index
\r
121 #define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)
\r
123 //--- LONG WORD 3 ----
\r
124 #define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)
\r
125 #define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)
\r
127 #endif // download firmware related data structure
\r
129 #define DRIVER_EARLY_INT_TIME_8192E 0x05
\r
130 #define BCN_DMA_ATIME_INT_TIME_8192E 0x02
\r
131 #define RX_DMA_SIZE_8192E 0x4000 /* 16K*/
\r
133 #ifdef CONFIG_WOWLAN
\r
134 #define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/
\r
136 #define RESV_FMWF 0
\r
139 #ifdef CONFIG_FW_C2H_DEBUG
\r
140 #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/
\r
142 #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes )*/
\r
144 #define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/
\r
146 //For General Reserved Page Number(Beacon Queue is reserved page)
\r
147 //if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1
\r
148 //Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1
\r
149 #define RSVD_PAGE_NUM_8192E 0x08
\r
150 //For WoWLan , more reserved page
\r
151 //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6
\r
152 #ifdef CONFIG_WOWLAN
\r
153 #define WOWLAN_PAGE_NUM_8192E 0x07
\r
155 #define WOWLAN_PAGE_NUM_8192E 0x00
\r
158 #ifdef CONFIG_PNO_SUPPORT
\r
159 #undef WOWLAN_PAGE_NUM_8192E
\r
160 #define WOWLAN_PAGE_NUM_8192E 0x0d
\r
164 Tx FIFO Size : 64KB
\r
165 Tx page Size : 256B
\r
166 Total page numbers : 256(0x100)
\r
169 #define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E+WOWLAN_PAGE_NUM_8192E)
\r
171 #define TOTAL_PAGE_NUMBER_8192E (0x100)
\r
172 #define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E)
\r
174 #define TX_PAGE_BOUNDARY_8192E ( TX_TOTAL_PAGE_NUMBER_8192E ) /* beacon header start address */
\r
177 #define PAGE_SIZE_TX_92E PAGE_SIZE_256
\r
178 #define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E *PAGE_SIZE_TX_92E)
\r
180 #define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5
\r
181 #define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0
\r
183 // For Normal Chip Setting
\r
184 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C
\r
186 #define NORMAL_PAGE_NUM_HPQ_8192E 0x10
\r
187 #define NORMAL_PAGE_NUM_LPQ_8192E 0x10
\r
188 #define NORMAL_PAGE_NUM_NPQ_8192E 0x10
\r
189 #define NORMAL_PAGE_NUM_EPQ_8192E 0x00
\r
192 //Note: For WMM Normal Chip Setting ,modify later
\r
193 #define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E
\r
194 #define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E
\r
195 #define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E
\r
198 //-------------------------------------------------------------------------
\r
200 //-------------------------------------------------------------------------
\r
202 // pic buffer descriptor
\r
203 #define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM
\r
204 #define TX_DESC_NUM_92E 128
\r
205 #define RX_DESC_NUM_92E 128
\r
207 //-------------------------------------------------------------------------
\r
209 //-------------------------------------------------------------------------
\r
211 #define HWSET_MAX_SIZE_8192E 512
\r
213 #define EFUSE_REAL_CONTENT_LEN_8192E 512
\r
215 #define EFUSE_MAP_LEN_8192E 512
\r
216 #define EFUSE_MAX_SECTION_8192E 64
\r
217 #define EFUSE_MAX_WORD_UNIT_8192E 4
\r
218 #define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
\r
219 #define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E)
\r
221 // <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
\r
222 // 9bytes + 1byt + 5bytes and pre 1byte.
\r
224 // | 1byte|----8bytes----|1byte|--5bytes--|
\r
225 // | | Reserved(14bytes) |
\r
227 #define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
\r
231 //========================================================
\r
232 // EFUSE for BT definition
\r
233 //========================================================
\r
234 #define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512
\r
235 #define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2
\r
236 #define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes
\r
237 #define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8
\r
239 #define EFUSE_PROTECT_BYTES_BANK_8192E 16
\r
240 #define EFUSE_MAX_BANK_8192E 3
\r
241 //===========================================================
\r
243 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
\r
244 #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
\r
246 //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
\r
248 //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
\r
250 // rtl8812_hal_init.c
\r
251 void _8051Reset8192E(PADAPTER padapter);
\r
252 s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);
\r
253 void InitializeFirmwareVars8192E(PADAPTER padapter);
\r
255 s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy);
\r
258 u8 GetEEPROMSize8192E(PADAPTER padapter);
\r
259 void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent);
\r
260 void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo);
\r
261 void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
\r
262 void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail);
\r
263 void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail);
\r
264 void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
\r
265 void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail);
\r
266 void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
\r
267 void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
\r
268 void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);
\r
269 void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
\r
270 void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
\r
271 void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
\r
272 void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);
\r
273 void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
\r
275 u8 Hal_CrystalAFEAdjust(_adapter * Adapter);
\r
277 BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter);
\r
279 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
\r
280 void Hal_DetectWoWMode(PADAPTER pAdapter);
\r
281 #endif //CONFIG_WOWLAN
\r
283 /***********************************************************/
\r
284 // RTL8192E-MAC Setting
\r
285 VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter);
\r
286 VOID _InitQueuePriority_8192E(IN PADAPTER Adapter);
\r
287 VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy);
\r
288 VOID _InitPageBoundary_8192E(IN PADAPTER Adapter);
\r
289 //VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter);
\r
290 VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize);
\r
291 VOID _InitRDGSetting_8192E(PADAPTER Adapter);
\r
292 void _InitID_8192E(IN PADAPTER Adapter);
\r
293 VOID _InitNetworkType_8192E(IN PADAPTER Adapter);
\r
294 VOID _InitWMACSetting_8192E(IN PADAPTER Adapter);
\r
295 VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter);
\r\r
296 VOID _InitRateFallback_8192E(IN PADAPTER Adapter);
\r
297 VOID _InitEDCA_8192E( IN PADAPTER Adapter);
\r
298 VOID _InitRetryFunction_8192E( IN PADAPTER Adapter);
\r
299 VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter);
\r
300 VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter);
\r
301 VOID _InitBeaconMaxError_8192E(
\r
302 IN PADAPTER Adapter,
\r
303 IN BOOLEAN InfraMode
\r
305 void SetBeaconRelatedRegisters8192E(PADAPTER padapter);
\r
306 VOID hal_ReadRFType_8192E(PADAPTER Adapter);
\r
307 // RTL8192E-MAC Setting
\r
308 /***********************************************************/
\r
310 void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
\r
311 void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
\r
314 IN PADAPTER Adapter,
\r
315 IN HAL_DEF_VARIABLE eVariable,
\r
320 IN PADAPTER Adapter,
\r
321 IN HAL_DEF_VARIABLE eVariable,
\r
325 void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc);
\r
326 void init_hal_spec_8192e(_adapter *adapter);
\r
327 void rtl8192e_init_default_value(_adapter * padapter);
\r
329 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
\r
331 void rtl8192e_start_thread(_adapter *padapter);
\r
332 void rtl8192e_stop_thread(_adapter *padapter);
\r
334 #ifdef CONFIG_PCI_HCI
\r
335 BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter);
\r
336 u16 get_txdesc_buf_addr(u16 ff_hwaddr);
\r
339 #ifdef CONFIG_SDIO_HCI
\r
340 #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
\r
341 void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ);
\r
345 #ifdef CONFIG_BT_COEXIST
\r
346 void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter);
\r
349 #endif //__RTL8192E_HAL_H__
\r