drivers/net/wireless/rockchip_wlan/rtl8188fu/hal/phydm/phydm_hwconfig.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 //============================================================\r
  22 // include files\r
  23 //============================================================\r
  24 \r
  25 #include "mp_precomp.h"\r
  26 #include "phydm_precomp.h"\r
  27 \r
  28 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))\r
  29 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))\r
  30 \r
  31 \r
  32 #if (PHYDM_TESTCHIP_SUPPORT == 1)\r
  33 #define READ_AND_CONFIG(ic, txt) do {\\r
  34                                             if (pDM_Odm->bIsMPChip)\\r
  35                                                     READ_AND_CONFIG_MP(ic,txt);\\r
  36                                             else\\r
  37                                                 READ_AND_CONFIG_TC(ic,txt);\\r
  38                                     } while(0)\r
  39 #else\r
  40   #define READ_AND_CONFIG     READ_AND_CONFIG_MP\r
  41 #endif\r
  42 \r
  43 \r
  44 #define READ_FIRMWARE_MP(ic, txt)               (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize))\r
  45 #define READ_FIRMWARE_TC(ic, txt)               (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize))              \r
  46 \r
  47 #if (PHYDM_TESTCHIP_SUPPORT == 1)\r
  48 #define READ_FIRMWARE(ic, txt) do {\\r
  49                                                 if (pDM_Odm->bIsMPChip)\\r
  50                                                         READ_FIRMWARE_MP(ic,txt);\\r
  51                                                 else\\r
  52                                                         READ_FIRMWARE_TC(ic,txt);\\r
  53                                         } while(0) \r
  54 #else\r
  55 #define READ_FIRMWARE     READ_FIRMWARE_MP\r
  56 #endif\r
  57                                                 \r
  58 #define GET_VERSION_MP(ic, txt)                 (ODM_GetVersion_MP_##ic##txt())\r
  59 #define GET_VERSION_TC(ic, txt)                 (ODM_GetVersion_TC_##ic##txt())\r
  60 #define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt))\r
  61 \r
  62 u1Byte\r
  63 odm_QueryRxPwrPercentage(\r
  64         IN              s1Byte          AntPower\r
  65         )\r
  66 {\r
  67         if ((AntPower <= -100) || (AntPower >= 20))\r
  68         {\r
  69                 return  0;\r
  70         }\r
  71         else if (AntPower >= 0)\r
  72         {\r
  73                 return  100;\r
  74         }\r
  75         else\r
  76         {\r
  77                 return  (100+AntPower);\r
  78         }\r
  79         \r
  80 }\r
  81 \r
  82 \r
  83 //\r
  84 // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.\r
  85 // IF other SW team do not support the feature, remove this section.??\r
  86 //\r
  87 s4Byte\r
  88 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(      \r
  89         IN OUT PDM_ODM_T pDM_Odm,\r
  90         s4Byte CurrSig \r
  91 )\r
  92 {       \r
  93         s4Byte RetSig = 0;\r
  94 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
  95         //if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
  96         {\r
  97                 // Step 1. Scale mapping.\r
  98                 // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.\r
  99                 // 20100426 Joseph: Modify Signal strength mapping.\r
 100                 // This modification makes the RSSI indication similar to Intel solution.\r
 101                 // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.\r
 102                 if(CurrSig >= 54 && CurrSig <= 100)\r
 103                 {\r
 104                         RetSig = 100;\r
 105                 }\r
 106                 else if(CurrSig>=42 && CurrSig <= 53 )\r
 107                 {\r
 108                         RetSig = 95;\r
 109                 }\r
 110                 else if(CurrSig>=36 && CurrSig <= 41 )\r
 111                 {\r
 112                         RetSig = 74 + ((CurrSig - 36) *20)/6;\r
 113                 }\r
 114                 else if(CurrSig>=33 && CurrSig <= 35 )\r
 115                 {\r
 116                         RetSig = 65 + ((CurrSig - 33) *8)/2;\r
 117                 }\r
 118                 else if(CurrSig>=18 && CurrSig <= 32 )\r
 119                 {\r
 120                         RetSig = 62 + ((CurrSig - 18) *2)/15;\r
 121                 }\r
 122                 else if(CurrSig>=15 && CurrSig <= 17 )\r
 123                 {\r
 124                         RetSig = 33 + ((CurrSig - 15) *28)/2;\r
 125                 }\r
 126                 else if(CurrSig>=10 && CurrSig <= 14 )\r
 127                 {\r
 128                         RetSig = 39;\r
 129                 }\r
 130                 else if(CurrSig>=8 && CurrSig <= 9 )\r
 131                 {\r
 132                         RetSig = 33;\r
 133                 }\r
 134                 else if(CurrSig <= 8 )\r
 135                 {\r
 136                         RetSig = 19;\r
 137                 }\r
 138         }\r
 139 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 140         return RetSig;\r
 141 }\r
 142 \r
 143 s4Byte\r
 144 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(     \r
 145         IN OUT PDM_ODM_T pDM_Odm,\r
 146         s4Byte CurrSig \r
 147 )\r
 148 {\r
 149         s4Byte RetSig = 0;\r
 150 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 151         //if(pDM_Odm->SupportInterface  == ODM_ITRF_USB)\r
 152         {\r
 153                 // Netcore request this modification because 2009.04.13 SU driver use it. \r
 154                 if(CurrSig >= 31 && CurrSig <= 100)\r
 155                 {\r
 156                         RetSig = 100;\r
 157                 }       \r
 158                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 159                 {\r
 160                         RetSig = 90 + ((CurrSig - 20) / 1);\r
 161                 }\r
 162                 else if(CurrSig >= 11 && CurrSig <= 20)\r
 163                 {\r
 164                         RetSig = 80 + ((CurrSig - 10) / 1);\r
 165                 }\r
 166                 else if(CurrSig >= 7 && CurrSig <= 10)\r
 167                 {\r
 168                         RetSig = 69 + (CurrSig - 7);\r
 169                 }\r
 170                 else if(CurrSig == 6)\r
 171                 {\r
 172                         RetSig = 54;\r
 173                 }\r
 174                 else if(CurrSig == 5)\r
 175                 {\r
 176                         RetSig = 45;\r
 177                 }\r
 178                 else if(CurrSig == 4)\r
 179                 {\r
 180                         RetSig = 36;\r
 181                 }\r
 182                 else if(CurrSig == 3)\r
 183                 {\r
 184                         RetSig = 27;\r
 185                 }\r
 186                 else if(CurrSig == 2)\r
 187                 {\r
 188                         RetSig = 18;\r
 189                 }\r
 190                 else if(CurrSig == 1)\r
 191                 {\r
 192                         RetSig = 9;\r
 193                 }\r
 194                 else\r
 195                 {\r
 196                         RetSig = CurrSig;\r
 197                 }\r
 198         }\r
 199 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 200         return RetSig;\r
 201 }\r
 202 \r
 203 \r
 204 s4Byte\r
 205 odm_SignalScaleMapping_92CSeries(       \r
 206         IN OUT PDM_ODM_T pDM_Odm,\r
 207         IN s4Byte CurrSig \r
 208 )\r
 209 {\r
 210         s4Byte RetSig = 0; \r
 211 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) \r
 212         if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
 213         {\r
 214                 // Step 1. Scale mapping.\r
 215                 if(CurrSig >= 61 && CurrSig <= 100)\r
 216                 {\r
 217                         RetSig = 90 + ((CurrSig - 60) / 4);\r
 218                 }\r
 219                 else if(CurrSig >= 41 && CurrSig <= 60)\r
 220                 {\r
 221                         RetSig = 78 + ((CurrSig - 40) / 2);\r
 222                 }\r
 223                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 224                 {\r
 225                         RetSig = 66 + (CurrSig - 30);\r
 226                 }\r
 227                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 228                 {\r
 229                         RetSig = 54 + (CurrSig - 20);\r
 230                 }\r
 231                 else if(CurrSig >= 5 && CurrSig <= 20)\r
 232                 {\r
 233                         RetSig = 42 + (((CurrSig - 5) * 2) / 3);\r
 234                 }\r
 235                 else if(CurrSig == 4)\r
 236                 {\r
 237                         RetSig = 36;\r
 238                 }\r
 239                 else if(CurrSig == 3)\r
 240                 {\r
 241                         RetSig = 27;\r
 242                 }\r
 243                 else if(CurrSig == 2)\r
 244                 {\r
 245                         RetSig = 18;\r
 246                 }\r
 247                 else if(CurrSig == 1)\r
 248                 {\r
 249                         RetSig = 9;\r
 250                 }\r
 251                 else\r
 252                 {\r
 253                         RetSig = CurrSig;\r
 254                 }\r
 255         }\r
 256 #endif\r
 257 \r
 258 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
 259         if((pDM_Odm->SupportInterface  == ODM_ITRF_USB) || (pDM_Odm->SupportInterface  == ODM_ITRF_SDIO))\r
 260         {\r
 261                 if(CurrSig >= 51 && CurrSig <= 100)\r
 262                 {\r
 263                         RetSig = 100;\r
 264                 }\r
 265                 else if(CurrSig >= 41 && CurrSig <= 50)\r
 266                 {\r
 267                         RetSig = 80 + ((CurrSig - 40)*2);\r
 268                 }\r
 269                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 270                 {\r
 271                         RetSig = 66 + (CurrSig - 30);\r
 272                 }\r
 273                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 274                 {\r
 275                         RetSig = 54 + (CurrSig - 20);\r
 276                 }\r
 277                 else if(CurrSig >= 10 && CurrSig <= 20)\r
 278                 {\r
 279                         RetSig = 42 + (((CurrSig - 10) * 2) / 3);\r
 280                 }\r
 281                 else if(CurrSig >= 5 && CurrSig <= 9)\r
 282                 {\r
 283                         RetSig = 22 + (((CurrSig - 5) * 3) / 2);\r
 284                 }\r
 285                 else if(CurrSig >= 1 && CurrSig <= 4)\r
 286                 {\r
 287                         RetSig = 6 + (((CurrSig - 1) * 3) / 2);\r
 288                 }\r
 289                 else\r
 290                 {\r
 291                         RetSig = CurrSig;\r
 292                 }\r
 293         }\r
 294 \r
 295 #endif\r
 296         return RetSig;\r
 297 }\r
 298 s4Byte\r
 299 odm_SignalScaleMapping( \r
 300         IN OUT PDM_ODM_T pDM_Odm,\r
 301         IN      s4Byte CurrSig \r
 302 )\r
 303 {       \r
 304 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 305         if(     (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 306                 (pDM_Odm->SupportInterface  != ODM_ITRF_PCIE) && //USB & SDIO\r
 307                 (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore\r
 308         {\r
 309                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);\r
 310         }\r
 311         else if(        (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 312                         (pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) &&\r
 313                         (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)\r
 314         {\r
 315                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);\r
 316         }else\r
 317 #endif\r
 318         {               \r
 319                 return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);\r
 320         }\r
 321         \r
 322 }\r
 323 \r
 324 \r
 325 \r
 326 static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(\r
 327         IN PDM_ODM_T    pDM_Odm,\r
 328         IN u1Byte               isCCKrate,\r
 329         IN u1Byte               PWDB_ALL,\r
 330         IN u1Byte               path,\r
 331         IN u1Byte               RSSI\r
 332 )\r
 333 {\r
 334         u1Byte  SQ = 0;\r
 335 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 336 \r
 337         if(isCCKrate){\r
 338                 \r
 339                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))\r
 340                 {\r
 341 \r
 342                         //\r
 343                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 344                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 345                         //\r
 346                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 347                         //                      50                              5                       -52\r
 348                         //                      55                              5                       -54\r
 349                         //                      60                              5                       -55\r
 350                         //                      65                              5                       -59\r
 351                         //                      70                              5                       -63\r
 352                         //                      75                              5                       -66\r
 353                         //                      80                              4                       -72\r
 354                         //                      85                              3                       -75\r
 355                         //                      90                              3                       -80\r
 356                         //                      95                              2                       -85\r
 357                         //                      100                             1                       -89\r
 358                         //                      102                             1                       -90\r
 359                         //                      104                             1                       -91\r
 360                         //\r
 361                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));\r
 362                         \r
 363 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 364                         if(PWDB_ALL >= 50)\r
 365                                 SQ = 100;\r
 366                         else if(PWDB_ALL >= 23 && PWDB_ALL < 50)                                \r
 367                                 SQ = 80;\r
 368                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 369                                 SQ = 60;\r
 370                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 371                                 SQ = 40;\r
 372                         else\r
 373                                 SQ = 10;\r
 374 #else\r
 375                         if(PWDB_ALL >= 34)\r
 376                                 SQ = 100;\r
 377                         else if(PWDB_ALL >= 23 && PWDB_ALL < 34)                                \r
 378                                 SQ = 80;\r
 379                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 380                                 SQ = 60;\r
 381                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 382                                 SQ = 40;\r
 383                         else\r
 384                                 SQ = 10;        \r
 385 \r
 386                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 387                                 SQ = 20;\r
 388 #endif          \r
 389 \r
 390                 }\r
 391                 else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){\r
 392 \r
 393                         //\r
 394                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 395                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 396                         //\r
 397                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 398                         //                      50                              5                       -49\r
 399                         //                      55                              5                       -49\r
 400                         //                      60                              5                       -50\r
 401                         //                      65                              5                       -51\r
 402                         //                      70                              5                       -52\r
 403                         //                      75                              5                       -54\r
 404                         //                      80                              5                       -55\r
 405                         //                      85                              4                       -60\r
 406                         //                      90                              3                       -63\r
 407                         //                      95                              3                       -65\r
 408                         //                      100                             2                       -67\r
 409                         //                      102                             2                       -67\r
 410                         //                      104                             1                       -70\r
 411                         //                      \r
 412 \r
 413                         if(PWDB_ALL >= 50)\r
 414                                 SQ = 100;\r
 415                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 416                                 SQ = 80;\r
 417                         else if(PWDB_ALL >= 31 && PWDB_ALL < 35)\r
 418                                 SQ = 60;\r
 419                         else if(PWDB_ALL >= 22 && PWDB_ALL < 31)\r
 420                                 SQ = 40;\r
 421                         else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 422                                 SQ = 20;\r
 423                         else\r
 424                                 SQ = 10;\r
 425                 } else {\r
 426                         if (PWDB_ALL >= 50)\r
 427                                 SQ = 100;\r
 428                         else if (PWDB_ALL >= 35 && PWDB_ALL < 50)                               \r
 429                                 SQ = 80;\r
 430                         else if (PWDB_ALL >= 22 && PWDB_ALL < 35)\r
 431                                 SQ = 60;\r
 432                         else if (PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 433                                 SQ = 40;\r
 434                         else\r
 435                                 SQ = 10;\r
 436                 }\r
 437                 \r
 438         }\r
 439         else\r
 440         {//OFDM rate            \r
 441 \r
 442                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 443                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 444                 {\r
 445                         if(RSSI >= 45)\r
 446                                 SQ = 100;\r
 447                         else if(RSSI >= 22 && RSSI < 45)\r
 448                                 SQ = 80;\r
 449                         else if(RSSI >= 18 && RSSI < 22)\r
 450                                 SQ = 40;\r
 451                         else\r
 452                         SQ = 20;\r
 453                 } else {\r
 454                         if(RSSI >= 45)\r
 455                         SQ = 100;\r
 456                         else if(RSSI >= 22 && RSSI < 45)\r
 457                         SQ = 80;\r
 458                 else if(RSSI >= 18 && RSSI < 22)\r
 459                         SQ = 40;\r
 460                 else\r
 461                         SQ = 20;                        \r
 462                 }\r
 463         }\r
 464 \r
 465         RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 466         \r
 467 #endif\r
 468         return SQ;\r
 469 }\r
 470 \r
 471 static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(\r
 472         IN PDM_ODM_T    pDM_Odm,\r
 473         IN u1Byte               isCCKrate,\r
 474         IN u1Byte               PWDB_ALL,\r
 475         IN u1Byte               path,\r
 476         IN u1Byte               RSSI\r
 477 )\r
 478 {\r
 479         u1Byte  SQ = 0;\r
 480         \r
 481 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 482 \r
 483         if(isCCKrate){\r
 484 \r
 485                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));\r
 486                         \r
 487 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 488 \r
 489                         if(PWDB_ALL >= 50)\r
 490                                 SQ = 100;\r
 491                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 492                                 SQ = 80;\r
 493                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 494                                 SQ = 60;\r
 495                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 496                                 SQ = 40;\r
 497                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 498                                 SQ = 20;\r
 499                         else\r
 500                                 SQ = 10;        \r
 501 #else\r
 502                         if(PWDB_ALL >= 50)\r
 503                                 SQ = 100;\r
 504                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 505                                 SQ = 80;\r
 506                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 507                                 SQ = 60;\r
 508                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 509                                 SQ = 40;\r
 510                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 511                                 SQ = 20;\r
 512                         else\r
 513                                 SQ = 10;        \r
 514 \r
 515                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 516                                 SQ = 20;\r
 517 #endif          \r
 518 \r
 519                 \r
 520                 \r
 521         }\r
 522         else\r
 523         {//OFDM rate            \r
 524 \r
 525                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 526                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 527                 {\r
 528                         if(RSSI >= 45)\r
 529                                 SQ = 100;\r
 530                         else if(RSSI >= 22 && RSSI < 45)\r
 531                                 SQ = 80;\r
 532                         else if(RSSI >= 18 && RSSI < 22)\r
 533                                 SQ = 40;\r
 534                         else\r
 535                         SQ = 20;\r
 536         }\r
 537                 else\r
 538                 {\r
 539                         if(RSSI >= 35)\r
 540                         SQ = 100;\r
 541                         else if(RSSI >= 30 && RSSI < 35)\r
 542                         SQ = 80;\r
 543                 else if(RSSI >= 25 && RSSI < 30)\r
 544                         SQ = 40;\r
 545                 else\r
 546                         SQ = 20;                        \r
 547         }\r
 548         }\r
 549 \r
 550         RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 551         \r
 552 #endif\r
 553         return SQ;\r
 554 }\r
 555                         \r
 556 static u1Byte \r
 557 odm_EVMdbToPercentage(\r
 558     IN          s1Byte Value\r
 559     )\r
 560 {\r
 561         //\r
 562         // -33dB~0dB to 0%~99%\r
 563         //\r
 564         s1Byte ret_val;\r
 565     \r
 566         ret_val = Value;\r
 567         ret_val /= 2;\r
 568 \r
 569         /*DbgPrint("Value=%d\n", Value);*/\r
 570         /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/\r
 571 #ifdef ODM_EVM_ENHANCE_ANTDIV\r
 572         if (ret_val >= 0)\r
 573                 ret_val = 0;\r
 574 \r
 575         if (ret_val <= -40)\r
 576                 ret_val = -40;\r
 577 \r
 578         ret_val = 0 - ret_val;\r
 579         ret_val *= 3;\r
 580 #else\r
 581         if (ret_val >= 0)\r
 582                 ret_val = 0;\r
 583 \r
 584         if (ret_val <= -33)\r
 585                 ret_val = -33;\r
 586 \r
 587         ret_val = 0 - ret_val;\r
 588         ret_val *= 3;\r
 589 \r
 590         if (ret_val == 99)\r
 591                 ret_val = 100;\r
 592 #endif\r
 593 \r
 594         return (u1Byte)ret_val;\r
 595 }\r
 596                         \r
 597 static u1Byte \r
 598 odm_EVMdbm_JaguarSeries(\r
 599         IN  s1Byte Value\r
 600         )\r
 601 {\r
 602         s1Byte ret_val = Value;\r
 603         \r
 604         // -33dB~0dB to 33dB ~ 0dB\r
 605         if(ret_val == -128)\r
 606                 ret_val = 127;\r
 607         else if (ret_val < 0)\r
 608                 ret_val = 0 - ret_val;\r
 609         \r
 610         ret_val  = ret_val >> 1;\r
 611         return (u1Byte)ret_val;\r
 612 }\r
 613 \r
 614 static s2Byte\r
 615 odm_Cfo(\r
 616   IN s1Byte Value\r
 617 )\r
 618 {\r
 619         s2Byte  ret_val;\r
 620 \r
 621         if (Value < 0)\r
 622         {\r
 623                 ret_val = 0 - Value;\r
 624                 ret_val = (ret_val << 1) + (ret_val >> 1) ;  //  *2.5~=312.5/2^7\r
 625                 ret_val = ret_val | BIT12;  // set bit12 as 1 for negative cfo\r
 626         }\r
 627         else\r
 628         {\r
 629                 ret_val = Value;\r
 630                 ret_val = (ret_val << 1) + (ret_val>>1) ;  //  *2.5~=312.5/2^7\r
 631         }\r
 632         return ret_val;\r
 633 }\r
 634 \r
 635 #if(ODM_IC_11N_SERIES_SUPPORT == 1)\r
 636 \r
 637 s1Byte\r
 638 odm_CCKRSSI_8703B(\r
 639         IN              u2Byte  LNA_idx,\r
 640         IN              u1Byte  VGA_idx\r
 641         )\r
 642 {\r
 643         s1Byte  rx_pwr_all = 0x00;\r
 644         \r
 645         switch (LNA_idx) {\r
 646         case 0xf:\r
 647                 rx_pwr_all = -48 - (2 * VGA_idx);\r
 648                 break;          \r
 649         case 0xb:\r
 650                 rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/\r
 651                 break;\r
 652         case 0xa:\r
 653                 rx_pwr_all = -36 - (2 * VGA_idx);\r
 654                 break;\r
 655         case 8:\r
 656                 rx_pwr_all = -32 - (2 * VGA_idx);\r
 657                 break;\r
 658         case 7: \r
 659                 rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/\r
 660                 break;\r
 661         case 4: \r
 662                 rx_pwr_all = -16 - (2 * VGA_idx);\r
 663                 break;\r
 664         case 0: \r
 665                 rx_pwr_all = -2 - (2 * VGA_idx);\r
 666                 break;\r
 667         default:\r
 668         /*rx_pwr_all = -53+(2*(31-VGA_idx));*/\r
 669         /*DbgPrint("wrong LNA index\n");*/\r
 670                 break;\r
 671                         \r
 672         }\r
 673         return  rx_pwr_all;\r
 674 }\r
 675 \r
 676 VOID\r
 677 odm_RxPhyStatus92CSeries_Parsing(\r
 678         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
 679         OUT             PODM_PHY_INFO_T                 pPhyInfo,               \r
 680         IN              pu1Byte                                         pPhyStatus,\r
 681         IN              PODM_PACKET_INFO_T                      pPktinfo\r
 682         )\r
 683 {                                                       \r
 684         SWAT_T                          *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;\r
 685         u1Byte                          i, Max_spatial_stream;\r
 686         s1Byte                          rx_pwr[4], rx_pwr_all=0;\r
 687         u1Byte                          EVM, PWDB_ALL = 0, PWDB_ALL_BT;\r
 688         u1Byte                          RSSI, total_rssi=0;\r
 689         BOOLEAN                         isCCKrate=FALSE;        \r
 690         u1Byte                          rf_rx_num = 0;\r
 691         u1Byte                          cck_highpwr = 0;\r
 692         u1Byte                          LNA_idx = 0;\r
 693         u1Byte                          VGA_idx = 0;\r
 694         PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;\r
 695 \r
 696         isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE;\r
 697         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
 698         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 699 \r
 700 \r
 701         if(isCCKrate)\r
 702         {\r
 703                 u1Byte report;\r
 704                 u1Byte cck_agc_rpt;\r
 705                 \r
 706                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
 707                 // \r
 708                 // (1)Hardware does not provide RSSI for CCK\r
 709                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
 710                 //\r
 711 \r
 712                 //if(pHalData->eRFPowerState == eRfOn)\r
 713                         cck_highpwr = pDM_Odm->bCckHighPower;\r
 714                 //else\r
 715                 //      cck_highpwr = FALSE;\r
 716 \r
 717                 cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;\r
 718                 \r
 719                 //2011.11.28 LukeLee: 88E use different LNA & VGA gain table\r
 720                 //The RSSI formula should be modified according to the gain table\r
 721                 //In 88E, cck_highpwr is always set to 1\r
 722                 if (pDM_Odm->SupportICType & (ODM_RTL8703B)) {\r
 723                         \r
 724                         #if (RTL8703B_SUPPORT == 1)\r
 725                         if (pDM_Odm->cck_agc_report_type == 1) {  /*4 bit LNA*/\r
 726 \r
 727                                 u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0;\r
 728                                                                 \r
 729                                 LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5);\r
 730                                 VGA_idx = (cck_agc_rpt & 0x1F);\r
 731                                 \r
 732                                 rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx);\r
 733                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 734                                 if (PWDB_ALL > 100)\r
 735                                         PWDB_ALL = 100; \r
 736                         \r
 737                         }\r
 738                         #endif\r
 739                 } else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/\r
 740                 {\r
 741                         LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
 742                         VGA_idx = (cck_agc_rpt & 0x1F); \r
 743                         if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))\r
 744                         {\r
 745                                 if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) )\r
 746                                 {\r
 747                                         switch(LNA_idx)\r
 748                                         {\r
 749                                                 case 7:\r
 750                                                         rx_pwr_all = -45  - 2*(VGA_idx);\r
 751                                                         break;\r
 752                                                 case 6:\r
 753                                                         rx_pwr_all = -43 -2*(VGA_idx); \r
 754                                                         break;\r
 755                                                 case 5:\r
 756                                                         rx_pwr_all = -27 - 2*(VGA_idx); \r
 757                                                         break;\r
 758                                                 case 4:\r
 759                                                         rx_pwr_all = -21 - 2*(VGA_idx); \r
 760                                                         break;\r
 761                                                 case 3:\r
 762                                                         rx_pwr_all = -18 - 2*(VGA_idx); \r
 763                                                         break;\r
 764                                                 case 2:\r
 765                                                         rx_pwr_all = -6 - 2*(VGA_idx);\r
 766                                                         break;\r
 767                                                 case 1:\r
 768                                                         rx_pwr_all = 9 -2*(VGA_idx);\r
 769                                                         break;\r
 770                                                 case 0:\r
 771                                                         rx_pwr_all = 15 -2*(VGA_idx);\r
 772                                                         break;\r
 773                                                 default:\r
 774 \r
 775                                                         break;\r
 776                                         }\r
 777 \r
 778                                         if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA)\r
 779                                         {\r
 780                                                 rx_pwr_all -= pDM_Odm->ExtLNAGain;\r
 781                                         }\r
 782                                         \r
 783                                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 784                                 }\r
 785                                 else\r
 786                                 {                                       \r
 787                                         switch(LNA_idx)\r
 788                                         {\r
 789                                                 case 7:\r
 790                                                         if(VGA_idx <= 27)\r
 791                                                                 rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
 792                                                         else\r
 793                                                         rx_pwr_all = -100;\r
 794                                                         break;\r
 795                                                 case 6:\r
 796                                                         rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
 797                                                         break;\r
 798                                                 case 5:\r
 799                                                         rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
 800                                                         break;\r
 801                                                 case 4:\r
 802                                                         rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
 803                                                         break;\r
 804                                                 case 3:\r
 805                                                         //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 806                                                         rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 807                                                         break;\r
 808                                                 case 2:\r
 809                                                         if(cck_highpwr)\r
 810                                                                 rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
 811                                                         else\r
 812                                                                 rx_pwr_all = -6+ 2*(5-VGA_idx);\r
 813                                                         break;\r
 814                                                 case 1:\r
 815                                                                 rx_pwr_all = 8-2*VGA_idx;\r
 816                                                         break;\r
 817                                                 case 0:\r
 818                                                         rx_pwr_all = 14-2*VGA_idx;\r
 819                                                         break;\r
 820                                                 default:\r
 821                                                         //DbgPrint("CCK Exception default\n");\r
 822                                                         break;\r
 823                                         }\r
 824                                         rx_pwr_all += 8;\r
 825 \r
 826                                         //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
 827                                         if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
 828                                                 rx_pwr_all += 8;\r
 829                                         \r
 830                                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 831                                         if(cck_highpwr == FALSE)\r
 832                                         {\r
 833                                                 if(PWDB_ALL >= 80)\r
 834                                                         PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
 835                                                 else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
 836                                                         PWDB_ALL += 3;\r
 837                                                 if(PWDB_ALL>100)\r
 838                                                         PWDB_ALL = 100;\r
 839                                         }\r
 840                                 }\r
 841                         }\r
 842                         else if(pDM_Odm->SupportICType & (ODM_RTL8723B))\r
 843                         {\r
 844 #if (RTL8723B_SUPPORT == 1)                     \r
 845                                 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);\r
 846                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 847                                 if(PWDB_ALL>100)\r
 848                                         PWDB_ALL = 100; \r
 849 #endif                          \r
 850                         } else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) {\r
 851 #if (RTL8188F_SUPPORT == 1)\r
 852                                 rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx);\r
 853                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 854                                 if (PWDB_ALL > 100)\r
 855                                         PWDB_ALL = 100;\r
 856 #endif\r
 857                         }\r
 858                 }\r
 859                 else\r
 860                 {\r
 861                         if(!cck_highpwr)\r
 862                         {                       \r
 863                                 report =( cck_agc_rpt & 0xc0 )>>6;\r
 864                                 switch(report)\r
 865                                 {\r
 866                                         // 03312009 modified by cosa\r
 867                                         // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion\r
 868                                         // Note: different RF with the different RNA gain.\r
 869                                         case 0x3:\r
 870                                                 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);\r
 871                                                 break;\r
 872                                         case 0x2:\r
 873                                                 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);\r
 874                                                 break;\r
 875                                         case 0x1:\r
 876                                                 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);\r
 877                                                 break;\r
 878                                         case 0x0:\r
 879                                                 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);\r
 880                                                 break;\r
 881                                 }\r
 882                         }\r
 883                         else\r
 884                         {\r
 885                                 //report = pDrvInfo->cfosho[0] & 0x60;                  \r
 886                                 //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;\r
 887                                 \r
 888                                 report = (cck_agc_rpt & 0x60)>>5;\r
 889                                 switch(report)\r
 890                                 {\r
 891                                         case 0x3:\r
 892                                                 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 893                                                 break;\r
 894                                         case 0x2:\r
 895                                                 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);\r
 896                                                 break;\r
 897                                         case 0x1:\r
 898                                                 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 899                                                 break;\r
 900                                         case 0x0:\r
 901                                                 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 902                                                 break;\r
 903                                 }\r
 904                         }\r
 905 \r
 906                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 907 \r
 908                         //Modification for ext-LNA board\r
 909                         if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
 910                         {\r
 911                                 if((cck_agc_rpt>>7) == 0){\r
 912                                         PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);\r
 913                                 }\r
 914                                 else    \r
 915                            {\r
 916                                         if(PWDB_ALL > 38)\r
 917                                                 PWDB_ALL -= 16;\r
 918                                         else\r
 919                                                 PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);\r
 920                                 }             \r
 921 \r
 922                                 //CCK modification\r
 923                                 if(PWDB_ALL > 25 && PWDB_ALL <= 60)\r
 924                                         PWDB_ALL += 6;\r
 925                                 //else if (PWDB_ALL <= 25)\r
 926                                 //      PWDB_ALL += 8;\r
 927                         }\r
 928                         else//Modification for int-LNA board\r
 929                         {\r
 930                                 if(PWDB_ALL > 99)\r
 931                                         PWDB_ALL -= 8;\r
 932                                 else if(PWDB_ALL > 50 && PWDB_ALL <= 68)\r
 933                                         PWDB_ALL += 4;\r
 934                         }\r
 935                 }\r
 936 \r
 937                 pDM_Odm->cck_lna_idx = LNA_idx;\r
 938                 pDM_Odm->cck_vga_idx = VGA_idx;\r
 939                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
 940 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 941                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
 942                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
 943 #endif          \r
 944                 //\r
 945                 // (3) Get Signal Quality (EVM)\r
 946                 //\r
 947                 //if(pPktinfo->bPacketMatchBSSID)\r
 948                 {\r
 949                         u1Byte  SQ,SQ_rpt;                      \r
 950                         \r
 951 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)                    \r
 952                         if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 953                                 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
 954                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 955                         }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 956                                 (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
 957                         {\r
 958                                 SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 959                         }else \r
 960 #endif\r
 961                         if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
 962                                 SQ = 100;\r
 963                         }\r
 964                         else{                                           \r
 965                                 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;\r
 966                                         \r
 967                                 if(SQ_rpt > 64)\r
 968                                         SQ = 0;\r
 969                                 else if (SQ_rpt < 20)\r
 970                                         SQ = 100;\r
 971                                 else\r
 972                                         SQ = ((64-SQ_rpt) * 100) / 44;\r
 973                         \r
 974                         }\r
 975                         \r
 976                         //DbgPrint("cck SQ = %d\n", SQ);\r
 977                         pPhyInfo->SignalQuality = SQ;\r
 978                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
 979                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 980                 }\r
 981 \r
 982                 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {\r
 983                         if (i == 0)\r
 984                                 pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL;\r
 985                         else\r
 986                                 pPhyInfo->RxMIMOSignalStrength[1] = 0;\r
 987                 }\r
 988         }\r
 989         else //2 is OFDM rate\r
 990         {\r
 991                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
 992 \r
 993                 // \r
 994                 // (1)Get RSSI for HT rate\r
 995                 //\r
 996                 \r
 997          for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
 998                 {\r
 999                         // 2008/01/30 MH we will judge RF RX path now.\r
1000                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
1001                                 rf_rx_num++;\r
1002                         //else\r
1003                                 //continue;\r
1004 \r
1005                         rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;\r
1006                         pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F);\r
1007 \r
1008                 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
1009                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
1010                 #endif  \r
1011 \r
1012                         /* Translate DBM to percentage. */\r
1013                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);\r
1014                         total_rssi += RSSI;\r
1015                         //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
1016 \r
1017 \r
1018                         if(pDM_Odm->SupportICType&ODM_RTL8192C)\r
1019                         {       \r
1020                                 //Modification for ext-LNA board        \r
1021                                 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
1022                                 {\r
1023                                         if((pPhyStaRpt->path_agc[i].trsw) == 1)\r
1024                                                 RSSI = (RSSI>94)?100:(RSSI +6);\r
1025                                         else\r
1026                                                 RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);\r
1027 \r
1028                                         if((RSSI <= 34) && (RSSI >=4))\r
1029                                                 RSSI -= 4;\r
1030                                 }               \r
1031                         }\r
1032                 \r
1033                         pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
1034 \r
1035                 #if (DM_ODM_SUPPORT_TYPE &  (/*ODM_WIN|*/ODM_CE|ODM_AP))\r
1036                         //Get Rx snr value in DB                \r
1037                         pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);\r
1038                 #endif\r
1039                 \r
1040                         /* Record Signal Strength for next packet */\r
1041                         //if(pPktinfo->bPacketMatchBSSID)\r
1042                         {                               \r
1043 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)                            \r
1044                                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1045                                         (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
1046                                 {\r
1047                                         if(i==ODM_RF_PATH_A)\r
1048                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
1049                                 \r
1050                                 }               \r
1051                                 else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1052                                         (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
1053                                 {\r
1054                                         pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);\r
1055                                 }       \r
1056 #endif                          \r
1057                         }\r
1058                 }\r
1059                 \r
1060                 \r
1061                 //\r
1062                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
1063                 //\r
1064                 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110;             \r
1065                 \r
1066                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);  \r
1067         \r
1068         \r
1069                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1070                 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
1071         #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1072                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
1073                 pPhyInfo->RxPower = rx_pwr_all;\r
1074                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1075         #endif\r
1076                 \r
1077                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
1078                         //do nothing    \r
1079                 }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){\r
1080                         //do nothing    \r
1081                 }\r
1082                 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
1083                         //\r
1084                         // (3)EVM of HT rate\r
1085                         //\r
1086                         if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15)\r
1087                                 Max_spatial_stream = 2; //both spatial stream make sense\r
1088                         else\r
1089                                 Max_spatial_stream = 1; //only spatial stream 1 makes sense\r
1090 \r
1091                         for(i=0; i<Max_spatial_stream; i++)\r
1092                         {\r
1093                                 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
1094                                 // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
1095                                 // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.                        \r
1096                                 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] ));   //dbm\r
1097 \r
1098                                 //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));\r
1099                                 \r
1100                                 //if(pPktinfo->bPacketMatchBSSID)\r
1101                                 {\r
1102                                         if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
1103                                         {                                               \r
1104                                                 pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);\r
1105                                         }                                       \r
1106                                         pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff);\r
1107                                 }\r
1108                         }\r
1109                 }\r
1110 \r
1111                 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);\r
1112                 \r
1113         }\r
1114 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1115         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
1116         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
1117         if(isCCKrate)\r
1118         {               \r
1119 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1120                 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1121                 pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, TRUE, TRUE);\r
1122 #else\r
1123         #ifdef CONFIG_SIGNAL_SCALE_MAPPING\r
1124                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/\r
1125         #else\r
1126                 pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL;\r
1127         #endif\r
1128 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/\r
1129         }\r
1130         else\r
1131         {       \r
1132                 if (rf_rx_num != 0)\r
1133                 {                       \r
1134                 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1135                         // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1136                         pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, (total_rssi /= rf_rx_num), TRUE, FALSE);\r
1137                 #else\r
1138                         #ifdef CONFIG_SIGNAL_SCALE_MAPPING\r
1139                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));\r
1140                         #else\r
1141                         total_rssi/=rf_rx_num;\r
1142                         pPhyInfo->SignalStrength = (u1Byte)total_rssi;\r
1143                         #endif\r
1144                 #endif\r
1145                 }\r
1146         }\r
1147 #endif /*#if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))*/\r
1148 \r
1149         //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", \r
1150                 //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);\r
1151 \r
1152         //For 92C/92D HW (Hybrid) Antenna Diversity\r
1153 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
1154         //For 88E HW Antenna Diversity\r
1155         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;\r
1156         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;\r
1157         pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;\r
1158 #endif\r
1159 }\r
1160 #endif\r
1161 \r
1162 #if     ODM_IC_11AC_SERIES_SUPPORT\r
1163 \r
1164 VOID\r
1165 odm_RxPhyBWJaguarSeries_Parsing(\r
1166         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1167         IN              PODM_PACKET_INFO_T                      pPktinfo,\r
1168         IN              PPHY_STATUS_RPT_8812_T          pPhyStaRpt\r
1169 )\r
1170 {\r
1171 \r
1172         if(pPktinfo->DataRate <= ODM_RATE54M) {\r
1173                 switch (pPhyStaRpt->r_RFMOD) {\r
1174                 case 1:\r
1175                         if (pPhyStaRpt->sub_chnl == 0)\r
1176                                 pPhyInfo->BandWidth = 1;\r
1177                         else\r
1178                                 pPhyInfo->BandWidth = 0;\r
1179                         break;\r
1180 \r
1181                 case 2:\r
1182                         if (pPhyStaRpt->sub_chnl == 0)\r
1183                                 pPhyInfo->BandWidth = 2;\r
1184                         else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
1185                                 pPhyInfo->BandWidth = 1;\r
1186                         else\r
1187                                 pPhyInfo->BandWidth = 0;\r
1188                         break;\r
1189 \r
1190                 default:\r
1191                 case 0:\r
1192                         pPhyInfo->BandWidth = 0;\r
1193                         break;\r
1194                 }\r
1195         }\r
1196 \r
1197 }\r
1198 \r
1199 VOID\r
1200 odm_RxPhyStatusJaguarSeries_Parsing(\r
1201         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1202         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1203         IN              pu1Byte                                         pPhyStatus,\r
1204         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1205 )\r
1206 {\r
1207         u1Byte                                  i, Max_spatial_stream;\r
1208         s1Byte                                  rx_pwr[4], rx_pwr_all = 0;\r
1209         u1Byte                                  EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
1210         u1Byte                                  RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0;\r
1211         u1Byte                                  isCCKrate = 0;  \r
1212         u1Byte                                  rf_rx_num = 0;\r
1213         u1Byte                                  cck_highpwr = 0;\r
1214         u1Byte                                  LNA_idx, VGA_idx;\r
1215         PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus;\r
1216         pFAT_T                                  pDM_FatTable = &pDM_Odm->DM_FatTable;\r
1217 \r
1218         odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt);\r
1219 \r
1220         if (pPktinfo->DataRate <= ODM_RATE11M)\r
1221                 isCCKrate = TRUE;\r
1222         else\r
1223                 isCCKrate = FALSE;\r
1224 \r
1225         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
1226         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
1227         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1;\r
1228         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1;\r
1229 \r
1230         if (isCCKrate) {\r
1231                 u1Byte cck_agc_rpt;\r
1232                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
1233 \r
1234                 /*(1)Hardware does not provide RSSI for CCK*/\r
1235                 /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
1236 \r
1237                 /*if(pHalData->eRFPowerState == eRfOn)*/\r
1238                 cck_highpwr = pDM_Odm->bCckHighPower;\r
1239                 /*else*/\r
1240                 /*cck_highpwr = FALSE;*/\r
1241 \r
1242                 cck_agc_rpt =  pPhyStaRpt->cfosho[0] ;\r
1243                 LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);\r
1244                 VGA_idx = (cck_agc_rpt & 0x1F);\r
1245 \r
1246                 if (pDM_Odm->SupportICType == ODM_RTL8812) {\r
1247                         switch (LNA_idx) {\r
1248                         case 7:\r
1249                                 if (VGA_idx <= 27)\r
1250                                         rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/\r
1251                                 else\r
1252                                         rx_pwr_all = -100;\r
1253                                 break;\r
1254                         case 6:\r
1255                                 rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/\r
1256                                 break;\r
1257                         case 5:\r
1258                                 rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/\r
1259                                 break;\r
1260                         case 4:\r
1261                                 rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/\r
1262                                 break;\r
1263                         case 3:\r
1264                                 /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/\r
1265                                 rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/\r
1266                                 break;\r
1267                         case 2:\r
1268                                 if (cck_highpwr)\r
1269                                         rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/\r
1270                                 else\r
1271                                         rx_pwr_all = -6 + 2 * (5 - VGA_idx);\r
1272                                 break;\r
1273                         case 1:\r
1274                                 rx_pwr_all = 8 - 2 * VGA_idx;\r
1275                                 break;\r
1276                         case 0:\r
1277                                 rx_pwr_all = 14 - 2 * VGA_idx;\r
1278                                 break;\r
1279                         default:\r
1280                                 /*DbgPrint("CCK Exception default\n");*/\r
1281                                 break;\r
1282                         }\r
1283                         rx_pwr_all += 6;\r
1284                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1285 \r
1286                         if (cck_highpwr == FALSE) {\r
1287                                 if (PWDB_ALL >= 80)\r
1288                                         PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;\r
1289                                 else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
1290                                         PWDB_ALL += 3;\r
1291                                 if (PWDB_ALL > 100)\r
1292                                         PWDB_ALL = 100;\r
1293                         }\r
1294                 } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) {\r
1295                         s1Byte Pout = -6;\r
1296 \r
1297                         switch (LNA_idx) {\r
1298                         case 5:\r
1299                                 rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
1300                                 break;\r
1301                         case 4:\r
1302                                 rx_pwr_all = Pout - 24 - (2 * VGA_idx);\r
1303                                 break;\r
1304                         case 2:\r
1305                                 rx_pwr_all = Pout - 11 - (2 * VGA_idx);\r
1306                                 break;\r
1307                         case 1:\r
1308                                 rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
1309                                 break;\r
1310                         case 0:\r
1311                                 rx_pwr_all = Pout + 21 - (2 * VGA_idx);\r
1312                                 break;\r
1313                         }\r
1314                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1315                 } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) {\r
1316                         s1Byte Pout = -6;\r
1317 \r
1318                         switch (LNA_idx) {\r
1319                         /*CCK only use LNA: 2, 3, 5, 7*/\r
1320                         case 7:\r
1321                                 rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
1322                                 break;\r
1323                         case 5:\r
1324                                 rx_pwr_all = Pout - 22 - (2 * VGA_idx);\r
1325                                 break;\r
1326                         case 3:\r
1327                                 rx_pwr_all = Pout - 2 - (2 * VGA_idx);\r
1328                                 break;\r
1329                         case 2:\r
1330                                 rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
1331                                 break;\r
1332                         /*case 6:*/\r
1333                         /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/\r
1334                         /*break;*/\r
1335                         /*case 4:*/\r
1336                         /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/\r
1337                         /*break;*/\r
1338                         /*case 1:*/\r
1339                         /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/\r
1340                         /*break;*/\r
1341                         /*case 0:*/\r
1342                         /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/\r
1343 /*                      //      break;*/\r
1344                         default:\r
1345 /*                              //DbgPrint("CCK Exception default\n");*/\r
1346                                 break;\r
1347                         }\r
1348                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1349                 }\r
1350 \r
1351                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1352 /*              //if(pPktinfo->StationID == 0)*/\r
1353 /*              //{*/\r
1354 /*              //      DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/\r
1355 /*              //              LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/\r
1356 /*              //}*/\r
1357 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1358                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
1359                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1360 #endif\r
1361                 /*(3) Get Signal Quality (EVM)*/\r
1362                 if (pPktinfo->bPacketMatchBSSID) {\r
1363                         u1Byte  SQ, SQ_rpt;\r
1364 \r
1365                         if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1366                                 (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
1367                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0);\r
1368                         } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {\r
1369                                 SQ = 100;\r
1370                         } else {\r
1371                                 SQ_rpt = pPhyStaRpt->pwdb_all;\r
1372 \r
1373                                 if (SQ_rpt > 64)\r
1374                                         SQ = 0;\r
1375                                 else if (SQ_rpt < 20)\r
1376                                         SQ = 100;\r
1377                                 else\r
1378                                         SQ = ((64 - SQ_rpt) * 100) / 44;\r
1379                         }\r
1380 \r
1381 /*                      //DbgPrint("cck SQ = %d\n", SQ);*/\r
1382                         pPhyInfo->SignalQuality = SQ;\r
1383                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
1384                 }\r
1385 \r
1386                 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
1387                         if (i == 0)\r
1388                                 pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL;\r
1389                         else\r
1390                                 pPhyInfo->RxMIMOSignalStrength[i] = 0;\r
1391                 }\r
1392         } else {                 \r
1393                 /*is OFDM rate*/\r
1394                 pDM_FatTable->hw_antsw_occur = pPhyStaRpt->hw_antsw_occur;\r
1395                 \r
1396                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
1397 \r
1398                 /*(1)Get RSSI for OFDM rate*/\r
1399 \r
1400                 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
1401                         /*2008/01/30 MH we will judge RF RX path now.*/\r
1402 /*                      //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/\r
1403                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
1404                                 rf_rx_num++;\r
1405 /*                      //else*/\r
1406 /*                      //continue;*/\r
1407                         /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
1408 /*                      //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/\r
1409                         if (i < ODM_RF_PATH_C)\r
1410                                 rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110;\r
1411                         else\r
1412                                 rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110;\r
1413 /*                      //else*/\r
1414                         /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110;  OLD FORMULA*/\r
1415 \r
1416 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
1417                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
1418 #endif\r
1419 \r
1420                         /* Translate DBM to percentage. */\r
1421                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);     \r
1422                 \r
1423                         /*total_rssi += RSSI;*/\r
1424                         /*Get the best two RSSI*/\r
1425                         if (RSSI > best_rssi && RSSI > second_rssi) {\r
1426                                 second_rssi = best_rssi;\r
1427                                 best_rssi = RSSI;\r
1428                         } else if (RSSI > second_rssi && RSSI <= best_rssi)\r
1429                                 second_rssi = RSSI;\r
1430 \r
1431                         /*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/\r
1432 \r
1433                         pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI;\r
1434 \r
1435 \r
1436                         /*Get Rx snr value in DB*/\r
1437                         if (i < ODM_RF_PATH_C)\r
1438                                 pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2;\r
1439                         else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))\r
1440                                 pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2;\r
1441 \r
1442 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
1443                         /*(2) CFO_short  & CFO_tail*/\r
1444                         if (i < ODM_RF_PATH_C) {\r
1445                                 pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i]));\r
1446                                 pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i]));\r
1447                         }\r
1448 #endif\r
1449                         /* Record Signal Strength for next packet */\r
1450                         if (pPktinfo->bPacketMatchBSSID) {\r
1451 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1452                                 if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1453                                         (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
1454                                         if (i == ODM_RF_PATH_A)\r
1455                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI);\r
1456 \r
1457                                 }\r
1458 #endif\r
1459                         }\r
1460                 }\r
1461 \r
1462                 /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
1463 \r
1464                 /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
1465                 if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip))\r
1466                         rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110;\r
1467                 else\r
1468                         rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110;       /*OLD FORMULA*/\r
1469 \r
1470                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1471 \r
1472                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1473                 /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/\r
1474 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1475                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
1476                 pPhyInfo->RxPower = rx_pwr_all;\r
1477                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1478 #endif\r
1479 \r
1480                 if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) {\r
1481                         /*do nothing*/\r
1482                 } else {\r
1483                         /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/\r
1484 \r
1485                         /*(4)EVM of OFDM rate*/\r
1486                         \r
1487                         if ((pPktinfo->DataRate >= ODM_RATEMCS8) &&\r
1488                                 (pPktinfo->DataRate <= ODM_RATEMCS15))\r
1489                                 Max_spatial_stream = 2;\r
1490                         else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) &&\r
1491                                          (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9))\r
1492                                 Max_spatial_stream = 2;\r
1493                         else if ((pPktinfo->DataRate >= ODM_RATEMCS16) &&\r
1494                                          (pPktinfo->DataRate <= ODM_RATEMCS23))\r
1495                                 Max_spatial_stream = 3;\r
1496                         else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) &&\r
1497                                          (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9))\r
1498                                 Max_spatial_stream = 3;\r
1499                         else\r
1500                                 Max_spatial_stream = 1;\r
1501 \r
1502                         if (pPktinfo->bPacketMatchBSSID) {\r
1503                                 /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/\r
1504 \r
1505                                 for (i = 0; i < Max_spatial_stream; i++) {\r
1506                                         /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/\r
1507                                         /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/\r
1508                                         /*value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.*/\r
1509 \r
1510                                         if (pPktinfo->DataRate >= ODM_RATE6M && pPktinfo->DataRate <= ODM_RATE54M) {\r
1511                                                 if (i == ODM_RF_PATH_A) {\r
1512                                                         EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm));      /*dbm*/\r
1513                                                         EVM += 20;\r
1514                                                         if (EVM > 100)\r
1515                                                                 EVM = 100;\r
1516                                                 }\r
1517                                         } else {\r
1518                                                 if (i < ODM_RF_PATH_C) {\r
1519                                                         if (pPhyStaRpt->rxevm[i] == -128)\r
1520                                                                 pPhyStaRpt->rxevm[i] = -25;\r
1521                                                         EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i]));    /*dbm*/\r
1522                                                 } else {\r
1523                                                         if (pPhyStaRpt->rxevm_cd[i - 2] == -128){\r
1524                                                                 pPhyStaRpt->rxevm_cd[i - 2] = -25;\r
1525                                                         }\r
1526                                                         EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2]));     /*dbm*/\r
1527                                                 }\r
1528                                         }\r
1529 \r
1530                                         if (i < ODM_RF_PATH_C)\r
1531                                                 EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
1532                                         else\r
1533                                                 EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]);\r
1534                                         /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/\r
1535                                         /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/\r
1536 \r
1537                                         {\r
1538                                                 if (i == ODM_RF_PATH_A) { \r
1539                                                         /*Fill value in RFD, Get the first spatial stream only*/\r
1540                                                         pPhyInfo->SignalQuality = EVM;\r
1541                                                 }\r
1542                                                 pPhyInfo->RxMIMOSignalQuality[i] = EVM;\r
1543 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
1544                                                 pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;\r
1545 #endif\r
1546                                         }\r
1547                                 }\r
1548                         }\r
1549                 }\r
1550 \r
1551                 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail);\r
1552 \r
1553         }\r
1554 /*      //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/\r
1555 \r
1556 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1557         /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/\r
1558         /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/\r
1559         if (isCCKrate) {\r
1560 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1561                 /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/\r
1562                 pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, FALSE, TRUE);\r
1563 #else\r
1564                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/\r
1565 #endif\r
1566         } else {        \r
1567                 if (rf_rx_num != 0) {\r
1568                         /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/\r
1569                         if (rf_rx_num == 1)\r
1570                                 avg_rssi = best_rssi;\r
1571                         else\r
1572                                 avg_rssi = (best_rssi + second_rssi)/2;\r
1573 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1574                         /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ \r
1575                         pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, avg_rssi, FALSE, FALSE);\r
1576 #else\r
1577                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, avg_rssi));\r
1578 #endif\r
1579                 }\r
1580         }\r
1581 #endif\r
1582         pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;\r
1583 \r
1584         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;\r
1585         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;\r
1586         pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc;\r
1587         pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd;\r
1588         /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]:  antidx_anta = ((%d)), MatchBSSID =  ((%d))\n", pPktinfo->StationID, pPhyStaRpt->antidx_anta, pPktinfo->bPacketMatchBSSID));*/\r
1589 \r
1590 \r
1591 /*              DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/\r
1592 /*                      pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/\r
1593 /*              DbgPrint("----------------------------\n");*/\r
1594 /*              DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/\r
1595 /*              DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/\r
1596 /*              DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/\r
1597 /*                              pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/\r
1598 /*              DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/\r
1599 /*                              pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/\r
1600 /*              DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/\r
1601 /*              DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/\r
1602 /*              DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/\r
1603 /*              DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/\r
1604 /*              DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/\r
1605 /*                              pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/\r
1606 /*              DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/\r
1607 /*                              pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/\r
1608 /*              DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/\r
1609 /*                              pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/\r
1610 /*              DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/\r
1611 /*                              pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/\r
1612 \r
1613 }\r
1614 \r
1615 #endif\r
1616 \r
1617 VOID\r
1618 odm_Init_RSSIForDM(\r
1619         IN OUT  PDM_ODM_T       pDM_Odm\r
1620         )\r
1621 {\r
1622 \r
1623 }\r
1624 \r
1625 VOID\r
1626 odm_Process_RSSIForDM(  \r
1627         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1628         IN              PODM_PHY_INFO_T                         pPhyInfo,\r
1629         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1630         )\r
1631 {\r
1632         \r
1633         s4Byte                  UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;\r
1634         u1Byte                  i, isCCKrate=0; \r
1635         u1Byte                  RSSI_max, RSSI_min;\r
1636         u4Byte                  OFDM_pkt=0; \r
1637         u4Byte                  Weighting=0;\r
1638         PSTA_INFO_T             pEntry;\r
1639         #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))   \r
1640         pFAT_T                  pDM_FatTable = &pDM_Odm->DM_FatTable;\r
1641         #endif\r
1642 \r
1643         if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
1644                 return;\r
1645 \r
1646         #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY\r
1647         odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo);\r
1648         #endif\r
1649 \r
1650         //\r
1651         // 2012/05/30 MH/Luke.Lee Add some description \r
1652         // In windows driver: AP/IBSS mode STA\r
1653         //\r
1654         //if (pDM_Odm->SupportPlatform == ODM_WIN)\r
1655         //{\r
1656         //      pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]];                        \r
1657         //}\r
1658         //else\r
1659                 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];                                                    \r
1660 \r
1661         if(!IS_STA_VALID(pEntry) )\r
1662         {               \r
1663                 return;\r
1664         }\r
1665 \r
1666 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))   \r
1667         if ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) &&\r
1668                 (pDM_FatTable->enable_ctrl_frame_antdiv)\r
1669         )\r
1670         {\r
1671                 if (pPktinfo->bPacketMatchBSSID)\r
1672                         pDM_Odm->data_frame_num++;\r
1673                                 \r
1674                 if ((pDM_FatTable->use_ctrl_frame_antdiv)) {\r
1675                         if (!pPktinfo->bToSelf)/*data frame + CTRL frame*/\r
1676                                 return;\r
1677                 } else {\r
1678                         if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
1679                                 return;\r
1680                 }       \r
1681         } else\r
1682 #endif\r
1683         {\r
1684                 if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
1685                         return;\r
1686         }\r
1687 \r
1688         if(pPktinfo->bPacketBeacon)\r
1689                 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
1690         \r
1691         isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE;\r
1692         pDM_Odm->RxRate = pPktinfo->DataRate;\r
1693 \r
1694         //--------------Statistic for antenna/path diversity------------------\r
1695         if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)\r
1696         {\r
1697                 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
1698                         ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);\r
1699                 #endif\r
1700         }\r
1701         #if(defined(CONFIG_PATH_DIVERSITY))\r
1702         else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)\r
1703         {\r
1704                 phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo);\r
1705         }\r
1706         #endif\r
1707         //-----------------Smart Antenna Debug Message------------------//\r
1708         \r
1709         UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;\r
1710         UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;\r
1711         UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;    \r
1712         \r
1713         if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)\r
1714         {\r
1715 \r
1716                 if(!isCCKrate)//ofdm rate\r
1717                 {\r
1718 #if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)\r
1719                         if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) {\r
1720                                 u1Byte RX_count = 0;\r
1721                                 u4Byte RSSI_linear = 0;\r
1722 \r
1723                                 if (pDM_Odm->RXAntStatus & ODM_RF_A) {\r
1724                                         pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1725                                         RX_count++;\r
1726                                         RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]);\r
1727                                 } else\r
1728                                         pDM_Odm->RSSI_A = 0;\r
1729 \r
1730                                 if (pDM_Odm->RXAntStatus & ODM_RF_B) {\r
1731                                         pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1732                                         RX_count++;\r
1733                                         RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);\r
1734                                 } else\r
1735                                         pDM_Odm->RSSI_B = 0;\r
1736                                 \r
1737                                 if (pDM_Odm->RXAntStatus & ODM_RF_C) {\r
1738                                         pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C];\r
1739                                         RX_count++;\r
1740                                         RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]);\r
1741                                 } else\r
1742                                         pDM_Odm->RSSI_C = 0;\r
1743 \r
1744                                 if (pDM_Odm->RXAntStatus & ODM_RF_D) {\r
1745                                         pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D];\r
1746                                         RX_count++;\r
1747                                         RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]);\r
1748                                 } else\r
1749                                         pDM_Odm->RSSI_D = 0;\r
1750 \r
1751                                 /* Calculate average RSSI */\r
1752                                 switch (RX_count) {\r
1753                                 case 2:\r
1754                                         RSSI_linear = (RSSI_linear >> 1);\r
1755                                         break;\r
1756                                 case 3:\r
1757                                         RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5;   /* RSSI_linear/3 ~ RSSI_linear*11/32 */\r
1758                                         break;\r
1759                                 case 4:\r
1760                                         RSSI_linear = (RSSI_linear >> 2);\r
1761                                         break;\r
1762                                 }                       \r
1763                                 RSSI_Ave = odm_ConvertTo_dB(RSSI_linear);\r
1764                         } else\r
1765 #endif\r
1766                         {\r
1767                                 if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {\r
1768                                         RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1769                                         pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1770                                         pDM_Odm->RSSI_B = 0;\r
1771                                 } else {\r
1772                                         /*DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n",*/ \r
1773                                                 /*pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);*/\r
1774                                         pDM_Odm->RSSI_A =  pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1775                                         pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1776                                 \r
1777                                         if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {\r
1778                                                 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1779                                                 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1780                                         } else {\r
1781                                                 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1782                                                 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1783                                         }\r
1784                                         if ((RSSI_max - RSSI_min) < 3)\r
1785                                                 RSSI_Ave = RSSI_max;\r
1786                                         else if ((RSSI_max - RSSI_min) < 6)\r
1787                                                 RSSI_Ave = RSSI_max - 1;\r
1788                                         else if ((RSSI_max - RSSI_min) < 10)\r
1789                                                 RSSI_Ave = RSSI_max - 2;\r
1790                                         else\r
1791                                                 RSSI_Ave = RSSI_max - 3;\r
1792                                 }\r
1793                         }\r
1794                                         \r
1795                         //1 Process OFDM RSSI\r
1796                         if(UndecoratedSmoothedOFDM <= 0)        // initialize\r
1797                         {\r
1798                                 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;\r
1799                         }\r
1800                         else\r
1801                         {\r
1802                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)\r
1803                                 {\r
1804                                         UndecoratedSmoothedOFDM =       \r
1805                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1806                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1807                                         UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;\r
1808                                 }\r
1809                                 else\r
1810                                 {\r
1811                                         UndecoratedSmoothedOFDM =       \r
1812                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1813                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1814                                 }\r
1815                         }                               \r
1816                         if (pEntry->rssi_stat.OFDM_pkt != 64) {\r
1817                                 i = 63;\r
1818                                 pEntry->rssi_stat.OFDM_pkt -= (u4Byte)(((pEntry->rssi_stat.PacketMap>>i)&BIT0)-1);\r
1819                         }\r
1820                         pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;                  \r
1821                                                                                 \r
1822                 }\r
1823                 else\r
1824                 {\r
1825                         RSSI_Ave = pPhyInfo->RxPWDBAll;\r
1826                         pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll;\r
1827                         pDM_Odm->RSSI_B = 0xFF;\r
1828                         pDM_Odm->RSSI_C = 0xFF;\r
1829                         pDM_Odm->RSSI_D = 0xFF;\r
1830 \r
1831                         //1 Process CCK RSSI\r
1832                         if(UndecoratedSmoothedCCK <= 0) // initialize\r
1833                         {\r
1834                                 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;\r
1835                         }\r
1836                         else\r
1837                         {\r
1838                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)\r
1839                                 {\r
1840                                         UndecoratedSmoothedCCK =        \r
1841                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1842                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1843                                         UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;\r
1844                                 }\r
1845                                 else\r
1846                                 {\r
1847                                         UndecoratedSmoothedCCK =        \r
1848                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1849                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1850                                 }\r
1851                         }\r
1852                         i = 63;\r
1853                         pEntry->rssi_stat.OFDM_pkt -= (u4Byte)((pEntry->rssi_stat.PacketMap>>i)&BIT0);                  \r
1854                         pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;                   \r
1855                 }\r
1856 \r
1857                 //if(pEntry)\r
1858                 {\r
1859                         //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI\r
1860                         if (pEntry->rssi_stat.OFDM_pkt == 64) { /* speed up when all packets are OFDM*/\r
1861                                 UndecoratedSmoothedPWDB = UndecoratedSmoothedOFDM;\r
1862                         } else {\r
1863                                 if (pEntry->rssi_stat.ValidBit < 64)\r
1864                                         pEntry->rssi_stat.ValidBit++;\r
1865 \r
1866                                 if (pEntry->rssi_stat.ValidBit == 64) {\r
1867                                         Weighting = ((pEntry->rssi_stat.OFDM_pkt<<4) > 64)?64:(pEntry->rssi_stat.OFDM_pkt<<4);\r
1868                                         UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;\r
1869                                 } else {\r
1870                                         if (pEntry->rssi_stat.ValidBit != 0)\r
1871                                                 UndecoratedSmoothedPWDB = (pEntry->rssi_stat.OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-pEntry->rssi_stat.OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;\r
1872                                         else\r
1873                                                 UndecoratedSmoothedPWDB = 0;\r
1874                                 }\r
1875                         }\r
1876                         #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
1877                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1)\r
1878                                 phydm_ra_rssi_rpt_wk(pDM_Odm);\r
1879                         #endif\r
1880                         pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;\r
1881                         pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;\r
1882                         pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;\r
1883 \r
1884                         //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting);\r
1885                         //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", \r
1886                         //      UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK);\r
1887                         \r
1888                 }\r
1889         \r
1890         }\r
1891 }\r
1892 \r
1893 \r
1894 #if(ODM_IC_11N_SERIES_SUPPORT ==1)\r
1895 //\r
1896 // Endianness before calling this API\r
1897 //\r
1898 VOID\r
1899 ODM_PhyStatusQuery_92CSeries(\r
1900         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1901         OUT             PODM_PHY_INFO_T                         pPhyInfo,\r
1902         IN              pu1Byte                                         pPhyStatus,     \r
1903         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1904         )\r
1905 {\r
1906         odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);\r
1907         odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo);\r
1908 }\r
1909 #endif\r
1910 \r
1911 \r
1912 //\r
1913 // Endianness before calling this API\r
1914 //\r
1915 #if     ODM_IC_11AC_SERIES_SUPPORT\r
1916 \r
1917 VOID\r
1918 ODM_PhyStatusQuery_JaguarSeries(\r
1919         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1920         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1921         IN              pu1Byte                                         pPhyStatus,     \r
1922         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1923         )\r
1924 {\r
1925         odm_RxPhyStatusJaguarSeries_Parsing(\r
1926                                                         pDM_Odm,\r
1927                                                         pPhyInfo,\r
1928                                                         pPhyStatus,\r
1929                                                         pPktinfo);\r
1930         \r
1931         odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
1932 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1933         //phydm_sbd_check(pDM_Odm);\r
1934 #endif\r
1935 }\r
1936 #endif\r
1937 \r
1938 VOID\r
1939 ODM_PhyStatusQuery(\r
1940         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1941         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1942         IN              pu1Byte                                         pPhyStatus,     \r
1943         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1944         )\r
1945 {\r
1946 #if (RTL8822B_SUPPORT == 1)\r
1947         if (pDM_Odm->SupportICType & ODM_RTL8822B) {\r
1948                 phydm_RxPhyStatusJaguarSeries2(pDM_Odm, pPhyStatus, pPktinfo, pPhyInfo);\r
1949                 return;\r
1950         }\r
1951 #endif\r
1952 \r
1953 #if     ODM_IC_11AC_SERIES_SUPPORT\r
1954         if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)\r
1955                 ODM_PhyStatusQuery_JaguarSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);\r
1956 #endif\r
1957 \r
1958 #if     ODM_IC_11N_SERIES_SUPPORT\r
1959         if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES )\r
1960                 ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
1961 #endif\r
1962 }\r
1963         \r
1964 // For future use.\r
1965 VOID\rODM_MacStatusQuery(\r
1966         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1967         IN              pu1Byte                                         pMacStatus,\r
1968         IN              u1Byte                                          MacID,  \r
1969         IN              BOOLEAN                                         bPacketMatchBSSID,\r
1970         IN              BOOLEAN                                         bPacketToSelf,\r
1971         IN              BOOLEAN                                         bPacketBeacon\r
1972         )\r
1973 {\r
1974         // 2011/10/19 Driver team will handle in the future.\r
1975         \r
1976 }\r
1977 \r
1978 \r
1979 //\r
1980 // If you want to add a new IC, Please follow below template and generate a new one.\r
1981 // \r
1982 //\r
1983 \r
1984 HAL_STATUS\r
1985 ODM_ConfigRFWithHeaderFile(\r
1986         IN      PDM_ODM_T                       pDM_Odm,\r
1987         IN      ODM_RF_Config_Type              ConfigType,\r
1988         IN      ODM_RF_RADIO_PATH_E     eRFPath\r
1989     )\r
1990 {\r
1991 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)    \r
1992         PADAPTER                Adapter = pDM_Odm->Adapter;\r
1993         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);       \r
1994 #endif\r
1995 \r
1996    ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1997                                 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1998     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1999                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2000                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2001 \r
2002 //1 AP doesn't use PHYDM power tracking table in these ICs\r
2003 #if (DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2004 #if (RTL8723A_SUPPORT == 1)\r
2005         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
2006         {\r
2007                 if(ConfigType == CONFIG_RF_RADIO) {\r
2008                         if(eRFPath == ODM_RF_PATH_A)\r
2009                                 READ_AND_CONFIG_MP(8723A,_RadioA);\r
2010                 }\r
2011         }\r
2012 #endif\r
2013 #if (RTL8812A_SUPPORT == 1)\r
2014         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2015         {\r
2016                 if(ConfigType == CONFIG_RF_RADIO) {\r
2017                         if(eRFPath == ODM_RF_PATH_A){\r
2018                                 READ_AND_CONFIG_MP(8812A,_RadioA);\r
2019                         }\r
2020                         else if(eRFPath == ODM_RF_PATH_B){\r
2021                                 READ_AND_CONFIG_MP(8812A,_RadioB);\r
2022                         }\r
2023                 }\r
2024                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
2025                         #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)\r
2026                         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);\r
2027                         if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) ||\r
2028                                 (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) ||\r
2029                                 (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812))\r
2030                                 READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03);\r
2031                         else\r
2032                         #endif                          \r
2033                         READ_AND_CONFIG_MP(8812A,_TXPWR_LMT);\r
2034                 }\r
2035         }\r
2036 #endif\r
2037 #if (RTL8821A_SUPPORT == 1)\r
2038         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2039         {\r
2040                 if(ConfigType == CONFIG_RF_RADIO) {\r
2041                         if(eRFPath == ODM_RF_PATH_A){\r
2042                                 READ_AND_CONFIG_MP(8821A,_RadioA);\r
2043                         }\r
2044                 }\r
2045                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
2046                         if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
2047                                 if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)\r
2048                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM);\r
2049                                 else\r
2050                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA);                                \r
2051                         } \r
2052                         else {\r
2053                                 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2054                                 if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB)\r
2055                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm);\r
2056                                 else if (pMgntInfo->CustomerID == RT_CID_ASUS_NB)\r
2057                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm);\r
2058                                 else\r
2059                                 #endif\r
2060                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A);                     \r
2061                         }\r
2062                 }\r
2063                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));\r
2064         }\r
2065 #endif\r
2066 \r
2067 #if (RTL8723B_SUPPORT == 1)\r
2068         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2069         {\r
2070                 if(ConfigType == CONFIG_RF_RADIO)\r
2071                         READ_AND_CONFIG_MP(8723B,_RadioA);\r
2072                 else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
2073                         READ_AND_CONFIG_MP(8723B,_TXPWR_LMT);\r
2074         }\r
2075 #endif\r
2076 \r
2077 #if (RTL8192E_SUPPORT == 1)\r
2078         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2079         {\r
2080                 if(ConfigType == CONFIG_RF_RADIO) {\r
2081                         if(eRFPath == ODM_RF_PATH_A)\r
2082                                 READ_AND_CONFIG_MP(8192E,_RadioA);\r
2083                         else if(eRFPath == ODM_RF_PATH_B)\r
2084                                 READ_AND_CONFIG_MP(8192E,_RadioB);\r
2085                 } else if (ConfigType == CONFIG_RF_TXPWR_LMT) {\r
2086 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)       /*Refine by Vincent Lan for 5mm SAR pwr limit*/\r
2087                         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);\r
2088 \r
2089                         if ((pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8192) || \r
2090                                 (pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8193))\r
2091                                 READ_AND_CONFIG_MP(8192E, _TXPWR_LMT_8192E_SAR_5mm);\r
2092                         else\r
2093 #endif  \r
2094                         READ_AND_CONFIG_MP(8192E,_TXPWR_LMT);\r
2095         }\r
2096         }\r
2097 #endif\r
2098 #endif//(DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2099 \r
2100 //1 All platforms support\r
2101 #if (RTL8188E_SUPPORT == 1)\r
2102         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2103         {\r
2104                 if(ConfigType == CONFIG_RF_RADIO) {\r
2105                         if(eRFPath == ODM_RF_PATH_A)\r
2106                                         READ_AND_CONFIG_MP(8188E,_RadioA);\r
2107                 }\r
2108                 else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
2109                         READ_AND_CONFIG_MP(8188E,_TXPWR_LMT);\r
2110         }\r
2111 #endif\r
2112 #if (RTL8814A_SUPPORT == 1)\r
2113         if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
2114         {\r
2115                 if(ConfigType == CONFIG_RF_RADIO) {\r
2116                         if(eRFPath == ODM_RF_PATH_A)\r
2117                                 READ_AND_CONFIG_MP(8814A,_RadioA);\r
2118                         else if(eRFPath == ODM_RF_PATH_B)\r
2119                                 READ_AND_CONFIG_MP(8814A,_RadioB);\r
2120                         else if(eRFPath == ODM_RF_PATH_C)\r
2121                                 READ_AND_CONFIG_MP(8814A,_RadioC);\r
2122                         else if(eRFPath == ODM_RF_PATH_D)\r
2123                                 READ_AND_CONFIG_MP(8814A,_RadioD);\r
2124                 }       \r
2125                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) \r
2126                         READ_AND_CONFIG_MP(8814A,_TXPWR_LMT);\r
2127         }\r
2128 #endif\r
2129 #if (RTL8703B_SUPPORT == 1)\r
2130         if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
2131                 if (ConfigType == CONFIG_RF_RADIO) {\r
2132                         if (eRFPath == ODM_RF_PATH_A)\r
2133                                 READ_AND_CONFIG_MP(8703B, _RadioA);\r
2134                 }       \r
2135         }\r
2136 #endif\r
2137 \r
2138 #if (RTL8188F_SUPPORT == 1)\r
2139         if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
2140                 if (ConfigType == CONFIG_RF_RADIO) {\r
2141                         if (eRFPath == ODM_RF_PATH_A)\r
2142                                 READ_AND_CONFIG_MP(8188F, _RadioA);\r
2143                 } else if (ConfigType == CONFIG_RF_TXPWR_LMT)\r
2144                         READ_AND_CONFIG_MP(8188F, _TXPWR_LMT);\r
2145         }\r
2146 #endif\r
2147 \r
2148 //1 New ICs (WIN only)\r
2149 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2150 #if (RTL8821B_SUPPORT == 1)\r
2151         if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
2152         {\r
2153                 if (ConfigType == CONFIG_RF_RADIO) {\r
2154                         if (eRFPath == ODM_RF_PATH_A)\r
2155                                 READ_AND_CONFIG(8821B, _RadioA);\r
2156                 } else if (ConfigType == CONFIG_RF_TXPWR_LMT)\r
2157                         READ_AND_CONFIG(8821B, _TXPWR_LMT);\r
2158         }\r
2159 #endif\r
2160 #if (RTL8822B_SUPPORT == 1)\r
2161                 if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
2162                 {\r
2163                         if(ConfigType == CONFIG_RF_RADIO) {\r
2164                                 if(eRFPath == ODM_RF_PATH_A)\r
2165                                         READ_AND_CONFIG_MP(8822B, _RadioA);\r
2166                                 else if(eRFPath == ODM_RF_PATH_B)\r
2167                                         READ_AND_CONFIG_MP(8822B, _RadioB);\r
2168                         }       \r
2169                 }\r
2170 #endif\r
2171 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2172 #if (RTL8188F_SUPPORT == 1)\r
2173                 if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
2174                 {\r
2175                         if(ConfigType == CONFIG_RF_RADIO) {\r
2176                                 if(eRFPath == ODM_RF_PATH_A)\r
2177                                         READ_AND_CONFIG_TC(8188F,_RadioA);\r
2178                         }       \r
2179                 }\r
2180 #endif\r
2181 #endif\r
2182 #endif//(DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2183 \r
2184         return HAL_STATUS_SUCCESS;\r
2185 }\r
2186 \r
2187 HAL_STATUS\r
2188 ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
2189         IN      PDM_ODM_T                       pDM_Odm\r
2190     )\r
2191 {\r
2192         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2193                                  ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
2194         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2195                                  ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2196                                  pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2197 \r
2198 \r
2199 //1 AP doesn't use PHYDM power tracking table in these ICs\r
2200 #if (DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2201 #if RTL8821A_SUPPORT\r
2202         if(pDM_Odm->SupportICType == ODM_RTL8821)\r
2203         {\r
2204                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
2205                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
2206                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2207                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB);                    \r
2208                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2209                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO);\r
2210         }\r
2211 #endif  \r
2212 #if RTL8812A_SUPPORT    \r
2213         if(pDM_Odm->SupportICType == ODM_RTL8812)\r
2214         {\r
2215                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
2216                         READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE);\r
2217                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
2218                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
2219                                 READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3);   \r
2220                         else\r
2221                                 READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB);    \r
2222                 }\r
2223                 \r
2224         }\r
2225 #endif  \r
2226 #if RTL8192E_SUPPORT    \r
2227         if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
2228         {\r
2229                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
2230                         READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE);\r
2231                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2232                         READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); \r
2233                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2234                         READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); \r
2235         }\r
2236 #endif\r
2237 #if RTL8723B_SUPPORT    \r
2238         if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
2239         {\r
2240                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
2241                         READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE);\r
2242                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2243                         READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB);\r
2244                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2245                         READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO);                   \r
2246         }\r
2247 #endif  \r
2248 #if RTL8188E_SUPPORT    \r
2249         if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
2250         {\r
2251                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
2252                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
2253                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2254                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB);\r
2255                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2256                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO);\r
2257         }\r
2258 #endif\r
2259 #endif//(DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2260 \r
2261 //1 All platforms support\r
2262 #if RTL8814A_SUPPORT\r
2263         if(pDM_Odm->SupportICType == ODM_RTL8814A) \r
2264         {\r
2265                 if(pDM_Odm->RFEType == 0)\r
2266                         READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0);\r
2267                 else if(pDM_Odm->RFEType == 2)\r
2268                         READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2);\r
2269                 else if (pDM_Odm->RFEType == 5)\r
2270                         READ_AND_CONFIG_MP(8814A, _TxPowerTrack_Type5);\r
2271                 else\r
2272                         READ_AND_CONFIG_MP(8814A,_TxPowerTrack);\r
2273         }\r
2274 #endif  \r
2275 #if RTL8703B_SUPPORT\r
2276         if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
2277                 if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2278                         READ_AND_CONFIG_MP(8703B, _TxPowerTrack_USB);\r
2279                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2280                         READ_AND_CONFIG_MP(8703B, _TxPowerTrack_SDIO);          \r
2281         }\r
2282 #endif\r
2283 \r
2284 #if RTL8188F_SUPPORT\r
2285         if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
2286                 if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
2287                         READ_AND_CONFIG_MP(8188F, _TxPowerTrack_USB);\r
2288                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
2289                         READ_AND_CONFIG_MP(8188F, _TxPowerTrack_SDIO);\r
2290         }\r
2291 #endif\r
2292 \r
2293 //1 New ICs (WIN only)\r
2294 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2295 #if RTL8821B_SUPPORT\r
2296         if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
2297                         READ_AND_CONFIG(8821B,_TxPowerTrack);                   \r
2298 #endif  \r
2299 #if RTL8822B_SUPPORT\r
2300 /*      if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
2301                         READ_AND_CONFIG_MP(8822B, _TxPowerTrack);                       */\r
2302 #endif  \r
2303 \r
2304 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2305 #if RTL8188F_SUPPORT\r
2306         if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
2307                         READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE);                   \r
2308 #endif  \r
2309 #endif\r
2310 #endif//(DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2311 \r
2312 \r
2313         return HAL_STATUS_SUCCESS;\r
2314 }\r
2315 \r
2316 HAL_STATUS\r
2317 ODM_ConfigBBWithHeaderFile(\r
2318         IN      PDM_ODM_T                       pDM_Odm,\r
2319         IN      ODM_BB_Config_Type              ConfigType\r
2320         )\r
2321 {\r
2322 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)    \r
2323         PADAPTER                Adapter = pDM_Odm->Adapter;\r
2324         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);       \r
2325 #endif\r
2326 \r
2327 //1 AP doesn't use PHYDM initialization in these ICs\r
2328 #if (DM_ODM_SUPPORT_TYPE !=  ODM_AP)    \r
2329 #if (RTL8723A_SUPPORT == 1) \r
2330         if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
2331         {\r
2332                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2333                         READ_AND_CONFIG_MP(8723A,_PHY_REG);\r
2334                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2335                         READ_AND_CONFIG_MP(8723A,_AGC_TAB);\r
2336                 }               \r
2337         }               \r
2338 #endif\r
2339 #if (RTL8812A_SUPPORT == 1) \r
2340         if(pDM_Odm->SupportICType == ODM_RTL8812)\r
2341         {\r
2342                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2343                         READ_AND_CONFIG_MP(8812A,_PHY_REG);\r
2344                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2345                         READ_AND_CONFIG_MP(8812A,_AGC_TAB);\r
2346                 }\r
2347                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2348                 {\r
2349                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
2350                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);\r
2351                         #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2352                         else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) \r
2353                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);\r
2354                         #endif                  \r
2355                         else\r
2356                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG);\r
2357                 }\r
2358                 else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
2359                         READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);\r
2360                 }\r
2361                 else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)\r
2362                 {\r
2363                         if ((36 <= *pDM_Odm->pChannel)  && (*pDM_Odm->pChannel  <= 64)) \r
2364                                 AGC_DIFF_CONFIG_MP(8812A,LB);\r
2365                         else if (100 <= *pDM_Odm->pChannel) \r
2366                                 AGC_DIFF_CONFIG_MP(8812A,HB);\r
2367                 }\r
2368                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n"));\r
2369                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n"));\r
2370         }               \r
2371 #endif\r
2372 #if (RTL8821A_SUPPORT == 1) \r
2373         if(pDM_Odm->SupportICType == ODM_RTL8821)\r
2374         {\r
2375                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2376                         READ_AND_CONFIG_MP(8821A,_PHY_REG);\r
2377                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2378                         READ_AND_CONFIG_MP(8821A,_AGC_TAB);\r
2379                 }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
2380                         READ_AND_CONFIG_MP(8821A,_PHY_REG_PG);\r
2381                 }               \r
2382                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n"));\r
2383                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n"));\r
2384         }               \r
2385 #endif\r
2386 #if (RTL8723B_SUPPORT == 1)\r
2387         if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
2388         {\r
2389                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2390                         READ_AND_CONFIG_MP(8723B,_PHY_REG);\r
2391                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2392                         READ_AND_CONFIG_MP(8723B,_AGC_TAB);\r
2393                 }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
2394                         READ_AND_CONFIG_MP(8723B,_PHY_REG_PG);\r
2395                 }\r
2396         }\r
2397 #endif\r
2398 #if (RTL8192E_SUPPORT == 1)\r
2399         if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
2400         {\r
2401                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2402                         READ_AND_CONFIG_MP(8192E,_PHY_REG);\r
2403                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2404                         READ_AND_CONFIG_MP(8192E,_AGC_TAB);\r
2405                 }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
2406                         READ_AND_CONFIG_MP(8192E,_PHY_REG_PG);\r
2407                 }\r
2408         }\r
2409 #endif\r
2410 #endif//(DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2411 \r
2412 \r
2413 //1 All platforms support\r
2414 #if (RTL8188E_SUPPORT == 1)\r
2415         if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
2416         {\r
2417                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2418                         READ_AND_CONFIG_MP(8188E,_PHY_REG);\r
2419                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2420                         READ_AND_CONFIG_MP(8188E,_AGC_TAB);\r
2421                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2422                         READ_AND_CONFIG_MP(8188E,_PHY_REG_PG);\r
2423         }\r
2424 #endif\r
2425 #if (RTL8814A_SUPPORT == 1)\r
2426         if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
2427         {\r
2428                 if(ConfigType == CONFIG_BB_PHY_REG){\r
2429                         READ_AND_CONFIG_MP(8814A,_PHY_REG);\r
2430                 }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
2431                         READ_AND_CONFIG_MP(8814A,_AGC_TAB);\r
2432                 }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
2433                         READ_AND_CONFIG_MP(8814A,_PHY_REG_PG);\r
2434                 }else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
2435                         READ_AND_CONFIG_MP(8814A,_PHY_REG_MP);\r
2436                 }\r
2437         }\r
2438 #endif\r
2439 #if (RTL8703B_SUPPORT == 1)\r
2440         if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
2441                 if (ConfigType == CONFIG_BB_PHY_REG)\r
2442                         READ_AND_CONFIG_MP(8703B, _PHY_REG);\r
2443                 else if (ConfigType == CONFIG_BB_AGC_TAB)\r
2444                         READ_AND_CONFIG_MP(8703B, _AGC_TAB);\r
2445                 else if (ConfigType == CONFIG_BB_PHY_REG_PG)\r
2446                         READ_AND_CONFIG_MP(8703B, _PHY_REG_PG);\r
2447         }\r
2448 #endif\r
2449 \r
2450 #if (RTL8188F_SUPPORT == 1)\r
2451         if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
2452                 if (ConfigType == CONFIG_BB_PHY_REG) \r
2453                         READ_AND_CONFIG_MP(8188F, _PHY_REG);\r
2454                 else if (ConfigType == CONFIG_BB_AGC_TAB) \r
2455                         READ_AND_CONFIG_MP(8188F, _AGC_TAB);\r
2456                 else if (ConfigType == CONFIG_BB_PHY_REG_PG) \r
2457                         READ_AND_CONFIG_MP(8188F, _PHY_REG_PG);\r
2458         }\r
2459 #endif\r
2460 \r
2461 //1 New ICs (WIN only)\r
2462 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2463 #if (RTL8821B_SUPPORT == 1) \r
2464         if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
2465         {\r
2466                 if (ConfigType == CONFIG_BB_PHY_REG) {\r
2467                         READ_AND_CONFIG(8821B,_PHY_REG);\r
2468                 } else if (ConfigType == CONFIG_BB_AGC_TAB) { \r
2469                     READ_AND_CONFIG(8821B,_AGC_TAB);\r
2470                 } else if (ConfigType == CONFIG_BB_PHY_REG_PG) {\r
2471                         READ_AND_CONFIG(8821B,_PHY_REG_PG);\r
2472                 }\r
2473         }               \r
2474 #endif\r
2475 #if (RTL8822B_SUPPORT == 1)\r
2476         if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
2477         {\r
2478                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2479                         READ_AND_CONFIG_MP(8822B, _PHY_REG);\r
2480                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2481                         READ_AND_CONFIG_MP(8822B, _AGC_TAB);\r
2482 /*              else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2483                         READ_AND_CONFIG_MP(8822B, _PHY_REG_PG);\r
2484                 else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
2485                         READ_AND_CONFIG_MP(8822B, _PHY_REG_MP); */\r
2486         }\r
2487 #endif\r
2488 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2489 #if (RTL8188F_SUPPORT == 1)\r
2490         if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
2491         {\r
2492                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2493                         READ_AND_CONFIG_TC(8188F,_PHY_REG);\r
2494                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2495                         READ_AND_CONFIG_TC(8188F,_AGC_TAB);\r
2496                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2497                         READ_AND_CONFIG_TC(8188F,_PHY_REG_PG);\r
2498         }\r
2499 #endif\r
2500 #endif\r
2501 #if (RTL8195A_SUPPORT == 1)\r
2502         if(pDM_Odm->SupportICType == ODM_RTL8195A)\r
2503         {\r
2504                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2505                         READ_AND_CONFIG(8195A,_PHY_REG);\r
2506                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2507                         READ_AND_CONFIG(8195A,_AGC_TAB);\r
2508                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2509                         READ_AND_CONFIG(8195A,_PHY_REG_PG);\r
2510         }\r
2511 #endif\r
2512 #endif//(DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2513 \r
2514         return HAL_STATUS_SUCCESS; \r
2515 }                 \r
2516 \r
2517 HAL_STATUS\r
2518 ODM_ConfigMACWithHeaderFile(\r
2519         IN      PDM_ODM_T       pDM_Odm\r
2520         )\r
2521 {\r
2522 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)    \r
2523         PADAPTER                Adapter = pDM_Odm->Adapter;\r
2524         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);       \r
2525 #endif\r
2526 \r
2527         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2528                                 ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
2529         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2530                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2531                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2532 \r
2533 //1 AP doesn't use PHYDM initialization in these ICs\r
2534 #if (DM_ODM_SUPPORT_TYPE !=  ODM_AP)    \r
2535 #if (RTL8723A_SUPPORT == 1)\r
2536         if (pDM_Odm->SupportICType == ODM_RTL8723A){\r
2537                 READ_AND_CONFIG_MP(8723A,_MAC_REG);\r
2538         }\r
2539 #endif\r
2540 #if (RTL8812A_SUPPORT == 1)\r
2541         if (pDM_Odm->SupportICType == ODM_RTL8812){\r
2542                 READ_AND_CONFIG_MP(8812A,_MAC_REG);\r
2543         }\r
2544 #endif\r
2545 #if (RTL8821A_SUPPORT == 1)\r
2546         if (pDM_Odm->SupportICType == ODM_RTL8821){\r
2547                 READ_AND_CONFIG_MP(8821A,_MAC_REG);\r
2548 \r
2549                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));\r
2550         }\r
2551 #endif\r
2552 #if (RTL8723B_SUPPORT == 1)  \r
2553         if (pDM_Odm->SupportICType == ODM_RTL8723B){\r
2554                 READ_AND_CONFIG_MP(8723B,_MAC_REG);\r
2555         }\r
2556 #endif\r
2557 #if (RTL8192E_SUPPORT == 1)  \r
2558         if (pDM_Odm->SupportICType == ODM_RTL8192E){\r
2559                 READ_AND_CONFIG_MP(8192E,_MAC_REG);\r
2560         }\r
2561 #endif\r
2562 #endif//(DM_ODM_SUPPORT_TYPE !=  ODM_AP)\r
2563 \r
2564 //1 All platforms support\r
2565 #if (RTL8188E_SUPPORT == 1)  \r
2566         if (pDM_Odm->SupportICType == ODM_RTL8188E){\r
2567                 READ_AND_CONFIG_MP(8188E,_MAC_REG);\r
2568         }\r
2569 #endif\r
2570 #if (RTL8814A_SUPPORT == 1)  \r
2571         if (pDM_Odm->SupportICType == ODM_RTL8814A){\r
2572                 READ_AND_CONFIG_MP(8814A,_MAC_REG);\r
2573         }\r
2574 #endif\r
2575 #if (RTL8703B_SUPPORT == 1)  \r
2576         if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
2577                 READ_AND_CONFIG_MP(8703B, _MAC_REG);\r
2578 #endif\r
2579 \r
2580 #if (RTL8188F_SUPPORT == 1)  \r
2581         if (pDM_Odm->SupportICType == ODM_RTL8188F) \r
2582                 READ_AND_CONFIG_MP(8188F, _MAC_REG);\r
2583 #endif\r
2584 \r
2585 //1 New ICs (WIN only)\r
2586 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2587 #if (RTL8821B_SUPPORT == 1)\r
2588         if (pDM_Odm->SupportICType == ODM_RTL8821B){\r
2589                 READ_AND_CONFIG(8821B,_MAC_REG);\r
2590         }\r
2591 #endif\r
2592 #if (RTL8822B_SUPPORT == 1)  \r
2593         if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
2594                 READ_AND_CONFIG_MP(8822B, _MAC_REG);\r
2595 #endif\r
2596 \r
2597 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2598 #if (RTL8188F_SUPPORT == 1)  \r
2599         if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
2600                 READ_AND_CONFIG_TC(8188F,_MAC_REG);\r
2601 #endif\r
2602 #endif\r
2603 #if (RTL8195A_SUPPORT == 1)  \r
2604         if (pDM_Odm->SupportICType == ODM_RTL8195A)\r
2605                 READ_AND_CONFIG_MP(8195A,_MAC_REG);\r
2606 #endif\r
2607 #endif /*#if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)*/\r
2608 \r
2609         return HAL_STATUS_SUCCESS;    \r
2610 } \r
2611 \r
2612 HAL_STATUS\r
2613 ODM_ConfigFWWithHeaderFile(\r
2614         IN      PDM_ODM_T                       pDM_Odm,\r
2615         IN      ODM_FW_Config_Type      ConfigType,\r
2616         OUT u1Byte                              *pFirmware,\r
2617         OUT u4Byte                              *pSize\r
2618         )\r
2619 {\r
2620 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
2621 \r
2622 #if (RTL8188E_SUPPORT == 1)  \r
2623         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2624         {\r
2625         #ifdef CONFIG_SFW_SUPPORTED\r
2626                 if (ConfigType == CONFIG_FW_NIC)\r
2627                         READ_FIRMWARE_MP(8188E_T,_FW_NIC);\r
2628                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2629                         READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN);\r
2630                 else if(ConfigType == CONFIG_FW_NIC_2)\r
2631                         READ_FIRMWARE_MP(8188E_S,_FW_NIC);\r
2632                 else if (ConfigType == CONFIG_FW_WoWLAN_2)\r
2633                         READ_FIRMWARE_MP(8188E_S,_FW_WoWLAN);\r
2634                 #ifdef CONFIG_AP_WOWLAN\r
2635                 if (ConfigType == CONFIG_FW_AP)\r
2636                         READ_FIRMWARE_MP(8188E_T,_FW_AP);\r
2637                 else if (ConfigType == CONFIG_FW_AP_2)\r
2638                         READ_FIRMWARE_MP(8188E_S,_FW_AP);\r
2639                 #endif //CONFIG_AP_WOWLAN\r
2640         #else\r
2641                 if (ConfigType == CONFIG_FW_NIC)\r
2642                         READ_FIRMWARE_MP(8188E_T,_FW_NIC);\r
2643                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2644                         READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN);\r
2645                 #ifdef CONFIG_AP_WOWLAN\r
2646                 else if (ConfigType == CONFIG_FW_AP)\r
2647                         READ_FIRMWARE_MP(8188E_T,_FW_AP);\r
2648                 #endif //CONFIG_AP_WOWLAN\r
2649         #endif\r
2650         }\r
2651 #endif\r
2652 #if (RTL8723B_SUPPORT == 1)  \r
2653         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2654         {\r
2655                 if (ConfigType == CONFIG_FW_NIC)\r
2656                         READ_FIRMWARE_MP(8723B,_FW_NIC);\r
2657                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2658                         READ_FIRMWARE_MP(8723B,_FW_WoWLAN);\r
2659                 #ifdef CONFIG_AP_WOWLAN\r
2660                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2661                         READ_FIRMWARE(8723B,_FW_AP_WoWLAN);\r
2662                 #endif\r
2663                 \r
2664         }\r
2665 #endif //#if (RTL8723B_SUPPORT == 1)  \r
2666 #if (RTL8812A_SUPPORT == 1)\r
2667         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2668         {\r
2669                 if (ConfigType == CONFIG_FW_NIC)\r
2670                         READ_FIRMWARE_MP(8812A,_FW_NIC);\r
2671                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2672                         READ_FIRMWARE_MP(8812A,_FW_WoWLAN);\r
2673                 else if (ConfigType == CONFIG_FW_BT)\r
2674                         READ_FIRMWARE_MP(8812A,_FW_NIC_BT);\r
2675                 #ifdef CONFIG_AP_WOWLAN\r
2676                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2677                         READ_FIRMWARE(8812A,_FW_AP);\r
2678                 #endif\r
2679         }\r
2680 #endif\r
2681 #if (RTL8821A_SUPPORT == 1)\r
2682         if (pDM_Odm->SupportICType == ODM_RTL8821){\r
2683                 if (ConfigType == CONFIG_FW_NIC)\r
2684                         READ_FIRMWARE_MP(8821A,_FW_NIC);\r
2685                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2686                         READ_FIRMWARE_MP(8821A,_FW_WoWLAN);\r
2687                 #ifdef CONFIG_AP_WOWLAN\r
2688                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2689                         READ_FIRMWARE_MP(8821A , _FW_AP);\r
2690                 #endif /*CONFIG_AP_WOWLAN*/\r
2691                 else if (ConfigType == CONFIG_FW_BT)\r
2692                         READ_FIRMWARE_MP(8821A,_FW_NIC_BT);\r
2693         }\r
2694 #endif\r
2695 #if (RTL8192E_SUPPORT == 1)\r
2696         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2697         {\r
2698                 if (ConfigType == CONFIG_FW_NIC)\r
2699                         READ_FIRMWARE_MP(8192E,_FW_NIC);\r
2700                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2701                         READ_FIRMWARE_MP(8192E,_FW_WoWLAN);\r
2702                 #ifdef CONFIG_AP_WOWLAN\r
2703                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2704                         READ_FIRMWARE_MP(8192E,_FW_AP);\r
2705                 #endif\r
2706         }\r
2707 #endif\r
2708 #if (RTL8814A_SUPPORT == 1)\r
2709         if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
2710         {\r
2711                 if (ConfigType == CONFIG_FW_NIC)\r
2712                         READ_FIRMWARE_MP(8814A,_FW_NIC);\r
2713                 #ifdef CONFIG_AP_WOWLAN\r
2714                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2715                         READ_FIRMWARE_MP(8814A,_FW_AP);\r
2716                 #endif\r
2717         }\r
2718 #endif\r
2719 #if (RTL8703B_SUPPORT == 1)\r
2720         if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
2721                 if (ConfigType == CONFIG_FW_NIC)\r
2722                         READ_FIRMWARE_MP(8703B, _FW_NIC);\r
2723                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2724                         READ_FIRMWARE_MP(8703B, _FW_WoWLAN);\r
2725                 #ifdef CONFIG_AP_WOWLAN\r
2726                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2727                         READ_FIRMWARE(8703B, _FW_AP_WoWLAN);\r
2728                 #endif\r
2729         }\r
2730 #endif\r
2731 \r
2732 #if (RTL8188F_SUPPORT == 1)\r
2733         if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
2734                 if (ConfigType == CONFIG_FW_NIC)\r
2735                         READ_FIRMWARE_MP(8188F, _FW_NIC);\r
2736                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2737                         READ_FIRMWARE_MP(8188F, _FW_WoWLAN);\r
2738                 #ifdef CONFIG_AP_WOWLAN\r
2739                 else if (ConfigType == CONFIG_FW_AP)\r
2740                         READ_FIRMWARE_MP(8188F,_FW_AP);\r
2741                 #endif\r
2742         }\r
2743 #endif\r
2744 \r
2745 //1 New ICs (WIN only)\r
2746 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
2747 #if (RTL8821B_SUPPORT == 1)\r
2748         if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
2749         {\r
2750         }\r
2751 #endif\r
2752 #if (RTL8822B_SUPPORT == 1)\r
2753         if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
2754         {\r
2755                 /*\r
2756                 if (ConfigType == CONFIG_FW_NIC)\r
2757                         READ_FIRMWARE_MP(8822B,_FW_NIC);\r
2758                 #ifdef CONFIG_AP_WOWLAN\r
2759                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2760                         READ_FIRMWARE(8822B,_FW_AP);\r
2761                 #endif */\r
2762         }\r
2763 #endif\r
2764 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2765 #if (RTL8188F_SUPPORT == 1)\r
2766         if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
2767         {\r
2768                 if (ConfigType == CONFIG_FW_NIC)\r
2769                         READ_FIRMWARE_MP(8188F,_FW_NIC);\r
2770         }\r
2771 #endif\r
2772 #endif\r
2773 #endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
2774 \r
2775 #endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
2776         return HAL_STATUS_SUCCESS;    \r
2777 } \r
2778 \r
2779 u4Byte \r
2780 ODM_GetHWImgVersion(\r
2781         IN      PDM_ODM_T       pDM_Odm\r
2782         )\r
2783 {\r
2784     u4Byte  Version=0;\r
2785 \r
2786 //1 AP doesn't use PHYDM initialization in these ICs\r
2787 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
2788 #if (RTL8723A_SUPPORT == 1)  \r
2789         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
2790                 Version = GET_VERSION_MP(8723A,_MAC_REG);\r
2791 #endif\r
2792 #if (RTL8723B_SUPPORT == 1)  \r
2793         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2794                 Version = GET_VERSION_MP(8723B,_MAC_REG);\r
2795 #endif\r
2796 #if (RTL8821A_SUPPORT == 1)  \r
2797         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2798                 Version = GET_VERSION_MP(8821A,_MAC_REG);\r
2799 #endif\r
2800 #if (RTL8192E_SUPPORT == 1)  \r
2801         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2802                 Version = GET_VERSION_MP(8192E,_MAC_REG);\r
2803 #endif\r
2804 #if (RTL8812A_SUPPORT == 1)  \r
2805         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2806                 Version = GET_VERSION_MP(8812A,_MAC_REG);\r
2807 #endif\r
2808 #endif //(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
2809 \r
2810 /*1 All platforms support*/\r
2811 #if (RTL8188E_SUPPORT == 1)  \r
2812         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2813                 Version = GET_VERSION_MP(8188E,_MAC_REG);\r
2814 #endif\r
2815 #if (RTL8814A_SUPPORT == 1)  \r
2816         if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
2817                 Version = GET_VERSION_MP(8814A,_MAC_REG);\r
2818 #endif\r
2819 #if (RTL8703B_SUPPORT == 1)  \r
2820         if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
2821                 Version = GET_VERSION_MP(8703B, _MAC_REG);\r
2822 #endif\r
2823 #if (RTL8188F_SUPPORT == 1)  \r
2824         if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
2825                 Version = GET_VERSION_MP(8188F, _MAC_REG);\r
2826 #endif\r
2827 \r
2828 //1 New ICs (WIN only)\r
2829 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
2830 #if (RTL8821B_SUPPORT == 1)  \r
2831         if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
2832                 Version = GET_VERSION(8821B,_MAC_REG);\r
2833 #endif\r
2834 #if (RTL8822B_SUPPORT == 1)  \r
2835         if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
2836                 Version = GET_VERSION(8822B, _MAC_REG);\r
2837 #endif\r
2838 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
2839 #if (RTL8188F_SUPPORT == 1)  \r
2840         if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
2841                 Version = GET_VERSION_TC(8188F, _MAC_REG);\r
2842 #endif\r
2843 #endif\r
2844 #endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
2845 \r
2846         return Version;\r
2847 }\r
2848 \r
2849 #if (RTL8822B_SUPPORT == 1)\r
2850 /* For 8822B only!! need to move to FW finally */\r
2851 /*==============================================*/\r
2852 \r
2853 VOID\r
2854 phydm_ResetPhyInfo(\r
2855         IN              PDM_ODM_T                                       pPhydm,\r
2856         OUT             PODM_PHY_INFO_T                 pPhyInfo\r
2857 )\r
2858 {\r
2859         pPhyInfo->RxPWDBAll = 0;\r
2860         pPhyInfo->SignalQuality = 0;\r
2861         pPhyInfo->BandWidth = 0;\r
2862 #if (RTL8822B_SUPPORT == 1)\r
2863         pPhyInfo->RxCount = 0;\r
2864 #endif\r
2865         ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalQuality, 0 , 4);\r
2866         ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalStrength, 0, 4);\r
2867         ODM_Memory_Set(pPhydm, pPhyInfo->RxSNR, 0, 4);\r
2868 \r
2869 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))   \r
2870         pPhyInfo->RxPower = -110;\r
2871         pPhyInfo->RecvSignalPower = -110;\r
2872         pPhyInfo->BTRxRSSIPercentage = 0;\r
2873         pPhyInfo->SignalStrength = 0;\r
2874         pPhyInfo->btCoexPwrAdjust = 0;\r
2875 #if (RTL8822B_SUPPORT == 1)\r
2876         pPhyInfo->channel = 0;\r
2877         pPhyInfo->bMuPacket = 0;\r
2878         pPhyInfo->bBeamformed = 0;\r
2879         pPhyInfo->rxsc = 0;\r
2880 #endif\r
2881         ODM_Memory_Set(pPhydm, pPhyInfo->RxPwr, -110, 4);\r
2882         ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOEVMdbm, 0, 4);\r
2883         ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_short, 0, 8);\r
2884         ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_tail, 0, 8);\r
2885 #endif\r
2886 }\r
2887 \r
2888 VOID\r
2889 phydm_SetPerPathPhyInfo(\r
2890         IN              u1Byte                                                  RxPath,\r
2891         IN              s1Byte                                                  RxPwr,\r
2892         IN              s1Byte                                                  RxEVM,\r
2893         IN              s1Byte                                                  Cfo_tail,\r
2894         IN              s1Byte                                                  RxSNR,\r
2895         OUT             PODM_PHY_INFO_T                         pPhyInfo\r
2896 )\r
2897 {\r
2898         u1Byte                  EVMdBm = 0;\r
2899         u1Byte                  EVMPercentage = 0;\r
2900 \r
2901         /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */\r
2902         \r
2903         if (RxEVM < 0) {\r
2904                 /* Calculate EVM in dBm */\r
2905                 EVMdBm = ((u1Byte)(0 - RxEVM) >> 1);\r
2906 \r
2907                 /* Calculate EVM in percentage */\r
2908                 if (EVMdBm >= 33)\r
2909                         EVMPercentage = 100;\r
2910                 else \r
2911                         EVMPercentage = (EVMdBm << 1) + (EVMdBm);\r
2912         }\r
2913         \r
2914 \r
2915 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
2916         pPhyInfo->RxPwr[RxPath] = RxPwr;\r
2917         pPhyInfo->RxMIMOEVMdbm[RxPath] = EVMdBm;\r
2918 \r
2919         /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/\r
2920         pPhyInfo->Cfo_tail[RxPath] = Cfo_tail;\r
2921         pPhyInfo->Cfo_tail[RxPath] = ((pPhyInfo->Cfo_tail[RxPath] << 5) + (pPhyInfo->Cfo_tail[RxPath] << 2) +\r
2922                 (pPhyInfo->Cfo_tail[RxPath] << 1) + (pPhyInfo->Cfo_tail[RxPath])) >> 9;\r
2923 #endif\r
2924 \r
2925         pPhyInfo->RxMIMOSignalStrength[RxPath] = odm_QueryRxPwrPercentage(RxPwr);\r
2926         pPhyInfo->RxMIMOSignalQuality[RxPath] = EVMPercentage;\r
2927         pPhyInfo->RxSNR[RxPath] = RxSNR >> 1;\r
2928 \r
2929 /*\r
2930         //if (pPktinfo->bPacketMatchBSSID) \r
2931         {\r
2932                 DbgPrint("Path (%d)--------\n", RxPath);\r
2933                 DbgPrint("RxPwr = %d, Signal strength = %d\n", pPhyInfo->RxPwr[RxPath], pPhyInfo->RxMIMOSignalStrength[RxPath]);\r
2934                 DbgPrint("EVMdBm = %d, Signal quality = %d\n", pPhyInfo->RxMIMOEVMdbm[RxPath], pPhyInfo->RxMIMOSignalQuality[RxPath]);\r
2935                 DbgPrint("CFO = %d, SNR = %d\n", pPhyInfo->Cfo_tail[RxPath], pPhyInfo->RxSNR[RxPath]);\r
2936         }       \r
2937 */\r
2938 }\r
2939 \r
2940 VOID\r
2941 phydm_SetCommonPhyInfo(\r
2942         IN              s1Byte                                                  RxPower,\r
2943         IN              u1Byte                                                  channel,\r
2944         IN              BOOLEAN                                                 bBeamformed,\r
2945         IN              BOOLEAN                                                 bMuPacket,\r
2946         IN              u1Byte                                                  bandwidth,\r
2947         IN              u1Byte                                                  signalQuality,\r
2948         IN              u1Byte                                                  rxsc,\r
2949         OUT             PODM_PHY_INFO_T                         pPhyInfo\r
2950 )\r
2951 {\r
2952 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
2953         pPhyInfo->RxPower = RxPower;                                                                                    /* RSSI in dB */\r
2954         pPhyInfo->RecvSignalPower = RxPower;                                                                            /* RSSI in dB */\r
2955         pPhyInfo->channel = channel;                                                                                            /* channel number */\r
2956         pPhyInfo->bBeamformed = bBeamformed;                                                                    /* apply BF */\r
2957         pPhyInfo->bMuPacket = bMuPacket;                                                                                /* MU packet */\r
2958         pPhyInfo->rxsc = rxsc;\r
2959 #endif\r
2960         pPhyInfo->RxPWDBAll = odm_QueryRxPwrPercentage(RxPower);                                /* RSSI in percentage */\r
2961         pPhyInfo->SignalQuality = signalQuality;                                                                                /* signal quality */\r
2962         pPhyInfo->BandWidth = bandwidth;                                                                                        /* bandwidth */\r
2963 \r
2964 /*\r
2965         //if (pPktinfo->bPacketMatchBSSID)\r
2966         {\r
2967                 DbgPrint("RxPWDBAll = %d, RxPower = %d, RecvSignalPower = %d\n", pPhyInfo->RxPWDBAll, pPhyInfo->RxPower, pPhyInfo->RecvSignalPower);\r
2968                 DbgPrint("SignalQuality = %d\n", pPhyInfo->SignalQuality);\r
2969                 DbgPrint("bBeamformed = %d, bMuPacket = %d, RxCount = %d\n", pPhyInfo->bBeamformed, pPhyInfo->bMuPacket, pPhyInfo->RxCount + 1);\r
2970                 DbgPrint("channel = %d, rxsc = %d, BandWidth = %d\n", channel, rxsc, bandwidth);\r
2971         }\r
2972 */\r
2973 }\r
2974 \r
2975 VOID\r
2976 phydm_GetRxPhyStatusType0(\r
2977         IN              PDM_ODM_T                                               pDM_Odm,\r
2978         IN              pu1Byte                                                 pPhyStatus,\r
2979         IN              PODM_PACKET_INFO_T                              pPktinfo,\r
2980         OUT             PODM_PHY_INFO_T                         pPhyInfo\r
2981 )\r
2982 {\r
2983         /* Type 0 is used for cck packet */\r
2984         \r
2985         PPHY_STATUS_RPT_JAGUAR2_TYPE0   pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE0)pPhyStatus;\r
2986         u1Byte                                                  i, SQ = 0;\r
2987 \r
2988         /* Calculate Signal Quality*/\r
2989         if (pPktinfo->bPacketMatchBSSID) {\r
2990                 if (pPhyStaRpt->signal_quality >= 64)\r
2991                         SQ = 0;\r
2992                 else if (pPhyStaRpt->signal_quality <= 20)\r
2993                         SQ = 100;\r
2994                 else {\r
2995                         /* mapping to 2~99% */\r
2996                         SQ = 64 - pPhyStaRpt->signal_quality;\r
2997                         SQ = ((SQ << 3) + SQ) >> 2;\r
2998                 }\r
2999         }\r
3000 \r
3001         /* Update CCK packet counter */\r
3002         pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
3003 \r
3004         /* Update Common information */\r
3005         phydm_SetCommonPhyInfo((pPhyStaRpt->pwdb - 110), pPhyStaRpt->channel, FALSE, \r
3006                 FALSE, ODM_BW20M, SQ, pPhyStaRpt->rxsc, pPhyInfo);\r
3007 \r
3008         /* Update CCK pwdb */\r
3009         phydm_SetPerPathPhyInfo(ODM_RF_PATH_A, (pPhyStaRpt->pwdb - 110), 0, 0, 0, pPhyInfo);                                    /* Update per-path information */\r
3010 \r
3011 /*\r
3012         //if (pPktinfo->bPacketMatchBSSID)\r
3013         {\r
3014                 DbgPrint("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", pPhyStaRpt->pwdb, pPhyStaRpt->gain, pPhyStaRpt->trsw);\r
3015                 DbgPrint("channel = %d, band = %d, rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->rxsc);\r
3016                 DbgPrint("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", pPhyStaRpt->agc_table, pPhyStaRpt->agc_rpt, pPhyStaRpt->bb_power);\r
3017                 DbgPrint("length = %d, SQ = %d\n", pPhyStaRpt->length, pPhyStaRpt->signal_quality);\r
3018                 DbgPrint("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d);\r
3019                 DbgPrint("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2);\r
3020                 DbgPrint("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5);\r
3021                 DbgPrint("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7, pPhyStaRpt->rsvd_8);\r
3022         }\r
3023 */\r
3024 }\r
3025 \r
3026 VOID\r
3027 phydm_GetRxPhyStatusType1(\r
3028         IN              PDM_ODM_T                                               pDM_Odm,\r
3029         IN              pu1Byte                                                 pPhyStatus,\r
3030         IN              PODM_PACKET_INFO_T                              pPktinfo,\r
3031         OUT             PODM_PHY_INFO_T                         pPhyInfo\r
3032 )\r
3033 {\r
3034         /* Type 1 is used for ofdm packet */\r
3035 \r
3036         PPHY_STATUS_RPT_JAGUAR2_TYPE1   pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE1)pPhyStatus;\r
3037         s1Byte                                                  rx_pwr_db = -120;\r
3038         u1Byte                                                  i, rxsc, bw, RxCount = 0;\r
3039         BOOLEAN                                                 bMU;\r
3040 \r
3041         /* Update OFDM packet counter */\r
3042         pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
3043 \r
3044         /* Update per-path information */\r
3045         for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
3046                 if (pDM_Odm->RXAntStatus & BIT(i)) {\r
3047                         s1Byte  rx_path_pwr_db;\r
3048 \r
3049                         /* RX path counter */\r
3050                         RxCount++;\r
3051 \r
3052                         /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */\r
3053                         /* EVM report is reported by stream, not path */\r
3054                         rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110;                                     /* per-path pwdb in dB domain */\r
3055                         phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, pPhyStaRpt->rxevm[RxCount - 1], \r
3056                                 pPhyStaRpt->cfo_tail[i], pPhyStaRpt->rxsnr[i], pPhyInfo);\r
3057 \r
3058                         /* search maximum pwdb */\r
3059                         if (rx_path_pwr_db > rx_pwr_db)\r
3060                                 rx_pwr_db = rx_path_pwr_db;\r
3061                 }\r
3062         }\r
3063 \r
3064         /* mapping RX counter from 1~4 to 0~3 */\r
3065         if (RxCount > 0)\r
3066                 pPhyInfo->RxCount = RxCount - 1;\r
3067         \r
3068         /* Check if MU packet or not */\r
3069         if ((pPhyStaRpt->gid != 0) && (pPhyStaRpt->gid != 63)) {\r
3070                 bMU = TRUE;\r
3071                 pDM_Odm->PhyDbgInfo.NumQryMuPkt++;\r
3072         } else\r
3073                 bMU = FALSE;\r
3074 \r
3075         /* Count BF packet */\r
3076         pDM_Odm->PhyDbgInfo.NumQryBfPkt = pDM_Odm->PhyDbgInfo.NumQryBfPkt + pPhyStaRpt->beamformed;\r
3077 \r
3078         /* Check sub-channel */\r
3079         if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0))\r
3080                 rxsc = pPhyStaRpt->l_rxsc;\r
3081         else\r
3082                 rxsc = pPhyStaRpt->ht_rxsc;\r
3083 \r
3084         /* Check RX bandwidth */\r
3085         if ((rxsc >= 1) && (rxsc <= 8))\r
3086                 bw = ODM_BW20M;\r
3087         else if ((rxsc >= 9) && (rxsc <= 12))\r
3088                 bw = ODM_BW40M;\r
3089         else if (rxsc >= 13)\r
3090                 bw = ODM_BW80M;\r
3091         else\r
3092                 bw = pPhyStaRpt->rf_mode;\r
3093 \r
3094         /* Update packet information */\r
3095         phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed,\r
3096                 bMU, bw, odm_EVMdbToPercentage(pPhyStaRpt->rxevm[0]), rxsc, pPhyInfo);\r
3097 \r
3098 /*\r
3099         //if (pPktinfo->bPacketMatchBSSID)\r
3100         {\r
3101                 DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc, pPhyStaRpt->rf_mode);\r
3102                 DbgPrint("Antidx A = %d, B = %d, C = %d, D = %d\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d);\r
3103                 DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]);\r
3104                 DbgPrint("EVM  A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1], pPhyStaRpt->rxevm[2], pPhyStaRpt->rxevm[3]);\r
3105                 DbgPrint("SNR  A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxsnr[0], pPhyStaRpt->rxsnr[1], pPhyStaRpt->rxsnr[2], pPhyStaRpt->rxsnr[3]);\r
3106                 DbgPrint("CFO  A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->cfo_tail[0], pPhyStaRpt->cfo_tail[1], pPhyStaRpt->cfo_tail[2], pPhyStaRpt->cfo_tail[3]);\r
3107                 DbgPrint("paid = %d, gid = %d, length = %d\n", (pPhyStaRpt->paid + (pPhyStaRpt->paid_msb<<8)), pPhyStaRpt->gid, pPhyStaRpt->lsig_length);\r
3108                 DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu);\r
3109                 DbgPrint("NBI: %d, pos: %d\n", pPhyStaRpt->nb_intf_flag, (pPhyStaRpt->intf_pos + (pPhyStaRpt->intf_pos_msb<<8)));\r
3110                 DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5);\r
3111         }\r
3112         DbgPrint("phydm_GetRxPhyStatusType1   pPktinfo->bPacketMatchBSSID = %d\n", pPktinfo->bPacketMatchBSSID);\r
3113         DbgPrint("pPktinfo->DataRate = 0x%x\n", pPktinfo->DataRate);\r
3114 */\r
3115 }\r
3116 \r
3117 VOID\r
3118 phydm_GetRxPhyStatusType2(\r
3119         IN              PDM_ODM_T                                               pDM_Odm,\r
3120         IN              pu1Byte                                                 pPhyStatus,\r
3121         IN              PODM_PACKET_INFO_T                              pPktinfo,\r
3122         OUT             PODM_PHY_INFO_T                         pPhyInfo\r
3123 )\r
3124 {\r
3125         PPHY_STATUS_RPT_JAGUAR2_TYPE2   pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE2)pPhyStatus;\r
3126         s1Byte                                                  rx_pwr_db = -120;\r
3127         u1Byte                                                  i, rxsc, bw, RxCount = 0;\r
3128 \r
3129         /* Update OFDM packet counter */\r
3130         pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
3131 \r
3132         /* Update per-path information */\r
3133         for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
3134                 if (pDM_Odm->RXAntStatus & BIT(i)) {\r
3135                         s1Byte  rx_path_pwr_db;\r
3136 \r
3137                         /* RX path counter */\r
3138                         RxCount++;\r
3139 \r
3140                         /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */\r
3141                         rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110;                                     /* per-path pwdb in dB domain */\r
3142                         phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, 0, 0, 0, pPhyInfo);\r
3143 \r
3144                         /* search maximum pwdb */\r
3145                         if (rx_path_pwr_db > rx_pwr_db)\r
3146                                 rx_pwr_db = rx_path_pwr_db;\r
3147                 }\r
3148         }\r
3149 \r
3150         /* mapping RX counter from 1~4 to 0~3 */\r
3151         if (RxCount > 0)\r
3152                 pPhyInfo->RxCount = RxCount - 1;\r
3153         \r
3154         /* Check RX sub-channel */\r
3155         if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0))\r
3156                 rxsc = pPhyStaRpt->l_rxsc;\r
3157         else\r
3158                 rxsc = pPhyStaRpt->ht_rxsc;\r
3159 \r
3160         /* Check RX bandwidth */\r
3161         /* the BW information of sc=0 is useless, because there is no information of RF mode*/\r
3162         if ((rxsc >= 1) && (rxsc <= 8))\r
3163                 bw = ODM_BW20M;\r
3164         else if ((rxsc >= 9) && (rxsc <= 12))\r
3165                 bw = ODM_BW40M;\r
3166         else if (rxsc >= 13)\r
3167                 bw = ODM_BW80M;\r
3168         else\r
3169                 bw = ODM_BW20M;\r
3170 \r
3171         /* Update packet information */\r
3172         phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed,\r
3173                 FALSE, bw, 0, rxsc, pPhyInfo);\r
3174 \r
3175 /*\r
3176         //if (pPktinfo->bPacketMatchBSSID)\r
3177         {\r
3178                 DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc);\r
3179                 DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]);\r
3180                 DbgPrint("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->agc_table_a, pPhyStaRpt->agc_table_b, pPhyStaRpt->agc_table_c, pPhyStaRpt->agc_table_d);\r
3181                 DbgPrint("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->gain_a, pPhyStaRpt->gain_b, pPhyStaRpt->gain_c, pPhyStaRpt->gain_d);\r
3182                 DbgPrint("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->trsw_a, pPhyStaRpt->trsw_b, pPhyStaRpt->trsw_c, pPhyStaRpt->trsw_d);\r
3183                 DbgPrint("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->aagc_step_a, pPhyStaRpt->aagc_step_b, pPhyStaRpt->aagc_step_c, pPhyStaRpt->aagc_step_d);\r
3184                 DbgPrint("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->ht_aagc_gain[0], pPhyStaRpt->ht_aagc_gain[1], pPhyStaRpt->ht_aagc_gain[2], pPhyStaRpt->ht_aagc_gain[3]);\r
3185                 DbgPrint("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->dagc_gain[0], pPhyStaRpt->dagc_gain[1], pPhyStaRpt->dagc_gain[2], pPhyStaRpt->dagc_gain[3]);\r
3186                 DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu);\r
3187                 DbgPrint("counter: %d, syn_count: %d\n", pPhyStaRpt->counter, pPhyStaRpt->syn_count);\r
3188                 DbgPrint("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", pPhyStaRpt->cnt_cca2agc_rdy, pPhyStaRpt->cnt_pw2cca, pPhyStaRpt->shift_l_map);\r
3189                 DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4);\r
3190                 DbgPrint("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", pPhyStaRpt->rsvd_5, pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7);\r
3191         }\r
3192 */\r
3193 }\r
3194 \r
3195 VOID\r
3196 phydm_GetRxPhyStatusType5(\r
3197         IN              pu1Byte                         pPhyStatus\r
3198 )\r
3199 {\r
3200 /*\r
3201         DbgPrint("DW0: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 3), *(pPhyStatus + 2), *(pPhyStatus + 1), *(pPhyStatus + 0));\r
3202         DbgPrint("DW1: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 7), *(pPhyStatus + 6), *(pPhyStatus + 5), *(pPhyStatus + 4));\r
3203         DbgPrint("DW2: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 11), *(pPhyStatus + 10), *(pPhyStatus + 9), *(pPhyStatus + 8));\r
3204         DbgPrint("DW3: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 15), *(pPhyStatus + 14), *(pPhyStatus + 13), *(pPhyStatus + 12));\r
3205         DbgPrint("DW4: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 19), *(pPhyStatus + 18), *(pPhyStatus + 17), *(pPhyStatus + 16));\r
3206         DbgPrint("DW5: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 23), *(pPhyStatus + 22), *(pPhyStatus + 21), *(pPhyStatus + 20));\r
3207         DbgPrint("DW6: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 27), *(pPhyStatus + 26), *(pPhyStatus + 25), *(pPhyStatus + 24));\r
3208 */\r
3209 }\r
3210 \r
3211 VOID\r
3212 phydm_Process_RSSIForDM_Jaguar2(        \r
3213         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
3214         IN              PODM_PHY_INFO_T                 pPhyInfo,\r
3215         IN              PODM_PACKET_INFO_T                      pPktinfo\r
3216         )\r
3217 {\r
3218         u4Byte                          UndecoratedSmoothedPWDB, RSSI_Ave;\r
3219         u1Byte                          i;\r
3220         PSTA_INFO_T                     pEntry;\r
3221 \r
3222         if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
3223                 return;\r
3224 \r
3225         pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];                                                    \r
3226 \r
3227         if (!IS_STA_VALID(pEntry))\r
3228                 return;\r
3229 \r
3230         if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
3231                 return;\r
3232 \r
3233         if (pPktinfo->bPacketBeacon)\r
3234                 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
3235         \r
3236         if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {\r
3237                 u4Byte RSSI_linear = 0;\r
3238 \r
3239                 UndecoratedSmoothedPWDB = (u4Byte)pEntry->rssi_stat.UndecoratedSmoothedPWDB;\r
3240                 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
3241                 pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
3242                 pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C];\r
3243                 pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D];\r
3244 \r
3245                 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
3246                         if (pPhyInfo->RxMIMOSignalStrength[i] != 0)\r
3247                                 RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[i]);\r
3248                 }\r
3249 \r
3250                 switch (pPhyInfo->RxCount + 1) {\r
3251                 case 2:\r
3252                         RSSI_linear = (RSSI_linear >> 1);\r
3253                         break;\r
3254                 case 3:\r
3255                         RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5;   /* RSSI_linear/3 ~ RSSI_linear*11/32 */\r
3256                         break;\r
3257                 case 4:\r
3258                         RSSI_linear = (RSSI_linear >> 2);\r
3259                         break;\r
3260                 }\r
3261                 RSSI_Ave = odm_ConvertTo_dB(RSSI_linear);\r
3262 \r
3263                 if (UndecoratedSmoothedPWDB <= 0)\r
3264                         UndecoratedSmoothedPWDB = pPhyInfo->RxPWDBAll;\r
3265                 else\r
3266                         UndecoratedSmoothedPWDB = (RSSI_Ave + ((UndecoratedSmoothedPWDB<<4) - UndecoratedSmoothedPWDB))>>4;\r
3267 \r
3268                 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
3269                 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1)\r
3270                         phydm_ra_rssi_rpt_wk(pDM_Odm);\r
3271                 #endif\r
3272 \r
3273                 pEntry->rssi_stat.UndecoratedSmoothedPWDB = (s4Byte)UndecoratedSmoothedPWDB;\r
3274         }\r
3275 }\r
3276 \r
3277 VOID\r
3278 phydm_RxPhyStatusJaguarSeries2(\r
3279         IN              PDM_ODM_T                                       pPhydm,\r
3280         IN              pu1Byte                                         pPhyStatus,\r
3281         IN              PODM_PACKET_INFO_T                      pPktinfo,\r
3282         OUT             PODM_PHY_INFO_T                 pPhyInfo\r
3283 )\r
3284 {\r
3285         u1Byte          phy_status_type = (*pPhyStatus & 0xf);\r
3286 \r
3287         /*DbgPrint("phydm_RxPhyStatusJaguarSeries2================> (page: %d)\n", phy_status_type);*/\r
3288         \r
3289         /* Memory reset */\r
3290         phydm_ResetPhyInfo(pPhydm, pPhyInfo);\r
3291 \r
3292         /* Phy status parsing */\r
3293         switch (phy_status_type) {\r
3294         case 0:\r
3295         {\r
3296                 phydm_GetRxPhyStatusType0(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
3297                 break;\r
3298         }\r
3299         case 1:\r
3300         {\r
3301                 phydm_GetRxPhyStatusType1(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
3302                 break;\r
3303         }\r
3304         case 2:\r
3305         {\r
3306                 phydm_GetRxPhyStatusType2(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
3307                 break;\r
3308         }\r
3309         case 5:\r
3310         {\r
3311                 phydm_GetRxPhyStatusType5(pPhyStatus);\r
3312                 return;\r
3313         }\r
3314         default:\r
3315                 return;\r
3316         }\r
3317 \r
3318         /* Update signal strength to UI, and pPhyInfo->RxPWDBAll is the maximum RSSI of all path */\r
3319 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
3320         pPhyInfo->SignalStrength = SignalScaleProc(pPhydm->Adapter, pPhyInfo->RxPWDBAll, FALSE, FALSE);\r
3321 #else\r
3322         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pPhydm, pPhyInfo->RxPWDBAll));\r
3323 #endif\r
3324 \r
3325         /* Calculate average RSSI and smoothed RSSI */\r
3326         phydm_Process_RSSIForDM_Jaguar2(pPhydm, pPhyInfo, pPktinfo);\r
3327 \r
3328 }\r
3329 /*==============================================*/\r
3330 #endif\r
3331 \r