net: wireless: rockchip_wlan: add rtl8188eu support
[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8188eu / include / rtl8812a_hal.h
1 /******************************************************************************\r
2  *\r
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
4  *\r
5  * This program is free software; you can redistribute it and/or modify it\r
6  * under the terms of version 2 of the GNU General Public License as\r
7  * published by the Free Software Foundation.\r
8  *\r
9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
12  * more details.\r
13  *\r
14  * You should have received a copy of the GNU General Public License along with\r
15  * this program; if not, write to the Free Software Foundation, Inc.,\r
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
17  *\r
18  *\r
19  ******************************************************************************/\r
20 #ifndef __RTL8812A_HAL_H__\r
21 #define __RTL8812A_HAL_H__\r
22 \r
23 //#include "hal_com.h"\r
24 #include "hal_data.h"\r
25 \r
26 //include HAL Related header after HAL Related compiling flags \r
27 #include "rtl8812a_spec.h"\r
28 #include "rtl8812a_rf.h"\r
29 #include "rtl8812a_dm.h"\r
30 #include "rtl8812a_recv.h"\r
31 #include "rtl8812a_xmit.h"\r
32 #include "rtl8812a_cmd.h"\r
33 #include "rtl8812a_led.h"\r
34 #include "Hal8812PwrSeq.h"\r
35 #include "Hal8821APwrSeq.h" //for 8821A/8811A\r
36 #include "Hal8812PhyReg.h"\r
37 #include "Hal8812PhyCfg.h"\r
38 #ifdef DBG_CONFIG_ERROR_DETECT\r
39 #include "rtl8812a_sreset.h"\r
40 #endif\r
41 \r
42 \r
43 //---------------------------------------------------------------------\r
44 //              RTL8812AU From header\r
45 //---------------------------------------------------------------------\r
46                 #define RTL8812_FW_IMG                                          "rtl8812a/FW_NIC.bin"\r
47                 #define RTL8812_FW_WW_IMG                               "rtl8812a/FW_WoWLAN.bin"\r
48                 #define RTL8812_PHY_REG                                 "rtl8812a/PHY_REG.txt" \r
49                 #define RTL8812_PHY_RADIO_A                             "rtl8812a/RadioA.txt"\r
50                 #define RTL8812_PHY_RADIO_B                             "rtl8812a/RadioB.txt"\r
51                 #define RTL8812_TXPWR_TRACK                             "rtl8812a/TxPowerTrack.txt"                     \r
52                 #define RTL8812_AGC_TAB                                 "rtl8812a/AGC_TAB.txt"\r
53                 #define RTL8812_PHY_MACREG                              "rtl8812a/MAC_REG.txt"\r
54                 #define RTL8812_PHY_REG_PG                                      "rtl8812a/PHY_REG_PG.txt"\r
55                 #define RTL8812_PHY_REG_MP                              "rtl8812a/PHY_REG_MP.txt" \r
56                 #define RTL8812_TXPWR_LMT                                       "rtl8812a/TXPWR_LMT.txt" \r
57                 #define RTL8812_WIFI_ANT_ISOLATION              "rtl8812a/wifi_ant_isolation.txt"\r
58 \r
59 //---------------------------------------------------------------------\r
60 //              RTL8821U From file\r
61 //---------------------------------------------------------------------\r
62                 #define RTL8821_FW_IMG                                          "rtl8821a/FW_NIC.bin"\r
63                 #define RTL8821_FW_WW_IMG                               "rtl8821a/FW_WoWLAN.bin"\r
64                 #define RTL8821_PHY_REG                                 "rtl8821a/PHY_REG.txt" \r
65                 #define RTL8821_PHY_RADIO_A                             "rtl8821a/RadioA.txt"\r
66                 #define RTL8821_PHY_RADIO_B                             "rtl8821a/RadioB.txt" \r
67                 #define RTL8821_TXPWR_TRACK                             "rtl8821a/TxPowerTrack.txt"             \r
68                 #define RTL8821_AGC_TAB                                 "rtl8821a/AGC_TAB.txt"\r
69                 #define RTL8821_PHY_MACREG                              "rtl8821a/MAC_REG.txt"\r
70                 #define RTL8821_PHY_REG_PG                                      "rtl8821a/PHY_REG_PG.txt"\r
71                 #define RTL8821_PHY_REG_MP                              "rtl8821a/PHY_REG_MP.txt"\r
72                 #define RTL8821_TXPWR_LMT                                       "rtl8821a/TXPWR_LMT.txt" \r
73 \r
74 //---------------------------------------------------------------------\r
75 //              RTL8812 Power Configuration CMDs for PCIe interface\r
76 //---------------------------------------------------------------------\r
77 #define Rtl8812_NIC_PWR_ON_FLOW                         rtl8812_power_on_flow\r
78 #define Rtl8812_NIC_RF_OFF_FLOW                         rtl8812_radio_off_flow\r
79 #define Rtl8812_NIC_DISABLE_FLOW                                rtl8812_card_disable_flow\r
80 #define Rtl8812_NIC_ENABLE_FLOW                         rtl8812_card_enable_flow\r
81 #define Rtl8812_NIC_SUSPEND_FLOW                                rtl8812_suspend_flow\r
82 #define Rtl8812_NIC_RESUME_FLOW                         rtl8812_resume_flow\r
83 #define Rtl8812_NIC_PDN_FLOW                                    rtl8812_hwpdn_flow\r
84 #define Rtl8812_NIC_LPS_ENTER_FLOW                      rtl8812_enter_lps_flow\r
85 #define Rtl8812_NIC_LPS_LEAVE_FLOW                              rtl8812_leave_lps_flow          \r
86 \r
87 //---------------------------------------------------------------------\r
88 //              RTL8821 Power Configuration CMDs for PCIe interface\r
89 //---------------------------------------------------------------------\r
90 #define Rtl8821A_NIC_PWR_ON_FLOW                                rtl8821A_power_on_flow\r
91 #define Rtl8821A_NIC_RF_OFF_FLOW                                rtl8821A_radio_off_flow\r
92 #define Rtl8821A_NIC_DISABLE_FLOW                               rtl8821A_card_disable_flow\r
93 #define Rtl8821A_NIC_ENABLE_FLOW                                rtl8821A_card_enable_flow\r
94 #define Rtl8821A_NIC_SUSPEND_FLOW                               rtl8821A_suspend_flow\r
95 #define Rtl8821A_NIC_RESUME_FLOW                                rtl8821A_resume_flow\r
96 #define Rtl8821A_NIC_PDN_FLOW                                   rtl8821A_hwpdn_flow\r
97 #define Rtl8821A_NIC_LPS_ENTER_FLOW                     rtl8821A_enter_lps_flow\r
98 #define Rtl8821A_NIC_LPS_LEAVE_FLOW                     rtl8821A_leave_lps_flow \r
99 \r
100 \r
101 #if 1 // download firmware related data structure\r
102 #define FW_SIZE_8812                    0x8000 // Compatible with RTL8723 Maximal RAM code size 24K.   modified to 32k, TO compatible with 92d maximal fw size 32k\r
103 #define FW_START_ADDRESS                0x1000\r
104 #define FW_END_ADDRESS          0x5FFF\r
105 \r
106 \r
107 \r
108 typedef struct _RT_FIRMWARE_8812 {\r
109         FIRMWARE_SOURCE eFWSource;\r
110 #ifdef CONFIG_EMBEDDED_FWIMG\r
111         u8*                     szFwBuffer;\r
112 #else\r
113         u8                      szFwBuffer[FW_SIZE_8812];\r
114 #endif\r
115         u32                     ulFwLength;\r
116 } RT_FIRMWARE_8812, *PRT_FIRMWARE_8812;\r
117 \r
118 //\r
119 // This structure must be cared byte-ordering\r
120 //\r
121 // Added by tynli. 2009.12.04.\r
122 #define IS_FW_HEADER_EXIST_8812(_pFwHdr)        ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) ==  0x9500)\r
123 \r
124 #define IS_FW_HEADER_EXIST_8821(_pFwHdr)        ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) ==  0x2100)\r
125 //=====================================================\r
126 //                                      Firmware Header(8-byte alinment required)\r
127 //=====================================================\r
128 //--- LONG WORD 0 ----\r
129 #define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr)                LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut\r
130 #define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr)         LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI\r
131 #define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr)         LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions\r
132 #define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr)          LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version\r
133 #define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr)          LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00\r
134 #define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8)              \r
135 \r
136 //--- LONG WORD 1 ----\r
137 #define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field\r
138 #define GET_FIRMWARE_HDR_DATE_8812(__FwHdr)                     LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field\r
139 #define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr)                     LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field\r
140 #define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr)           LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field\r
141 #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr)     LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code\r
142 #define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)\r
143 \r
144 //--- LONG WORD 2 ----\r
145 #define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr)          LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index\r
146 #define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)\r
147 \r
148 //--- LONG WORD 3 ----\r
149 #define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)\r
150 #define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr)                    LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)\r
151 \r
152 #endif // download firmware related data structure\r
153 \r
154 \r
155 #define DRIVER_EARLY_INT_TIME_8812              0x05\r
156 #define BCN_DMA_ATIME_INT_TIME_8812             0x02\r
157 \r
158 //for 8812\r
159 // TX 128K, RX 16K, Page size 512B for TX, 128B for RX\r
160 #define MAX_RX_DMA_BUFFER_SIZE_8812     0x3E80 /* RX 16K */\r
161 \r
162 #ifdef CONFIG_WOWLAN\r
163 #define RESV_FMWF       WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/\r
164 #else\r
165 #define RESV_FMWF       0\r
166 #endif\r
167 \r
168 #ifdef CONFIG_FW_C2H_DEBUG \r
169 #define RX_DMA_RESERVED_SIZE_8812       0x100   // 256B, reserved for c2h debug message\r
170 #else\r
171 #define RX_DMA_RESERVED_SIZE_8812       0x0     // 0B\r
172 #endif\r
173 #define RX_DMA_BOUNDARY_8812            (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1)\r
174 \r
175 #define BCNQ_PAGE_NUM_8812              0x07\r
176 \r
177 //For WoWLan , more reserved page\r
178 //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6\r
179 #ifdef CONFIG_WOWLAN\r
180 #define WOWLAN_PAGE_NUM_8812    0x05\r
181 #else\r
182 #define WOWLAN_PAGE_NUM_8812    0x00\r
183 #endif\r
184 \r
185 \r
186 #ifdef  CONFIG_BEAMFORMER_FW_NDPA\r
187 #define FW_NDPA_PAGE_NUM        0x02\r
188 #else\r
189 #define FW_NDPA_PAGE_NUM        0x00\r
190 #endif\r
191 \r
192 #define TX_TOTAL_PAGE_NUMBER_8812       (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM)\r
193 #define TX_PAGE_BOUNDARY_8812                   (TX_TOTAL_PAGE_NUMBER_8812 + 1)\r
194 \r
195 #define TX_PAGE_BOUNDARY_WOWLAN_8812            (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1)\r
196 \r
197 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812    TX_TOTAL_PAGE_NUMBER_8812\r
198 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8812                (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1)\r
199 \r
200 // For Normal Chip Setting\r
201 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812\r
202 #define NORMAL_PAGE_NUM_LPQ_8812                                0x10\r
203 #define NORMAL_PAGE_NUM_HPQ_8812                        0x10\r
204 #define NORMAL_PAGE_NUM_NPQ_8812                        0x00\r
205 \r
206 #define WMM_NORMAL_PAGE_NUM_HPQ_8812            0x30\r
207 #define WMM_NORMAL_PAGE_NUM_LPQ_8812            0x20\r
208 #define WMM_NORMAL_PAGE_NUM_NPQ_8812            0x20\r
209 \r
210 \r
211 // for 8821A\r
212 // TX 64K, RX 16K, Page size 256B for TX, 128B for RX\r
213 #define PAGE_SIZE_TX_8821A                                      256\r
214 #define PAGE_SIZE_RX_8821A                                      128\r
215 \r
216 #define MAX_RX_DMA_BUFFER_SIZE_8821                     0x3E80 /* RX 16K */\r
217 \r
218 #ifdef CONFIG_FW_C2H_DEBUG \r
219 #define RX_DMA_RESERVED_SIZE_8821       0x100   // 256B, reserved for c2h debug message\r
220 #else\r
221 #define RX_DMA_RESERVED_SIZE_8821       0x0     // 0B\r
222 #endif\r
223 #define RX_DMA_BOUNDARY_8821            (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1)\r
224 \r
225 #define BCNQ_PAGE_NUM_8821              0x08\r
226 #ifdef CONFIG_CONCURRENT_MODE\r
227 #define BCNQ1_PAGE_NUM_8821             0x04\r
228 #else\r
229 #define BCNQ1_PAGE_NUM_8821             0x00\r
230 #endif\r
231 \r
232 //For WoWLan , more reserved page\r
233 //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6\r
234 #ifdef CONFIG_WOWLAN\r
235 #define WOWLAN_PAGE_NUM_8821    0x06\r
236 #else\r
237 #define WOWLAN_PAGE_NUM_8821    0x00\r
238 #endif\r
239 \r
240 #define TX_TOTAL_PAGE_NUMBER_8821       (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821)\r
241 #define TX_PAGE_BOUNDARY_8821                           (TX_TOTAL_PAGE_NUMBER_8821 + 1)\r
242 //#define TX_PAGE_BOUNDARY_WOWLAN_8821          0xE0\r
243 \r
244 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821    TX_TOTAL_PAGE_NUMBER_8821\r
245 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8821                (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1)\r
246 \r
247 \r
248 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER\r
249 #define NORMAL_PAGE_NUM_LPQ_8821                        0x08//0x10\r
250 #define NORMAL_PAGE_NUM_HPQ_8821                0x08//0x10\r
251 #define NORMAL_PAGE_NUM_NPQ_8821                0x00\r
252 \r
253 #define WMM_NORMAL_PAGE_NUM_HPQ_8821            0x30\r
254 #define WMM_NORMAL_PAGE_NUM_LPQ_8821            0x20\r
255 #define WMM_NORMAL_PAGE_NUM_NPQ_8821            0x20\r
256 \r
257 \r
258 #define EFUSE_HIDDEN_812AU                                      0\r
259 #define EFUSE_HIDDEN_812AU_VS                           1\r
260 #define EFUSE_HIDDEN_812AU_VL                           2\r
261 #define EFUSE_HIDDEN_812AU_VN                           3\r
262 \r
263 #if 0\r
264 #define EFUSE_REAL_CONTENT_LEN_JAGUAR           1024\r
265 #define HWSET_MAX_SIZE_JAGUAR                                   1024\r
266 #else\r
267 #define EFUSE_REAL_CONTENT_LEN_JAGUAR           512\r
268 #define HWSET_MAX_SIZE_JAGUAR                                   512\r
269 #endif\r
270 \r
271 #define EFUSE_MAX_BANK_8812A                                    2\r
272 #define EFUSE_MAP_LEN_JAGUAR                                    512\r
273 #define EFUSE_MAX_SECTION_JAGUAR                                64\r
274 #define EFUSE_MAX_WORD_UNIT_JAGUAR                      4\r
275 #define EFUSE_IC_ID_OFFSET_JAGUAR                               506     //For some inferiority IC purpose. added by Roger, 2009.09.02.\r
276 #define AVAILABLE_EFUSE_ADDR_8812(addr)         (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)\r
277 // <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section\r
278 // 9bytes + 1byt + 5bytes and pre 1byte.\r
279 // For worst case:\r
280 // | 2byte|----8bytes----|1byte|--7bytes--| //92D\r
281 #define EFUSE_OOB_PROTECT_BYTES_JAGUAR          18      // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.\r
282 #define EFUSE_PROTECT_BYTES_BANK_JAGUAR         16\r
283 // Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09.\r
284 typedef enum _TX_PWR_PERCENTAGE{\r
285         TX_PWR_PERCENTAGE_0 = 0x01, // 12.5%\r
286         TX_PWR_PERCENTAGE_1 = 0x02, // 25%\r
287         TX_PWR_PERCENTAGE_2 = 0x04, // 50%\r
288         TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power.        \r
289 } TX_PWR_PERCENTAGE;\r
290 \r
291 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)\r
292 #define INCLUDE_MULTI_FUNC_GPS(_Adapter)        (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)\r
293 \r
294 //#define IS_MULTI_FUNC_CHIP(_Adapter)  (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)\r
295 \r
296 //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )\r
297 \r
298 // rtl8812_hal_init.c\r
299 void    _8051Reset8812(PADAPTER padapter);\r
300 s32     FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);\r
301 void    InitializeFirmwareVars8812(PADAPTER padapter);\r
302 \r
303 s32     _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data);\r
304 s32     InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy);\r
305 void InitRDGSetting8812A(PADAPTER padapter);\r
306 \r
307 void CheckAutoloadState8812A(PADAPTER padapter);\r
308 \r
309 // EFuse\r
310 u8      GetEEPROMSize8812A(PADAPTER padapter);\r
311 void InitPGData8812A(PADAPTER padapter);\r
312 void    Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo);\r
313 void    Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
314 void    Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN  AutoLoadFail);\r
315 void    Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail);\r
316 void    Hal_ReadThermalMeter_8812A(PADAPTER     Adapter, u8* PROMContent,BOOLEAN        AutoloadFail);\r
317 void    Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
318 void    Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail);\r
319 void    Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);\r
320 void    Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail);\r
321 void    Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
322 void    Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
323 void    Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
324 void    Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);\r
325 void    hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);\r
326 int     FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware);\r
327 void    Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail);\r
328 \r
329 BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter);\r
330 void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);\r
331         \r
332 #ifdef CONFIG_WOWLAN\r
333 void Hal_DetectWoWMode(PADAPTER pAdapter);\r
334 #endif //CONFIG_WOWLAN\r
335 \r
336 void _InitBeaconParameters_8812A(PADAPTER padapter);\r
337 void SetBeaconRelatedRegisters8812A(PADAPTER padapter);\r
338 \r
339 void ReadRFType8812A(PADAPTER padapter);\r
340 void InitDefaultValue8821A(PADAPTER padapter);\r
341 \r
342 void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);\r
343 void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);\r
344 u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);\r
345 u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);\r
346 s32 c2h_id_filter_ccx_8812a(u8 *buf);\r
347 void rtl8812_set_hal_ops(struct hal_ops *pHalFunc);\r
348 void init_hal_spec_8812a(_adapter *adapter);\r
349 void init_hal_spec_8821a(_adapter *adapter);\r
350 \r
351 // register\r
352 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);\r
353 \r
354 void rtl8812_start_thread(PADAPTER padapter);\r
355 void rtl8812_stop_thread(PADAPTER padapter);\r
356 \r
357 #ifdef CONFIG_PCI_HCI\r
358 BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter);\r
359 VOID    UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);\r
360 #endif\r
361 \r
362 #ifdef CONFIG_BT_COEXIST\r
363 void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter);\r
364 #endif\r
365 \r
366 VOID\r
367 Hal_PatchwithJaguar_8812(\r
368         IN PADAPTER                             Adapter,\r
369         IN RT_MEDIA_STATUS              MediaStatus\r
370         );\r
371 \r
372 #endif //__RTL8188E_HAL_H__\r
373 \r