drivers/net/wireless/rockchip_wlan/rtl8188eu/include/rtl8192c_hal.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTL8192C_HAL_H__
  21 #define __RTL8192C_HAL_H__
  22
  23 //#include "hal_com.h"
  24
  25 #if 1
  26 #include "hal_data.h"
  27 #else
  28 #include "../hal/OUTSRC/odm_precomp.h"
  29 #endif
  30
  31
  32 #include "drv_types.h"
  33 #include "rtl8192c_spec.h"
  34 #include "Hal8192CPhyReg.h"
  35 #include "Hal8192CPhyCfg.h"
  36 #include "rtl8192c_rf.h"
  37 #include "rtl8192c_dm.h"
  38 #include "rtl8192c_recv.h"
  39 #include "rtl8192c_xmit.h"
  40 #include "rtl8192c_cmd.h"
  41 #include "rtl8192c_led.h"
  42 #ifdef DBG_CONFIG_ERROR_DETECT
  43 #include "rtl8192c_sreset.h"
  44 #endif
  45
  46
  47 #ifdef CONFIG_PCI_HCI
  48
  49         #define RTL819X_DEFAULT_RF_TYPE                 RF_2T2R
  50         //#define RTL819X_DEFAULT_RF_TYPE                       RF_1T2R
  51         #define RTL819X_TOTAL_RF_PATH                           2
  52
  53         //2TODO:  The following need to check!!
  54         #define RTL8192C_FW_TSMC_IMG                            "rtl8192CE\\rtl8192cfwT.bin"
  55         #define RTL8192C_FW_UMC_IMG                             "rtl8192CE\\rtl8192cfwU.bin"
  56         #define RTL8192C_FW_UMC_B_IMG                           "rtl8192CE\\rtl8192cfwU_B.bin"
  57
  58         #define RTL8188C_PHY_REG                                        "rtl8192CE\\PHY_REG_1T.txt"
  59         #define RTL8188C_PHY_RADIO_A                            "rtl8192CE\\radio_a_1T.txt"
  60         #define RTL8188C_PHY_RADIO_B                            "rtl8192CE\\radio_b_1T.txt"
  61         #define RTL8188C_AGC_TAB                                        "rtl8192CE\\AGC_TAB_1T.txt"
  62         #define RTL8188C_PHY_MACREG                             "rtl8192CE\\MACREG_1T.txt"
  63
  64         #define RTL8192C_PHY_REG                                        "rtl8192CE\\PHY_REG_2T.txt"
  65         #define RTL8192C_PHY_RADIO_A                            "rtl8192CE\\radio_a_2T.txt"
  66         #define RTL8192C_PHY_RADIO_B                            "rtl8192CE\\radio_b_2T.txt"
  67         #define RTL8192C_AGC_TAB                                        "rtl8192CE\\AGC_TAB_2T.txt"
  68         #define RTL8192C_PHY_MACREG                             "rtl8192CE\\MACREG_2T.txt"
  69
  70         #define RTL819X_PHY_MACPHY_REG                  "rtl8192CE\\MACPHY_reg.txt"
  71         #define RTL819X_PHY_MACPHY_REG_PG               "rtl8192CE\\MACPHY_reg_PG.txt"
  72         #define RTL819X_PHY_MACREG                              "rtl8192CE\\MAC_REG.txt"
  73         #define RTL819X_PHY_REG                                 "rtl8192CE\\PHY_REG.txt"
  74         #define RTL819X_PHY_REG_1T2R                            "rtl8192CE\\PHY_REG_1T2R.txt"
  75         #define RTL819X_PHY_REG_to1T1R                          "rtl8192CE\\phy_to1T1R_a.txt"
  76         #define RTL819X_PHY_REG_to1T2R                          "rtl8192CE\\phy_to1T2R.txt"
  77         #define RTL819X_PHY_REG_to2T2R                          "rtl8192CE\\phy_to2T2R.txt"
  78         #define RTL819X_PHY_REG_PG                                      "rtl8192CE\\PHY_REG_PG.txt"
  79         #define RTL819X_AGC_TAB                                 "rtl8192CE\\AGC_TAB.txt"
  80         #define RTL819X_PHY_RADIO_A                             "rtl8192CE\\radio_a.txt"
  81         #define RTL819X_PHY_RADIO_A_1T                  "rtl8192CE\\radio_a_1t.txt"
  82         #define RTL819X_PHY_RADIO_A_2T                  "rtl8192CE\\radio_a_2t.txt"
  83         #define RTL819X_PHY_RADIO_B                             "rtl8192CE\\radio_b.txt"
  84         #define RTL819X_PHY_RADIO_B_GM                  "rtl8192CE\\radio_b_gm.txt"
  85         #define RTL819X_PHY_RADIO_C                             "rtl8192CE\\radio_c.txt"
  86         #define RTL819X_PHY_RADIO_D                             "rtl8192CE\\radio_d.txt"
  87         #define RTL819X_EEPROM_MAP                              "rtl8192CE\\8192ce.map"
  88         #define RTL819X_EFUSE_MAP                                       "rtl8192CE\\8192ce.map"
  89
  90 //---------------------------------------------------------------------
  91 //              RTL8723E From file
  92 //---------------------------------------------------------------------
  93
  94         // The file name "_2T" is for 92CE, "_1T"  is for 88CE. Modified by tynli. 2009.11.24.
  95         #define Rtl819XFwTSMCImageArray                 Rtl8192CEFwTSMCImgArray
  96         #define Rtl819XFwUMCACutImageArray                      Rtl8192CEFwUMCACutImgArray
  97         #define Rtl819XFwUMCBCutImageArray                      Rtl8192CEFwUMCBCutImgArray
  98
  99 //      #define Rtl8723FwUMCImageArray                          Rtl8192CEFwUMC8723ImgArray
 100         #define Rtl819XMAC_Array                                        Rtl8192CEMAC_2T_Array
 101         #define Rtl819XAGCTAB_2TArray                           Rtl8192CEAGCTAB_2TArray
 102         #define Rtl819XAGCTAB_1TArray                           Rtl8192CEAGCTAB_1TArray
 103         #define Rtl819XPHY_REG_2TArray                          Rtl8192CEPHY_REG_2TArray
 104         #define Rtl819XPHY_REG_1TArray                          Rtl8192CEPHY_REG_1TArray
 105         #define Rtl819XRadioA_2TArray                           Rtl8192CERadioA_2TArray
 106         #define Rtl819XRadioA_1TArray                           Rtl8192CERadioA_1TArray
 107         #define Rtl819XRadioB_2TArray                           Rtl8192CERadioB_2TArray
 108         #define Rtl819XRadioB_1TArray                           Rtl8192CERadioB_1TArray
 109         #define Rtl819XPHY_REG_Array_PG                         Rtl8192CEPHY_REG_Array_PG
 110         #define Rtl819XPHY_REG_Array_MP                         Rtl8192CEPHY_REG_Array_MP
 111
 112         #define PHY_REG_2TArrayLength                           Rtl8192CEPHY_REG_2TArrayLength
 113         #define PHY_REG_1TArrayLength                           Rtl8192CEPHY_REG_1TArrayLength
 114         #define PHY_ChangeTo_1T1RArrayLength            Rtl8192CEPHY_ChangeTo_1T1RArrayLength
 115         #define PHY_ChangeTo_1T2RArrayLength            Rtl8192CEPHY_ChangeTo_1T2RArrayLength
 116         #define PHY_ChangeTo_2T2RArrayLength            Rtl8192CEPHY_ChangeTo_2T2RArrayLength
 117         #define PHY_REG_Array_PGLength                          Rtl8192CEPHY_REG_Array_PGLength
 118         //#define PHY_REG_Array_PG_mCardLength          Rtl8192CEPHY_REG_Array_PG_mCardLength
 119         #define PHY_REG_Array_MPLength                  Rtl8192CEPHY_REG_Array_MPLength
 120         #define PHY_REG_Array_MPLength                  Rtl8192CEPHY_REG_Array_MPLength
 121         //#define PHY_REG_1T_mCardArrayLength           Rtl8192CEPHY_REG_1T_mCardArrayLength
 122         //#define PHY_REG_2T_mCardArrayLength           Rtl8192CEPHY_REG_2T_mCardArrayLength
 123         //#define PHY_REG_Array_PG_HPLength                     Rtl8192CEPHY_REG_Array_PG_HPLength
 124         #define RadioA_2TArrayLength                            Rtl8192CERadioA_2TArrayLength
 125         #define RadioB_2TArrayLength                            Rtl8192CERadioB_2TArrayLength
 126         #define RadioA_1TArrayLength                            Rtl8192CERadioA_1TArrayLength
 127         #define RadioB_1TArrayLength                            Rtl8192CERadioB_1TArrayLength
 128         //#define RadioA_1T_mCardArrayLength                    Rtl8192CERadioA_1T_mCardArrayLength
 129         //#define RadioB_1T_mCardArrayLength                    Rtl8192CERadioB_1T_mCardArrayLength
 130         //#define RadioA_1T_HPArrayLength                               Rtl8192CERadioA_1T_HPArrayLength
 131         #define RadioB_GM_ArrayLength                           Rtl8192CERadioB_GM_ArrayLength
 132         #define MAC_2T_ArrayLength                                      Rtl8192CEMAC_2T_ArrayLength
 133         #define MACPHY_Array_PGLength                           Rtl8192CEMACPHY_Array_PGLength
 134         #define AGCTAB_2TArrayLength                            Rtl8192CEAGCTAB_2TArrayLength
 135         #define AGCTAB_1TArrayLength                            Rtl8192CEAGCTAB_1TArrayLength
 136         //#define AGCTAB_1T_HPArrayLength                       Rtl8192CEAGCTAB_1T_HPArrayLength
 137
 138 #elif defined(CONFIG_USB_HCI)
 139
 140
 141         //2TODO: We should define 8192S firmware related macro settings here!!
 142         #define RTL819X_DEFAULT_RF_TYPE                 RF_1T2R
 143         #define RTL819X_TOTAL_RF_PATH                           2
 144
 145         //TODO:  The following need to check!!
 146         #define RTL8192C_FW_TSMC_IMG                            "rtl8192CU\\rtl8192cfwT.bin"
 147         #define RTL8192C_FW_UMC_IMG                             "rtl8192CU\\rtl8192cfwU.bin"
 148         #define RTL8192C_FW_UMC_B_IMG                           "rtl8192CU\\rtl8192cfwU_B.bin"
 149
 150         //#define RTL819X_FW_BOOT_IMG                                   "rtl8192CU\\boot.img"
 151         //#define RTL819X_FW_MAIN_IMG                           "rtl8192CU\\main.img"
 152         //#define RTL819X_FW_DATA_IMG                           "rtl8192CU\\data.img"
 153
 154         #define RTL8188C_PHY_REG                                        "rtl8188CU\\PHY_REG.txt"
 155         #define RTL8188C_PHY_RADIO_A                            "rtl8188CU\\radio_a.txt"
 156         #define RTL8188C_PHY_RADIO_B                            "rtl8188CU\\radio_b.txt"
 157         #define RTL8188C_PHY_RADIO_A_mCard              "rtl8192CU\\radio_a_1T_mCard.txt"
 158         #define RTL8188C_PHY_RADIO_B_mCard              "rtl8192CU\\radio_b_1T_mCard.txt"
 159         #define RTL8188C_PHY_RADIO_A_HP                 "rtl8192CU\\radio_a_1T_HP.txt"
 160         #define RTL8188C_AGC_TAB                                        "rtl8188CU\\AGC_TAB.txt"
 161         #define RTL8188C_PHY_MACREG                             "rtl8188CU\\MACREG.txt"
 162
 163         #define RTL8192C_PHY_REG                                        "rtl8192CU\\PHY_REG.txt"
 164         #define RTL8192C_PHY_RADIO_A                            "rtl8192CU\\radio_a.txt"
 165         #define RTL8192C_PHY_RADIO_B                            "rtl8192CU\\radio_b.txt"
 166         #define RTL8192C_AGC_TAB                                        "rtl8192CU\\AGC_TAB.txt"
 167         #define RTL8192C_PHY_MACREG                             "rtl8192CU\\MACREG.txt"
 168
 169         #define RTL819X_PHY_REG_PG                                      "rtl8192CU\\PHY_REG_PG.txt"
 170
 171 //---------------------------------------------------------------------
 172 //              RTL8723U From file
 173 //---------------------------------------------------------------------
 174
 175         // The file name "_2T" is for 92CU, "_1T"  is for 88CU. Modified by tynli. 2009.11.24.
 176         #define Rtl819XFwImageArray                                     Rtl8192CUFwTSMCImgArray
 177         #define Rtl819XFwTSMCImageArray                 Rtl8192CUFwTSMCImgArray
 178         #define Rtl819XFwUMCACutImageArray                      Rtl8192CUFwUMCACutImgArray
 179         #define Rtl819XFwUMCBCutImageArray                      Rtl8192CUFwUMCBCutImgArray
 180
 181         #define Rtl819XMAC_Array                                        Rtl8192CUMAC_2T_Array
 182         #define Rtl819XAGCTAB_2TArray                           Rtl8192CUAGCTAB_2TArray
 183         #define Rtl819XAGCTAB_1TArray                           Rtl8192CUAGCTAB_1TArray
 184         #define Rtl819XAGCTAB_1T_HPArray                        Rtl8192CUAGCTAB_1T_HPArray
 185         #define Rtl819XPHY_REG_2TArray                          Rtl8192CUPHY_REG_2TArray
 186         #define Rtl819XPHY_REG_1TArray                          Rtl8192CUPHY_REG_1TArray
 187         #define Rtl819XPHY_REG_1T_mCardArray            Rtl8192CUPHY_REG_1T_mCardArray
 188         #define Rtl819XPHY_REG_2T_mCardArray            Rtl8192CUPHY_REG_2T_mCardArray
 189         #define Rtl819XPHY_REG_1T_HPArray                       Rtl8192CUPHY_REG_1T_HPArray
 190         #define Rtl819XRadioA_2TArray                           Rtl8192CURadioA_2TArray
 191         #define Rtl819XRadioA_1TArray                           Rtl8192CURadioA_1TArray
 192         #define Rtl819XRadioA_1T_mCardArray                     Rtl8192CURadioA_1T_mCardArray
 193         #define Rtl819XRadioB_2TArray                           Rtl8192CURadioB_2TArray
 194         #define Rtl819XRadioB_1TArray                           Rtl8192CURadioB_1TArray
 195         #define Rtl819XRadioB_1T_mCardArray                     Rtl8192CURadioB_1T_mCardArray
 196         #define Rtl819XRadioA_1T_HPArray                        Rtl8192CURadioA_1T_HPArray
 197         #define Rtl819XPHY_REG_Array_PG                         Rtl8192CUPHY_REG_Array_PG
 198         #define Rtl819XPHY_REG_Array_PG_mCard           Rtl8192CUPHY_REG_Array_PG_mCard
 199         #define Rtl819XPHY_REG_Array_PG_HP                      Rtl8192CUPHY_REG_Array_PG_HP
 200         #define Rtl819XPHY_REG_Array_MP                         Rtl8192CUPHY_REG_Array_MP
 201
 202         #define PHY_REG_2TArrayLength                           Rtl8192CUPHY_REG_2TArrayLength
 203         #define PHY_REG_1TArrayLength                           Rtl8192CUPHY_REG_1TArrayLength
 204         #define PHY_ChangeTo_1T1RArrayLength            Rtl8192CUPHY_ChangeTo_1T1RArrayLength
 205         #define PHY_ChangeTo_1T2RArrayLength            Rtl8192CUPHY_ChangeTo_1T2RArrayLength
 206         #define PHY_ChangeTo_2T2RArrayLength            Rtl8192CUPHY_ChangeTo_2T2RArrayLength
 207         #define PHY_REG_Array_PGLength                          Rtl8192CUPHY_REG_Array_PGLength
 208         #define PHY_REG_Array_PG_mCardLength            Rtl8192CUPHY_REG_Array_PG_mCardLength
 209         #define PHY_REG_Array_MPLength                  Rtl8192CUPHY_REG_Array_MPLength
 210         #define PHY_REG_Array_MPLength                  Rtl8192CUPHY_REG_Array_MPLength
 211         #define PHY_REG_1T_mCardArrayLength             Rtl8192CUPHY_REG_1T_mCardArrayLength
 212         #define PHY_REG_2T_mCardArrayLength             Rtl8192CUPHY_REG_2T_mCardArrayLength
 213         #define PHY_REG_Array_PG_HPLength                       Rtl8192CUPHY_REG_Array_PG_HPLength
 214         #define RadioA_2TArrayLength                            Rtl8192CURadioA_2TArrayLength
 215         #define RadioB_2TArrayLength                            Rtl8192CURadioB_2TArrayLength
 216         #define RadioA_1TArrayLength                            Rtl8192CURadioA_1TArrayLength
 217         #define RadioB_1TArrayLength                            Rtl8192CURadioB_1TArrayLength
 218         #define RadioA_1T_mCardArrayLength                      Rtl8192CURadioA_1T_mCardArrayLength
 219         #define RadioB_1T_mCardArrayLength                      Rtl8192CURadioB_1T_mCardArrayLength
 220         #define RadioA_1T_HPArrayLength                                 Rtl8192CURadioA_1T_HPArrayLength
 221         #define RadioB_GM_ArrayLength                           Rtl8192CURadioB_GM_ArrayLength
 222         #define MAC_2T_ArrayLength                                      Rtl8192CUMAC_2T_ArrayLength
 223         #define MACPHY_Array_PGLength                           Rtl8192CUMACPHY_Array_PGLength
 224         #define AGCTAB_2TArrayLength                            Rtl8192CUAGCTAB_2TArrayLength
 225         #define AGCTAB_1TArrayLength                            Rtl8192CUAGCTAB_1TArrayLength
 226         #define AGCTAB_1T_HPArrayLength                         Rtl8192CUAGCTAB_1T_HPArrayLength
 227         #define PHY_REG_1T_HPArrayLength                        Rtl8192CUPHY_REG_1T_HPArrayLength
 228
 229 #endif
 230
 231 #define FW_8192C_SIZE                                   16384+32//16k
 232 #define FW_8192C_START_ADDRESS          0x1000
 233 //#define FW_8192C_END_ADDRESS          0x3FFF //Filen said this is for test chip
 234 #define FW_8192C_END_ADDRESS            0x1FFF
 235
 236 #define IS_FW_HEADER_EXIST_92C(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
 237                                                                         (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
 238                                                                         (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)
 239
 240
 241 typedef struct _RT_FIRMWARE_8192C{
 242         FIRMWARE_SOURCE eFWSource;
 243         u8*                     szFwBuffer;
 244         u32                     ulFwLength;
 245 } RT_FIRMWARE_8192C, *PRT_FIRMWARE_8192C;
 246
 247 //
 248 // This structure must be cared byte-ordering
 249 //
 250 // Added by tynli. 2009.12.04.
 251 typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required
 252
 253         //--- LONG WORD 0 ----
 254         u16             Signature;      // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
 255         u8              Category;       // AP/NIC and USB/PCI
 256         u8              Function;       // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
 257         u16             Version;                // FW Version
 258         u8              Subversion;     // FW Subversion, default 0x00
 259         u16             Rsvd1;
 260
 261
 262         //--- LONG WORD 1 ----
 263         u8              Month;  // Release time Month field
 264         u8              Date;   // Release time Date field
 265         u8              Hour;   // Release time Hour field
 266         u8              Minute; // Release time Minute field
 267         u16             RamCodeSize;    // The size of RAM code
 268         u16             Rsvd2;
 269
 270         //--- LONG WORD 2 ----
 271         u32             SvnIdx; // The SVN entry index
 272         u32             Rsvd3;
 273
 274         //--- LONG WORD 3 ----
 275         u32             Rsvd4;
 276         u32             Rsvd5;
 277
 278 }RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR;
 279
 280 #define DRIVER_EARLY_INT_TIME_8192C             0x05
 281 #define BCN_DMA_ATIME_INT_TIME_8192C            0x02
 282
 283
 284
 285 // Note: We will divide number of page equally for each queue other than public queue!
 286
 287 #define TX_TOTAL_PAGE_NUMBER_8192C              0xF8
 288 #define TX_PAGE_BOUNDARY                (TX_TOTAL_PAGE_NUMBER_8192C + 1)
 289
 290 // For Normal Chip Setting
 291 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192C
 292 #define NORMAL_PAGE_NUM_PUBQ                    0xE7
 293 #define NORMAL_PAGE_NUM_HPQ                     0x0C
 294 #define NORMAL_PAGE_NUM_LPQ                     0x02
 295 #define NORMAL_PAGE_NUM_NPQ                     0x02
 296
 297
 298 // For Test Chip Setting
 299 // (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192C
 300 #define TEST_PAGE_NUM_PUBQ              0x7E
 301
 302
 303 // For Test Chip Setting
 304 #define WMM_TEST_TX_TOTAL_PAGE_NUMBER   0xF5
 305 #define WMM_TEST_TX_PAGE_BOUNDARY       (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
 306
 307 #define WMM_TEST_PAGE_NUM_PUBQ          0xA3
 308 #define WMM_TEST_PAGE_NUM_HPQ           0x29
 309 #define WMM_TEST_PAGE_NUM_LPQ           0x29
 310
 311
 312 //Note: For Normal Chip Setting ,modify later
 313 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5
 314 #define WMM_NORMAL_TX_PAGE_BOUNDARY     (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
 315
 316 #define WMM_NORMAL_PAGE_NUM_PUBQ                0xB0
 317 #define WMM_NORMAL_PAGE_NUM_HPQ         0x29
 318 #define WMM_NORMAL_PAGE_NUM_LPQ                 0x1C
 319 #define WMM_NORMAL_PAGE_NUM_NPQ         0x1C
 320
 321 //-------------------------------------------------------------------------
 322 //      Chip specific
 323 //-------------------------------------------------------------------------
 324 #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
 325 #define CHIP_BONDING_92C_1T2R   0x1
 326 #define CHIP_BONDING_88C_USB_MCARD      0x2
 327 #define CHIP_BONDING_88C_USB_HP 0x1
 328
 329 //-------------------------------------------------------------------------
 330 //      Channel Plan
 331 //-------------------------------------------------------------------------
 332
 333 #define         EFUSE_REAL_CONTENT_LEN          512
 334 #define         EFUSE_MAP_LEN                                   128
 335 #define         EFUSE_MAX_SECTION                       16
 336 #define         EFUSE_IC_ID_OFFSET                      506     //For some inferiority IC purpose. added by Roger, 2009.09.02.
 337 #define                 AVAILABLE_EFUSE_ADDR(addr)      (addr < EFUSE_REAL_CONTENT_LEN)
 338 //
 339 // <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
 340 // 9bytes + 1byt + 5bytes and pre 1byte.
 341 // For worst case:
 342 // | 1byte|----8bytes----|1byte|--5bytes--|
 343 // |         |            Reserved(14bytes)           |
 344 //
 345 #define         EFUSE_OOB_PROTECT_BYTES                 15      // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
 346
 347
 348 #define         EFUSE_MAP_LEN_8723                      256
 349 #define         EFUSE_MAX_SECTION_8723          32
 350
 351 //========================================================
 352 //                      EFUSE for BT definition
 353 //========================================================
 354 #define         EFUSE_BT_REAL_CONTENT_LEN               1536    // 512*3
 355 #define         EFUSE_BT_MAP_LEN                                        1024    // 1k bytes
 356 #define         EFUSE_BT_MAX_SECTION                            128             // 1024/8
 357
 358 #define         EFUSE_PROTECT_BYTES_BANK                        16
 359 enum c2h_id_8192c {
 360         C2H_DBG = 0,
 361         C2H_TSF = 1,
 362         C2H_AP_RPT_RSP = 2,
 363         C2H_CCX_TX_RPT = 3,
 364         C2H_BT_RSSI = 4,
 365         C2H_BT_OP_MODE = 5,
 366         C2H_EXT_RA_RPT = 6,
 367         C2H_HW_INFO_EXCH = 10,
 368         C2H_C2H_H2C_TEST = 11,
 369         C2H_BT_INFO = 12,
 370         C2H_BT_MP_INFO = 15,
 371         MAX_C2HEVENT
 372 };
 373
 374 #ifdef CONFIG_PCI_HCI
 375
 376 //
 377 // Function disabled.
 378 //
 379 #define DF_TX_BIT               BIT0
 380 #define DF_RX_BIT               BIT1
 381 #define DF_IO_BIT               BIT2
 382 #define DF_IO_D3_BIT                    BIT3
 383
 384 #define RT_DF_TYPE              u32
 385 //#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
 386 //#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
 387 //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
 388 #define IS_MULTI_FUNC_CHIP(_Adapter)    (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
 389
 390 void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
 391 VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
 392 #endif
 393
 394 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
 395 #define INCLUDE_MULTI_FUNC_GPS(_Adapter)        (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
 396
 397 VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter);
 398 int FirmwareDownload92C(IN PADAPTER Adapter);
 399 VOID InitializeFirmwareVars92C(PADAPTER Adapter);
 400 u8 GetEEPROMSize8192C(PADAPTER Adapter);
 401 void rtl8192c_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
 402
 403 HAL_VERSION rtl8192c_ReadChipVersion(IN PADAPTER Adapter);
 404 void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
 405 //void rtl8192c_free_hal_data(_adapter * padapter);
 406 VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo);
 407 void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc);
 408
 409 s32 c2h_id_filter_ccx_8192c(u8 *buf);
 410
 411 void SetHwReg8192C(PADAPTER padapter, u8 variable, u8 *val);
 412 void GetHwReg8192C(PADAPTER padapter, u8 variable, u8 *val);
 413
 414 #endif
 415