drivers/net/wireless/rockchip_wlan/rtl8188eu/include/Hal8188EPhyCfg.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *\r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 #ifndef __INC_HAL8188EPHYCFG_H__\r
  21 #define __INC_HAL8188EPHYCFG_H__\r
  22 \r
  23 \r
  24 /*--------------------------Define Parameters-------------------------------*/\r
  25 #define LOOP_LIMIT                              5\r
  26 #define MAX_STALL_TIME                  50              //us\r
  27 #define AntennaDiversityValue           0x80    //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)\r
  28 #define MAX_TXPWR_IDX_NMODE_92S 63\r
  29 #define Reset_Cnt_Limit                 3\r
  30 \r
  31 #ifdef CONFIG_PCI_HCI\r
  32 #define MAX_AGGR_NUM    0x0B\r
  33 #else\r
  34 #define MAX_AGGR_NUM    0x07\r
  35 #endif // CONFIG_PCI_HCI\r
  36 \r
  37 \r
  38 /*--------------------------Define Parameters-------------------------------*/\r
  39 \r
  40 \r
  41 /*------------------------------Define structure----------------------------*/ \r
  42 \r
  43 #define MAX_TX_COUNT_8188E                      1\r
  44 \r
  45 /* BB/RF related */\r
  46 \r
  47 \r
  48 /*------------------------------Define structure----------------------------*/ \r
  49 \r
  50 \r
  51 /*------------------------Export global variable----------------------------*/\r
  52 /*------------------------Export global variable----------------------------*/\r
  53 \r
  54 \r
  55 /*------------------------Export Marco Definition---------------------------*/\r
  56 /*------------------------Export Marco Definition---------------------------*/\r
  57 \r
  58 \r
  59 /*--------------------------Exported Function prototype---------------------*/\r
  60 //\r
  61 // BB and RF register read/write\r
  62 //\r
  63 u32     PHY_QueryBBReg8188E(    IN      PADAPTER        Adapter,\r
  64                                                                 IN      u32             RegAddr,\r
  65                                                                 IN      u32             BitMask );\r
  66 void    PHY_SetBBReg8188E(      IN      PADAPTER        Adapter,\r
  67                                                                 IN      u32             RegAddr,\r
  68                                                                 IN      u32             BitMask,\r
  69                                                                 IN      u32             Data    );\r
  70 u32     PHY_QueryRFReg8188E(    IN      PADAPTER        Adapter,\r
  71                                                                 IN      u8                              eRFPath,\r
  72                                                                 IN      u32                             RegAddr,\r
  73                                                                 IN      u32                             BitMask );\r
  74 void    PHY_SetRFReg8188E(      IN      PADAPTER                Adapter,\r
  75                                                                 IN      u8                              eRFPath,\r
  76                                                                 IN      u32                             RegAddr,\r
  77                                                                 IN      u32                             BitMask,\r
  78                                                                 IN      u32                             Data    );\r
  79 \r
  80 //\r
  81 // Initialization related function\r
  82 //\r
  83 /* MAC/BB/RF HAL config */\r
  84 int     PHY_MACConfig8188E(IN   PADAPTER        Adapter );\r
  85 int     PHY_BBConfig8188E(IN    PADAPTER        Adapter );\r
  86 int     PHY_RFConfig8188E(IN    PADAPTER        Adapter );\r
  87 \r
  88 /* RF config */\r
  89 int     rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath);\r
  90 \r
  91 //\r
  92 // RF Power setting\r
  93 //\r
  94 //extern        BOOLEAN PHY_SetRFPowerState(IN  PADAPTER                        Adapter, \r
  95 //                                                                      IN      RT_RF_POWER_STATE       eRFPowerState);\r
  96 \r
  97 //\r
  98 // BB TX Power R/W\r
  99 //\r
 100 void    PHY_GetTxPowerLevel8188E(       IN      PADAPTER                Adapter,\r
 101                                                                                         OUT s32*                powerlevel      );\r
 102 void    PHY_SetTxPowerLevel8188E(       IN      PADAPTER                Adapter,\r
 103                                                                                         IN      u8                      channel );\r
 104 BOOLEAN PHY_UpdateTxPowerDbm8188E(      IN      PADAPTER        Adapter,\r
 105                                                                                         IN      int             powerInDbm      );\r
 106 \r
 107 VOID\r
 108 PHY_SetTxPowerIndex_8188E(\r
 109         IN      PADAPTER                        Adapter,\r
 110         IN      u32                                     PowerIndex,\r
 111         IN      u8                                      RFPath, \r
 112         IN      u8                                      Rate\r
 113         );\r
 114 \r
 115 u8\r
 116 PHY_GetTxPowerIndex_8188E(\r
 117         IN      PADAPTER                pAdapter,\r
 118         IN      u8                              RFPath,\r
 119         IN      u8                              Rate,   \r
 120         IN      CHANNEL_WIDTH   BandWidth,      \r
 121         IN      u8                              Channel\r
 122         );\r
 123 \r
 124 //\r
 125 // Switch bandwidth for 8192S\r
 126 //\r
 127 //extern        void    PHY_SetBWModeCallback8192C(     IN      PRT_TIMER               pTimer  );\r
 128 void    PHY_SetBWMode8188E(     IN      PADAPTER                        pAdapter,\r
 129                                                                         IN      CHANNEL_WIDTH   ChnlWidth,\r
 130                                                                         IN      unsigned char   Offset  );\r
 131 \r
 132 //\r
 133 // Set FW CMD IO for 8192S.\r
 134 //\r
 135 //extern        BOOLEAN HalSetIO8192C(  IN      PADAPTER                        Adapter,\r
 136 //                                                                      IN      IO_TYPE                         IOType);\r
 137 \r
 138 //\r
 139 // Set A2 entry to fw for 8192S\r
 140 //\r
 141 extern  void FillA2Entry8192C(          IN      PADAPTER                        Adapter,\r
 142                                                                                 IN      u8                              index,\r
 143                                                                                 IN      u8*                             val);\r
 144 \r
 145 \r
 146 //\r
 147 // channel switch related funciton\r
 148 //\r
 149 //extern        void    PHY_SwChnlCallback8192C(        IN      PRT_TIMER               pTimer  );\r
 150 void    PHY_SwChnl8188E(        IN      PADAPTER                pAdapter,\r
 151                                                                         IN      u8                      channel );\r
 152 \r
 153 VOID\r
 154 PHY_SetSwChnlBWMode8188E(\r
 155         IN      PADAPTER                        Adapter,\r
 156         IN      u8                                      channel,\r
 157         IN      CHANNEL_WIDTH   Bandwidth,\r
 158         IN      u8                                      Offset40,\r
 159         IN      u8                                      Offset80\r
 160 );\r
 161 \r
 162 //\r
 163 // BB/MAC/RF other monitor API\r
 164 //\r
 165 void    PHY_SetMonitorMode8192C(IN      PADAPTER        pAdapter,\r
 166                                                                                 IN      BOOLEAN         bEnableMonitorMode      );\r
 167 \r
 168 BOOLEAN PHY_CheckIsLegalRfPath8192C(IN  PADAPTER        pAdapter,\r
 169                                                                                         IN      u32             eRFPath );\r
 170 \r
 171 VOID PHY_SetRFPathSwitch_8188E(IN       PADAPTER        pAdapter, IN    BOOLEAN         bMain);\r
 172 \r
 173 extern  VOID\r
 174 PHY_SwitchEphyParameter(\r
 175         IN      PADAPTER                        Adapter\r
 176         );\r
 177 \r
 178 extern  VOID\r
 179 PHY_EnableHostClkReq(\r
 180         IN      PADAPTER                        Adapter\r
 181         );\r
 182 \r
 183 BOOLEAN\r
 184 SetAntennaConfig92C(\r
 185         IN      PADAPTER        Adapter,\r
 186         IN      u8              DefaultAnt      \r
 187         );\r
 188 \r
 189 VOID\r
 190 storePwrIndexDiffRateOffset(\r
 191         IN      PADAPTER        Adapter,\r
 192         IN      u32             RegAddr,\r
 193         IN      u32             BitMask,\r
 194         IN      u32             Data\r
 195         );\r
 196 /*--------------------------Exported Function prototype---------------------*/\r
 197 \r
 198 //\r
 199 // Initialization related function\r
 200 //\r
 201 /* MAC/BB/RF HAL config */\r
 202 //extern s32 PHY_MACConfig8723(PADAPTER padapter);\r
 203 //s32 PHY_BBConfig8723(PADAPTER padapter);\r
 204 //s32 PHY_RFConfig8723(PADAPTER padapter);\r
 205 \r
 206 \r
 207 \r
 208 //==================================================================\r
 209 // Note: If SIC_ENABLE under PCIE, because of the slow operation\r
 210 //      you should \r
 211 //      2) "#define RTL8723_FPGA_VERIFICATION   1"                              in Precomp.h.WlanE.Windows\r
 212 //      3) "#define RTL8190_Download_Firmware_From_Header       0"      in Precomp.h.WlanE.Windows if needed.\r
 213 //\r
 214 #if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1)\r
 215 #define SIC_ENABLE                              1\r
 216 #define SIC_HW_SUPPORT          1\r
 217 #else\r
 218 #define SIC_ENABLE                              0\r
 219 #define SIC_HW_SUPPORT          0\r
 220 #endif\r
 221 //==================================================================\r
 222 \r
 223 \r
 224 #define SIC_MAX_POLL_CNT                5\r
 225 \r
 226 #if(SIC_HW_SUPPORT == 1)\r
 227 #define SIC_CMD_READY                   0\r
 228 #define SIC_CMD_PREWRITE                0x1\r
 229 #if(RTL8188E_SUPPORT == 1)\r
 230 #define SIC_CMD_WRITE                   0x40\r
 231 #define SIC_CMD_PREREAD         0x2\r
 232 #define SIC_CMD_READ                    0x80\r
 233 #define SIC_CMD_INIT                    0xf0\r
 234 #define SIC_INIT_VAL                    0xff\r
 235 \r
 236 #define SIC_INIT_REG                    0x1b7\r
 237 #define SIC_CMD_REG                     0x1EB           // 1byte\r
 238 #define SIC_ADDR_REG                    0x1E8           // 1b4~1b5, 2 bytes\r
 239 #define SIC_DATA_REG                    0x1EC           // 1b0~1b3\r
 240 #else\r
 241 #define SIC_CMD_WRITE                   0x11\r
 242 #define SIC_CMD_PREREAD         0x2\r
 243 #define SIC_CMD_READ                    0x12\r
 244 #define SIC_CMD_INIT                    0x1f\r
 245 #define SIC_INIT_VAL                    0xff\r
 246 \r
 247 #define SIC_INIT_REG                    0x1b7\r
 248 #define SIC_CMD_REG                     0x1b6           // 1byte\r
 249 #define SIC_ADDR_REG                    0x1b4           // 1b4~1b5, 2 bytes\r
 250 #define SIC_DATA_REG                    0x1b0           // 1b0~1b3\r
 251 #endif\r
 252 #else\r
 253 #define SIC_CMD_READY                   0\r
 254 #define SIC_CMD_WRITE                   1\r
 255 #define SIC_CMD_READ                    2\r
 256 \r
 257 #if(RTL8188E_SUPPORT == 1)\r
 258 #define SIC_CMD_REG                     0x1EB           // 1byte\r
 259 #define SIC_ADDR_REG                    0x1E8           // 1b9~1ba, 2 bytes\r
 260 #define SIC_DATA_REG                    0x1EC           // 1bc~1bf\r
 261 #else\r
 262 #define SIC_CMD_REG                     0x1b8           // 1byte\r
 263 #define SIC_ADDR_REG                    0x1b9           // 1b9~1ba, 2 bytes\r
 264 #define SIC_DATA_REG                    0x1bc           // 1bc~1bf\r
 265 #endif\r
 266 #endif\r
 267 \r
 268 #if(SIC_ENABLE == 1)\r
 269 VOID SIC_Init(IN PADAPTER Adapter);\r
 270 #endif\r
 271 \r
 272 \r
 273 #endif  // __INC_HAL8192CPHYCFG_H\r
 274 \r