drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/rtl8188e/rtl8188e_hal_init.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HAL_INIT_C_
  21
  22 #include <drv_types.h>
  23 #include <rtl8188e_hal.h>
  24
  25
  26 #if defined(CONFIG_IOL)
  27 static void iol_mode_enable(PADAPTER padapter, u8 enable)
  28 {
  29         u8 reg_0xf0 = 0;
  30
  31         if(enable)
  32         {
  33                 //Enable initial offload
  34                 reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
  35                 //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|SW_OFFLOAD_EN);
  36                 rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
  37
  38                 if(padapter->bFWReady == _FALSE)
  39                 {
  40                         printk("bFWReady == _FALSE call reset 8051...\n");
  41                         _8051Reset88E(padapter);
  42                 }
  43
  44         }
  45         else
  46         {
  47                 //disable initial offload
  48                 reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
  49                 //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~SW_OFFLOAD_EN);
  50                 rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
  51         }
  52 }
  53
  54 static s32 iol_execute(PADAPTER padapter, u8 control)
  55 {
  56         s32 status = _FAIL;
  57         u8 reg_0x88 = 0,reg_1c7=0;
  58         u32 start = 0, passing_time = 0;
  59
  60         u32 t1,t2;
  61         control = control&0x0f;
  62         reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
  63         //DBG_871X("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control);
  64         rtw_write8(padapter, REG_HMEBOX_E0,  reg_0x88|control);
  65
  66         t1 = start = rtw_get_current_time();
  67         while(
  68                 //(reg_1c7 = rtw_read8(padapter, 0x1c7) >1) &&
  69                 (reg_0x88=rtw_read8(padapter, REG_HMEBOX_E0)) & control
  70                 && (passing_time=rtw_get_passing_time_ms(start))<1000
  71         ) {
  72                 //DBG_871X("%s polling reg_0x88:0x%02x,reg_0x1c7:0x%02x\n", __FUNCTION__, reg_0x88,rtw_read8(padapter, 0x1c7) );
  73                 //rtw_udelay_os(100);
  74         }
  75
  76         reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
  77         status = (reg_0x88 & control)?_FAIL:_SUCCESS;
  78         if(reg_0x88 & control<<4)
  79                 status = _FAIL;
  80         t2= rtw_get_current_time();
  81         //printk("==> step iol_execute :  %5u reg-0x1c0= 0x%02x\n",rtw_get_time_interval_ms(t1,t2),rtw_read8(padapter, 0x1c0));
  82         //DBG_871X("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88);
  83
  84         return status;
  85 }
  86
  87 static s32 iol_InitLLTTable(
  88         PADAPTER padapter,
  89         u8 txpktbuf_bndy
  90         )
  91 {
  92         s32 rst = _SUCCESS;
  93         iol_mode_enable(padapter, 1);
  94         //DBG_871X("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy);
  95         rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
  96         rst = iol_execute(padapter, CMD_INIT_LLT);
  97         iol_mode_enable(padapter, 0);
  98         return rst;
  99 }
 100
 101 static VOID
 102 efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8  *pbuf)
 103 {
 104         u8      *efuseTbl = NULL;
 105         u8      rtemp8;
 106         u16     eFuse_Addr = 0;
 107         u8      offset, wren;
 108         u16     i, j;
 109         u16     **eFuseWord = NULL;
 110         u16     efuse_utilized = 0;
 111         u8      efuse_usage = 0;
 112         u8      u1temp = 0;
 113
 114
 115         efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E);
 116         if(efuseTbl == NULL)
 117         {
 118                 DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__);
 119                 goto exit;
 120         }
 121
 122         eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2);
 123         if(eFuseWord == NULL)
 124         {
 125                 DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__);
 126                 goto exit;
 127         }
 128
 129         // 0. Refresh efuse init map as all oxFF.
 130         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
 131                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
 132                         eFuseWord[i][j] = 0xFFFF;
 133
 134         //
 135         // 1. Read the first byte to check if efuse is empty!!!
 136         //
 137         //
 138         rtemp8 = *(phymap+eFuse_Addr);
 139         if(rtemp8 != 0xFF)
 140         {
 141                 efuse_utilized++;
 142                 //printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8);
 143                 eFuse_Addr++;
 144         }
 145         else
 146         {
 147                 DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8);
 148                 goto exit;
 149         }
 150
 151
 152         //
 153         // 2. Read real efuse content. Filter PG header and every section data.
 154         //
 155         while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
 156         {
 157                 //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8));
 158
 159                 // Check PG header for section num.
 160                 if((rtemp8 & 0x1F ) == 0x0F)            //extended header
 161                 {
 162                         u1temp =( (rtemp8 & 0xE0) >> 5);
 163                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0));
 164
 165                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp));
 166
 167                         rtemp8 = *(phymap+eFuse_Addr);
 168
 169                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8));
 170
 171                         if((rtemp8 & 0x0F) == 0x0F)
 172                         {
 173                                 eFuse_Addr++;
 174                                 rtemp8 = *(phymap+eFuse_Addr);
 175
 176                                 if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
 177                                 {
 178                                         eFuse_Addr++;
 179                                 }
 180                                 continue;
 181                         }
 182                         else
 183                         {
 184                                 offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
 185                                 wren = (rtemp8 & 0x0F);
 186                                 eFuse_Addr++;
 187                         }
 188                 }
 189                 else
 190                 {
 191                         offset = ((rtemp8 >> 4) & 0x0f);
 192                         wren = (rtemp8 & 0x0f);
 193                 }
 194
 195                 if(offset < EFUSE_MAX_SECTION_88E)
 196                 {
 197                         // Get word enable value from PG header
 198                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren));
 199
 200                         for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
 201                         {
 202                                 // Check word enable condition in the section
 203                                 if(!(wren & 0x01))
 204                                 {
 205                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d \n", eFuse_Addr));
 206                                         rtemp8 = *(phymap+eFuse_Addr);
 207                                         eFuse_Addr++;
 208                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
 209                                         efuse_utilized++;
 210                                         eFuseWord[offset][i] = (rtemp8 & 0xff);
 211
 212
 213                                         if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 214                                                 break;
 215
 216                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr));
 217                                         rtemp8 = *(phymap+eFuse_Addr);
 218                                         eFuse_Addr++;
 219                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
 220
 221                                         efuse_utilized++;
 222                                         eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00);
 223
 224                                         if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 225                                                 break;
 226                                 }
 227
 228                                 wren >>= 1;
 229
 230                         }
 231                 }
 232
 233                 // Read next PG header
 234                 rtemp8 = *(phymap+eFuse_Addr);
 235                 //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8));
 236
 237                 if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
 238                 {
 239                         efuse_utilized++;
 240                         eFuse_Addr++;
 241                 }
 242         }
 243
 244         //
 245         // 3. Collect 16 sections and 4 word unit into Efuse map.
 246         //
 247         for(i=0; i<EFUSE_MAX_SECTION_88E; i++)
 248         {
 249                 for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
 250                 {
 251                         efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
 252                         efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
 253                 }
 254         }
 255
 256
 257         //
 258         // 4. Copy from Efuse map to output pointer memory!!!
 259         //
 260         for(i=0; i<_size_byte; i++)
 261         {
 262                 pbuf[i] = efuseTbl[_offset+i];
 263         }
 264
 265         //
 266         // 5. Calculate Efuse utilization.
 267         //
 268         efuse_usage = (u1Byte)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN_88E);
 269         //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized);
 270
 271 exit:
 272         if(efuseTbl)
 273                 rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E);
 274
 275         if(eFuseWord)
 276                 rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
 277 }
 278
 279 void efuse_read_phymap_from_txpktbuf(
 280         ADAPTER *adapter,
 281         int bcnhead,    //beacon head, where FW store len(2-byte) and efuse physical map.
 282         u8 *content,    //buffer to store efuse physical map
 283         u16 *size       //for efuse content: the max byte to read. will update to byte read
 284         )
 285 {
 286         u16 dbg_addr = 0;
 287         u32 start  = 0, passing_time = 0;
 288         u8 reg_0x143 = 0;
 289         u8 reg_0x106 = 0;
 290         u32 lo32 = 0, hi32 = 0;
 291         u16 len = 0, count = 0;
 292         int i = 0;
 293         u16 limit = *size;
 294
 295         u8 *pos = content;
 296
 297         if(bcnhead<0) //if not valid
 298                 bcnhead = rtw_read8(adapter, REG_TDECTRL+1);
 299
 300         DBG_871X("%s bcnhead:%d\n", __FUNCTION__, bcnhead);
 301
 302         //reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL);
 303         //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69);
 304         rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 305         //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106));
 306
 307         dbg_addr = bcnhead*128/8; //8-bytes addressing
 308
 309         while(1)
 310         {
 311                 //DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i);
 312                 rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i);
 313
 314                 //DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__);
 315                 rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
 316                 start = rtw_get_current_time();
 317                 while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))//dbg
 318                 //while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0
 319                         && (passing_time=rtw_get_passing_time_ms(start))<1000
 320                 ) {
 321                         DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106));
 322                         rtw_usleep_os(100);
 323                 }
 324
 325
 326                 lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L);
 327                 hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H);
 328
 329                 #if 0
 330                 DBG_871X("%s lo32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, lo32
 331                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L)
 332                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1)
 333                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+2)
 334                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+3)
 335                 );
 336                 DBG_871X("%s hi32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, hi32
 337                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H)
 338                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+1)
 339                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+2)
 340                         , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+3)
 341                 );
 342                 #endif
 343
 344                 if(i==0)
 345                 {
 346                         #if 1 //for debug
 347                         u8 lenc[2];
 348                         u16 lenbak, aaabak;
 349                         u16 aaa;
 350                         lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L);
 351                         lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1);
 352
 353                         aaabak = le16_to_cpup((u16*)lenc);
 354                         lenbak = le16_to_cpu(*((u16*)lenc));
 355                         aaa = le16_to_cpup((u16*)&lo32);
 356                         #endif
 357                         len = le16_to_cpu(*((u16*)&lo32));
 358
 359                         limit = (len-2<limit)?len-2:limit;
 360
 361                         DBG_871X("%s len:%u, lenbak:%u, aaa:%u, aaabak:%u\n", __FUNCTION__, len, lenbak, aaa, aaabak);
 362
 363                         _rtw_memcpy(pos, ((u8*)&lo32)+2, (limit>=count+2)?2:limit-count);
 364                         count+= (limit>=count+2)?2:limit-count;
 365                         pos=content+count;
 366
 367                 }
 368                 else
 369                 {
 370                         _rtw_memcpy(pos, ((u8*)&lo32), (limit>=count+4)?4:limit-count);
 371                         count+=(limit>=count+4)?4:limit-count;
 372                         pos=content+count;
 373
 374
 375                 }
 376
 377                 if(limit>count && len-2>count) {
 378                         _rtw_memcpy(pos, (u8*)&hi32, (limit>=count+4)?4:limit-count);
 379                         count+=(limit>=count+4)?4:limit-count;
 380                         pos=content+count;
 381                 }
 382
 383                 if(limit<=count || len-2<=count)
 384                         break;
 385
 386                 i++;
 387         }
 388
 389         rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
 390
 391         DBG_871X("%s read count:%u\n", __FUNCTION__, count);
 392         *size = count;
 393
 394 }
 395
 396
 397 static s32 iol_read_efuse(
 398         PADAPTER padapter,
 399         u8 txpktbuf_bndy,
 400         u16 offset,
 401         u16 size_byte,
 402         u8 *logical_map
 403         )
 404 {
 405         s32 status = _FAIL;
 406         u8 reg_0x106 = 0;
 407         u8 physical_map[512];
 408         u16 size = 512;
 409         int i;
 410
 411
 412         rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
 413         _rtw_memset(physical_map, 0xFF, 512);
 414
 415         ///reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL);
 416         //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69);
 417         rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 418         //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106));
 419
 420         status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
 421
 422         if(status == _SUCCESS)
 423                 efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
 424
 425         #if 0
 426         DBG_871X("%s physical map\n", __FUNCTION__);
 427         for(i=0;i<size;i++)
 428         {
 429                 DBG_871X("%02x ", physical_map[i]);
 430                 if(i%16==15)
 431                         DBG_871X("\n");
 432         }
 433         DBG_871X("\n");
 434         #endif
 435
 436         efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
 437
 438         return status;
 439 }
 440
 441 s32 rtl8188e_iol_efuse_patch(PADAPTER padapter)
 442 {
 443         s32     result = _SUCCESS;
 444         printk("==> %s \n",__FUNCTION__);
 445
 446         if(rtw_IOL_applied(padapter)){
 447                 iol_mode_enable(padapter, 1);
 448                 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
 449                 if(result == _SUCCESS)
 450                         result = iol_execute(padapter, CMD_EFUSE_PATCH);
 451
 452                 iol_mode_enable(padapter, 0);
 453         }
 454         return result;
 455 }
 456
 457 static s32 iol_ioconfig(
 458         PADAPTER padapter,
 459         u8 iocfg_bndy
 460         )
 461 {
 462         s32 rst = _SUCCESS;
 463
 464         //DBG_871X("%s iocfg_bndy:%u\n", __FUNCTION__, iocfg_bndy);
 465         rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy);
 466         rst = iol_execute(padapter, CMD_IOCONFIG);
 467
 468         return rst;
 469 }
 470
 471 int rtl8188e_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms,u32 bndy_cnt)
 472 {
 473
 474         u32 start_time = rtw_get_current_time();
 475         u32 passing_time_ms;
 476         u8 polling_ret,i;
 477         int ret = _FAIL;
 478         u32 t1,t2;
 479
 480         //printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt);
 481         if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
 482                 goto exit;
 483 #ifdef CONFIG_USB_HCI
 484         {
 485                 struct pkt_attrib       *pattrib = &xmit_frame->attrib;
 486                 if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz))
 487                 {
 488                         if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
 489                                 goto exit;
 490                 }
 491         }
 492 #endif //CONFIG_USB_HCI
 493
 494         //rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr);
 495         //rtw_hal_mgnt_xmit(adapter, xmit_frame);
 496         //rtw_dump_xframe_sync(adapter, xmit_frame);
 497
 498         dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms);
 499
 500         t1=     rtw_get_current_time();
 501         iol_mode_enable(adapter, 1);
 502         for(i=0;i<bndy_cnt;i++){
 503                 u8 page_no = 0;
 504                 page_no = i*2 ;
 505                 //printk(" i = %d, page_no = %d \n",i,page_no);
 506                 if( (ret = iol_ioconfig(adapter, page_no)) != _SUCCESS)
 507                 {
 508                         break;
 509                 }
 510         }
 511         iol_mode_enable(adapter, 0);
 512         t2 = rtw_get_current_time();
 513         //printk("==> %s :  %5u\n",__FUNCTION__,rtw_get_time_interval_ms(t1,t2));
 514 exit:
 515         //restore BCN_HEAD
 516         rtw_write8(adapter, REG_TDECTRL+1, 0);
 517         return ret;
 518 }
 519
 520 void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len)
 521 {
 522         u32 fifo_data,reg_140;
 523         u32 addr,rstatus,loop=0;
 524
 525         u16 data_cnts = (data_len/8)+1;
 526         u8 *pbuf =rtw_zvmalloc(data_len+10);
 527         printk("###### %s ######\n",__FUNCTION__);
 528
 529         rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 530         if(pbuf){
 531                 for(addr=0;addr< data_cnts;addr++){
 532                         //printk("==> addr:0x%02x\n",addr);
 533                         rtw_write32(Adapter,0x140,addr);
 534                         rtw_usleep_os(2);
 535                         loop=0;
 536                         do{
 537                                 rstatus=(reg_140=rtw_read32(Adapter,REG_PKTBUF_DBG_CTRL)&BIT24);
 538                                 //printk("rstatus = %02x, reg_140:0x%08x\n",rstatus,reg_140);
 539                                 if(rstatus){
 540                                         fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_L);
 541                                         //printk("fifo_data_144:0x%08x\n",fifo_data);
 542                                         _rtw_memcpy(pbuf+(addr*8),&fifo_data , 4);
 543
 544                                         fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_H);
 545                                         //printk("fifo_data_148:0x%08x\n",fifo_data);
 546                                         _rtw_memcpy(pbuf+(addr*8+4), &fifo_data, 4);
 547
 548                                 }
 549                                 rtw_usleep_os(2);
 550                         }while( !rstatus && (loop++ <10));
 551                 }
 552                 rtw_IOL_cmd_buf_dump(Adapter,data_len,pbuf);
 553                 rtw_vmfree(pbuf, data_len+10);
 554
 555         }
 556         printk("###### %s ######\n",__FUNCTION__);
 557 }
 558
 559 #endif /* defined(CONFIG_IOL) */
 560
 561
 562 static VOID
 563 _FWDownloadEnable_8188E(
 564         IN      PADAPTER                padapter,
 565         IN      BOOLEAN                 enable
 566         )
 567 {
 568         u8      tmp;
 569
 570         if(enable)
 571         {
 572                 // MCU firmware download enable.
 573                 tmp = rtw_read8(padapter, REG_MCUFWDL);
 574                 rtw_write8(padapter, REG_MCUFWDL, tmp|0x01);
 575
 576                 // 8051 reset
 577                 tmp = rtw_read8(padapter, REG_MCUFWDL+2);
 578                 rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7);
 579         }
 580         else
 581         {
 582
 583                 // MCU firmware download disable.
 584                 tmp = rtw_read8(padapter, REG_MCUFWDL);
 585                 rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe);
 586
 587                 // Reserved for fw extension.
 588                 rtw_write8(padapter, REG_MCUFWDL+1, 0x00);
 589         }
 590 }
 591 #define MAX_REG_BOLCK_SIZE      196
 592 static int
 593 _BlockWrite(
 594         IN              PADAPTER                padapter,
 595         IN              PVOID           buffer,
 596         IN              u32                     buffSize
 597         )
 598 {
 599         int ret = _SUCCESS;
 600
 601         u32                     blockSize_p1 = 4;       // (Default) Phase #1 : PCI muse use 4-byte write to download FW
 602         u32                     blockSize_p2 = 8;       // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW.
 603         u32                     blockSize_p3 = 1;       // Phase #3 : Use 1-byte, the remnant of FW image.
 604         u32                     blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
 605         u32                     remainSize_p1 = 0, remainSize_p2 = 0;
 606         u8                      *bufferPtr      = (u8*)buffer;
 607         u32                     i=0, offset=0;
 608 #ifdef CONFIG_PCI_HCI
 609         u8                      remainFW[4] = {0, 0, 0, 0};
 610         u8                      *p = NULL;
 611 #endif
 612
 613 #ifdef CONFIG_USB_HCI
 614         blockSize_p1 = MAX_REG_BOLCK_SIZE;
 615 #endif
 616
 617         //3 Phase #1
 618         blockCount_p1 = buffSize / blockSize_p1;
 619         remainSize_p1 = buffSize % blockSize_p1;
 620
 621         if (blockCount_p1) {
 622                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 623                                 ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n",
 624                                 buffSize, blockSize_p1, blockCount_p1, remainSize_p1));
 625         }
 626
 627         for (i = 0; i < blockCount_p1; i++)
 628         {
 629 #ifdef CONFIG_USB_HCI
 630                 ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
 631 #else
 632                 ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1))));
 633 #endif
 634
 635                 if(ret == _FAIL)
 636                         goto exit;
 637         }
 638
 639 #ifdef CONFIG_PCI_HCI
 640         p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1));
 641         if (remainSize_p1) {
 642                 switch (remainSize_p1) {
 643                 case 0:
 644                         break;
 645                 case 3:
 646                         remainFW[2]=*(p+2);
 647                 case 2:
 648                         remainFW[1]=*(p+1);
 649                 case 1:
 650                         remainFW[0]=*(p);
 651                         ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1),
 652                                  le32_to_cpu(*(u32*)remainFW));
 653                 }
 654                 return ret;
 655         }
 656 #endif
 657
 658         //3 Phase #2
 659         if (remainSize_p1)
 660         {
 661                 offset = blockCount_p1 * blockSize_p1;
 662
 663                 blockCount_p2 = remainSize_p1/blockSize_p2;
 664                 remainSize_p2 = remainSize_p1%blockSize_p2;
 665
 666                 if (blockCount_p2) {
 667                                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 668                                                 ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n",
 669                                                 (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2));
 670                 }
 671
 672 #ifdef CONFIG_USB_HCI
 673                 for (i = 0; i < blockCount_p2; i++) {
 674                         ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2));
 675
 676                         if(ret == _FAIL)
 677                                 goto exit;
 678                 }
 679 #endif
 680         }
 681
 682         //3 Phase #3
 683         if (remainSize_p2)
 684         {
 685                 offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
 686
 687                 blockCount_p3 = remainSize_p2 / blockSize_p3;
 688
 689                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 690                                 ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n",
 691                                 (buffSize-offset), blockSize_p3, blockCount_p3));
 692
 693                 for(i = 0 ; i < blockCount_p3 ; i++){
 694                         ret =rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
 695
 696                         if(ret == _FAIL)
 697                                 goto exit;
 698                 }
 699         }
 700
 701 exit:
 702         return ret;
 703 }
 704
 705 static int
 706 _PageWrite(
 707         IN              PADAPTER        padapter,
 708         IN              u32                     page,
 709         IN              PVOID           buffer,
 710         IN              u32                     size
 711         )
 712 {
 713         u8 value8;
 714         u8 u8Page = (u8) (page & 0x07) ;
 715
 716         value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ;
 717         rtw_write8(padapter, REG_MCUFWDL+2,value8);
 718
 719         return _BlockWrite(padapter,buffer,size);
 720 }
 721
 722 static VOID
 723 _FillDummy(
 724         u8*             pFwBuf,
 725         u32*    pFwLen
 726         )
 727 {
 728         u32     FwLen = *pFwLen;
 729         u8      remain = (u8)(FwLen%4);
 730         remain = (remain==0)?0:(4-remain);
 731
 732         while(remain>0)
 733         {
 734                 pFwBuf[FwLen] = 0;
 735                 FwLen++;
 736                 remain--;
 737         }
 738
 739         *pFwLen = FwLen;
 740 }
 741
 742 static int
 743 _WriteFW(
 744         IN              PADAPTER                padapter,
 745         IN              PVOID                   buffer,
 746         IN              u32                     size
 747         )
 748 {
 749         // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version.
 750         // We can remove _ReadChipVersion from ReadpadapterInfo8192C later.
 751         int ret = _SUCCESS;
 752         u32     pageNums,remainSize ;
 753         u32     page, offset;
 754         u8              *bufferPtr = (u8*)buffer;
 755
 756 #ifdef CONFIG_PCI_HCI
 757         // 20100120 Joseph: Add for 88CE normal chip.
 758         // Fill in zero to make firmware image to dword alignment.
 759 //              _FillDummy(bufferPtr, &size);
 760 #endif
 761
 762         pageNums = size / MAX_DLFW_PAGE_SIZE ;
 763         //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));
 764         remainSize = size % MAX_DLFW_PAGE_SIZE;
 765
 766         for (page = 0; page < pageNums; page++) {
 767                 offset = page * MAX_DLFW_PAGE_SIZE;
 768                 ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_DLFW_PAGE_SIZE);
 769
 770                 if(ret == _FAIL)
 771                         goto exit;
 772         }
 773         if (remainSize) {
 774                 offset = pageNums * MAX_DLFW_PAGE_SIZE;
 775                 page = pageNums;
 776                 ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize);
 777
 778                 if(ret == _FAIL)
 779                         goto exit;
 780
 781         }
 782         RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n"));
 783
 784 exit:
 785         return ret;
 786 }
 787
 788 void _MCUIO_Reset88E(PADAPTER padapter,u8 bReset)
 789 {
 790         u8 u1bTmp;
 791
 792         if(bReset==_TRUE){
 793                 // Reset MCU IO Wrapper- sugggest by SD1-Gimmy
 794                 u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
 795                 rtw_write8(padapter,REG_RSV_CTRL+1, (u1bTmp&(~BIT3)));
 796         }else{
 797                 // Enable MCU IO Wrapper
 798                 u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
 799                 rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp|BIT3);
 800         }
 801
 802 }
 803
 804 void _8051Reset88E(PADAPTER padapter)
 805 {
 806         u8 u1bTmp;
 807
 808         _MCUIO_Reset88E(padapter,_TRUE);
 809         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
 810         rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
 811         _MCUIO_Reset88E(padapter,_FALSE);
 812         rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2));
 813
 814         DBG_871X("=====> _8051Reset88E(): 8051 reset success .\n");
 815 }
 816
 817 extern u8 g_fwdl_chksum_fail;
 818 static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms)
 819 {
 820         s32 ret = _FAIL;
 821         u32 value32;
 822         u32 start = rtw_get_current_time();
 823         u32 cnt = 0;
 824
 825         /* polling CheckSum report */
 826         do {
 827                 cnt++;
 828                 value32 = rtw_read32(adapter, REG_MCUFWDL);
 829                 if (value32 & FWDL_ChkSum_rpt || adapter->bSurpriseRemoved || adapter->bDriverStopped)
 830                         break;
 831                 rtw_yield_os();
 832         } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt);
 833
 834         if (!(value32 & FWDL_ChkSum_rpt)) {
 835                 goto exit;
 836         }
 837
 838         if (g_fwdl_chksum_fail) {
 839                 DBG_871X("%s: fwdl test case: fwdl_chksum_fail\n", __FUNCTION__);
 840                 g_fwdl_chksum_fail--;
 841                 goto exit;
 842         }
 843
 844         ret = _SUCCESS;
 845
 846 exit:
 847         DBG_871X("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__
 848         , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32);
 849
 850         return ret;
 851 }
 852
 853 extern u8 g_fwdl_wintint_rdy_fail;
 854 static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms)
 855 {
 856         s32 ret = _FAIL;
 857         u32     value32;
 858         u32 start = rtw_get_current_time();
 859         u32 cnt = 0;
 860
 861         value32 = rtw_read32(adapter, REG_MCUFWDL);
 862         value32 |= MCUFWDL_RDY;
 863         value32 &= ~WINTINI_RDY;
 864         rtw_write32(adapter, REG_MCUFWDL, value32);
 865
 866         _8051Reset88E(adapter);
 867
 868         /*  polling for FW ready */
 869         do {
 870                 cnt++;
 871                 value32 = rtw_read32(adapter, REG_MCUFWDL);
 872                 if (value32 & WINTINI_RDY || adapter->bSurpriseRemoved || adapter->bDriverStopped)
 873                         break;
 874                 rtw_yield_os();
 875         } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt);
 876
 877         if (!(value32 & WINTINI_RDY)) {
 878                 goto exit;
 879         }
 880
 881         if (g_fwdl_wintint_rdy_fail) {
 882                 DBG_871X("%s: fwdl test case: wintint_rdy_fail\n", __FUNCTION__);
 883                 g_fwdl_wintint_rdy_fail--;
 884                 goto exit;
 885         }
 886
 887         ret = _SUCCESS;
 888
 889 exit:
 890         DBG_871X("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__
 891                 , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32);
 892         return ret;
 893 }
 894
 895 #define IS_FW_81xxC(padapter)   (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0)
 896
 897
 898 #ifdef CONFIG_FILE_FWIMG
 899 extern char *rtw_fw_file_path;
 900 extern char *rtw_fw_wow_file_path;
 901 u8      FwBuffer8188E[FW_8188E_SIZE];
 902 #endif //CONFIG_FILE_FWIMG
 903
 904 //
 905 //      Description:
 906 //              Download 8192C firmware code.
 907 //
 908 //
 909 s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN  bUsedWoWLANFw)
 910 {
 911         s32     rtStatus = _SUCCESS;
 912         u8 write_fw = 0;
 913         u32 fwdl_start_time;
 914         PHAL_DATA_TYPE  pHalData = GET_HAL_DATA(padapter);
 915
 916 #ifdef CONFIG_WOWLAN
 917         u8                      *FwImageWoWLAN;
 918         u32                     FwImageWoWLANLen;
 919 #endif
 920
 921         PRT_FIRMWARE_8188E      pFirmware = NULL;
 922         PRT_8188E_FIRMWARE_HDR          pFwHdr = NULL;
 923
 924         u8                      *pFirmwareBuf;
 925         u32                     FirmwareLen;
 926 #ifdef CONFIG_FILE_FWIMG
 927         u8 *fwfilepath;
 928 #endif // CONFIG_FILE_FWIMG
 929
 930         RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__));
 931         pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E));
 932         if(!pFirmware)
 933         {
 934                 rtStatus = _FAIL;
 935                 goto exit;
 936         }
 937
 938
 939 //      RT_TRACE(_module_hal_init_c_, _drv_err_, ("rtl8723a_FirmwareDownload: %s\n", pFwImageFileName));
 940
 941 #ifdef CONFIG_FILE_FWIMG
 942 #ifdef CONFIG_WOWLAN
 943                 if (bUsedWoWLANFw)
 944                 {
 945                         fwfilepath = rtw_fw_wow_file_path;
 946                 }
 947                 else
 948 #endif // CONFIG_WOWLAN
 949                 {
 950                         fwfilepath = rtw_fw_file_path;
 951                 }
 952 #endif // CONFIG_FILE_FWIMG
 953
 954 #ifdef CONFIG_FILE_FWIMG
 955         if(rtw_is_file_readable(fwfilepath) == _TRUE)
 956         {
 957                 DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, fwfilepath);
 958                 pFirmware->eFWSource = FW_SOURCE_IMG_FILE;
 959         }
 960         else
 961 #endif //CONFIG_FILE_FWIMG
 962         {
 963                 pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
 964         }
 965
 966         switch(pFirmware->eFWSource)
 967         {
 968                 case FW_SOURCE_IMG_FILE:
 969                         #ifdef CONFIG_FILE_FWIMG
 970                         rtStatus = rtw_retrive_from_file(fwfilepath, FwBuffer8188E, FW_8188E_SIZE);
 971                         pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
 972                         pFirmware->szFwBuffer = FwBuffer8188E;
 973                         #endif //CONFIG_FILE_FWIMG
 974                         break;
 975                 case FW_SOURCE_HEADER_FILE:
 976 #ifdef CONFIG_WOWLAN
 977                         if(bUsedWoWLANFw) {
 978                                 ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_WoWLAN,
 979                                         (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength));
 980                                 DBG_871X("%s fw:%s, size: %d\n",__FUNCTION__, "WoWLAN", pFirmware->ulFwLength);
 981                         }else
 982 #endif //CONFIG_WOWLAN
 983                         {
 984                                 ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_NIC,
 985                                         (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength));
 986                                 DBG_871X("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength);
 987                         }
 988                         break;
 989         }
 990
 991         if (pFirmware->ulFwLength > FW_8188E_SIZE) {
 992                 rtStatus = _FAIL;
 993                 DBG_871X_LEVEL(_drv_emerg_, "Firmware size:%u exceed %u\n", pFirmware->ulFwLength, FW_8188E_SIZE);
 994                 goto exit;
 995         }
 996
 997         pFirmwareBuf = pFirmware->szFwBuffer;
 998         FirmwareLen = pFirmware->ulFwLength;
 999
1000         // To Check Fw header. Added by tynli. 2009.12.04.
1001         pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmwareBuf;
1002
1003         pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version);
1004         pHalData->FirmwareSubVersion = pFwHdr->Subversion;
1005         pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
1006
1007         DBG_871X("%s: fw_ver=%x fw_subver=%04x sig=0x%x, Month=%02x, Date=%02x, Hour=%02x, Minute=%02x\n",
1008                   __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature
1009                   ,pFwHdr->Month,pFwHdr->Date,pFwHdr->Hour,pFwHdr->Minute);
1010
1011         if (IS_FW_HEADER_EXIST_88E(pFwHdr))
1012         {
1013                 // Shift 32 bytes for FW header
1014                 pFirmwareBuf = pFirmwareBuf + 32;
1015                 FirmwareLen = FirmwareLen - 32;
1016         }
1017
1018         // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
1019         // or it will cause download Fw fail. 2010.02.01. by tynli.
1020         if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) //8051 RAM code
1021         {
1022                 rtw_write8(padapter, REG_MCUFWDL, 0x00);
1023                 _8051Reset88E(padapter);
1024         }
1025
1026         _FWDownloadEnable_8188E(padapter, _TRUE);
1027         fwdl_start_time = rtw_get_current_time();
1028         while(!padapter->bDriverStopped && !padapter->bSurpriseRemoved
1029                         && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500))
1030         {
1031                 /* reset FWDL chksum */
1032                 rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt);
1033
1034                 rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
1035                 if (rtStatus != _SUCCESS)
1036                         continue;
1037
1038                 rtStatus = polling_fwdl_chksum(padapter, 5, 50);
1039                 if (rtStatus == _SUCCESS)
1040                         break;
1041         }
1042         _FWDownloadEnable_8188E(padapter, _FALSE);
1043         if(_SUCCESS != rtStatus)
1044                 goto fwdl_stat;
1045
1046         rtStatus = _FWFreeToGo(padapter, 10, 200);
1047         if (_SUCCESS != rtStatus)
1048                 goto fwdl_stat;
1049
1050 fwdl_stat:
1051         DBG_871X("FWDL %s. write_fw:%u, %dms\n"
1052                 , (rtStatus == _SUCCESS)?"success":"fail"
1053                 , write_fw
1054                 , rtw_get_passing_time_ms(fwdl_start_time)
1055         );
1056
1057 exit:
1058         if (pFirmware)
1059                 rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8188E));
1060
1061         return rtStatus;
1062 }
1063
1064 void rtl8188e_InitializeFirmwareVars(PADAPTER padapter)
1065 {
1066         PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
1067         struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
1068
1069         // Init Fw LPS related.
1070         pwrpriv->bFwCurrentInPSMode = _FALSE;
1071
1072         //Init H2C cmd.
1073         rtw_write8(padapter, REG_HMETFR, 0x0f);
1074
1075         // Init H2C counter. by tynli. 2009.12.09.
1076         pHalData->LastHMEBoxNum = 0;
1077 }
1078
1079 #ifdef CONFIG_WOWLAN
1080 //===========================================
1081
1082 //
1083 // Description: Prepare some information to Fw for WoWLAN.
1084 //                                      (1) Download wowlan Fw.
1085 //                                      (2) Download RSVD page packets.
1086 //                                      (3) Enable AP offload if needed.
1087 //
1088 // 2011.04.12 by tynli.
1089 //
1090 VOID
1091 SetFwRelatedForWoWLAN8188ES(
1092                 IN              PADAPTER                        padapter,
1093                 IN              u8                                      bHostIsGoingtoSleep
1094 )
1095 {
1096                 int                             status=_FAIL;
1097                 HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
1098                 u8                              bRecover = _FALSE;
1099         //
1100         // 1. Before WoWLAN we need to re-download WoWLAN Fw.
1101         //
1102         status = rtl8188e_FirmwareDownload(padapter, bHostIsGoingtoSleep);
1103         if(status != _SUCCESS) {
1104                 DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware failed!!\n");
1105                 return;
1106         } else {
1107                 DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware Success !!\n");
1108         }
1109         //
1110         // 2. Re-Init the variables about Fw related setting.
1111         //
1112         rtl8188e_InitializeFirmwareVars(padapter);
1113 }
1114 #endif //CONFIG_WOWLAN
1115
1116 static void rtl8188e_free_hal_data(PADAPTER padapter)
1117 {
1118 _func_enter_;
1119
1120         if(padapter->HalData)
1121         {
1122                 rtw_vmfree(padapter->HalData, sizeof(HAL_DATA_TYPE));
1123                 padapter->HalData = NULL;
1124         }
1125
1126 _func_exit_;
1127 }
1128
1129 //===========================================================
1130 //                              Efuse related code
1131 //===========================================================
1132 enum{
1133                 VOLTAGE_V25                                             = 0x03,
1134                 LDOE25_SHIFT                                            = 28 ,
1135         };
1136
1137 static BOOLEAN
1138 hal_EfusePgPacketWrite2ByteHeader(
1139         IN      PADAPTER                pAdapter,
1140         IN      u8                              efuseType,
1141         IN      u16                             *pAddr,
1142         IN      PPGPKT_STRUCT   pTargetPkt,
1143         IN      BOOLEAN                 bPseudoTest);
1144 static BOOLEAN
1145 hal_EfusePgPacketWrite1ByteHeader(
1146         IN      PADAPTER                pAdapter,
1147         IN      u8                              efuseType,
1148         IN      u16                             *pAddr,
1149         IN      PPGPKT_STRUCT   pTargetPkt,
1150         IN      BOOLEAN                 bPseudoTest);
1151 static BOOLEAN
1152 hal_EfusePgPacketWriteData(
1153         IN      PADAPTER                pAdapter,
1154         IN      u8                              efuseType,
1155         IN      u16                             *pAddr,
1156         IN      PPGPKT_STRUCT   pTargetPkt,
1157         IN      BOOLEAN                 bPseudoTest);
1158
1159 static VOID
1160 hal_EfusePowerSwitch_RTL8188E(
1161         IN      PADAPTER        pAdapter,
1162         IN      u8              bWrite,
1163         IN      u8              PwrState)
1164 {
1165         u8      tempval;
1166         u16     tmpV16;
1167
1168         if (PwrState == _TRUE)
1169         {
1170                 rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
1171
1172                 // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
1173                 tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL);
1174                 if( ! (tmpV16 & PWC_EV12V ) ){
1175                         tmpV16 |= PWC_EV12V ;
1176                          rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16);
1177                 }
1178                 // Reset: 0x0000h[28], default valid
1179                 tmpV16 =  rtw_read16(pAdapter,REG_SYS_FUNC_EN);
1180                 if( !(tmpV16 & FEN_ELDR) ){
1181                         tmpV16 |= FEN_ELDR ;
1182                         rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
1183                 }
1184
1185                 // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
1186                 tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR);
1187                 if( (!(tmpV16 & LOADER_CLK_EN) )  ||(!(tmpV16 & ANA8M) ) ){
1188                         tmpV16 |= (LOADER_CLK_EN |ANA8M ) ;
1189                         rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16);
1190                 }
1191
1192                 if(bWrite == _TRUE)
1193                 {
1194                         // Enable LDO 2.5V before read/write action
1195                         tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
1196                         tempval &= 0x0F;
1197                         tempval |= (VOLTAGE_V25 << 4);
1198                         rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
1199                 }
1200         }
1201         else
1202         {
1203                 rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
1204
1205                 if(bWrite == _TRUE){
1206                         // Disable LDO 2.5V after read/write action
1207                         tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
1208                         rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
1209                 }
1210         }
1211 }
1212
1213 static VOID
1214 rtl8188e_EfusePowerSwitch(
1215         IN      PADAPTER        pAdapter,
1216         IN      u8              bWrite,
1217         IN      u8              PwrState)
1218 {
1219         hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState);
1220 }
1221
1222
1223
1224 static bool efuse_read_phymap(
1225         PADAPTER        Adapter,
1226         u8                      *pbuf,  //buffer to store efuse physical map
1227         u16                     *size   //the max byte to read. will update to byte read
1228         )
1229 {
1230         u8 *pos = pbuf;
1231         u16 limit = *size;
1232         u16 addr = 0;
1233         bool reach_end = _FALSE;
1234
1235         //
1236         // Refresh efuse init map as all 0xFF.
1237         //
1238         _rtw_memset(pbuf, 0xFF, limit);
1239
1240
1241         //
1242         // Read physical efuse content.
1243         //
1244         while(addr < limit)
1245         {
1246                 ReadEFuseByte(Adapter, addr, pos, _FALSE);
1247                 if(*pos != 0xFF)
1248                 {
1249                         pos++;
1250                         addr++;
1251                 }
1252                 else
1253                 {
1254                         reach_end = _TRUE;
1255                         break;
1256                 }
1257         }
1258
1259         *size = addr;
1260
1261         return reach_end;
1262
1263 }
1264
1265 static VOID
1266 Hal_EfuseReadEFuse88E(
1267         PADAPTER                Adapter,
1268         u16                     _offset,
1269         u16                     _size_byte,
1270         u8                      *pbuf,
1271         IN      BOOLEAN bPseudoTest
1272         )
1273 {
1274         //u8    efuseTbl[EFUSE_MAP_LEN_88E];
1275         u8      *efuseTbl = NULL;
1276         u8      rtemp8[1];
1277         u16     eFuse_Addr = 0;
1278         u8      offset, wren;
1279         u16     i, j;
1280         //u16   eFuseWord[EFUSE_MAX_SECTION_88E][EFUSE_MAX_WORD_UNIT];
1281         u16     **eFuseWord = NULL;
1282         u16     efuse_utilized = 0;
1283         u8      efuse_usage = 0;
1284         u8      u1temp = 0;
1285
1286         //
1287         // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
1288         //
1289         if((_offset + _size_byte)>EFUSE_MAP_LEN_88E)
1290         {// total E-Fuse table is 512bytes
1291                 DBG_8192C("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte);
1292                 goto exit;
1293         }
1294
1295         efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E);
1296         if(efuseTbl == NULL)
1297         {
1298                 DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__);
1299                 goto exit;
1300         }
1301
1302         eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2);
1303         if(eFuseWord == NULL)
1304         {
1305                 DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__);
1306                 goto exit;
1307         }
1308
1309         // 0. Refresh efuse init map as all oxFF.
1310         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
1311                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
1312                         eFuseWord[i][j] = 0xFFFF;
1313
1314         //
1315         // 1. Read the first byte to check if efuse is empty!!!
1316         //
1317         //
1318         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1319         if(*rtemp8 != 0xFF)
1320         {
1321                 efuse_utilized++;
1322                 //DBG_8192C("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8);
1323                 eFuse_Addr++;
1324         }
1325         else
1326         {
1327                 DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8);
1328                 goto exit;
1329         }
1330
1331
1332         //
1333         // 2. Read real efuse content. Filter PG header and every section data.
1334         //
1335         while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
1336         {
1337                 //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8));
1338
1339                 // Check PG header for section num.
1340                 if((*rtemp8 & 0x1F ) == 0x0F)           //extended header
1341                 {
1342                         u1temp =( (*rtemp8 & 0xE0) >> 5);
1343                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0));
1344
1345                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp));
1346
1347                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1348
1349                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8));
1350
1351                         if((*rtemp8 & 0x0F) == 0x0F)
1352                         {
1353                                 eFuse_Addr++;
1354                                 ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1355
1356                                 if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
1357                                 {
1358                                         eFuse_Addr++;
1359                                 }
1360                                 continue;
1361                         }
1362                         else
1363                         {
1364                                 offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
1365                                 wren = (*rtemp8 & 0x0F);
1366                                 eFuse_Addr++;
1367                         }
1368                 }
1369                 else
1370                 {
1371                         offset = ((*rtemp8 >> 4) & 0x0f);
1372                         wren = (*rtemp8 & 0x0f);
1373                 }
1374
1375                 if(offset < EFUSE_MAX_SECTION_88E)
1376                 {
1377                         // Get word enable value from PG header
1378                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren));
1379
1380                         for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
1381                         {
1382                                 // Check word enable condition in the section
1383                                 if(!(wren & 0x01))
1384                                 {
1385                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d \n", eFuse_Addr));
1386                                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1387                                         eFuse_Addr++;
1388                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
1389                                         efuse_utilized++;
1390                                         eFuseWord[offset][i] = (*rtemp8 & 0xff);
1391
1392
1393                                         if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
1394                                                 break;
1395
1396                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr));
1397                                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1398                                         eFuse_Addr++;
1399                                         //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
1400
1401                                         efuse_utilized++;
1402                                         eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00);
1403
1404                                         if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
1405                                                 break;
1406                                 }
1407
1408                                 wren >>= 1;
1409
1410                         }
1411                 }
1412
1413                 // Read next PG header
1414                 ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
1415                 //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8));
1416
1417                 if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
1418                 {
1419                         efuse_utilized++;
1420                         eFuse_Addr++;
1421                 }
1422         }
1423
1424         //
1425         // 3. Collect 16 sections and 4 word unit into Efuse map.
1426         //
1427         for(i=0; i<EFUSE_MAX_SECTION_88E; i++)
1428         {
1429                 for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
1430                 {
1431                         efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
1432                         efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
1433                 }
1434         }
1435
1436
1437         //
1438         // 4. Copy from Efuse map to output pointer memory!!!
1439         //
1440         for(i=0; i<_size_byte; i++)
1441         {
1442                 pbuf[i] = efuseTbl[_offset+i];
1443         }
1444
1445         //
1446         // 5. Calculate Efuse utilization.
1447         //
1448         efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_88E);
1449         rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
1450
1451 exit:
1452         if(efuseTbl)
1453                 rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E);
1454
1455         if(eFuseWord)
1456                 rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
1457 }
1458
1459
1460 static BOOLEAN
1461 Hal_EfuseSwitchToBank(
1462         IN              PADAPTER        pAdapter,
1463         IN              u8                      bank,
1464         IN              BOOLEAN         bPseudoTest
1465         )
1466 {
1467         BOOLEAN         bRet = _FALSE;
1468         u32             value32=0;
1469
1470         //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank));
1471         if(bPseudoTest)
1472         {
1473                 fakeEfuseBank = bank;
1474                 bRet = _TRUE;
1475         }
1476         else
1477         {
1478                 if(IS_HARDWARE_TYPE_8723A(pAdapter) &&
1479                         INCLUDE_MULTI_FUNC_BT(pAdapter))
1480                 {
1481                         value32 = rtw_read32(pAdapter, EFUSE_TEST);
1482                         bRet = _TRUE;
1483                         switch(bank)
1484                         {
1485                         case 0:
1486                                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
1487                                 break;
1488                         case 1:
1489                                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
1490                                 break;
1491                         case 2:
1492                                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
1493                                 break;
1494                         case 3:
1495                                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
1496                                 break;
1497                         default:
1498                                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
1499                                 bRet = _FALSE;
1500                                 break;
1501                         }
1502                         rtw_write32(pAdapter, EFUSE_TEST, value32);
1503                 }
1504                 else
1505                         bRet = _TRUE;
1506         }
1507         return bRet;
1508 }
1509
1510
1511
1512 static VOID
1513 ReadEFuseByIC(
1514         PADAPTER        Adapter,
1515         u8              efuseType,
1516         u16              _offset,
1517         u16             _size_byte,
1518         u8              *pbuf,
1519         IN BOOLEAN      bPseudoTest
1520         )
1521 {
1522 #ifdef DBG_IOL_READ_EFUSE_MAP
1523         u8 logical_map[512];
1524 #endif
1525
1526 #ifdef CONFIG_IOL_READ_EFUSE_MAP
1527         if(!bPseudoTest )//&& rtw_IOL_applied(Adapter))
1528         {
1529                 int ret = _FAIL;
1530                 if(rtw_IOL_applied(Adapter))
1531                 {
1532                         rtw_hal_power_on(Adapter);
1533
1534                         iol_mode_enable(Adapter, 1);
1535                         #ifdef DBG_IOL_READ_EFUSE_MAP
1536                         iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map);
1537                         #else
1538                         ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
1539                         #endif
1540                         iol_mode_enable(Adapter, 0);
1541
1542                         if(_SUCCESS == ret)
1543                                 goto exit;
1544                 }
1545         }
1546 #endif
1547         Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
1548
1549 exit:
1550
1551 #ifdef DBG_IOL_READ_EFUSE_MAP
1552         if(_rtw_memcmp(logical_map, Adapter->eeprompriv.efuse_eeprom_data, 0x130) == _FALSE)
1553         {
1554                 int i;
1555                 DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__);
1556                 for(i=0;i<512;i++)
1557                 {
1558                         if(i%16==0)
1559                                 DBG_871X("0x%03x: ", i);
1560                         DBG_871X("%02x ", logical_map[i]);
1561                         if(i%16==15)
1562                                 DBG_871X("\n");
1563                 }
1564                 DBG_871X("\n");
1565         }
1566 #endif
1567
1568         return;
1569 }
1570
1571 static VOID
1572 ReadEFuse_Pseudo(
1573         PADAPTER        Adapter,
1574         u8              efuseType,
1575         u16              _offset,
1576         u16             _size_byte,
1577         u8              *pbuf,
1578         IN BOOLEAN      bPseudoTest
1579         )
1580 {
1581         Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
1582 }
1583
1584 static VOID
1585 rtl8188e_ReadEFuse(
1586         PADAPTER        Adapter,
1587         u8              efuseType,
1588         u16             _offset,
1589         u16             _size_byte,
1590         u8              *pbuf,
1591         IN      BOOLEAN bPseudoTest
1592         )
1593 {
1594         if(bPseudoTest)
1595         {
1596                 ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
1597         }
1598         else
1599         {
1600                 ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
1601         }
1602 }
1603
1604 //Do not support BT
1605 VOID
1606 Hal_EFUSEGetEfuseDefinition88E(
1607         IN              PADAPTER        pAdapter,
1608         IN              u1Byte          efuseType,
1609         IN              u1Byte          type,
1610         OUT             PVOID           pOut
1611         )
1612 {
1613         switch(type)
1614         {
1615                 case TYPE_EFUSE_MAX_SECTION:
1616                         {
1617                                 u8*     pMax_section;
1618                                 pMax_section = (u8*)pOut;
1619                                 *pMax_section = EFUSE_MAX_SECTION_88E;
1620                         }
1621                         break;
1622                 case TYPE_EFUSE_REAL_CONTENT_LEN:
1623                         {
1624                                 u16* pu2Tmp;
1625                                 pu2Tmp = (u16*)pOut;
1626                                 *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1627                         }
1628                         break;
1629                 case TYPE_EFUSE_CONTENT_LEN_BANK:
1630                         {
1631                                 u16* pu2Tmp;
1632                                 pu2Tmp = (u16*)pOut;
1633                                 *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1634                         }
1635                         break;
1636                 case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
1637                         {
1638                                 u16* pu2Tmp;
1639                                 pu2Tmp = (u16*)pOut;
1640                                 *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1641                         }
1642                         break;
1643                 case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
1644                         {
1645                                 u16* pu2Tmp;
1646                                 pu2Tmp = (u16*)pOut;
1647                                 *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1648                         }
1649                         break;
1650                 case TYPE_EFUSE_MAP_LEN:
1651                         {
1652                                 u16* pu2Tmp;
1653                                 pu2Tmp = (u16*)pOut;
1654                                 *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
1655                         }
1656                         break;
1657                 case TYPE_EFUSE_PROTECT_BYTES_BANK:
1658                         {
1659                                 u8* pu1Tmp;
1660                                 pu1Tmp = (u8*)pOut;
1661                                 *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
1662                         }
1663                         break;
1664                 default:
1665                         {
1666                                 u8* pu1Tmp;
1667                                 pu1Tmp = (u8*)pOut;
1668                                 *pu1Tmp = 0;
1669                         }
1670                         break;
1671         }
1672 }
1673 VOID
1674 Hal_EFUSEGetEfuseDefinition_Pseudo88E(
1675         IN              PADAPTER        pAdapter,
1676         IN              u8                      efuseType,
1677         IN              u8                      type,
1678         OUT             PVOID           pOut
1679         )
1680 {
1681         switch(type)
1682         {
1683                 case TYPE_EFUSE_MAX_SECTION:
1684                         {
1685                                 u8*             pMax_section;
1686                                 pMax_section = (pu1Byte)pOut;
1687                                 *pMax_section = EFUSE_MAX_SECTION_88E;
1688                         }
1689                         break;
1690                 case TYPE_EFUSE_REAL_CONTENT_LEN:
1691                         {
1692                                 u16* pu2Tmp;
1693                                 pu2Tmp = (pu2Byte)pOut;
1694                                 *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1695                         }
1696                         break;
1697                 case TYPE_EFUSE_CONTENT_LEN_BANK:
1698                         {
1699                                 u16* pu2Tmp;
1700                                 pu2Tmp = (pu2Byte)pOut;
1701                                 *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1702                         }
1703                         break;
1704                 case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
1705                         {
1706                                 u16* pu2Tmp;
1707                                 pu2Tmp = (pu2Byte)pOut;
1708                                 *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1709                         }
1710                         break;
1711                 case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
1712                         {
1713                                 u16* pu2Tmp;
1714                                 pu2Tmp = (pu2Byte)pOut;
1715                                 *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1716                         }
1717                         break;
1718                 case TYPE_EFUSE_MAP_LEN:
1719                         {
1720                                 u16* pu2Tmp;
1721                                 pu2Tmp = (pu2Byte)pOut;
1722                                 *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E;
1723                         }
1724                         break;
1725                 case TYPE_EFUSE_PROTECT_BYTES_BANK:
1726                         {
1727                                 u8* pu1Tmp;
1728                                 pu1Tmp = (u8*)pOut;
1729                                 *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
1730                         }
1731                         break;
1732                 default:
1733                         {
1734                                 u8* pu1Tmp;
1735                                 pu1Tmp = (u8*)pOut;
1736                                 *pu1Tmp = 0;
1737                         }
1738                         break;
1739         }
1740 }
1741
1742
1743 static VOID
1744 rtl8188e_EFUSE_GetEfuseDefinition(
1745         IN              PADAPTER        pAdapter,
1746         IN              u8              efuseType,
1747         IN              u8              type,
1748         OUT             void            *pOut,
1749         IN              BOOLEAN         bPseudoTest
1750         )
1751 {
1752         if(bPseudoTest)
1753         {
1754                 Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut);
1755         }
1756         else
1757         {
1758                 Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut);
1759         }
1760 }
1761
1762 static u8
1763 Hal_EfuseWordEnableDataWrite(   IN      PADAPTER        pAdapter,
1764                                                         IN      u16             efuse_addr,
1765                                                         IN      u8              word_en,
1766                                                         IN      u8              *data,
1767                                                         IN      BOOLEAN         bPseudoTest)
1768 {
1769         u16     tmpaddr = 0;
1770         u16     start_addr = efuse_addr;
1771         u8      badworden = 0x0F;
1772         u8      tmpdata[8];
1773
1774         _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE);
1775         //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr));
1776
1777         if(!(word_en&BIT0))
1778         {
1779                 tmpaddr = start_addr;
1780                 efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest);
1781                 efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest);
1782
1783                 efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest);
1784                 efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest);
1785                 if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
1786                         badworden &= (~BIT0);
1787                 }
1788         }
1789         if(!(word_en&BIT1))
1790         {
1791                 tmpaddr = start_addr;
1792                 efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest);
1793                 efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest);
1794
1795                 efuse_OneByteRead(pAdapter,tmpaddr    , &tmpdata[2], bPseudoTest);
1796                 efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest);
1797                 if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
1798                         badworden &=( ~BIT1);
1799                 }
1800         }
1801         if(!(word_en&BIT2))
1802         {
1803                 tmpaddr = start_addr;
1804                 efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest);
1805                 efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest);
1806
1807                 efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest);
1808                 efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest);
1809                 if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
1810                         badworden &=( ~BIT2);
1811                 }
1812         }
1813         if(!(word_en&BIT3))
1814         {
1815                 tmpaddr = start_addr;
1816                 efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest);
1817                 efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest);
1818
1819                 efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest);
1820                 efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest);
1821                 if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
1822                         badworden &=( ~BIT3);
1823                 }
1824         }
1825         return badworden;
1826 }
1827
1828 static u8
1829 Hal_EfuseWordEnableDataWrite_Pseudo(    IN      PADAPTER        pAdapter,
1830                                                         IN      u16             efuse_addr,
1831                                                         IN      u8              word_en,
1832                                                         IN      u8              *data,
1833                                                         IN      BOOLEAN         bPseudoTest)
1834 {
1835         u8      ret=0;
1836
1837         ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1838
1839         return ret;
1840 }
1841
1842 static u8
1843 rtl8188e_Efuse_WordEnableDataWrite(     IN      PADAPTER        pAdapter,
1844                                                         IN      u16             efuse_addr,
1845                                                         IN      u8              word_en,
1846                                                         IN      u8              *data,
1847                                                         IN      BOOLEAN         bPseudoTest)
1848 {
1849         u8      ret=0;
1850
1851         if(bPseudoTest)
1852         {
1853                 ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1854         }
1855         else
1856         {
1857                 ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1858         }
1859
1860         return ret;
1861 }
1862
1863
1864 static u16
1865 hal_EfuseGetCurrentSize_8188e(IN        PADAPTER        pAdapter,
1866                 IN              BOOLEAN                 bPseudoTest)
1867 {
1868         int     bContinual = _TRUE;
1869
1870         u16     efuse_addr = 0;
1871         u8      hoffset=0,hworden=0;
1872         u8      efuse_data,word_cnts=0;
1873
1874         if(bPseudoTest)
1875         {
1876                 efuse_addr = (u16)(fakeEfuseUsedBytes);
1877         }
1878         else
1879         {
1880                 rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1881         }
1882         //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr));
1883
1884         while ( bContinual &&
1885                         efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) &&
1886                         AVAILABLE_EFUSE_ADDR(efuse_addr))
1887         {
1888                 if(efuse_data!=0xFF)
1889                 {
1890                         if((efuse_data&0x1F) == 0x0F)           //extended header
1891                         {
1892                                 hoffset = efuse_data;
1893                                 efuse_addr++;
1894                                 efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
1895                                 if((efuse_data & 0x0F) == 0x0F)
1896                                 {
1897                                         efuse_addr++;
1898                                         continue;
1899                                 }
1900                                 else
1901                                 {
1902                                         hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1903                                         hworden = efuse_data & 0x0F;
1904                                 }
1905                         }
1906                         else
1907                         {
1908                                 hoffset = (efuse_data>>4) & 0x0F;
1909                                 hworden =  efuse_data & 0x0F;
1910                         }
1911                         word_cnts = Efuse_CalculateWordCnts(hworden);
1912                         //read next header
1913                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1914                 }
1915                 else
1916                 {
1917                         bContinual = _FALSE ;
1918                 }
1919         }
1920
1921         if(bPseudoTest)
1922         {
1923                 fakeEfuseUsedBytes = efuse_addr;
1924                 //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes));
1925         }
1926         else
1927         {
1928                 rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1929                 //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr));
1930         }
1931
1932         return efuse_addr;
1933 }
1934
1935 static u16
1936 Hal_EfuseGetCurrentSize_Pseudo(IN       PADAPTER        pAdapter,
1937                 IN              BOOLEAN                 bPseudoTest)
1938 {
1939         u16     ret=0;
1940
1941         ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1942
1943         return ret;
1944 }
1945
1946
1947 static u16
1948 rtl8188e_EfuseGetCurrentSize(
1949         IN      PADAPTER        pAdapter,
1950         IN      u8                      efuseType,
1951         IN      BOOLEAN         bPseudoTest)
1952 {
1953         u16     ret=0;
1954
1955         if(bPseudoTest)
1956         {
1957                 ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
1958         }
1959         else
1960         {
1961                 ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1962
1963         }
1964
1965         return ret;
1966 }
1967
1968
1969 static int
1970 hal_EfusePgPacketRead_8188e(
1971         IN      PADAPTER        pAdapter,
1972         IN      u8                      offset,
1973         IN      u8                      *data,
1974         IN      BOOLEAN         bPseudoTest)
1975 {
1976         u8      ReadState = PG_STATE_HEADER;
1977
1978         int     bContinual = _TRUE;
1979         int     bDataEmpty = _TRUE ;
1980
1981         u8      efuse_data,word_cnts = 0;
1982         u16     efuse_addr = 0;
1983         u8      hoffset = 0,hworden = 0;
1984         u8      tmpidx = 0;
1985         u8      tmpdata[8];
1986         u8      max_section = 0;
1987         u8      tmp_header = 0;
1988
1989         EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest);
1990
1991         if(data==NULL)
1992                 return _FALSE;
1993         if(offset>max_section)
1994                 return _FALSE;
1995
1996         _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1997         _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1998
1999
2000         //
2001         // <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
2002         // Skip dummy parts to prevent unexpected data read from Efuse.
2003         // By pass right now. 2009.02.19.
2004         //
2005         while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) )
2006         {
2007                 //-------  Header Read -------------
2008                 if(ReadState & PG_STATE_HEADER)
2009                 {
2010                         if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF))
2011                         {
2012                                 if(EXT_HEADER(efuse_data))
2013                                 {
2014                                         tmp_header = efuse_data;
2015                                         efuse_addr++;
2016                                         efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
2017                                         if(!ALL_WORDS_DISABLED(efuse_data))
2018                                         {
2019                                                 hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
2020                                                 hworden = efuse_data & 0x0F;
2021                                         }
2022                                         else
2023                                         {
2024                                                 DBG_8192C("Error, All words disabled\n");
2025                                                 efuse_addr++;
2026                                                 continue;
2027                                         }
2028                                 }
2029                                 else
2030                                 {
2031                                         hoffset = (efuse_data>>4) & 0x0F;
2032                                         hworden =  efuse_data & 0x0F;
2033                                 }
2034                                 word_cnts = Efuse_CalculateWordCnts(hworden);
2035                                 bDataEmpty = _TRUE ;
2036
2037                                 if(hoffset==offset)
2038                                 {
2039                                         for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++)
2040                                         {
2041                                                 if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) )
2042                                                 {
2043                                                         tmpdata[tmpidx] = efuse_data;
2044                                                         if(efuse_data!=0xff)
2045                                                         {
2046                                                                 bDataEmpty = _FALSE;
2047                                                         }
2048                                                 }
2049                                         }
2050                                         if(bDataEmpty==_FALSE){
2051                                                 ReadState = PG_STATE_DATA;
2052                                         }else{//read next header
2053                                                 efuse_addr = efuse_addr + (word_cnts*2)+1;
2054                                                 ReadState = PG_STATE_HEADER;
2055                                         }
2056                                 }
2057                                 else{//read next header
2058                                         efuse_addr = efuse_addr + (word_cnts*2)+1;
2059                                         ReadState = PG_STATE_HEADER;
2060                                 }
2061
2062                         }
2063                         else{
2064                                 bContinual = _FALSE ;
2065                         }
2066                 }
2067                 //-------  Data section Read -------------
2068                 else if(ReadState & PG_STATE_DATA)
2069                 {
2070                         efuse_WordEnableDataRead(hworden,tmpdata,data);
2071                         efuse_addr = efuse_addr + (word_cnts*2)+1;
2072                         ReadState = PG_STATE_HEADER;
2073                 }
2074
2075         }
2076
2077         if(     (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
2078                 (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
2079                 return _FALSE;
2080         else
2081                 return _TRUE;
2082
2083 }
2084
2085 static int
2086 Hal_EfusePgPacketRead(  IN      PADAPTER        pAdapter,
2087                                         IN      u8                      offset,
2088                                         IN      u8                      *data,
2089                                         IN      BOOLEAN                 bPseudoTest)
2090 {
2091         int     ret=0;
2092
2093         ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
2094
2095
2096         return ret;
2097 }
2098
2099 static int
2100 Hal_EfusePgPacketRead_Pseudo(   IN      PADAPTER        pAdapter,
2101                                         IN      u8                      offset,
2102                                         IN      u8                      *data,
2103                                         IN      BOOLEAN         bPseudoTest)
2104 {
2105         int     ret=0;
2106
2107         ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
2108
2109         return ret;
2110 }
2111
2112 static int
2113 rtl8188e_Efuse_PgPacketRead(    IN      PADAPTER        pAdapter,
2114                                         IN      u8                      offset,
2115                                         IN      u8                      *data,
2116                                         IN      BOOLEAN         bPseudoTest)
2117 {
2118         int     ret=0;
2119
2120         if(bPseudoTest)
2121         {
2122                 ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest);
2123         }
2124         else
2125         {
2126                 ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
2127         }
2128
2129         return ret;
2130 }
2131
2132 static BOOLEAN
2133 hal_EfuseFixHeaderProcess(
2134         IN              PADAPTER                        pAdapter,
2135         IN              u8                                      efuseType,
2136         IN              PPGPKT_STRUCT           pFixPkt,
2137         IN              u16                                     *pAddr,
2138         IN              BOOLEAN                         bPseudoTest
2139 )
2140 {
2141         u8      originaldata[8], badworden=0;
2142         u16     efuse_addr=*pAddr;
2143         u32     PgWriteSuccess=0;
2144
2145         _rtw_memset((PVOID)originaldata, 0xff, 8);
2146
2147         if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest))
2148         {       //check if data exist
2149                 badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest);
2150
2151                 if(badworden != 0xf)    // write fail
2152                 {
2153                         PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
2154
2155                         if(!PgWriteSuccess)
2156                                 return _FALSE;
2157                         else
2158                                 efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
2159                 }
2160                 else
2161                 {
2162                         efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
2163                 }
2164         }
2165         else
2166         {
2167                 efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
2168         }
2169         *pAddr = efuse_addr;
2170         return _TRUE;
2171 }
2172
2173 static BOOLEAN
2174 hal_EfusePgPacketWrite2ByteHeader(
2175         IN                      PADAPTER                pAdapter,
2176         IN                      u8                              efuseType,
2177         IN                      u16                             *pAddr,
2178         IN                      PPGPKT_STRUCT   pTargetPkt,
2179         IN                      BOOLEAN                 bPseudoTest)
2180 {
2181         BOOLEAN         bRet=_FALSE, bContinual=_TRUE;
2182         u16     efuse_addr=*pAddr, efuse_max_available_len=0;
2183         u8      pg_header=0, tmp_header=0, pg_header_temp=0;
2184         u8      repeatcnt=0;
2185
2186         //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n"));
2187         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
2188
2189         while(efuse_addr < efuse_max_available_len)
2190         {
2191                 pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
2192                 //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header));
2193                 efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
2194                 efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
2195
2196                 while(tmp_header == 0xFF)
2197                 {
2198                         if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
2199                         {
2200                                 //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n"));
2201                                 return _FALSE;
2202                         }
2203
2204                         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
2205                         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
2206                 }
2207
2208                 //to write ext_header
2209                 if(tmp_header == pg_header)
2210                 {
2211                         efuse_addr++;
2212                         pg_header_temp = pg_header;
2213                         pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
2214
2215                         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
2216                         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
2217
2218                         while(tmp_header == 0xFF)
2219                         {
2220                                 if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
2221                                 {
2222                                         //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n"));
2223                                         return _FALSE;
2224                                 }
2225
2226                                 efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
2227                                 efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
2228                         }
2229
2230                         if((tmp_header & 0x0F) == 0x0F) //word_en PG fail
2231                         {
2232                                 if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
2233                                 {
2234                                         //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n"));
2235                                         return _FALSE;
2236                                 }
2237                                 else
2238                                 {
2239                                         efuse_addr++;
2240                                         continue;
2241                                 }
2242                         }
2243                         else if(pg_header != tmp_header)        //offset PG fail
2244                         {
2245                                 PGPKT_STRUCT    fixPkt;
2246                                 //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n"));
2247                                 fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
2248                                 fixPkt.word_en = tmp_header & 0x0F;
2249                                 fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
2250                                 if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
2251                                         return _FALSE;
2252                         }
2253                         else
2254                         {
2255                                 bRet = _TRUE;
2256                                 break;
2257                         }
2258                 }
2259                 else if ((tmp_header & 0x1F) == 0x0F)           //wrong extended header
2260                 {
2261                         efuse_addr+=2;
2262                         continue;
2263                 }
2264         }
2265
2266         *pAddr = efuse_addr;
2267         return bRet;
2268 }
2269
2270 static BOOLEAN
2271 hal_EfusePgPacketWrite1ByteHeader(
2272         IN                      PADAPTER                pAdapter,
2273         IN                      u8                              efuseType,
2274         IN                      u16                             *pAddr,
2275         IN                      PPGPKT_STRUCT   pTargetPkt,
2276         IN                      BOOLEAN                 bPseudoTest)
2277 {
2278         BOOLEAN         bRet=_FALSE;
2279         u8      pg_header=0, tmp_header=0;
2280         u16     efuse_addr=*pAddr;
2281         u8      repeatcnt=0;
2282
2283         //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n"));
2284         pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en;
2285
2286         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
2287         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
2288
2289         while(tmp_header == 0xFF)
2290         {
2291                 if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
2292                 {
2293                         return _FALSE;
2294                 }
2295                 efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
2296                 efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);
2297         }
2298
2299         if(pg_header == tmp_header)
2300         {
2301                 bRet = _TRUE;
2302         }
2303         else
2304         {
2305                 PGPKT_STRUCT    fixPkt;
2306                 //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n"));
2307                 fixPkt.offset = (tmp_header>>4) & 0x0F;
2308                 fixPkt.word_en = tmp_header & 0x0F;
2309                 fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
2310                 if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
2311                         return _FALSE;
2312         }
2313
2314         *pAddr = efuse_addr;
2315         return bRet;
2316 }
2317
2318 static BOOLEAN
2319 hal_EfusePgPacketWriteData(
2320         IN                      PADAPTER                pAdapter,
2321         IN                      u8                              efuseType,
2322         IN                      u16                             *pAddr,
2323         IN                      PPGPKT_STRUCT   pTargetPkt,
2324         IN                      BOOLEAN                 bPseudoTest)
2325 {
2326         BOOLEAN bRet=_FALSE;
2327         u16     efuse_addr=*pAddr;
2328         u8      badworden=0;
2329         u32     PgWriteSuccess=0;
2330
2331         badworden = 0x0f;
2332         badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
2333         if(badworden == 0x0F)
2334         {
2335                 // write ok
2336                 //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n"));
2337                 return _TRUE;
2338         }
2339         else
2340         {
2341                 //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n"));
2342                 //reorganize other pg packet
2343
2344                 PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
2345
2346                 if(!PgWriteSuccess)
2347                         return _FALSE;
2348                 else
2349                         return _TRUE;
2350         }
2351
2352         return bRet;
2353 }
2354
2355 static BOOLEAN
2356 hal_EfusePgPacketWriteHeader(
2357         IN                      PADAPTER                pAdapter,
2358         IN                      u8                              efuseType,
2359         IN                      u16                             *pAddr,
2360         IN                      PPGPKT_STRUCT   pTargetPkt,
2361         IN                      BOOLEAN                 bPseudoTest)
2362 {
2363         BOOLEAN         bRet=_FALSE;
2364
2365         if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
2366         {
2367                 bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
2368         }
2369         else
2370         {
2371                 bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
2372         }
2373
2374         return bRet;
2375 }
2376
2377 static BOOLEAN
2378 wordEnMatched(
2379         IN      PPGPKT_STRUCT   pTargetPkt,
2380         IN      PPGPKT_STRUCT   pCurPkt,
2381         IN      u8                              *pWden
2382 )
2383 {
2384         u8      match_word_en = 0x0F;   // default all words are disabled
2385         u8      i;
2386
2387         // check if the same words are enabled both target and current PG packet
2388         if( ((pTargetPkt->word_en & BIT0) == 0) &&
2389                 ((pCurPkt->word_en & BIT0) == 0) )
2390         {
2391                 match_word_en &= ~BIT0;                         // enable word 0
2392         }
2393         if( ((pTargetPkt->word_en & BIT1) == 0) &&
2394                 ((pCurPkt->word_en & BIT1) == 0) )
2395         {
2396                 match_word_en &= ~BIT1;                         // enable word 1
2397         }
2398         if( ((pTargetPkt->word_en & BIT2) == 0) &&
2399                 ((pCurPkt->word_en & BIT2) == 0) )
2400         {
2401                 match_word_en &= ~BIT2;                         // enable word 2
2402         }
2403         if( ((pTargetPkt->word_en & BIT3) == 0) &&
2404                 ((pCurPkt->word_en & BIT3) == 0) )
2405         {
2406                 match_word_en &= ~BIT3;                         // enable word 3
2407         }
2408
2409         *pWden = match_word_en;
2410
2411         if(match_word_en != 0xf)
2412                 return _TRUE;
2413         else
2414                 return _FALSE;
2415 }
2416
2417 static BOOLEAN
2418 hal_EfuseCheckIfDatafollowed(
2419         IN              PADAPTER                pAdapter,
2420         IN              u8                              word_cnts,
2421         IN              u16                             startAddr,
2422         IN              BOOLEAN                 bPseudoTest
2423         )
2424 {
2425         BOOLEAN         bRet=_FALSE;
2426         u8      i, efuse_data;
2427
2428         for(i=0; i<(word_cnts*2) ; i++)
2429         {
2430                 if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF))
2431                         bRet = _TRUE;
2432         }
2433
2434         return bRet;
2435 }
2436
2437 static BOOLEAN
2438 hal_EfusePartialWriteCheck(
2439                                         IN      PADAPTER                pAdapter,
2440                                         IN      u8                              efuseType,
2441                                         IN      u16                             *pAddr,
2442                                         IN      PPGPKT_STRUCT   pTargetPkt,
2443                                         IN      BOOLEAN                 bPseudoTest
2444                                         )
2445 {
2446         BOOLEAN         bRet=_FALSE;
2447         u8      i, efuse_data=0, cur_header=0;
2448         u8      new_wden=0, matched_wden=0, badworden=0;
2449         u16     startAddr=0, efuse_max_available_len=0, efuse_max=0;
2450         PGPKT_STRUCT    curPkt;
2451
2452         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
2453         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest);
2454
2455         if(efuseType == EFUSE_WIFI)
2456         {
2457                 if(bPseudoTest)
2458                 {
2459                         startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
2460                 }
2461                 else
2462                 {
2463                         rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
2464                         startAddr%=EFUSE_REAL_CONTENT_LEN;
2465                 }
2466         }
2467         else
2468         {
2469                 if(bPseudoTest)
2470                 {
2471                         startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
2472                 }
2473                 else
2474                 {
2475                         startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
2476                 }
2477         }
2478         //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr));
2479
2480         while(1)
2481         {
2482                 if(startAddr >= efuse_max_available_len)
2483                 {
2484                         bRet = _FALSE;
2485                         break;
2486                 }
2487
2488                 if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF))
2489                 {
2490                         if(EXT_HEADER(efuse_data))
2491                         {
2492                                 cur_header = efuse_data;
2493                                 startAddr++;
2494                                 efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
2495                                 if(ALL_WORDS_DISABLED(efuse_data))
2496                                 {
2497                                         //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled"));
2498                                         bRet = _FALSE;
2499                                         break;
2500                                 }
2501                                 else
2502                                 {
2503                                         curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
2504                                         curPkt.word_en = efuse_data & 0x0F;
2505                                 }
2506                         }
2507                         else
2508                         {
2509                                 cur_header  =  efuse_data;
2510                                 curPkt.offset = (cur_header>>4) & 0x0F;
2511                                 curPkt.word_en = cur_header & 0x0F;
2512                         }
2513
2514                         curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
2515                         // if same header is found but no data followed
2516                         // write some part of data followed by the header.
2517                         if( (curPkt.offset == pTargetPkt->offset) &&
2518                                 (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) &&
2519                                 wordEnMatched(pTargetPkt, &curPkt, &matched_wden) )
2520                         {
2521                                 //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n"));
2522                                 // Here to write partial data
2523                                 badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
2524                                 if(badworden != 0x0F)
2525                                 {
2526                                         u32     PgWriteSuccess=0;
2527                                         // if write fail on some words, write these bad words again
2528
2529                                         PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
2530
2531                                         if(!PgWriteSuccess)
2532                                         {
2533                                                 bRet = _FALSE;  // write fail, return
2534                                                 break;
2535                                         }
2536                                 }
2537                                 // partial write ok, update the target packet for later use
2538                                 for(i=0; i<4; i++)
2539                                 {
2540                                         if((matched_wden & (0x1<<i)) == 0)      // this word has been written
2541                                         {
2542                                                 pTargetPkt->word_en |= (0x1<<i);        // disable the word
2543                                         }
2544                                 }
2545                                 pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
2546                         }
2547                         // read from next header
2548                         startAddr = startAddr + (curPkt.word_cnts*2) +1;
2549                 }
2550                 else
2551                 {
2552                         // not used header, 0xff
2553                         *pAddr = startAddr;
2554                         //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr));
2555                         bRet = _TRUE;
2556                         break;
2557                 }
2558         }
2559         return bRet;
2560 }
2561
2562 static BOOLEAN
2563 hal_EfusePgCheckAvailableAddr(
2564         IN      PADAPTER        pAdapter,
2565         IN      u8                      efuseType,
2566         IN      BOOLEAN         bPseudoTest
2567         )
2568 {
2569         u16     efuse_max_available_len=0;
2570
2571         //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256.
2572         EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&efuse_max_available_len, _FALSE);
2573
2574         //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest);
2575         //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len));
2576
2577         if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
2578         {
2579                 //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n"));
2580                 return _FALSE;
2581         }
2582         return _TRUE;
2583 }
2584
2585 static VOID
2586 hal_EfuseConstructPGPkt(
2587                                         IN      u8                              offset,
2588                                         IN      u8                              word_en,
2589                                         IN      u8                              *pData,
2590                                         IN      PPGPKT_STRUCT   pTargetPkt
2591
2592 )
2593 {
2594         _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8);
2595         pTargetPkt->offset = offset;
2596         pTargetPkt->word_en= word_en;
2597         efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
2598         pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
2599
2600         //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts));
2601 }
2602
2603 static BOOLEAN
2604 hal_EfusePgPacketWrite_BT(
2605                                         IN      PADAPTER        pAdapter,
2606                                         IN      u8                      offset,
2607                                         IN      u8                      word_en,
2608                                         IN      u8                      *pData,
2609                                         IN      BOOLEAN         bPseudoTest
2610                                         )
2611 {
2612         PGPKT_STRUCT    targetPkt;
2613         u16     startAddr=0;
2614         u8      efuseType=EFUSE_BT;
2615
2616         if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
2617                 return _FALSE;
2618
2619         hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
2620
2621         if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2622                 return _FALSE;
2623
2624         if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2625                 return _FALSE;
2626
2627         if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2628                 return _FALSE;
2629
2630         return _TRUE;
2631 }
2632
2633 static BOOLEAN
2634 hal_EfusePgPacketWrite_8188e(
2635                                         IN      PADAPTER                pAdapter,
2636                                         IN      u8                      offset,
2637                                         IN      u8                      word_en,
2638                                         IN      u8                      *pData,
2639                                         IN      BOOLEAN         bPseudoTest
2640                                         )
2641 {
2642         PGPKT_STRUCT    targetPkt;
2643         u16                     startAddr=0;
2644         u8                      efuseType=EFUSE_WIFI;
2645
2646         if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
2647                 return _FALSE;
2648
2649         hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
2650
2651         if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2652                 return _FALSE;
2653
2654         if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2655                 return _FALSE;
2656
2657         if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
2658                 return _FALSE;
2659
2660         return _TRUE;
2661 }
2662
2663
2664 static int
2665 Hal_EfusePgPacketWrite_Pseudo(IN        PADAPTER        pAdapter,
2666                                         IN      u8                      offset,
2667                                         IN      u8                      word_en,
2668                                         IN      u8                      *data,
2669                                         IN      BOOLEAN         bPseudoTest)
2670 {
2671         int ret;
2672
2673         ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
2674
2675         return ret;
2676 }
2677
2678 static int
2679 Hal_EfusePgPacketWrite(IN       PADAPTER        pAdapter,
2680                                         IN      u8                      offset,
2681                                         IN      u8                      word_en,
2682                                         IN      u8                      *data,
2683                                         IN      BOOLEAN         bPseudoTest)
2684 {
2685         int     ret=0;
2686         ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
2687
2688
2689         return ret;
2690 }
2691
2692 static int
2693 rtl8188e_Efuse_PgPacketWrite(IN PADAPTER        pAdapter,
2694                                         IN      u8                      offset,
2695                                         IN      u8                      word_en,
2696                                         IN      u8                      *data,
2697                                         IN      BOOLEAN         bPseudoTest)
2698 {
2699         int     ret;
2700
2701         if(bPseudoTest)
2702         {
2703                 ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest);
2704         }
2705         else
2706         {
2707                 ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
2708         }
2709         return ret;
2710 }
2711
2712 static HAL_VERSION
2713 ReadChipVersion8188E(
2714         IN      PADAPTER        padapter
2715         )
2716 {
2717         u32                             value32;
2718         HAL_VERSION                             ChipVersion;
2719         HAL_DATA_TYPE   *pHalData;
2720
2721
2722         pHalData = GET_HAL_DATA(padapter);
2723
2724         value32 = rtw_read32(padapter, REG_SYS_CFG);
2725         ChipVersion.ICType = CHIP_8188E ;
2726         ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
2727
2728         ChipVersion.RFType = RF_TYPE_1T1R;
2729         ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
2730         ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT)
2731
2732         // For regulator mode. by tynli. 2011.01.14
2733         pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
2734
2735         ChipVersion.ROMVer = 0; // ROM code version.
2736         pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
2737
2738
2739 //#if DBG
2740 #if 1
2741         dump_chip_info(ChipVersion);
2742 #endif
2743
2744         pHalData->VersionID = ChipVersion;
2745
2746         if (IS_1T2R(ChipVersion)){
2747                 pHalData->rf_type = RF_1T2R;
2748                 pHalData->NumTotalRFPath = 2;
2749         }
2750         else if (IS_2T2R(ChipVersion)){
2751                 pHalData->rf_type = RF_2T2R;
2752                 pHalData->NumTotalRFPath = 2;
2753         }
2754         else{
2755                 pHalData->rf_type = RF_1T1R;
2756                 pHalData->NumTotalRFPath = 1;
2757         }
2758
2759         MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type);
2760
2761         return ChipVersion;
2762 }
2763
2764 static void rtl8188e_read_chip_version(PADAPTER padapter)
2765 {
2766         ReadChipVersion8188E(padapter);
2767 }
2768 void rtl8188e_GetHalODMVar(
2769         PADAPTER                                Adapter,
2770         HAL_ODM_VARIABLE                eVariable,
2771         PVOID                                   pValue1,
2772         BOOLEAN                                 bSet)
2773 {
2774         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
2775         PDM_ODM_T podmpriv = &pHalData->odmpriv;
2776         switch(eVariable){
2777                 case HAL_ODM_STA_INFO:
2778                         break;
2779                 default:
2780                         break;
2781         }
2782 }
2783 void rtl8188e_SetHalODMVar(
2784         PADAPTER                                Adapter,
2785         HAL_ODM_VARIABLE                eVariable,
2786         PVOID                                   pValue1,
2787         BOOLEAN                                 bSet)
2788 {
2789         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
2790         PDM_ODM_T podmpriv = &pHalData->odmpriv;
2791         //_irqL irqL;
2792         switch(eVariable){
2793                 case HAL_ODM_STA_INFO:
2794                         {
2795                                 struct sta_info *psta = (struct sta_info *)pValue1;
2796                                 if(bSet){
2797                                         DBG_8192C("### Set STA_(%d) info\n",psta->mac_id);
2798                                         ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta);
2799                                         #if(RATE_ADAPTIVE_SUPPORT==1)
2800                                         ODM_RAInfo_Init(podmpriv,psta->mac_id);
2801                                         #endif
2802                                 }
2803                                 else{
2804                                         DBG_8192C("### Clean STA_(%d) info\n",psta->mac_id);
2805                                         //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
2806                                         ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL);
2807
2808                                         //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
2809                                     }
2810                         }
2811                         break;
2812                 case HAL_ODM_P2P_STATE:
2813                                 ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet);
2814                         break;
2815                 case HAL_ODM_WIFI_DISPLAY_STATE:
2816                                 ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet);
2817                         break;
2818                 default:
2819                         break;
2820         }
2821 }
2822
2823 void rtl8188e_start_thread(_adapter *padapter)
2824 {
2825 #ifdef CONFIG_SDIO_HCI
2826 #ifndef CONFIG_SDIO_TX_TASKLET
2827         struct xmit_priv *xmitpriv = &padapter->xmitpriv;
2828
2829         xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT");
2830         if (IS_ERR(xmitpriv->SdioXmitThread))
2831         {
2832                 RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __FUNCTION__));
2833         }
2834 #endif
2835 #endif
2836 }
2837
2838 void rtl8188e_stop_thread(_adapter *padapter)
2839 {
2840 #ifdef CONFIG_SDIO_HCI
2841 #ifndef CONFIG_SDIO_TX_TASKLET
2842         struct xmit_priv *xmitpriv = &padapter->xmitpriv;
2843
2844         // stop xmit_buf_thread
2845         if (xmitpriv->SdioXmitThread ) {
2846                 _rtw_up_sema(&xmitpriv->SdioXmitSema);
2847                 _rtw_down_sema(&xmitpriv->SdioXmitTerminateSema);
2848                 xmitpriv->SdioXmitThread = 0;
2849         }
2850 #endif
2851 #endif
2852 }
2853 void hal_notch_filter_8188e(_adapter *adapter, bool enable)
2854 {
2855         if (enable) {
2856                 DBG_871X("Enable notch filter\n");
2857                 rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
2858         } else {
2859                 DBG_871X("Disable notch filter\n");
2860                 rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
2861         }
2862 }
2863
2864 void UpdateHalRAMask8188E(PADAPTER padapter, u32 mac_id, u8 rssi_level)
2865 {
2866         u32     mask,rate_bitmap;
2867         u8      shortGIrate = _FALSE;
2868         struct sta_info *psta;
2869         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
2870         //struct dm_priv        *pdmpriv = &pHalData->dmpriv;
2871         struct mlme_ext_priv    *pmlmeext = &padapter->mlmeextpriv;
2872         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2873
2874         if (mac_id >= NUM_STA) //CAM_SIZE
2875         {
2876                 return;
2877         }
2878
2879         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
2880         if(psta == NULL)
2881         {
2882                 return;
2883         }
2884
2885         shortGIrate = query_ra_short_GI(psta);
2886
2887         mask = psta->ra_mask;
2888
2889         rate_bitmap = 0xffffffff;
2890         rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level);
2891         DBG_871X("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2892                         __FUNCTION__,mac_id,psta->wireless_mode,mask,rssi_level,rate_bitmap);
2893
2894         mask &= rate_bitmap;
2895
2896         if(pHalData->fw_ractrl == _TRUE)
2897         {
2898                 u8 arg = 0;
2899
2900                 //arg = (cam_idx-4)&0x1f;//MACID
2901                 arg = mac_id&0x1f;//MACID
2902
2903                 arg |= BIT(7);
2904
2905                 if (shortGIrate==_TRUE)
2906                         arg |= BIT(5);
2907                 mask |= ((psta->raid<<28)&0xf0000000);
2908                 DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
2909
2910 #ifdef CONFIG_INTEL_PROXIM
2911                 if(padapter->proximity.proxim_on ==_TRUE){
2912                         arg &= ~BIT(6);
2913                 }
2914                 else {
2915                         arg |= BIT(6);
2916                 }
2917 #endif //CONFIG_INTEL_PROXIM
2918
2919                 //to do ,for 8188E-SMIC
2920                 /*
2921                 *(pu4Byte)&RateMask=EF4Byte((ratr_bitmap&0x0fffffff) | (ratr_index<<28));
2922                 RateMask[4] = macId | (bShortGI?0x20:0x00) | 0x80;
2923                 */
2924                 rtl8188e_set_raid_cmd(padapter, mask);
2925
2926         }
2927         else
2928         {
2929
2930 #if(RATE_ADAPTIVE_SUPPORT == 1)
2931
2932                 ODM_RA_UpdateRateInfo_8188E(
2933                                 &(pHalData->odmpriv),
2934                                 mac_id,
2935                                 psta->raid,
2936                                 mask,
2937                                 shortGIrate
2938                                 );
2939
2940 #endif
2941         }
2942 }
2943
2944 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
2945 {
2946         pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
2947
2948         pHalFunc->dm_init = &rtl8188e_init_dm_priv;
2949         pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv;
2950
2951         pHalFunc->read_chip_version = &rtl8188e_read_chip_version;
2952
2953         pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8188E;
2954
2955         pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E;
2956         pHalFunc->set_channel_handler = &PHY_SwChnl8188E;
2957         pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8188E;
2958
2959         pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8188E;
2960         pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8188E;
2961
2962         pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
2963
2964         pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
2965
2966         pHalFunc->run_thread= &rtl8188e_start_thread;
2967         pHalFunc->cancel_thread= &rtl8188e_stop_thread;
2968
2969 #ifdef CONFIG_ANTENNA_DIVERSITY
2970         pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
2971         pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
2972 #endif
2973
2974         pHalFunc->read_bbreg = &PHY_QueryBBReg8188E;
2975         pHalFunc->write_bbreg = &PHY_SetBBReg8188E;
2976         pHalFunc->read_rfreg = &PHY_QueryRFReg8188E;
2977         pHalFunc->write_rfreg = &PHY_SetRFReg8188E;
2978
2979
2980         // Efuse related function
2981         pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch;
2982         pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse;
2983         pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition;
2984         pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize;
2985         pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead;
2986         pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite;
2987         pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite;
2988
2989 #ifdef DBG_CONFIG_ERROR_DETECT
2990         pHalFunc->sreset_init_value = &sreset_init_value;
2991         pHalFunc->sreset_reset_value = &sreset_reset_value;
2992         pHalFunc->silentreset = &sreset_reset;
2993         pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check;
2994         pHalFunc->sreset_linked_status_check  = &rtl8188e_sreset_linked_status_check;
2995         pHalFunc->sreset_get_wifi_status  = &sreset_get_wifi_status;
2996         pHalFunc->sreset_inprogress= &sreset_inprogress;
2997 #endif //DBG_CONFIG_ERROR_DETECT
2998
2999         pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar;
3000         pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
3001
3002 #ifdef CONFIG_IOL
3003         pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync;
3004 #endif
3005
3006         pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
3007
3008 }
3009
3010 u8 GetEEPROMSize8188E(PADAPTER padapter)
3011 {
3012         u8 size = 0;
3013         u32     cr;
3014
3015         cr = rtw_read16(padapter, REG_9346CR);
3016         // 6: EEPROM used is 93C46, 4: boot from E-Fuse.
3017         size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
3018
3019         MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
3020
3021         return size;
3022 }
3023
3024 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI)
3025 //-------------------------------------------------------------------------
3026 //
3027 // LLT R/W/Init function
3028 //
3029 //-------------------------------------------------------------------------
3030 s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data)
3031 {
3032         s32     status = _SUCCESS;
3033         s8      count = POLLING_LLT_THRESHOLD;
3034         u32     value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
3035
3036         rtw_write32(padapter, REG_LLT_INIT, value);
3037
3038         //polling
3039         do {
3040                 value = rtw_read32(padapter, REG_LLT_INIT);
3041                 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
3042                         break;
3043                 }
3044         } while (--count);
3045
3046         if(count<=0){
3047                 DBG_871X("Failed to polling write LLT done at address %d!\n", address);
3048                 status = _FAIL;
3049         }
3050
3051         return status;
3052 }
3053
3054 u8 _LLTRead(PADAPTER padapter, u32 address)
3055 {
3056         s32     count = 0;
3057         u32     value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS);
3058         u16     LLTReg = REG_LLT_INIT;
3059
3060
3061         rtw_write32(padapter, LLTReg, value);
3062
3063         //polling and get value
3064         do {
3065                 value = rtw_read32(padapter, LLTReg);
3066                 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
3067                         return (u8)value;
3068                 }
3069
3070                 if (count > POLLING_LLT_THRESHOLD) {
3071                         RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address));
3072                         break;
3073                 }
3074         } while (count++);
3075
3076         return 0xFF;
3077 }
3078
3079 s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy)
3080 {
3081         s32     status = _FAIL;
3082         u32     i;
3083         u32     Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E;// 176, 22k
3084         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
3085
3086 #if defined(CONFIG_IOL_LLT)
3087         if(rtw_IOL_applied(padapter))
3088         {
3089                 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
3090         }
3091         else
3092 #endif
3093         {
3094                 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
3095                         status = _LLTWrite(padapter, i, i + 1);
3096                         if (_SUCCESS != status) {
3097                                 return status;
3098                         }
3099                 }
3100
3101                 // end of list
3102                 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
3103                 if (_SUCCESS != status) {
3104                         return status;
3105                 }
3106
3107                 // Make the other pages as ring buffer
3108                 // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer.
3109                 // Otherwise used as local loopback buffer.
3110                 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
3111                         status = _LLTWrite(padapter, i, (i + 1));
3112                         if (_SUCCESS != status) {
3113                                 return status;
3114                         }
3115                 }
3116
3117                 // Let last entry point to the start entry of ring buffer
3118                 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
3119                 if (_SUCCESS != status) {
3120                         return status;
3121                 }
3122         }
3123
3124         return status;
3125 }
3126 #endif
3127
3128
3129 void
3130 Hal_InitPGData88E(PADAPTER      padapter)
3131 {
3132         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
3133 //      HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3134         u32                     i;
3135         u16                     value16;
3136
3137         if(_FALSE == pEEPROM->bautoload_fail_flag)
3138         { // autoload OK.
3139                 if (is_boot_from_eeprom(padapter))
3140                 {
3141                         // Read all Content from EEPROM or EFUSE.
3142                         for(i = 0; i < HWSET_MAX_SIZE_88E; i += 2)
3143                         {
3144 //                              value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1)));
3145 //                              *((u16*)(&PROMContent[i])) = value16;
3146                         }
3147                 }
3148                 else
3149                 {
3150                         // Read EFUSE real map to shadow.
3151                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE);
3152                 }
3153         }
3154         else
3155         {//autoload fail
3156                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
3157 //              pHalData->AutoloadFailFlag = _TRUE;
3158                 //update to default value 0xFF
3159                 if (!is_boot_from_eeprom(padapter))
3160                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE);
3161         }
3162 }
3163
3164 void
3165 Hal_EfuseParseIDCode88E(
3166         IN      PADAPTER        padapter,
3167         IN      u8                      *hwinfo
3168         )
3169 {
3170         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
3171 //      HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3172         u16                     EEPROMId;
3173
3174
3175         // Checl 0x8129 again for making sure autoload status!!
3176         EEPROMId = le16_to_cpu(*((u16*)hwinfo));
3177         if (EEPROMId != RTL_EEPROM_ID)
3178         {
3179                 DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
3180                 pEEPROM->bautoload_fail_flag = _TRUE;
3181         }
3182         else
3183         {
3184                 pEEPROM->bautoload_fail_flag = _FALSE;
3185         }
3186
3187         DBG_871X("EEPROM ID=0x%04x\n", EEPROMId);
3188 }
3189
3190 static void
3191 Hal_ReadPowerValueFromPROM_8188E(
3192         IN      PADAPTER                padapter,
3193         IN      PTxPowerInfo24G pwrInfo24G,
3194         IN      u8*                             PROMContent,
3195         IN      BOOLEAN                 AutoLoadFail
3196         )
3197 {
3198         u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0;
3199         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3200
3201         _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G));
3202
3203         if(AutoLoadFail)
3204         {
3205                 for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++)
3206                 {
3207                         //2.4G default value
3208                         for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++)
3209                         {
3210                                 pwrInfo24G->IndexCCK_Base[rfPath][group] =      EEPROM_DEFAULT_24G_INDEX;
3211                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
3212                         }
3213                         for(TxCount=0;TxCount<MAX_TX_COUNT;TxCount++)
3214                         {
3215                                 if(TxCount==0)
3216                                 {
3217                                         pwrInfo24G->BW20_Diff[rfPath][0] =      EEPROM_DEFAULT_24G_HT20_DIFF;
3218                                         pwrInfo24G->OFDM_Diff[rfPath][0] =      EEPROM_DEFAULT_24G_OFDM_DIFF;
3219                                 }
3220                                 else
3221                                 {
3222                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3223                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3224                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
3225                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3226                                 }
3227                         }
3228
3229
3230                 }
3231
3232                 //pHalData->bNOPG = TRUE;
3233                 return;
3234         }
3235
3236         for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++)
3237         {
3238                 //2.4G default value
3239                 for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++)
3240                 {
3241                         //printk(" IndexCCK_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr);
3242                         pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
3243                         //printk(" IndexCCK_Base:%02x \n",pwrInfo24G->IndexCCK_Base[rfPath][group] );
3244                         if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
3245                         {
3246                                 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
3247 //                              pHalData->bNOPG = TRUE;
3248                         }
3249                 }
3250                 for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++)
3251                 {
3252                         //printk(" IndexBW40_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr);
3253                         pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
3254                         //printk(" IndexBW40_Base: %02x \n",pwrInfo24G->IndexBW40_Base[rfPath][group]  );
3255                         if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
3256                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
3257                 }
3258                 for(TxCount=0;TxCount<MAX_TX_COUNT_8188E;TxCount++)
3259                 {
3260                         if(TxCount==0)
3261                         {
3262                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
3263                                 if(PROMContent[eeAddr] == 0xFF)
3264                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_HT20_DIFF;
3265                                 else
3266                                 {
3267                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
3268                                         if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)               //4bit sign number to 8 bit sign number
3269                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
3270                                 }
3271
3272                                 if(PROMContent[eeAddr] == 0xFF)
3273                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_OFDM_DIFF;
3274                                 else
3275                                 {
3276                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
3277                                         if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)               //4bit sign number to 8 bit sign number
3278                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
3279                                 }
3280                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
3281                                 eeAddr++;
3282                         }
3283                         else
3284                         {
3285                                 if(PROMContent[eeAddr] == 0xFF)
3286                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3287                                 else
3288                                 {
3289                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
3290                                         if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3)               //4bit sign number to 8 bit sign number
3291                                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
3292                                 }
3293
3294                                 if(PROMContent[eeAddr] == 0xFF)
3295                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3296                                 else
3297                                 {
3298                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
3299                                         if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)               //4bit sign number to 8 bit sign number
3300                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
3301                                 }
3302                                 eeAddr++;
3303
3304                                 if(PROMContent[eeAddr] == 0xFF)
3305                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
3306                                 else
3307                                 {
3308                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
3309                                         if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)               //4bit sign number to 8 bit sign number
3310                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
3311                                 }
3312
3313                                 if(PROMContent[eeAddr] == 0xFF)
3314                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
3315                                 else
3316                                 {
3317                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
3318                                         if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3)                //4bit sign number to 8 bit sign number
3319                                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
3320                                 }
3321                                 eeAddr++;
3322                         }
3323                 }
3324
3325         }
3326
3327
3328 }
3329
3330 static u8
3331 Hal_GetChnlGroup(
3332         IN      u8 chnl
3333         )
3334 {
3335         u8      group=0;
3336
3337         if (chnl < 3)                   // Cjanel 1-3
3338                 group = 0;
3339         else if (chnl < 9)              // Channel 4-9
3340                 group = 1;
3341         else                                    // Channel 10-14
3342                 group = 2;
3343
3344         return group;
3345 }
3346 static u8
3347 Hal_GetChnlGroup88E(
3348         IN      u8      chnl,
3349         OUT u8* pGroup
3350         )
3351 {
3352         u8 bIn24G=_TRUE;
3353
3354         if(chnl<=14)
3355         {
3356                 bIn24G=_TRUE;
3357
3358                 if (chnl < 3)                   // Chanel 1-2
3359                         *pGroup = 0;
3360                 else if (chnl < 6)              // Channel 3-5
3361                         *pGroup = 1;
3362                 else     if(chnl <9)            // Channel 6-8
3363                         *pGroup = 2;
3364                 else if(chnl <12)               // Channel 9-11
3365                         *pGroup = 3;
3366                 else if(chnl <14)               // Channel 12-13
3367                         *pGroup = 4;
3368                 else if(chnl ==14)              // Channel 14
3369                         *pGroup = 5;
3370                 else
3371                 {
3372                         //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found \n",chnl));
3373                 }
3374         }
3375         else
3376         {
3377                 bIn24G=_FALSE;
3378
3379                 if (chnl <=40)
3380                         *pGroup = 0;
3381                 else if (chnl <=48)
3382                         *pGroup = 1;
3383                 else     if(chnl <=56)
3384                         *pGroup = 2;
3385                 else if(chnl <=64)
3386                         *pGroup = 3;
3387                 else if(chnl <=104)
3388                         *pGroup = 4;
3389                 else if(chnl <=112)
3390                         *pGroup = 5;
3391                 else if(chnl <=120)
3392                         *pGroup = 5;
3393                 else if(chnl <=128)
3394                         *pGroup = 6;
3395                 else if(chnl <=136)
3396                         *pGroup = 7;
3397                 else if(chnl <=144)
3398                         *pGroup = 8;
3399                 else if(chnl <=153)
3400                         *pGroup = 9;
3401                 else if(chnl <=161)
3402                         *pGroup = 10;
3403                 else if(chnl <=177)
3404                         *pGroup = 11;
3405                 else
3406                 {
3407                         //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found \n",chnl));
3408                 }
3409
3410         }
3411         //RT_TRACE(COMP_EFUSE,DBG_LOUD,("<==Hal_GetChnlGroup88E,  Channel = %d, bIn24G =%d,\n",chnl,bIn24G));
3412         return bIn24G;
3413 }
3414
3415 void Hal_ReadPowerSavingMode88E(
3416         PADAPTER                padapter,
3417         IN      u8*                     hwinfo,
3418         IN      BOOLEAN                 AutoLoadFail
3419         )
3420 {
3421         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3422         struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
3423         u8 tmpvalue;
3424
3425         if(AutoLoadFail){
3426                 pwrctl->bHWPowerdown = _FALSE;
3427                 pwrctl->bSupportRemoteWakeup = _FALSE;
3428         }
3429         else    {
3430
3431                 //hw power down mode selection , 0:rf-off / 1:power down
3432
3433                 if(padapter->registrypriv.hwpdn_mode==2)
3434                         pwrctl->bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4);
3435                 else
3436                         pwrctl->bHWPowerdown = padapter->registrypriv.hwpdn_mode;
3437
3438                 // decide hw if support remote wakeup function
3439                 // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume
3440 #ifdef CONFIG_USB_HCI
3441                 pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE;
3442 #endif //CONFIG_USB_HCI
3443
3444                 //if(SUPPORT_HW_RADIO_DETECT(Adapter))
3445                         //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ;
3446
3447                 DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__,
3448                         pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup);
3449
3450                 DBG_8192C("### PS params=>  power_mgnt(%x),usbss_enable(%x) ###\n",padapter->registrypriv.power_mgnt,padapter->registrypriv.usbss_enable);
3451
3452         }
3453
3454 }
3455
3456 void
3457 Hal_ReadTxPowerInfo88E(
3458         IN      PADAPTER                padapter,
3459         IN      u8*                             PROMContent,
3460         IN      BOOLEAN                 AutoLoadFail
3461         )
3462 {
3463         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3464         TxPowerInfo24G          pwrInfo24G;
3465         u8                      rfPath, ch, group=0, rfPathMax=1;
3466         u8                      pwr, diff,bIn24G,TxCount;
3467
3468
3469         Hal_ReadPowerValueFromPROM_8188E(padapter, &pwrInfo24G, PROMContent, AutoLoadFail);
3470
3471         if(!AutoLoadFail)
3472                 pHalData->bTXPowerDataReadFromEEPORM = TRUE;
3473
3474         //for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++)
3475         for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++)
3476         {
3477                 for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++)
3478                 {
3479                         bIn24G = Hal_GetChnlGroup88E(ch+1,&group);
3480                         if(bIn24G)
3481                         {
3482
3483                                 pHalData->Index24G_CCK_Base[rfPath][ch]=pwrInfo24G.IndexCCK_Base[rfPath][group];
3484
3485                                 if(ch==(14-1))
3486                                         pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][4];
3487                                 else
3488                                         pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][group];
3489                         }
3490
3491                         if(bIn24G)
3492                         {
3493                                 DBG_871X("======= Path %d, Channel %d =======\n",rfPath,ch+1 );
3494                                 DBG_871X("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_CCK_Base[rfPath][ch]);
3495                                 DBG_871X("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_BW40_Base[rfPath][ch]);
3496                         }
3497                 }
3498
3499                 for(TxCount=0;TxCount<MAX_TX_COUNT_8188E;TxCount++)
3500                 {
3501                         pHalData->CCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount];
3502                         pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount];
3503                         pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount];
3504                         pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount];
3505 #if DBG
3506                         DBG_871X("======= TxCount %d =======\n",TxCount );
3507                         DBG_871X("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]);
3508                         DBG_871X("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]);
3509                         DBG_871X("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]);
3510                         DBG_871X("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]);
3511 #endif
3512                 }
3513         }
3514
3515
3516         // 2010/10/19 MH Add Regulator recognize for EU.
3517         if(!AutoLoadFail)
3518         {
3519                 struct registry_priv  *registry_par = &padapter->registrypriv;
3520
3521                 if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
3522                         pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2
3523                 else
3524                         pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7);     //bit0~2
3525
3526         }
3527         else
3528         {
3529                 pHalData->EEPROMRegulatory = 0;
3530         }
3531         DBG_871X("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
3532
3533 }
3534
3535
3536 VOID
3537 Hal_EfuseParseXtal_8188E(
3538         IN      PADAPTER                pAdapter,
3539         IN      u8*                     hwinfo,
3540         IN      BOOLEAN         AutoLoadFail
3541         )
3542 {
3543         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
3544
3545         if(!AutoLoadFail)
3546         {
3547                 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
3548                 if(pHalData->CrystalCap == 0xFF)
3549                         pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
3550         }
3551         else
3552         {
3553                 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
3554         }
3555         DBG_871X("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
3556 }
3557
3558 void
3559 Hal_EfuseParseBoardType88E(
3560         IN      PADAPTER                pAdapter,
3561         IN      u8*                             hwinfo,
3562         IN      BOOLEAN                 AutoLoadFail
3563         )
3564 {
3565         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
3566
3567         if (!AutoLoadFail)
3568                 pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5);
3569         else
3570                 pHalData->BoardType = 0;
3571         DBG_871X("Board Type: 0x%2x\n", pHalData->BoardType);
3572 }
3573
3574 void
3575 Hal_EfuseParseEEPROMVer88E(
3576         IN      PADAPTER                padapter,
3577         IN      u8*                     hwinfo,
3578         IN      BOOLEAN                 AutoLoadFail
3579         )
3580 {
3581         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3582
3583         if(!AutoLoadFail){
3584                 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
3585                 if(pHalData->EEPROMVersion == 0xFF)
3586                         pHalData->EEPROMVersion = EEPROM_Default_Version;
3587         }
3588         else{
3589                 pHalData->EEPROMVersion = 1;
3590         }
3591         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
3592                 pHalData->EEPROMVersion));
3593 }
3594
3595 void
3596 rtl8188e_EfuseParseChnlPlan(
3597         IN      PADAPTER                padapter,
3598         IN      u8*                     hwinfo,
3599         IN      BOOLEAN                 AutoLoadFail
3600         )
3601 {
3602         padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan(
3603                 padapter
3604                 , hwinfo?hwinfo[EEPROM_ChannelPlan_88E]:0xFF
3605                 , padapter->registrypriv.channel_plan
3606                 , RT_CHANNEL_DOMAIN_WORLD_NULL
3607                 , AutoLoadFail
3608         );
3609
3610         Hal_ChannelPlanToRegulation(padapter, padapter->mlmepriv.ChannelPlan);
3611
3612         DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
3613 }
3614
3615 void
3616 Hal_EfuseParseCustomerID88E(
3617         IN      PADAPTER                padapter,
3618         IN      u8*                     hwinfo,
3619         IN      BOOLEAN                 AutoLoadFail
3620         )
3621 {
3622         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3623
3624         if (!AutoLoadFail)
3625         {
3626                 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_88E];
3627                 //pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_CustomID_88E];
3628         }
3629         else
3630         {
3631                 pHalData->EEPROMCustomerID = 0;
3632                 pHalData->EEPROMSubCustomerID = 0;
3633         }
3634         DBG_871X("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
3635         //DBG_871X("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID);
3636 }
3637
3638
3639 void
3640 Hal_ReadAntennaDiversity88E(
3641         IN      PADAPTER                pAdapter,
3642         IN      u8*                             PROMContent,
3643         IN      BOOLEAN                 AutoLoadFail
3644         )
3645 {
3646         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
3647         struct registry_priv    *registry_par = &pAdapter->registrypriv;
3648
3649         if(!AutoLoadFail)
3650         {
3651                 // Antenna Diversity setting.
3652                 if(registry_par->antdiv_cfg == 2)// 2:By EFUSE
3653                 {
3654                         pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
3655                         if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
3656                                 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;;
3657                 }
3658                 else
3659                 {
3660                         pHalData->AntDivCfg = registry_par->antdiv_cfg ;  // 0:OFF , 1:ON, 2:By EFUSE
3661                 }
3662
3663                 if(registry_par->antdiv_type == 0)// If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead.
3664                 {
3665                         pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
3666                         if (pHalData->TRxAntDivType == 0xFF)
3667                                 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port)
3668                 }
3669                 else{
3670                         pHalData->TRxAntDivType = registry_par->antdiv_type ;
3671                 }
3672
3673                 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
3674                         pHalData->AntDivCfg = 1; // 0xC1[3] is ignored.
3675         }
3676         else
3677         {
3678                 pHalData->AntDivCfg = 0;
3679         }
3680
3681         DBG_871X("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n",pHalData->AntDivCfg, pHalData->TRxAntDivType);
3682
3683
3684 }
3685
3686 void
3687 Hal_ReadThermalMeter_88E(
3688         IN      PADAPTER        Adapter,
3689         IN      u8*                     PROMContent,
3690         IN      BOOLEAN         AutoloadFail
3691         )
3692 {
3693         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
3694         u1Byte                  tempval;
3695
3696         //
3697         // ThermalMeter from EEPROM
3698         //
3699         if(!AutoloadFail)
3700                 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
3701         else
3702                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
3703 //      pHalData->EEPROMThermalMeter = (tempval&0x1f);  //[4:0]
3704
3705         if(pHalData->EEPROMThermalMeter == 0xff || AutoloadFail)
3706         {
3707                 pHalData->bAPKThermalMeterIgnore = _TRUE;
3708                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
3709         }
3710
3711         //pHalData->ThermalMeter[0] = pHalData->EEPROMThermalMeter;
3712         DBG_871X("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
3713
3714 }
3715
3716
3717 void
3718 Hal_InitChannelPlan(
3719         IN              PADAPTER        padapter
3720         )
3721 {
3722 #if 0
3723         PMGNT_INFO              pMgntInfo = &(padapter->MgntInfo);
3724         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
3725
3726         if((pMgntInfo->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
3727         {
3728                 pMgntInfo->ChannelPlan = hal_MapChannelPlan8192C(padapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
3729                 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change  channel plan.
3730         }
3731         else
3732         {
3733                 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
3734         }
3735
3736         switch(pMgntInfo->ChannelPlan)
3737         {
3738                 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
3739                 {
3740                         PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
3741
3742                         pDot11dInfo->bEnabled = TRUE;
3743                 }
3744                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
3745                         break;
3746
3747                 default: //for MacOSX compiler warning.
3748                         break;
3749         }
3750
3751         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
3752         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
3753 #endif
3754 }
3755
3756 BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter)
3757 {
3758         u8 tmpvalue = 0;
3759         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
3760         struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);
3761
3762         EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue);
3763
3764         // 2010/08/25 MH INF priority > PDN Efuse value.
3765         if(tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode)
3766         {
3767                 pHalData->pwrdown = _TRUE;
3768         }
3769         else
3770         {
3771                 pHalData->pwrdown = _FALSE;
3772         }
3773
3774         DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown);
3775
3776         return pHalData->pwrdown;
3777 }       // HalDetectPwrDownMode
3778
3779 #ifdef CONFIG_WOWLAN
3780 void Hal_DetectWoWMode(PADAPTER pAdapter)
3781 {
3782         adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE;
3783         DBG_871X("%s\n", __func__);
3784 }
3785 #endif
3786
3787 //====================================================================================
3788 //
3789 // 20100209 Joseph:
3790 // This function is used only for 92C to set REG_BCN_CTRL(0x550) register.
3791 // We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate
3792 // the value of the register via atomic operation.
3793 // This prevents from race condition when setting this register.
3794 // The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function.
3795 //
3796 void SetBcnCtrlReg(
3797         PADAPTER        padapter,
3798         u8              SetBits,
3799         u8              ClearBits)
3800 {
3801         PHAL_DATA_TYPE pHalData;
3802
3803
3804         pHalData = GET_HAL_DATA(padapter);
3805
3806         pHalData->RegBcnCtrlVal |= SetBits;
3807         pHalData->RegBcnCtrlVal &= ~ClearBits;
3808
3809 #if 0
3810 //#ifdef CONFIG_SDIO_HCI
3811         if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK))
3812                 pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT;
3813 #endif
3814
3815         rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
3816 }
3817
3818 void _InitTransferPageSize(PADAPTER padapter)
3819 {
3820         // Tx page size is always 128.
3821
3822         u8 value8;
3823         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
3824         rtw_write8(padapter, REG_PBP, value8);
3825 }
3826
3827 void ResumeTxBeacon(_adapter *padapter)
3828 {
3829         HAL_DATA_TYPE*  pHalData = GET_HAL_DATA(padapter);
3830
3831         // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
3832         // which should be read from register to a global variable.
3833
3834         rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6);
3835         pHalData->RegFwHwTxQCtrl |= BIT6;
3836         rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff);
3837         pHalData->RegReg542 |= BIT0;
3838         rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
3839 }
3840
3841 void StopTxBeacon(_adapter *padapter)
3842 {
3843         HAL_DATA_TYPE*  pHalData = GET_HAL_DATA(padapter);
3844
3845         // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
3846         // which should be read from register to a global variable.
3847
3848         rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6));
3849         pHalData->RegFwHwTxQCtrl &= (~BIT6);
3850         rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64);
3851         pHalData->RegReg542 &= ~(BIT0);
3852         rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
3853
3854         CheckFwRsvdPageContent(padapter);  // 2010.06.23. Added by tynli.
3855 }
3856
3857 static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val)
3858 {
3859         u32     value_rcr, rcr_bits;
3860         u16     value_rxfltmap2;
3861         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
3862         struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
3863
3864         if (*((u8 *)val) == _HW_STATE_MONITOR_) {
3865
3866                 /* Leave IPS */
3867                 rtw_pm_set_ips(Adapter, IPS_NONE);
3868                 LeaveAllPowerSaveMode(Adapter);
3869
3870                 /* Receive all type */
3871                 rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF;
3872
3873                 /* Append FCS */
3874                 rcr_bits |= RCR_APPFCS;
3875
3876                 #if 0
3877                 /*
3878                    CRC and ICV packet will drop in recvbuf2recvframe()
3879                    We no turn on it.
3880                  */
3881                 rcr_bits |= (RCR_ACRC32 | RCR_AICV);
3882                 #endif
3883
3884                 /* Receive all data frames */
3885                 value_rxfltmap2 = 0xFFFF;
3886
3887                 value_rcr = rcr_bits;
3888                 rtw_write32(Adapter, REG_RCR, value_rcr);
3889
3890                 rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2);
3891
3892                 #if 0
3893                 /* tx pause */
3894                 rtw_write8(padapter, REG_TXPAUSE, 0xFF);
3895                 #endif
3896         } else {
3897                 /* do nothing */
3898         }
3899
3900 }
3901
3902 static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val)
3903 {
3904         u8      val8;
3905         u8      mode = *((u8 *)val);
3906
3907         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
3908
3909         /* reset RCR */
3910         rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
3911
3912         if (mode == _HW_STATE_MONITOR_) {
3913                 /* set net_type */
3914                 Set_MSR(Adapter, _HW_STATE_NOLINK_);
3915
3916                 hw_var_set_monitor(Adapter, variable, val);
3917                 return;
3918         }
3919
3920 #ifdef CONFIG_CONCURRENT_MODE
3921         if(Adapter->iface_type == IFACE_PORT1)
3922         {
3923                 // disable Port1 TSF update
3924                 rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
3925
3926                 // set net_type
3927                 val8 = rtw_read8(Adapter, MSR)&0x03;
3928                 val8 |= (mode<<2);
3929                 rtw_write8(Adapter, MSR, val8);
3930
3931                 DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode);
3932
3933                 if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
3934                 {
3935                         if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))
3936                         {
3937                                 #ifdef CONFIG_INTERRUPT_BASED_TXBCN
3938
3939                                 #ifdef  CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
3940                                 rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms
3941                                 UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E);
3942                                 #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
3943
3944                                 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
3945                                 UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E));
3946                                 #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
3947
3948                                 #endif //CONFIG_INTERRUPT_BASED_TXBCN
3949
3950
3951                                 StopTxBeacon(Adapter);
3952                         }
3953
3954                         rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function
3955                         //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18);
3956                 }
3957                 else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
3958                 {
3959                         ResumeTxBeacon(Adapter);
3960                         rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a);
3961                         //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1
3962                         rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4));
3963                 }
3964                 else if(mode == _HW_STATE_AP_)
3965                 {
3966 #ifdef CONFIG_INTERRUPT_BASED_TXBCN
3967                         #ifdef  CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
3968                         UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0);
3969                         #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
3970
3971                         #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
3972                         UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0);
3973                         #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
3974
3975 #endif //CONFIG_INTERRUPT_BASED_TXBCN
3976
3977                         ResumeTxBeacon(Adapter);
3978
3979                         rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12);
3980
3981                         //Set RCR
3982                         //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
3983                         //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
3984                         rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet
3985                         //enable to rx data frame
3986                         rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
3987                         //enable to rx ps-poll
3988                         rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
3989
3990                         //Beacon Control related register for first time
3991                         rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms
3992
3993                         //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
3994                         rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1
3995                         rtw_write16(Adapter, REG_BCNTCFG, 0x00);
3996                         rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
3997                         rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)
3998
3999                         //reset TSF2
4000                         rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
4001
4002
4003                         //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1
4004                         rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4));
4005                         //enable BCN1 Function for if2
4006                         //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received)
4007                         rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1)));
4008
4009 #ifdef CONFIG_CONCURRENT_MODE
4010                         if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE))
4011                                 rtw_write8(Adapter, REG_BCN_CTRL,
4012                                         rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION);
4013 #endif
4014                         //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked
4015                         //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5));
4016                         //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3));
4017
4018                         //dis BCN0 ATIM  WND if if1 is station
4019                         rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0));
4020
4021 #ifdef CONFIG_TSF_RESET_OFFLOAD
4022                         // Reset TSF for STA+AP concurrent mode
4023                         if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) {
4024                                 if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE)
4025                                         DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n",
4026                                                 __FUNCTION__, __LINE__);
4027                         }
4028 #endif  // CONFIG_TSF_RESET_OFFLOAD
4029                 }
4030         }
4031         else
4032 #endif //CONFIG_CONCURRENT_MODE
4033         {
4034                 // disable Port0 TSF update
4035                 rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
4036
4037                 // set net_type
4038                 val8 = rtw_read8(Adapter, MSR)&0x0c;
4039                 val8 |= mode;
4040                 rtw_write8(Adapter, MSR, val8);
4041
4042                 DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode);
4043
4044                 if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
4045                 {
4046 #ifdef CONFIG_CONCURRENT_MODE
4047                         if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))
4048 #endif //CONFIG_CONCURRENT_MODE
4049                         {
4050                         #ifdef CONFIG_INTERRUPT_BASED_TXBCN
4051                                 #ifdef  CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
4052                                 rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms
4053                                 UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E);
4054                                 #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
4055
4056                                 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
4057                                 UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E));
4058                                 #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
4059
4060                         #endif //CONFIG_INTERRUPT_BASED_TXBCN
4061                                 StopTxBeacon(Adapter);
4062                         }
4063
4064                         rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd
4065                         //rtw_write8(Adapter,REG_BCN_CTRL, 0x18);
4066                 }
4067                 else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
4068                 {
4069                         ResumeTxBeacon(Adapter);
4070                         rtw_write8(Adapter,REG_BCN_CTRL, 0x1a);
4071                         //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0
4072                         rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4));
4073                 }
4074                 else if(mode == _HW_STATE_AP_)
4075                 {
4076
4077 #ifdef CONFIG_INTERRUPT_BASED_TXBCN
4078                         #ifdef  CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
4079                         UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0);
4080                         #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
4081
4082                         #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
4083                         UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0);
4084                         #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
4085
4086 #endif //CONFIG_INTERRUPT_BASED_TXBCN
4087
4088
4089                         ResumeTxBeacon(Adapter);
4090
4091                         rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
4092
4093                         //Set RCR
4094                         //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
4095                         //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
4096                         rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet
4097                         //enable to rx data frame
4098                         rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
4099                         //enable to rx ps-poll
4100                         rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
4101
4102                         //Beacon Control related register for first time
4103                         rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms
4104
4105                         //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
4106                         rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms
4107                         rtw_write16(Adapter, REG_BCNTCFG, 0x00);
4108                         rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
4109                         rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)
4110
4111                         //reset TSF
4112                         rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
4113
4114                         //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0
4115                         rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4));
4116
4117                         //enable BCN0 Function for if1
4118                         //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received)
4119                         #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR)
4120                         rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1)));
4121                         #else
4122                         rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION |BIT(1)));
4123                         #endif
4124
4125 #ifdef CONFIG_CONCURRENT_MODE
4126                         if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE))
4127                                 rtw_write8(Adapter, REG_BCN_CTRL_1,
4128                                         rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION);
4129 #endif
4130
4131                         //dis BCN1 ATIM  WND if if2 is station
4132                         rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0));
4133 #ifdef CONFIG_TSF_RESET_OFFLOAD
4134                         // Reset TSF for STA+AP concurrent mode
4135                         if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) {
4136                                 if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE)
4137                                         DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n",
4138                                                 __FUNCTION__, __LINE__);
4139                         }
4140 #endif  // CONFIG_TSF_RESET_OFFLOAD
4141                 }
4142         }
4143 }
4144
4145 static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val)
4146 {
4147 #ifdef CONFIG_CONCURRENT_MODE
4148         u64     tsf;
4149         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
4150         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
4151         PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
4152
4153         //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
4154         tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
4155
4156         if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
4157         {
4158                 //pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
4159                 //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
4160                 StopTxBeacon(Adapter);
4161         }
4162
4163         if(Adapter->iface_type == IFACE_PORT1)
4164         {
4165                 //disable related TSF function
4166                 rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
4167
4168                 rtw_write32(Adapter, REG_TSFTR1, tsf);
4169                 rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32);
4170
4171
4172                 //enable related TSF function
4173                 rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3));
4174
4175                 // Update buddy port's TSF if it is SoftAP for beacon TX issue!
4176                 if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
4177                         && check_buddy_fwstate(Adapter, WIFI_AP_STATE)
4178                 ) {
4179                         //disable related TSF function
4180                         rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
4181
4182                         rtw_write32(Adapter, REG_TSFTR, tsf);
4183                         rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
4184
4185                         //enable related TSF function
4186                         rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
4187 #ifdef CONFIG_TSF_RESET_OFFLOAD
4188                 // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue!
4189                         if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE)
4190                                 DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n",
4191                                         __FUNCTION__, __LINE__);
4192
4193 #endif  // CONFIG_TSF_RESET_OFFLOAD
4194                 }
4195
4196
4197         }
4198         else
4199         {
4200                 //disable related TSF function
4201                 rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
4202
4203                 rtw_write32(Adapter, REG_TSFTR, tsf);
4204                 rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
4205
4206                 //enable related TSF function
4207                 rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
4208
4209                 // Update buddy port's TSF if it is SoftAP for beacon TX issue!
4210                 if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
4211                         && check_buddy_fwstate(Adapter, WIFI_AP_STATE)
4212                 ) {
4213                         //disable related TSF function
4214                         rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
4215
4216                         rtw_write32(Adapter, REG_TSFTR1, tsf);
4217                         rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32);
4218
4219                         //enable related TSF function
4220                         rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3));
4221 #ifdef CONFIG_TSF_RESET_OFFLOAD
4222                 // Update buddy port's TSF if it is SoftAP for beacon TX issue!
4223                         if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE)
4224                                 DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n",
4225                                         __FUNCTION__, __LINE__);
4226 #endif  // CONFIG_TSF_RESET_OFFLOAD
4227                 }
4228
4229         }
4230
4231
4232         if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
4233         {
4234                 //pHalData->RegTxPause  &= (~STOP_BCNQ);
4235                 //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
4236                 ResumeTxBeacon(Adapter);
4237         }
4238 #endif
4239 }
4240
4241 static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val)
4242 {
4243 #ifdef CONFIG_CONCURRENT_MODE
4244         struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv);
4245         struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
4246         struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4247         u32     value_rcr, rcr_clear_bit, value_rxfltmap2;
4248
4249 #ifdef CONFIG_FIND_BEST_CHANNEL
4250         rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA);
4251         // Recieve all data frames
4252          value_rxfltmap2 = 0xFFFF;
4253 #else /* CONFIG_FIND_BEST_CHANNEL */
4254         rcr_clear_bit = RCR_CBSSID_BCN;
4255         //config RCR to receive different BSSID & not to receive data frame
4256         value_rxfltmap2 = 0;
4257 #endif /* CONFIG_FIND_BEST_CHANNEL */
4258
4259         if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
4260                 #ifdef CONFIG_CONCURRENT_MODE
4261                 || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE)
4262                 #endif
4263         ){
4264                 rcr_clear_bit = RCR_CBSSID_BCN;
4265         }
4266 #ifdef CONFIG_TDLS
4267         // TDLS will clear RCR_CBSSID_DATA bit for connection.
4268         else if (Adapter->tdlsinfo.link_established == _TRUE)
4269         {
4270                 rcr_clear_bit = RCR_CBSSID_BCN;
4271         }
4272 #endif // CONFIG_TDLS
4273
4274         value_rcr = rtw_read32(Adapter, REG_RCR);
4275         if(*((u8 *)val))//under sitesurvey
4276         {
4277                 value_rcr &= ~(rcr_clear_bit);
4278                 rtw_write32(Adapter, REG_RCR, value_rcr);
4279                 rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2);
4280
4281                 //disable update TSF
4282                 if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
4283                 {
4284                         if(Adapter->iface_type == IFACE_PORT1)
4285                         {
4286                                 rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
4287                         }
4288                         else
4289                         {
4290                                 rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
4291                         }
4292                 }
4293
4294                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
4295                         check_buddy_fwstate(Adapter, _FW_LINKED))
4296                 {
4297                         StopTxBeacon(Adapter);
4298                 }
4299         }
4300         else//sitesurvey done
4301         {
4302                 //enable to rx data frame
4303                 //write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF);
4304                 if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE))
4305                         || check_buddy_fwstate(Adapter, (_FW_LINKED|WIFI_AP_STATE)))
4306                         rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
4307
4308                 //enable update TSF
4309                 if(Adapter->iface_type == IFACE_PORT1)
4310                         rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
4311                 else
4312                         rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
4313
4314                 value_rcr |= rcr_clear_bit;
4315                 rtw_write32(Adapter, REG_RCR, value_rcr);
4316
4317                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
4318                         check_buddy_fwstate(Adapter, _FW_LINKED))
4319                 {
4320                         ResumeTxBeacon(Adapter);
4321                 }
4322         }
4323 #endif
4324 }
4325
4326 static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val)
4327 {
4328 #ifdef CONFIG_CONCURRENT_MODE
4329         u8      RetryLimit = 0x30;
4330         u8      type = *((u8 *)val);
4331         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
4332         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
4333         EEPROM_EFUSE_PRIV       *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
4334
4335         if(type == 0) // prepare to join
4336         {
4337                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
4338                         check_buddy_fwstate(Adapter, _FW_LINKED))
4339                 {
4340                         StopTxBeacon(Adapter);
4341                 }
4342
4343                 //enable to rx data frame.Accept all data frame
4344                 //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
4345                 rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
4346
4347                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE))
4348                         rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
4349                 else
4350                         rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
4351
4352                 if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
4353                 {
4354                         RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48;
4355                 }
4356                 else // Ad-hoc Mode
4357                 {
4358                         RetryLimit = 0x7;
4359                 }
4360         }
4361         else if(type == 1) //joinbss_event call back when join res < 0
4362         {
4363                 if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_))
4364                         rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
4365
4366                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
4367                         check_buddy_fwstate(Adapter, _FW_LINKED))
4368                 {
4369                         ResumeTxBeacon(Adapter);
4370
4371                         //reset TSF 1/2 after ResumeTxBeacon
4372                         rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0));
4373
4374                 }
4375         }
4376         else if(type == 2) //sta add event call back
4377         {
4378
4379                 //enable update TSF
4380                 if(Adapter->iface_type == IFACE_PORT1)
4381                         rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
4382                 else
4383                         rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
4384
4385
4386                 if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
4387                 {
4388                         //fixed beacon issue for 8191su...........
4389                         rtw_write8(Adapter,0x542 ,0x02);
4390                         RetryLimit = 0x7;
4391                 }
4392
4393
4394                 if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) &&
4395                         check_buddy_fwstate(Adapter, _FW_LINKED))
4396                 {
4397                         ResumeTxBeacon(Adapter);
4398
4399                         //reset TSF 1/2 after ResumeTxBeacon
4400                         rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0));
4401                 }
4402
4403         }
4404
4405         rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
4406
4407 #endif
4408 }
4409
4410 void SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val)
4411 {
4412         HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
4413
4414 _func_enter_;
4415
4416         switch (variable) {
4417         case HW_VAR_SET_OPMODE:
4418                 hw_var_set_opmode(adapter, variable, val);
4419                 break;
4420         case HW_VAR_BASIC_RATE:
4421         {
4422                 struct mlme_ext_info *mlmext_info = &adapter->mlmeextpriv.mlmext_info;
4423                 u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0, RateIndex = 0;
4424                 u16 rrsr_2g_force_mask = (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M);
4425                 u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M);
4426
4427                 HalSetBrateCfg(adapter, val, &BrateCfg);
4428                 input_b = BrateCfg;
4429
4430                 /* apply force and allow mask */
4431                 BrateCfg |= rrsr_2g_force_mask;
4432                 BrateCfg &= rrsr_2g_allow_mask;
4433                 masked = BrateCfg;
4434
4435                 /* IOT consideration */
4436                 if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) {
4437                         /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */
4438                         if((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0)
4439                                 BrateCfg |= RRSR_6M;
4440                 }
4441                 ioted = BrateCfg;
4442
4443                 HalData->BasicRateSet = BrateCfg;
4444
4445                 DBG_8192C("HW_VAR_BASIC_RATE: %#x -> %#x -> %#x\n", input_b, masked, ioted);
4446
4447                 // Set RRSR rate table.
4448                 rtw_write16(adapter, REG_RRSR, BrateCfg);
4449                 rtw_write8(adapter, REG_RRSR+2, rtw_read8(adapter, REG_RRSR+2)&0xf0);
4450
4451                 // Set RTS initial rate
4452                 while(BrateCfg > 0x1)
4453                 {
4454                         BrateCfg = (BrateCfg>> 1);
4455                         RateIndex++;
4456                 }
4457                 rtw_write8(adapter, REG_INIRTS_RATE_SEL, RateIndex);
4458         }
4459                 break;
4460         case HW_VAR_CORRECT_TSF:
4461 #ifdef CONFIG_CONCURRENT_MODE
4462                 hw_var_set_correct_tsf(adapter, variable, val);
4463 #else
4464         {
4465                 u64 tsf;
4466                 struct mlme_ext_priv    *pmlmeext = &adapter->mlmeextpriv;
4467                 struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
4468
4469                 //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
4470                 tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
4471
4472                 if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
4473                 {
4474                         //pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
4475                         //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
4476                         StopTxBeacon(adapter);
4477                 }
4478
4479                 //disable related TSF function
4480                 rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(3)));
4481
4482                 rtw_write32(adapter, REG_TSFTR, tsf);
4483                 rtw_write32(adapter, REG_TSFTR+4, tsf>>32);
4484
4485                 //enable related TSF function
4486                 rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)|BIT(3));
4487
4488
4489                 if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
4490                 {
4491                         //pHalData->RegTxPause &= (~STOP_BCNQ);
4492                         //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
4493                         ResumeTxBeacon(adapter);
4494                 }
4495         }
4496 #endif
4497                 break;
4498         case HW_VAR_MLME_SITESURVEY:
4499 #ifdef CONFIG_CONCURRENT_MODE
4500                 hw_var_set_mlme_sitesurvey(adapter, variable,  val);
4501 #else
4502         {
4503                 u32 value_rcr, rcr_clear_bit, value_rxfltmap2;
4504 #ifdef CONFIG_FIND_BEST_CHANNEL
4505
4506                 rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA);
4507
4508                 // Recieve all data frames
4509                 value_rxfltmap2 = 0xFFFF;
4510
4511 #else /* CONFIG_FIND_BEST_CHANNEL */
4512
4513                 rcr_clear_bit = RCR_CBSSID_BCN;
4514
4515                 //config RCR to receive different BSSID & not to receive data frame
4516                 value_rxfltmap2 = 0;
4517
4518 #endif /* CONFIG_FIND_BEST_CHANNEL */
4519
4520                 if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
4521                         rcr_clear_bit = RCR_CBSSID_BCN;
4522                 }
4523 #ifdef CONFIG_TDLS
4524                 // TDLS will clear RCR_CBSSID_DATA bit for connection.
4525                 else if (adapter->tdlsinfo.link_established == _TRUE) {
4526                         rcr_clear_bit = RCR_CBSSID_BCN;
4527                 }
4528 #endif // CONFIG_TDLS
4529
4530                 value_rcr = rtw_read32(adapter, REG_RCR);
4531                 if(*((u8 *)val))//under sitesurvey
4532                 {
4533                         //config RCR to receive different BSSID & not to receive data frame
4534                         value_rcr &= ~(rcr_clear_bit);
4535                         rtw_write32(adapter, REG_RCR, value_rcr);
4536                         rtw_write16(adapter, REG_RXFLTMAP2, value_rxfltmap2);
4537
4538                         //disable update TSF
4539                         rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)|BIT(4));
4540                 }
4541                 else//sitesurvey done
4542                 {
4543                         struct mlme_ext_priv    *pmlmeext = &adapter->mlmeextpriv;
4544                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
4545
4546                         if ((is_client_associated_to_ap(adapter) == _TRUE) ||
4547                                 ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) )
4548                         {
4549                                 //enable to rx data frame
4550                                 //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
4551                                 rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF);
4552
4553                                 //enable update TSF
4554                                 rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4)));
4555                         }
4556                         else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
4557                         {
4558                                 //rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF);
4559                                 rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF);
4560
4561                                 //enable update TSF
4562                                 rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4)));
4563                         }
4564
4565                         value_rcr |= rcr_clear_bit;
4566                         if(((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) && (adapter->in_cta_test)) {
4567                                 u32 v = rtw_read32(adapter, REG_RCR);
4568                                 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
4569                                 rtw_write32(adapter, REG_RCR, v);
4570                         } else {
4571                                 rtw_write32(adapter, REG_RCR, value_rcr);
4572                         }
4573                 }
4574         }
4575 #endif
4576                 break;
4577         case HW_VAR_MLME_JOIN:
4578 #ifdef CONFIG_CONCURRENT_MODE
4579                 hw_var_set_mlme_join(adapter, variable,  val);
4580 #else
4581         {
4582                 u8      RetryLimit = 0x30;
4583                 u8      type = *((u8 *)val);
4584                 struct mlme_priv        *pmlmepriv = &adapter->mlmepriv;
4585                 EEPROM_EFUSE_PRIV       *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapter);
4586
4587                 if(type == 0) // prepare to join
4588                 {
4589                         //enable to rx data frame.Accept all data frame
4590                         //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
4591                         rtw_write16(adapter, REG_RXFLTMAP2,0xFFFF);
4592
4593                         if(adapter->in_cta_test)
4594                         {
4595                                 u32 v = rtw_read32(adapter, REG_RCR);
4596                                 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
4597                                 rtw_write32(adapter, REG_RCR, v);
4598                         }
4599                         else
4600                         {
4601                                 rtw_write32(adapter, REG_RCR, rtw_read32(adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
4602                         }
4603
4604                         if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
4605                         {
4606                                 RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48;
4607                         }
4608                         else // Ad-hoc Mode
4609                         {
4610                                 RetryLimit = 0x7;
4611                         }
4612                 }
4613                 else if(type == 1) //joinbss_event call back when join res < 0
4614                 {
4615                         rtw_write16(adapter, REG_RXFLTMAP2,0x00);
4616                 }
4617                 else if(type == 2) //sta add event call back
4618                 {
4619                         //enable update TSF
4620                         rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~BIT(4)));
4621
4622                         if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
4623                         {
4624                                 RetryLimit = 0x7;
4625                         }
4626                 }
4627
4628                 rtw_write16(adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
4629         }
4630 #endif
4631                 break;
4632         case HW_VAR_CHECK_TXBUF:
4633         {
4634                 u8 retry_limit;
4635                 u16 val16;
4636                 u32 reg_200 = 0, reg_204 = 0;
4637                 u32 init_reg_200 = 0, init_reg_204 = 0;
4638                 u32 start = rtw_get_current_time();
4639                 u32 pass_ms;
4640                 int i = 0;
4641
4642                 retry_limit = 0x01;
4643
4644                 val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT;
4645                 rtw_write16(adapter, REG_RL, val16);
4646
4647                 while (rtw_get_passing_time_ms(start) < 2000
4648                         && !adapter->bDriverStopped && !adapter->bSurpriseRemoved
4649                 ) {
4650                         reg_200 = rtw_read32(adapter, 0x200);
4651                         reg_204 = rtw_read32(adapter, 0x204);
4652
4653                         if (i == 0) {
4654                                 init_reg_200 = reg_200;
4655                                 init_reg_204 = reg_204;
4656                         }
4657
4658                         i++;
4659                         if ((reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) {
4660                                 //DBG_871X("%s: (HW_VAR_CHECK_TXBUF)TXBUF NOT empty - 0x204=0x%x, 0x200=0x%x (%d)\n", __FUNCTION__, reg_204, reg_200, i);
4661                                 rtw_msleep_os(10);
4662                         } else {
4663                                 break;
4664                         }
4665                 }
4666
4667                 pass_ms = rtw_get_passing_time_ms(start);
4668
4669                 if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
4670                 } else if (pass_ms >= 2000 || (reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) {
4671                         DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)NOT empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms);
4672                         DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)0x200=0x%08x, 0x204=0x%08x (0x%08x, 0x%08x)\n",
4673                                 __FUNCTION__, reg_200, reg_204, init_reg_200, init_reg_204);
4674                         //rtw_warn_on(1);
4675                 } else {
4676                         DBG_871X("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms);
4677                 }
4678
4679                 retry_limit = 0x30;
4680                 val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT;
4681                 rtw_write16(adapter, REG_RL, val16);
4682         }
4683                 break;
4684         case HW_VAR_RESP_SIFS:
4685         {
4686                 struct mlme_ext_priv    *pmlmeext = &adapter->mlmeextpriv;
4687
4688                 if((pmlmeext->cur_wireless_mode==WIRELESS_11G) ||
4689                 (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G){
4690                 {
4691                         val[0] = 0x0a;
4692                         val[1] = 0x0a;
4693                 } else {
4694                         val[0] = 0x0e;
4695                         val[1] = 0x0e;
4696                 }
4697
4698                 // SIFS for OFDM Data ACK
4699                 rtw_write8(adapter, REG_SIFS_CTX+1, val[0]);
4700                 // SIFS for OFDM consecutive tx like CTS data!
4701                 rtw_write8(adapter, REG_SIFS_TRX+1, val[1]);
4702
4703                 rtw_write8(adapter, REG_SPEC_SIFS+1, val[0]);
4704                 rtw_write8(adapter, REG_MAC_SPEC_SIFS+1, val[0]);
4705
4706                 //RESP_SIFS for OFDM
4707                 rtw_write8(adapter, REG_RESP_SIFS_OFDM, val[0]);
4708                 rtw_write8(adapter, REG_RESP_SIFS_OFDM+1, val[0]);
4709         }
4710                 break;
4711
4712         case HW_VAR_MACID_SLEEP:
4713         {
4714                 u32 reg_macid_sleep;
4715                 u8 bit_shift;
4716                 u8 id = *(u8*)val;
4717                 u32 val32;
4718
4719                 if (id < 32){
4720                         reg_macid_sleep = REG_MACID_PAUSE_0;
4721                         bit_shift = id;
4722                 } else if (id < 64) {
4723                         reg_macid_sleep = REG_MACID_PAUSE_1;
4724                         bit_shift = id-32;
4725                 } else {
4726                         rtw_warn_on(1);
4727                         break;
4728                 }
4729
4730                 val32 = rtw_read32(adapter, reg_macid_sleep);
4731                 DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_SLEEP] macid=%d, org reg_0x%03x=0x%08X\n",
4732                         FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32);
4733
4734                 if (val32 & BIT(bit_shift))
4735                         break;
4736
4737                 val32 |= BIT(bit_shift);
4738                 rtw_write32(adapter, reg_macid_sleep, val32);
4739         }
4740                 break;
4741
4742         case HW_VAR_MACID_WAKEUP:
4743         {
4744                 u32 reg_macid_sleep;
4745                 u8 bit_shift;
4746                 u8 id = *(u8*)val;
4747                 u32 val32;
4748
4749                 if (id < 32){
4750                         reg_macid_sleep = REG_MACID_PAUSE_0;
4751                         bit_shift = id;
4752                 } else if (id < 64) {
4753                         reg_macid_sleep = REG_MACID_PAUSE_1;
4754                         bit_shift = id-32;
4755                 } else {
4756                         rtw_warn_on(1);
4757                         break;
4758                 }
4759
4760                 val32 = rtw_read32(adapter, reg_macid_sleep);
4761                 DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_WAKEUP] macid=%d, org reg_0x%03x=0x%08X\n",
4762                         FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32);
4763
4764                 if (!(val32 & BIT(bit_shift)))
4765                         break;
4766
4767                 val32 &= ~BIT(bit_shift);
4768                 rtw_write32(adapter, reg_macid_sleep, val32);
4769         }
4770                 break;
4771
4772         default:
4773                 SetHwReg(adapter, variable, val);
4774                 break;
4775         }
4776
4777 _func_exit_;
4778 }
4779
4780 struct qinfo_88e {
4781         u32 head:8;
4782         u32 pkt_num:8;
4783         u32 tail:8;
4784         u32 ac:2;
4785         u32 macid:6;
4786 };
4787
4788 struct bcn_qinfo_88e {
4789         u16 head:8;
4790         u16 pkt_num:8;
4791 };
4792
4793 void dump_qinfo_88e(void *sel, struct qinfo_88e *info, const char *tag)
4794 {
4795         //if (info->pkt_num)
4796         DBG_871X_SEL_NL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n"
4797                 , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac
4798         );
4799 }
4800
4801 void dump_bcn_qinfo_88e(void *sel, struct bcn_qinfo_88e *info, const char *tag)
4802 {
4803         //if (info->pkt_num)
4804         DBG_871X_SEL_NL(sel, "%shead:0x%02x, pkt_num:%u\n"
4805                 , tag ? tag : "", info->head, info->pkt_num
4806         );
4807 }
4808
4809 void dump_mac_qinfo_88e(void *sel, _adapter *adapter)
4810 {
4811         u32 q0_info;
4812         u32 q1_info;
4813         u32 q2_info;
4814         u32 q3_info;
4815         /*
4816         u32 q4_info;
4817         u32 q5_info;
4818         u32 q6_info;
4819         u32 q7_info;
4820         */
4821         u32 mg_q_info;
4822         u32 hi_q_info;
4823         u16 bcn_q_info;
4824
4825         q0_info = rtw_read32(adapter, REG_Q0_INFO);
4826         q1_info = rtw_read32(adapter, REG_Q1_INFO);
4827         q2_info = rtw_read32(adapter, REG_Q2_INFO);
4828         q3_info = rtw_read32(adapter, REG_Q3_INFO);
4829         /*
4830         q4_info = rtw_read32(adapter, REG_Q4_INFO);
4831         q5_info = rtw_read32(adapter, REG_Q5_INFO);
4832         q6_info = rtw_read32(adapter, REG_Q6_INFO);
4833         q7_info = rtw_read32(adapter, REG_Q7_INFO);
4834         */
4835         mg_q_info = rtw_read32(adapter, REG_MGQ_INFO);
4836         hi_q_info = rtw_read32(adapter, REG_HGQ_INFO);
4837         bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO);
4838
4839         dump_qinfo_88e(sel, (struct qinfo_88e *)&q0_info, "Q0 ");
4840         dump_qinfo_88e(sel, (struct qinfo_88e *)&q1_info, "Q1 ");
4841         dump_qinfo_88e(sel, (struct qinfo_88e *)&q2_info, "Q2 ");
4842         dump_qinfo_88e(sel, (struct qinfo_88e *)&q3_info, "Q3 ");
4843         /*
4844         dump_qinfo_88e(sel, (struct qinfo_88e *)&q4_info, "Q4 ");
4845         dump_qinfo_88e(sel, (struct qinfo_88e *)&q5_info, "Q5 ");
4846         dump_qinfo_88e(sel, (struct qinfo_88e *)&q6_info, "Q6 ");
4847         dump_qinfo_88e(sel, (struct qinfo_88e *)&q7_info, "Q7 ");
4848         */
4849         dump_qinfo_88e(sel, (struct qinfo_88e *)&mg_q_info, "MG ");
4850         dump_qinfo_88e(sel, (struct qinfo_88e *)&hi_q_info, "HI ");
4851         dump_bcn_qinfo_88e(sel, (struct bcn_qinfo_88e *)&bcn_q_info, "BCN ");
4852 }
4853
4854 void GetHwReg8188E(_adapter *adapter, u8 variable, u8 *val)
4855 {
4856         HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
4857
4858 _func_enter_;
4859
4860         switch (variable) {
4861         case HW_VAR_SYS_CLKR:
4862                 *val = rtw_read8(adapter, REG_SYS_CLKR);
4863                 break;
4864         case HW_VAR_DUMP_MAC_QUEUE_INFO:
4865                 dump_mac_qinfo_88e(val, adapter);
4866                 break;
4867         default:
4868                 GetHwReg(adapter, variable, val);
4869                 break;
4870         }
4871
4872 _func_exit_;
4873 }
4874
4875 u8
4876 GetHalDefVar8188E(
4877         IN      PADAPTER                                Adapter,
4878         IN      HAL_DEF_VARIABLE                eVariable,
4879         IN      PVOID                                   pValue
4880         )
4881 {
4882         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
4883         u8                      bResult = _SUCCESS;
4884
4885         switch(eVariable)
4886         {
4887                 case HAL_DEF_MACID_SLEEP:
4888                         *(u8*)pValue = _TRUE; // support macid sleep
4889                         break;
4890
4891                 default:
4892                         bResult = GetHalDefVar(Adapter, eVariable, pValue);
4893                         break;
4894         }
4895
4896         return bResult;
4897 }
4898