drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/rtl8188e/hal8188erateadaptive.c

   1 /*++
   2 Copyright (c) Realtek Semiconductor Corp. All rights reserved.
   3
   4 Module Name:
   5         RateAdaptive.c
   6
   7 Abstract:
   8         Implement Rate Adaptive functions for common operations.
   9
  10 Major Change History:
  11         When       Who               What
  12         ---------- ---------------   -------------------------------
  13         2011-08-12 Page            Create.
  14
  15 --*/
  16 #include "mp_precomp.h"
  17
  18 #include "../phydm_precomp.h"
  19
  20
  21 #if (RATE_ADAPTIVE_SUPPORT == 1)
  22 // Rate adaptive parameters
  23 #define         RA_RATE_LEVEL                   2
  24
  25
  26 static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {{5,4,3,2,0,3},//92 , idx=0
  27                                                                                                         {6,5,4,3,0,4},//86 , idx=1
  28                                                                                                         {6,5,4,2,0,4},//81 , idx=2
  29                                                                                                         {8,7,6,4,0,6},//75 , idx=3
  30 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
  31         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
  32                                                                                                         {10, 9, 7, 6, 0, 8},/*71        , idx=4*/
  33                                                                                                         {10, 9, 7, 4, 0, 8},/*66        , idx=5*/
  34 #else
  35                                                                                                         {10, 9, 8, 6, 0, 8},/*71        , idx=4*/
  36                                                                                                         {10, 9, 8, 4, 0, 8},/*66        , idx=5*/
  37 #endif
  38                                                                                                         {10,9,8,2,0,8},//62     , idx=6
  39                                                                                                         {10,9,8,0,0,8},//59     , idx=7
  40                                                                                                         {18,17,16,8,0,16},//53 , idx=8
  41                                                                                                         {26,25,24,16,0,24},//50 , idx=9
  42                                                                                                         {34,33,32,24,0,32},//47 , idx=0x0a
  43                                                                                                         //{34,33,32,16,0,32},//43       , idx=0x0b
  44                                                                                                         //{34,33,32,8,0,32},//40 , idx=0x0c
  45                                                                                                         //{34,33,28,8,0,32},//37 , idx=0x0d
  46                                                                                                         //{34,33,20,8,0,32},//32 , idx=0x0e
  47                                                                                                         //{34,32,24,8,0,32},//26 , idx=0x0f
  48                                                                                                         //{49,48,32,16,0,48},//20       , idx=0x10
  49                                                                                                         //{49,48,24,0,0,48},//17 , idx=0x11
  50                                                                                                         //{49,47,16,16,0,48},//15       , idx=0x12
  51                                                                                                         //{49,44,16,16,0,48},//12       , idx=0x13
  52                                                                                                         //{49,40,16,0,0,48},//9 , idx=0x14
  53                                                                                                         {34,31,28,20,0,32},//43 , idx=0x0b
  54                                                                                                         {34,31,27,18,0,32},//40 , idx=0x0c
  55                                                                                                         {34,31,26,16,0,32},//37 , idx=0x0d
  56                                                                                                         {34,30,22,16,0,32},//32 , idx=0x0e
  57                                                                                                         {34,30,24,16,0,32},//26 , idx=0x0f
  58                                                                                                         {49,46,40,16,0,48},//20 , idx=0x10
  59                                                                                                         {49,45,32,0,0,48},//17 , idx=0x11
  60                                                                                                         {49,45,22,18,0,48},//15 , idx=0x12
  61 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
  62                                                                                                         {49,40,28,18,0,48},//12 , idx=0x13
  63                                                                                                         {49,34,20,16,0,48},//9 , idx=0x14
  64 #else
  65                                                                                                         {49,40,24,16,0,48},//12 , idx=0x13
  66                                                                                                         {49,32,18,12,0,48},//9 , idx=0x14
  67 #endif
  68                                                                                                         {49,22,18,14,0,48},//6 , idx=0x15
  69                                                                                                         {49,16,16,0,0,48}};//3 //3, idx=0x16
  70
  71 static u1Byte   RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48};  // 12% for rate up
  72
  73 static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32};
  74
  75 #if 0
  76 static u1Byte   RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a,         // SS>TH
  77                                                                                                         4,4,4,4,6,0x0a,0x0b,0x0d,
  78                                                                                                         5,5,7,7,8,0x0b,0x0d,0x0f},                         // 0329 R01
  79                                                                                                         {4,4,4,5,7,7,9,9,0x0c,0x0e,0x10,0x12,      // SS<TH
  80                                                                                                         4,4,5,5,6,0x0a,0x11,0x13,
  81                                                                                                         9,9,9,9,0x0c,0x0e,0x11,0x13}};
  82 #endif
  83
  84
  85 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  86 static u1Byte   RETRY_PENALTY_IDX[2][RATESIZE] =        {{4,4,4,5,4,4,5,7,7,7,8,0x0a,          // SS>TH
  87 #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
  88                                                                                                         4, 4, 4, 4, 0x0d, 0x0d, 0x0f, 0x0f,
  89 #else
  90                                                                                                         4,4,4,4,6,0x0a,0x0b,0x0d,
  91 #endif
  92                                                                                                         5,5,7,7,8,0x0b,0x0d,0x0f},                         // 0329 R01
  93                                                                                                         {0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13,      // SS<TH
  94                                                                                                         0x0e,0x0f,0x10,0x10,0x11,0x14,0x14,0x15,
  95                                                                                                         9,9,9,9,0x0c,0x0e,0x11,0x13}};
  96
  97 static u1Byte   RETRY_PENALTY_UP_IDX[RATESIZE] =        {0x10,0x10,0x10,0x10,0x11,0x11,0x12,0x12,0x12,0x13,0x13,0x14,          // SS>TH
  98                                                                                                         0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15,
  99                                                                                                         0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
 100
 101 static u1Byte   RSSI_THRESHOLD[RATESIZE] =                      {0,0,0,0,
 102                                                                                                         0,0,0,0,0,0x24,0x26,0x2a,
 103                                                                                                         0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f,
 104                                                                                                         0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
 105 #else
 106
 107 // wilson modify
 108 /*static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a,         // SS>TH
 109                                                                                                         4,4,4,4,6,0x0a,0x0b,0x0d,
 110                                                                                                         5,5,7,7,8,0x0b,0x0d,0x0f},                         // 0329 R01
 111                                                                                                         {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14,      // SS<TH
 112                                                                                                         0x0b,0x0c,0x0d,0x0e,0x0f,0x11,0x13,0x15,
 113                                                                                                         9,9,9,9,0x0c,0x0e,0x11,0x13}};  */
 114
 115 static u1Byte   RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a,         // SS>TH
 116                                                                                                         4,4,4,4,6,0x0a,0x0b,0x0d,
 117                                                                                                         5,5,7,7,8,0x0b,0x0d,0x0f},                         // 0329 R01
 118                                                                                                         {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x13,      // SS<TH
 119                                                                                                         0x0b,0x0c,0x0d,0x0e,0x0f,0x11,0x13,0x13,
 120                                                                                                         9,9,9,9,0x0c,0x0e,0x11,0x13}};
 121 #if (RA_RATE_LEVEL == 0)
 122 static u1Byte   RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x14,         // SS>TH
 123                                                                                                         0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15,
 124                                                                                                         0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
 125 #elif (RA_RATE_LEVEL == 1)
 126 static u1Byte   RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x13,         // SS>TH
 127                                                                                                         0x0f,0x10,0x10,0x12,0x12,0x13,0x13,0x14,
 128                                                                                                         0x11,0x11,0x12,0x13,0x13,0x13,0x13,0x14};
 129 #elif (RA_RATE_LEVEL == 2)
 130 static u1Byte   RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x13,         // SS>TH
 131                                                                                                         0x0f,0x10,0x10,0x12,0x12,0x12,0x12,0x13,
 132                                                                                                         0x11,0x11,0x12,0x12,0x12,0x12,0x12,0x13};
 133 #endif
 134
 135 static u1Byte   RSSI_THRESHOLD[RATESIZE] =                      {0,0,0,0,
 136                                                                                                         0,0,0,0,0,0x24,0x26,0x2a,
 137                                                                                                         0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,
 138                                                                                                         0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
 139
 140 #endif
 141
 142 /*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
 143                                                                                                         0,0,0,0,0,0x24,0x26,0x2a,
 144                                                                                                         0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d,
 145                                                                                                         0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/
 146 /*static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
 147                                                                                                         24,36,48,72,96,144,192,216,
 148                                                                                                         60,80,100,160,240,400,560,640,
 149                                                                                                         300,320,480,720,1000,1200,1600,2000};
 150 static u2Byte   N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
 151                                                                                                         12,18,24,36,48,72,96,108,
 152                                                                                                         30,40,50,80,120,200,280,320,
 153                                                                                                         150,160,240,360,500,600,800,1000};*/
 154 static u2Byte   N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
 155                                                                                                         24,36,48,72,96,144,192,216,
 156                                                                                                         60,80,100,160,240,400,600,800,
 157                                                                                                         300,320,480,720,1000,1200,1600,2000};
 158 static u2Byte   N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
 159                                                                                                         12,18,24,36,48,72,96,108,
 160                                                                                                         30,40,50,80,120,200,300,400,
 161                                                                                                         150,160,240,360,500,600,800,1000};
 162
 163 static u1Byte    TRYING_NECESSARY[RATESIZE] = {2,2,2,2,
 164                                                                                                         2,2,3,3,4,4,5,7,
 165                                                                                                         4,4,7,10,10,12,12,18,
 166                                                                                                         5,7,7,8,11,18,36,60};  // 0329 // 1207
 167 #if 0
 168 static u1Byte    POOL_RETRY_TH[RATESIZE] = {30,30,30,30,
 169                                                                                                         30,30,25,25,20,15,15,10,
 170                                                                                                         30,25,25,20,15,10,10,10,
 171                                                                                                         30,25,25,20,15,10,10,10};
 172 #endif
 173
 174 static u1Byte   DROPING_NECESSARY[RATESIZE] = {1,1,1,1,
 175                                                                                                         1,2,3,4,5,6,7,8,
 176                                                                                                         1,2,3,4,5,6,7,8,
 177                                                                                                         5,6,7,8,9,10,11,12};
 178
 179
 180 static u4Byte   INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015,  // 0: 40M BGN mode
 181                                                                                         0x0f8ff010,   // 1: 40M GN mode
 182                                                                                         0x0f8ff005,   // 2: BN mode/ 40M BGN mode
 183                                                                                         0x0f8ff000,   // 3: N mode
 184                                                                                         0x00000ff5,   // 4: BG mode
 185                                                                                         0x00000ff0,   // 5: G mode
 186                                                                                         0x0000000d,   // 6: B mode
 187                                                                                         0,                      // 7:
 188                                                                                         0,                      // 8:
 189                                                                                         0,                      // 9:
 190                                                                                         0,                      // 10:
 191                                                                                         0,                      // 11:
 192                                                                                         0,                      // 12:
 193                                                                                         0,                      // 13:
 194                                                                                         0,                      // 14:
 195                                                                                         0,                      // 15:
 196
 197         };
 198 static u1Byte PendingForRateUpFail[5]={2,10,24,36,48};
 199 static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms 400 / 600 / 8000 / 1000 -1200ms
 200
 201 // End Rate adaptive parameters
 202
 203 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 204         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 205 static int
 206 odm_RA_LearnBounding(
 207         IN      PDM_ODM_T               pDM_Odm,
 208         IN      PODM_RA_INFO_T  pRaInfo
 209         )
 210 {
 211
 212         if (DM_RA_RATE_UP != pRaInfo->RateDirection) {
 213                 /* Check if previous RA adjustment trend as +++--- or ++++----*/
 214                 if (((3 == pRaInfo->RateUpCounter && pRaInfo->BoundingLearningTime <= 10)
 215                                 || (4 == pRaInfo->RateUpCounter && pRaInfo->BoundingLearningTime <= 16))
 216                                 && (pRaInfo->RateUpCounter == pRaInfo->RateDownCounter)) {
 217                         if (1 != pRaInfo->BoundingType) {
 218                                 pRaInfo->BoundingType = 1;
 219                                 pRaInfo->BoundingCounter = 0;
 220                         }
 221                         pRaInfo->BoundingCounter++;
 222                 /* Check if previous RA adjustment trend as ++--*/
 223                 } else if ((2 == pRaInfo->RateUpCounter) && (pRaInfo->BoundingLearningTime <= 7)
 224                                 && (pRaInfo->RateUpCounter == pRaInfo->RateDownCounter)) {
 225                         if (2 != pRaInfo->BoundingType) {
 226                                 pRaInfo->BoundingType = 2;
 227                                 pRaInfo->BoundingCounter = 0;
 228                         }
 229                         pRaInfo->BoundingCounter++;
 230                 /* Check if previous RA adjustment trend as +++++-----*/
 231                 } else if ((5 == pRaInfo->RateUpCounter) && (pRaInfo->BoundingLearningTime <= 17)
 232                                 && (pRaInfo->RateUpCounter == pRaInfo->RateDownCounter)) {
 233                         if (3 != pRaInfo->BoundingType) {
 234                                 pRaInfo->BoundingType = 3;
 235                                 pRaInfo->BoundingCounter = 0;
 236                         }
 237                         pRaInfo->BoundingCounter++;
 238                 } else {
 239                         pRaInfo->BoundingType = 0;
 240                 }
 241
 242                 pRaInfo->RateDownCounter = 0;
 243                 pRaInfo->RateUpCounter = 0;
 244                 pRaInfo->BoundingLearningTime = 1;
 245         } else if (pRaInfo->BoundingType) {
 246                 /* Check if RA adjustment trend as +++---++(+) or ++++----++(+)*/
 247                 if ((1 == pRaInfo->BoundingType) && (1 == pRaInfo->BoundingCounter)
 248                                 && (2 == pRaInfo->RateUpCounter)) {
 249                         pRaInfo->BoundingType = 0;
 250                         if (pRaInfo->BoundingLearningTime <= 5)
 251                                 return 1;
 252                 /* Check if RA adjustment trend as ++--++--+(+)*/
 253                 } else if ((2 == pRaInfo->BoundingType) && (2 == pRaInfo->BoundingCounter)
 254                                 && (1 == pRaInfo->RateUpCounter)) {
 255                         pRaInfo->BoundingType = 0;
 256                         if (pRaInfo->BoundingLearningTime <= 2)
 257                                 return 1;
 258                 /* Check if RA adjustment trend as +++++-----++(+)*/
 259                 } else if ((3 == pRaInfo->BoundingType) && (1 == pRaInfo->BoundingCounter)
 260                                 && (2 == pRaInfo->RateUpCounter)) {
 261                         pRaInfo->BoundingType = 0;
 262                         if (pRaInfo->BoundingLearningTime <= 4)
 263                                 return 1;
 264                 }
 265         }
 266
 267         return 0;
 268 }
 269 #endif
 270
 271 static void
 272 odm_SetTxRPTTiming_8188E(
 273         IN      PDM_ODM_T               pDM_Odm,
 274         IN      PODM_RA_INFO_T          pRaInfo,
 275         IN      u1Byte                          extend
 276         )
 277 {
 278         u1Byte idx = 0;
 279
 280         for(idx=0; idx<5; idx++)
 281                 if(DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
 282                         break;
 283
 284         if (extend==0) // back to default timing
 285                 idx=0;  //200ms
 286         else if (extend==1) {// increase the timing
 287                 idx+=1;
 288                 if (idx>5)
 289                         idx=5;
 290         }
 291         else if (extend==2) {// decrease the timing
 292                 if(idx!=0)
 293                         idx-=1;
 294         }
 295         pRaInfo->RptTime=DynamicTxRPTTiming[idx];
 296
 297         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime=0x%x\n", pRaInfo->RptTime));
 298 }
 299
 300 static int
 301 odm_RateDown_8188E(
 302         IN      PDM_ODM_T               pDM_Odm,
 303         IN      PODM_RA_INFO_T  pRaInfo
 304         )
 305 {
 306         u1Byte RateID, LowestRate, HighestRate;
 307         s1Byte i;
 308
 309         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
 310         if(NULL == pRaInfo)
 311         {
 312                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
 313                 return -1;
 314         }
 315         RateID = pRaInfo->PreRate;
 316         LowestRate = pRaInfo->LowestRate;
 317         HighestRate = pRaInfo->HighestRate;
 318
 319         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 320                                 (" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n",
 321                                 RateID, LowestRate, HighestRate, pRaInfo->RateSGI));
 322         if (RateID > HighestRate)
 323         {
 324                 RateID=HighestRate;
 325         }
 326         else if(pRaInfo->RateSGI)
 327         {
 328                 pRaInfo->RateSGI=0;
 329         }
 330         else if (RateID > LowestRate)
 331         {
 332                 if (RateID > 0) {
 333                         for (i = RateID - 1; i >= LowestRate; i--) {
 334                                 if (pRaInfo->RAUseRate & BIT(i)) {
 335 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 336         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 337                                         pRaInfo->RateDownCounter++;
 338                                         pRaInfo->RateDirection = DM_RA_RATE_DOWN;
 339
 340                                         /* Learning +(0)-(-)(-)+ and ++(0)--(-)(-)(0)+ after the persistence of learned TX rate expire*/
 341                                         if (0xFF == pRaInfo->RateDownStartTime) {
 342                                                 if ((0 == pRaInfo->RateUpCounter) || (pRaInfo->RateUpCounter+2 < pRaInfo->BoundingLearningTime))
 343                                                         pRaInfo->RateDownStartTime = 0;
 344                                                 else
 345                                                         pRaInfo->RateDownStartTime = pRaInfo->BoundingLearningTime;
 346                                         }
 347 #endif
 348                                         RateID=i;
 349                                         goto RateDownFinish;
 350
 351                                 }
 352                         }
 353                 }
 354         }
 355         else if (RateID <= LowestRate)
 356         {
 357                 RateID = LowestRate;
 358         }
 359 RateDownFinish:
 360 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 361         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 362         if (pRaInfo->RTY[2] >= 100) {
 363                 pRaInfo->RAWaitingCounter = 2;
 364                 pRaInfo->RAPendingCounter += 1;
 365         } else if ((0 != pRaInfo->RateDownStartTime) && (0xFF != pRaInfo->RateDownStartTime)) {
 366                 /* Learning +(0)-(-)(-)+ and ++(0)--(-)(-)(0)+ after the persistence of learned TX rate expire*/
 367                 if (pRaInfo->RateDownCounter < pRaInfo->RateUpCounter) {
 368
 369                 } else if (pRaInfo->RateDownCounter == pRaInfo->RateUpCounter) {
 370                         pRaInfo->RAWaitingCounter = 2;
 371                         if (1 == pRaInfo->RateUpCounter)
 372                                 pRaInfo->RAPendingCounter += 1;
 373                         else
 374                                 pRaInfo->RAPendingCounter = 2;
 375                 } else if (pRaInfo->RateDownCounter <= pRaInfo->RateUpCounter+2) {
 376                         RateID = pRaInfo->PreRate;      /* Don't rate down in this tolerant time*/
 377                 } else {
 378                         pRaInfo->RAWaitingCounter = 0;
 379                         pRaInfo->RAPendingCounter = 0;
 380                         pRaInfo->RateDownStartTime = 0;
 381                 }
 382         } else
 383 #endif
 384         if (pRaInfo->RAWaitingCounter==1){
 385                 pRaInfo->RAWaitingCounter+=1;
 386                 pRaInfo->RAPendingCounter+=1;
 387         }
 388         else if(pRaInfo->RAWaitingCounter==0){
 389         }
 390         else{
 391                 pRaInfo->RAWaitingCounter=0;
 392                 pRaInfo->RAPendingCounter=0;
 393         }
 394
 395         if(pRaInfo->RAPendingCounter>=4)
 396                 pRaInfo->RAPendingCounter=4;
 397
 398         pRaInfo->DecisionRate=RateID;
 399         odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 2);
 400         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, Decrease RPT Timing\n"));
 401         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
 402         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
 403         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E()\n"));
 404         return 0;
 405 }
 406
 407 static int
 408 odm_RateUp_8188E(
 409         IN      PDM_ODM_T               pDM_Odm,
 410         IN      PODM_RA_INFO_T  pRaInfo
 411         )
 412 {
 413         u1Byte RateID, HighestRate;
 414         u1Byte i;
 415
 416         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n"));
 417         if(NULL == pRaInfo)
 418         {
 419                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
 420                 return -1;
 421         }
 422         RateID = pRaInfo->PreRate;
 423         HighestRate = pRaInfo->HighestRate;
 424         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 425                                 (" RateID=%d HighestRate=%d\n",
 426                                 RateID, HighestRate));
 427         if (pRaInfo->RAWaitingCounter==1){
 428                 pRaInfo->RAWaitingCounter=0;
 429                 pRaInfo->RAPendingCounter=0;
 430         }
 431         else if (pRaInfo->RAWaitingCounter>1){
 432                 pRaInfo->PreRssiStaRA=pRaInfo->RssiStaRA;
 433 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 434         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 435                 pRaInfo->RateDownStartTime = 0;
 436 #endif
 437                 goto RateUpfinish;
 438         }
 439         odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 0);
 440         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): default RPT Timing\n"));
 441
 442         if (RateID < HighestRate)
 443         {
 444                 for (i=RateID+1; i<=HighestRate; i++)
 445                 {
 446                         if (pRaInfo->RAUseRate & BIT(i))
 447                         {
 448 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 449         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 450                                 if (odm_RA_LearnBounding(pDM_Odm, pRaInfo)) {
 451                                         pRaInfo->RAWaitingCounter = 2;
 452                                         pRaInfo->RAPendingCounter = 1;
 453                                         goto RateUpfinish;
 454                                 }
 455                                 pRaInfo->RateUpCounter++;
 456                                 pRaInfo->RateDirection = DM_RA_RATE_UP;
 457 #endif
 458                                 RateID=i;
 459                                 goto RateUpfinish;
 460                         }
 461                 }
 462         }
 463         else if(RateID == HighestRate)
 464         {
 465                 if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1))
 466                         pRaInfo->RateSGI = 1;
 467                 else if((pRaInfo->SGIEnable) !=1 )
 468                         pRaInfo->RateSGI = 0;
 469         }
 470         else //if((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate))
 471         {
 472                 RateID = HighestRate;
 473
 474         }
 475 RateUpfinish:
 476         //if(pRaInfo->RAWaitingCounter==10)
 477         if (pRaInfo->RAWaitingCounter == (4 + PendingForRateUpFail[pRaInfo->RAPendingCounter])) {
 478                 pRaInfo->RAWaitingCounter=0;
 479 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 480         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 481                 /* Mark persistence expiration state*/
 482                 pRaInfo->RateDownStartTime = 0xFF;
 483                 /* Clear state to avoid wrong bounding check*/
 484                 pRaInfo->RateDownCounter = 0;
 485                 pRaInfo->RateUpCounter = 0;
 486                 pRaInfo->RateDirection = 0;
 487 #endif
 488         }
 489         else
 490                 pRaInfo->RAWaitingCounter++;
 491
 492         pRaInfo->DecisionRate=RateID;
 493         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID));
 494         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter));
 495         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E() \n"));
 496         return 0;
 497 }
 498
 499 static void odm_ResetRaCounter_8188E( IN PODM_RA_INFO_T  pRaInfo){
 500         u1Byte RateID;
 501         RateID=pRaInfo->DecisionRate;
 502         pRaInfo->NscUp=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
 503         pRaInfo->NscDown=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
 504 }
 505
 506 static void
 507 odm_RateDecision_8188E(
 508         IN      PDM_ODM_T               pDM_Odm,
 509         IN      PODM_RA_INFO_T  pRaInfo
 510         )
 511 {
 512         u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0;
 513         //u4Byte pool_retry;
 514         static u1Byte DynamicTxRPTTimingCounter=0;
 515
 516         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E() \n"));
 517
 518         if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) // STA used and data packet exits
 519         {
 520 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 521         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 522                 if (((pRaInfo->RssiStaRA <= 17) && (pRaInfo->RssiStaRA > pRaInfo->PreRssiStaRA))
 523                         || ((pRaInfo->PreRssiStaRA <= 17) && (pRaInfo->PreRssiStaRA > pRaInfo->RssiStaRA))) {
 524                         /* don't reset state in low signal due to the power different between CCK and MCS is large.*/
 525                 } else
 526 #endif
 527                 if ( (pRaInfo->RssiStaRA<(pRaInfo->PreRssiStaRA-3))|| (pRaInfo->RssiStaRA>(pRaInfo->PreRssiStaRA+3))){
 528                         pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA;
 529                         pRaInfo->RAWaitingCounter=0;
 530                         pRaInfo->RAPendingCounter=0;
 531 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 532         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 533                         pRaInfo->BoundingType = 0;
 534                         pRaInfo->RateDownStartTime = 0;
 535 #endif
 536                 }
 537
 538 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 539                 if (0xff != pDM_Odm->priv->pshare->rf_ft_var.txforce) {
 540                         pRaInfo->PreRate = pDM_Odm->priv->pshare->rf_ft_var.txforce;
 541                         odm_ResetRaCounter_8188E(pRaInfo);
 542                 }
 543 #endif
 544
 545                 // Start RA decision
 546                 if (pRaInfo->PreRate > pRaInfo->HighestRate)
 547                         RateID = pRaInfo->HighestRate;
 548                 else
 549                         RateID = pRaInfo->PreRate;
 550                 if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID])
 551                         RtyPtID=0;
 552                 else
 553                         RtyPtID=1;
 554                 PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; //TODO by page
 555
 556                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 557                                         (" NscDown init is %d\n", pRaInfo->NscDown));
 558                 //pool_retry=pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP;
 559                 pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0];
 560                 pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1];
 561                 pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2];
 562                 pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3];
 563                 pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4];
 564                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 565                                         (" NscDown is %d, total*penalty[5] is %d\n",
 566                                         pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
 567                 if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
 568                         pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
 569                 else
 570                         pRaInfo->NscDown=0;
 571
 572                 // rate up
 573                 PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
 574                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 575                                         (" NscUp init is %d\n", pRaInfo->NscUp));
 576                 pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0];
 577                 pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1];
 578                 pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2];
 579                 pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3];
 580                 pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4];
 581                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
 582                                         ("NscUp is %d, total*up[5] is %d\n",
 583                                         pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
 584                 if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
 585                         pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
 586                 else
 587                         pRaInfo->NscUp = 0;
 588
 589                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
 590                                         (" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x  PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n",
 591                                         pRaInfo->RssiStaRA,RtyPtID, PenaltyID1,PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI));
 592 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 593         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 594                 if (0xFF != pRaInfo->BoundingLearningTime)
 595                         pRaInfo->BoundingLearningTime++;
 596 #endif
 597                 if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||(pRaInfo->DROP>DROPING_NECESSARY[RateID]))
 598                         odm_RateDown_8188E(pDM_Odm,pRaInfo);
 599                 //else if ((pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])&&(pool_retry<POOL_RETRY_TH[RateID]))
 600                 else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])
 601                         odm_RateUp_8188E(pDM_Odm,pRaInfo);
 602 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 603         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 604                 else if ((pRaInfo->RTY[2] >= 100) && (ODM_BW20M == *pDM_Odm->pBandWidth))
 605                         odm_RateDown_8188E(pDM_Odm, pRaInfo);
 606 #endif
 607
 608                 if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate))
 609                         DynamicTxRPTTimingCounter+=1;
 610                 else
 611                         DynamicTxRPTTimingCounter=0;
 612
 613                 if (DynamicTxRPTTimingCounter>=4) {
 614                         odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 1);
 615                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<=====Rate don't change 4 times, Extend RPT Timing\n"));
 616                         DynamicTxRPTTimingCounter=0;
 617                 }
 618
 619                 pRaInfo->PreRate = pRaInfo->DecisionRate;  //YJ,add,120120
 620
 621                 odm_ResetRaCounter_8188E(  pRaInfo);
 622         }
 623         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E() \n"));
 624 }
 625
 626 static int
 627 odm_ARFBRefresh_8188E(
 628         IN      PDM_ODM_T               pDM_Odm,
 629         IN      PODM_RA_INFO_T  pRaInfo
 630         )
 631 {  // Wilson 2011/10/26
 632         u4Byte MaskFromReg;
 633         u1Byte i;
 634
 635         switch(pRaInfo->RateID){
 636                 case RATR_INX_WIRELESS_NGB:
 637                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8fe00f;
 638                         break;
 639                 case RATR_INX_WIRELESS_NG:
 640                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010;
 641                         break;
 642                 case RATR_INX_WIRELESS_NB:
 643                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8fe00f;
 644                         break;
 645                 case RATR_INX_WIRELESS_N:
 646                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000;
 647                         break;
 648                 case RATR_INX_WIRELESS_GB:
 649                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000fef;
 650                         break;
 651                 case RATR_INX_WIRELESS_G:
 652                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0;
 653                         break;
 654                 case RATR_INX_WIRELESS_B:
 655                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
 656                         break;
 657                 case 12:
 658                         MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR0);
 659                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
 660                         break;
 661                 case 13:
 662                         MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR1);
 663                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
 664                         break;
 665                 case 14:
 666                         MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR2);
 667                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
 668                         break;
 669                 case 15:
 670                         MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR3);
 671                         pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
 672                         break;
 673
 674                 default:
 675                         pRaInfo->RAUseRate=(pRaInfo->RateMask);
 676                         break;
 677         }
 678         // Highest rate
 679         if (pRaInfo->RAUseRate){
 680                 for (i=RATESIZE-1;i>=0;i--)
 681                 {
 682                         if((pRaInfo->RAUseRate)&BIT(i)){
 683                                 pRaInfo->HighestRate=i;
 684                                 break;
 685                         }
 686                 }
 687         }
 688         else{
 689                 pRaInfo->HighestRate=0;
 690         }
 691         // Lowest rate
 692         if (pRaInfo->RAUseRate){
 693                 for (i=0;i<RATESIZE;i++)
 694                 {
 695                         if((pRaInfo->RAUseRate)&BIT(i))
 696                         {
 697                                 pRaInfo->LowestRate=i;
 698                                 break;
 699                         }
 700                 }
 701         }
 702         else{
 703                 pRaInfo->LowestRate=0;
 704         }
 705
 706 #if POWER_TRAINING_ACTIVE == 1
 707                 if (pRaInfo->HighestRate >0x13)
 708                         pRaInfo->PTModeSS=3;
 709                 else if(pRaInfo->HighestRate >0x0b)
 710                         pRaInfo->PTModeSS=2;
 711                 else if(pRaInfo->HighestRate >0x0b)
 712                         pRaInfo->PTModeSS=1;
 713                 else
 714                         pRaInfo->PTModeSS=0;
 715         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
 716                                 ("ODM_ARFBRefresh_8188E(): PTModeSS=%d\n", pRaInfo->PTModeSS));
 717
 718 #endif
 719
 720         if(pRaInfo->DecisionRate > pRaInfo->HighestRate)
 721                 pRaInfo->DecisionRate = pRaInfo->HighestRate;
 722
 723         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
 724                                 ("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d \n",
 725                                 pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate));
 726         return 0;
 727 }
 728
 729 #if POWER_TRAINING_ACTIVE == 1
 730 static void
 731 odm_PTTryState_8188E(
 732         IN      PDM_ODM_T               pDM_Odm,
 733         IN      PODM_RA_INFO_T  pRaInfo
 734         )
 735 {
 736         pRaInfo->PTTryState=0;
 737         switch (pRaInfo->PTModeSS)
 738         {
 739                 case 3:
 740                         if (pRaInfo->DecisionRate>=0x19)
 741                                 pRaInfo->PTTryState=1;
 742                         break;
 743                 case 2:
 744                         if (pRaInfo->DecisionRate>=0x11)
 745                                 pRaInfo->PTTryState=1;
 746                         break;
 747                 case 1:
 748                         if (pRaInfo->DecisionRate>=0x0a)
 749                                 pRaInfo->PTTryState=1;
 750                         break;
 751                 case 0:
 752                         if (pRaInfo->DecisionRate>=0x03)
 753                                 pRaInfo->PTTryState=1;
 754                         break;
 755                 default:
 756                         pRaInfo->PTTryState=0;
 757         }
 758
 759         if (pRaInfo->RssiStaRA<48)
 760         {
 761                 pRaInfo->PTStage=0;
 762         }
 763         else if (pRaInfo->PTTryState==1)
 764         {
 765                 if ((pRaInfo->PTStopCount>=10)||(pRaInfo->PTPreRssi>pRaInfo->RssiStaRA+5)
 766                         ||(pRaInfo->PTPreRssi<pRaInfo->RssiStaRA-5)||(pRaInfo->DecisionRate!=pRaInfo->PTPreRate))
 767                 {
 768                         if (pRaInfo->PTStage==0)
 769                                 pRaInfo->PTStage=1;
 770                         else if(pRaInfo->PTStage==1)
 771                                 pRaInfo->PTStage=3;
 772                         else
 773                                 pRaInfo->PTStage=5;
 774
 775                         pRaInfo->PTPreRssi=pRaInfo->RssiStaRA;
 776                         pRaInfo->PTStopCount=0;
 777
 778                 }
 779                 else{
 780                         pRaInfo->RAstage=0;
 781                         pRaInfo->PTStopCount++;
 782                 }
 783         }
 784         else{
 785                 pRaInfo->PTStage=0;
 786                 pRaInfo->RAstage=0;
 787         }
 788         pRaInfo->PTPreRate=pRaInfo->DecisionRate;
 789
 790 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 791         // Disable power training when noisy environment
 792         if(pDM_Odm->bDisablePowerTraining)
 793         {
 794                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_PTTryState_8188E(): Disable power training when noisy environment\n"));
 795                 pRaInfo->PTStage = 0;
 796                 pRaInfo->RAstage = 0;
 797                 pRaInfo->PTStopCount = 0;
 798         }
 799 #endif
 800 }
 801
 802 static void
 803 odm_PTDecision_8188E(
 804         IN      PODM_RA_INFO_T          pRaInfo
 805         )
 806 {
 807         u1Byte stage_BUF;
 808         u1Byte j;
 809         u1Byte temp_stage;
 810         u4Byte numsc;
 811         u4Byte num_total;
 812         u1Byte stage_id;
 813
 814         stage_BUF=pRaInfo->PTStage;
 815         numsc  = 0;
 816         num_total= pRaInfo->TOTAL* PT_PENALTY[5];
 817         for(j=0;j<=4;j++)
 818         {
 819                 numsc += pRaInfo->RTY[j] * PT_PENALTY[j];
 820                 if(numsc>num_total)
 821                         break;
 822         }
 823
 824         j=j>>1;
 825         temp_stage= (pRaInfo->PTStage +1)>>1;
 826         if (temp_stage>j)
 827                 stage_id=temp_stage-j;
 828         else
 829                 stage_id=0;
 830
 831         pRaInfo->PTSmoothFactor=(pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2;
 832         if (pRaInfo->PTSmoothFactor>192)
 833                 pRaInfo->PTSmoothFactor=192;
 834         stage_id =pRaInfo->PTSmoothFactor>>6;
 835         temp_stage=stage_id*2;
 836         if (temp_stage!=0)
 837                 temp_stage-=1;
 838         if (pRaInfo->DROP>3)
 839                 temp_stage=0;
 840         pRaInfo->PTStage=temp_stage;
 841
 842 }
 843 #endif
 844
 845 static VOID
 846 odm_RATxRPTTimerSetting(
 847         IN      PDM_ODM_T               pDM_Odm,
 848         IN      u2Byte                  minRptTime
 849 )
 850 {
 851         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n"));
 852
 853
 854         if(pDM_Odm->CurrminRptTime != minRptTime){
 855                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
 856                 (" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime));
 857                 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP))
 858                 ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
 859                 #else
 860                 rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime);
 861                 #endif
 862                 pDM_Odm->CurrminRptTime = minRptTime;
 863         }
 864         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n"));
 865 }
 866
 867
 868 VOID
 869 ODM_RASupport_Init(
 870         IN      PDM_ODM_T       pDM_Odm
 871         )
 872 {
 873         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
 874
 875         // 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!!
 876         if (pDM_Odm->SupportICType == ODM_RTL8188E)
 877                 pDM_Odm->RaSupport88E = TRUE;
 878
 879                 }
 880
 881
 882
 883 int
 884 ODM_RAInfo_Init(
 885         IN      PDM_ODM_T       pDM_Odm,
 886         IN      u1Byte          MacID
 887         )
 888 {
 889         PODM_RA_INFO_T pRaInfo = &pDM_Odm->RAInfo[MacID];
 890         #if 1
 891         u1Byte WirelessMode=0xFF; //invalid value
 892         u1Byte max_rate_idx = 0x13; //MCS7
 893         if(pDM_Odm->pWirelessMode!=NULL){
 894                 WirelessMode=*(pDM_Odm->pWirelessMode);
 895         }
 896
 897         if(WirelessMode != 0xFF ){
 898                 if(WirelessMode & ODM_WM_N24G)
 899                         max_rate_idx = 0x13;
 900                 else if(WirelessMode & ODM_WM_G)
 901                         max_rate_idx = 0x0b;
 902                 else if(WirelessMode & ODM_WM_B)
 903                         max_rate_idx = 0x03;
 904         }
 905
 906         //printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__FUNCTION__,WirelessMode,max_rate_idx);
 907         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
 908                                 ("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x \n",
 909                                 WirelessMode,max_rate_idx));
 910
 911         pRaInfo->DecisionRate = max_rate_idx;
 912         pRaInfo->PreRate = max_rate_idx;
 913         pRaInfo->HighestRate=max_rate_idx;
 914         #else
 915         pRaInfo->DecisionRate = 0x13;
 916         pRaInfo->PreRate = 0x13;
 917         pRaInfo->HighestRate=0x13;
 918         #endif
 919         pRaInfo->LowestRate=0;
 920         pRaInfo->RateID=0;
 921         pRaInfo->RateMask=0xffffffff;
 922         pRaInfo->RssiStaRA=0;
 923         pRaInfo->PreRssiStaRA=0;
 924         pRaInfo->SGIEnable=0;
 925         pRaInfo->RAUseRate=0xffffffff;
 926         pRaInfo->NscDown=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
 927         pRaInfo->NscUp=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
 928         pRaInfo->RateSGI=0;
 929         pRaInfo->Active=1;      //Active is not used at present. by page, 110819
 930         pRaInfo->RptTime = 0x927c;
 931         pRaInfo->DROP=0;
 932         pRaInfo->RTY[0]=0;
 933         pRaInfo->RTY[1]=0;
 934         pRaInfo->RTY[2]=0;
 935         pRaInfo->RTY[3]=0;
 936         pRaInfo->RTY[4]=0;
 937         pRaInfo->TOTAL=0;
 938         pRaInfo->RAWaitingCounter=0;
 939         pRaInfo->RAPendingCounter=0;
 940 #if POWER_TRAINING_ACTIVE == 1
 941         pRaInfo->PTActive=1;   // Active when this STA is use
 942         pRaInfo->PTTryState=0;
 943         pRaInfo->PTStage=5; // Need to fill into HW_PWR_STATUS
 944         pRaInfo->PTSmoothFactor=192;
 945         pRaInfo->PTStopCount=0;
 946         pRaInfo->PTPreRate=0;
 947         pRaInfo->PTPreRssi=0;
 948         pRaInfo->PTModeSS=0;
 949         pRaInfo->RAstage=0;
 950 #endif
 951 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
 952         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
 953         pRaInfo->RateDownCounter = 0;
 954         pRaInfo->RateUpCounter = 0;
 955         pRaInfo->RateDirection = 0;
 956         pRaInfo->BoundingType = 0;
 957         pRaInfo->BoundingCounter = 0;
 958         pRaInfo->BoundingLearningTime = 0;
 959         pRaInfo->RateDownStartTime = 0;
 960 #endif
 961         return 0;
 962 }
 963
 964 int
 965 ODM_RAInfo_Init_all(
 966         IN    PDM_ODM_T         pDM_Odm
 967         )
 968 {
 969         u1Byte MacID = 0;
 970
 971         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n"));
 972         pDM_Odm->CurrminRptTime = 0;
 973
 974         for(MacID=0; MacID<ODM_ASSOCIATE_ENTRY_NUM; MacID++)
 975                 ODM_RAInfo_Init(pDM_Odm,MacID);
 976
 977         //Redifine arrays for I-cut NIC
 978         if (pDM_Odm->CutVersion == ODM_CUT_I)
 979         {
 980 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 981
 982                 u1Byte i;
 983                 u1Byte RETRY_PENALTY_IDX_S[2][RATESIZE] = {{4,4,4,5,
 984                                                                                                                         4,4,5,7,7,7,8,0x0a,            // SS>TH
 985                                                                                                                         4,4,4,4,6,0x0a,0x0b,0x0d,
 986                                                                                                                         5,5,7,7,8,0x0b,0x0d,0x0f},                         // 0329 R01
 987                                                                                                                         {0x0a,0x0a,0x0b,0x0c,
 988                                                                                                                         0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x13,           // SS<TH
 989                                                                                                                         0x06,0x07,0x08,0x0d,0x0e,0x11,0x11,0x11,
 990                                                                                                                         9,9,9,9,0x0c,0x0e,0x11,0x13}};
 991
 992                 u1Byte RETRY_PENALTY_UP_IDX_S[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,
 993                                                                                                                         0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x14,               // SS>TH
 994                                                                                                                         0x0b,0x0b,0x11,0x11,0x12,0x12,0x12,0x12,
 995                                                                                                                         0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
 996
 997                 for( i=0; i<RATESIZE; i++ )
 998                 {
 999                         RETRY_PENALTY_IDX[0][i] = RETRY_PENALTY_IDX_S[0][i];
1000                         RETRY_PENALTY_IDX[1][i] = RETRY_PENALTY_IDX_S[1][i];
1001
1002                         RETRY_PENALTY_UP_IDX[i] = RETRY_PENALTY_UP_IDX_S[i];
1003                 }
1004                 return 0;
1005 #endif
1006         }
1007
1008
1009 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)//This is for non-I-cut
1010 {
1011         PADAPTER        Adapter = pDM_Odm->Adapter;
1012
1013         //DbgPrint("Adapter->MgntInfo.RegRALvl = %d\n", Adapter->MgntInfo.RegRALvl);
1014
1015         //
1016         // 2012/09/14 MH Add for different Ra pattern init. For TPLINK case, we
1017         // need to to adjust different RA pattern for middle range RA. 20-30dB degarde
1018         // 88E rate adptve will raise too slow.
1019         //
1020         if (Adapter->MgntInfo.RegRALvl == 0)
1021         {
1022                 RETRY_PENALTY_UP_IDX[11] = 0x14;
1023
1024                 RETRY_PENALTY_UP_IDX[17] = 0x13;
1025                 RETRY_PENALTY_UP_IDX[18] = 0x14;
1026                 RETRY_PENALTY_UP_IDX[19] = 0x15;
1027
1028                 RETRY_PENALTY_UP_IDX[23] = 0x13;
1029                 RETRY_PENALTY_UP_IDX[24] = 0x13;
1030                 RETRY_PENALTY_UP_IDX[25] = 0x13;
1031                 RETRY_PENALTY_UP_IDX[26] = 0x14;
1032                 RETRY_PENALTY_UP_IDX[27] = 0x15;
1033         }
1034         else if (Adapter->MgntInfo.RegRALvl == 1)
1035         {
1036                 RETRY_PENALTY_UP_IDX[17] = 0x13;
1037                 RETRY_PENALTY_UP_IDX[18] = 0x13;
1038                 RETRY_PENALTY_UP_IDX[19] = 0x14;
1039
1040                 RETRY_PENALTY_UP_IDX[23] = 0x12;
1041                 RETRY_PENALTY_UP_IDX[24] = 0x13;
1042                 RETRY_PENALTY_UP_IDX[25] = 0x13;
1043                 RETRY_PENALTY_UP_IDX[26] = 0x13;
1044                 RETRY_PENALTY_UP_IDX[27] = 0x14;
1045         }
1046         else if (Adapter->MgntInfo.RegRALvl == 2)
1047         {
1048                 // Compile flag default is lvl2, we need not to update.
1049         }
1050         else if (Adapter->MgntInfo.RegRALvl >= 0x80)
1051         {
1052                 u1Byte  index = 0, offset = Adapter->MgntInfo.RegRALvl - 0x80;
1053
1054                 // Reset to default rate adaptive value.
1055                 RETRY_PENALTY_UP_IDX[11] = 0x14;
1056
1057                 RETRY_PENALTY_UP_IDX[17] = 0x13;
1058                 RETRY_PENALTY_UP_IDX[18] = 0x14;
1059                 RETRY_PENALTY_UP_IDX[19] = 0x15;
1060
1061                 RETRY_PENALTY_UP_IDX[23] = 0x13;
1062                 RETRY_PENALTY_UP_IDX[24] = 0x13;
1063                 RETRY_PENALTY_UP_IDX[25] = 0x13;
1064                 RETRY_PENALTY_UP_IDX[26] = 0x14;
1065                 RETRY_PENALTY_UP_IDX[27] = 0x15;
1066
1067                 if (Adapter->MgntInfo.RegRALvl >= 0x90)
1068                 {
1069                         offset = Adapter->MgntInfo.RegRALvl - 0x90;
1070                         // Lazy mode.
1071                         for (index = 0; index < 28; index++)
1072                         {
1073                                 RETRY_PENALTY_UP_IDX[index] += (offset);
1074                         }
1075                 }
1076                 else
1077                 {
1078                         // Aggrasive side.
1079                         for (index = 0; index < 28; index++)
1080                         {
1081                                 RETRY_PENALTY_UP_IDX[index] -= (offset);
1082                         }
1083                 }
1084
1085         }
1086 }
1087 #endif
1088
1089         return 0;
1090 }
1091
1092
1093 u1Byte
1094 ODM_RA_GetShortGI_8188E(
1095         IN      PDM_ODM_T       pDM_Odm,
1096         IN      u1Byte          MacID
1097 )
1098 {
1099         if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
1100                 return 0;
1101         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
1102                 ("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI));
1103         return pDM_Odm->RAInfo[MacID].RateSGI;
1104 }
1105
1106 u1Byte
1107 ODM_RA_GetDecisionRate_8188E(
1108         IN      PDM_ODM_T       pDM_Odm,
1109         IN      u1Byte          MacID
1110         )
1111 {
1112         u1Byte DecisionRate = 0;
1113
1114         if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
1115                 return 0;
1116         DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate);
1117         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
1118                 (" MacID=%d DecisionRate=0x%x\n", MacID, DecisionRate));
1119         return DecisionRate;
1120 }
1121
1122 u1Byte
1123 ODM_RA_GetHwPwrStatus_8188E(
1124         IN      PDM_ODM_T       pDM_Odm,
1125         IN      u1Byte          MacID
1126         )
1127 {
1128         u1Byte PTStage = 5;
1129         if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
1130                 return 0;
1131         PTStage = (pDM_Odm->RAInfo[MacID].PTStage);
1132         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
1133                 ("MacID=%d PTStage=0x%x\n", MacID, PTStage));
1134         return PTStage;
1135 }
1136
1137 VOID
1138 ODM_RA_UpdateRateInfo_8188E(
1139         IN PDM_ODM_T pDM_Odm,
1140         IN u1Byte MacID,
1141         IN u1Byte RateID,
1142         IN u4Byte RateMask,
1143         IN u1Byte SGIEnable
1144         )
1145 {
1146         PODM_RA_INFO_T pRaInfo = NULL;
1147
1148         if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
1149                 return;
1150
1151         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
1152                 ("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n",
1153                 MacID, RateID, RateMask, SGIEnable));
1154
1155         pRaInfo = &(pDM_Odm->RAInfo[MacID]);
1156         pRaInfo->RateID = RateID;
1157         pRaInfo->RateMask = RateMask;
1158         pRaInfo->SGIEnable = SGIEnable;
1159         odm_ARFBRefresh_8188E(pDM_Odm, pRaInfo);
1160 }
1161
1162 VOID
1163 ODM_RA_SetRSSI_8188E(
1164         IN      PDM_ODM_T               pDM_Odm,
1165         IN      u1Byte                  MacID,
1166         IN      u1Byte                  Rssi
1167         )
1168 {
1169         PODM_RA_INFO_T pRaInfo = NULL;
1170
1171         if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
1172                 return;
1173
1174         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
1175                 (" MacID=%d Rssi=%d\n", MacID, Rssi));
1176
1177         pRaInfo = &(pDM_Odm->RAInfo[MacID]);
1178         pRaInfo->RssiStaRA = Rssi;
1179 }
1180
1181 VOID
1182 ODM_RA_Set_TxRPT_Time(
1183         IN      PDM_ODM_T               pDM_Odm,
1184         IN      u2Byte                  minRptTime
1185         )
1186 {
1187 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
1188         if (minRptTime != 0xffff)
1189         {
1190 #if defined(CONFIG_PCI_HCI)
1191                 ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime);
1192 #elif defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
1193                 notify_tx_report_interval_change(pDM_Odm->priv, minRptTime);
1194 #endif
1195         }
1196 #else
1197         ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime);
1198 #endif
1199
1200 }
1201
1202
1203 VOID
1204 ODM_RA_TxRPT2Handle_8188E(
1205         IN      PDM_ODM_T               pDM_Odm,
1206         IN      pu1Byte                 TxRPT_Buf,
1207         IN      u2Byte                  TxRPT_Len,
1208         IN      u4Byte                  MacIDValidEntry0,
1209         IN      u4Byte                  MacIDValidEntry1
1210         )
1211 {
1212         PODM_RA_INFO_T pRAInfo = NULL;
1213         u1Byte                  MacId = 0;
1214         pu1Byte                 pBuffer = NULL;
1215         u4Byte                  valid = 0, ItemNum = 0;
1216         u2Byte                  minRptTime = 0x927c;
1217
1218         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0=%d valid1=%d BufferLength=%d\n",
1219                 MacIDValidEntry0, MacIDValidEntry1, TxRPT_Len));
1220
1221         ItemNum = TxRPT_Len >> 3;
1222         pBuffer = TxRPT_Buf;
1223
1224         do
1225         {
1226                 valid = 0;
1227                 if(MacId < 32)
1228                         valid = (1<<MacId) & MacIDValidEntry0;
1229                 else if(MacId < 64)
1230                         valid = (1<<(MacId-32)) & MacIDValidEntry1;
1231
1232                 if (MacId >= ODM_ASSOCIATE_ENTRY_NUM)
1233                         valid = 0;
1234
1235                 if(valid)
1236                 {
1237                         pRAInfo = &(pDM_Odm->RAInfo[MacId]);
1238
1239                         pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
1240                         pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
1241                         pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
1242                         pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
1243                         pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
1244                         pRAInfo->DROP =   (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
1245
1246                         pRAInfo->TOTAL = pRAInfo->RTY[0] + \
1247                                                           pRAInfo->RTY[1] + \
1248                                                           pRAInfo->RTY[2] + \
1249                                                           pRAInfo->RTY[3] + \
1250                                                           pRAInfo->RTY[4] + \
1251                                                           pRAInfo->DROP;
1252 #if defined(TXRETRY_CNT)
1253                         extern struct stat_info *get_macidinfo(struct rtl8192cd_priv *priv, unsigned int aid);
1254
1255                         {
1256                                 struct stat_info *pstat = get_macidinfo(pDM_Odm->priv, MacId);
1257                                 if (pstat) {
1258                                         pstat->cur_tx_ok += pRAInfo->RTY[0];
1259                                         pstat->cur_tx_retry_pkts += pRAInfo->RTY[1] + pRAInfo->RTY[2] + pRAInfo->RTY[3] + pRAInfo->RTY[4];
1260                                         pstat->cur_tx_retry_cnt += pRAInfo->RTY[1] + pRAInfo->RTY[2] * 2 + pRAInfo->RTY[3] * 3 + pRAInfo->RTY[4] * 4;
1261                                         pstat->total_tx_retry_cnt += pstat->cur_tx_retry_cnt;
1262                                         pstat->total_tx_retry_pkts += pstat->cur_tx_retry_pkts;
1263                                         pstat->cur_tx_fail += pRAInfo->DROP;
1264                                 }
1265                         }
1266 #endif
1267                         if(pRAInfo->TOTAL != 0)
1268                         {
1269                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
1270                                                         ("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n",
1271                                                         MacId,
1272                                                         pRAInfo->TOTAL,
1273                                                         pRAInfo->RTY[0],
1274                                                         pRAInfo->RTY[1],
1275                                                         pRAInfo->RTY[2],
1276                                                         pRAInfo->RTY[3],
1277                                                         pRAInfo->RTY[4],
1278                                                         pRAInfo->DROP,
1279                                                         MacIDValidEntry0 ,
1280                                                         MacIDValidEntry1));
1281 #if POWER_TRAINING_ACTIVE == 1
1282                                 if (pRAInfo->PTActive){
1283                                         if(pRAInfo->RAstage<5){
1284                                                 odm_RateDecision_8188E(pDM_Odm,pRAInfo);
1285                                         }
1286                                         else if(pRAInfo->RAstage==5){  // Power training try state
1287                                                 odm_PTTryState_8188E(pDM_Odm, pRAInfo);
1288                                         }
1289                                         else {// RAstage==6
1290                                                 odm_PTDecision_8188E(pRAInfo);
1291                                         }
1292
1293                                         // Stage_RA counter
1294                                         if (pRAInfo->RAstage<=5)
1295                                                 pRAInfo->RAstage++;
1296                                         else
1297                                                 pRAInfo->RAstage=0;
1298                                 }
1299                                 else{
1300                                         odm_RateDecision_8188E(pDM_Odm,pRAInfo);
1301                                 }
1302 #else
1303                                 odm_RateDecision_8188E(pDM_Odm, pRAInfo);
1304 #endif
1305
1306 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
1307                                 extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int);
1308                                 RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId);
1309 #ifdef DETECT_STA_EXISTANCE
1310                                 void RTL8188E_DetectSTAExistance(PDM_ODM_T      pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID);
1311                                 RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId);
1312 #endif
1313 #endif
1314
1315                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
1316                                                         ("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n",
1317                                                         MacId,
1318                                                         pRAInfo->RTY[0],
1319                                                         pRAInfo->RTY[1],
1320                                                         pRAInfo->RTY[2],
1321                                                         pRAInfo->RTY[3],
1322                                                         pRAInfo->RTY[4],
1323                                                         pRAInfo->DROP,
1324                                                         MacIDValidEntry0,
1325                                                         pRAInfo->DecisionRate,
1326                                                         pRAInfo->RateSGI));
1327
1328                                 if(minRptTime > pRAInfo->RptTime)
1329                                         minRptTime = pRAInfo->RptTime;
1330                         }
1331                         else
1332                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL=0!!!!\n"));
1333                 }
1334
1335                 pBuffer += TX_RPT2_ITEM_SIZE;
1336                 MacId++;
1337         }while(MacId < ItemNum);
1338
1339         odm_RATxRPTTimerSetting(pDM_Odm,minRptTime);
1340
1341
1342         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n"));
1343 }
1344
1345 #else
1346
1347 static VOID
1348 odm_RATxRPTTimerSetting(
1349         IN      PDM_ODM_T               pDM_Odm,
1350         IN      u2Byte                  minRptTime
1351 )
1352 {
1353         return;
1354 }
1355
1356
1357 VOID
1358 ODM_RASupport_Init(
1359         IN      PDM_ODM_T       pDM_Odm
1360         )
1361 {
1362         return;
1363 }
1364
1365 int
1366 ODM_RAInfo_Init(
1367         IN      PDM_ODM_T       pDM_Odm,
1368         IN      u1Byte          MacID
1369         )
1370 {
1371         return 0;
1372 }
1373
1374 int
1375 ODM_RAInfo_Init_all(
1376         IN    PDM_ODM_T         pDM_Odm
1377         )
1378 {
1379         return 0;
1380 }
1381
1382 u1Byte
1383 ODM_RA_GetShortGI_8188E(
1384         IN      PDM_ODM_T       pDM_Odm,
1385         IN      u1Byte          MacID
1386         )
1387 {
1388         return 0;
1389 }
1390
1391 u1Byte
1392 ODM_RA_GetDecisionRate_8188E(
1393         IN      PDM_ODM_T       pDM_Odm,
1394         IN      u1Byte          MacID
1395         )
1396 {
1397         return 0;
1398 }
1399 u1Byte
1400 ODM_RA_GetHwPwrStatus_8188E(
1401         IN      PDM_ODM_T       pDM_Odm,
1402         IN      u1Byte          MacID
1403         )
1404 {
1405         return 0;
1406 }
1407
1408 VOID
1409 ODM_RA_UpdateRateInfo_8188E(
1410         IN PDM_ODM_T pDM_Odm,
1411         IN u1Byte MacID,
1412         IN u1Byte RateID,
1413         IN u4Byte RateMask,
1414         IN u1Byte SGIEnable
1415         )
1416 {
1417         return;
1418 }
1419
1420 VOID
1421 ODM_RA_SetRSSI_8188E(
1422         IN      PDM_ODM_T               pDM_Odm,
1423         IN      u1Byte                  MacID,
1424         IN      u1Byte                  Rssi
1425         )
1426 {
1427         return;
1428 }
1429
1430 VOID
1431 ODM_RA_Set_TxRPT_Time(
1432         IN      PDM_ODM_T               pDM_Odm,
1433         IN      u2Byte                  minRptTime
1434         )
1435 {
1436         return;
1437 }
1438
1439 VOID
1440 ODM_RA_TxRPT2Handle_8188E(
1441         IN      PDM_ODM_T               pDM_Odm,
1442         IN      pu1Byte                 TxRPT_Buf,
1443         IN      u2Byte                  TxRPT_Len,
1444         IN      u4Byte                  MacIDValidEntry0,
1445         IN      u4Byte                  MacIDValidEntry1
1446         )
1447 {
1448         return;
1449 }
1450
1451
1452 #endif
1453