1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 //============================================================
23 //============================================================
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
27 #if (defined(CONFIG_RA_DBG_CMD))
29 ODM_C2HRaParaReportHandler(
35 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
36 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
38 u1Byte para_idx = CmdBuf[0]; //Retry Penalty, NH, NL
39 u1Byte RateTypeStart = CmdBuf[1];
40 u1Byte RateTypeLength = CmdLen - 2;
43 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0]));
45 if (para_idx == RADBG_RTY_PENALTY) {
46 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index| \n"));
48 for (i = 0 ; i < (RateTypeLength) ; i++) {
49 if (pRA_Table->is_ra_dbg_init)
50 pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i];
52 pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i];
53 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i]));
56 } else if (para_idx == RADBG_N_HIGH) {
57 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High| \n"));
60 } else if (para_idx == RADBG_N_LOW){
61 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low| \n"));
64 else if (para_idx == RADBG_RATE_UP_RTY_RATIO) {
65 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio| \n"));
67 for (i = 0 ; i < (RateTypeLength) ; i++) {
68 if (pRA_Table->is_ra_dbg_init)
69 pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
71 pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
72 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i]));
74 } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
75 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio| \n"));
77 for (i = 0 ; i < (RateTypeLength) ; i++) {
78 if (pRA_Table->is_ra_dbg_init)
79 pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
81 pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
82 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i]));
84 } else if (para_idx == RADBG_DEBUG_MONITOR1) {
85 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
86 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
88 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1]));
89 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Rate =", CmdBuf[2] & 0x7f));
90 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7));
91 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW =", CmdBuf[3]));
92 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW_max =", CmdBuf[4]));
93 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate0 =", CmdBuf[5]));
94 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate1 =", CmdBuf[6]));
95 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[7]));
96 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[8]));
97 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI_support =", CmdBuf[9]));
98 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "try_ness =", CmdBuf[10]));
99 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "pre_rate =", CmdBuf[11]));
101 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1]));
102 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x \n", "BW =", CmdBuf[2]));
103 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[3]));
104 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[4]));
105 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Hightest Rate =", CmdBuf[5]));
106 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Lowest Rate =", CmdBuf[6]));
107 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "SGI_support =", CmdBuf[7]));
108 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Rate_ID =", CmdBuf[8]));;
110 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
111 } else if (para_idx == RADBG_DEBUG_MONITOR2) {
112 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
113 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
114 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RateID =", CmdBuf[1]));
115 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "highest_rate =", CmdBuf[2]));
116 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "lowest_rate =", CmdBuf[3]));
118 for (i = 4 ; i <= 11 ; i++)
119 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x \n", CmdBuf[i]));
121 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x \n", "RA Mask:",
122 CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1]));
124 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
125 } else if (para_idx == RADBG_DEBUG_MONITOR3) {
127 for (i = 0 ; i < (CmdLen - 1) ; i++)
128 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d \n", i, CmdBuf[1 + i]));
129 } else if (para_idx == RADBG_DEBUG_MONITOR4)
130 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2]));
135 odm_RA_ParaAdjust_Send_H2C(
140 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
141 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
142 u1Byte H2C_Parameter[6] = {0};
144 H2C_Parameter[0] = RA_FIRST_MACID;
146 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d )) \n",pRA_Table->RA_Para_feedback_req ));
147 if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters
148 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n"));
149 H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters
150 H2C_Parameter[1] = pRA_Table->para_idx; //pRA_Table->para_idx;
151 pRA_Table->RA_Para_feedback_req = 0;
153 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n"));
155 H2C_Parameter[1] = pRA_Table->para_idx;
156 H2C_Parameter[2] = pRA_Table->rate_idx;
158 if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
159 H2C_Parameter[3] = pRA_Table->value;
160 H2C_Parameter[4] = 0;
163 else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW))
164 H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1
165 H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); //byte0
168 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x \n", H2C_Parameter[1]));
169 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x \n", H2C_Parameter[2]));
170 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x \n", H2C_Parameter[3]));
171 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x \n", H2C_Parameter[4]));
172 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x \n", H2C_Parameter[5]));
174 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter);
184 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
185 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
186 u1Byte para_idx = pRA_Table->para_idx;
187 u1Byte rate_idx = pRA_Table->rate_idx;
188 u1Byte value = pRA_Table->value;
189 u1Byte Pre_value = 0xff;
193 if (pRA_Table->para_idx == RADBG_RTY_PENALTY) {
194 Pre_value = pRA_Table->RTY_P[rate_idx];
195 pRA_Table->RTY_P[rate_idx] = value;
196 pRA_Table->RTY_P_modify_note[rate_idx] = 1;
197 } else if (pRA_Table->para_idx == RADBG_N_HIGH) {
199 } else if (pRA_Table->para_idx == RADBG_N_LOW) {
201 } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) {
202 Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx];
203 pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value;
204 pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1;
205 } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
206 Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx];
207 pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value;
208 pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1;
210 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value));
211 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
219 IN u1Byte *value_default,
220 IN u1Byte *modify_note
223 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
224 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
227 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n"));
228 for (i = 0 ; i <= (pRA_Table->rate_length); i++) {
229 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
230 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
232 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
241 IN u4Byte *const dm_value
244 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
245 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
247 pRA_Table->is_ra_dbg_init = FALSE;
249 if (dm_value[0] == 100) { /*1 Print RA Parameters*/
250 u1Byte default_pointer_value;
252 u1Byte *pvalue_default;
253 u1Byte *pmodify_note;
255 pvalue = pvalue_default = pmodify_note = &default_pointer_value;
257 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n"));
259 if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/
260 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n"));
261 pvalue = &(pRA_Table->RTY_P[0]);
262 pvalue_default = &(pRA_Table->RTY_P_default[0]);
263 pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]);
264 } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/
265 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n"));
267 } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/
268 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n"));
270 } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/
271 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n"));
272 pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]);
273 pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]);
274 pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]);
275 } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/
276 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n"));
277 pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]);
278 pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]);
279 pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]);
282 phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note);
283 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n"));
285 } else if (dm_value[0] == 101) {
286 pRA_Table->para_idx = (u1Byte)dm_value[1];
288 pRA_Table->RA_Para_feedback_req = 1;
289 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
291 pRA_Table->para_idx = (u1Byte)dm_value[0];
292 pRA_Table->rate_idx = (u1Byte)dm_value[1];
293 pRA_Table->value = (u1Byte)dm_value[2];
295 odm_RA_ParaAdjust(pDM_Odm);
301 odm_RA_ParaAdjust_init(
305 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
306 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
308 u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
310 RTY_PENALTY = 1, //u8
315 TRYING_NECESSARY = 6,
316 DROPING_NECESSARY = 7,
317 RATE_UP_RTY_RATIO = 8, //u8
318 RATE_DOWN_RTY_RATIO= 9, //u8
322 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n"));
324 pRA_Table->is_ra_dbg_init = TRUE;
325 for (i = 0; i < 3; i++) {
326 pRA_Table->RA_Para_feedback_req = 1;
327 pRA_Table->para_idx = ra_para_pool_u8[i];
328 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
331 if (pDM_Odm->SupportICType == ODM_RTL8192E)
332 pRA_Table->rate_length = ODM_RATEMCS15;
333 else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E))
334 pRA_Table->rate_length = ODM_RATEMCS7;
335 else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A))
336 pRA_Table->rate_length = ODM_RATEVHTSS1MCS9;
337 else if (pDM_Odm->SupportICType == ODM_RTL8812)
338 pRA_Table->rate_length = ODM_RATEVHTSS2MCS9;
339 else if (pDM_Odm->SupportICType == ODM_RTL8814A)
340 pRA_Table->rate_length = ODM_RATEVHTSS3MCS9;
342 pRA_Table->rate_length = ODM_RATEVHTSS4MCS9;
349 ODM_C2HRaParaReportHandler(
360 IN u4Byte *const dm_value
366 odm_RA_ParaAdjust_init(
373 #endif //#if (defined(CONFIG_RA_DBG_CMD))
376 phydm_ra_dynamic_retry_count(
380 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
381 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
383 u1Byte i, retry_offset;
385 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/
386 if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) {
388 if (pDM_Odm->NoisyDecision) {
389 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n"));
390 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0);
391 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201);
393 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n"));
394 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000);
395 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403);
397 pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision;
401 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
404 phydm_retry_limit_table_bound(
406 IN u1Byte *retry_limit,
410 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
411 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
413 if (*retry_limit > offset) {
415 *retry_limit -= offset;
417 if (*retry_limit < pRA_Table->retrylimit_low)
418 *retry_limit = pRA_Table->retrylimit_low;
419 else if (*retry_limit > pRA_Table->retrylimit_high)
420 *retry_limit = pRA_Table->retrylimit_high;
422 *retry_limit = pRA_Table->retrylimit_low;
426 phydm_reset_retry_limit_table(
430 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
431 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
434 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/
437 #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1))
438 u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = {
440 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
441 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/
442 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/
444 u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = {
446 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
447 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/
448 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/
451 #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
453 #elif (RTL8812A_SUPPORT == 1)
455 #elif(RTL8814A_SUPPORT == 1)
462 memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX);
463 memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX);
465 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
466 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0);
467 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0);
472 phydm_ra_dynamic_retry_limit(
476 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
477 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
479 u1Byte i, retry_offset;
483 if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) {
485 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n"));
489 if (pDM_Odm->number_active_client == 1) {
490 phydm_reset_retry_limit_table(pDM_Odm);
491 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n"));
494 retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num;
496 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
498 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset);
499 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset);
506 phydm_ra_dynamic_retry_limit_init(
510 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
511 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
513 pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM;
514 pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW;
515 pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH;
517 phydm_reset_retry_limit_table(pDM_Odm);
522 phydm_ra_dynamic_retry_limit(
529 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
531 phydm_ra_dynamic_rate_id_on_assoc(
533 IN u1Byte wireless_mode,
534 IN u1Byte init_rate_id
537 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
539 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id));
541 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
543 if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) &&
544 (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))
546 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n"));
547 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
548 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
549 } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) &&
550 (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))
552 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n"));
553 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
554 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
561 phydm_ra_dynamic_rate_id_init(
565 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
567 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) {
569 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
570 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
572 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
573 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
578 phydm_update_rate_id(
581 IN u1Byte platform_macid
584 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
585 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
586 u1Byte current_tx_ss;
587 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
588 u1Byte wireless_mode;
592 if (rate_idx >= ODM_RATEVHTSS2MCS0) {
593 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0)));
594 /*dummy for SD4 check patch*/
595 } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
596 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0)));
597 /*dummy for SD4 check patch*/
598 } else if (rate_idx >= ODM_RATEMCS0) {
599 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0)));
600 /*dummy for SD4 check patch*/
602 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx));
603 /*dummy for SD4 check patch*/
606 phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid];
607 pEntry = pDM_Odm->pODM_StaInfo[phydm_macid];
609 if (IS_STA_VALID(pEntry)) {
610 wireless_mode = pEntry->WirelessMode;
612 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
614 pEntry->ratr_idx = pEntry->ratr_idx_init;
615 if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/
616 if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/
618 pEntry->ratr_idx = ARFR_5_RATE_ID;
619 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n"));
621 } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/
622 if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/
624 pEntry->ratr_idx = ARFR_0_RATE_ID;
625 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n"));
628 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx));
636 phydm_c2h_ra_report_handler(
642 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
643 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
644 u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54};
645 u1Byte macid = CmdBuf[1];
647 u1Byte rate = CmdBuf[0];
648 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
649 u1Byte vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
650 u1Byte b_sgi = (rate & 0x80)>>7;
652 u1Byte pre_rate = pRA_Table->link_tx_rate[macid];
653 u1Byte pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/
654 u1Byte pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
655 u1Byte pre_b_sgi = (pre_rate & 0x80)>>7;
657 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
658 PADAPTER Adapter = pDM_Odm->Adapter;
660 GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx);
662 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
663 ODM_UpdateInitRate(pDM_Odm, rate_idx);
666 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/
667 /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/
670 if (CmdBuf[3] == 0) {
671 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n"));
673 } else if (CmdBuf[3] == 0xff) {
674 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n"));
676 } else if (CmdBuf[3] == 1) {
677 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n"));
679 } else if (CmdBuf[3] == 2) {
680 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n"));
682 } else if (CmdBuf[3] == 3) {
683 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n"));
685 } else if (CmdBuf[3] == 4) {
686 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n"));
688 } else if (CmdBuf[3] == 5) {
689 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n"));
695 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n",
697 ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "",
698 ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
699 ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
700 (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
701 (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)),
702 (pre_b_sgi) ? "-S" : " ",
703 (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M",
704 ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "",
705 ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
706 ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
707 (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
708 (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)),
709 (b_sgi) ? "-S" : " ",
710 (rate_idx >= ODM_RATEMCS0) ? "" : "M" ));
712 pRA_Table->link_tx_rate[macid] = rate;
715 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
716 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E))
717 phydm_update_rate_id(pDM_Odm, rate, macid);
727 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
728 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
729 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
730 pRA_Table->firstconnect = FALSE;
732 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
733 pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only)
739 ODM_RAPostActionOnAssoc(
743 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
745 pDM_Odm->H2C_RARpt_connect = 1;
746 odm_RSSIMonitorCheck(pDM_Odm);
747 pDM_Odm->H2C_RARpt_connect = 0;
751 odm_RSSIMonitorCheck(
756 // For AP/ADSL use prtl8192cd_priv
757 // For CE/NIC use PADAPTER
759 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
760 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
764 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
765 // at the same time. In the stage2/3, we need to prive universal interface and merge all
766 // HW dynamic mechanism.
768 switch (pDM_Odm->SupportPlatform) {
770 odm_RSSIMonitorCheckMP(pDM_Odm);
774 odm_RSSIMonitorCheckCE(pDM_Odm);
778 odm_RSSIMonitorCheckAP(pDM_Odm);
782 //odm_DIGAP(pDM_Odm);
786 } // odm_RSSIMonitorCheck
788 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
790 phydm_FindMinimumRSSI(
791 IN PDM_ODM_T pDM_Odm,
792 IN PADAPTER pAdapter,
793 IN OUT BOOLEAN *pbLink_temp
797 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
798 PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
799 BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter);
801 /*DbgPrint("bMediaConnect = %d, ACTING_AS_AP = %d , EntryMinUndecoratedSmoothedPWDB = %d\n",
802 pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/
805 /* 1.Determine the minimum RSSI */
806 if ((!pMgntInfo->bMediaConnect) ||
807 (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
809 pHalData->MinUndecoratedPWDBForDM = 0;
810 *pbLink_temp = FALSE;
816 if (pMgntInfo->bMediaConnect) { /* Default port*/
818 if (act_as_ap || pMgntInfo->mIbss) {
819 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
822 pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB;
825 } else { /* associated entry pwdb*/
826 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
830 return pHalData->MinUndecoratedPWDBForDM;
836 odm_RSSIMonitorCheckMP(
840 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
841 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
842 u1Byte H2C_Parameter[4] = {0};
844 BOOLEAN bExtRAInfo = FALSE;
846 u1Byte TxBF_EN = 0, stbc_en = 0;
848 PADAPTER Adapter = pDM_Odm->Adapter;
849 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
850 PRT_WLAN_STA pEntry = NULL;
851 s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
852 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
853 PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo;
854 u8Byte curTxOkCnt = 0, curRxOkCnt = 0;
855 //BOOLEAN FirstConnect = 0;
856 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
857 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
859 #if (BEAMFORMING_SUPPORT == 1)
860 BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE;
863 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
865 if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
870 //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
871 //pRA_Table->firstconnect = pHalData->bLinked;
875 if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP))
877 if(curRxOkCnt >(curTxOkCnt*6))
878 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015);
880 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015);
884 if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 ||
885 pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B)
887 if(curRxOkCnt >(curTxOkCnt*6))
888 H2C_Parameter[3]|=RAINFO_BE_RX_STATE;
892 while (pLoopAdapter) {
894 if (pLoopAdapter != NULL) {
895 pMgntInfo = &pLoopAdapter->MgntInfo;
896 curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;
897 curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;
898 pMgntInfo->lastTxOkCnt = curTxOkCnt;
899 pMgntInfo->lastRxOkCnt = curRxOkCnt;
902 for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
904 if (IsAPModeExist(pLoopAdapter)) {
905 if (GetFirstExtAdapter(pLoopAdapter) != NULL &&
906 GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter)
907 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
908 else if (GetFirstGOPort(pLoopAdapter) != NULL &&
909 IsFirstGoAdapter(pLoopAdapter))
910 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
912 if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter)
913 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
916 if (pEntry != NULL) {
917 if (pEntry->bAssociated) {
919 RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr);
920 RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n",
921 pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
924 #if (BEAMFORMING_SUPPORT)
925 Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->AssociatedMacId);
926 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
930 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
931 TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX))
934 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
935 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
936 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
937 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
940 if (curRxOkCnt > (curTxOkCnt * 6))
941 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
944 H2C_Parameter[3] |= RAINFO_BF_STATE;
947 H2C_Parameter[3] |= RAINFO_STBC_STATE;
950 if ( pDM_Odm->NoisyDecision )
952 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
955 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
957 if (pDM_Odm->H2C_RARpt_connect)
958 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
961 H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF);
962 //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
963 H2C_Parameter[0] = (pEntry->AssociatedMacId);
965 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
971 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
974 if (tmpEntryMaxPWDB != 0) { // If associated entry is found
975 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
976 RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB));
978 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
980 if (tmpEntryMinPWDB != 0xff) { // If associated entry is found
981 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
982 RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB));
985 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
987 // Indicate Rx signal strength to FW.
988 if (pHalData->bUseRAMask) {
989 PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo);
990 PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo);
993 #if (BEAMFORMING_SUPPORT == 1)
994 Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pDefaultMgntInfo->mMacId);
996 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
1001 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
1002 TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX))
1007 H2C_Parameter[3] |= RAINFO_BF_STATE;
1010 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1013 if (pDM_Odm->H2C_RARpt_connect)
1014 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1016 if ( pDM_Odm->NoisyDecision==1 )
1018 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
1019 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n"));
1022 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1024 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3]));
1027 H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF);
1028 //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1029 H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1031 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1033 // BT 3.0 HS mode Rssi
1034 if (pDM_Odm->bBtHsOperation) {
1035 H2C_Parameter[2] = pDM_Odm->btHsRssi;
1036 //H2C_Parameter[1] = 0x0;
1037 H2C_Parameter[0] = 2;
1039 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1042 PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB);
1044 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E))
1045 odm_RSSIDumpToRegister(pDM_Odm);
1049 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
1050 BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value;
1051 s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min;
1052 BOOLEAN bLink = FALSE;
1054 while (pLoopAdapter) {
1055 LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp);
1056 //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min);
1057 if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0))
1058 GlobalRSSI_min = LocalRSSI_Min;
1063 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1066 pHalData->bLinked = bLink;
1067 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink);
1070 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min);
1072 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0);
1076 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1079 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1081 s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id)
1083 PADAPTER Adapter = pDM_Odm->Adapter;
1084 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
1085 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1086 u8 H2C_Parameter[4] = {0};
1087 u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0;
1088 u8 cmdlen = 4, first_connect = _FALSE;
1089 u64 curTxOkCnt = 0, curRxOkCnt = 0;
1090 PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id];
1092 if (!IS_STA_VALID(pEntry))
1095 if (mac_id != pEntry->mac_id) {
1096 DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id);
1101 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1104 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) {
1105 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr));
1109 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes;
1110 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes;
1111 if (curRxOkCnt > (curTxOkCnt * 6))
1116 #ifdef CONFIG_BEAMFORMING
1118 #if (BEAMFORMING_SUPPORT == 1)
1119 BEAMFORMING_CAP Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->mac_id);
1120 #else/*for drv beamforming*/
1121 BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, pEntry->mac_id);
1124 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
1129 #endif /*#ifdef CONFIG_BEAMFORMING*/
1134 #ifdef CONFIG_80211AC_VHT
1135 if (IsSupportedVHT(pEntry->wireless_mode))
1136 STBC_TX = TEST_FLAG(pEntry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX);
1139 STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX);
1142 H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF);
1143 H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F;
1146 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1149 H2C_Parameter[3] |= RAINFO_BF_STATE;
1151 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1152 if (pDM_Odm->NoisyDecision)
1153 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1155 if (pEntry->ra_rpt_linked == _FALSE) {
1156 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1157 pEntry->ra_rpt_linked = _TRUE;
1158 first_connect = _TRUE;
1162 if (first_connect) {
1163 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__,
1164 pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1166 DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__,
1167 (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS",
1168 (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False");
1172 if (pHalData->fw_ractrl == _TRUE) {
1173 #if (RTL8188E_SUPPORT == 1)
1174 if (pDM_Odm->SupportICType == ODM_RTL8188E)
1177 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1179 #if ((RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1))
1180 if (pDM_Odm->SupportICType == ODM_RTL8188E)
1181 ODM_RA_SetRSSI_8188E(pDM_Odm, (u8)(pEntry->mac_id & 0xFF), pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F);
1187 void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext)
1189 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1192 PSTA_INFO_T pEntry = NULL;
1194 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1195 pEntry = pDM_Odm->pODM_StaInfo[i];
1196 if (IS_STA_VALID(pEntry)) {
1197 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1199 if (pEntry->ra_rpt_linked == _FALSE) {
1206 phydm_rssi_report(pDM_Odm, mac_id);
1208 void phydm_ra_rssi_rpt_wk(PVOID pContext)
1210 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1212 rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm);
1217 odm_RSSIMonitorCheckCE(
1221 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1222 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1223 PADAPTER Adapter = pDM_Odm->Adapter;
1224 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1227 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
1230 if (pDM_Odm->bLinked != _TRUE)
1233 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1234 pEntry = pDM_Odm->pODM_StaInfo[i];
1235 if (IS_STA_VALID(pEntry)) {
1236 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1239 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1))
1242 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
1243 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1245 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
1246 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1248 if (phydm_rssi_report(pDM_Odm, i))
1252 /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/
1254 if (tmpEntryMaxPWDB != 0) // If associated entry is found
1255 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
1257 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
1259 if (tmpEntryMinPWDB != 0xff) // If associated entry is found
1260 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
1262 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
1264 FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM
1266 pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM;
1267 //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
1268 #endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1273 odm_RSSIMonitorCheckAP(
1277 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1278 #if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT)
1280 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1281 u1Byte H2C_Parameter[4] = {0};
1283 BOOLEAN bExtRAInfo = FALSE;
1285 u1Byte TxBF_EN = 0, stbc_en = 0;
1287 prtl8192cd_priv priv = pDM_Odm->priv;
1289 BOOLEAN act_bfer = FALSE;
1291 #ifdef BEAMFORMING_SUPPORT
1292 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1293 pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable;
1294 pDM_BdcTable->num_Txbfee_Client = 0;
1295 pDM_BdcTable->num_Txbfer_Client = 0;
1299 if (pDM_Odm->H2C_RARpt_connect) {
1300 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n"));
1302 } else if (priv->up_time % 2)
1305 if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
1310 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1311 pstat = pDM_Odm->pODM_StaInfo[i];
1313 if (IS_STA_VALID(pstat)) {
1314 if (pstat->sta_in_firmware != 1)
1318 #ifdef BEAMFORMING_SUPPORT
1319 BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid);
1321 if (Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU ||
1322 Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_HT_EXPLICIT) ||
1323 Beamform_cap == (BEAMFORMER_CAP_VHT_SU | BEAMFORMEE_CAP_VHT_SU)) {
1328 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/
1330 if (act_bfer == TRUE) {
1331 pDM_BdcTable->w_BFee_Client[i] = 1; //AP act as BFer
1332 pDM_BdcTable->num_Txbfee_Client++;
1334 pDM_BdcTable->w_BFee_Client[i] = 0; //AP act as BFer
1337 if ((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU)) {
1338 pDM_BdcTable->w_BFer_Client[i] = 1; //AP act as BFee
1339 pDM_BdcTable->num_Txbfer_Client++;
1341 pDM_BdcTable->w_BFer_Client[i] = 0; //AP act as BFer
1347 if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) &&
1348 ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))
1349 #ifdef RTK_AC_SUPPORT
1350 || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_))
1358 if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6))
1359 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1362 H2C_Parameter[3] |= RAINFO_BF_STATE;
1365 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1368 if ( pDM_Odm->NoisyDecision )
1370 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
1373 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1375 if (pDM_Odm->H2C_RARpt_connect) {
1376 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1377 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n"));
1380 /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/
1383 H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF);
1384 H2C_Parameter[0] = REMAP_AID(pstat);
1386 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
1387 ("H2C_Parameter[3]=%d\n", H2C_Parameter[3]));
1389 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2]));
1390 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0]));
1392 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1404 odm_RateAdaptiveMaskInit(
1408 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1409 PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive;
1411 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1412 PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo;
1413 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
1415 pMgntInfo->Ratr_State = DM_RATR_STA_INIT;
1417 if (pMgntInfo->DM_Type == DM_Type_ByDriver)
1418 pHalData->bUseRAMask = TRUE;
1420 pHalData->bUseRAMask = FALSE;
1422 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1423 pOdmRA->Type = DM_Type_ByDriver;
1424 if (pOdmRA->Type == DM_Type_ByDriver)
1425 pDM_Odm->bUseRAMask = _TRUE;
1427 pDM_Odm->bUseRAMask = _FALSE;
1430 pOdmRA->RATRState = DM_RATR_STA_INIT;
1432 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
1433 if (pDM_Odm->SupportICType == ODM_RTL8812)
1434 pOdmRA->LdpcThres = 50;
1436 pOdmRA->LdpcThres = 35;
1438 pOdmRA->RtsThres = 35;
1440 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
1441 pOdmRA->LdpcThres = 35;
1442 pOdmRA->bUseLdpc = FALSE;
1445 pOdmRA->UltraLowRSSIThresh = 9;
1449 pOdmRA->HighRSSIThresh = 50;
1450 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
1451 ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
1452 pOdmRA->LowRSSIThresh = 23;
1454 pOdmRA->LowRSSIThresh = 20;
1457 /*-----------------------------------------------------------------------------
1458 * Function: odm_RefreshRateAdaptiveMask()
1460 * Overview: Update rate table mask according to rssi
1470 * 05/27/2009 hpfan Create Version 0.
1472 *---------------------------------------------------------------------------*/
1474 odm_RefreshRateAdaptiveMask(
1478 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1479 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n"));
1480 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) {
1481 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n"));
1485 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
1486 // at the same time. In the stage2/3, we need to prive universal interface and merge all
1487 // HW dynamic mechanism.
1489 switch (pDM_Odm->SupportPlatform) {
1491 odm_RefreshRateAdaptiveMaskMP(pDM_Odm);
1495 odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
1500 odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm);
1507 odm_RefreshRateAdaptiveMaskMP(
1511 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1512 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1513 PADAPTER pAdapter = pDM_Odm->Adapter;
1514 PADAPTER pTargetAdapter = NULL;
1515 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1516 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter);
1518 if (pAdapter->bDriverStopped) {
1519 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1523 if (!pHalData->bUseRAMask) {
1524 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1528 // if default port is connected, update RA table for default port (infrastructure mode only)
1529 if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) {
1530 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB);
1531 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n"));
1532 if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) {
1533 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1534 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State));
1535 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1536 } else if (pDM_Odm->bChangeState) {
1537 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1538 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1539 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1544 // The following part configure AP/VWifi/IBSS rate adaptive mask.
1547 if (pMgntInfo->mIbss) // Target: AP/IBSS peer.
1548 pTargetAdapter = GetDefaultAdapter(pAdapter);
1550 pTargetAdapter = GetFirstAPAdapter(pAdapter);
1552 // if extension port (softap) is started, updaet RA table for more than one clients associate
1553 if (pTargetAdapter != NULL) {
1555 PRT_WLAN_STA pEntry;
1557 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1558 pEntry = AsocEntry_EnumStation(pTargetAdapter, i);
1559 if (NULL != pEntry) {
1560 if (pEntry->bAssociated) {
1561 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1563 if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) {
1564 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr);
1565 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State));
1566 pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State);
1567 } else if (pDM_Odm->bChangeState) {
1568 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1569 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1576 if (pMgntInfo->bSetTXPowerTrainingByOid)
1577 pMgntInfo->bSetTXPowerTrainingByOid = FALSE;
1578 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1583 odm_RefreshRateAdaptiveMaskCE(
1587 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1588 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1590 PADAPTER pAdapter = pDM_Odm->Adapter;
1591 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
1593 if (RTW_CANNOT_RUN(pAdapter)) {
1594 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1598 if (!pDM_Odm->bUseRAMask) {
1599 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1603 //printk("==> %s \n",__FUNCTION__);
1605 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1606 PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
1607 if (IS_STA_VALID(pstat)) {
1608 if (IS_MCAST(pstat->hwaddr)) //if(psta->mac_id ==1)
1611 #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1))
1612 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) {
1613 if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) {
1614 pRA->bUseLdpc = TRUE;
1615 pRA->bLowerRtsRate = TRUE;
1616 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1617 Set_RA_LDPC_8812(pstat, TRUE);
1618 //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB);
1619 } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) {
1620 pRA->bUseLdpc = FALSE;
1621 pRA->bLowerRtsRate = FALSE;
1622 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1623 Set_RA_LDPC_8812(pstat, FALSE);
1624 //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB);
1629 if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) {
1630 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
1631 //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level);
1632 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1633 } else if (pDM_Odm->bChangeState) {
1634 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1635 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1645 odm_RefreshRateAdaptiveMaskAPADSL(
1649 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
1650 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1651 struct rtl8192cd_priv *priv = pDM_Odm->priv;
1652 struct aid_obj *aidarray;
1656 if (priv->up_time % 2)
1659 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1660 pstat = pDM_Odm->pODM_StaInfo[i];
1662 if (IS_STA_VALID(pstat)) {
1663 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
1664 aidarray = container_of(pstat, struct aid_obj, station);
1665 priv = aidarray->priv;
1668 if (!priv->pmib->dot11StationConfigEntry.autoRate)
1671 if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) {
1672 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr);
1673 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level));
1675 #ifdef CONFIG_WLAN_HAL
1676 if (IS_HAL_CHIP(priv)) {
1678 // if(!(pstat->state & WIFI_WDS))//if WDS donot setting
1680 GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level);
1683 #ifdef CONFIG_RTL_8812_SUPPORT
1684 if (GET_CHIP_VER(priv) == VERSION_8812E)
1685 UpdateHalRAMask8812(priv, pstat, 3);
1688 #ifdef CONFIG_RTL_88E_SUPPORT
1689 if (GET_CHIP_VER(priv) == VERSION_8188E) {
1691 add_RATid(priv, pstat);
1696 #if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT)
1697 add_update_RATid(priv, pstat);
1707 // Return Value: BOOLEAN
1708 // - TRUE: RATRState is changed.
1713 IN BOOLEAN bForceUpdate,
1714 OUT pu1Byte pRATRState
1717 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1718 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
1719 const u1Byte GoUpGap = 5;
1720 u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh;
1721 u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh;
1723 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState));
1724 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1725 // Threshold Adjustment:
1726 // when RSSI state trends to go up one or two levels, make sure RSSI is high enough.
1727 // Here GoUpGap is added to solve the boundary's level alternation issue.
1728 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1729 u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh;
1730 if (pDM_Odm->SupportICType == ODM_RTL8881A)
1731 LowRSSIThreshForRA = 30; // for LDPC / BCC switch
1734 switch (*pRATRState) {
1735 case DM_RATR_STA_INIT:
1736 case DM_RATR_STA_HIGH:
1739 case DM_RATR_STA_MIDDLE:
1740 HighRSSIThreshForRA += GoUpGap;
1743 case DM_RATR_STA_LOW:
1744 HighRSSIThreshForRA += GoUpGap;
1745 LowRSSIThreshForRA += GoUpGap;
1748 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1749 case DM_RATR_STA_ULTRA_LOW:
1750 HighRSSIThreshForRA += GoUpGap;
1751 LowRSSIThreshForRA += GoUpGap;
1752 UltraLowRSSIThreshForRA += GoUpGap;
1757 ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState));
1761 // Decide RATRState by RSSI.
1762 if (RSSI > HighRSSIThreshForRA)
1763 RATRState = DM_RATR_STA_HIGH;
1764 else if (RSSI > LowRSSIThreshForRA)
1765 RATRState = DM_RATR_STA_MIDDLE;
1767 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1768 else if (RSSI > UltraLowRSSIThreshForRA)
1769 RATRState = DM_RATR_STA_LOW;
1771 RATRState = DM_RATR_STA_ULTRA_LOW;
1774 RATRState = DM_RATR_STA_LOW;
1776 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1777 /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/
1779 if (*pRATRState != RATRState || bForceUpdate) {
1780 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState));
1781 *pRATRState = RATRState;
1789 odm_RefreshBasicRateMask(
1793 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1794 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1795 PADAPTER Adapter = pDM_Odm->Adapter;
1796 static u1Byte Stage = 0;
1797 u1Byte CurStage = 0;
1798 OCTET_STRING osRateSet;
1799 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
1800 u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
1802 if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821)
1805 if (pDM_Odm->bLinked == FALSE) // unlink Default port information
1807 else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40%
1809 else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45%
1812 CurStage = 2; // link 25% <= RSSI <= 30%
1814 if (CurStage != Stage) {
1815 if (CurStage == 1) {
1816 FillOctetString(osRateSet, RateSet, 5);
1817 FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE);
1818 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet);
1819 } else if (CurStage == 3 && (Stage == 1 || Stage == 2))
1820 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates));
1833 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1835 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
1836 phydm_ra_dynamic_retry_limit_init(pDM_Odm);
1838 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1839 phydm_ra_dynamic_rate_id_init(pDM_Odm);
1842 /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/
1846 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1851 IN BOOLEAN bErpProtect
1854 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1855 u1Byte RTS_Ini_Rate = ODM_RATE6M;
1857 if (bErpProtect) /* use CCK rate as RTS*/
1858 RTS_Ini_Rate = ODM_RATE1M;
1861 case ODM_RATEVHTSS3MCS9:
1862 case ODM_RATEVHTSS3MCS8:
1863 case ODM_RATEVHTSS3MCS7:
1864 case ODM_RATEVHTSS3MCS6:
1865 case ODM_RATEVHTSS3MCS5:
1866 case ODM_RATEVHTSS3MCS4:
1867 case ODM_RATEVHTSS3MCS3:
1868 case ODM_RATEVHTSS2MCS9:
1869 case ODM_RATEVHTSS2MCS8:
1870 case ODM_RATEVHTSS2MCS7:
1871 case ODM_RATEVHTSS2MCS6:
1872 case ODM_RATEVHTSS2MCS5:
1873 case ODM_RATEVHTSS2MCS4:
1874 case ODM_RATEVHTSS2MCS3:
1875 case ODM_RATEVHTSS1MCS9:
1876 case ODM_RATEVHTSS1MCS8:
1877 case ODM_RATEVHTSS1MCS7:
1878 case ODM_RATEVHTSS1MCS6:
1879 case ODM_RATEVHTSS1MCS5:
1880 case ODM_RATEVHTSS1MCS4:
1881 case ODM_RATEVHTSS1MCS3:
1896 RTS_Ini_Rate = ODM_RATE24M;
1898 case ODM_RATEVHTSS3MCS2:
1899 case ODM_RATEVHTSS3MCS1:
1900 case ODM_RATEVHTSS2MCS2:
1901 case ODM_RATEVHTSS2MCS1:
1902 case ODM_RATEVHTSS1MCS2:
1903 case ODM_RATEVHTSS1MCS1:
1910 RTS_Ini_Rate = ODM_RATE12M;
1912 case ODM_RATEVHTSS3MCS0:
1913 case ODM_RATEVHTSS2MCS0:
1914 case ODM_RATEVHTSS1MCS0:
1919 RTS_Ini_Rate = ODM_RATE6M;
1925 RTS_Ini_Rate = ODM_RATE1M;
1928 RTS_Ini_Rate = ODM_RATE6M;
1933 if (*pDM_Odm->pBandType == 1) {
1934 if (RTS_Ini_Rate < ODM_RATE6M)
1935 RTS_Ini_Rate = ODM_RATE6M;
1937 return RTS_Ini_Rate;
1942 odm_Set_RA_DM_ARFB_by_Noisy(
1943 IN PDM_ODM_T pDM_Odm
1946 /*DbgPrint("DM_ARFB ====>\n");*/
1947 if (pDM_Odm->bNoisyState) {
1948 ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000);
1949 ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200);
1950 /*DbgPrint("DM_ARFB ====> Noisy State\n");*/
1952 ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000);
1953 ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403);
1954 /*DbgPrint("DM_ARFB ====> Clean State\n");*/
1960 ODM_UpdateNoisyState(
1962 IN BOOLEAN bNoisyStateFromC2H
1965 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1967 /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/
1968 if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 ||
1969 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
1970 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
1971 odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
1975 Set_RA_DM_Ratrbitmap_by_Noisy(
1977 IN WIRELESS_MODE WirelessMode,
1978 IN u4Byte ratr_bitmap,
1979 IN u1Byte rssi_level
1982 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1983 u4Byte ret_bitmap = ratr_bitmap;
1987 switch (WirelessMode) {
1988 case WIRELESS_MODE_AC_24G:
1989 case WIRELESS_MODE_AC_5G:
1990 case WIRELESS_MODE_AC_ONLY:
1991 if (pDM_Odm->bNoisyState) { /*in Noisy State*/
1992 if (rssi_level == 1)
1993 ret_bitmap &= 0xfc3e0c08; // Reserve MCS 5-9
1994 else if (rssi_level == 2)
1995 ret_bitmap &= 0xfe3f8e08; // Reserve MCS 3-9
1996 else if (rssi_level == 3)
1997 ret_bitmap &= 0xffffffff;
1999 ret_bitmap &= 0xffffffff;
2000 } else { /* in SNR State*/
2001 if (rssi_level == 1)
2002 ret_bitmap &= 0xfe3f0e08; // Reserve MCS 4-9
2003 else if (rssi_level == 2)
2004 ret_bitmap &= 0xff3fcf8c; // Reserve MCS 2-9
2005 else if (rssi_level == 3)
2006 ret_bitmap &= 0xffffffff;
2008 ret_bitmap &= 0xffffffff;
2011 case WIRELESS_MODE_B:
2012 case WIRELESS_MODE_A:
2013 case WIRELESS_MODE_G:
2014 case WIRELESS_MODE_N_24G:
2015 case WIRELESS_MODE_N_5G:
2016 if (pDM_Odm->bNoisyState) {
2017 if (rssi_level == 1)
2018 ret_bitmap &= 0x0f0e0c08; // Reserve MCS 4-7; MCS12-15
2019 else if (rssi_level == 2)
2020 ret_bitmap &= 0x0fcfce0c; // Reserve MCS 2-7; MCS10-15
2021 else if (rssi_level == 3)
2022 ret_bitmap &= 0xffffffff;
2024 ret_bitmap &= 0xffffffff;
2026 if (rssi_level == 1)
2027 ret_bitmap &= 0x0f8f8e08; // Reserve MCS 3-7; MCS11-15
2028 else if (rssi_level == 2)
2029 ret_bitmap &= 0x0fefef8c; // Reserve MCS 1-7; MCS9-15
2030 else if (rssi_level == 3)
2031 ret_bitmap &= 0xffffffff;
2033 ret_bitmap &= 0xffffffff;
2039 /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/
2050 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2053 ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate));
2055 pDM_Odm->TxRate = Rate;
2056 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2057 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
2059 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2061 if (pDM_Odm->SupportICType == ODM_RTL8821) {
2062 #if (RTL8821A_SUPPORT == 1)
2063 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2065 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
2066 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) {
2067 #if (RTL8812A_SUPPORT == 1)
2068 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2071 } else if (pDM_Odm->SupportICType == ODM_RTL8723B) {
2072 #if (RTL8723B_SUPPORT == 1)
2073 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2075 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2076 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) {
2077 #if (RTL8192E_SUPPORT == 1)
2078 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2081 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
2082 #if (RTL8188E_SUPPORT == 1)
2083 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2088 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2094 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2097 odm_RSSIDumpToRegister(
2101 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2102 PADAPTER Adapter = pDM_Odm->Adapter;
2104 if (pDM_Odm->SupportICType == ODM_RTL8812) {
2105 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]);
2106 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]);
2109 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]);
2110 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]);
2113 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2114 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2117 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]);
2118 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]);
2121 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]);
2122 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]);
2123 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2124 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]);
2125 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]);
2127 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]);
2128 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]);
2130 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2131 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2133 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]);
2134 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]);
2136 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]);
2137 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]);
2142 odm_RefreshLdpcRtsMP(
2143 IN PADAPTER pAdapter,
2144 IN PDM_ODM_T pDM_Odm,
2147 IN s4Byte UndecoratedSmoothedPWDB
2150 BOOLEAN bCtlLdpc = FALSE;
2151 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter);
2152 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
2154 if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812)
2157 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2159 else if (pDM_Odm->SupportICType == ODM_RTL8812 &&
2160 IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP)
2164 if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5))
2165 MgntSet_TX_LDPC(pAdapter, mMacId, TRUE);
2166 else if (UndecoratedSmoothedPWDB > pRA->LdpcThres)
2167 MgntSet_TX_LDPC(pAdapter, mMacId, FALSE);
2170 if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5))
2171 pRA->bLowerRtsRate = TRUE;
2172 else if (UndecoratedSmoothedPWDB > pRA->RtsThres)
2173 pRA->bLowerRtsRate = FALSE;
2177 ODM_DynamicARFBSelect(
2180 IN BOOLEAN Collision_State
2183 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2184 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
2186 if (pDM_Odm->SupportICType != ODM_RTL8192E)
2189 if (Collision_State == pRA_Table->PT_collision_pre)
2192 if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) {
2193 if (Collision_State == 1) {
2194 if (rate == DESC_RATEMCS12) {
2196 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2197 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501);
2198 } else if (rate == DESC_RATEMCS11) {
2200 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2201 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605);
2202 } else if (rate == DESC_RATEMCS10) {
2204 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2205 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706);
2206 } else if (rate == DESC_RATEMCS9) {
2208 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2209 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707);
2212 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2213 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808);
2215 } else { /* Collision_State == 0*/
2216 if (rate == DESC_RATEMCS12) {
2218 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000);
2219 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2220 } else if (rate == DESC_RATEMCS11) {
2222 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000);
2223 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807);
2224 } else if (rate == DESC_RATEMCS10) {
2226 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000);
2227 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908);
2228 } else if (rate == DESC_RATEMCS9) {
2230 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000);
2231 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808);
2234 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000);
2235 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909);
2238 } else { /* MCS13~MCS15, 1SS, G-mode*/
2239 if (Collision_State == 1) {
2240 if (rate == DESC_RATEMCS15) {
2242 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2243 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302);
2244 } else if (rate == DESC_RATEMCS14) {
2246 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2247 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302);
2248 } else if (rate == DESC_RATEMCS13) {
2250 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2251 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502);
2254 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2255 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402);
2257 } else { // Collision_State == 0
2258 if (rate == DESC_RATEMCS15) {
2260 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2261 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504);
2262 } else if (rate == DESC_RATEMCS14) {
2264 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2265 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2266 } else if (rate == DESC_RATEMCS13) {
2268 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000);
2269 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2272 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000);
2273 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2280 pRA_Table->PT_collision_pre = Collision_State;
2284 ODM_RateAdaptiveStateApInit(
2285 IN PVOID PADAPTER_VOID,
2286 IN PRT_WLAN_STA pEntry
2289 PADAPTER Adapter = (PADAPTER)PADAPTER_VOID;
2290 pEntry->Ratr_State = DM_RATR_STA_INIT;
2292 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
2296 IN PADAPTER pAdapter
2299 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2300 PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
2302 /*Determine the minimum RSSI*/
2304 if ((pDM_Odm->bLinked != _TRUE) &&
2305 (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) {
2306 pHalData->MinUndecoratedPWDBForDM = 0;
2307 /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/
2309 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2311 /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/
2312 /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/
2316 PhyDM_Get_Rate_Bitmap_Ex(
2320 IN u1Byte rssi_level,
2321 OUT u8Byte *dm_RA_Mask,
2322 OUT u1Byte *dm_RteID
2325 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2327 u8Byte rate_bitmap = 0;
2328 u1Byte WirelessMode;
2330 pEntry = pDM_Odm->pODM_StaInfo[macid];
2331 if (!IS_STA_VALID(pEntry))
2333 WirelessMode = pEntry->wireless_mode;
2334 switch (WirelessMode) {
2336 if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */
2337 rate_bitmap = 0x000000000000000d;
2339 rate_bitmap = 0x000000000000000f;
2344 if (rssi_level == DM_RATR_STA_HIGH)
2345 rate_bitmap = 0x0000000000000f00;
2347 rate_bitmap = 0x0000000000000ff0;
2350 case (ODM_WM_B|ODM_WM_G):
2351 if (rssi_level == DM_RATR_STA_HIGH)
2352 rate_bitmap = 0x0000000000000f00;
2353 else if (rssi_level == DM_RATR_STA_MIDDLE)
2354 rate_bitmap = 0x0000000000000ff0;
2356 rate_bitmap = 0x0000000000000ff5;
2359 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
2360 case (ODM_WM_B|ODM_WM_N24G):
2361 case (ODM_WM_G|ODM_WM_N24G):
2362 case (ODM_WM_A|ODM_WM_N5G): {
2363 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
2364 if (rssi_level == DM_RATR_STA_HIGH)
2365 rate_bitmap = 0x00000000000f0000;
2366 else if (rssi_level == DM_RATR_STA_MIDDLE)
2367 rate_bitmap = 0x00000000000ff000;
2369 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2370 rate_bitmap = 0x00000000000ff015;
2372 rate_bitmap = 0x00000000000ff005;
2374 } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) {
2375 if (rssi_level == DM_RATR_STA_HIGH)
2376 rate_bitmap = 0x000000000f8f0000;
2377 else if (rssi_level == DM_RATR_STA_MIDDLE)
2378 rate_bitmap = 0x000000000f8ff000;
2380 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2381 rate_bitmap = 0x000000000f8ff015;
2383 rate_bitmap = 0x000000000f8ff005;
2386 if (rssi_level == DM_RATR_STA_HIGH)
2387 rate_bitmap = 0x0000000f0f0f0000;
2388 else if (rssi_level == DM_RATR_STA_MIDDLE)
2389 rate_bitmap = 0x0000000fcfcfe000;
2391 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2392 rate_bitmap = 0x0000000ffffff015;
2394 rate_bitmap = 0x0000000ffffff005;
2400 case (ODM_WM_AC|ODM_WM_G):
2401 if (rssi_level == 1)
2402 rate_bitmap = 0x00000000fc3f0000;
2403 else if (rssi_level == 2)
2404 rate_bitmap = 0x00000000fffff000;
2406 rate_bitmap = 0x00000000ffffffff;
2409 case (ODM_WM_AC|ODM_WM_A):
2411 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
2412 if (rssi_level == 1) /* add by Gary for ac-series */
2413 rate_bitmap = 0x00000000003f8000;
2414 else if (rssi_level == 2)
2415 rate_bitmap = 0x00000000003fe000;
2417 rate_bitmap = 0x00000000003ff010;
2418 } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) {
2419 if (rssi_level == 1) /* add by Gary for ac-series */
2420 rate_bitmap = 0x00000000fe3f8000; /* VHT 2SS MCS3~9 */
2421 else if (rssi_level == 2)
2422 rate_bitmap = 0x00000000fffff000; /* VHT 2SS MCS0~9 */
2424 rate_bitmap = 0x00000000fffff010; /* All */
2426 if (rssi_level == 1) /* add by Gary for ac-series */
2427 rate_bitmap = 0x000003f8fe3f8000ULL; /* VHT 3SS MCS3~9 */
2428 else if (rssi_level == 2)
2429 rate_bitmap = 0x000003fffffff000ULL; /* VHT3SS MCS0~9 */
2431 rate_bitmap = 0x000003fffffff010ULL; /* All */
2436 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R)
2437 rate_bitmap = 0x00000000000fffff;
2438 else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R)
2439 rate_bitmap = 0x000000000fffffff;
2441 rate_bitmap = 0x0000003fffffffffULL;
2445 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap));
2447 return (ra_mask & rate_bitmap);
2452 ODM_Get_Rate_Bitmap(
2456 IN u1Byte rssi_level
2459 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2461 u4Byte rate_bitmap = 0;
2462 u1Byte WirelessMode;
2463 //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode);
2466 pEntry = pDM_Odm->pODM_StaInfo[macid];
2467 if (!IS_STA_VALID(pEntry))
2470 WirelessMode = pEntry->wireless_mode;
2472 switch (WirelessMode) {
2474 if (ra_mask & 0x0000000c) //11M or 5.5M enable
2475 rate_bitmap = 0x0000000d;
2477 rate_bitmap = 0x0000000f;
2482 if (rssi_level == DM_RATR_STA_HIGH)
2483 rate_bitmap = 0x00000f00;
2485 rate_bitmap = 0x00000ff0;
2488 case (ODM_WM_B|ODM_WM_G):
2489 if (rssi_level == DM_RATR_STA_HIGH)
2490 rate_bitmap = 0x00000f00;
2491 else if (rssi_level == DM_RATR_STA_MIDDLE)
2492 rate_bitmap = 0x00000ff0;
2494 rate_bitmap = 0x00000ff5;
2497 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) :
2498 case (ODM_WM_B|ODM_WM_N24G) :
2499 case (ODM_WM_G|ODM_WM_N24G) :
2500 case (ODM_WM_A|ODM_WM_N5G) : {
2501 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
2502 if (rssi_level == DM_RATR_STA_HIGH)
2503 rate_bitmap = 0x000f0000;
2504 else if (rssi_level == DM_RATR_STA_MIDDLE)
2505 rate_bitmap = 0x000ff000;
2507 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2508 rate_bitmap = 0x000ff015;
2510 rate_bitmap = 0x000ff005;
2513 if (rssi_level == DM_RATR_STA_HIGH)
2514 rate_bitmap = 0x0f8f0000;
2515 else if (rssi_level == DM_RATR_STA_MIDDLE)
2516 rate_bitmap = 0x0f8ff000;
2518 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2519 rate_bitmap = 0x0f8ff015;
2521 rate_bitmap = 0x0f8ff005;
2527 case (ODM_WM_AC|ODM_WM_G):
2528 if (rssi_level == 1)
2529 rate_bitmap = 0xfc3f0000;
2530 else if (rssi_level == 2)
2531 rate_bitmap = 0xfffff000;
2533 rate_bitmap = 0xffffffff;
2536 case (ODM_WM_AC|ODM_WM_A):
2538 if (pDM_Odm->RFType == RF_1T1R) {
2539 if (rssi_level == 1) // add by Gary for ac-series
2540 rate_bitmap = 0x003f8000;
2541 else if (rssi_level == 2)
2542 rate_bitmap = 0x003ff000;
2544 rate_bitmap = 0x003ff010;
2546 if (rssi_level == 1) // add by Gary for ac-series
2547 rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9
2548 else if (rssi_level == 2)
2549 rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9
2551 rate_bitmap = 0xfffff010; // All
2556 if (pDM_Odm->RFType == RF_1T2R)
2557 rate_bitmap = 0x000fffff;
2559 rate_bitmap = 0x0fffffff;
2564 DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap);
2565 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap));
2567 return (ra_mask & rate_bitmap);
2571 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2573 #endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/