1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 //============================================================
23 //============================================================
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
29 ODM_ChangeDynamicInitGainThresh(
35 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
36 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
38 if (DM_Type == DIG_TYPE_THRESH_HIGH)
40 pDM_DigTable->RssiHighThresh = DM_Value;
42 else if (DM_Type == DIG_TYPE_THRESH_LOW)
44 pDM_DigTable->RssiLowThresh = DM_Value;
46 else if (DM_Type == DIG_TYPE_ENABLE)
48 pDM_DigTable->Dig_Enable_Flag = TRUE;
50 else if (DM_Type == DIG_TYPE_DISABLE)
52 pDM_DigTable->Dig_Enable_Flag = FALSE;
54 else if (DM_Type == DIG_TYPE_BACKOFF)
58 pDM_DigTable->BackoffVal = (u1Byte)DM_Value;
60 else if(DM_Type == DIG_TYPE_RX_GAIN_MIN)
64 pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value;
66 else if(DM_Type == DIG_TYPE_RX_GAIN_MAX)
70 pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value;
72 } // DM_ChangeDynamicInitGainThresh //
75 getIGIForDiff(int value_IGI)
77 #define ONERCCA_LOW_TH 0x30
78 #define ONERCCA_LOW_DIFF 8
80 if (value_IGI < ONERCCA_LOW_TH) {
81 if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF)
82 return ONERCCA_LOW_TH;
84 return value_IGI + ONERCCA_LOW_DIFF;
94 IN BOOLEAN bPerformance,
97 OUT u4Byte* dm_FA_thres
100 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
102 if(pDM_Odm->bLinked && (bPerformance||bDFSBand))
104 if(pDM_Odm->SupportICType == ODM_RTL8192D)
106 // 8192D special case
107 dm_FA_thres[0] = DM_DIG_FA_TH0_92D;
108 dm_FA_thres[1] = DM_DIG_FA_TH1_92D;
109 dm_FA_thres[2] = DM_DIG_FA_TH2_92D;
111 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
112 else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL))
115 if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps
117 dm_FA_thres[0] = 0x080;
118 dm_FA_thres[1] = 0x100;
119 dm_FA_thres[2] = 0x200;
123 dm_FA_thres[0] = 0x100;
124 dm_FA_thres[1] = 0x200;
125 dm_FA_thres[2] = 0x300;
129 else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig)
131 // 8723A BT special case
132 dm_FA_thres[0] = DM_DIG_FA_TH0;
133 dm_FA_thres[1] = 0x250;
134 dm_FA_thres[2] = 0x300;
140 dm_FA_thres[0] = DM_DIG_FA_TH0;
141 dm_FA_thres[1] = DM_DIG_FA_TH1;
142 dm_FA_thres[2] = DM_DIG_FA_TH2;
147 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
150 // For DFS band and no link
151 dm_FA_thres[0] = 250;
152 dm_FA_thres[1] = 1000;
153 dm_FA_thres[2] = 2000;
158 dm_FA_thres[0] = 2000;
159 dm_FA_thres[1] = 4000;
160 dm_FA_thres[2] = 5000;
167 odm_ForbiddenIGICheck(
169 IN u1Byte DIG_Dynamic_MIN,
173 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
174 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
175 PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
176 u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min;
178 if(pFalseAlmCnt->Cnt_all > 10000)
180 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n"));
182 if(pDM_DigTable->LargeFAHit != 3)
183 pDM_DigTable->LargeFAHit++;
185 if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue)
187 pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue;
188 pDM_DigTable->LargeFAHit = 1;
191 if(pDM_DigTable->LargeFAHit >= 3)
193 if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max)
194 rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
196 rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2);
197 pDM_DigTable->Recover_cnt = 1800;
198 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt));
203 if(pDM_DigTable->Recover_cnt != 0)
205 pDM_DigTable->Recover_cnt --;
206 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt));
210 if(pDM_DigTable->LargeFAHit < 3)
212 if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN)
214 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN;
215 rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN;
216 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n"));
220 pDM_DigTable->ForbiddenIGI -= 2;
221 rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2);
222 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n"));
227 pDM_DigTable->LargeFAHit = 0;
232 return rx_gain_range_min;
237 odm_InbandNoiseCalculate (
241 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
242 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
243 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
244 u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0;
245 BOOLEAN bTimeout = TRUE;
246 s1Byte sNoise_A, sNoise_B;
247 s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0;
249 static u1Byte failCnt = 0;
251 if(!(pDM_Odm->SupportICType & (ODM_RTL8192E)))
254 if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R)
257 if(!pDM_DigTable->bNoiseEst)
260 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n"));
262 //1 Set initial gain.
263 IGIBackup = pDM_DigTable->CurIGValue;
264 pDM_DigTable->IGIOffset_A = 0;
265 pDM_DigTable->IGIOffset_B = 0;
266 ODM_Write_DIG(pDM_Odm, 0x24);
268 //1 Update idle time power report
269 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
270 ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0);
274 //1 Get noise power level
277 //2 Read Noise Floor Report
278 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
279 tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord);
281 sNoise_A = (s1Byte)(tmp & 0xff);
282 sNoise_B = (s1Byte)((tmp & 0xff00)>>8);
284 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B));
286 if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70))
289 NoiseRpt_A += sNoise_A;
290 NoiseRpt_B += sNoise_B;
291 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B));
295 bTimeout = (TimeCnt >= 150)?TRUE:FALSE;
297 if(ValidCnt == 20 || bTimeout)
304 //1 Keep idle time power report
305 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
306 ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1);
309 ODM_Write_DIG(pDM_Odm, IGIBackup);
311 //1 Calculate Noise Floor
314 NoiseRpt_A /= (ValidCnt<<1);
315 NoiseRpt_B /= (ValidCnt<<1);
324 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt));
329 pDM_DigTable->bNoiseEst = FALSE;
334 NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6;
335 NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6;
336 pDM_DigTable->bNoiseEst = FALSE;
338 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B));
341 //1 Calculate IGI Offset
342 if(NoiseRpt_A > NoiseRpt_B)
344 pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B;
345 pDM_DigTable->IGIOffset_B = 0;
349 pDM_DigTable->IGIOffset_A = 0;
350 pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A;
362 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
363 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
364 pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable;
366 u1Byte digUpBound=0x5a;
368 if(pDM_Odm->bBtConnectProcess)
370 if(pDM_Odm->SupportICType&(ODM_RTL8723A))
378 // Decide DIG value by BT HS RSSI.
380 digForBtHs = pDM_Odm->btHsRssi+4;
383 if(pDM_Odm->SupportICType&(ODM_RTL8723A))
386 if(digForBtHs > digUpBound)
387 digForBtHs = digUpBound;
388 if(digForBtHs < 0x1c)
391 // update Current IGI
392 pDM_DigTable->BT30_CurIGI = digForBtHs;
394 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs));
404 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
405 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
407 if (pDM_DigTable->bStopDIG) {
408 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Stop Writing IGI\n"));
412 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n",
413 ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm)));
415 //1 Check initial gain by upper bound
416 if ((!pDM_DigTable->bPSDInProgress) && pDM_Odm->bLinked)
418 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) {
419 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x) is larger than upper bound !!\n", CurrentIGI));
420 CurrentIGI = pDM_DigTable->rx_gain_range_max;
422 if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE)
424 if(CurrentIGI > pDM_Odm->Adaptivity_IGI_upper)
425 CurrentIGI = pDM_Odm->Adaptivity_IGI_upper;
427 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", CurrentIGI));
431 if(pDM_DigTable->CurIGValue != CurrentIGI)
434 /*Add by YuChen for USB IO too slow issue*/
435 if ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && (CurrentIGI > pDM_DigTable->CurIGValue))
436 Phydm_Adaptivity(pDM_Odm, CurrentIGI);
439 if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))
441 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
443 if(pDM_Odm->RFType > ODM_1T1R)
444 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
446 if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R))
448 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
449 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
452 else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL))
454 switch(*(pDM_Odm->pOnePathCCA))
457 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
459 if(pDM_Odm->RFType > ODM_1T1R)
460 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
462 if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R))
464 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
465 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
469 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
470 if(pDM_Odm->RFType != ODM_1T1R)
471 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI));
474 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI));
475 if(pDM_Odm->RFType != ODM_1T1R)
476 ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
480 pDM_DigTable->CurIGValue = CurrentIGI;
483 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x).\n", CurrentIGI));
490 IN PHYDM_PAUSE_TYPE PauseType,
491 IN PHYDM_PAUSE_LEVEL pause_level,
495 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
496 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
498 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========> level = %d\n", pause_level));
500 if ((pDM_DigTable->pause_dig_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) {
501 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
502 ("odm_PauseDIG(): Return: SupportAbility DIG or FA is disabled !!\n"));
506 if (pause_level > DM_DIG_MAX_PAUSE_TYPE) {
507 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
508 ("odm_PauseDIG(): Return: Wrong pause level !!\n"));
512 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue));
513 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
514 pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4],
515 pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0]));
522 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG));
523 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n"));
525 /* Backup IGI value */
526 if (pDM_DigTable->pause_dig_level == 0) {
527 pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue;
528 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x, new IGI = 0x%x\n", pDM_DigTable->IGIBackup, IGIValue));
531 /* Record IGI value */
532 pDM_DigTable->pause_dig_value[pause_level] = IGIValue;
534 /* Update pause level */
535 pDM_DigTable->pause_dig_level = (pDM_DigTable->pause_dig_level | BIT(pause_level));
537 /* Write new IGI value */
538 if (BIT(pause_level + 1) > pDM_DigTable->pause_dig_level) {
539 ODM_Write_DIG(pDM_Odm, IGIValue);
540 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): IGI of higher level = 0x%x\n", IGIValue));
547 /* check if the level is illegal or not */
548 if ((pDM_DigTable->pause_dig_level & (BIT(pause_level))) != 0) {
549 pDM_DigTable->pause_dig_level = pDM_DigTable->pause_dig_level & (~(BIT(pause_level)));
550 pDM_DigTable->pause_dig_value[pause_level] = 0;
551 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n"));
553 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong resume level !!\n"));
558 if (pDM_DigTable->pause_dig_level == 0) {
559 /* Write backup IGI value */
560 ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup);
561 pDM_DigTable->bIgnoreDIG = TRUE;
562 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup));
565 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG);
569 if (BIT(pause_level) > pDM_DigTable->pause_dig_level) {
572 /* Calculate the maximum level now */
573 for (max_level = (pause_level - 1); max_level >= 0; max_level--) {
574 if ((pDM_DigTable->pause_dig_level & BIT(max_level)) > 0)
578 /* write IGI of lower level */
579 ODM_Write_DIG(pDM_Odm, pDM_DigTable->pause_dig_value[max_level]);
580 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write IGI (0x%x) of level (%d)\n",
581 pDM_DigTable->pause_dig_value[max_level], max_level));
587 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n"));
591 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue));
592 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
593 pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4],
594 pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0]));
603 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
604 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
606 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
607 prtl8192cd_priv priv = pDM_Odm->priv;
608 #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
609 PADAPTER pAdapter = pDM_Odm->Adapter;
610 pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table;
614 if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
616 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n"));
621 if(!(pDM_Odm->SupportAbility & ODM_BB_DIG))
623 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n"));
628 if(*(pDM_Odm->pbScanInProcess))
630 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n"));
634 if(pDM_DigTable->bIgnoreDIG)
636 pDM_DigTable->bIgnoreDIG = FALSE;
637 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Ignore DIG \n"));
641 //add by Neil Chen to avoid PSD is processing
642 if(pDM_Odm->bDMInitialGainEnable == FALSE)
644 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n"));
648 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
649 #if OS_WIN_FROM_WIN7(OS_VERSION)
650 if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest)
652 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n"));
657 if(pDM_Odm->bBtHsOperation)
659 odm_DigForBtHsMode(pDM_Odm);
662 if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E)))
664 if(pRX_HP_Table->RXHP_flag == 1)
666 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n"));
670 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
671 #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
672 if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0))
674 printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min);
675 ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi);
680 if (!(priv->up_time > 5))
682 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n"));
695 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
696 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
697 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
698 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
701 pDM_DigTable->bStopDIG = FALSE;
702 pDM_DigTable->bIgnoreDIG = FALSE;
703 pDM_DigTable->bPSDInProgress = FALSE;
704 pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm));
705 pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
706 pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
707 pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW;
708 pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH;
709 pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
710 pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
711 pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
712 pDM_DigTable->PreCCK_CCAThres = 0xFF;
713 pDM_DigTable->CurCCK_CCAThres = 0x83;
714 pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC;
715 pDM_DigTable->LargeFAHit = 0;
716 pDM_DigTable->Recover_cnt = 0;
717 pDM_DigTable->bMediaConnect_0 = FALSE;
718 pDM_DigTable->bMediaConnect_1 = FALSE;
720 //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error
721 pDM_Odm->bDMInitialGainEnable = TRUE;
723 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
724 pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25;
725 pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25;
727 // For AP\ ADSL modified DIG
728 pDM_DigTable->bTpTarget = FALSE;
729 pDM_DigTable->bNoiseEst = TRUE;
730 pDM_DigTable->IGIOffset_A = 0;
731 pDM_DigTable->IGIOffset_B = 0;
732 pDM_DigTable->TpTrainTH_min = 0;
735 FalseAlmCnt->Cnt_Ofdm_fail_pre = 0;
738 if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
740 ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd);
743 pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC;
744 pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC;
747 pDM_DigTable->BT30_CurIGI=0x32;
749 ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_dig_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1));
750 pDM_DigTable->pause_dig_level = 0;
751 ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_cckpd_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1));
752 pDM_DigTable->pause_cckpd_level = 0;
755 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA))
757 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
758 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
762 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
763 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
774 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
775 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
776 PADAPTER pAdapter = pDM_Odm->Adapter;
777 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
778 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
779 prtl8192cd_priv priv = pDM_Odm->priv;
784 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
785 PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
786 BOOLEAN FirstConnect,FirstDisConnect;
787 u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN;
788 u1Byte dm_dig_max, dm_dig_min;
789 u1Byte CurrentIGI = pDM_DigTable->CurIGValue;
791 u4Byte dm_FA_thres[3];
792 u4Byte TxTp = 0, RxTp = 0;
793 BOOLEAN bDFSBand = FALSE;
794 BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE;
795 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
796 u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0;
797 static u1Byte TimeCnt = 0;
801 if(odm_DigAbort(pDM_Odm) == TRUE)
804 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n"));
808 #if (RTL8192D_SUPPORT==1)
809 if(pDM_Odm->SupportICType == ODM_RTL8192D)
811 if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)
813 if(*(pDM_Odm->pbMasterOfDMSP))
815 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
816 FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
817 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE);
821 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1;
822 FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE);
823 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE);
828 if(*(pDM_Odm->pBandType) == ODM_BAND_5G)
830 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
831 FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
832 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE);
836 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1;
837 FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE);
838 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE);
845 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
846 FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
847 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE);
850 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
851 //1 Noise Floor Estimate
852 //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst;
853 //odm_InbandNoiseCalculate (pDM_Odm);
858 //2 Calculate total TP
859 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
861 pEntry = pDM_Odm->pODM_StaInfo[i];
862 if(IS_STA_VALID(pEntry))
864 RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7);
865 TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps
868 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp));
871 switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)
880 bPerformance = FALSE;
887 if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0)
888 TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min;
890 if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1)
891 TpTrainTH_MIN = DM_DIG_TP_Target_TH1;
893 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN));
895 //2 Decide DIG mode by total TP
896 if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode
898 bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE;
899 pDM_DigTable->bTpTarget = TRUE;
902 else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode
904 bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE;
906 if(TimeCnt < DM_DIG_TP_Training_Period)
908 pDM_DigTable->bTpTarget = FALSE;
909 bPerformance = FALSE;
914 pDM_DigTable->bTpTarget = TRUE;
916 bFirstTpTarget = TRUE;
920 else // remain previous mode
922 bPerformance = pDM_DigTable->bTpTarget;
926 if(TimeCnt < DM_DIG_TP_Training_Period)
930 pDM_DigTable->bTpTarget = TRUE;
932 bFirstTpTarget = TRUE;
939 pDM_DigTable->TpTrainTH_min = RxTp + TxTp;
944 bPerformance = FALSE;
945 pDM_DigTable->TpTrainTH_min = 0;
953 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable));
954 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance));
957 //1 Boundary Decision
958 #if (RTL8192C_SUPPORT==1)
959 if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)))
962 if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL))
964 dm_dig_max = DM_DIG_MAX_AP_HP;
965 dm_dig_min = DM_DIG_MIN_AP_HP;
969 dm_dig_max = DM_DIG_MAX_NIC_HP;
970 dm_dig_min = DM_DIG_MIN_NIC_HP;
972 DIG_MaxOfMin = DM_DIG_MAX_AP_HP;
977 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
981 dm_dig_max = DM_DIG_MAX_AP_COVERAGR;
982 dm_dig_min = DM_DIG_MIN_AP_COVERAGE;
983 DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE;
987 dm_dig_max = DM_DIG_MAX_AP;
988 dm_dig_min = DM_DIG_MIN_AP;
989 DIG_MaxOfMin = DM_DIG_MAX_OF_MIN;
993 if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) ||
994 ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140)))
997 if (*pDM_Odm->pBandWidth == ODM_BW20M){
998 dm_dig_min = DM_DIG_MIN_AP_DFS+2;
1001 dm_dig_min = DM_DIG_MIN_AP_DFS;
1003 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n"));
1007 if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B))
1010 #if RTL8192E_SUPPORT
1011 #ifdef HIGH_POWER_EXT_LNA
1012 if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA))
1019 if(pDM_Odm->SupportICType >= ODM_RTL8188E)
1022 dm_dig_max = DM_DIG_MAX_NIC;
1024 if(pDM_Odm->SupportICType != ODM_RTL8821)
1025 dm_dig_min = DM_DIG_MIN_NIC;
1029 DIG_MaxOfMin = DM_DIG_MAX_AP;
1032 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min));
1034 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1036 if(0 < *pDM_Odm->pu1ForcedIgiLb)
1038 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb));
1039 dm_dig_min = *pDM_Odm->pu1ForcedIgiLb;
1040 dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1);
1044 //1 Adjust boundary by RSSI
1045 if(pDM_Odm->bLinked && bPerformance)
1047 //2 Modify DIG upper bound
1048 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1051 //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT
1052 if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1))
1055 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset));
1061 if((pDM_Odm->RSSI_Min + offset) > dm_dig_max )
1062 pDM_DigTable->rx_gain_range_max = dm_dig_max;
1063 else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min )
1064 pDM_DigTable->rx_gain_range_max = dm_dig_min;
1066 pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset;
1068 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1069 //2 Modify DIG lower bound
1070 //if(pDM_Odm->bOneEntryOnly)
1072 if(pDM_Odm->RSSI_Min < dm_dig_min)
1073 DIG_Dynamic_MIN = dm_dig_min;
1074 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
1075 DIG_Dynamic_MIN = DIG_MaxOfMin;
1077 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
1083 HAL_REORDER_BARRIER();
1089 DIG_Dynamic_MIN = dm_dig_min;
1090 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min));
1094 if(pDM_Odm->RSSI_Min < dm_dig_min)
1095 DIG_Dynamic_MIN = dm_dig_min;
1096 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
1097 DIG_Dynamic_MIN = DIG_MaxOfMin;
1099 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
1106 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1107 if(bPerformance && bDFSBand)
1109 pDM_DigTable->rx_gain_range_max = 0x28;
1110 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max));
1115 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_OF_MIN;
1117 DIG_Dynamic_MIN = dm_dig_min;
1120 //1 Force Lower Bound for AntDiv
1121 if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly)
1123 if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
1125 if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) {
1126 if (pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin)
1127 DIG_Dynamic_MIN = DIG_MaxOfMin;
1129 DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max;
1130 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN));
1131 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max));
1135 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n",
1136 pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN));
1137 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n",
1138 pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect));
1140 //1 Modify DIG lower bound, deal with abnormal case
1141 //2 Abnormal false alarm case
1142 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1145 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN;
1150 if(!pDM_Odm->bLinked)
1152 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN;
1154 if (FirstDisConnect)
1155 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN;
1158 pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI);
1161 //2 Abnormal # beacon case
1162 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1163 if(pDM_Odm->bLinked && !FirstConnect)
1165 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Beacon Num (%d)\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt));
1166 if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state))
1168 pDM_DigTable->rx_gain_range_min = dm_dig_min;
1169 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n",
1170 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min));
1175 //2 Abnormal lower bound case
1176 if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max)
1178 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
1179 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min));
1183 //1 False alarm threshold decision
1184 odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres);
1185 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2]));
1187 //1 Adjust initial gain by false alarm
1188 if(pDM_Odm->bLinked && bPerformance)
1191 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n"));
1193 if(bFirstTpTarget || (FirstConnect && bPerformance))
1195 pDM_DigTable->LargeFAHit = 0;
1197 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1200 if(pDM_Odm->RSSI_Min > 0x28)
1203 CurrentIGI = pDM_Odm->RSSI_Min;
1204 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n"));
1209 if(pDM_Odm->RSSI_Min < DIG_MaxOfMin)
1211 if(CurrentIGI < pDM_Odm->RSSI_Min)
1212 CurrentIGI = pDM_Odm->RSSI_Min;
1216 if(CurrentIGI < DIG_MaxOfMin)
1217 CurrentIGI = DIG_MaxOfMin;
1220 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1221 #if (RTL8812A_SUPPORT==1)
1222 if(pDM_Odm->SupportICType == ODM_RTL8812)
1223 ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF);
1228 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI));
1233 if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2])
1234 CurrentIGI = CurrentIGI + 4;
1235 else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1])
1236 CurrentIGI = CurrentIGI + 2;
1237 else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0])
1238 CurrentIGI = CurrentIGI - 2;
1240 //4 Abnormal # beacon case
1241 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1242 if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state))
1244 CurrentIGI = pDM_DigTable->rx_gain_range_min;
1245 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n",
1246 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI));
1254 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n"));
1256 if(FirstDisConnect || bFirstCoverage)
1258 CurrentIGI = dm_dig_min;
1259 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n"));
1263 if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2])
1264 CurrentIGI = CurrentIGI + 4;
1265 else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1])
1266 CurrentIGI = CurrentIGI + 2;
1267 else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0])
1268 CurrentIGI = CurrentIGI - 2;
1272 //1 Check initial gain by upper/lower bound
1273 if(CurrentIGI < pDM_DigTable->rx_gain_range_min)
1274 CurrentIGI = pDM_DigTable->rx_gain_range_min;
1276 if(CurrentIGI > pDM_DigTable->rx_gain_range_max)
1277 CurrentIGI = pDM_DigTable->rx_gain_range_max;
1279 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all));
1281 //1 High power RSSI threshold
1282 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1283 if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD))
1285 // High power IGI lower bound
1286 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB));
1287 if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND)
1289 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue));
1290 //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND;
1291 CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND;
1294 if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter))
1296 if(pHalData->UndecoratedSmoothedPWDB > 0x28)
1298 if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND)
1300 //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND;
1301 CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND;
1308 #if (RTL8192D_SUPPORT==1)
1309 if(pDM_Odm->SupportICType == ODM_RTL8192D)
1311 //sherry delete DualMacSmartConncurrent 20110517
1312 if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)
1314 ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue);
1315 if(*(pDM_Odm->pbMasterOfDMSP))
1317 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
1318 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
1322 pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked;
1323 pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN;
1328 ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue);
1329 if(*(pDM_Odm->pBandType) == ODM_BAND_5G)
1331 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
1332 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
1336 pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked;
1337 pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN;
1344 #if ((DM_ODM_SUPPORT_TYPE & ODM_WIN) || ((DM_ODM_SUPPORT_TYPE & ODM_CE) && (ODM_CONFIG_BT_COEXIST == 1)))
1345 if(pDM_Odm->bBtHsOperation)
1347 if(pDM_Odm->bLinked)
1349 if(pDM_DigTable->BT30_CurIGI > (CurrentIGI))
1350 ODM_Write_DIG(pDM_Odm, CurrentIGI);
1352 ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);
1354 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
1355 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
1359 if(pDM_Odm->bLinkInProcess)
1360 ODM_Write_DIG(pDM_Odm, 0x1c);
1361 else if(pDM_Odm->bBtConnectProcess)
1362 ODM_Write_DIG(pDM_Odm, 0x28);
1364 ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue);
1367 else // BT is not using
1370 ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue);
1371 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
1372 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
1382 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1383 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1384 PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
1386 u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C
1387 u1Byte CurrentIGI=pDM_Odm->RSSI_Min;
1389 if(odm_DigAbort(pDM_Odm) == TRUE)
1392 CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG;
1394 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n"));
1396 // Using FW PS mode to make IGI
1397 //Adjust by FA in LPS MODE
1398 if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS)
1399 CurrentIGI = CurrentIGI+4;
1400 else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS)
1401 CurrentIGI = CurrentIGI+2;
1402 else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS)
1403 CurrentIGI = CurrentIGI-2;
1406 //Lower bound checking
1408 //RSSI Lower bound check
1409 if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC)
1410 RSSI_Lower =(pDM_Odm->RSSI_Min-10);
1412 RSSI_Lower =DM_DIG_MIN_NIC;
1414 //Upper and Lower Bound checking
1415 if(CurrentIGI > DM_DIG_MAX_NIC)
1416 CurrentIGI=DM_DIG_MAX_NIC;
1417 else if(CurrentIGI < RSSI_Lower)
1418 CurrentIGI =RSSI_Lower;
1420 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all));
1421 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min));
1422 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI));
1424 ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue);
1428 //3============================================================
1429 //3 FASLE ALARM CHECK
1430 //3============================================================
1433 odm_FalseAlarmCounterStatistics(
1437 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1438 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
1441 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1442 //Mark there, and check this in odm_DMWatchDog
1443 #if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP)
1444 prtl8192cd_priv priv = pDM_Odm->priv;
1445 if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )
1450 if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
1453 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics()======>\n"));
1455 #if (ODM_IC_11N_SERIES_SUPPORT == 1)
1456 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
1460 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter
1461 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter
1463 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
1464 FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
1465 FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
1467 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
1468 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
1469 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
1471 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
1472 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
1473 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
1475 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
1476 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
1478 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
1479 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
1480 FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
1482 #if (RTL8188E_SUPPORT==1)
1483 if(pDM_Odm->SupportICType == ODM_RTL8188E)
1485 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord);
1486 FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
1487 FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16);
1491 #if (RTL8192D_SUPPORT==1)
1492 if(pDM_Odm->SupportICType == ODM_RTL8192D)
1494 odm_GetCCKFalseAlarm_92D(pDM_Odm);
1500 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
1501 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
1503 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
1504 FalseAlmCnt->Cnt_Cck_fail = ret_value;
1506 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
1507 FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8;
1509 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
1510 FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8);
1513 FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync +
1514 FalseAlmCnt->Cnt_SB_Search_fail +
1515 FalseAlmCnt->Cnt_Parity_Fail +
1516 FalseAlmCnt->Cnt_Rate_Illegal +
1517 FalseAlmCnt->Cnt_Crc8_fail +
1518 FalseAlmCnt->Cnt_Mcs_fail +
1519 FalseAlmCnt->Cnt_Cck_fail);
1521 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
1523 #if (RTL8192C_SUPPORT==1)
1524 if(pDM_Odm->SupportICType == ODM_RTL8192C)
1525 odm_ResetFACounter_92C(pDM_Odm);
1528 #if (RTL8192D_SUPPORT==1)
1529 if(pDM_Odm->SupportICType == ODM_RTL8192D)
1530 odm_ResetFACounter_92D(pDM_Odm);
1533 if(pDM_Odm->SupportICType >=ODM_RTL8723A)
1535 //reset false alarm counter registers
1536 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1);
1537 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0);
1538 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1);
1539 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0);
1541 //update ofdm counter
1542 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter
1543 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter
1545 //reset CCK CCA counter
1546 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0);
1547 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2);
1548 //reset CCK FA counter
1549 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0);
1550 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2);
1554 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n",
1555 FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail));
1556 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n",
1557 FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal));
1558 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n",
1559 FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
1563 #if (ODM_IC_11AC_SERIES_SUPPORT == 1)
1564 if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
1568 /* read OFDM FA counter */
1569 FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord);
1572 /* Read CCK FA counter */
1573 FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord);
1575 /* read CCK/OFDM CCA counter */
1576 ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord);
1577 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16;
1578 FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff;
1580 #if (RTL8881A_SUPPORT==1)
1582 if(pDM_Odm->SupportICType == ODM_RTL8881A)
1584 u4Byte Cnt_Ofdm_fail_temp = 0;
1586 if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre)
1588 Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre;
1589 FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail;
1590 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp;
1593 FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail;
1594 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre));
1595 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp));
1597 /* Reset FA counter by enable/disable OFDM */
1598 if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff)
1601 ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0);
1602 ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1);
1603 FalseAlmCnt->Cnt_Ofdm_fail_pre = 0;
1604 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Reset false alarm counter\n"));
1609 /* reset OFDM FA coutner */
1610 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1);
1611 ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0);
1613 /* reset CCK FA counter */
1614 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0);
1615 ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1);
1617 /* reset CCA counter */
1618 ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1);
1619 ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0);
1621 CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28);
1622 if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G)
1624 FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail;
1625 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA;
1629 FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail;
1630 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA;
1636 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA));
1637 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA));
1638 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all));
1639 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
1640 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail));
1641 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
1642 ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Total False Alarm=%d\n\n", FalseAlmCnt->Cnt_all));
1645 //3============================================================
1646 //3 CCK Packet Detect Threshold
1647 //3============================================================
1650 odm_PauseCCKPacketDetection(
1652 IN PHYDM_PAUSE_TYPE PauseType,
1653 IN PHYDM_PAUSE_LEVEL pause_level,
1654 IN u1Byte CCKPDThreshold
1657 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1658 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1660 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========> level = %d\n", pause_level));
1662 if ((pDM_DigTable->pause_cckpd_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) {
1663 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n"));
1667 if (pause_level > DM_DIG_MAX_PAUSE_TYPE) {
1668 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD,
1669 ("odm_PauseCCKPacketDetection(): Return: Wrong pause level !!\n"));
1673 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold));
1674 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1675 pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4],
1676 pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0]));
1678 switch (PauseType) {
1679 /* Pause CCK Packet Detection Threshold */
1682 /* Disable CCK PD */
1683 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD));
1684 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Pause CCK packet detection threshold !!\n"));
1686 /* Backup original CCK PD threshold decided by CCK PD mechanism */
1687 if (pDM_DigTable->pause_cckpd_level == 0) {
1688 pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres;
1689 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD,
1690 ("odm_PauseCCKPacketDetection(): Backup CCKPD = 0x%x, new CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup, CCKPDThreshold));
1693 /* Update pause level */
1694 pDM_DigTable->pause_cckpd_level = (pDM_DigTable->pause_cckpd_level | BIT(pause_level));
1696 /* Record CCK PD threshold */
1697 pDM_DigTable->pause_cckpd_value[pause_level] = CCKPDThreshold;
1699 /* Write new CCK PD threshold */
1700 if (BIT(pause_level + 1) > pDM_DigTable->pause_cckpd_level) {
1701 ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold);
1702 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): CCKPD of higher level = 0x%x\n", CCKPDThreshold));
1706 /* Resume CCK Packet Detection Threshold */
1709 /* check if the level is illegal or not */
1710 if ((pDM_DigTable->pause_cckpd_level & (BIT(pause_level))) != 0) {
1711 pDM_DigTable->pause_cckpd_level = pDM_DigTable->pause_cckpd_level & (~(BIT(pause_level)));
1712 pDM_DigTable->pause_cckpd_value[pause_level] = 0;
1713 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Resume CCK PD !!\n"));
1715 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong resume level !!\n"));
1720 if (pDM_DigTable->pause_cckpd_level == 0) {
1721 /* Write backup IGI value */
1722 ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup);
1723 /* pDM_DigTable->bIgnoreDIG = TRUE; */
1724 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write original CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup));
1727 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD);
1731 if (BIT(pause_level) > pDM_DigTable->pause_cckpd_level) {
1734 /* Calculate the maximum level now */
1735 for (max_level = (pause_level - 1); max_level >= 0; max_level--) {
1736 if ((pDM_DigTable->pause_cckpd_level & BIT(max_level)) > 0)
1740 /* write CCKPD of lower level */
1741 ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->pause_cckpd_value[max_level]);
1742 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write CCKPD (0x%x) of level (%d)\n",
1743 pDM_DigTable->pause_cckpd_value[max_level], max_level));
1749 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong type !!\n"));
1753 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold));
1754 ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1755 pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4],
1756 pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0]));
1761 odm_CCKPacketDetectionThresh(
1765 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1766 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
1767 u1Byte CurCCK_CCAThres, RSSI_thd = 55;
1770 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1771 //modify by Guo.Mingzhi 2011-12-29
1772 if (pDM_Odm->bDualMacSmartConcurrent == TRUE)
1773 // if (pDM_Odm->bDualMacSmartConcurrent == FALSE)
1775 if(pDM_Odm->bBtHsOperation)
1777 ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n"));
1778 ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd);
1783 if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)))
1785 ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n"));
1786 #ifdef MCR_WIRELESS_EXTEND
1787 ODM_Write_CCK_CCA_Thres(pDM_Odm, 0x43);
1792 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1797 ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n"));
1799 if (pDM_Odm->bLinked)
1801 if (pDM_Odm->RSSI_Min > RSSI_thd)
1802 CurCCK_CCAThres = 0xcd;
1803 else if ((pDM_Odm->RSSI_Min <= RSSI_thd) && (pDM_Odm->RSSI_Min > 10))
1804 CurCCK_CCAThres = 0x83;
1807 if(FalseAlmCnt->Cnt_Cck_fail > 1000)
1808 CurCCK_CCAThres = 0x83;
1810 CurCCK_CCAThres = 0x40;
1813 if(FalseAlmCnt->Cnt_Cck_fail > 1000)
1814 CurCCK_CCAThres = 0x83;
1816 CurCCK_CCAThres = 0x40;
1819 #if (RTL8192D_SUPPORT==1)
1820 if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G))
1821 ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres);
1824 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres);
1826 ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres));
1830 ODM_Write_CCK_CCA_Thres(
1832 IN u1Byte CurCCK_CCAThres
1835 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1836 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1838 if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03
1840 ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres);
1842 pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
1843 pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
1846 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1848 // <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis)
1851 IN PDM_ODM_T pDM_Odm,
1855 PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter;
1856 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1857 static u1Byte TRSW_HighPwr = 0;
1859 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n",
1860 RSSIVal, TRSW_HighPwr, pHalData->RFEType ));
1862 if (pHalData->RFEType == 3) {
1864 pDM_Odm->RSSI_TRSW = RSSIVal;
1866 if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H)
1868 TRSW_HighPwr = 1; // Switch to
1869 PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control
1870 PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control
1873 else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L)
1875 TRSW_HighPwr = 0; // Switched back
1876 PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control
1877 PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control
1883 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L));
1884 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n",
1885 RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW));
1886 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr));
1890 odm_MPT_DIGWorkItemCallback(
1894 PADAPTER Adapter = (PADAPTER)pContext;
1895 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1896 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1898 ODM_MPT_DIG(pDM_Odm);
1902 odm_MPT_DIGCallback(
1906 PADAPTER Adapter = (PADAPTER)pTimer->Adapter;
1907 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1908 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1911 #if DEV_BUS_TYPE==RT_PCI_INTERFACE
1913 PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem);
1915 ODM_MPT_DIG(pDM_Odm);
1918 PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem);
1925 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1927 odm_MPT_DIGCallback(
1931 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1933 PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem);
1935 ODM_MPT_DIG(pDM_Odm);
1940 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
1944 IN u1Byte CurIGValue
1947 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1948 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1950 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue);
1952 if(pDM_Odm->RFType > ODM_1T1R)
1953 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue);
1955 if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R))
1957 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue);
1958 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue);
1961 pDM_DigTable->CurIGValue = CurIGValue;
1963 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue));
1964 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType));
1972 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1973 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1974 PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
1975 u1Byte CurrentIGI = pDM_DigTable->CurIGValue;
1976 u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20;
1978 u4Byte RxPWDBAve_final;
1979 u1Byte IGI_A = 0x20, IGI_B = 0x20;
1981 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1989 if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on))
1992 if (*pDM_Odm->pBandType == ODM_BAND_5G)
1996 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType));
1998 #if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & ODM_AP))
1999 if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) // for 5G or 8814
2001 if (1) // for both 2G/5G
2004 odm_FalseAlarmCounterStatistics(pDM_Odm);
2006 RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM;
2007 RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0;
2009 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2010 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2011 pDM_Odm->RxPWDBAve = 0;
2012 pDM_Odm->MPDIG_2G = FALSE;
2014 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2015 pDM_Odm->Times_2G = 0;
2018 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal));
2019 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final));
2021 if (RXOK_cal >= 70 && RxPWDBAve_final <= 40)
2023 if (CurrentIGI > 0x24)
2024 odm_MPT_Write_DIG(pDM_Odm, 0x24);
2028 if(pFalseAlmCnt->Cnt_all > 1000){
2029 CurrentIGI = CurrentIGI + 8;
2031 else if(pFalseAlmCnt->Cnt_all > 200){
2032 CurrentIGI = CurrentIGI + 4;
2034 else if (pFalseAlmCnt->Cnt_all > 50){
2035 CurrentIGI = CurrentIGI + 2;
2037 else if (pFalseAlmCnt->Cnt_all < 2){
2038 CurrentIGI = CurrentIGI - 2;
2041 if (CurrentIGI < DIG_Lower ){
2042 CurrentIGI = DIG_Lower;
2045 if(CurrentIGI > DIG_Upper){
2046 CurrentIGI = DIG_Upper;
2049 odm_MPT_Write_DIG(pDM_Odm, CurrentIGI);
2050 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n",
2051 CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail));
2056 if(pDM_Odm->MPDIG_2G == FALSE)
2058 if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)))
2060 ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n"));
2061 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A);
2062 ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B);
2063 pDM_DigTable->CurIGValue = IGI_B;
2066 odm_MPT_Write_DIG(pDM_Odm, IGI_A);
2069 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2070 pDM_Odm->Times_2G++;
2072 if (pDM_Odm->Times_2G == 3)
2075 pDM_Odm->MPDIG_2G = TRUE;
2079 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2080 if (pDM_Odm->SupportICType == ODM_RTL8812)
2081 odm_RFEControl(pDM_Odm, RxPWDBAve_final);
2084 ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700);