drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/btc/HalBtc8192d2Ant.c

   1 //============================================================
   2 // Description:
   3 //
   4 // This file is for 92D BT 2 Antenna Co-exist mechanism
   5 //
   6 // By cosa 02/11/2011
   7 //
   8 //============================================================
   9
  10 //============================================================
  11 // include files
  12 //============================================================
  13 #include "Mp_Precomp.h"
  14
  15 #if WPP_SOFTWARE_TRACE
  16 #include "HalBtc8192d2Ant.tmh"
  17 #endif
  18
  19 #if(BT_30_SUPPORT == 1)
  20 //============================================================
  21 // Global variables, these are static variables
  22 //============================================================
  23 static COEX_DM_8192D_2ANT       GLCoexDm8192d2Ant;
  24 static PCOEX_DM_8192D_2ANT      pCoexDm=&GLCoexDm8192d2Ant;
  25 static COEX_STA_8192D_2ANT      GLCoexSta8192d2Ant;
  26 static PCOEX_STA_8192D_2ANT     pCoexSta=&GLCoexSta8192d2Ant;
  27
  28 //============================================================
  29 // local function start with btdm_
  30 //============================================================
  31 u1Byte
  32 halbtc8192d2ant_WifiRssiState(
  33         IN      PBTC_COEXIST            pBtCoexist,
  34         IN      u1Byte                  index,
  35         IN      u1Byte                  levelNum,
  36         IN      u1Byte                  rssiThresh,
  37         IN      u1Byte                  rssiThresh1
  38         )
  39 {
  40         s4Byte                  wifiRssi=0;
  41         u1Byte                  wifiRssiState=pCoexSta->preWifiRssiState[index];
  42
  43         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
  44
  45         if(levelNum == 2)
  46         {
  47                 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
  48                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
  49                 {
  50                         if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
  51                         {
  52                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
  53                         }
  54                         else
  55                         {
  56                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
  57                         }
  58                 }
  59                 else
  60                 {
  61                         if(wifiRssi < rssiThresh)
  62                         {
  63                                 wifiRssiState = BTC_RSSI_STATE_LOW;
  64                         }
  65                         else
  66                         {
  67                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
  68                         }
  69                 }
  70         }
  71         else if(levelNum == 3)
  72         {
  73                 if(rssiThresh > rssiThresh1)
  74                 {
  75                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n"));
  76                         return pCoexSta->preWifiRssiState[index];
  77                 }
  78
  79                 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
  80                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
  81                 {
  82                         if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
  83                         {
  84                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
  85                         }
  86                         else
  87                         {
  88                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
  89                         }
  90                 }
  91                 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
  92                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
  93                 {
  94                         if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
  95                         {
  96                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
  97                         }
  98                         else if(wifiRssi < rssiThresh)
  99                         {
 100                                 wifiRssiState = BTC_RSSI_STATE_LOW;
 101                         }
 102                         else
 103                         {
 104                                 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
 105                         }
 106                 }
 107                 else
 108                 {
 109                         if(wifiRssi < rssiThresh1)
 110                         {
 111                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
 112                         }
 113                         else
 114                         {
 115                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
 116                         }
 117                 }
 118         }
 119
 120         pCoexSta->preWifiRssiState[index] = wifiRssiState;
 121
 122         return wifiRssiState;
 123 }
 124
 125 u1Byte
 126 halbtc8192d2ant_ActionAlgorithm(
 127         IN      PBTC_COEXIST            pBtCoexist
 128         )
 129 {
 130         PBTC_STACK_INFO         pStackInfo=&pBtCoexist->stackInfo;
 131         BOOLEAN                         bBtHsOn=FALSE;
 132         u1Byte                          algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED;
 133         u1Byte                          numOfDiffProfile=0;
 134
 135         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 136
 137         if(!pStackInfo->bBtLinkExist)
 138         {
 139                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n"));
 140                 return algorithm;
 141         }
 142
 143         if(pStackInfo->bScoExist)
 144                 numOfDiffProfile++;
 145         if(pStackInfo->bHidExist)
 146                 numOfDiffProfile++;
 147         if(pStackInfo->bPanExist)
 148                 numOfDiffProfile++;
 149         if(pStackInfo->bA2dpExist)
 150                 numOfDiffProfile++;
 151
 152         if(pStackInfo->bScoExist)
 153         {
 154                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n"));
 155                 algorithm = BT_8192D_2ANT_COEX_ALGO_SCO;
 156         }
 157         else
 158         {
 159                 if(numOfDiffProfile == 1)
 160                 {
 161                         if(pStackInfo->bHidExist)
 162                         {
 163                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n"));
 164                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID;
 165                         }
 166                         else if(pStackInfo->bA2dpExist)
 167                         {
 168                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n"));
 169                                 algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP;
 170                         }
 171                         else if(pStackInfo->bPanExist)
 172                         {
 173                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n"));
 174                                 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN;
 175                         }
 176                 }
 177                 else
 178                 {
 179                         if( pStackInfo->bHidExist &&
 180                                 pStackInfo->bA2dpExist )
 181                         {
 182                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n"));
 183                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP;
 184                         }
 185                         else if( pStackInfo->bHidExist &&
 186                                 pStackInfo->bPanExist )
 187                         {
 188                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n"));
 189                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN;
 190                         }
 191                         else if( pStackInfo->bPanExist &&
 192                                 pStackInfo->bA2dpExist )
 193                         {
 194                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n"));
 195                                 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP;
 196                         }
 197                 }
 198         }
 199         return algorithm;
 200 }
 201
 202 VOID
 203 halbtc8192d2ant_SetFwBalance(
 204         IN      PBTC_COEXIST            pBtCoexist,
 205         IN      BOOLEAN                 bBalanceOn,
 206         IN      u1Byte                  ms0,
 207         IN      u1Byte                  ms1
 208         )
 209 {
 210         u1Byte  H2C_Parameter[3] ={0};
 211
 212         if(bBalanceOn)
 213         {
 214                 H2C_Parameter[2] = 1;
 215                 H2C_Parameter[1] = ms1;
 216                 H2C_Parameter[0] = ms0;
 217         }
 218         else
 219         {
 220                 H2C_Parameter[2] = 0;
 221                 H2C_Parameter[1] = 0;
 222                 H2C_Parameter[0] = 0;
 223         }
 224
 225         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n",
 226                 bBalanceOn?"ON":"OFF", ms0, ms1,
 227                 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
 228
 229         pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter);
 230 }
 231
 232 VOID
 233 halbtc8192d2ant_Balance(
 234         IN      PBTC_COEXIST            pBtCoexist,
 235         IN      BOOLEAN                 bForceExec,
 236         IN      BOOLEAN                 bBalanceOn,
 237         IN      u1Byte                  ms0,
 238         IN      u1Byte                  ms1
 239         )
 240 {
 241         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n",
 242                 (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF")));
 243         pCoexDm->bCurBalanceOn = bBalanceOn;
 244
 245         if(!bForceExec)
 246         {
 247                 if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn)
 248                         return;
 249         }
 250         halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1);
 251
 252         pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn;
 253 }
 254
 255 VOID
 256 halbtc8192d2ant_SetFwDiminishWifi(
 257         IN      PBTC_COEXIST            pBtCoexist,
 258         IN      BOOLEAN                 bDacOn,
 259         IN      BOOLEAN                 bInterruptOn,
 260         IN      u1Byte                  fwDacSwingLvl,
 261         IN      BOOLEAN                 bNavOn
 262         )
 263 {
 264         u1Byte                  H2C_Parameter[3] ={0};
 265
 266         if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20))
 267         {
 268                 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n"));
 269                 fwDacSwingLvl = 0x18;
 270         }
 271
 272         H2C_Parameter[2] = 0;
 273         H2C_Parameter[1] = fwDacSwingLvl;
 274         H2C_Parameter[0] = 0;
 275         if(bDacOn)
 276         {
 277                 H2C_Parameter[2] |= 0x01;       //BIT0
 278                 if(bInterruptOn)
 279                 {
 280                         H2C_Parameter[2] |= 0x02;       //BIT1
 281                 }
 282         }
 283         if(bNavOn)
 284         {
 285                 H2C_Parameter[2] |= 0x08;       //BIT3
 286         }
 287
 288         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n",
 289                 (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"),
 290                 (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])));
 291         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter);
 292 }
 293
 294
 295 VOID
 296 halbtc8192d2ant_DiminishWifi(
 297         IN      PBTC_COEXIST            pBtCoexist,
 298         IN      BOOLEAN                 bForceExec,
 299         IN      BOOLEAN                 bDacOn,
 300         IN      BOOLEAN                 bInterruptOn,
 301         IN      u1Byte                  fwDacSwingLvl,
 302         IN      BOOLEAN                 bNavOn
 303         )
 304 {
 305         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n",
 306                 (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF")));
 307
 308         pCoexDm->bCurDacOn = bDacOn;
 309         pCoexDm->bCurInterruptOn = bInterruptOn;
 310         pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
 311         pCoexDm->bCurNavOn = bNavOn;
 312
 313         if(!bForceExec)
 314         {
 315                 if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) &&
 316                         (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) &&
 317                         (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) &&
 318                         (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) )
 319                         return;
 320         }
 321         halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn);
 322
 323         pCoexDm->bPreDacOn = pCoexDm->bCurDacOn;
 324         pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn;
 325         pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
 326         pCoexDm->bPreNavOn = pCoexDm->bCurNavOn;
 327 }
 328
 329 VOID
 330 halbtc8192d2ant_SetSwRfRxLpfCorner(
 331         IN      PBTC_COEXIST            pBtCoexist,
 332         IN      BOOLEAN                 bRxRfShrinkOn
 333         )
 334 {
 335         if(bRxRfShrinkOn)
 336         {
 337                 //Shrink RF Rx LPF corner
 338                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
 339                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7);
 340         }
 341         else
 342         {
 343                 //Resume RF Rx LPF corner
 344                 // After initialized, we can use pCoexDm->btRf0x1eBackup
 345                 if(pBtCoexist->bInitilized)
 346                 {
 347                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
 348                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
 349                 }
 350         }
 351 }
 352
 353
 354 VOID
 355 halbtc8192d2ant_RfShrink(
 356         IN      PBTC_COEXIST            pBtCoexist,
 357         IN      BOOLEAN                 bForceExec,
 358         IN      BOOLEAN                 bRxRfShrinkOn
 359         )
 360 {
 361         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
 362                 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
 363         pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
 364
 365         if(!bForceExec)
 366         {
 367                 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
 368                         return;
 369         }
 370         halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
 371
 372         pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
 373 }
 374
 375 VOID
 376 halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(
 377         IN      PBTC_COEXIST            pBtCoexist,
 378         IN      BOOLEAN                 bLowPenaltyRa
 379         )
 380 {
 381         u1Byte  tmpU1;
 382
 383         tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd);
 384         if(bLowPenaltyRa)
 385         {
 386                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n"));
 387                 tmpU1 &= ~BIT2;
 388         }
 389         else
 390         {
 391                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n"));
 392                 tmpU1 |= BIT2;
 393         }
 394         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1);
 395 }
 396
 397 VOID
 398 halbtc8192d2ant_LowPenaltyRa(
 399         IN      PBTC_COEXIST            pBtCoexist,
 400         IN      BOOLEAN                 bForceExec,
 401         IN      BOOLEAN                 bLowPenaltyRa
 402         )
 403 {
 404         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
 405                 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
 406         pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
 407
 408         if(!bForceExec)
 409         {
 410                 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
 411                         return;
 412         }
 413         halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
 414
 415         pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
 416 }
 417
 418 VOID
 419 halbtc8192d2ant_SetSwFullTimeDacSwing(
 420         IN      PBTC_COEXIST            pBtCoexist,
 421         IN      BOOLEAN                 bSwDacSwingOn,
 422         IN      u4Byte                  swDacSwingLvl
 423         )
 424 {
 425         u4Byte  dacSwingLvl;
 426
 427         if(bSwDacSwingOn)
 428         {
 429                 if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20))
 430                 {
 431                         dacSwingLvl = 0x18;
 432                 }
 433                 else
 434                 {
 435                         dacSwingLvl = swDacSwingLvl;
 436                 }
 437                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl);
 438         }
 439         else
 440         {
 441                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30);
 442         }
 443 }
 444
 445 VOID
 446 halbtc8192d2ant_DacSwing(
 447         IN      PBTC_COEXIST            pBtCoexist,
 448         IN      BOOLEAN                 bForceExec,
 449         IN      BOOLEAN                 bDacSwingOn,
 450         IN      u4Byte                  dacSwingLvl
 451         )
 452 {
 453         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
 454                 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
 455         pCoexDm->bCurDacSwingOn = bDacSwingOn;
 456         pCoexDm->curDacSwingLvl = dacSwingLvl;
 457
 458         if(!bForceExec)
 459         {
 460                 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
 461                         (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
 462                         return;
 463         }
 464         delay_ms(30);
 465         halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
 466
 467         pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
 468         pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
 469 }
 470
 471 VOID
 472 halbtc8192d2ant_SetAdcBackOff(
 473         IN      PBTC_COEXIST            pBtCoexist,
 474         IN      BOOLEAN                 bAdcBackOff
 475         )
 476 {
 477         if(bAdcBackOff)
 478         {
 479                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n"));
 480                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611);
 481         }
 482         else
 483         {
 484                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n"));
 485                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611);
 486         }
 487 }
 488
 489 VOID
 490 halbtc8192d2ant_AdcBackOff(
 491         IN      PBTC_COEXIST            pBtCoexist,
 492         IN      BOOLEAN                 bForceExec,
 493         IN      BOOLEAN                 bAdcBackOff
 494         )
 495 {
 496         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n",
 497                 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
 498         pCoexDm->bCurAdcBackOff = bAdcBackOff;
 499
 500         if(!bForceExec)
 501         {
 502                 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
 503                         return;
 504         }
 505         halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
 506
 507         pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
 508 }
 509
 510 VOID
 511 halbtc8192d2ant_SetAgcTable(
 512         IN      PBTC_COEXIST            pBtCoexist,
 513         IN      BOOLEAN                 bAgcTableEn
 514         )
 515 {
 516         u1Byte          rssiAdjustVal=0;
 517
 518         if(bAgcTableEn)
 519         {
 520                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
 521                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99);
 522                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000);
 523
 524                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001);
 525                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001);
 526                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001);
 527                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001);
 528                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001);
 529                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001);
 530                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001);
 531                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001);
 532                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001);
 533                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001);
 534                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001);
 535                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001);
 536                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001);
 537                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001);
 538                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001);
 539                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001);
 540                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001);
 541                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001);
 542                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001);
 543                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001);
 544                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001);
 545                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001);
 546                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001);
 547                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001);
 548                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001);
 549                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001);
 550                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001);
 551                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001);
 552                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001);
 553                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001);
 554                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001);
 555                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001);
 556                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001);
 557                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001);
 558                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001);
 559                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001);
 560                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001);
 561                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001);
 562                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001);
 563                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001);
 564                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001);
 565                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001);
 566                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001);
 567                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001);
 568
 569                 rssiAdjustVal = 12;
 570         }
 571         else
 572         {
 573                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
 574                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99);
 575                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000);
 576
 577                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001);
 578                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001);
 579                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001);
 580                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001);
 581                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001);
 582                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001);
 583                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001);
 584                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001);
 585                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001);
 586                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001);
 587                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001);
 588                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001);
 589                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001);
 590                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001);
 591                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001);
 592                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001);
 593                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001);
 594                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001);
 595                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001);
 596                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001);
 597                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001);
 598                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001);
 599                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001);
 600                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001);
 601                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001);
 602                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001);
 603                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001);
 604                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001);
 605                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001);
 606                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001);
 607                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001);
 608                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001);
 609                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001);
 610                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001);
 611                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001);
 612                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001);
 613                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001);
 614                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001);
 615                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001);
 616                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001);
 617                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001);
 618                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001);
 619                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001);
 620                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001);
 621         }
 622
 623         // set rssiAdjustVal for wifi module.
 624         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
 625 }
 626
 627
 628
 629 VOID
 630 halbtc8192d2ant_AgcTable(
 631         IN      PBTC_COEXIST            pBtCoexist,
 632         IN      BOOLEAN                 bForceExec,
 633         IN      BOOLEAN                 bAgcTableEn
 634         )
 635 {
 636         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n",
 637                 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
 638         pCoexDm->bCurAgcTableEn = bAgcTableEn;
 639
 640         if(!bForceExec)
 641         {
 642                 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
 643                         return;
 644         }
 645         halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
 646
 647         pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
 648 }
 649
 650 VOID
 651 halbtc8192d2ant_SetCoexTable(
 652         IN      PBTC_COEXIST    pBtCoexist,
 653         IN      u4Byte          val0x6c4,
 654         IN      u4Byte          val0x6c8,
 655         IN      u4Byte          val0x6cc
 656         )
 657 {
 658         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
 659         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
 660
 661         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
 662         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
 663
 664         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
 665         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc);
 666 }
 667
 668 VOID
 669 halbtc8192d2ant_CoexTable(
 670         IN      PBTC_COEXIST            pBtCoexist,
 671         IN      BOOLEAN                 bForceExec,
 672         IN      u4Byte                  val0x6c4,
 673         IN      u4Byte                  val0x6c8,
 674         IN      u4Byte                  val0x6cc
 675         )
 676 {
 677         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
 678                 (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc));
 679         pCoexDm->curVal0x6c4 = val0x6c4;
 680         pCoexDm->curVal0x6c8 = val0x6c8;
 681         pCoexDm->curVal0x6cc = val0x6cc;
 682
 683         if(!bForceExec)
 684         {
 685                 if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
 686                         (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
 687                         (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
 688                         return;
 689         }
 690         halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc);
 691
 692         pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
 693         pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
 694         pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
 695 }
 696
 697 VOID
 698 halbtc8192d2ant_CoexAllOff(
 699         IN      PBTC_COEXIST            pBtCoexist
 700         )
 701 {
 702         // fw mechanism
 703         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
 704         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
 705
 706         // sw mechanism
 707         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
 708         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
 709         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
 710 }
 711 VOID
 712 halbtc8192d2ant_InitCoexDm(
 713         IN      PBTC_COEXIST            pBtCoexist
 714         )
 715 {
 716 }
 717
 718 VOID
 719 halbtc8192d2ant_MonitorBtEnableDisable(
 720         IN      PBTC_COEXIST            pBtCoexist,
 721         IN      u4Byte                  btActive
 722         )
 723 {
 724         static BOOLEAN  bPreBtDisabled=FALSE;
 725         static u4Byte           btDisableCnt=0;
 726         BOOLEAN                 bBtDisabled=FALSE, bForceToRoam=FALSE;
 727         u4Byte                  u4Tmp=0;
 728
 729         // This function check if bt is disabled
 730         if(btActive)
 731         {
 732                 btDisableCnt = 0;
 733                 bBtDisabled = FALSE;
 734                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
 735                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n"));
 736         }
 737         else
 738         {
 739                 btDisableCnt++;
 740                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n",
 741                                 btDisableCnt));
 742                 if(btDisableCnt >= 2)
 743                 {
 744                         bBtDisabled = TRUE;
 745                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
 746                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n"));
 747                 }
 748         }
 749         if(bPreBtDisabled != bBtDisabled)
 750         {
 751                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n",
 752                         (bPreBtDisabled ? "disabled":"enabled"),
 753                         (bBtDisabled ? "disabled":"enabled")));
 754
 755                 bForceToRoam = TRUE;
 756                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam);
 757
 758                 bPreBtDisabled = bBtDisabled;
 759         }
 760 }
 761
 762 VOID
 763 halbtc8192d2ant_MonitorBtState(
 764         IN      PBTC_COEXIST                    pBtCoexist
 765         )
 766 {
 767         BOOLEAN                 stateChange=FALSE;
 768         u4Byte                  BT_Polling, Ratio_Act, Ratio_STA;
 769         u4Byte                  BT_Active, BT_State;
 770         u4Byte                  regBTActive=0, regBTState=0, regBTPolling=0;
 771         u4Byte                  btBusyThresh=0;
 772         u4Byte                  fwVer=0;
 773         static BOOLEAN  bBtBusyTraffic=FALSE;
 774         BOOLEAN                 bRejApAggPkt=FALSE;
 775
 776         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
 777
 778         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer));
 779
 780         regBTActive = 0x444;
 781         regBTState = 0x448;
 782         regBTPolling = 0x44c;
 783
 784         btBusyThresh = 40;
 785
 786         BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive);
 787         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active));
 788         BT_Active = BT_Active & 0x00ffffff;
 789
 790         BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState);
 791         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State));
 792         BT_State = BT_State & 0x00ffffff;
 793
 794         BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling);
 795         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling));
 796
 797         if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff )
 798                 return;
 799
 800         // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running
 801         // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f
 802         // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to
 803         // HW divide trap.
 804         if (BT_Polling==0)
 805                 return;
 806
 807         halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active);
 808
 809         Ratio_Act = BT_Active*1000/BT_Polling;
 810         Ratio_STA = BT_State*1000/BT_Polling;
 811
 812         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act));
 813         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA));
 814
 815         if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
 816         {
 817                 if(Ratio_STA < 60)      // BT PAN idle
 818                 {
 819                 }
 820                 else
 821                 {
 822                         // Check if BT PAN (under BT 2.1) is uplink or downlink
 823                         if((Ratio_Act/Ratio_STA) < 2)
 824                         {       // BT PAN Uplink
 825                                 pCoexSta->bBtUplink = TRUE;
 826                         }
 827                         else
 828                         {       // BT PAN downlink
 829                                 pCoexSta->bBtUplink = FALSE;
 830                         }
 831                 }
 832         }
 833
 834         // Check BT is idle or not
 835         if(!pBtCoexist->stackInfo.bBtLinkExist)
 836         {
 837                 pCoexSta->bBtBusy = FALSE;
 838         }
 839         else
 840         {
 841                 if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
 842                 {
 843                         if(Ratio_Act<20)
 844                         {
 845                                 pCoexSta->bBtBusy = FALSE;
 846                         }
 847                         else
 848                         {
 849                                 pCoexSta->bBtBusy = TRUE;
 850                         }
 851                 }
 852                 else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
 853                 {
 854                         if(Ratio_STA < btBusyThresh)
 855                         {
 856                                 pCoexSta->bBtBusy = FALSE;
 857                         }
 858                         else
 859                         {
 860                                 pCoexSta->bBtBusy = TRUE;
 861                         }
 862
 863                         if( (Ratio_STA < btBusyThresh) ||
 864                                 (Ratio_Act<180 && Ratio_STA<130) )
 865                         {
 866                                 pCoexSta->bA2dpBusy = FALSE;
 867                         }
 868                         else
 869                         {
 870                                 pCoexSta->bA2dpBusy = TRUE;
 871                         }
 872                 }
 873         }
 874
 875         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy);
 876         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy);
 877
 878         if(bBtBusyTraffic != pCoexSta->bBtBusy)
 879         {       // BT idle or BT non-idle
 880                 bBtBusyTraffic = pCoexSta->bBtBusy;
 881                 stateChange = TRUE;
 882         }
 883
 884         if(stateChange)
 885         {
 886                 if(!pCoexSta->bBtBusy)
 887                 {
 888                         halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE);
 889                         halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE);
 890                         halbtc8192d2ant_CoexAllOff(pBtCoexist);
 891                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
 892                 }
 893                 else
 894                 {
 895                         halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE);
 896                         halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE);
 897                 }
 898         }
 899
 900         if(stateChange)
 901         {
 902                 bRejApAggPkt = pCoexSta->bBtBusy;
 903                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt);
 904                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 905         }
 906 }
 907
 908 VOID
 909 halbtc8192d2ant_ActionA2dp(
 910         IN      PBTC_COEXIST            pBtCoexist
 911         )
 912 {
 913         u1Byte                  wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH;
 914         u4Byte                  wifiBw, wifiTrafficDir;
 915         BOOLEAN                 bWifiBusy=FALSE;
 916
 917         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
 918         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
 919         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
 920
 921         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
 922         if(pCoexSta->bA2dpBusy && bWifiBusy)
 923         {
 924                 if(BTC_WIFI_BW_HT40 == wifiBw)
 925                 {
 926                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);
 927                 }
 928                 else
 929                 {
 930                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
 931                         {
 932                                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);
 933                         }
 934                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
 935                         {
 936                                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);
 937                         }
 938                 }
 939
 940                 // fw mechanism first
 941                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
 942                 {
 943                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18);
 944                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
 945                 }
 946                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
 947                 {
 948                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18);
 949                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
 950                 }
 951
 952                 // sw mechanism
 953                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
 954                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
 955                 {
 956                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
 957                 }
 958                 else
 959                 {
 960                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
 961                 }
 962
 963                 if(BTC_WIFI_BW_HT40 == wifiBw)
 964                 {
 965                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
 966                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
 967                 }
 968                 else
 969                 {
 970                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
 971                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
 972                         {
 973                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
 974                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
 975                         }
 976                         else
 977                         {
 978                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
 979                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
 980                         }
 981                 }
 982         }
 983         else if(pCoexSta->bA2dpBusy)
 984         {
 985                 // fw mechanism first
 986                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
 987                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);
 988
 989                 // sw mechanism
 990                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
 991                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
 992                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
 993         }
 994         else
 995         {
 996                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
 997         }
 998 }
 999
1000 VOID
1001 halbtc8192d2ant_ActionPan(
1002         IN      PBTC_COEXIST            pBtCoexist
1003         )
1004 {
1005         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;
1006         u1Byte          wifiRssiState, wifiRssiState1;
1007         u4Byte          wifiBw, wifiTrafficDir;
1008         s4Byte          wifiRssi;
1009
1010         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1011         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1012         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1013         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
1014         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
1015
1016         if(bBtHsOn)
1017         {
1018                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1019         }
1020         else
1021         {
1022                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50);
1023                 if(BTC_WIFI_BW_HT40 == wifiBw)
1024                 {
1025                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);
1026                 }
1027                 else
1028                 {
1029                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);
1030                 }
1031
1032                 if(pCoexSta->bBtBusy && bWifiBusy)
1033                 {
1034                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1035                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1036                         {
1037                                 // fw mechanism first
1038                                 if(pCoexSta->bBtUplink)
1039                                 {
1040                                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
1041                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1042                                 }
1043                                 else
1044                                 {
1045                                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1046                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1047                                 }
1048                                 // sw mechanism
1049                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
1050                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
1051                                 {
1052                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1053                                 }
1054                                 else
1055                                 {
1056                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1057                                 }
1058                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1059                                 if(pCoexSta->bBtUplink)
1060                                 {
1061                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1062                                 }
1063                                 else
1064                                 {
1065                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
1066                                 }
1067                         }
1068                         else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) ||
1069                                 (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
1070                         {
1071                                 // fw mechanism first
1072                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
1073
1074                                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1075                                 {
1076                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1077                                 }
1078                                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1079                                 {
1080                                         if(BTC_WIFI_BW_HT40 == wifiBw)
1081                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);
1082                                         else
1083                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1084                                 }
1085                                 // sw mechanism
1086                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
1087                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
1088                                 {
1089                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1090                                 }
1091                                 else
1092                                 {
1093                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1094                                 }
1095                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1096                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1097                         }
1098                         else
1099                         {
1100                                 // fw mechanism first
1101                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
1102
1103                                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1104                                 {
1105                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1106                                 }
1107                                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1108                                 {
1109                                         if(pCoexSta->bBtUplink)
1110                                         {
1111                                                 if(BTC_WIFI_BW_HT40 == wifiBw)
1112                                                 {
1113                                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);
1114                                                 }
1115                                                 else
1116                                                 {
1117                                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1118                                                 }
1119                                         }
1120                                         else
1121                                         {
1122                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1123                                         }
1124                                 }
1125                                 // sw mechanism
1126                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
1127                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
1128                                 {
1129                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1130                                 }
1131                                 else
1132                                 {
1133                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1134                                 }
1135                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1136                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1137                         }
1138                 }
1139                 else if(pCoexSta->bBtBusy &&
1140                                 !bWifiBusy &&
1141                                 (wifiRssi < 30))
1142                 {
1143                         // fw mechanism first
1144                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20);
1145                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1146                         // sw mechanism
1147                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1148                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1149                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1150                 }
1151                 else
1152                 {
1153                         halbtc8192d2ant_CoexAllOff(pBtCoexist);
1154                 }
1155         }
1156 }
1157
1158
1159 VOID
1160 halbtc8192d2ant_ActionHid(
1161         IN      PBTC_COEXIST            pBtCoexist
1162         )
1163 {
1164         u1Byte          wifiRssiState=BTC_RSSI_STATE_HIGH;
1165         u4Byte          wifiTrafficDir;
1166         BOOLEAN         bWifiBusy=FALSE;
1167
1168         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1169         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
1170         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1171         {
1172                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0);
1173         }
1174         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1175         {
1176                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0);
1177         }
1178
1179         if(pCoexSta->bBtBusy && bWifiBusy)
1180         {
1181                 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1182                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1183                 {
1184                         // fw mechanism first
1185                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1186                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1187
1188                         // sw mechanism
1189                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1190                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1191                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
1192                 }
1193                 else
1194                 {
1195                         // fw mechanism first
1196                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1197                         {
1198                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1199                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);
1200                         }
1201                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1202                         {
1203                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15);
1204                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE);
1205                         }
1206                         // sw mechanism
1207                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1208                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1209                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1210                 }
1211         }
1212         else
1213         {
1214                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1215         }
1216 }
1217
1218
1219
1220 VOID
1221 halbtc8192d2ant_ActionSco(
1222         IN      PBTC_COEXIST            pBtCoexist
1223         )
1224 {
1225         u1Byte  wifiRssiState;
1226         u4Byte  wifiBw;
1227
1228         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1229         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
1230
1231         if(BTC_WIFI_BW_HT40 == wifiBw)
1232         {
1233                 // fw mechanism first
1234                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1235                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1236
1237                 // sw mechanism
1238                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1239                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1240                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1241         }
1242         else
1243         {
1244                 // fw mechanism first
1245                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1246                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1247
1248                 // sw mechanism
1249                 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1250                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1251                 {
1252                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1253                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1254                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1255                 }
1256                 else
1257                 {
1258                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1259                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1260                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1261                 }
1262         }
1263 }
1264
1265 VOID
1266 halbtc8192d2ant_ActionHidA2dp(
1267         IN      PBTC_COEXIST            pBtCoexist
1268         )
1269 {
1270         u1Byte          wifiRssiState, wifiRssiState1;
1271         u4Byte          wifiBw;
1272
1273         if(pCoexSta->bBtBusy)
1274         {
1275                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0);
1276                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1277                 if(BTC_WIFI_BW_HT40 == wifiBw)
1278                 {
1279                         // fw mechanism first
1280                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1281                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1282
1283
1284                         // sw mechanism
1285                         if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
1286                                 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
1287                         {
1288                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1289                         }
1290                         else
1291                         {
1292                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1293                         }
1294                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1295                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1296                 }
1297                 else
1298                 {
1299                         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
1300                         // fw mechanism
1301                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1302                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1303
1304                         // sw mechanism
1305                         if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
1306                                 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
1307                         {
1308                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1309                         }
1310                         else
1311                         {
1312                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1313                         }
1314                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1315                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1316                         {
1317                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1318                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1319                         }
1320                         else
1321                         {
1322                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1323                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1324                         }
1325                 }
1326         }
1327         else
1328         {
1329                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1330         }
1331 }
1332
1333
1334 VOID
1335 halbtc8192d2ant_ActionHidPanBc4(
1336         IN      PBTC_COEXIST            pBtCoexist
1337         )
1338 {
1339         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;
1340         u4Byte          wifiBw, wifiTrafficDir;
1341
1342         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1343
1344         if(bBtHsOn)
1345         {
1346                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1347                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1348
1349                 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
1350                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
1351         }
1352         else
1353         {
1354                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1355                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1356                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
1357                 if(BTC_WIFI_BW_LEGACY == wifiBw)
1358                 {
1359                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1360                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1361
1362                         halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
1363                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
1364                 }
1365                 else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1366                 {
1367                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1368                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1369
1370                         halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
1371                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
1372                 }
1373                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1374                 {
1375                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
1376                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);
1377                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1378                 }
1379                 else if(!bWifiBusy)
1380                 {
1381                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
1382                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1383                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1384                 }
1385         }
1386         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1387         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1388         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1389 }
1390 VOID
1391 halbtc8192d2ant_ActionHidPanBc8(
1392         IN      PBTC_COEXIST            pBtCoexist
1393         )
1394 {
1395         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;
1396         u1Byte          wifiRssiState;
1397         u4Byte          wifiBw, wifiTrafficDir;
1398
1399         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1400
1401         if(!bBtHsOn)
1402         {
1403                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1404                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);
1405                 if((pCoexSta->bBtBusy && bWifiBusy))
1406                 {
1407                         // fw mechanism first
1408                         if(pCoexSta->bBtUplink)
1409                         {
1410                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);
1411                         }
1412                         else
1413                         {
1414                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);
1415                         }
1416                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1417
1418                         // sw mechanism
1419                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1420                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1421                         {
1422                                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1423                                 if(BTC_WIFI_BW_HT40 == wifiBw)
1424                                 {
1425                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1426                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1427                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1428                                 }
1429                                 else
1430                                 {
1431                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1432                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1433                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1434                                 }
1435                         }
1436                         else
1437                         {
1438                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1439                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1440                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1441                         }
1442                 }
1443                 else
1444                 {
1445                         halbtc8192d2ant_CoexAllOff(pBtCoexist);
1446                 }
1447         }
1448         else
1449         {
1450                 if(BTC_INTF_USB == pBtCoexist->chipInterface)
1451                 {
1452                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
1453                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
1454                         {
1455                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1456                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1457
1458                                 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
1459                                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
1460                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1461                         }
1462                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
1463                         {
1464                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1465                         }
1466                 }
1467                 else
1468                 {
1469                         if(pCoexSta->bBtBusy)
1470                         {
1471                                 // fw mechanism
1472                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1473                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1474
1475                                 // sw mechanism
1476                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1477                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1478                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
1479                         }
1480                         else
1481                         {
1482                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1483                         }
1484                 }
1485         }
1486 }
1487
1488 VOID
1489 halbtc8192d2ant_ActionHidPan(
1490         IN      PBTC_COEXIST            pBtCoexist
1491         )
1492 {
1493         if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
1494         {
1495                 halbtc8192d2ant_ActionHidPanBc4(pBtCoexist);
1496         }
1497         else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
1498         {
1499                 halbtc8192d2ant_ActionHidPanBc8(pBtCoexist);
1500         }
1501 }
1502
1503 VOID
1504 halbtc8192d2ant_ActionPanA2dpBc4(
1505         IN      PBTC_COEXIST            pBtCoexist
1506         )
1507 {
1508         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;
1509         u1Byte          wifiRssiState;
1510
1511         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1512
1513         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
1514         if(bBtHsOn)
1515         {
1516                 if(pCoexSta->bBtBusy)
1517                 {
1518                         // fw mechanism
1519                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1520                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1521
1522                         // sw mechanism
1523                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1524                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1525                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
1526                 }
1527                 else
1528                 {
1529                         halbtc8192d2ant_CoexAllOff(pBtCoexist);
1530                 }
1531         }
1532         else
1533         {
1534                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1535                 if(pCoexSta->bBtBusy && bWifiBusy)
1536                 {
1537                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);
1538                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1539                 }
1540                 else
1541                 {
1542                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1543                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
1544                 }
1545                 // sw mechanism
1546                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1547                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1548                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1549         }
1550 }
1551 VOID
1552 halbtc8192d2ant_ActionPanA2dpBc8(
1553         IN      PBTC_COEXIST            pBtCoexist
1554         )
1555 {
1556         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;
1557         u1Byte          wifiRssiState;
1558         u4Byte          wifiBw;
1559
1560         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1561
1562         if(!bBtHsOn)
1563         {
1564                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1565                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);
1566                 if((pCoexSta->bBtBusy && bWifiBusy))
1567                 {
1568                         // fw mechanism first
1569                         if(pCoexSta->bBtUplink)
1570                         {
1571                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);
1572                         }
1573                         else
1574                         {
1575                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);
1576                         }
1577                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
1578
1579                         // sw mechanism
1580                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1581                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
1582                         {
1583                                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1584                                 if(BTC_WIFI_BW_HT40 == wifiBw)
1585                                 {
1586                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1587                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1588                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1589                                 }
1590                                 else
1591                                 {
1592                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
1593                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
1594                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1595                                 }
1596                         }
1597                         else
1598                         {
1599                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1600                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1601                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1602                         }
1603                 }
1604                 else
1605                 {
1606                         halbtc8192d2ant_CoexAllOff(pBtCoexist);
1607                 }
1608         }
1609         else
1610         {
1611                 if(pCoexSta->bBtBusy)
1612                 {
1613                         // fw mechanism
1614                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
1615                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
1616
1617                         // sw mechanism
1618                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
1619                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
1620                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
1621                 }
1622                 else
1623                 {
1624                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
1625                 }
1626         }
1627 }
1628
1629 VOID
1630 halbtc8192d2ant_ActionPanA2dp(
1631         IN      PBTC_COEXIST            pBtCoexist
1632         )
1633 {
1634         if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
1635         {
1636                 halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist);
1637         }
1638         else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
1639         {
1640                 halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist);
1641         }
1642 }
1643
1644 BOOLEAN
1645 halbtc8192d2ant_IsBtCoexistEnter(
1646         IN      PBTC_COEXIST            pBtCoexist
1647         )
1648 {
1649         u1Byte                  macPhyMode;
1650         BOOLEAN                 bRet=TRUE;
1651         BOOLEAN                 bWifiUnder5G=FALSE;
1652
1653         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode);
1654         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
1655
1656         if(BTC_SMSP != macPhyMode)
1657         {
1658                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Only support single mac single phy!!\n"));
1659                 bRet = FALSE;
1660         }
1661
1662         if(bWifiUnder5G)
1663         {
1664                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under 5G or A band\n"));
1665                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1666                 bRet = FALSE;
1667         }
1668
1669         return bRet;
1670 }
1671
1672 //============================================================
1673 // extern function start with EXhalbtc8192d2ant_
1674 //============================================================
1675 VOID
1676 EXhalbtc8192d2ant_PowerOnSetting(
1677         IN      PBTC_COEXIST            pBtCoexist
1678         )
1679 {
1680 }
1681
1682 VOID
1683 EXhalbtc8192d2ant_InitHwConfig(
1684         IN      PBTC_COEXIST            pBtCoexist,
1685         IN      BOOLEAN                         bWifiOnly
1686         )
1687 {
1688         u1Byte  u1Tmp=0;
1689
1690         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n"));
1691
1692         // backup rf 0x1e value
1693         pCoexDm->btRf0x1eBackup =
1694                 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
1695
1696         if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ||
1697                 (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) )
1698         {
1699                 u1Tmp =  pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0;
1700                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp);
1701
1702                 halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010);
1703
1704                 // switch control, here we set pathA to control
1705                 // 0x878[13] = 1, 0:pathB, 1:pathA(default)
1706                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1);
1707
1708                 // antsel control, here we use phy0 and enable antsel.
1709                 // 0x87c[16:15] = b'11, enable antsel, antsel output pin
1710                 // 0x87c[30] = 0, 0: phy0, 1:phy 1
1711                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8);
1712
1713                 // antsel to Bt or Wifi, it depends Bt on/off.
1714                 // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on.
1715                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2);
1716
1717                 // sw/hw control switch, here we set sw control
1718                 // 0x870[9:8] = 'b11 sw control, 'b00 hw control
1719                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3);
1720         }
1721 }
1722
1723 VOID
1724 EXhalbtc8192d2ant_InitCoexDm(
1725         IN      PBTC_COEXIST            pBtCoexist
1726         )
1727 {
1728         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n"));
1729
1730         halbtc8192d2ant_InitCoexDm(pBtCoexist);
1731 }
1732
1733 VOID
1734 EXhalbtc8192d2ant_DisplayCoexInfo(
1735         IN      PBTC_COEXIST            pBtCoexist
1736         )
1737 {
1738         PBTC_BOARD_INFO         pBoardInfo=&pBtCoexist->boardInfo;
1739         PBTC_STACK_INFO         pStackInfo=&pBtCoexist->stackInfo;
1740         pu1Byte                         cliBuf=pBtCoexist->cliBuf;
1741         u1Byte                          u1Tmp[4], i, btInfoExt, psTdmaCase=0;
1742         u4Byte                          u4Tmp[4];
1743
1744         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
1745         CL_PRINTF(cliBuf);
1746
1747         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
1748                 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
1749         CL_PRINTF(cliBuf);
1750
1751         if(pBtCoexist->bManualControl)
1752         {
1753                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!");
1754                 CL_PRINTF(cliBuf);
1755         }
1756
1757         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
1758                 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
1759         CL_PRINTF(cliBuf);
1760
1761         // wifi status
1762         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
1763         CL_PRINTF(cliBuf);
1764         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
1765
1766         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
1767         CL_PRINTF(cliBuf);
1768
1769         if(pStackInfo->bProfileNotified)
1770         {
1771                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
1772                         pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist);
1773                 CL_PRINTF(cliBuf);
1774
1775                 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
1776         }
1777
1778         // Sw mechanism
1779         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
1780         CL_PRINTF(cliBuf);
1781         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
1782                 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
1783         CL_PRINTF(cliBuf);
1784
1785         // Fw mechanism
1786         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
1787         CL_PRINTF(cliBuf);
1788
1789         // Hw setting
1790         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
1791         CL_PRINTF(cliBuf);
1792
1793         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
1794                 pCoexDm->btRf0x1eBackup);
1795         CL_PRINTF(cliBuf);
1796
1797         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
1798         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \
1799                 u1Tmp[0]);
1800         CL_PRINTF(cliBuf);
1801
1802         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
1803         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
1804                 u4Tmp[0]);
1805         CL_PRINTF(cliBuf);
1806
1807         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
1808         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
1809         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc);
1810         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \
1811                 u4Tmp[0], u4Tmp[1], u4Tmp[2]);
1812         CL_PRINTF(cliBuf);
1813
1814         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
1815 }
1816
1817
1818 VOID
1819 EXhalbtc8192d2ant_IpsNotify(
1820         IN      PBTC_COEXIST            pBtCoexist,
1821         IN      u1Byte                  type
1822         )
1823 {
1824         if(BTC_IPS_ENTER == type)
1825         {
1826                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n"));
1827                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1828         }
1829         else if(BTC_IPS_LEAVE == type)
1830         {
1831                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n"));
1832                 //halbtc8192d2ant_InitCoexDm(pBtCoexist);
1833         }
1834 }
1835
1836 VOID
1837 EXhalbtc8192d2ant_LpsNotify(
1838         IN      PBTC_COEXIST            pBtCoexist,
1839         IN      u1Byte                  type
1840         )
1841 {
1842         if(BTC_LPS_ENABLE == type)
1843         {
1844                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n"));
1845                 halbtc8192d2ant_CoexAllOff(pBtCoexist);
1846         }
1847         else if(BTC_LPS_DISABLE == type)
1848         {
1849                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n"));
1850                 halbtc8192d2ant_InitCoexDm(pBtCoexist);
1851         }
1852 }
1853
1854 VOID
1855 EXhalbtc8192d2ant_ScanNotify(
1856         IN      PBTC_COEXIST            pBtCoexist,
1857         IN      u1Byte                  type
1858         )
1859 {
1860         if(BTC_SCAN_START == type)
1861         {
1862                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n"));
1863         }
1864         else if(BTC_SCAN_FINISH == type)
1865         {
1866                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n"));
1867         }
1868 }
1869
1870 VOID
1871 EXhalbtc8192d2ant_ConnectNotify(
1872         IN      PBTC_COEXIST            pBtCoexist,
1873         IN      u1Byte                  type
1874         )
1875 {
1876         if(BTC_ASSOCIATE_START == type)
1877         {
1878                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n"));
1879         }
1880         else if(BTC_ASSOCIATE_FINISH == type)
1881         {
1882                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n"));
1883         }
1884 }
1885
1886 VOID
1887 EXhalbtc8192d2ant_MediaStatusNotify(
1888         IN      PBTC_COEXIST                    pBtCoexist,
1889         IN      u1Byte                          type
1890         )
1891 {
1892         if(BTC_MEDIA_CONNECT == type)
1893         {
1894                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n"));
1895         }
1896         else
1897         {
1898                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n"));
1899         }
1900 }
1901
1902 VOID
1903 EXhalbtc8192d2ant_SpecialPacketNotify(
1904         IN      PBTC_COEXIST                    pBtCoexist,
1905         IN      u1Byte                          type
1906         )
1907 {
1908         if(type == BTC_PACKET_DHCP)
1909         {
1910                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n"));
1911         }
1912 }
1913
1914 VOID
1915 EXhalbtc8192d2ant_BtInfoNotify(
1916         IN      PBTC_COEXIST            pBtCoexist,
1917         IN      pu1Byte                 tmpBuf,
1918         IN      u1Byte                  length
1919         )
1920 {
1921 }
1922
1923 VOID
1924 EXhalbtc8192d2ant_HaltNotify(
1925         IN      PBTC_COEXIST                    pBtCoexist
1926         )
1927 {
1928         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n"));
1929
1930         EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
1931 }
1932
1933 VOID
1934 EXhalbtc8192d2ant_Periodical(
1935         IN      PBTC_COEXIST                    pBtCoexist
1936         )
1937 {
1938         u1Byte  algorithm;
1939
1940         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n"));
1941
1942         // NOTE:
1943         // sw mechanism must be done after fw mechanism
1944         //
1945         if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist))
1946                 return;
1947
1948         if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
1949         {
1950                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL);
1951
1952                 halbtc8192d2ant_MonitorBtState(pBtCoexist);
1953                 algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist);
1954                 pCoexDm->curAlgorithm = algorithm;
1955                 switch(pCoexDm->curAlgorithm)
1956                 {
1957                         case BT_8192D_2ANT_COEX_ALGO_SCO:
1958                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n"));
1959                                 halbtc8192d2ant_ActionSco(pBtCoexist);
1960                                 break;
1961                         case BT_8192D_2ANT_COEX_ALGO_HID:
1962                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n"));
1963                                 halbtc8192d2ant_ActionHid(pBtCoexist);
1964                                 break;
1965                         case BT_8192D_2ANT_COEX_ALGO_A2DP:
1966                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n"));
1967                                 halbtc8192d2ant_ActionA2dp(pBtCoexist);
1968                                 break;
1969                         case BT_8192D_2ANT_COEX_ALGO_PAN:
1970                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n"));
1971                                 halbtc8192d2ant_ActionPan(pBtCoexist);
1972                                 break;
1973                         case BT_8192D_2ANT_COEX_ALGO_HID_A2DP:
1974                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n"));
1975                                 halbtc8192d2ant_ActionHidA2dp(pBtCoexist);
1976                                 break;
1977                         case BT_8192D_2ANT_COEX_ALGO_HID_PAN:
1978                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n"));
1979                                 halbtc8192d2ant_ActionHidPan(pBtCoexist);
1980                                 break;
1981                         case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP:
1982                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n"));
1983                                 halbtc8192d2ant_ActionPanA2dp(pBtCoexist);
1984                                 break;
1985                         default:
1986                                 break;
1987                 }
1988         }
1989 }
1990
1991 #endif
1992