1 /******************************************************************************
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3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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5 * This program is free software; you can redistribute it and/or modify it
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6 * under the terms of version 2 of the GNU General Public License as
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7 * published by the Free Software Foundation.
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9 * This program is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 * You should have received a copy of the GNU General Public License along with
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15 * this program; if not, write to the Free Software Foundation, Inc.,
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16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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19 ******************************************************************************/
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22 #ifndef __HALHWOUTSRC_H__
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23 #define __HALHWOUTSRC_H__
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26 /*--------------------------Define -------------------------------------------*/
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27 #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
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28 #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
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29 sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
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30 #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
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31 sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
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33 #define AGC_DIFF_CONFIG(ic, band) do {\
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34 if (pDM_Odm->bIsMPChip)\
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35 AGC_DIFF_CONFIG_MP(ic,band);\
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37 AGC_DIFF_CONFIG_TC(ic,band);\
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41 //============================================================
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42 // structure and define
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43 //============================================================
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45 typedef struct _Phy_Rx_AGC_Info
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47 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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48 u1Byte gain:7,trsw:1;
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50 u1Byte trsw:1,gain:7;
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52 } PHY_RX_AGC_INFO_T,*pPHY_RX_AGC_INFO_T;
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54 typedef struct _Phy_Status_Rpt_8192cd
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56 PHY_RX_AGC_INFO_T path_agc[2];
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58 u1Byte cck_sig_qual_ofdm_pwdb_all;
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59 u1Byte cck_agc_rpt_ofdm_cfosho_a;
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60 u1Byte cck_rpt_b_ofdm_cfosho_b;
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61 u1Byte rsvd_1;//ch_corr_msb;
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62 u1Byte noise_power_db_msb;
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63 s1Byte path_cfotail[2];
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64 u1Byte pcts_mask[2];
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65 s1Byte stream_rxevm[2];
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66 u1Byte path_rxsnr[2];
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67 u1Byte noise_power_db_lsb;
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69 u1Byte stream_csi[2];
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70 u1Byte stream_target_csi[2];
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74 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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75 u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1;
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79 u1Byte r_ant_train_en:1;
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82 #else // _BIG_ENDIAN_
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85 u1Byte r_ant_train_en:1;
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89 u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1;
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91 } PHY_STATUS_RPT_8192CD_T,*PPHY_STATUS_RPT_8192CD_T;
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94 typedef struct _Phy_Status_Rpt_8812
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97 PHY_RX_AGC_INFO_T path_agc[2];
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99 u1Byte cck_sig_qual_ofdm_pwdb_all;
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100 u1Byte cck_agc_rpt_ofdm_cfosho_a;
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101 u1Byte cck_bb_pwr_ofdm_cfosho_b;
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102 u1Byte cck_rx_path; //CCK_RX_PATH [3:0] (with regA07[3:0] definition)
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104 u1Byte path_cfotail[2];
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105 u1Byte pcts_mask[2];
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106 s1Byte stream_rxevm[2];
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107 u1Byte path_rxsnr[2];
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109 u1Byte stream_snr[2];
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110 u1Byte stream_csi[2];
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114 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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115 u1Byte antidx_anta:3;
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116 u1Byte antidx_antb:3;
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118 #else // _BIG_ENDIAN_
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120 u1Byte antidx_antb:3;
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121 u1Byte antidx_anta:3;
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125 //2012.05.24 LukeLee: This structure should take big/little endian in consideration later.....
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128 u1Byte gain_trsw[2];
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129 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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133 #else // _BIG_ENDIAN_
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141 u1Byte cfosho[4]; // DW 1 byte 1 DW 2 byte 0
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144 s1Byte cfotail[4]; // DW 2 byte 1 DW 3 byte 0
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147 s1Byte rxevm[2]; // DW 3 byte 1 DW 3 byte 2
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148 s1Byte rxsnr[2]; // DW 3 byte 3 DW 4 byte 0
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151 u1Byte PCTS_MSK_RPT[2];
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152 u1Byte pdsnr[2]; // DW 4 byte 3 DW 5 Byte 0
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155 u1Byte csi_current[2];
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162 u1Byte antidx_anta:3;
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163 u1Byte antidx_antb:3;
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165 } PHY_STATUS_RPT_8812_T,*PPHY_STATUS_RPT_8812_T;
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169 odm_Init_RSSIForDM(
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170 IN OUT PDM_ODM_T pDM_Odm
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174 ODM_PhyStatusQuery(
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175 IN OUT PDM_ODM_T pDM_Odm,
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176 OUT PODM_PHY_INFO_T pPhyInfo,
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177 IN pu1Byte pPhyStatus,
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178 IN PODM_PACKET_INFO_T pPktinfo
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182 ODM_MacStatusQuery(
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183 IN OUT PDM_ODM_T pDM_Odm,
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184 IN pu1Byte pMacStatus,
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186 IN BOOLEAN bPacketMatchBSSID,
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187 IN BOOLEAN bPacketToSelf,
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188 IN BOOLEAN bPacketBeacon
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190 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP))
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193 ODM_ConfigRFWithTxPwrTrackHeaderFile(
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194 IN PDM_ODM_T pDM_Odm
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198 ODM_ConfigRFWithHeaderFile(
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199 IN PDM_ODM_T pDM_Odm,
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200 IN ODM_RF_Config_Type ConfigType,
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201 IN ODM_RF_RADIO_PATH_E eRFPath
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205 ODM_ConfigBBWithHeaderFile(
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206 IN PDM_ODM_T pDM_Odm,
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207 IN ODM_BB_Config_Type ConfigType
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211 ODM_ConfigMACWithHeaderFile(
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212 IN PDM_ODM_T pDM_Odm
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216 ODM_ConfigFWWithHeaderFile(
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217 IN PDM_ODM_T pDM_Odm,
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218 IN ODM_FW_Config_Type ConfigType,
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219 OUT u1Byte *pFirmware,
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224 ODM_GetHWImgVersion(
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225 IN PDM_ODM_T pDM_Odm
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229 odm_SignalScaleMapping(
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230 IN OUT PDM_ODM_T pDM_Odm,
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