1 /******************************************************************************
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3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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5 * This program is free software; you can redistribute it and/or modify it
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6 * under the terms of version 2 of the GNU General Public License as
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7 * published by the Free Software Foundation.
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9 * This program is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 * You should have received a copy of the GNU General Public License along with
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15 * this program; if not, write to the Free Software Foundation, Inc.,
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16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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19 ******************************************************************************/
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21 //============================================================
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23 //============================================================
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26 #include "odm_precomp.h"
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28 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
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29 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))
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32 #if (TESTCHIP_SUPPORT == 1)
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33 #define READ_AND_CONFIG(ic, txt) do {\
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34 if (pDM_Odm->bIsMPChip)\
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35 READ_AND_CONFIG_MP(ic,txt);\
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37 READ_AND_CONFIG_TC(ic,txt);\
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40 #define READ_AND_CONFIG READ_AND_CONFIG_MP
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44 #define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize))
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45 #define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize))
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47 #if (TESTCHIP_SUPPORT == 1)
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48 #define READ_FIRMWARE(ic, txt) do {\
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49 if (pDM_Odm->bIsMPChip)\
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50 READ_FIRMWARE_MP(ic,txt);\
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52 READ_FIRMWARE_TC(ic,txt);\
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55 #define READ_FIRMWARE READ_FIRMWARE_MP
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58 #define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt())
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59 #define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt())
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61 #define GET_VERSION(ic, txt) do {\
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62 if (pDM_Odm->bIsMPChip)\
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63 GET_VERSION_MP(ic,txt);\
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65 GET_VERSION_TC(ic,txt);\
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70 odm_QueryRxPwrPercentage(
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74 if ((AntPower <= -100) || (AntPower >= 20))
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78 else if (AntPower >= 0)
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84 return (100+AntPower);
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89 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
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91 // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
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92 // IF other SW team do not support the feature, remove this section.??
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95 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
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96 IN OUT PDM_ODM_T pDM_Odm,
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101 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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102 //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
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104 // Step 1. Scale mapping.
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105 // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
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106 // 20100426 Joseph: Modify Signal strength mapping.
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107 // This modification makes the RSSI indication similar to Intel solution.
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108 // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
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109 if(CurrSig >= 54 && CurrSig <= 100)
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113 else if(CurrSig>=42 && CurrSig <= 53 )
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117 else if(CurrSig>=36 && CurrSig <= 41 )
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119 RetSig = 74 + ((CurrSig - 36) *20)/6;
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121 else if(CurrSig>=33 && CurrSig <= 35 )
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123 RetSig = 65 + ((CurrSig - 33) *8)/2;
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125 else if(CurrSig>=18 && CurrSig <= 32 )
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127 RetSig = 62 + ((CurrSig - 18) *2)/15;
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129 else if(CurrSig>=15 && CurrSig <= 17 )
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131 RetSig = 33 + ((CurrSig - 15) *28)/2;
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133 else if(CurrSig>=10 && CurrSig <= 14 )
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137 else if(CurrSig>=8 && CurrSig <= 9 )
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141 else if(CurrSig <= 8 )
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146 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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151 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
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152 IN OUT PDM_ODM_T pDM_Odm,
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157 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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158 //if(pDM_Odm->SupportInterface == ODM_ITRF_USB)
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160 // Netcore request this modification because 2009.04.13 SU driver use it.
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161 if(CurrSig >= 31 && CurrSig <= 100)
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165 else if(CurrSig >= 21 && CurrSig <= 30)
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167 RetSig = 90 + ((CurrSig - 20) / 1);
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169 else if(CurrSig >= 11 && CurrSig <= 20)
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171 RetSig = 80 + ((CurrSig - 10) / 1);
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173 else if(CurrSig >= 7 && CurrSig <= 10)
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175 RetSig = 69 + (CurrSig - 7);
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177 else if(CurrSig == 6)
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181 else if(CurrSig == 5)
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185 else if(CurrSig == 4)
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189 else if(CurrSig == 3)
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193 else if(CurrSig == 2)
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197 else if(CurrSig == 1)
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206 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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212 odm_SignalScaleMapping_92CSeries(
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213 IN OUT PDM_ODM_T pDM_Odm,
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217 s4Byte RetSig = 0;
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218 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
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219 if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
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221 // Step 1. Scale mapping.
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222 if(CurrSig >= 61 && CurrSig <= 100)
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224 RetSig = 90 + ((CurrSig - 60) / 4);
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226 else if(CurrSig >= 41 && CurrSig <= 60)
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228 RetSig = 78 + ((CurrSig - 40) / 2);
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230 else if(CurrSig >= 31 && CurrSig <= 40)
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232 RetSig = 66 + (CurrSig - 30);
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234 else if(CurrSig >= 21 && CurrSig <= 30)
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236 RetSig = 54 + (CurrSig - 20);
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238 else if(CurrSig >= 5 && CurrSig <= 20)
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240 RetSig = 42 + (((CurrSig - 5) * 2) / 3);
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242 else if(CurrSig == 4)
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246 else if(CurrSig == 3)
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250 else if(CurrSig == 2)
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254 else if(CurrSig == 1)
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265 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
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266 if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO))
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268 if(CurrSig >= 51 && CurrSig <= 100)
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272 else if(CurrSig >= 41 && CurrSig <= 50)
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274 RetSig = 80 + ((CurrSig - 40)*2);
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276 else if(CurrSig >= 31 && CurrSig <= 40)
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278 RetSig = 66 + (CurrSig - 30);
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280 else if(CurrSig >= 21 && CurrSig <= 30)
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282 RetSig = 54 + (CurrSig - 20);
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284 else if(CurrSig >= 10 && CurrSig <= 20)
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286 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
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288 else if(CurrSig >= 5 && CurrSig <= 9)
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290 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
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292 else if(CurrSig >= 1 && CurrSig <= 4)
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294 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
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306 odm_SignalScaleMapping(
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307 IN OUT PDM_ODM_T pDM_Odm,
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311 if( (pDM_Odm->SupportPlatform == ODM_WIN) &&
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312 (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO
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313 (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore
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315 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);
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317 else if( (pDM_Odm->SupportPlatform == ODM_WIN) &&
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318 (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) &&
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319 (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)
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321 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);
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324 return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);
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331 static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
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332 IN PDM_ODM_T pDM_Odm,
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333 IN u1Byte isCCKrate,
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334 IN u1Byte PWDB_ALL,
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340 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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344 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))
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348 // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11
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349 // 802.11n, 802.11b, 802.11g only at channel 6
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351 // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)
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366 RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));
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368 #if OS_WIN_FROM_WIN8(OS_VERSION)
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371 else if(PWDB_ALL >= 23 && PWDB_ALL < 50)
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373 else if(PWDB_ALL >= 18 && PWDB_ALL < 23)
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375 else if(PWDB_ALL >= 8 && PWDB_ALL < 18)
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382 else if(PWDB_ALL >= 23 && PWDB_ALL < 34)
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384 else if(PWDB_ALL >= 18 && PWDB_ALL < 23)
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386 else if(PWDB_ALL >= 8 && PWDB_ALL < 18)
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391 if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7
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396 else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){
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399 // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11
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400 // 802.11n, 802.11b, 802.11g only at channel 6
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402 // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)
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420 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
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422 else if(PWDB_ALL >= 31 && PWDB_ALL < 35)
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424 else if(PWDB_ALL >= 22 && PWDB_ALL < 31)
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426 else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
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435 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
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437 else if(PWDB_ALL >= 22 && PWDB_ALL < 35)
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439 else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
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449 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||
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450 IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))
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454 else if(RSSI >= 22 && RSSI < 45)
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456 else if(RSSI >= 18 && RSSI < 22)
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465 else if(RSSI >= 22 && RSSI < 45)
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467 else if(RSSI >= 18 && RSSI < 22)
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474 RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));
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480 static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(
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481 IN PDM_ODM_T pDM_Odm,
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482 IN u1Byte isCCKrate,
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483 IN u1Byte PWDB_ALL,
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490 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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494 RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));
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496 #if OS_WIN_FROM_WIN8(OS_VERSION)
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500 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
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502 else if(PWDB_ALL >= 30 && PWDB_ALL < 35)
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504 else if(PWDB_ALL >= 25 && PWDB_ALL < 30)
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506 else if(PWDB_ALL >= 20 && PWDB_ALL < 25)
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513 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
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515 else if(PWDB_ALL >= 30 && PWDB_ALL < 35)
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517 else if(PWDB_ALL >= 25 && PWDB_ALL < 30)
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519 else if(PWDB_ALL >= 20 && PWDB_ALL < 25)
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524 if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7
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534 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||
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535 IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))
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539 else if(RSSI >= 22 && RSSI < 45)
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541 else if(RSSI >= 18 && RSSI < 22)
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550 else if(RSSI >= 30 && RSSI < 35)
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552 else if(RSSI >= 25 && RSSI < 30)
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559 RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));
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566 odm_EVMdbToPercentage(
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571 // -33dB~0dB to 0%~99%
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578 //DbgPrint("Value=%d\n", Value);
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579 //ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val));
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586 ret_val = 0 - ret_val;
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596 odm_EVMdbm_JaguarSeries(
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600 s1Byte ret_val = Value;
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602 // -33dB~0dB to 33dB ~ 0dB
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603 if(ret_val == -128)
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605 else if (ret_val < 0)
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606 ret_val = 0 - ret_val;
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608 ret_val = ret_val >> 1;
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621 ret_val = 0 - Value;
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622 ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7
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623 ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo
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628 ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7
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635 odm_RxPhyStatus92CSeries_Parsing(
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636 IN OUT PDM_ODM_T pDM_Odm,
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637 OUT PODM_PHY_INFO_T pPhyInfo,
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638 IN pu1Byte pPhyStatus,
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639 IN PODM_PACKET_INFO_T pPktinfo
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642 SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
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643 u1Byte i, Max_spatial_stream;
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644 s1Byte rx_pwr[4], rx_pwr_all=0;
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645 u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT;
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646 u1Byte RSSI, total_rssi=0;
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647 BOOLEAN isCCKrate=FALSE;
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648 u1Byte rf_rx_num = 0;
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649 u1Byte cck_highpwr = 0;
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650 u1Byte LNA_idx, VGA_idx;
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651 PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
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653 isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;
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654 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
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655 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
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661 u1Byte cck_agc_rpt;
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663 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
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665 // (1)Hardware does not provide RSSI for CCK
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666 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
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669 //if(pHalData->eRFPowerState == eRfOn)
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670 cck_highpwr = pDM_Odm->bCckHighPower;
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672 // cck_highpwr = FALSE;
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674 cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
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676 //2011.11.28 LukeLee: 88E use different LNA & VGA gain table
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677 //The RSSI formula should be modified according to the gain table
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678 //In 88E, cck_highpwr is always set to 1
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679 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B))
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681 LNA_idx = ((cck_agc_rpt & 0xE0) >>5);
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682 VGA_idx = (cck_agc_rpt & 0x1F);
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683 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))
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689 rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2
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694 rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0
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697 rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5
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700 rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4
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703 //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0
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704 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0
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708 rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0
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710 rx_pwr_all = -6+ 2*(5-VGA_idx);
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713 rx_pwr_all = 8-2*VGA_idx;
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716 rx_pwr_all = 14-2*VGA_idx;
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719 //DbgPrint("CCK Exception default\n");
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724 //2012.10.08 LukeLee: Modify for 92E CCK RSSI
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725 if(pDM_Odm->SupportICType == ODM_RTL8192E)
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728 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
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729 if(cck_highpwr == FALSE)
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732 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
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733 else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
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739 else if(pDM_Odm->SupportICType & (ODM_RTL8723B))
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741 #if (RTL8723B_SUPPORT == 1)
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742 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);
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743 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
753 report =( cck_agc_rpt & 0xc0 )>>6;
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756 // 03312009 modified by cosa
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757 // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
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758 // Note: different RF with the different RNA gain.
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760 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
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763 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
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766 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
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769 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
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775 //report = pDrvInfo->cfosho[0] & 0x60;
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776 //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;
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778 report = (cck_agc_rpt & 0x60)>>5;
\r
782 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
\r
785 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
\r
788 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;
\r
791 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;
\r
796 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
798 //Modification for ext-LNA board
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799 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))
\r
801 if((cck_agc_rpt>>7) == 0){
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802 PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);
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809 PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);
\r
813 if(PWDB_ALL > 25 && PWDB_ALL <= 60)
\r
815 //else if (PWDB_ALL <= 25)
\r
818 else//Modification for int-LNA board
\r
822 else if(PWDB_ALL > 50 && PWDB_ALL <= 68)
\r
827 pPhyInfo->RxPWDBAll = PWDB_ALL;
\r
828 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
829 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
\r
830 pPhyInfo->RecvSignalPower = rx_pwr_all;
\r
833 // (3) Get Signal Quality (EVM)
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835 //if(pPktinfo->bPacketMatchBSSID)
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839 if((pDM_Odm->SupportPlatform == ODM_WIN) &&
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840 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){
\r
841 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
\r
843 else if((pDM_Odm->SupportPlatform == ODM_WIN) &&
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844 (pDM_Odm->PatchID==RT_CID_819x_Acer))
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846 SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
\r
848 else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){
\r
852 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
\r
856 else if (SQ_rpt < 20)
\r
859 SQ = ((64-SQ_rpt) * 100) / 44;
\r
863 //DbgPrint("cck SQ = %d\n", SQ);
\r
864 pPhyInfo->SignalQuality = SQ;
\r
865 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
\r
866 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
\r
869 else //is OFDM rate
\r
871 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
\r
874 // (1)Get RSSI for HT rate
\r
877 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
\r
879 // 2008/01/30 MH we will judge RF RX path now.
\r
880 if (pDM_Odm->RFPathRxEnable & BIT(i))
\r
885 rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;
\r
888 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
889 pPhyInfo->RxPwr[i] = rx_pwr[i];
\r
892 /* Translate DBM to percentage. */
\r
893 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
\r
894 total_rssi += RSSI;
\r
895 //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));
\r
897 //Modification for ext-LNA board
\r
898 if(pDM_Odm->SupportICType&ODM_RTL8192C)
\r
900 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))
\r
902 if((pPhyStaRpt->path_agc[i].trsw) == 1)
\r
903 RSSI = (RSSI>94)?100:(RSSI +6);
\r
905 RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);
\r
907 if((RSSI <= 34) && (RSSI >=4))
\r
912 pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;
\r
914 #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP|ODM_ADSL))
\r
915 //Get Rx snr value in DB
\r
916 pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);
\r
919 /* Record Signal Strength for next packet */
\r
920 //if(pPktinfo->bPacketMatchBSSID)
\r
922 if((pDM_Odm->SupportPlatform == ODM_WIN) &&
\r
923 (pDM_Odm->PatchID==RT_CID_819x_Lenovo))
\r
925 if(i==ODM_RF_PATH_A)
\r
926 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);
\r
929 else if((pDM_Odm->SupportPlatform == ODM_WIN) &&
\r
930 (pDM_Odm->PatchID==RT_CID_819x_Acer))
\r
932 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);
\r
940 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
\r
942 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110;
\r
944 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
945 //RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL));
\r
947 pPhyInfo->RxPWDBAll = PWDB_ALL;
\r
948 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));
\r
949 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
950 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
\r
951 pPhyInfo->RxPower = rx_pwr_all;
\r
952 pPhyInfo->RecvSignalPower = rx_pwr_all;
\r
955 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){
\r
957 }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){
\r
960 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo
\r
962 // (3)EVM of HT rate
\r
964 if(pPktinfo->DataRate >=DESC_RATEMCS8 && pPktinfo->DataRate <=DESC_RATEMCS15)
\r
965 Max_spatial_stream = 2; //both spatial stream make sense
\r
967 Max_spatial_stream = 1; //only spatial stream 1 makes sense
\r
969 for(i=0; i<Max_spatial_stream; i++)
\r
971 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
\r
972 // fill most significant bit to "zero" when doing shifting operation which may change a negative
\r
973 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
\r
974 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm
\r
976 //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
\r
977 //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));
\r
979 //if(pPktinfo->bPacketMatchBSSID)
\r
981 if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only
\r
983 pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);
\r
985 pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff);
\r
990 //2 For dynamic ATC switch
\r
991 if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC)
\r
993 if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0))
\r
997 //3 Update CFO report for path-A & path-B
\r
998 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
\r
1000 pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->path_cfotail[i];
\r
1003 //3 Update packet counter
\r
1004 if(pDM_Odm->packetCount == 0xffffffff)
\r
1005 pDM_Odm->packetCount = 0;
\r
1007 pDM_Odm->packetCount++;
\r
1009 //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD,
\r
1010 //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1]));
\r
1015 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
1016 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
\r
1017 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
\r
1020 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
\r
1021 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
\r
1022 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;
\r
1024 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;
\r
1029 if (rf_rx_num != 0)
\r
1031 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
\r
1032 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
\r
1033 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;
\r
1035 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));
\r
1041 //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n",
\r
1042 //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);
\r
1044 //For 92C/92D HW (Hybrid) Antenna Diversity
\r
1045 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
\r
1046 pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
\r
1047 //For 88E HW Antenna Diversity
\r
1048 pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
\r
1049 pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
\r
1050 pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
\r
1054 #if ODM_IC_11AC_SERIES_SUPPORT
\r
1057 odm_RxPhyStatusJaguarSeries_Parsing(
\r
1058 IN OUT PDM_ODM_T pDM_Odm,
\r
1059 OUT PODM_PHY_INFO_T pPhyInfo,
\r
1060 IN pu1Byte pPhyStatus,
\r
1061 IN PODM_PACKET_INFO_T pPktinfo
\r
1064 u1Byte i, Max_spatial_stream;
\r
1065 s1Byte rx_pwr[4], rx_pwr_all=0;
\r
1066 u1Byte EVM = 0, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;
\r
1067 u1Byte RSSI, total_rssi=0;
\r
1068 u1Byte isCCKrate=0;
\r
1069 u1Byte rf_rx_num = 0;
\r
1070 u1Byte cck_highpwr = 0;
\r
1071 u1Byte LNA_idx, VGA_idx;
\r
1074 PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus;
\r
1076 if(pPktinfo->DataRate <= DESC_RATE54M)
\r
1078 switch(pPhyStaRpt->r_RFMOD){
\r
1080 if(pPhyStaRpt->sub_chnl == 0)
\r
1081 pPhyInfo->BandWidth = 1;
\r
1083 pPhyInfo->BandWidth = 0;
\r
1087 if(pPhyStaRpt->sub_chnl == 0)
\r
1088 pPhyInfo->BandWidth = 2;
\r
1089 else if(pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)
\r
1090 pPhyInfo->BandWidth = 1;
\r
1092 pPhyInfo->BandWidth = 0;
\r
1096 pPhyInfo->BandWidth = 0;
\r
1101 if(pPktinfo->DataRate <= DESC_RATE11M)
\r
1104 isCCKrate = FALSE;
\r
1106 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
\r
1107 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
\r
1112 u1Byte cck_agc_rpt;
\r
1113 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
\r
1115 // (1)Hardware does not provide RSSI for CCK
\r
1116 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
\r
1119 //if(pHalData->eRFPowerState == eRfOn)
\r
1120 cck_highpwr = pDM_Odm->bCckHighPower;
\r
1122 // cck_highpwr = FALSE;
\r
1124 cck_agc_rpt = pPhyStaRpt->cfosho[0] ;
\r
1126 LNA_idx = ((cck_agc_rpt & 0xE0) >>5);
\r
1127 VGA_idx = (cck_agc_rpt & 0x1F);
\r
1128 if(pDM_Odm->SupportICType == ODM_RTL8812)
\r
1134 rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2
\r
1136 rx_pwr_all = -100;
\r
1139 rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0
\r
1142 rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5
\r
1145 rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4
\r
1148 //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0
\r
1149 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0
\r
1153 rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0
\r
1155 rx_pwr_all = -6+ 2*(5-VGA_idx);
\r
1158 rx_pwr_all = 8-2*VGA_idx;
\r
1161 rx_pwr_all = 14-2*VGA_idx;
\r
1164 //DbgPrint("CCK Exception default\n");
\r
1168 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
1169 if(cck_highpwr == FALSE)
\r
1171 if(PWDB_ALL >= 80)
\r
1172 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
\r
1173 else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
\r
1179 else if(pDM_Odm->SupportICType == ODM_RTL8821)
\r
1186 rx_pwr_all = Pout -32 -(2*VGA_idx);
\r
1189 rx_pwr_all = Pout -24 -(2*VGA_idx);
\r
1192 rx_pwr_all = Pout -11 -(2*VGA_idx);
\r
1195 rx_pwr_all = Pout + 5 -(2*VGA_idx);
\r
1198 rx_pwr_all = Pout + 21 -(2*VGA_idx);
\r
1201 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
1204 pPhyInfo->RxPWDBAll = PWDB_ALL;
\r
1205 //if(pPktinfo->StationID == 0)
\r
1207 // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",
\r
1208 // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);
\r
1210 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
1211 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
\r
1212 pPhyInfo->RecvSignalPower = rx_pwr_all;
\r
1215 // (3) Get Signal Quality (EVM)
\r
1217 //if(pPktinfo->bPacketMatchBSSID)
\r
1219 u1Byte SQ,SQ_rpt;
\r
1221 if((pDM_Odm->SupportPlatform == ODM_WIN) &&
\r
1222 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){
\r
1223 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
\r
1225 else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){
\r
1229 SQ_rpt = pPhyStaRpt->pwdb_all;
\r
1233 else if (SQ_rpt < 20)
\r
1236 SQ = ((64-SQ_rpt) * 100) / 44;
\r
1240 //DbgPrint("cck SQ = %d\n", SQ);
\r
1241 pPhyInfo->SignalQuality = SQ;
\r
1242 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
\r
1243 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
\r
1246 else //is OFDM rate
\r
1248 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
\r
1251 // (1)Get RSSI for OFDM rate
\r
1254 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
\r
1256 // 2008/01/30 MH we will judge RF RX path now.
\r
1257 //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);
\r
1258 if (pDM_Odm->RFPathRxEnable & BIT(i))
\r
1264 //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip
\r
1265 //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))
\r
1266 rx_pwr[i] = (pPhyStaRpt->gain_trsw[i]&0x7F) - 110;
\r
1268 // rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; //OLD FORMULA
\r
1270 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
1271 pPhyInfo->RxPwr[i] = rx_pwr[i];
\r
1274 /* Translate DBM to percentage. */
\r
1275 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
\r
1277 total_rssi += RSSI;
\r
1278 //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));
\r
1282 pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;
\r
1284 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP|ODM_ADSL))
\r
1285 //Get Rx snr value in DB
\r
1286 pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i]/2;
\r
1290 // (2) CFO_short & CFO_tail
\r
1292 pPhyInfo->Cfo_short[i] = odm_Cfo( (pPhyStaRpt->cfosho[i]) );
\r
1293 pPhyInfo->Cfo_tail[i] = odm_Cfo( (pPhyStaRpt->cfotail[i]) );
\r
1295 /* Record Signal Strength for next packet */
\r
1296 //if(pPktinfo->bPacketMatchBSSID)
\r
1298 if((pDM_Odm->SupportPlatform == ODM_WIN) &&
\r
1299 (pDM_Odm->PatchID==RT_CID_819x_Lenovo))
\r
1301 if(i==ODM_RF_PATH_A)
\r
1302 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);
\r
1310 // (3)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
\r
1312 //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip
\r
1313 if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))
\r
1314 rx_pwr_all = (pPhyStaRpt->pwdb_all& 0x7f) -110;
\r
1316 rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1 )& 0x7f) -110; //OLD FORMULA
\r
1319 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
\r
1322 pPhyInfo->RxPWDBAll = PWDB_ALL;
\r
1323 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));
\r
1324 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
1325 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
\r
1326 pPhyInfo->RxPower = rx_pwr_all;
\r
1327 pPhyInfo->RecvSignalPower = rx_pwr_all;
\r
1330 //DbgPrint("OFDM: pPhyInfo->RxPWDBAll = %d, pPhyInfo->RxMIMOSignalStrength[0] = %d, pPhyInfo->RxMIMOSignalStrength[1] = %d\n",
\r
1331 // pPhyInfo->RxPWDBAll, pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1]);
\r
1334 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){
\r
1337 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo
\r
1339 // (4)EVM of OFDM rate
\r
1341 if( (pPktinfo->DataRate>=DESC_RATEMCS8) &&
\r
1342 (pPktinfo->DataRate <=DESC_RATEMCS15))
\r
1343 Max_spatial_stream = 2;
\r
1344 else if( (pPktinfo->DataRate>=DESC_RATEVHTSS2MCS0) &&
\r
1345 (pPktinfo->DataRate <=DESC_RATEVHTSS2MCS9))
\r
1346 Max_spatial_stream = 2;
\r
1348 Max_spatial_stream = 1;
\r
1350 //if(pPktinfo->bPacketMatchBSSID)
\r
1352 //DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);
\r
1354 for(i=0; i<Max_spatial_stream; i++)
\r
1356 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
\r
1357 // fill most significant bit to "zero" when doing shifting operation which may change a negative
\r
1358 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
\r
1360 // 2013/09/02 MH According to 8812AU test, when use RX evm the value sometimes
\r
1361 // will be incorrect and 1SS-MCS-0-7 always incorrect. Only use LSIG the evm value
\r
1362 // seems ok. This seems BB bug, we need use another way to display better SQ.
\r
1364 //if (pPktinfo->DataRate>=DESC8812_RATE6M && pPktinfo->DataRate<=DESC8812_RATE54M)
\r
1367 if(i==ODM_RF_PATH_A )
\r
1369 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->sigevm )); //dbm
\r
1378 if (pPhyStaRpt->rxevm[i] == -128)
\r
1380 pPhyStaRpt->rxevm[i] = -25;
\r
1382 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->rxevm[i] )); //dbm
\r
1385 EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);
\r
1386 //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
\r
1387 //pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));
\r
1391 if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only
\r
1393 pPhyInfo->SignalQuality = EVM;
\r
1395 pPhyInfo->RxMIMOSignalQuality[i] = EVM;
\r
1396 pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;
\r
1401 //2 For dynamic ATC switch
\r
1402 if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC)
\r
1404 if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0) )
\r
1406 //3 Update CFO report for path-A & path-B
\r
1407 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
\r
1409 pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->cfotail[i];
\r
1412 //3 Update packet counter
\r
1413 if(pDM_Odm->packetCount == 0xffffffff)
\r
1414 pDM_Odm->packetCount = 0;
\r
1416 pDM_Odm->packetCount++;
\r
1418 //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD,
\r
1419 //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1]));
\r
1423 //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);
\r
1425 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
\r
1426 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
\r
1427 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
\r
1430 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
\r
1431 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
\r
1432 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;
\r
1434 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;
\r
1439 if (rf_rx_num != 0)
\r
1441 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
\r
1442 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
\r
1443 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;
\r
1445 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));
\r
1450 pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;
\r
1452 pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;
\r
1453 pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;
\r
1455 //DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d, pPhyStaRpt->resvd_1 = %d",
\r
1456 // pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb, pPhyStaRpt->resvd_1);
\r
1458 //DbgPrint("----------------------------\n");
\r
1459 //DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);
\r
1460 //DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x, pPhyStaRpt->pwdb_all=0x%x\n",
\r
1461 // pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1], pPhyStaRpt->pwdb_all);
\r
1462 //DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",
\r
1463 // pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);
\r
1470 odm_Init_RSSIForDM(
\r
1471 IN OUT PDM_ODM_T pDM_Odm
\r
1478 odm_Process_RSSIForDM(
\r
1479 IN OUT PDM_ODM_T pDM_Odm,
\r
1480 IN PODM_PHY_INFO_T pPhyInfo,
\r
1481 IN PODM_PACKET_INFO_T pPktinfo
\r
1485 s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
\r
1486 u1Byte isCCKrate=0;
\r
1487 u1Byte RSSI_max, RSSI_min, i;
\r
1488 u4Byte OFDM_pkt=0;
\r
1489 u4Byte Weighting=0;
\r
1490 PSTA_INFO_T pEntry;
\r
1493 if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)
\r
1497 // 2012/05/30 MH/Luke.Lee Add some description
\r
1498 // In windows driver: AP/IBSS mode STA
\r
1500 //if (pDM_Odm->SupportPlatform == ODM_WIN)
\r
1502 // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]];
\r
1505 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];
\r
1507 if(!IS_STA_VALID(pEntry) ){
\r
1510 if((!pPktinfo->bPacketMatchBSSID) )
\r
1515 if(pPktinfo->bPacketBeacon)
\r
1516 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;
\r
1518 isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;
\r
1519 pDM_Odm->RxRate = pPktinfo->DataRate;
\r
1523 DbgPrint("OFDM: pPktinfo->StationID=%d, isCCKrate=%d, pPhyInfo->RxPWDBAll=%d\n",
\r
1524 pPktinfo->StationID, isCCKrate, pPhyInfo->RxPWDBAll);
\r
1528 //--------------Statistic for antenna/path diversity------------------
\r
1529 if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)
\r
1531 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
\r
1532 ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);
\r
1535 else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)
\r
1537 #if (RTL8812A_SUPPORT == 1)
\r
1538 if(pDM_Odm->SupportICType == ODM_RTL8812)
\r
1540 pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv;
\r
1541 if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID)
\r
1543 if(pPktinfo->DataRate > DESC_RATE11M)
\r
1544 ODM_PathStatistics_8812A(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A],
\r
1545 pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);
\r
1551 //-----------------Smart Antenna Debug Message------------------//
\r
1553 UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
\r
1554 UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
\r
1555 UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
\r
1557 if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
\r
1560 if(!isCCKrate)//ofdm rate
\r
1562 if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){
\r
1563 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
\r
1564 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
\r
1565 pDM_Odm->RSSI_B = 0;
\r
1569 //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n",
\r
1570 //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);
\r
1571 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
\r
1572 pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
\r
1574 if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B])
\r
1576 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
\r
1577 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
\r
1581 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
\r
1582 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
\r
1584 if((RSSI_max -RSSI_min) < 3)
\r
1585 RSSI_Ave = RSSI_max;
\r
1586 else if((RSSI_max -RSSI_min) < 6)
\r
1587 RSSI_Ave = RSSI_max - 1;
\r
1588 else if((RSSI_max -RSSI_min) < 10)
\r
1589 RSSI_Ave = RSSI_max - 2;
\r
1591 RSSI_Ave = RSSI_max - 3;
\r
1594 //1 Process OFDM RSSI
\r
1595 if(UndecoratedSmoothedOFDM <= 0) // initialize
\r
1597 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
\r
1601 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)
\r
1603 UndecoratedSmoothedOFDM =
\r
1604 ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
\r
1605 (RSSI_Ave)) /(Rx_Smooth_Factor);
\r
1606 UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
\r
1610 UndecoratedSmoothedOFDM =
\r
1611 ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
\r
1612 (RSSI_Ave)) /(Rx_Smooth_Factor);
\r
1616 pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
\r
1621 RSSI_Ave = pPhyInfo->RxPWDBAll;
\r
1622 pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll;
\r
1623 pDM_Odm->RSSI_B = 0;
\r
1625 //1 Process CCK RSSI
\r
1626 if(UndecoratedSmoothedCCK <= 0) // initialize
\r
1628 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
\r
1632 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)
\r
1634 UndecoratedSmoothedCCK =
\r
1635 ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
\r
1636 (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);
\r
1637 UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
\r
1641 UndecoratedSmoothedCCK =
\r
1642 ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
\r
1643 (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);
\r
1646 pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
\r
1651 //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI
\r
1652 if(pEntry->rssi_stat.ValidBit >= 64)
\r
1653 pEntry->rssi_stat.ValidBit = 64;
\r
1655 pEntry->rssi_stat.ValidBit++;
\r
1657 for(i=0; i<pEntry->rssi_stat.ValidBit; i++)
\r
1658 OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
\r
1660 if(pEntry->rssi_stat.ValidBit == 64)
\r
1662 Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);
\r
1663 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
\r
1667 if(pEntry->rssi_stat.ValidBit != 0)
\r
1668 UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
\r
1670 UndecoratedSmoothedPWDB = 0;
\r
1673 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
\r
1674 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
\r
1675 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
\r
1677 //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting);
\r
1678 //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n",
\r
1679 // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK);
\r
1688 // Endianness before calling this API
\r
1691 ODM_PhyStatusQuery_92CSeries(
\r
1692 IN OUT PDM_ODM_T pDM_Odm,
\r
1693 OUT PODM_PHY_INFO_T pPhyInfo,
\r
1694 IN pu1Byte pPhyStatus,
\r
1695 IN PODM_PACKET_INFO_T pPktinfo
\r
1699 odm_RxPhyStatus92CSeries_Parsing(
\r
1705 if( pDM_Odm->RSSI_test == TRUE)
\r
1707 // Select the packets to do RSSI checking for antenna switching.
\r
1708 if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon )
\r
1711 #if 0//(DM_ODM_SUPPORT_TYPE == ODM_WIN)
\r
1712 dm_SWAW_RSSI_Check(
\r
1714 (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE,
\r
1715 bPacketMatchBSSID,
\r
1718 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
\r
1719 // Select the packets to do RSSI checking for antenna switching.
\r
1720 //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);
\r
1723 ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo);
\r
1728 odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);
\r
1736 // Endianness before calling this API
\r
1739 ODM_PhyStatusQuery_JaguarSeries(
\r
1740 IN OUT PDM_ODM_T pDM_Odm,
\r
1741 OUT PODM_PHY_INFO_T pPhyInfo,
\r
1742 IN pu1Byte pPhyStatus,
\r
1743 IN PODM_PACKET_INFO_T pPktinfo
\r
1746 odm_RxPhyStatusJaguarSeries_Parsing(
\r
1752 odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);
\r
1756 ODM_PhyStatusQuery(
\r
1757 IN OUT PDM_ODM_T pDM_Odm,
\r
1758 OUT PODM_PHY_INFO_T pPhyInfo,
\r
1759 IN pu1Byte pPhyStatus,
\r
1760 IN PODM_PACKET_INFO_T pPktinfo
\r
1764 if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )
\r
1766 ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);
\r
1770 ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);
\r
1774 // For future use.
\r
1776 ODM_MacStatusQuery(
\r
1777 IN OUT PDM_ODM_T pDM_Odm,
\r
1778 IN pu1Byte pMacStatus,
\r
1780 IN BOOLEAN bPacketMatchBSSID,
\r
1781 IN BOOLEAN bPacketToSelf,
\r
1782 IN BOOLEAN bPacketBeacon
\r
1785 // 2011/10/19 Driver team will handle in the future.
\r
1791 // If you want to add a new IC, Please follow below template and generate a new one.
\r
1796 ODM_ConfigRFWithHeaderFile(
\r
1797 IN PDM_ODM_T pDM_Odm,
\r
1798 IN ODM_RF_Config_Type ConfigType,
\r
1799 IN ODM_RF_RADIO_PATH_E eRFPath
\r
1802 PADAPTER Adapter = pDM_Odm->Adapter;
\r
1804 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
1805 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
\r
1806 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
1807 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
\r
1808 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
\r
1810 #if (RTL8723A_SUPPORT == 1)
\r
1811 if (pDM_Odm->SupportICType == ODM_RTL8723A)
\r
1813 if(ConfigType == CONFIG_RF_RADIO) {
\r
1814 if(eRFPath == ODM_RF_PATH_A)
\r
1815 READ_AND_CONFIG_MP(8723A,_RadioA_1T);
\r
1820 #if (RTL8188E_SUPPORT == 1)
\r
1821 if (pDM_Odm->SupportICType == ODM_RTL8188E)
\r
1823 if(ConfigType == CONFIG_RF_RADIO) {
\r
1824 if(eRFPath == ODM_RF_PATH_A){
\r
1825 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
\r
1826 READ_AND_CONFIG(8188E,_RadioA_1T_ICUT);
\r
1828 READ_AND_CONFIG(8188E,_RadioA_1T);
\r
1831 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1832 READ_AND_CONFIG(8188E,_TXPWR_LMT);
\r
1837 #if (RTL8812A_SUPPORT == 1)
\r
1838 if (pDM_Odm->SupportICType == ODM_RTL8812)
\r
1840 if(ConfigType == CONFIG_RF_RADIO) {
\r
1841 if(eRFPath == ODM_RF_PATH_A)
\r
1843 READ_AND_CONFIG(8812A,_RadioA);
\r
1845 else if(eRFPath == ODM_RF_PATH_B)
\r
1847 READ_AND_CONFIG(8812A,_RadioB);
\r
1850 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1851 READ_AND_CONFIG(8812A,_TXPWR_LMT);
\r
1856 #if (RTL8821A_SUPPORT == 1)
\r
1857 if (pDM_Odm->SupportICType == ODM_RTL8821)
\r
1859 if(ConfigType == CONFIG_RF_RADIO) {
\r
1860 if(eRFPath == ODM_RF_PATH_A)
\r
1862 READ_AND_CONFIG(8821A,_RadioA);
\r
1865 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1867 if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {
\r
1868 if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)
\r
1869 READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_FEM);
\r
1871 READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_IPA);
\r
1873 READ_AND_CONFIG(8821A,_TXPWR_LMT_8821A);
\r
1876 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));
\r
1880 #if (RTL8723B_SUPPORT == 1)
\r
1881 if (pDM_Odm->SupportICType == ODM_RTL8723B)
\r
1883 if(ConfigType == CONFIG_RF_RADIO) {
\r
1884 READ_AND_CONFIG(8723B,_RadioA);
\r
1886 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1887 READ_AND_CONFIG(8723B,_TXPWR_LMT);
\r
1892 #if (RTL8192E_SUPPORT == 1)
\r
1893 if (pDM_Odm->SupportICType == ODM_RTL8192E)
\r
1895 if(ConfigType == CONFIG_RF_RADIO) {
\r
1896 if(eRFPath == ODM_RF_PATH_A)
\r
1897 READ_AND_CONFIG(8192E,_RadioA);
\r
1898 else if(eRFPath == ODM_RF_PATH_B)
\r
1899 READ_AND_CONFIG(8192E,_RadioB);
\r
1901 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1902 READ_AND_CONFIG(8192E,_TXPWR_LMT);
\r
1907 #if (RTL8813A_SUPPORT == 1)
\r
1908 if (pDM_Odm->SupportICType == ODM_RTL8814A)
\r
1911 if(ConfigType == CONFIG_RF_TXPWR_LMT) {
\r
1912 READ_AND_CONFIG(8813A,_TXPWR_LMT);
\r
1918 return HAL_STATUS_SUCCESS;
\r
1922 ODM_ConfigRFWithTxPwrTrackHeaderFile(
\r
1923 IN PDM_ODM_T pDM_Odm
\r
1926 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
1927 ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
\r
1928 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
1929 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
\r
1930 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
\r
1935 #if (RTL8821A_SUPPORT == 1)
\r
1936 else if(pDM_Odm->SupportICType == ODM_RTL8821)
\r
1938 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
\r
1939 READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE);
\r
1940 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)
\r
1941 READ_AND_CONFIG(8821A,_TxPowerTrack_USB);
\r
1943 READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE);
\r
1946 #if (RTL8812A_SUPPORT == 1)
\r
1947 else if(pDM_Odm->SupportICType == ODM_RTL8812)
\r
1949 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
\r
1950 READ_AND_CONFIG(8812A,_TxPowerTrack_PCIE);
\r
1951 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {
\r
1952 if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip)
\r
1953 READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3);
\r
1955 READ_AND_CONFIG(8812A,_TxPowerTrack_USB);
\r
1960 #if (RTL8192E_SUPPORT == 1)
\r
1961 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
\r
1963 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
\r
1964 READ_AND_CONFIG(8192E,_TxPowerTrack_PCIE);
\r
1965 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)
\r
1966 READ_AND_CONFIG(8192E,_TxPowerTrack_USB);
\r
1969 #if RTL8723B_SUPPORT
\r
1970 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
\r
1972 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
\r
1973 READ_AND_CONFIG(8723B,_TxPowerTrack_PCIE);
\r
1974 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)
\r
1975 READ_AND_CONFIG(8723B,_TxPowerTrack_USB);
\r
1976 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)
\r
1977 READ_AND_CONFIG(8723B,_TxPowerTrack_SDIO);
\r
1980 #if RTL8188E_SUPPORT
\r
1981 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
\r
1983 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
\r
1984 READ_AND_CONFIG(8188E,_TxPowerTrack_PCIE);
\r
1985 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)
\r
1986 READ_AND_CONFIG(8188E,_TxPowerTrack_USB);
\r
1990 return HAL_STATUS_SUCCESS;
\r
1994 ODM_ConfigBBWithHeaderFile(
\r
1995 IN PDM_ODM_T pDM_Odm,
\r
1996 IN ODM_BB_Config_Type ConfigType
\r
1999 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
\r
2000 PADAPTER Adapter = pDM_Odm->Adapter;
\r
2001 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
\r
2002 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
\r
2006 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
2007 ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
\r
2008 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
2009 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
\r
2010 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
\r
2012 #if (RTL8723A_SUPPORT == 1)
\r
2013 if(pDM_Odm->SupportICType == ODM_RTL8723A)
\r
2015 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2017 READ_AND_CONFIG_MP(8723A,_PHY_REG_1T);
\r
2019 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2021 READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T);
\r
2026 #if (RTL8188E_SUPPORT == 1)
\r
2027 if(pDM_Odm->SupportICType == ODM_RTL8188E)
\r
2029 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2031 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
\r
2032 READ_AND_CONFIG(8188E,_PHY_REG_1T_ICUT);
\r
2034 READ_AND_CONFIG(8188E,_PHY_REG_1T);
\r
2036 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2038 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
\r
2039 READ_AND_CONFIG(8188E,_AGC_TAB_1T_ICUT);
\r
2041 READ_AND_CONFIG(8188E,_AGC_TAB_1T);
\r
2043 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2045 READ_AND_CONFIG(8188E,_PHY_REG_PG);
\r
2050 #if (RTL8812A_SUPPORT == 1)
\r
2051 if(pDM_Odm->SupportICType == ODM_RTL8812)
\r
2053 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2055 READ_AND_CONFIG(8812A,_PHY_REG);
\r
2057 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2059 READ_AND_CONFIG(8812A,_AGC_TAB);
\r
2061 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2063 if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip)
\r
2064 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);
\r
2065 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
\r
2066 else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip)
\r
2067 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);
\r
2070 READ_AND_CONFIG(8812A,_PHY_REG_PG);
\r
2072 else if(ConfigType == CONFIG_BB_PHY_REG_MP)
\r
2074 READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);
\r
2076 else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)
\r
2078 if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64))
\r
2079 AGC_DIFF_CONFIG_MP(8812A,LB);
\r
2080 else if (100 <= *pDM_Odm->pChannel)
\r
2081 AGC_DIFF_CONFIG_MP(8812A,HB);
\r
2086 #if (RTL8821A_SUPPORT == 1)
\r
2087 if(pDM_Odm->SupportICType == ODM_RTL8821)
\r
2089 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2091 READ_AND_CONFIG(8821A,_PHY_REG);
\r
2093 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2095 READ_AND_CONFIG(8821A,_AGC_TAB);
\r
2097 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2099 READ_AND_CONFIG(8821A,_PHY_REG_PG);
\r
2103 #if (RTL8723B_SUPPORT == 1)
\r
2104 if(pDM_Odm->SupportICType == ODM_RTL8723B)
\r
2107 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2109 READ_AND_CONFIG(8723B,_PHY_REG);
\r
2111 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2113 READ_AND_CONFIG(8723B,_AGC_TAB);
\r
2115 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2117 READ_AND_CONFIG(8723B,_PHY_REG_PG);
\r
2121 #if (RTL8192E_SUPPORT == 1)
\r
2122 if(pDM_Odm->SupportICType == ODM_RTL8192E)
\r
2125 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2127 READ_AND_CONFIG(8192E,_PHY_REG);
\r
2129 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2131 READ_AND_CONFIG(8192E,_AGC_TAB);
\r
2133 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2135 READ_AND_CONFIG(8192E,_PHY_REG_PG);
\r
2139 #if (RTL8813A_SUPPORT == 1)
\r
2140 if(pDM_Odm->SupportICType == ODM_RTL8814A)
\r
2143 if(ConfigType == CONFIG_BB_PHY_REG)
\r
2145 READ_AND_CONFIG(8813A,_PHY_REG);
\r
2147 else if(ConfigType == CONFIG_BB_AGC_TAB)
\r
2149 READ_AND_CONFIG(8813A,_AGC_TAB);
\r
2151 else if(ConfigType == CONFIG_BB_PHY_REG_PG)
\r
2153 //READ_AND_CONFIG(8813A,_PHY_REG_PG);
\r
2157 return HAL_STATUS_SUCCESS;
\r
2161 ODM_ConfigMACWithHeaderFile(
\r
2162 IN PDM_ODM_T pDM_Odm
\r
2165 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
\r
2166 PADAPTER Adapter = pDM_Odm->Adapter;
\r
2168 u1Byte result = HAL_STATUS_SUCCESS;
\r
2170 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
2171 ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
\r
2172 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
\r
2173 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
\r
2174 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
\r
2176 #if (RTL8723A_SUPPORT == 1)
\r
2177 if (pDM_Odm->SupportICType == ODM_RTL8723A)
\r
2179 READ_AND_CONFIG_MP(8723A,_MAC_REG);
\r
2182 #if (RTL8188E_SUPPORT == 1)
\r
2183 if (pDM_Odm->SupportICType == ODM_RTL8188E)
\r
2185 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
\r
2186 result = READ_AND_CONFIG(8188E,_MAC_REG_ICUT);
\r
2188 result = READ_AND_CONFIG(8188E,_MAC_REG);
\r
2191 #if (RTL8812A_SUPPORT == 1)
\r
2192 if (pDM_Odm->SupportICType == ODM_RTL8812)
\r
2194 READ_AND_CONFIG(8812A,_MAC_REG);
\r
2197 #if (RTL8821A_SUPPORT == 1)
\r
2198 if (pDM_Odm->SupportICType == ODM_RTL8821)
\r
2200 READ_AND_CONFIG(8821A,_MAC_REG);
\r
2202 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));
\r
2205 #if (RTL8723B_SUPPORT == 1)
\r
2206 if (pDM_Odm->SupportICType == ODM_RTL8723B)
\r
2208 READ_AND_CONFIG(8723B,_MAC_REG);
\r
2211 #if (RTL8192E_SUPPORT == 1)
\r
2212 if (pDM_Odm->SupportICType == ODM_RTL8192E)
\r
2214 READ_AND_CONFIG(8192E,_MAC_REG);
\r
2222 ODM_ConfigFWWithHeaderFile(
\r
2223 IN PDM_ODM_T pDM_Odm,
\r
2224 IN ODM_FW_Config_Type ConfigType,
\r
2225 OUT u1Byte *pFirmware,
\r
2230 #if (RTL8188E_SUPPORT == 1)
\r
2231 if (pDM_Odm->SupportICType == ODM_RTL8188E)
\r
2233 if (ConfigType == CONFIG_FW_NIC)
\r
2235 READ_FIRMWARE(8188E,_FW_NIC_T);
\r
2237 else if (ConfigType == CONFIG_FW_WoWLAN)
\r
2239 READ_FIRMWARE(8188E,_FW_WoWLAN_T);
\r
2241 else if(ConfigType == CONFIG_FW_NIC_2)
\r
2243 READ_FIRMWARE(8188E,_FW_NIC_S);
\r
2245 else if (ConfigType == CONFIG_FW_WoWLAN_2)
\r
2247 READ_FIRMWARE(8188E,_FW_WoWLAN_S);
\r
2251 #if (RTL8723B_SUPPORT == 1)
\r
2252 if (pDM_Odm->SupportICType == ODM_RTL8723B)
\r
2254 if (ConfigType == CONFIG_FW_NIC)
\r
2256 READ_FIRMWARE(8723B,_FW_NIC);
\r
2258 else if (ConfigType == CONFIG_FW_WoWLAN)
\r
2260 READ_FIRMWARE(8723B,_FW_WoWLAN);
\r
2262 #ifdef CONFIG_AP_WOWLAN
\r
2263 else if (ConfigType == CONFIG_FW_AP_WoWLAN)
\r
2265 READ_FIRMWARE(8723B,_FW_AP_WoWLAN);
\r
2268 else if (ConfigType == CONFIG_FW_BT)
\r
2270 READ_FIRMWARE_MP(8723B,_FW_BT);
\r
2272 else if (ConfigType == CONFIG_FW_MP)
\r
2274 READ_FIRMWARE_MP(8723B,_FW_MP);
\r
2278 #if (RTL8812A_SUPPORT == 1)
\r
2279 if (pDM_Odm->SupportICType == ODM_RTL8812)
\r
2281 if (ConfigType == CONFIG_FW_NIC)
\r
2283 READ_FIRMWARE(8812A,_FW_NIC);
\r
2285 else if (ConfigType == CONFIG_FW_WoWLAN)
\r
2287 READ_FIRMWARE(8812A,_FW_WoWLAN);
\r
2289 else if (ConfigType == CONFIG_FW_BT)
\r
2291 READ_FIRMWARE(8812A,_FW_NIC_BT);
\r
2296 #if (RTL8821A_SUPPORT == 1)
\r
2297 if (pDM_Odm->SupportICType == ODM_RTL8821)
\r
2299 if (ConfigType == CONFIG_FW_NIC)
\r
2301 READ_FIRMWARE_MP(8821A,_FW_NIC);
\r
2303 else if (ConfigType == CONFIG_FW_WoWLAN)
\r
2305 READ_FIRMWARE(8821A,_FW_WoWLAN);
\r
2307 else if (ConfigType == CONFIG_FW_BT)
\r
2309 READ_FIRMWARE_MP(8821A,_FW_NIC_BT);
\r
2313 #if (RTL8192E_SUPPORT == 1)
\r
2314 if (pDM_Odm->SupportICType == ODM_RTL8192E)
\r
2316 if (ConfigType == CONFIG_FW_NIC)
\r
2318 READ_FIRMWARE(8192E,_FW_NIC);
\r
2320 else if (ConfigType == CONFIG_FW_WoWLAN)
\r
2322 READ_FIRMWARE(8192E,_FW_WoWLAN);
\r
2324 #ifdef CONFIG_AP_WOWLAN
\r
2325 else if (ConfigType == CONFIG_FW_AP_WoWLAN)
\r
2327 READ_FIRMWARE(8192E,_FW_AP_WoWLAN);
\r
2333 return HAL_STATUS_SUCCESS;
\r
2338 ODM_GetHWImgVersion(
\r
2339 IN PDM_ODM_T pDM_Odm
\r
2343 #if (RTL8812A_SUPPORT == 1)
\r
2344 if (pDM_Odm->SupportICType == ODM_RTL8812)
\r
2345 return GET_VERSION_MP(8812A,_MAC_REG);
\r