drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/OUTSRC/odm_HWConfig.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 //============================================================\r
  22 // include files\r
  23 //============================================================\r
  24 \r
  25 \r
  26 #include "odm_precomp.h"\r
  27 \r
  28 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))\r
  29 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))\r
  30 \r
  31 \r
  32 #if (TESTCHIP_SUPPORT == 1)\r
  33 #define READ_AND_CONFIG(ic, txt) do {\\r
  34                                             if (pDM_Odm->bIsMPChip)\\r
  35                                                     READ_AND_CONFIG_MP(ic,txt);\\r
  36                                             else\\r
  37                                                 READ_AND_CONFIG_TC(ic,txt);\\r
  38                                     } while(0)\r
  39 #else\r
  40   #define READ_AND_CONFIG     READ_AND_CONFIG_MP\r
  41 #endif\r
  42 \r
  43 \r
  44 #define READ_FIRMWARE_MP(ic, txt)               (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize))\r
  45 #define READ_FIRMWARE_TC(ic, txt)               (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize))              \r
  46 \r
  47 #if (TESTCHIP_SUPPORT == 1)\r
  48 #define READ_FIRMWARE(ic, txt) do {\\r
  49                                                 if (pDM_Odm->bIsMPChip)\\r
  50                                                         READ_FIRMWARE_MP(ic,txt);\\r
  51                                                 else\\r
  52                                                         READ_FIRMWARE_TC(ic,txt);\\r
  53                                         } while(0) \r
  54 #else\r
  55 #define READ_FIRMWARE     READ_FIRMWARE_MP\r
  56 #endif\r
  57                                                 \r
  58 #define GET_VERSION_MP(ic, txt)                 (ODM_GetVersion_MP_##ic##txt())\r
  59 #define GET_VERSION_TC(ic, txt)                 (ODM_GetVersion_TC_##ic##txt())\r
  60         \r
  61 #define GET_VERSION(ic, txt) do {\\r
  62                                                         if (pDM_Odm->bIsMPChip)\\r
  63                                                                 GET_VERSION_MP(ic,txt);\\r
  64                                                         else\\r
  65                                                                 GET_VERSION_TC(ic,txt);\\r
  66                                                 } while(0)\r
  67 \r
  68 \r
  69 u1Byte\r
  70 odm_QueryRxPwrPercentage(\r
  71         IN              s1Byte          AntPower\r
  72         )\r
  73 {\r
  74         if ((AntPower <= -100) || (AntPower >= 20))\r
  75         {\r
  76                 return  0;\r
  77         }\r
  78         else if (AntPower >= 0)\r
  79         {\r
  80                 return  100;\r
  81         }\r
  82         else\r
  83         {\r
  84                 return  (100+AntPower);\r
  85         }\r
  86         \r
  87 }\r
  88 \r
  89 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)\r
  90 //\r
  91 // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.\r
  92 // IF other SW team do not support the feature, remove this section.??\r
  93 //\r
  94 s4Byte\r
  95 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(      \r
  96         IN OUT PDM_ODM_T pDM_Odm,\r
  97         s4Byte CurrSig \r
  98 )\r
  99 {       \r
 100         s4Byte RetSig = 0;\r
 101 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 102         //if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
 103         {\r
 104                 // Step 1. Scale mapping.\r
 105                 // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.\r
 106                 // 20100426 Joseph: Modify Signal strength mapping.\r
 107                 // This modification makes the RSSI indication similar to Intel solution.\r
 108                 // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.\r
 109                 if(CurrSig >= 54 && CurrSig <= 100)\r
 110                 {\r
 111                         RetSig = 100;\r
 112                 }\r
 113                 else if(CurrSig>=42 && CurrSig <= 53 )\r
 114                 {\r
 115                         RetSig = 95;\r
 116                 }\r
 117                 else if(CurrSig>=36 && CurrSig <= 41 )\r
 118                 {\r
 119                         RetSig = 74 + ((CurrSig - 36) *20)/6;\r
 120                 }\r
 121                 else if(CurrSig>=33 && CurrSig <= 35 )\r
 122                 {\r
 123                         RetSig = 65 + ((CurrSig - 33) *8)/2;\r
 124                 }\r
 125                 else if(CurrSig>=18 && CurrSig <= 32 )\r
 126                 {\r
 127                         RetSig = 62 + ((CurrSig - 18) *2)/15;\r
 128                 }\r
 129                 else if(CurrSig>=15 && CurrSig <= 17 )\r
 130                 {\r
 131                         RetSig = 33 + ((CurrSig - 15) *28)/2;\r
 132                 }\r
 133                 else if(CurrSig>=10 && CurrSig <= 14 )\r
 134                 {\r
 135                         RetSig = 39;\r
 136                 }\r
 137                 else if(CurrSig>=8 && CurrSig <= 9 )\r
 138                 {\r
 139                         RetSig = 33;\r
 140                 }\r
 141                 else if(CurrSig <= 8 )\r
 142                 {\r
 143                         RetSig = 19;\r
 144                 }\r
 145         }\r
 146 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 147         return RetSig;\r
 148 }\r
 149 \r
 150 s4Byte\r
 151 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(     \r
 152         IN OUT PDM_ODM_T pDM_Odm,\r
 153         s4Byte CurrSig \r
 154 )\r
 155 {\r
 156         s4Byte RetSig = 0;\r
 157 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 158         //if(pDM_Odm->SupportInterface  == ODM_ITRF_USB)\r
 159         {\r
 160                 // Netcore request this modification because 2009.04.13 SU driver use it. \r
 161                 if(CurrSig >= 31 && CurrSig <= 100)\r
 162                 {\r
 163                         RetSig = 100;\r
 164                 }       \r
 165                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 166                 {\r
 167                         RetSig = 90 + ((CurrSig - 20) / 1);\r
 168                 }\r
 169                 else if(CurrSig >= 11 && CurrSig <= 20)\r
 170                 {\r
 171                         RetSig = 80 + ((CurrSig - 10) / 1);\r
 172                 }\r
 173                 else if(CurrSig >= 7 && CurrSig <= 10)\r
 174                 {\r
 175                         RetSig = 69 + (CurrSig - 7);\r
 176                 }\r
 177                 else if(CurrSig == 6)\r
 178                 {\r
 179                         RetSig = 54;\r
 180                 }\r
 181                 else if(CurrSig == 5)\r
 182                 {\r
 183                         RetSig = 45;\r
 184                 }\r
 185                 else if(CurrSig == 4)\r
 186                 {\r
 187                         RetSig = 36;\r
 188                 }\r
 189                 else if(CurrSig == 3)\r
 190                 {\r
 191                         RetSig = 27;\r
 192                 }\r
 193                 else if(CurrSig == 2)\r
 194                 {\r
 195                         RetSig = 18;\r
 196                 }\r
 197                 else if(CurrSig == 1)\r
 198                 {\r
 199                         RetSig = 9;\r
 200                 }\r
 201                 else\r
 202                 {\r
 203                         RetSig = CurrSig;\r
 204                 }\r
 205         }\r
 206 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 207         return RetSig;\r
 208 }\r
 209 \r
 210 \r
 211 s4Byte\r
 212 odm_SignalScaleMapping_92CSeries(       \r
 213         IN OUT PDM_ODM_T pDM_Odm,\r
 214         IN s4Byte CurrSig \r
 215 )\r
 216 {\r
 217         s4Byte RetSig = 0; \r
 218 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) \r
 219         if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
 220         {\r
 221                 // Step 1. Scale mapping.\r
 222                 if(CurrSig >= 61 && CurrSig <= 100)\r
 223                 {\r
 224                         RetSig = 90 + ((CurrSig - 60) / 4);\r
 225                 }\r
 226                 else if(CurrSig >= 41 && CurrSig <= 60)\r
 227                 {\r
 228                         RetSig = 78 + ((CurrSig - 40) / 2);\r
 229                 }\r
 230                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 231                 {\r
 232                         RetSig = 66 + (CurrSig - 30);\r
 233                 }\r
 234                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 235                 {\r
 236                         RetSig = 54 + (CurrSig - 20);\r
 237                 }\r
 238                 else if(CurrSig >= 5 && CurrSig <= 20)\r
 239                 {\r
 240                         RetSig = 42 + (((CurrSig - 5) * 2) / 3);\r
 241                 }\r
 242                 else if(CurrSig == 4)\r
 243                 {\r
 244                         RetSig = 36;\r
 245                 }\r
 246                 else if(CurrSig == 3)\r
 247                 {\r
 248                         RetSig = 27;\r
 249                 }\r
 250                 else if(CurrSig == 2)\r
 251                 {\r
 252                         RetSig = 18;\r
 253                 }\r
 254                 else if(CurrSig == 1)\r
 255                 {\r
 256                         RetSig = 9;\r
 257                 }\r
 258                 else\r
 259                 {\r
 260                         RetSig = CurrSig;\r
 261                 }\r
 262         }\r
 263 #endif\r
 264 \r
 265 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
 266         if((pDM_Odm->SupportInterface  == ODM_ITRF_USB) || (pDM_Odm->SupportInterface  == ODM_ITRF_SDIO))\r
 267         {\r
 268                 if(CurrSig >= 51 && CurrSig <= 100)\r
 269                 {\r
 270                         RetSig = 100;\r
 271                 }\r
 272                 else if(CurrSig >= 41 && CurrSig <= 50)\r
 273                 {\r
 274                         RetSig = 80 + ((CurrSig - 40)*2);\r
 275                 }\r
 276                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 277                 {\r
 278                         RetSig = 66 + (CurrSig - 30);\r
 279                 }\r
 280                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 281                 {\r
 282                         RetSig = 54 + (CurrSig - 20);\r
 283                 }\r
 284                 else if(CurrSig >= 10 && CurrSig <= 20)\r
 285                 {\r
 286                         RetSig = 42 + (((CurrSig - 10) * 2) / 3);\r
 287                 }\r
 288                 else if(CurrSig >= 5 && CurrSig <= 9)\r
 289                 {\r
 290                         RetSig = 22 + (((CurrSig - 5) * 3) / 2);\r
 291                 }\r
 292                 else if(CurrSig >= 1 && CurrSig <= 4)\r
 293                 {\r
 294                         RetSig = 6 + (((CurrSig - 1) * 3) / 2);\r
 295                 }\r
 296                 else\r
 297                 {\r
 298                         RetSig = CurrSig;\r
 299                 }\r
 300         }\r
 301 \r
 302 #endif\r
 303         return RetSig;\r
 304 }\r
 305 s4Byte\r
 306 odm_SignalScaleMapping( \r
 307         IN OUT PDM_ODM_T pDM_Odm,\r
 308         IN      s4Byte CurrSig \r
 309 )\r
 310 {       \r
 311         if(     (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 312                 (pDM_Odm->SupportInterface  != ODM_ITRF_PCIE) && //USB & SDIO\r
 313                 (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore\r
 314         {\r
 315                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);\r
 316         }\r
 317         else if(        (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 318                         (pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) &&\r
 319                         (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)\r
 320         {\r
 321                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);\r
 322         }\r
 323         else{           \r
 324                 return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);\r
 325         }\r
 326         \r
 327 }\r
 328 #endif\r
 329 \r
 330 \r
 331 static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(\r
 332         IN PDM_ODM_T    pDM_Odm,\r
 333         IN u1Byte               isCCKrate,\r
 334         IN u1Byte               PWDB_ALL,\r
 335         IN u1Byte               path,\r
 336         IN u1Byte               RSSI\r
 337 )\r
 338 {\r
 339         u1Byte  SQ = 0;\r
 340 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 341 \r
 342         if(isCCKrate){\r
 343                 \r
 344                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))\r
 345                 {\r
 346 \r
 347                         //\r
 348                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 349                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 350                         //\r
 351                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 352                         //                      50                              5                       -52\r
 353                         //                      55                              5                       -54\r
 354                         //                      60                              5                       -55\r
 355                         //                      65                              5                       -59\r
 356                         //                      70                              5                       -63\r
 357                         //                      75                              5                       -66\r
 358                         //                      80                              4                       -72\r
 359                         //                      85                              3                       -75\r
 360                         //                      90                              3                       -80\r
 361                         //                      95                              2                       -85\r
 362                         //                      100                             1                       -89\r
 363                         //                      102                             1                       -90\r
 364                         //                      104                             1                       -91\r
 365                         //\r
 366                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));\r
 367                         \r
 368 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 369                         if(PWDB_ALL >= 50)\r
 370                                 SQ = 100;\r
 371                         else if(PWDB_ALL >= 23 && PWDB_ALL < 50)                                \r
 372                                 SQ = 80;\r
 373                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 374                                 SQ = 60;\r
 375                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 376                                 SQ = 40;\r
 377                         else\r
 378                                 SQ = 10;\r
 379 #else\r
 380                         if(PWDB_ALL >= 34)\r
 381                                 SQ = 100;\r
 382                         else if(PWDB_ALL >= 23 && PWDB_ALL < 34)                                \r
 383                                 SQ = 80;\r
 384                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 385                                 SQ = 60;\r
 386                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 387                                 SQ = 40;\r
 388                         else\r
 389                                 SQ = 10;        \r
 390 \r
 391                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 392                                 SQ = 20;\r
 393 #endif          \r
 394 \r
 395                 }\r
 396                 else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){\r
 397 \r
 398                         //\r
 399                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 400                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 401                         //\r
 402                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 403                         //                      50                              5                       -49\r
 404                         //                      55                              5                       -49\r
 405                         //                      60                              5                       -50\r
 406                         //                      65                              5                       -51\r
 407                         //                      70                              5                       -52\r
 408                         //                      75                              5                       -54\r
 409                         //                      80                              5                       -55\r
 410                         //                      85                              4                       -60\r
 411                         //                      90                              3                       -63\r
 412                         //                      95                              3                       -65\r
 413                         //                      100                             2                       -67\r
 414                         //                      102                             2                       -67\r
 415                         //                      104                             1                       -70\r
 416                         //                      \r
 417 \r
 418                         if(PWDB_ALL >= 50)\r
 419                                 SQ = 100;\r
 420                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 421                                 SQ = 80;\r
 422                         else if(PWDB_ALL >= 31 && PWDB_ALL < 35)\r
 423                                 SQ = 60;\r
 424                         else if(PWDB_ALL >= 22 && PWDB_ALL < 31)\r
 425                                 SQ = 40;\r
 426                         else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 427                                 SQ = 20;\r
 428                         else\r
 429                                 SQ = 10;\r
 430                 }\r
 431                 else\r
 432                 {\r
 433                 if(PWDB_ALL >= 50)\r
 434                         SQ = 100;\r
 435                 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 436                         SQ = 80;\r
 437                 else if(PWDB_ALL >= 22 && PWDB_ALL < 35)\r
 438                         SQ = 60;\r
 439                 else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 440                         SQ = 40;\r
 441                 else\r
 442                                 SQ = 10;\r
 443                 }\r
 444                 \r
 445         }\r
 446         else\r
 447         {//OFDM rate            \r
 448 \r
 449                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 450                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 451                 {\r
 452                         if(RSSI >= 45)\r
 453                                 SQ = 100;\r
 454                         else if(RSSI >= 22 && RSSI < 45)\r
 455                                 SQ = 80;\r
 456                         else if(RSSI >= 18 && RSSI < 22)\r
 457                                 SQ = 40;\r
 458                         else\r
 459                         SQ = 20;\r
 460         }\r
 461                 else\r
 462                 {\r
 463                         if(RSSI >= 45)\r
 464                         SQ = 100;\r
 465                         else if(RSSI >= 22 && RSSI < 45)\r
 466                         SQ = 80;\r
 467                 else if(RSSI >= 18 && RSSI < 22)\r
 468                         SQ = 40;\r
 469                 else\r
 470                         SQ = 20;                        \r
 471         }\r
 472         }\r
 473 \r
 474         RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 475         \r
 476 #endif\r
 477         return SQ;\r
 478 }\r
 479 \r
 480 static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(\r
 481         IN PDM_ODM_T    pDM_Odm,\r
 482         IN u1Byte               isCCKrate,\r
 483         IN u1Byte               PWDB_ALL,\r
 484         IN u1Byte               path,\r
 485         IN u1Byte               RSSI\r
 486 )\r
 487 {\r
 488         u1Byte  SQ = 0;\r
 489         \r
 490 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 491 \r
 492         if(isCCKrate){\r
 493 \r
 494                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));\r
 495                         \r
 496 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 497 \r
 498                         if(PWDB_ALL >= 50)\r
 499                                 SQ = 100;\r
 500                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 501                                 SQ = 80;\r
 502                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 503                                 SQ = 60;\r
 504                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 505                                 SQ = 40;\r
 506                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 507                                 SQ = 20;\r
 508                         else\r
 509                                 SQ = 10;        \r
 510 #else\r
 511                         if(PWDB_ALL >= 50)\r
 512                                 SQ = 100;\r
 513                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 514                                 SQ = 80;\r
 515                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 516                                 SQ = 60;\r
 517                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 518                                 SQ = 40;\r
 519                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 520                                 SQ = 20;\r
 521                         else\r
 522                                 SQ = 10;        \r
 523 \r
 524                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 525                                 SQ = 20;\r
 526 #endif          \r
 527 \r
 528                 \r
 529                 \r
 530         }\r
 531         else\r
 532         {//OFDM rate            \r
 533 \r
 534                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 535                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 536                 {\r
 537                         if(RSSI >= 45)\r
 538                                 SQ = 100;\r
 539                         else if(RSSI >= 22 && RSSI < 45)\r
 540                                 SQ = 80;\r
 541                         else if(RSSI >= 18 && RSSI < 22)\r
 542                                 SQ = 40;\r
 543                         else\r
 544                         SQ = 20;\r
 545         }\r
 546                 else\r
 547                 {\r
 548                         if(RSSI >= 35)\r
 549                         SQ = 100;\r
 550                         else if(RSSI >= 30 && RSSI < 35)\r
 551                         SQ = 80;\r
 552                 else if(RSSI >= 25 && RSSI < 30)\r
 553                         SQ = 40;\r
 554                 else\r
 555                         SQ = 20;                        \r
 556         }\r
 557         }\r
 558 \r
 559         RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 560         \r
 561 #endif\r
 562         return SQ;\r
 563 }\r
 564                         \r
 565 static u1Byte \r
 566 odm_EVMdbToPercentage(\r
 567     IN          s1Byte Value\r
 568     )\r
 569 {\r
 570         //\r
 571         // -33dB~0dB to 0%~99%\r
 572         //\r
 573         s1Byte ret_val;\r
 574     \r
 575         ret_val = Value;\r
 576         ret_val /= 2;\r
 577 \r
 578         //DbgPrint("Value=%d\n", Value);\r
 579         //ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val));\r
 580                 \r
 581         if(ret_val >= 0)\r
 582                 ret_val = 0;\r
 583         if(ret_val <= -33)\r
 584                 ret_val = -33;\r
 585 \r
 586         ret_val = 0 - ret_val;\r
 587         ret_val*=3;\r
 588 \r
 589         if(ret_val == 99)\r
 590                 ret_val = 100;\r
 591 \r
 592         return(ret_val);\r
 593 }\r
 594                         \r
 595 static u1Byte \r
 596 odm_EVMdbm_JaguarSeries(\r
 597         IN  s1Byte Value\r
 598         )\r
 599 {\r
 600         s1Byte ret_val = Value;\r
 601         \r
 602         // -33dB~0dB to 33dB ~ 0dB\r
 603         if(ret_val == -128)\r
 604                 ret_val = 127;\r
 605         else if (ret_val < 0)\r
 606                 ret_val = 0 - ret_val;\r
 607         \r
 608         ret_val  = ret_val >> 1;\r
 609         return ret_val;\r
 610 }\r
 611 \r
 612 static u2Byte\r
 613 odm_Cfo(\r
 614   IN s1Byte Value\r
 615 )\r
 616 {\r
 617         s2Byte  ret_val;\r
 618 \r
 619         if (Value < 0)\r
 620         {\r
 621                 ret_val = 0 - Value;\r
 622                 ret_val = (ret_val << 1) + (ret_val >> 1) ;  //  *2.5~=312.5/2^7\r
 623                 ret_val = ret_val | BIT12;  // set bit12 as 1 for negative cfo\r
 624         }\r
 625         else\r
 626         {\r
 627                 ret_val = Value;\r
 628                 ret_val = (ret_val << 1) + (ret_val>>1) ;  //  *2.5~=312.5/2^7\r
 629         }\r
 630         return ret_val;\r
 631 }\r
 632 \r
 633 \r
 634 VOID\r
 635 odm_RxPhyStatus92CSeries_Parsing(\r
 636         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
 637         OUT             PODM_PHY_INFO_T                 pPhyInfo,               \r
 638         IN              pu1Byte                                         pPhyStatus,\r
 639         IN              PODM_PACKET_INFO_T                      pPktinfo\r
 640         )\r
 641 {                                                       \r
 642         SWAT_T                          *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;\r
 643         u1Byte                          i, Max_spatial_stream;\r
 644         s1Byte                          rx_pwr[4], rx_pwr_all=0;\r
 645         u1Byte                          EVM, PWDB_ALL = 0, PWDB_ALL_BT;\r
 646         u1Byte                          RSSI, total_rssi=0;\r
 647         BOOLEAN                         isCCKrate=FALSE;        \r
 648         u1Byte                          rf_rx_num = 0;\r
 649         u1Byte                          cck_highpwr = 0;\r
 650         u1Byte                          LNA_idx, VGA_idx;\r
 651         PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;\r
 652 \r
 653         isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
 654         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
 655         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 656 \r
 657 \r
 658         if(isCCKrate)\r
 659         {\r
 660                 u1Byte report;\r
 661                 u1Byte cck_agc_rpt;\r
 662                 \r
 663                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
 664                 // \r
 665                 // (1)Hardware does not provide RSSI for CCK\r
 666                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
 667                 //\r
 668 \r
 669                 //if(pHalData->eRFPowerState == eRfOn)\r
 670                         cck_highpwr = pDM_Odm->bCckHighPower;\r
 671                 //else\r
 672                 //      cck_highpwr = FALSE;\r
 673 \r
 674                 cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;\r
 675                 \r
 676                 //2011.11.28 LukeLee: 88E use different LNA & VGA gain table\r
 677                 //The RSSI formula should be modified according to the gain table\r
 678                 //In 88E, cck_highpwr is always set to 1\r
 679                 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B))\r
 680                 {\r
 681                         LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
 682                         VGA_idx = (cck_agc_rpt & 0x1F); \r
 683                         if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))\r
 684                         {\r
 685                                 switch(LNA_idx)\r
 686                                 {\r
 687                                         case 7:\r
 688                                                 if(VGA_idx <= 27)\r
 689                                                         rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
 690                                                 else\r
 691                                                         rx_pwr_all = -100;\r
 692                                                 break;\r
 693                                         case 6:\r
 694                                                         rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
 695                                                 break;\r
 696                                         case 5:\r
 697                                                         rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
 698                                                 break;\r
 699                                         case 4:\r
 700                                                         rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
 701                                                 break;\r
 702                                         case 3:\r
 703                                                         //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 704                                                         rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 705                                                 break;\r
 706                                         case 2:\r
 707                                                 if(cck_highpwr)\r
 708                                                         rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
 709                                                 else\r
 710                                                         rx_pwr_all = -6+ 2*(5-VGA_idx);\r
 711                                                 break;\r
 712                                         case 1:\r
 713                                                         rx_pwr_all = 8-2*VGA_idx;\r
 714                                                 break;\r
 715                                         case 0:\r
 716                                                         rx_pwr_all = 14-2*VGA_idx;\r
 717                                                 break;\r
 718                                         default:\r
 719                                                 //DbgPrint("CCK Exception default\n");\r
 720                                                 break;\r
 721                                 }\r
 722                                 rx_pwr_all += 6;\r
 723 \r
 724                                 //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
 725                                 if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
 726                                         rx_pwr_all += 10;\r
 727                                 \r
 728                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 729                                 if(cck_highpwr == FALSE)\r
 730                                 {\r
 731                                         if(PWDB_ALL >= 80)\r
 732                                                 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
 733                                         else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
 734                                                 PWDB_ALL += 3;\r
 735                                         if(PWDB_ALL>100)\r
 736                                                 PWDB_ALL = 100;\r
 737                                 }\r
 738                         }\r
 739                         else if(pDM_Odm->SupportICType & (ODM_RTL8723B))\r
 740                         {\r
 741 #if (RTL8723B_SUPPORT == 1)                     \r
 742                                 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);\r
 743                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 744                                 if(PWDB_ALL>100)\r
 745                                         PWDB_ALL = 100; \r
 746 #endif                          \r
 747                         }\r
 748                 }               \r
 749                 else\r
 750                 {\r
 751                         if(!cck_highpwr)\r
 752                         {                       \r
 753                                 report =( cck_agc_rpt & 0xc0 )>>6;\r
 754                                 switch(report)\r
 755                                 {\r
 756                                         // 03312009 modified by cosa\r
 757                                         // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion\r
 758                                         // Note: different RF with the different RNA gain.\r
 759                                         case 0x3:\r
 760                                                 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);\r
 761                                                 break;\r
 762                                         case 0x2:\r
 763                                                 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);\r
 764                                                 break;\r
 765                                         case 0x1:\r
 766                                                 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);\r
 767                                                 break;\r
 768                                         case 0x0:\r
 769                                                 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);\r
 770                                                 break;\r
 771                                 }\r
 772                         }\r
 773                         else\r
 774                         {\r
 775                                 //report = pDrvInfo->cfosho[0] & 0x60;                  \r
 776                                 //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;\r
 777                                 \r
 778                                 report = (cck_agc_rpt & 0x60)>>5;\r
 779                                 switch(report)\r
 780                                 {\r
 781                                         case 0x3:\r
 782                                                 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 783                                                 break;\r
 784                                         case 0x2:\r
 785                                                 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);\r
 786                                                 break;\r
 787                                         case 0x1:\r
 788                                                 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 789                                                 break;\r
 790                                         case 0x0:\r
 791                                                 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 792                                                 break;\r
 793                                 }\r
 794                         }\r
 795 \r
 796                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 797 \r
 798                         //Modification for ext-LNA board\r
 799                         if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
 800                         {\r
 801                                 if((cck_agc_rpt>>7) == 0){\r
 802                                         PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);\r
 803                                 }\r
 804                                 else    \r
 805                            {\r
 806                                         if(PWDB_ALL > 38)\r
 807                                                 PWDB_ALL -= 16;\r
 808                                         else\r
 809                                                 PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);\r
 810                                 }             \r
 811 \r
 812                                 //CCK modification\r
 813                                 if(PWDB_ALL > 25 && PWDB_ALL <= 60)\r
 814                                         PWDB_ALL += 6;\r
 815                                 //else if (PWDB_ALL <= 25)\r
 816                                 //      PWDB_ALL += 8;\r
 817                         }\r
 818                         else//Modification for int-LNA board\r
 819                         {\r
 820                                 if(PWDB_ALL > 99)\r
 821                                         PWDB_ALL -= 8;\r
 822                                 else if(PWDB_ALL > 50 && PWDB_ALL <= 68)\r
 823                                         PWDB_ALL += 4;\r
 824                         }\r
 825                 }\r
 826         \r
 827                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
 828 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 829                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
 830                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
 831 #endif          \r
 832                 //\r
 833                 // (3) Get Signal Quality (EVM)\r
 834                 //\r
 835                 //if(pPktinfo->bPacketMatchBSSID)\r
 836                 {\r
 837                         u1Byte  SQ,SQ_rpt;                      \r
 838                         \r
 839                         if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 840                                 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
 841                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 842                         }\r
 843                         else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 844                                 (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
 845                         {\r
 846                                 SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 847                         }\r
 848                         else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
 849                                 SQ = 100;\r
 850                         }\r
 851                         else{                                           \r
 852                                 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;\r
 853                                         \r
 854                                 if(SQ_rpt > 64)\r
 855                                         SQ = 0;\r
 856                                 else if (SQ_rpt < 20)\r
 857                                         SQ = 100;\r
 858                                 else\r
 859                                         SQ = ((64-SQ_rpt) * 100) / 44;\r
 860                         \r
 861                         }\r
 862                         \r
 863                         //DbgPrint("cck SQ = %d\n", SQ);\r
 864                         pPhyInfo->SignalQuality = SQ;\r
 865                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
 866                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 867                 }\r
 868         }\r
 869         else //is OFDM rate\r
 870         {\r
 871                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
 872 \r
 873                 // \r
 874                 // (1)Get RSSI for HT rate\r
 875                 //\r
 876                 \r
 877          for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
 878                 {\r
 879                         // 2008/01/30 MH we will judge RF RX path now.\r
 880                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
 881                                 rf_rx_num++;\r
 882                         //else\r
 883                                 //continue;\r
 884 \r
 885                         rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;\r
 886 \r
 887 \r
 888                 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
 889                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
 890                 #endif  \r
 891 \r
 892                         /* Translate DBM to percentage. */\r
 893                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);\r
 894                         total_rssi += RSSI;\r
 895                         //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
 896 \r
 897                         //Modification for ext-LNA board\r
 898                         if(pDM_Odm->SupportICType&ODM_RTL8192C)\r
 899                         {       \r
 900                                 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
 901                                 {\r
 902                                         if((pPhyStaRpt->path_agc[i].trsw) == 1)\r
 903                                                 RSSI = (RSSI>94)?100:(RSSI +6);\r
 904                                         else\r
 905                                                 RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);\r
 906 \r
 907                                         if((RSSI <= 34) && (RSSI >=4))\r
 908                                                 RSSI -= 4;\r
 909                                 }               \r
 910                         }\r
 911                 \r
 912                         pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
 913 \r
 914                 #if (DM_ODM_SUPPORT_TYPE &  (/*ODM_WIN|*/ODM_CE|ODM_AP|ODM_ADSL))\r
 915                         //Get Rx snr value in DB                \r
 916                         pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);\r
 917                 #endif\r
 918                 \r
 919                         /* Record Signal Strength for next packet */\r
 920                         //if(pPktinfo->bPacketMatchBSSID)\r
 921                         {                               \r
 922                                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 923                                         (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
 924                                 {\r
 925                                         if(i==ODM_RF_PATH_A)\r
 926                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
 927                                 \r
 928                                 }               \r
 929                                 else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 930                                         (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
 931                                 {\r
 932                                         pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);\r
 933                                 }       \r
 934                                 \r
 935                         }\r
 936                 }\r
 937                 \r
 938                 \r
 939                 //\r
 940                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
 941                 //\r
 942                 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110;             \r
 943                 \r
 944                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);  \r
 945                 //RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL));          \r
 946         \r
 947                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
 948                 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
 949         #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 950                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
 951                 pPhyInfo->RxPower = rx_pwr_all;\r
 952                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
 953         #endif\r
 954                 \r
 955                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
 956                         //do nothing    \r
 957                 }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){\r
 958                         //do nothing    \r
 959                 }\r
 960                 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
 961                         //\r
 962                         // (3)EVM of HT rate\r
 963                         //\r
 964                         if(pPktinfo->DataRate >=DESC_RATEMCS8 && pPktinfo->DataRate <=DESC_RATEMCS15)\r
 965                                 Max_spatial_stream = 2; //both spatial stream make sense\r
 966                         else\r
 967                                 Max_spatial_stream = 1; //only spatial stream 1 makes sense\r
 968 \r
 969                         for(i=0; i<Max_spatial_stream; i++)\r
 970                         {\r
 971                                 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
 972                                 // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
 973                                 // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.                        \r
 974                                 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] ));   //dbm\r
 975 \r
 976                                 //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
 977                                 //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));\r
 978                                 \r
 979                                 //if(pPktinfo->bPacketMatchBSSID)\r
 980                                 {\r
 981                                         if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
 982                                         {                                               \r
 983                                                 pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);\r
 984                                         }                                       \r
 985                                         pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff);\r
 986                                 }\r
 987                         }\r
 988                 }\r
 989 \r
 990                 //2 For dynamic ATC switch\r
 991                 if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC)\r
 992                 {\r
 993                         if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0))\r
 994                         {\r
 995                                 // TODO:\r
 996                                 \r
 997                                 //3 Update CFO report for path-A & path-B\r
 998                                  for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
 999                                 {\r
1000                                         pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->path_cfotail[i];\r
1001                                 }\r
1002 \r
1003                                 //3 Update packet counter\r
1004                                 if(pDM_Odm->packetCount == 0xffffffff)\r
1005                                         pDM_Odm->packetCount = 0;\r
1006                                 else\r
1007                                         pDM_Odm->packetCount++;\r
1008                                 \r
1009                                 //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, \r
1010                                         //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1]));\r
1011                         }\r
1012                 }\r
1013                 \r
1014         }\r
1015 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1016         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
1017         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
1018         if(isCCKrate)\r
1019         {               \r
1020 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1021                 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1022                 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
1023 #else\r
1024                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
1025 #endif\r
1026         }\r
1027         else\r
1028         {       \r
1029                 if (rf_rx_num != 0)\r
1030                 {                       \r
1031 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1032                         // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1033                         pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
1034 #else\r
1035                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
1036 #endif\r
1037                 }\r
1038         }\r
1039 #endif\r
1040 \r
1041         //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", \r
1042                 //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);\r
1043 \r
1044         //For 92C/92D HW (Hybrid) Antenna Diversity\r
1045 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))       \r
1046         pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;\r
1047         //For 88E HW Antenna Diversity\r
1048         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;\r
1049         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;\r
1050         pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;\r
1051 #endif\r
1052 }\r
1053 \r
1054 #if     ODM_IC_11AC_SERIES_SUPPORT\r
1055 \r
1056 VOID\r
1057 odm_RxPhyStatusJaguarSeries_Parsing(\r
1058         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1059         OUT             PODM_PHY_INFO_T                 pPhyInfo,               \r
1060         IN              pu1Byte                                         pPhyStatus,\r
1061         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1062         )\r
1063 {                                                       \r
1064         u1Byte                          i, Max_spatial_stream;\r
1065         s1Byte                          rx_pwr[4], rx_pwr_all=0;\r
1066         u1Byte                          EVM = 0, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
1067         u1Byte                          RSSI, total_rssi=0;\r
1068         u1Byte                          isCCKrate=0;    \r
1069         u1Byte                          rf_rx_num = 0;\r
1070         u1Byte                          cck_highpwr = 0;\r
1071         u1Byte                          LNA_idx, VGA_idx;\r
1072 \r
1073         \r
1074         PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; \r
1075 \r
1076         if(pPktinfo->DataRate <= DESC_RATE54M)\r
1077         {\r
1078                 switch(pPhyStaRpt->r_RFMOD){\r
1079                         case 1:\r
1080                                 if(pPhyStaRpt->sub_chnl == 0)\r
1081                                         pPhyInfo->BandWidth = 1;\r
1082                                 else\r
1083                                         pPhyInfo->BandWidth = 0;\r
1084                                 break;\r
1085 \r
1086                         case 2:\r
1087                                 if(pPhyStaRpt->sub_chnl == 0)\r
1088                                         pPhyInfo->BandWidth = 2;\r
1089                                 else if(pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
1090                                         pPhyInfo->BandWidth = 1;\r
1091                                 else \r
1092                                         pPhyInfo->BandWidth = 0;\r
1093                                 break;\r
1094 \r
1095                         default:        case 0:\r
1096                                 pPhyInfo->BandWidth = 0;\r
1097                                 break;                  \r
1098                 }       \r
1099         }\r
1100 \r
1101         if(pPktinfo->DataRate <= DESC_RATE11M)\r
1102                 isCCKrate = TRUE;\r
1103         else\r
1104                 isCCKrate = FALSE;\r
1105         \r
1106         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
1107         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
1108 \r
1109 \r
1110         if(isCCKrate)\r
1111         {\r
1112                 u1Byte cck_agc_rpt;\r
1113                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
1114                 // \r
1115                 // (1)Hardware does not provide RSSI for CCK\r
1116                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
1117                 //\r
1118 \r
1119                 //if(pHalData->eRFPowerState == eRfOn)\r
1120                         cck_highpwr = pDM_Odm->bCckHighPower;\r
1121                 //else\r
1122                 //      cck_highpwr = FALSE;\r
1123 \r
1124                 cck_agc_rpt =  pPhyStaRpt->cfosho[0] ;\r
1125                 \r
1126                 LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
1127                 VGA_idx = (cck_agc_rpt & 0x1F); \r
1128                 if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1129                 {\r
1130                         switch(LNA_idx)\r
1131                         {\r
1132                                 case 7:\r
1133                                         if(VGA_idx <= 27)\r
1134                                                 rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
1135                                         else\r
1136                                                 rx_pwr_all = -100;\r
1137                                         break;\r
1138                                 case 6:\r
1139                                                 rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
1140                                         break;\r
1141                                 case 5:\r
1142                                                 rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
1143                                         break;\r
1144                                 case 4:\r
1145                                                 rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
1146                                         break;\r
1147                                 case 3:\r
1148                                                 //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
1149                                                 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
1150                                         break;\r
1151                                 case 2:\r
1152                                         if(cck_highpwr)\r
1153                                                 rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
1154                                         else\r
1155                                                 rx_pwr_all = -6+ 2*(5-VGA_idx);\r
1156                                         break;\r
1157                                 case 1:\r
1158                                                 rx_pwr_all = 8-2*VGA_idx;\r
1159                                         break;\r
1160                                 case 0:\r
1161                                                 rx_pwr_all = 14-2*VGA_idx;\r
1162                                         break;\r
1163                                 default:\r
1164                                         //DbgPrint("CCK Exception default\n");\r
1165                                         break;\r
1166                         }\r
1167                         rx_pwr_all += 6;\r
1168                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1169                         if(cck_highpwr == FALSE)\r
1170                         {\r
1171                                 if(PWDB_ALL >= 80)\r
1172                                         PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
1173                                 else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
1174                                         PWDB_ALL += 3;\r
1175                                 if(PWDB_ALL>100)\r
1176                                         PWDB_ALL = 100;\r
1177                         }\r
1178                 }\r
1179                 else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
1180                 {\r
1181                         s1Byte Pout = -6;\r
1182                                 \r
1183                         switch(LNA_idx)\r
1184                                 {\r
1185                                 case 5:\r
1186                                         rx_pwr_all = Pout -32 -(2*VGA_idx);\r
1187                                                 break;\r
1188                                 case 4:\r
1189                                         rx_pwr_all = Pout -24 -(2*VGA_idx);\r
1190                                                 break;\r
1191                                 case 2:\r
1192                                         rx_pwr_all = Pout -11 -(2*VGA_idx);\r
1193                                                 break;\r
1194                                 case 1:\r
1195                                         rx_pwr_all = Pout + 5 -(2*VGA_idx);\r
1196                                                 break;\r
1197                                 case 0:\r
1198                                         rx_pwr_all = Pout + 21 -(2*VGA_idx);\r
1199                                                 break;\r
1200                                 }\r
1201                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1202                 }\r
1203         \r
1204                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1205                 //if(pPktinfo->StationID == 0)\r
1206                 //{\r
1207                 //      DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n", \r
1208                 //              LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);\r
1209                 //}\r
1210 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1211                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
1212                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1213 #endif          \r
1214                 //\r
1215                 // (3) Get Signal Quality (EVM)\r
1216                 //\r
1217                 //if(pPktinfo->bPacketMatchBSSID)\r
1218                 {\r
1219                         u1Byte  SQ,SQ_rpt;                      \r
1220                         \r
1221                         if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1222                                 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
1223                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
1224                         }\r
1225                         else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
1226                                 SQ = 100;\r
1227                         }\r
1228                         else{                                           \r
1229                                 SQ_rpt = pPhyStaRpt->pwdb_all;\r
1230                                         \r
1231                                 if(SQ_rpt > 64)\r
1232                                         SQ = 0;\r
1233                                 else if (SQ_rpt < 20)\r
1234                                         SQ = 100;\r
1235                                 else\r
1236                                         SQ = ((64-SQ_rpt) * 100) / 44;\r
1237                         \r
1238                         }\r
1239                         \r
1240                         //DbgPrint("cck SQ = %d\n", SQ);\r
1241                         pPhyInfo->SignalQuality = SQ;\r
1242                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
1243                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
1244                 }\r
1245         }\r
1246         else //is OFDM rate\r
1247         {\r
1248                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
1249 \r
1250                 // \r
1251                 // (1)Get RSSI for OFDM rate\r
1252                 //\r
1253                 \r
1254                 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
1255                 {\r
1256                         // 2008/01/30 MH we will judge RF RX path now.\r
1257                         //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);\r
1258                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
1259                         {                               \r
1260                                 rf_rx_num++;\r
1261                         }\r
1262                         //else\r
1263                                 //continue;\r
1264                         //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
1265                         //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
1266                                 rx_pwr[i] = (pPhyStaRpt->gain_trsw[i]&0x7F) - 110;\r
1267                         //else\r
1268                         //      rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110;  //OLD FORMULA\r
1269 \r
1270                 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
1271                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
1272                 #endif  \r
1273 \r
1274                         /* Translate DBM to percentage. */\r
1275                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);     \r
1276                 \r
1277                         total_rssi += RSSI;\r
1278                         //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
1279 \r
1280 \r
1281                 \r
1282                         pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
1283 \r
1284                 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE|ODM_AP|ODM_ADSL))\r
1285                         //Get Rx snr value in DB                \r
1286                         pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i]/2;\r
1287                 #endif\r
1288 \r
1289                         //\r
1290                         // (2) CFO_short  & CFO_tail\r
1291                         //                      \r
1292                         pPhyInfo->Cfo_short[i] = odm_Cfo( (pPhyStaRpt->cfosho[i]) );\r
1293                         pPhyInfo->Cfo_tail[i] = odm_Cfo( (pPhyStaRpt->cfotail[i]) );\r
1294 \r
1295                         /* Record Signal Strength for next packet */\r
1296                         //if(pPktinfo->bPacketMatchBSSID)\r
1297                         {                               \r
1298                                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1299                                         (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
1300                                 {\r
1301                                         if(i==ODM_RF_PATH_A)\r
1302                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
1303                                 \r
1304                                 }\r
1305                         }\r
1306                 }\r
1307                 \r
1308                 \r
1309                 //\r
1310                 // (3)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
1311                 //\r
1312                 //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
1313                 if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
1314                         rx_pwr_all = (pPhyStaRpt->pwdb_all& 0x7f) -110;\r
1315                 else\r
1316                         rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1 )& 0x7f) -110;        //OLD FORMULA\r
1317 \r
1318 \r
1319                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);  \r
1320                         \r
1321         \r
1322                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1323                 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
1324         #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1325                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
1326                 pPhyInfo->RxPower = rx_pwr_all;\r
1327                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1328         #endif\r
1329 \r
1330                 //DbgPrint("OFDM: pPhyInfo->RxPWDBAll = %d, pPhyInfo->RxMIMOSignalStrength[0] = %d, pPhyInfo->RxMIMOSignalStrength[1] = %d\n",\r
1331                 //      pPhyInfo->RxPWDBAll, pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1]);\r
1332         \r
1333         \r
1334                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
1335                         //do nothing    \r
1336                 }\r
1337                 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
1338                         //\r
1339                         // (4)EVM of OFDM rate\r
1340                         //\r
1341                         if(     (pPktinfo->DataRate>=DESC_RATEMCS8) &&\r
1342                                 (pPktinfo->DataRate <=DESC_RATEMCS15))\r
1343                                 Max_spatial_stream = 2;\r
1344                         else if(        (pPktinfo->DataRate>=DESC_RATEVHTSS2MCS0) &&\r
1345                                 (pPktinfo->DataRate <=DESC_RATEVHTSS2MCS9))\r
1346                                 Max_spatial_stream = 2;\r
1347                         else\r
1348                                 Max_spatial_stream = 1; \r
1349 \r
1350                         //if(pPktinfo->bPacketMatchBSSID)\r
1351                         {\r
1352                                 //DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);\r
1353 \r
1354                                 for(i=0; i<Max_spatial_stream; i++)\r
1355                                 {\r
1356                                         // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
1357                                         // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
1358                                         // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.                        \r
1359                                         //\r
1360                                         // 2013/09/02 MH According to 8812AU test, when use RX evm the value sometimes\r
1361                                         // will be incorrect and 1SS-MCS-0-7 always incorrect. Only use LSIG the evm value\r
1362                                         // seems ok. This seems BB bug, we need use another way to display better SQ.\r
1363                                         //\r
1364                                         //if (pPktinfo->DataRate>=DESC8812_RATE6M && pPktinfo->DataRate<=DESC8812_RATE54M)\r
1365                                         {\r
1366                                                 \r
1367                                                 if(i==ODM_RF_PATH_A )\r
1368                                                 {\r
1369                                                         EVM = odm_EVMdbToPercentage( (pPhyStaRpt->sigevm ));    //dbm\r
1370                                                         EVM += 20;\r
1371                                                         if (EVM > 100)\r
1372                                                                 EVM = 100;\r
1373                                                 }\r
1374                                         }\r
1375 #if 0\r
1376                                         else\r
1377                                         {\r
1378                                                 if (pPhyStaRpt->rxevm[i] == -128)\r
1379                                                 {\r
1380                                                         pPhyStaRpt->rxevm[i] = -25;\r
1381                                                 }\r
1382                                                 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->rxevm[i] ));  //dbm\r
1383                                         }\r
1384 #endif\r
1385                                         EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
1386                                         //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
1387                                         //pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));\r
1388                                         \r
1389                                         \r
1390                                         {\r
1391                                                 if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
1392                                                 {\r
1393                                                         pPhyInfo->SignalQuality = EVM;\r
1394                                                 }                                       \r
1395                                                 pPhyInfo->RxMIMOSignalQuality[i] = EVM;\r
1396                                                 pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;\r
1397                                         }\r
1398                                 }\r
1399                         }\r
1400                 }\r
1401                 //2 For dynamic ATC switch\r
1402                 if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC)\r
1403                 {\r
1404                         if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0) )\r
1405                         {\r
1406                                 //3 Update CFO report for path-A & path-B\r
1407                                  for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
1408                                 {\r
1409                                         pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->cfotail[i];\r
1410                                 }\r
1411 \r
1412                                 //3 Update packet counter\r
1413                                 if(pDM_Odm->packetCount == 0xffffffff)\r
1414                                         pDM_Odm->packetCount = 0;\r
1415                                 else\r
1416                                         pDM_Odm->packetCount++;\r
1417                                 \r
1418                                 //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, \r
1419                                         //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1]));\r
1420                         }\r
1421                 }\r
1422         }\r
1423         //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);\r
1424         \r
1425 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1426         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
1427         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
1428         if(isCCKrate)\r
1429         {               \r
1430 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1431                 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1432                 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
1433 #else\r
1434                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
1435 #endif\r
1436         }\r
1437         else\r
1438         {       \r
1439                 if (rf_rx_num != 0)\r
1440                 {                       \r
1441 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1442                         // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1443                         pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
1444 #else\r
1445                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
1446 #endif\r
1447                 }\r
1448         }\r
1449 #endif\r
1450         pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;\r
1451         \r
1452         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;\r
1453         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;\r
1454 \r
1455         //DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d, pPhyStaRpt->resvd_1 = %d", \r
1456         //      pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb, pPhyStaRpt->resvd_1);\r
1457 \r
1458         //DbgPrint("----------------------------\n");\r
1459         //DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);\r
1460         //DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x, pPhyStaRpt->pwdb_all=0x%x\n",\r
1461         //                      pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1], pPhyStaRpt->pwdb_all);\r
1462         //DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",\r
1463         //                      pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);\r
1464 \r
1465 }\r
1466 \r
1467 #endif\r
1468 \r
1469 VOID\r
1470 odm_Init_RSSIForDM(\r
1471         IN OUT  PDM_ODM_T       pDM_Odm\r
1472         )\r
1473 {\r
1474 \r
1475 }\r
1476 \r
1477 VOID\r
1478 odm_Process_RSSIForDM(  \r
1479         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1480         IN              PODM_PHY_INFO_T                         pPhyInfo,\r
1481         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1482         )\r
1483 {\r
1484         \r
1485         s4Byte                  UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;\r
1486         u1Byte                  isCCKrate=0;    \r
1487         u1Byte                  RSSI_max, RSSI_min, i;\r
1488         u4Byte                  OFDM_pkt=0; \r
1489         u4Byte                  Weighting=0;\r
1490         PSTA_INFO_T             pEntry;\r
1491 \r
1492 \r
1493         if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
1494                 return;\r
1495 \r
1496         //\r
1497         // 2012/05/30 MH/Luke.Lee Add some description \r
1498         // In windows driver: AP/IBSS mode STA\r
1499         //\r
1500         //if (pDM_Odm->SupportPlatform == ODM_WIN)\r
1501         //{\r
1502         //      pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]];                        \r
1503         //}\r
1504         //else\r
1505                 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];                                                    \r
1506 \r
1507         if(!IS_STA_VALID(pEntry) ){             \r
1508                 return;\r
1509         }\r
1510         if((!pPktinfo->bPacketMatchBSSID) )\r
1511         {\r
1512                 return;\r
1513         }\r
1514 \r
1515         if(pPktinfo->bPacketBeacon)\r
1516                 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
1517         \r
1518         isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
1519         pDM_Odm->RxRate = pPktinfo->DataRate;\r
1520         /*\r
1521         if(!isCCKrate)\r
1522         {\r
1523                 DbgPrint("OFDM: pPktinfo->StationID=%d, isCCKrate=%d, pPhyInfo->RxPWDBAll=%d\n",\r
1524                         pPktinfo->StationID, isCCKrate, pPhyInfo->RxPWDBAll);\r
1525         }\r
1526         */\r
1527 \r
1528         //--------------Statistic for antenna/path diversity------------------\r
1529         if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)\r
1530         {\r
1531                 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))\r
1532                         ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);\r
1533                 #endif\r
1534         }\r
1535         else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)\r
1536         {\r
1537                 #if (RTL8812A_SUPPORT == 1)\r
1538                 if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1539                 {\r
1540                         pPATHDIV_T      pDM_PathDiv = &pDM_Odm->DM_PathDiv;\r
1541                         if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID)\r
1542                         {\r
1543                                 if(pPktinfo->DataRate > DESC_RATE11M)\r
1544                                         ODM_PathStatistics_8812A(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A], \r
1545                                                                                                                                               pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);\r
1546                         }\r
1547                 }\r
1548                 #endif\r
1549         }\r
1550 \r
1551         //-----------------Smart Antenna Debug Message------------------//\r
1552         \r
1553         UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;\r
1554         UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;\r
1555         UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;    \r
1556         \r
1557         if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)\r
1558         {\r
1559 \r
1560                 if(!isCCKrate)//ofdm rate\r
1561                 {\r
1562                         if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){\r
1563                                 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1564                                 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1565                                 pDM_Odm->RSSI_B = 0;\r
1566                         }\r
1567                         else\r
1568                         {\r
1569                                 //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", \r
1570                                         //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);\r
1571                                 pDM_Odm->RSSI_A =  pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1572                                 pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1573                         \r
1574                                 if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B])\r
1575                                 {\r
1576                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1577                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1578                                 }\r
1579                                 else\r
1580                                 {\r
1581                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1582                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1583                                 }\r
1584                                 if((RSSI_max -RSSI_min) < 3)\r
1585                                         RSSI_Ave = RSSI_max;\r
1586                                 else if((RSSI_max -RSSI_min) < 6)\r
1587                                         RSSI_Ave = RSSI_max - 1;\r
1588                                 else if((RSSI_max -RSSI_min) < 10)\r
1589                                         RSSI_Ave = RSSI_max - 2;\r
1590                                 else\r
1591                                         RSSI_Ave = RSSI_max - 3;\r
1592                         }\r
1593                                         \r
1594                         //1 Process OFDM RSSI\r
1595                         if(UndecoratedSmoothedOFDM <= 0)        // initialize\r
1596                         {\r
1597                                 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;\r
1598                         }\r
1599                         else\r
1600                         {\r
1601                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)\r
1602                                 {\r
1603                                         UndecoratedSmoothedOFDM =       \r
1604                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1605                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1606                                         UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;\r
1607                                 }\r
1608                                 else\r
1609                                 {\r
1610                                         UndecoratedSmoothedOFDM =       \r
1611                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1612                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1613                                 }\r
1614                         }                               \r
1615                         \r
1616                         pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;                  \r
1617                                                                                 \r
1618                 }\r
1619                 else\r
1620                 {\r
1621                         RSSI_Ave = pPhyInfo->RxPWDBAll;\r
1622                         pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll;\r
1623                         pDM_Odm->RSSI_B = 0;\r
1624 \r
1625                         //1 Process CCK RSSI\r
1626                         if(UndecoratedSmoothedCCK <= 0) // initialize\r
1627                         {\r
1628                                 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;\r
1629                         }\r
1630                         else\r
1631                         {\r
1632                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)\r
1633                                 {\r
1634                                         UndecoratedSmoothedCCK =        \r
1635                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1636                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1637                                         UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;\r
1638                                 }\r
1639                                 else\r
1640                                 {\r
1641                                         UndecoratedSmoothedCCK =        \r
1642                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1643                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1644                                 }\r
1645                         }\r
1646                         pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;                   \r
1647                 }\r
1648 \r
1649                 //if(pEntry)\r
1650                 {\r
1651                         //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI\r
1652                         if(pEntry->rssi_stat.ValidBit >= 64)\r
1653                                 pEntry->rssi_stat.ValidBit = 64;\r
1654                         else\r
1655                                 pEntry->rssi_stat.ValidBit++;\r
1656                         \r
1657                         for(i=0; i<pEntry->rssi_stat.ValidBit; i++)\r
1658                                 OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0;\r
1659                         \r
1660                         if(pEntry->rssi_stat.ValidBit == 64)\r
1661                         {\r
1662                                 Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);\r
1663                                 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;\r
1664                         }\r
1665                         else\r
1666                         {\r
1667                                 if(pEntry->rssi_stat.ValidBit != 0)\r
1668                                         UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;\r
1669                                 else\r
1670                                         UndecoratedSmoothedPWDB = 0;\r
1671                         }\r
1672 \r
1673                         pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;\r
1674                         pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;\r
1675                         pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;\r
1676 \r
1677                         //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting);\r
1678                         //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", \r
1679                         //      UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK);\r
1680                         \r
1681                 }\r
1682         \r
1683         }\r
1684 }\r
1685 \r
1686 \r
1687 //\r
1688 // Endianness before calling this API\r
1689 //\r
1690 VOID\r
1691 ODM_PhyStatusQuery_92CSeries(\r
1692         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1693         OUT             PODM_PHY_INFO_T                         pPhyInfo,\r
1694         IN              pu1Byte                                         pPhyStatus,     \r
1695         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1696         )\r
1697 {\r
1698         \r
1699         odm_RxPhyStatus92CSeries_Parsing(\r
1700                                                         pDM_Odm,\r
1701                                                         pPhyInfo,\r
1702                                                         pPhyStatus,\r
1703                                                         pPktinfo);\r
1704 \r
1705         if( pDM_Odm->RSSI_test == TRUE)\r
1706         {\r
1707                 // Select the packets to do RSSI checking for antenna switching.\r
1708                 if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon )\r
1709                 {\r
1710                                 /*\r
1711                         #if 0//(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1712                         dm_SWAW_RSSI_Check(\r
1713                                 Adapter, \r
1714                                 (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE,\r
1715                                 bPacketMatchBSSID,\r
1716                                 pEntry,\r
1717                                 pRfd);\r
1718                         #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
1719                         // Select the packets to do RSSI checking for antenna switching.\r
1720                         //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);\r
1721                         #endif\r
1722                                 */\r
1723                                 ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo);\r
1724                 }       \r
1725         }\r
1726         else\r
1727         {\r
1728                 odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
1729         }\r
1730         \r
1731 }\r
1732 \r
1733 \r
1734 \r
1735 //\r
1736 // Endianness before calling this API\r
1737 //\r
1738 VOID\r
1739 ODM_PhyStatusQuery_JaguarSeries(\r
1740         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1741         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1742         IN              pu1Byte                                         pPhyStatus,     \r
1743         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1744         )\r
1745 {\r
1746         odm_RxPhyStatusJaguarSeries_Parsing(\r
1747                                                         pDM_Odm,\r
1748                                                         pPhyInfo,\r
1749                                                         pPhyStatus,\r
1750                                                         pPktinfo);\r
1751         \r
1752         odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
1753 }\r
1754 \r
1755 VOID\r
1756 ODM_PhyStatusQuery(\r
1757         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1758         OUT             PODM_PHY_INFO_T                         pPhyInfo,\r
1759         IN              pu1Byte                                         pPhyStatus,     \r
1760         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1761         )\r
1762 {\r
1763 \r
1764         if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )\r
1765         {\r
1766                 ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
1767         }\r
1768         else\r
1769         {\r
1770                 ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
1771         }\r
1772 }\r
1773         \r
1774 // For future use.\r
1775 VOID\r
1776 ODM_MacStatusQuery(\r
1777         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1778         IN              pu1Byte                                         pMacStatus,\r
1779         IN              u1Byte                                          MacID,  \r
1780         IN              BOOLEAN                                         bPacketMatchBSSID,\r
1781         IN              BOOLEAN                                         bPacketToSelf,\r
1782         IN              BOOLEAN                                         bPacketBeacon\r
1783         )\r
1784 {\r
1785         // 2011/10/19 Driver team will handle in the future.\r
1786         \r
1787 }\r
1788 \r
1789 \r
1790 //\r
1791 // If you want to add a new IC, Please follow below template and generate a new one.\r
1792 // \r
1793 //\r
1794 \r
1795 HAL_STATUS\r
1796 ODM_ConfigRFWithHeaderFile(\r
1797         IN      PDM_ODM_T                       pDM_Odm,\r
1798         IN      ODM_RF_Config_Type              ConfigType,\r
1799         IN      ODM_RF_RADIO_PATH_E     eRFPath\r
1800     )\r
1801 {\r
1802         PADAPTER                Adapter = pDM_Odm->Adapter;\r
1803 \r
1804    ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1805                                 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1806     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1807                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
1808                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
1809 \r
1810 #if (RTL8723A_SUPPORT == 1)\r
1811         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
1812         {\r
1813                 if(ConfigType == CONFIG_RF_RADIO) {\r
1814                         if(eRFPath == ODM_RF_PATH_A)\r
1815                                 READ_AND_CONFIG_MP(8723A,_RadioA_1T);\r
1816                 }\r
1817         }\r
1818 #endif\r
1819 \r
1820 #if (RTL8188E_SUPPORT == 1)\r
1821         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
1822         {\r
1823                 if(ConfigType == CONFIG_RF_RADIO) {\r
1824                         if(eRFPath == ODM_RF_PATH_A){\r
1825                                 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))\r
1826                                         READ_AND_CONFIG(8188E,_RadioA_1T_ICUT);\r
1827                                 else\r
1828                                         READ_AND_CONFIG(8188E,_RadioA_1T);\r
1829                                 }\r
1830                 }\r
1831                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1832                         READ_AND_CONFIG(8188E,_TXPWR_LMT);\r
1833                 }\r
1834         }\r
1835 #endif\r
1836 \r
1837 #if (RTL8812A_SUPPORT == 1)\r
1838         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
1839         {\r
1840                 if(ConfigType == CONFIG_RF_RADIO) {\r
1841                         if(eRFPath == ODM_RF_PATH_A)\r
1842                         {\r
1843                                 READ_AND_CONFIG(8812A,_RadioA);\r
1844                         }\r
1845                         else if(eRFPath == ODM_RF_PATH_B)\r
1846                         {\r
1847                                 READ_AND_CONFIG(8812A,_RadioB);\r
1848                         }\r
1849                 }\r
1850                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1851                         READ_AND_CONFIG(8812A,_TXPWR_LMT);\r
1852                 }\r
1853         }\r
1854 #endif\r
1855 \r
1856 #if (RTL8821A_SUPPORT == 1)\r
1857         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
1858         {\r
1859                 if(ConfigType == CONFIG_RF_RADIO) {\r
1860                         if(eRFPath == ODM_RF_PATH_A)\r
1861                         {\r
1862                                 READ_AND_CONFIG(8821A,_RadioA);\r
1863                         }\r
1864                 }\r
1865                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1866                         \r
1867                         if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
1868                                 if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)\r
1869                                         READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_FEM);\r
1870                                 else\r
1871                                         READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_IPA);                           \r
1872                         } else {\r
1873                                 READ_AND_CONFIG(8821A,_TXPWR_LMT_8821A);                        \r
1874                         }\r
1875                 }\r
1876                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));\r
1877         }\r
1878 #endif\r
1879 \r
1880 #if (RTL8723B_SUPPORT == 1)\r
1881         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
1882         {\r
1883                 if(ConfigType == CONFIG_RF_RADIO) {\r
1884                         READ_AND_CONFIG(8723B,_RadioA);\r
1885                 }\r
1886                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1887                         READ_AND_CONFIG(8723B,_TXPWR_LMT);\r
1888                 }\r
1889         }\r
1890 #endif\r
1891 \r
1892 #if (RTL8192E_SUPPORT == 1)\r
1893         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
1894         {\r
1895                 if(ConfigType == CONFIG_RF_RADIO) {\r
1896                         if(eRFPath == ODM_RF_PATH_A)\r
1897                                 READ_AND_CONFIG(8192E,_RadioA);\r
1898                         else if(eRFPath == ODM_RF_PATH_B)\r
1899                                 READ_AND_CONFIG(8192E,_RadioB);\r
1900                 }\r
1901                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1902                         READ_AND_CONFIG(8192E,_TXPWR_LMT);\r
1903                 }\r
1904         }\r
1905 #endif\r
1906 \r
1907 #if (RTL8813A_SUPPORT == 1)\r
1908         if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
1909         {\r
1910                 /*\r
1911                 if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1912                         READ_AND_CONFIG(8813A,_TXPWR_LMT);\r
1913                 }\r
1914                 */              \r
1915         }\r
1916 #endif\r
1917         \r
1918         return HAL_STATUS_SUCCESS;\r
1919 }\r
1920 \r
1921 HAL_STATUS\r
1922 ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
1923         IN      PDM_ODM_T                       pDM_Odm\r
1924     )\r
1925 {\r
1926         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1927                                  ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1928         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1929                                  ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
1930                                  pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
1931 \r
1932         if(0)\r
1933         {\r
1934         }\r
1935 #if (RTL8821A_SUPPORT == 1) \r
1936         else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
1937         {\r
1938                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1939                         READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE);\r
1940                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1941                         READ_AND_CONFIG(8821A,_TxPowerTrack_USB);\r
1942                 else\r
1943                         READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE);\r
1944         }\r
1945 #endif\r
1946 #if (RTL8812A_SUPPORT == 1)\r
1947         else if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1948         {\r
1949                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1950                         READ_AND_CONFIG(8812A,_TxPowerTrack_PCIE);\r
1951                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
1952                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
1953                                 READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3);   \r
1954                         else\r
1955                                 READ_AND_CONFIG(8812A,_TxPowerTrack_USB);       \r
1956                 }\r
1957                 \r
1958         }\r
1959 #endif\r
1960 #if (RTL8192E_SUPPORT == 1) \r
1961         else if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
1962         {\r
1963                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1964                         READ_AND_CONFIG(8192E,_TxPowerTrack_PCIE);\r
1965                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1966                         READ_AND_CONFIG(8192E,_TxPowerTrack_USB); \r
1967         }\r
1968 #endif\r
1969 #if RTL8723B_SUPPORT    \r
1970         else if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
1971         {\r
1972                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1973                         READ_AND_CONFIG(8723B,_TxPowerTrack_PCIE);\r
1974                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1975                         READ_AND_CONFIG(8723B,_TxPowerTrack_USB);\r
1976                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
1977                         READ_AND_CONFIG(8723B,_TxPowerTrack_SDIO);                      \r
1978         }\r
1979 #endif  \r
1980 #if RTL8188E_SUPPORT    \r
1981         else if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
1982         {\r
1983                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1984                         READ_AND_CONFIG(8188E,_TxPowerTrack_PCIE);\r
1985                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1986                         READ_AND_CONFIG(8188E,_TxPowerTrack_USB);\r
1987         }\r
1988 #endif\r
1989 \r
1990         return HAL_STATUS_SUCCESS;\r
1991 }\r
1992 \r
1993 HAL_STATUS\r
1994 ODM_ConfigBBWithHeaderFile(\r
1995         IN      PDM_ODM_T                       pDM_Odm,\r
1996         IN      ODM_BB_Config_Type              ConfigType\r
1997         )\r
1998 {\r
1999 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
2000         PADAPTER                Adapter = pDM_Odm->Adapter;\r
2001 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2002         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);       \r
2003 #endif\r
2004 #endif\r
2005         \r
2006         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2007                                 ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
2008     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2009                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2010                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2011 \r
2012 #if (RTL8723A_SUPPORT == 1) \r
2013     if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
2014         {\r
2015                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2016                 {\r
2017                         READ_AND_CONFIG_MP(8723A,_PHY_REG_1T);\r
2018                 }\r
2019                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2020                 {\r
2021                         READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T);\r
2022                 }\r
2023         }               \r
2024 #endif\r
2025 \r
2026 #if (RTL8188E_SUPPORT == 1)\r
2027     if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
2028         {\r
2029                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2030                 {\r
2031                         if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))\r
2032                                 READ_AND_CONFIG(8188E,_PHY_REG_1T_ICUT);\r
2033                         else\r
2034                                 READ_AND_CONFIG(8188E,_PHY_REG_1T);\r
2035                 }\r
2036                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2037                 {\r
2038                         if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))\r
2039                                 READ_AND_CONFIG(8188E,_AGC_TAB_1T_ICUT);\r
2040                         else\r
2041                                 READ_AND_CONFIG(8188E,_AGC_TAB_1T);\r
2042                 }\r
2043                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2044                 {\r
2045                         READ_AND_CONFIG(8188E,_PHY_REG_PG);\r
2046                 }\r
2047         }\r
2048 #endif\r
2049 \r
2050 #if (RTL8812A_SUPPORT == 1) \r
2051         if(pDM_Odm->SupportICType == ODM_RTL8812)\r
2052         {\r
2053                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2054                 {\r
2055                         READ_AND_CONFIG(8812A,_PHY_REG);\r
2056                 }\r
2057                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2058                 {\r
2059                         READ_AND_CONFIG(8812A,_AGC_TAB);\r
2060                 }\r
2061                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2062                 {\r
2063                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
2064                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);\r
2065 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2066                         else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) \r
2067                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);\r
2068 #endif                  \r
2069                         else\r
2070                                 READ_AND_CONFIG(8812A,_PHY_REG_PG);\r
2071                 }\r
2072                 else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
2073                 {\r
2074                         READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);\r
2075                 }\r
2076                 else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)\r
2077                 {\r
2078                         if ((36 <= *pDM_Odm->pChannel)  && (*pDM_Odm->pChannel  <= 64)) \r
2079                                 AGC_DIFF_CONFIG_MP(8812A,LB);\r
2080                         else if (100 <= *pDM_Odm->pChannel) \r
2081                                 AGC_DIFF_CONFIG_MP(8812A,HB);\r
2082                 }\r
2083         }               \r
2084 #endif\r
2085 \r
2086 #if (RTL8821A_SUPPORT == 1) \r
2087         if(pDM_Odm->SupportICType == ODM_RTL8821)\r
2088         {\r
2089                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2090                 {\r
2091                         READ_AND_CONFIG(8821A,_PHY_REG);\r
2092                 }\r
2093                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2094                 {\r
2095                         READ_AND_CONFIG(8821A,_AGC_TAB);\r
2096                 }\r
2097                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2098                 {\r
2099                         READ_AND_CONFIG(8821A,_PHY_REG_PG);\r
2100                 }\r
2101         }\r
2102 #endif\r
2103 #if (RTL8723B_SUPPORT == 1)\r
2104     if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
2105         {\r
2106 \r
2107                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2108                 {\r
2109                         READ_AND_CONFIG(8723B,_PHY_REG);\r
2110                 }\r
2111                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2112                 {\r
2113                         READ_AND_CONFIG(8723B,_AGC_TAB);\r
2114                 }\r
2115                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2116                 {\r
2117                         READ_AND_CONFIG(8723B,_PHY_REG_PG);\r
2118                 }\r
2119         }\r
2120 #endif\r
2121 #if (RTL8192E_SUPPORT == 1)\r
2122     if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
2123         {\r
2124 \r
2125                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2126                 {\r
2127                         READ_AND_CONFIG(8192E,_PHY_REG);\r
2128                 }\r
2129                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2130                 {\r
2131                         READ_AND_CONFIG(8192E,_AGC_TAB);\r
2132                 }\r
2133                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2134                 {\r
2135                         READ_AND_CONFIG(8192E,_PHY_REG_PG);\r
2136                 }\r
2137         }\r
2138 #endif\r
2139 #if (RTL8813A_SUPPORT == 1)\r
2140     if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
2141         {\r
2142 \r
2143                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2144                 {\r
2145                         READ_AND_CONFIG(8813A,_PHY_REG);\r
2146                 }\r
2147                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2148                 {\r
2149                         READ_AND_CONFIG(8813A,_AGC_TAB);\r
2150                 }\r
2151                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2152                 {\r
2153                         //READ_AND_CONFIG(8813A,_PHY_REG_PG);\r
2154                 }\r
2155         }\r
2156 #endif\r
2157         return HAL_STATUS_SUCCESS; \r
2158 }                 \r
2159 \r
2160 HAL_STATUS\r
2161 ODM_ConfigMACWithHeaderFile(\r
2162         IN      PDM_ODM_T       pDM_Odm\r
2163         )\r
2164 {\r
2165 #if (DM_ODM_SUPPORT_TYPE &  (ODM_CE|ODM_WIN))   \r
2166         PADAPTER                Adapter = pDM_Odm->Adapter;\r
2167 #endif\r
2168         u1Byte result = HAL_STATUS_SUCCESS;\r
2169 \r
2170         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2171                                 ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
2172     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2173                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2174                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2175         \r
2176 #if (RTL8723A_SUPPORT == 1)\r
2177         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
2178         {\r
2179                 READ_AND_CONFIG_MP(8723A,_MAC_REG);\r
2180         }\r
2181 #endif\r
2182 #if (RTL8188E_SUPPORT == 1)  \r
2183         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2184         {\r
2185                 if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))\r
2186                         result = READ_AND_CONFIG(8188E,_MAC_REG_ICUT);\r
2187                 else\r
2188                         result = READ_AND_CONFIG(8188E,_MAC_REG);\r
2189         }\r
2190 #endif\r
2191 #if (RTL8812A_SUPPORT == 1)\r
2192         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2193         {\r
2194                 READ_AND_CONFIG(8812A,_MAC_REG);\r
2195         }\r
2196 #endif\r
2197 #if (RTL8821A_SUPPORT == 1)\r
2198         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2199         {\r
2200                 READ_AND_CONFIG(8821A,_MAC_REG);\r
2201 \r
2202                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));\r
2203         }\r
2204 #endif\r
2205 #if (RTL8723B_SUPPORT == 1)  \r
2206         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2207         {\r
2208                 READ_AND_CONFIG(8723B,_MAC_REG);\r
2209         }\r
2210 #endif\r
2211 #if (RTL8192E_SUPPORT == 1)  \r
2212         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2213         {\r
2214                 READ_AND_CONFIG(8192E,_MAC_REG);\r
2215         }\r
2216 #endif\r
2217 \r
2218         return result;\r
2219 } \r
2220 \r
2221 HAL_STATUS\r
2222 ODM_ConfigFWWithHeaderFile(\r
2223         IN      PDM_ODM_T                       pDM_Odm,\r
2224         IN      ODM_FW_Config_Type      ConfigType,\r
2225         OUT u1Byte                              *pFirmware,\r
2226         OUT u4Byte                              *pSize\r
2227         )\r
2228 {\r
2229 \r
2230 #if (RTL8188E_SUPPORT == 1)  \r
2231         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2232         {\r
2233                 if (ConfigType == CONFIG_FW_NIC)\r
2234                 {\r
2235                         READ_FIRMWARE(8188E,_FW_NIC_T);\r
2236                 }\r
2237                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2238                 {\r
2239                         READ_FIRMWARE(8188E,_FW_WoWLAN_T);\r
2240                 }\r
2241                 else if(ConfigType == CONFIG_FW_NIC_2)\r
2242                 {\r
2243                         READ_FIRMWARE(8188E,_FW_NIC_S);\r
2244                 }\r
2245                 else if (ConfigType == CONFIG_FW_WoWLAN_2)\r
2246                 {\r
2247                         READ_FIRMWARE(8188E,_FW_WoWLAN_S);\r
2248                 }\r
2249         }\r
2250 #endif\r
2251 #if (RTL8723B_SUPPORT == 1)  \r
2252         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2253         {\r
2254                 if (ConfigType == CONFIG_FW_NIC)\r
2255                 {\r
2256                         READ_FIRMWARE(8723B,_FW_NIC);\r
2257                 }\r
2258                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2259                 {\r
2260                         READ_FIRMWARE(8723B,_FW_WoWLAN);\r
2261                 }\r
2262 #ifdef CONFIG_AP_WOWLAN\r
2263                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2264                 {\r
2265                         READ_FIRMWARE(8723B,_FW_AP_WoWLAN);\r
2266                 }\r
2267 #endif\r
2268                 else if (ConfigType == CONFIG_FW_BT)\r
2269                 {\r
2270                         READ_FIRMWARE_MP(8723B,_FW_BT);\r
2271                 }\r
2272                 else if (ConfigType == CONFIG_FW_MP)\r
2273                 {\r
2274                         READ_FIRMWARE_MP(8723B,_FW_MP);\r
2275                 }\r
2276         }\r
2277 #endif\r
2278 #if (RTL8812A_SUPPORT == 1)\r
2279         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2280         {\r
2281                 if (ConfigType == CONFIG_FW_NIC)\r
2282                 {\r
2283                         READ_FIRMWARE(8812A,_FW_NIC);\r
2284                 }\r
2285                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2286                 {\r
2287                         READ_FIRMWARE(8812A,_FW_WoWLAN);\r
2288                 }\r
2289                 else if (ConfigType == CONFIG_FW_BT)\r
2290                 {\r
2291                         READ_FIRMWARE(8812A,_FW_NIC_BT);\r
2292                 }\r
2293 \r
2294         }\r
2295 #endif\r
2296 #if (RTL8821A_SUPPORT == 1)\r
2297         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2298         {\r
2299                 if (ConfigType == CONFIG_FW_NIC)\r
2300                 {\r
2301                         READ_FIRMWARE_MP(8821A,_FW_NIC);\r
2302                 }\r
2303                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2304                 {\r
2305                         READ_FIRMWARE(8821A,_FW_WoWLAN);\r
2306                 }\r
2307                 else if (ConfigType == CONFIG_FW_BT)\r
2308                 {\r
2309                         READ_FIRMWARE_MP(8821A,_FW_NIC_BT);\r
2310                 }\r
2311         }\r
2312 #endif\r
2313 #if (RTL8192E_SUPPORT == 1)\r
2314         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2315         {\r
2316                 if (ConfigType == CONFIG_FW_NIC)\r
2317                 {\r
2318                         READ_FIRMWARE(8192E,_FW_NIC);\r
2319                 }\r
2320                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2321                 {\r
2322                         READ_FIRMWARE(8192E,_FW_WoWLAN);\r
2323                 }\r
2324 #ifdef CONFIG_AP_WOWLAN\r
2325                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2326                 {\r
2327                         READ_FIRMWARE(8192E,_FW_AP_WoWLAN);\r
2328                 }\r
2329 #endif\r
2330 \r
2331         }\r
2332 #endif\r
2333         return HAL_STATUS_SUCCESS;    \r
2334 } \r
2335 \r
2336 \r
2337 u4Byte \r
2338 ODM_GetHWImgVersion(\r
2339         IN      PDM_ODM_T       pDM_Odm\r
2340         )\r
2341 {\r
2342 \r
2343 #if (RTL8812A_SUPPORT == 1)  \r
2344         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2345                 return GET_VERSION_MP(8812A,_MAC_REG);\r
2346 #endif\r
2347 \r
2348         return 0;\r
2349 }\r
2350 \r
2351 \r
2352 \r
2353 \r
2354 \r