1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
44 #include <net/mac80211.h>
46 #include <asm/div64.h>
48 #define DRV_NAME "iwlagn"
50 #include "iwl-eeprom.h"
54 #include "iwl-helpers.h"
56 #include "iwl-calib.h"
59 /******************************************************************************
63 ******************************************************************************/
66 * module name, copyright, version, etc.
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70 #ifdef CONFIG_IWLWIFI_DEBUG
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
82 #define DRV_VERSION IWLWIFI_VERSION VD VS
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
91 /*************** STATION TABLE MANAGEMENT ****
92 * mac80211 should be examined to determine if sta_info is duplicating
93 * the functionality provided here
96 /**************************************************************/
99 * iwl_commit_rxon - commit staging_rxon to hardware
101 * The RXON command in staging_rxon is committed to the hardware and
102 * the active_rxon structure is updated with the new data. This
103 * function correctly transitions out of the RXON_ASSOC_MSK state if
104 * a HW tune is required based on the RXON structure changes.
106 int iwl_commit_rxon(struct iwl_priv *priv)
108 /* cast away the const for active_rxon in this function */
109 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
112 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
114 if (!iwl_is_alive(priv))
117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
120 ret = iwl_check_rxon_cmd(priv);
122 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
127 * receive commit_rxon request
128 * abort any previous channel switch if still in process
130 if (priv->switch_rxon.switch_in_progress &&
131 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
132 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
133 le16_to_cpu(priv->switch_rxon.channel));
134 priv->switch_rxon.switch_in_progress = false;
137 /* If we don't need to send a full RXON, we can use
138 * iwl_rxon_assoc_cmd which is used to reconfigure filter
139 * and other flags for the current radio configuration. */
140 if (!iwl_full_rxon_required(priv)) {
141 ret = iwl_send_rxon_assoc(priv);
143 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
147 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
148 iwl_print_rx_config_cmd(priv);
152 /* station table will be cleared */
153 priv->assoc_station_added = 0;
155 /* If we are currently associated and the new config requires
156 * an RXON_ASSOC and the new config wants the associated mask enabled,
157 * we must clear the associated from the active configuration
158 * before we apply the new config */
159 if (iwl_is_associated(priv) && new_assoc) {
160 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
161 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
163 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
164 sizeof(struct iwl_rxon_cmd),
167 /* If the mask clearing failed then we set
168 * active_rxon back to what it was previously */
170 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
171 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
176 IWL_DEBUG_INFO(priv, "Sending RXON\n"
177 "* with%s RXON_FILTER_ASSOC_MSK\n"
180 (new_assoc ? "" : "out"),
181 le16_to_cpu(priv->staging_rxon.channel),
182 priv->staging_rxon.bssid_addr);
184 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
186 /* Apply the new configuration
187 * RXON unassoc clears the station table in uCode, send it before
188 * we add the bcast station. If assoc bit is set, we will send RXON
189 * after having added the bcast and bssid station.
192 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
193 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
195 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
201 iwl_clear_stations_table(priv);
203 priv->start_calib = 0;
205 /* Add the broadcast address so we can send broadcast frames */
206 iwl_add_bcast_station(priv);
208 /* If we have set the ASSOC_MSK and we are in BSS mode then
209 * add the IWL_AP_ID to the station rate table */
211 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
212 ret = iwl_rxon_add_station(priv,
213 priv->active_rxon.bssid_addr, 1);
214 if (ret == IWL_INVALID_STATION) {
216 "Error adding AP address for TX.\n");
219 priv->assoc_station_added = 1;
220 if (priv->default_wep_key &&
221 iwl_send_static_wepkey_cmd(priv, 0))
223 "Could not send WEP static key.\n");
227 * allow CTS-to-self if possible for new association.
228 * this is relevant only for 5000 series and up,
229 * but will not damage 4965
231 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
233 /* Apply the new configuration
234 * RXON assoc doesn't clear the station table in uCode,
236 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
237 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
239 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
242 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
244 iwl_print_rx_config_cmd(priv);
246 iwl_init_sensitivity(priv);
248 /* If we issue a new RXON command which required a tune then we must
249 * send a new TXPOWER command or we won't be able to Tx any frames */
250 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
252 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
259 void iwl_update_chain_flags(struct iwl_priv *priv)
262 if (priv->cfg->ops->hcmd->set_rxon_chain)
263 priv->cfg->ops->hcmd->set_rxon_chain(priv);
264 iwlcore_commit_rxon(priv);
267 static void iwl_clear_free_frames(struct iwl_priv *priv)
269 struct list_head *element;
271 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
274 while (!list_empty(&priv->free_frames)) {
275 element = priv->free_frames.next;
277 kfree(list_entry(element, struct iwl_frame, list));
278 priv->frames_count--;
281 if (priv->frames_count) {
282 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
284 priv->frames_count = 0;
288 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
290 struct iwl_frame *frame;
291 struct list_head *element;
292 if (list_empty(&priv->free_frames)) {
293 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
295 IWL_ERR(priv, "Could not allocate frame!\n");
299 priv->frames_count++;
303 element = priv->free_frames.next;
305 return list_entry(element, struct iwl_frame, list);
308 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
310 memset(frame, 0, sizeof(*frame));
311 list_add(&frame->list, &priv->free_frames);
314 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
315 struct ieee80211_hdr *hdr,
318 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
319 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
320 (priv->iw_mode != NL80211_IFTYPE_AP)))
323 if (priv->ibss_beacon->len > left)
326 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
328 return priv->ibss_beacon->len;
331 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
332 static void iwl_set_beacon_tim(struct iwl_priv *priv,
333 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
334 u8 *beacon, u32 frame_size)
337 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
340 * The index is relative to frame start but we start looking at the
341 * variable-length part of the beacon.
343 tim_idx = mgmt->u.beacon.variable - beacon;
345 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
346 while ((tim_idx < (frame_size - 2)) &&
347 (beacon[tim_idx] != WLAN_EID_TIM))
348 tim_idx += beacon[tim_idx+1] + 2;
350 /* If TIM field was found, set variables */
351 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
352 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
353 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
355 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
358 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
359 struct iwl_frame *frame)
361 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
366 * We have to set up the TX command, the TX Beacon command, and the
370 /* Initialize memory */
371 tx_beacon_cmd = &frame->u.beacon;
372 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
374 /* Set up TX beacon contents */
375 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
376 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
377 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
380 /* Set up TX command fields */
381 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
382 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
383 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
384 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
385 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
387 /* Set up TX beacon command fields */
388 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
391 /* Set up packet rate and flags */
392 rate = iwl_rate_get_lowest_plcp(priv);
393 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
394 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
395 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
396 rate_flags |= RATE_MCS_CCK_MSK;
397 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
400 return sizeof(*tx_beacon_cmd) + frame_size;
402 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
404 struct iwl_frame *frame;
405 unsigned int frame_size;
408 frame = iwl_get_free_frame(priv);
410 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
415 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
417 IWL_ERR(priv, "Error configuring the beacon command\n");
418 iwl_free_frame(priv, frame);
422 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
425 iwl_free_frame(priv, frame);
430 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
432 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
434 dma_addr_t addr = get_unaligned_le32(&tb->lo);
435 if (sizeof(dma_addr_t) > sizeof(u32))
437 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
442 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
444 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
446 return le16_to_cpu(tb->hi_n_len) >> 4;
449 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
450 dma_addr_t addr, u16 len)
452 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
453 u16 hi_n_len = len << 4;
455 put_unaligned_le32(addr, &tb->lo);
456 if (sizeof(dma_addr_t) > sizeof(u32))
457 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
459 tb->hi_n_len = cpu_to_le16(hi_n_len);
461 tfd->num_tbs = idx + 1;
464 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
466 return tfd->num_tbs & 0x1f;
470 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
471 * @priv - driver private data
474 * Does NOT advance any TFD circular buffer read/write indexes
475 * Does NOT free the TFD itself (which is within circular buffer)
477 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
479 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
481 struct pci_dev *dev = priv->pci_dev;
482 int index = txq->q.read_ptr;
486 tfd = &tfd_tmp[index];
488 /* Sanity check on number of chunks */
489 num_tbs = iwl_tfd_get_num_tbs(tfd);
491 if (num_tbs >= IWL_NUM_OF_TBS) {
492 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
493 /* @todo issue fatal error, it is quite serious situation */
499 pci_unmap_single(dev,
500 pci_unmap_addr(&txq->meta[index], mapping),
501 pci_unmap_len(&txq->meta[index], len),
502 PCI_DMA_BIDIRECTIONAL);
504 /* Unmap chunks, if any. */
505 for (i = 1; i < num_tbs; i++) {
506 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
507 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
510 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
511 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
516 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
517 struct iwl_tx_queue *txq,
518 dma_addr_t addr, u16 len,
522 struct iwl_tfd *tfd, *tfd_tmp;
526 tfd_tmp = (struct iwl_tfd *)txq->tfds;
527 tfd = &tfd_tmp[q->write_ptr];
530 memset(tfd, 0, sizeof(*tfd));
532 num_tbs = iwl_tfd_get_num_tbs(tfd);
534 /* Each TFD can point to a maximum 20 Tx buffers */
535 if (num_tbs >= IWL_NUM_OF_TBS) {
536 IWL_ERR(priv, "Error can not send more than %d chunks\n",
541 BUG_ON(addr & ~DMA_BIT_MASK(36));
542 if (unlikely(addr & ~IWL_TX_DMA_MASK))
543 IWL_ERR(priv, "Unaligned address = %llx\n",
544 (unsigned long long)addr);
546 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
552 * Tell nic where to find circular buffer of Tx Frame Descriptors for
553 * given Tx queue, and enable the DMA channel used for that queue.
555 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
556 * channels supported in hardware.
558 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
559 struct iwl_tx_queue *txq)
561 int txq_id = txq->q.id;
563 /* Circular buffer (TFD queue in DRAM) physical base address */
564 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
565 txq->q.dma_addr >> 8);
570 /******************************************************************************
572 * Generic RX handler implementations
574 ******************************************************************************/
575 static void iwl_rx_reply_alive(struct iwl_priv *priv,
576 struct iwl_rx_mem_buffer *rxb)
578 struct iwl_rx_packet *pkt = rxb_addr(rxb);
579 struct iwl_alive_resp *palive;
580 struct delayed_work *pwork;
582 palive = &pkt->u.alive_frame;
584 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
586 palive->is_valid, palive->ver_type,
587 palive->ver_subtype);
589 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
590 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
591 memcpy(&priv->card_alive_init,
593 sizeof(struct iwl_init_alive_resp));
594 pwork = &priv->init_alive_start;
596 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
597 memcpy(&priv->card_alive, &pkt->u.alive_frame,
598 sizeof(struct iwl_alive_resp));
599 pwork = &priv->alive_start;
602 /* We delay the ALIVE response by 5ms to
603 * give the HW RF Kill time to activate... */
604 if (palive->is_valid == UCODE_VALID_OK)
605 queue_delayed_work(priv->workqueue, pwork,
606 msecs_to_jiffies(5));
608 IWL_WARN(priv, "uCode did not respond OK.\n");
611 static void iwl_bg_beacon_update(struct work_struct *work)
613 struct iwl_priv *priv =
614 container_of(work, struct iwl_priv, beacon_update);
615 struct sk_buff *beacon;
617 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
618 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
621 IWL_ERR(priv, "update beacon failed\n");
625 mutex_lock(&priv->mutex);
626 /* new beacon skb is allocated every time; dispose previous.*/
627 if (priv->ibss_beacon)
628 dev_kfree_skb(priv->ibss_beacon);
630 priv->ibss_beacon = beacon;
631 mutex_unlock(&priv->mutex);
633 iwl_send_beacon_cmd(priv);
637 * iwl_bg_statistics_periodic - Timer callback to queue statistics
639 * This callback is provided in order to send a statistics request.
641 * This timer function is continually reset to execute within
642 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
643 * was received. We need to ensure we receive the statistics in order
644 * to update the temperature used for calibrating the TXPOWER.
646 static void iwl_bg_statistics_periodic(unsigned long data)
648 struct iwl_priv *priv = (struct iwl_priv *)data;
650 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
653 /* dont send host command if rf-kill is on */
654 if (!iwl_is_ready_rf(priv))
657 iwl_send_statistics_request(priv, CMD_ASYNC, false);
661 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
662 u32 start_idx, u32 num_events,
666 u32 ptr; /* SRAM byte address of log data */
667 u32 ev, time, data; /* event log data */
668 unsigned long reg_flags;
671 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
673 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
675 /* Make sure device is powered up for SRAM reads */
676 spin_lock_irqsave(&priv->reg_lock, reg_flags);
677 if (iwl_grab_nic_access(priv)) {
678 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
682 /* Set starting address; reads will auto-increment */
683 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
687 * "time" is actually "data" for mode 0 (no timestamp).
688 * place event id # at far right for easier visual parsing.
690 for (i = 0; i < num_events; i++) {
691 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
692 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
694 trace_iwlwifi_dev_ucode_cont_event(priv,
697 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
698 trace_iwlwifi_dev_ucode_cont_event(priv,
702 /* Allow device to power down */
703 iwl_release_nic_access(priv);
704 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
707 void iwl_continuous_event_trace(struct iwl_priv *priv)
709 u32 capacity; /* event log capacity in # entries */
710 u32 base; /* SRAM byte address of event log header */
711 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
712 u32 num_wraps; /* # times uCode wrapped to top of log */
713 u32 next_entry; /* index of next entry to be written by uCode */
715 if (priv->ucode_type == UCODE_INIT)
716 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
718 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
719 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
720 capacity = iwl_read_targ_mem(priv, base);
721 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
722 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
723 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
727 if (num_wraps == priv->event_log.num_wraps) {
728 iwl_print_cont_event_trace(priv,
729 base, priv->event_log.next_entry,
730 next_entry - priv->event_log.next_entry,
732 priv->event_log.non_wraps_count++;
734 if ((num_wraps - priv->event_log.num_wraps) > 1)
735 priv->event_log.wraps_more_count++;
737 priv->event_log.wraps_once_count++;
738 trace_iwlwifi_dev_ucode_wrap_event(priv,
739 num_wraps - priv->event_log.num_wraps,
740 next_entry, priv->event_log.next_entry);
741 if (next_entry < priv->event_log.next_entry) {
742 iwl_print_cont_event_trace(priv, base,
743 priv->event_log.next_entry,
744 capacity - priv->event_log.next_entry,
747 iwl_print_cont_event_trace(priv, base, 0,
750 iwl_print_cont_event_trace(priv, base,
751 next_entry, capacity - next_entry,
754 iwl_print_cont_event_trace(priv, base, 0,
758 priv->event_log.num_wraps = num_wraps;
759 priv->event_log.next_entry = next_entry;
763 * iwl_bg_ucode_trace - Timer callback to log ucode event
765 * The timer is continually set to execute every
766 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
767 * this function is to perform continuous uCode event logging operation
770 static void iwl_bg_ucode_trace(unsigned long data)
772 struct iwl_priv *priv = (struct iwl_priv *)data;
774 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
777 if (priv->event_log.ucode_trace) {
778 iwl_continuous_event_trace(priv);
779 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
780 mod_timer(&priv->ucode_trace,
781 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
785 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
786 struct iwl_rx_mem_buffer *rxb)
788 #ifdef CONFIG_IWLWIFI_DEBUG
789 struct iwl_rx_packet *pkt = rxb_addr(rxb);
790 struct iwl4965_beacon_notif *beacon =
791 (struct iwl4965_beacon_notif *)pkt->u.raw;
792 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
794 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
795 "tsf %d %d rate %d\n",
796 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
797 beacon->beacon_notify_hdr.failure_frame,
798 le32_to_cpu(beacon->ibss_mgr_status),
799 le32_to_cpu(beacon->high_tsf),
800 le32_to_cpu(beacon->low_tsf), rate);
803 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
804 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
805 queue_work(priv->workqueue, &priv->beacon_update);
808 /* Handle notification from uCode that card's power state is changing
809 * due to software, hardware, or critical temperature RFKILL */
810 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
811 struct iwl_rx_mem_buffer *rxb)
813 struct iwl_rx_packet *pkt = rxb_addr(rxb);
814 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
815 unsigned long status = priv->status;
817 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
818 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
819 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
820 (flags & CT_CARD_DISABLED) ?
821 "Reached" : "Not reached");
823 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
826 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
827 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
829 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
830 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
832 if (!(flags & RXON_CARD_DISABLED)) {
833 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
834 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
835 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
836 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
838 if (flags & CT_CARD_DISABLED)
839 iwl_tt_enter_ct_kill(priv);
841 if (!(flags & CT_CARD_DISABLED))
842 iwl_tt_exit_ct_kill(priv);
844 if (flags & HW_CARD_DISABLED)
845 set_bit(STATUS_RF_KILL_HW, &priv->status);
847 clear_bit(STATUS_RF_KILL_HW, &priv->status);
850 if (!(flags & RXON_CARD_DISABLED))
851 iwl_scan_cancel(priv);
853 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
854 test_bit(STATUS_RF_KILL_HW, &priv->status)))
855 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
856 test_bit(STATUS_RF_KILL_HW, &priv->status));
858 wake_up_interruptible(&priv->wait_command_queue);
861 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
863 if (src == IWL_PWR_SRC_VAUX) {
864 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
865 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
866 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
867 ~APMG_PS_CTRL_MSK_PWR_SRC);
869 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
870 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
871 ~APMG_PS_CTRL_MSK_PWR_SRC);
878 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
880 * Setup the RX handlers for each of the reply types sent from the uCode
883 * This function chains into the hardware specific files for them to setup
884 * any hardware specific handlers as well.
886 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
888 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
889 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
890 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
891 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
892 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
893 iwl_rx_pm_debug_statistics_notif;
894 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
897 * The same handler is used for both the REPLY to a discrete
898 * statistics request from the host as well as for the periodic
899 * statistics notifications (after received beacons) from the uCode.
901 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
902 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
904 iwl_setup_spectrum_handlers(priv);
905 iwl_setup_rx_scan_handlers(priv);
907 /* status change handler */
908 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
910 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
911 iwl_rx_missed_beacon_notif;
913 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
914 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
916 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
917 /* Set up hardware specific Rx handlers */
918 priv->cfg->ops->lib->rx_handler_setup(priv);
922 * iwl_rx_handle - Main entry function for receiving responses from uCode
924 * Uses the priv->rx_handlers callback function array to invoke
925 * the appropriate handlers, including command responses,
926 * frame-received notifications, and other notifications.
928 void iwl_rx_handle(struct iwl_priv *priv)
930 struct iwl_rx_mem_buffer *rxb;
931 struct iwl_rx_packet *pkt;
932 struct iwl_rx_queue *rxq = &priv->rxq;
940 /* uCode's read index (stored in shared DRAM) indicates the last Rx
941 * buffer that the driver may process (last buffer filled by ucode). */
942 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
945 /* Rx interrupt, but nothing sent from uCode */
947 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
949 /* calculate total frames need to be restock after handling RX */
950 total_empty = r - rxq->write_actual;
952 total_empty += RX_QUEUE_SIZE;
954 if (total_empty > (RX_QUEUE_SIZE / 2))
960 /* If an RXB doesn't have a Rx queue slot associated with it,
961 * then a bug has been introduced in the queue refilling
962 * routines -- catch it here */
965 rxq->queue[i] = NULL;
967 pci_unmap_page(priv->pci_dev, rxb->page_dma,
968 PAGE_SIZE << priv->hw_params.rx_page_order,
972 trace_iwlwifi_dev_rx(priv, pkt,
973 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
975 /* Reclaim a command buffer only if this packet is a response
976 * to a (driver-originated) command.
977 * If the packet (e.g. Rx frame) originated from uCode,
978 * there is no command buffer to reclaim.
979 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
980 * but apparently a few don't get set; catch them here. */
981 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
982 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
983 (pkt->hdr.cmd != REPLY_RX) &&
984 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
985 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
986 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
987 (pkt->hdr.cmd != REPLY_TX);
989 /* Based on type of command response or notification,
990 * handle those that need handling via function in
991 * rx_handlers table. See iwl_setup_rx_handlers() */
992 if (priv->rx_handlers[pkt->hdr.cmd]) {
993 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
994 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
995 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
996 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
998 /* No handling needed */
1000 "r %d i %d No handler needed for %s, 0x%02x\n",
1001 r, i, get_cmd_string(pkt->hdr.cmd),
1006 * XXX: After here, we should always check rxb->page
1007 * against NULL before touching it or its virtual
1008 * memory (pkt). Because some rx_handler might have
1009 * already taken or freed the pages.
1013 /* Invoke any callbacks, transfer the buffer to caller,
1014 * and fire off the (possibly) blocking iwl_send_cmd()
1015 * as we reclaim the driver command queue */
1017 iwl_tx_cmd_complete(priv, rxb);
1019 IWL_WARN(priv, "Claim null rxb?\n");
1022 /* Reuse the page if possible. For notification packets and
1023 * SKBs that fail to Rx correctly, add them back into the
1024 * rx_free list for reuse later. */
1025 spin_lock_irqsave(&rxq->lock, flags);
1026 if (rxb->page != NULL) {
1027 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1028 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1029 PCI_DMA_FROMDEVICE);
1030 list_add_tail(&rxb->list, &rxq->rx_free);
1033 list_add_tail(&rxb->list, &rxq->rx_used);
1035 spin_unlock_irqrestore(&rxq->lock, flags);
1037 i = (i + 1) & RX_QUEUE_MASK;
1038 /* If there are a lot of unused frames,
1039 * restock the Rx queue so ucode wont assert. */
1044 iwl_rx_replenish_now(priv);
1050 /* Backtrack one entry */
1053 iwl_rx_replenish_now(priv);
1055 iwl_rx_queue_restock(priv);
1058 /* call this function to flush any scheduled tasklet */
1059 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1061 /* wait to make sure we flush pending tasklet*/
1062 synchronize_irq(priv->pci_dev->irq);
1063 tasklet_kill(&priv->irq_tasklet);
1066 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1068 u32 inta, handled = 0;
1070 unsigned long flags;
1072 #ifdef CONFIG_IWLWIFI_DEBUG
1076 spin_lock_irqsave(&priv->lock, flags);
1078 /* Ack/clear/reset pending uCode interrupts.
1079 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1080 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1081 inta = iwl_read32(priv, CSR_INT);
1082 iwl_write32(priv, CSR_INT, inta);
1084 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1085 * Any new interrupts that happen after this, either while we're
1086 * in this tasklet, or later, will show up in next ISR/tasklet. */
1087 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1088 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1090 #ifdef CONFIG_IWLWIFI_DEBUG
1091 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1092 /* just for debug */
1093 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1094 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1095 inta, inta_mask, inta_fh);
1099 spin_unlock_irqrestore(&priv->lock, flags);
1101 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1102 * atomic, make sure that inta covers all the interrupts that
1103 * we've discovered, even if FH interrupt came in just after
1104 * reading CSR_INT. */
1105 if (inta_fh & CSR49_FH_INT_RX_MASK)
1106 inta |= CSR_INT_BIT_FH_RX;
1107 if (inta_fh & CSR49_FH_INT_TX_MASK)
1108 inta |= CSR_INT_BIT_FH_TX;
1110 /* Now service all interrupt bits discovered above. */
1111 if (inta & CSR_INT_BIT_HW_ERR) {
1112 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1114 /* Tell the device to stop sending interrupts */
1115 iwl_disable_interrupts(priv);
1117 priv->isr_stats.hw++;
1118 iwl_irq_handle_error(priv);
1120 handled |= CSR_INT_BIT_HW_ERR;
1125 #ifdef CONFIG_IWLWIFI_DEBUG
1126 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1127 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1128 if (inta & CSR_INT_BIT_SCD) {
1129 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1130 "the frame/frames.\n");
1131 priv->isr_stats.sch++;
1134 /* Alive notification via Rx interrupt will do the real work */
1135 if (inta & CSR_INT_BIT_ALIVE) {
1136 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1137 priv->isr_stats.alive++;
1141 /* Safely ignore these bits for debug checks below */
1142 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1144 /* HW RF KILL switch toggled */
1145 if (inta & CSR_INT_BIT_RF_KILL) {
1147 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1148 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1151 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1152 hw_rf_kill ? "disable radio" : "enable radio");
1154 priv->isr_stats.rfkill++;
1156 /* driver only loads ucode once setting the interface up.
1157 * the driver allows loading the ucode even if the radio
1158 * is killed. Hence update the killswitch state here. The
1159 * rfkill handler will care about restarting if needed.
1161 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1163 set_bit(STATUS_RF_KILL_HW, &priv->status);
1165 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1166 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1169 handled |= CSR_INT_BIT_RF_KILL;
1172 /* Chip got too hot and stopped itself */
1173 if (inta & CSR_INT_BIT_CT_KILL) {
1174 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1175 priv->isr_stats.ctkill++;
1176 handled |= CSR_INT_BIT_CT_KILL;
1179 /* Error detected by uCode */
1180 if (inta & CSR_INT_BIT_SW_ERR) {
1181 IWL_ERR(priv, "Microcode SW error detected. "
1182 " Restarting 0x%X.\n", inta);
1183 priv->isr_stats.sw++;
1184 priv->isr_stats.sw_err = inta;
1185 iwl_irq_handle_error(priv);
1186 handled |= CSR_INT_BIT_SW_ERR;
1190 * uCode wakes up after power-down sleep.
1191 * Tell device about any new tx or host commands enqueued,
1192 * and about any Rx buffers made available while asleep.
1194 if (inta & CSR_INT_BIT_WAKEUP) {
1195 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1196 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1197 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1198 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1199 priv->isr_stats.wakeup++;
1200 handled |= CSR_INT_BIT_WAKEUP;
1203 /* All uCode command responses, including Tx command responses,
1204 * Rx "responses" (frame-received notification), and other
1205 * notifications from uCode come through here*/
1206 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1207 iwl_rx_handle(priv);
1208 priv->isr_stats.rx++;
1209 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1212 /* This "Tx" DMA channel is used only for loading uCode */
1213 if (inta & CSR_INT_BIT_FH_TX) {
1214 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1215 priv->isr_stats.tx++;
1216 handled |= CSR_INT_BIT_FH_TX;
1217 /* Wake up uCode load routine, now that load is complete */
1218 priv->ucode_write_complete = 1;
1219 wake_up_interruptible(&priv->wait_command_queue);
1222 if (inta & ~handled) {
1223 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1224 priv->isr_stats.unhandled++;
1227 if (inta & ~(priv->inta_mask)) {
1228 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1229 inta & ~priv->inta_mask);
1230 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1233 /* Re-enable all interrupts */
1234 /* only Re-enable if diabled by irq */
1235 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1236 iwl_enable_interrupts(priv);
1238 #ifdef CONFIG_IWLWIFI_DEBUG
1239 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1240 inta = iwl_read32(priv, CSR_INT);
1241 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1242 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1243 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1244 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1249 /* tasklet for iwlagn interrupt */
1250 static void iwl_irq_tasklet(struct iwl_priv *priv)
1254 unsigned long flags;
1256 #ifdef CONFIG_IWLWIFI_DEBUG
1260 spin_lock_irqsave(&priv->lock, flags);
1262 /* Ack/clear/reset pending uCode interrupts.
1263 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1265 iwl_write32(priv, CSR_INT, priv->inta);
1269 #ifdef CONFIG_IWLWIFI_DEBUG
1270 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1271 /* just for debug */
1272 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1273 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1278 spin_unlock_irqrestore(&priv->lock, flags);
1280 /* saved interrupt in inta variable now we can reset priv->inta */
1283 /* Now service all interrupt bits discovered above. */
1284 if (inta & CSR_INT_BIT_HW_ERR) {
1285 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1287 /* Tell the device to stop sending interrupts */
1288 iwl_disable_interrupts(priv);
1290 priv->isr_stats.hw++;
1291 iwl_irq_handle_error(priv);
1293 handled |= CSR_INT_BIT_HW_ERR;
1298 #ifdef CONFIG_IWLWIFI_DEBUG
1299 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1300 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1301 if (inta & CSR_INT_BIT_SCD) {
1302 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1303 "the frame/frames.\n");
1304 priv->isr_stats.sch++;
1307 /* Alive notification via Rx interrupt will do the real work */
1308 if (inta & CSR_INT_BIT_ALIVE) {
1309 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1310 priv->isr_stats.alive++;
1314 /* Safely ignore these bits for debug checks below */
1315 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1317 /* HW RF KILL switch toggled */
1318 if (inta & CSR_INT_BIT_RF_KILL) {
1320 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1321 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1324 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1325 hw_rf_kill ? "disable radio" : "enable radio");
1327 priv->isr_stats.rfkill++;
1329 /* driver only loads ucode once setting the interface up.
1330 * the driver allows loading the ucode even if the radio
1331 * is killed. Hence update the killswitch state here. The
1332 * rfkill handler will care about restarting if needed.
1334 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1336 set_bit(STATUS_RF_KILL_HW, &priv->status);
1338 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1339 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1342 handled |= CSR_INT_BIT_RF_KILL;
1345 /* Chip got too hot and stopped itself */
1346 if (inta & CSR_INT_BIT_CT_KILL) {
1347 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1348 priv->isr_stats.ctkill++;
1349 handled |= CSR_INT_BIT_CT_KILL;
1352 /* Error detected by uCode */
1353 if (inta & CSR_INT_BIT_SW_ERR) {
1354 IWL_ERR(priv, "Microcode SW error detected. "
1355 " Restarting 0x%X.\n", inta);
1356 priv->isr_stats.sw++;
1357 priv->isr_stats.sw_err = inta;
1358 iwl_irq_handle_error(priv);
1359 handled |= CSR_INT_BIT_SW_ERR;
1362 /* uCode wakes up after power-down sleep */
1363 if (inta & CSR_INT_BIT_WAKEUP) {
1364 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1365 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1366 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1367 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1369 priv->isr_stats.wakeup++;
1371 handled |= CSR_INT_BIT_WAKEUP;
1374 /* All uCode command responses, including Tx command responses,
1375 * Rx "responses" (frame-received notification), and other
1376 * notifications from uCode come through here*/
1377 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1378 CSR_INT_BIT_RX_PERIODIC)) {
1379 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1380 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1381 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1382 iwl_write32(priv, CSR_FH_INT_STATUS,
1383 CSR49_FH_INT_RX_MASK);
1385 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1386 handled |= CSR_INT_BIT_RX_PERIODIC;
1387 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1389 /* Sending RX interrupt require many steps to be done in the
1391 * 1- write interrupt to current index in ICT table.
1393 * 3- update RX shared data to indicate last write index.
1394 * 4- send interrupt.
1395 * This could lead to RX race, driver could receive RX interrupt
1396 * but the shared data changes does not reflect this;
1397 * periodic interrupt will detect any dangling Rx activity.
1400 /* Disable periodic interrupt; we use it as just a one-shot. */
1401 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1402 CSR_INT_PERIODIC_DIS);
1403 iwl_rx_handle(priv);
1406 * Enable periodic interrupt in 8 msec only if we received
1407 * real RX interrupt (instead of just periodic int), to catch
1408 * any dangling Rx interrupt. If it was just the periodic
1409 * interrupt, there was no dangling Rx activity, and no need
1410 * to extend the periodic interrupt; one-shot is enough.
1412 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1413 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1414 CSR_INT_PERIODIC_ENA);
1416 priv->isr_stats.rx++;
1419 /* This "Tx" DMA channel is used only for loading uCode */
1420 if (inta & CSR_INT_BIT_FH_TX) {
1421 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1422 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1423 priv->isr_stats.tx++;
1424 handled |= CSR_INT_BIT_FH_TX;
1425 /* Wake up uCode load routine, now that load is complete */
1426 priv->ucode_write_complete = 1;
1427 wake_up_interruptible(&priv->wait_command_queue);
1430 if (inta & ~handled) {
1431 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1432 priv->isr_stats.unhandled++;
1435 if (inta & ~(priv->inta_mask)) {
1436 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1437 inta & ~priv->inta_mask);
1440 /* Re-enable all interrupts */
1441 /* only Re-enable if diabled by irq */
1442 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1443 iwl_enable_interrupts(priv);
1447 /******************************************************************************
1449 * uCode download functions
1451 ******************************************************************************/
1453 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1458 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1459 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1463 static void iwl_nic_start(struct iwl_priv *priv)
1465 /* Remove all resets to allow NIC to operate */
1466 iwl_write32(priv, CSR_RESET, 0);
1471 * iwl_read_ucode - Read uCode images from disk file.
1473 * Copy into buffers for card to fetch via bus-mastering
1475 static int iwl_read_ucode(struct iwl_priv *priv)
1477 struct iwl_ucode_header *ucode;
1478 int ret = -EINVAL, index;
1479 const struct firmware *ucode_raw;
1480 const char *name_pre = priv->cfg->fw_name_pre;
1481 const unsigned int api_max = priv->cfg->ucode_api_max;
1482 const unsigned int api_min = priv->cfg->ucode_api_min;
1487 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1490 /* Ask kernel firmware_class module to get the boot firmware off disk.
1491 * request_firmware() is synchronous, file is in memory on return. */
1492 for (index = api_max; index >= api_min; index--) {
1493 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1494 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1496 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1503 if (index < api_max)
1504 IWL_ERR(priv, "Loaded firmware %s, "
1505 "which is deprecated. "
1506 "Please use API v%u instead.\n",
1509 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1510 buf, ucode_raw->size);
1518 /* Make sure that we got at least the v1 header! */
1519 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1520 IWL_ERR(priv, "File size way too small!\n");
1525 /* Data from ucode file: header followed by uCode images */
1526 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1528 priv->ucode_ver = le32_to_cpu(ucode->ver);
1529 api_ver = IWL_UCODE_API(priv->ucode_ver);
1530 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1531 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1532 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1533 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1535 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1536 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1537 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1539 /* api_ver should match the api version forming part of the
1540 * firmware filename ... but we don't check for that and only rely
1541 * on the API version read from firmware header from here on forward */
1543 if (api_ver < api_min || api_ver > api_max) {
1544 IWL_ERR(priv, "Driver unable to support your firmware API. "
1545 "Driver supports v%u, firmware is v%u.\n",
1547 priv->ucode_ver = 0;
1551 if (api_ver != api_max)
1552 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1553 "got v%u. New firmware can be obtained "
1554 "from http://www.intellinuxwireless.org.\n",
1557 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1558 IWL_UCODE_MAJOR(priv->ucode_ver),
1559 IWL_UCODE_MINOR(priv->ucode_ver),
1560 IWL_UCODE_API(priv->ucode_ver),
1561 IWL_UCODE_SERIAL(priv->ucode_ver));
1563 snprintf(priv->hw->wiphy->fw_version,
1564 sizeof(priv->hw->wiphy->fw_version),
1566 IWL_UCODE_MAJOR(priv->ucode_ver),
1567 IWL_UCODE_MINOR(priv->ucode_ver),
1568 IWL_UCODE_API(priv->ucode_ver),
1569 IWL_UCODE_SERIAL(priv->ucode_ver));
1572 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1574 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1575 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1576 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1577 ? "OTP" : "EEPROM", eeprom_ver);
1579 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1581 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1583 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1585 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1587 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1589 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1592 /* Verify size of file vs. image size info in file's header */
1593 if (ucode_raw->size !=
1594 priv->cfg->ops->ucode->get_header_size(api_ver) +
1595 inst_size + data_size + init_size +
1596 init_data_size + boot_size) {
1598 IWL_DEBUG_INFO(priv,
1599 "uCode file size %d does not match expected size\n",
1600 (int)ucode_raw->size);
1605 /* Verify that uCode images will fit in card's SRAM */
1606 if (inst_size > priv->hw_params.max_inst_size) {
1607 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1613 if (data_size > priv->hw_params.max_data_size) {
1614 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1619 if (init_size > priv->hw_params.max_inst_size) {
1620 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1625 if (init_data_size > priv->hw_params.max_data_size) {
1626 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1631 if (boot_size > priv->hw_params.max_bsm_size) {
1632 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1638 /* Allocate ucode buffers for card's bus-master loading ... */
1640 /* Runtime instructions and 2 copies of data:
1641 * 1) unmodified from disk
1642 * 2) backup cache for save/restore during power-downs */
1643 priv->ucode_code.len = inst_size;
1644 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1646 priv->ucode_data.len = data_size;
1647 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1649 priv->ucode_data_backup.len = data_size;
1650 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1652 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1653 !priv->ucode_data_backup.v_addr)
1656 /* Initialization instructions and data */
1657 if (init_size && init_data_size) {
1658 priv->ucode_init.len = init_size;
1659 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1661 priv->ucode_init_data.len = init_data_size;
1662 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1664 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1668 /* Bootstrap (instructions only, no data) */
1670 priv->ucode_boot.len = boot_size;
1671 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1673 if (!priv->ucode_boot.v_addr)
1677 /* Copy images into buffers for card's bus-master reads ... */
1679 /* Runtime instructions (first block of data in file) */
1681 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1682 memcpy(priv->ucode_code.v_addr, src, len);
1685 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1686 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1688 /* Runtime data (2nd block)
1689 * NOTE: Copy into backup buffer will be done in iwl_up() */
1691 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1692 memcpy(priv->ucode_data.v_addr, src, len);
1693 memcpy(priv->ucode_data_backup.v_addr, src, len);
1696 /* Initialization instructions (3rd block) */
1699 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1701 memcpy(priv->ucode_init.v_addr, src, len);
1705 /* Initialization data (4th block) */
1706 if (init_data_size) {
1707 len = init_data_size;
1708 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1710 memcpy(priv->ucode_init_data.v_addr, src, len);
1714 /* Bootstrap instructions (5th block) */
1716 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1717 memcpy(priv->ucode_boot.v_addr, src, len);
1719 /* We have our copies now, allow OS release its copies */
1720 release_firmware(ucode_raw);
1724 IWL_ERR(priv, "failed to allocate pci memory\n");
1726 iwl_dealloc_ucode_pci(priv);
1729 release_firmware(ucode_raw);
1735 static const char *desc_lookup_text[] = {
1740 "NMI_INTERRUPT_WDG",
1744 "HW_ERROR_TUNE_LOCK",
1745 "HW_ERROR_TEMPERATURE",
1746 "ILLEGAL_CHAN_FREQ",
1749 "NMI_INTERRUPT_HOST",
1750 "NMI_INTERRUPT_ACTION_PT",
1751 "NMI_INTERRUPT_UNKNOWN",
1752 "UCODE_VERSION_MISMATCH",
1753 "HW_ERROR_ABS_LOCK",
1754 "HW_ERROR_CAL_LOCK_FAIL",
1755 "NMI_INTERRUPT_INST_ACTION_PT",
1756 "NMI_INTERRUPT_DATA_ACTION_PT",
1758 "NMI_INTERRUPT_TRM",
1759 "NMI_INTERRUPT_BREAK_POINT"
1767 static const char *desc_lookup(int i)
1769 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1771 if (i < 0 || i > max)
1774 return desc_lookup_text[i];
1777 #define ERROR_START_OFFSET (1 * sizeof(u32))
1778 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1780 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1783 u32 desc, time, count, base, data1;
1784 u32 blink1, blink2, ilink1, ilink2;
1786 if (priv->ucode_type == UCODE_INIT)
1787 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1789 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1791 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1793 "Not valid error log pointer 0x%08X for %s uCode\n",
1794 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1798 count = iwl_read_targ_mem(priv, base);
1800 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1801 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1802 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1803 priv->status, count);
1806 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1807 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1808 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1809 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1810 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1811 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1812 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1813 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1814 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1816 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1817 blink1, blink2, ilink1, ilink2);
1819 IWL_ERR(priv, "Desc Time "
1820 "data1 data2 line\n");
1821 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1822 desc_lookup(desc), desc, time, data1, data2, line);
1823 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1824 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1829 #define EVENT_START_OFFSET (4 * sizeof(u32))
1832 * iwl_print_event_log - Dump error event log to syslog
1835 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1836 u32 num_events, u32 mode,
1837 int pos, char **buf, size_t bufsz)
1840 u32 base; /* SRAM byte address of event log header */
1841 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1842 u32 ptr; /* SRAM byte address of log data */
1843 u32 ev, time, data; /* event log data */
1844 unsigned long reg_flags;
1846 if (num_events == 0)
1848 if (priv->ucode_type == UCODE_INIT)
1849 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1851 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1854 event_size = 2 * sizeof(u32);
1856 event_size = 3 * sizeof(u32);
1858 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1860 /* Make sure device is powered up for SRAM reads */
1861 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1862 iwl_grab_nic_access(priv);
1864 /* Set starting address; reads will auto-increment */
1865 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1868 /* "time" is actually "data" for mode 0 (no timestamp).
1869 * place event id # at far right for easier visual parsing. */
1870 for (i = 0; i < num_events; i++) {
1871 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1872 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1876 pos += scnprintf(*buf + pos, bufsz - pos,
1877 "EVT_LOG:0x%08x:%04u\n",
1880 trace_iwlwifi_dev_ucode_event(priv, 0,
1882 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1886 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1888 pos += scnprintf(*buf + pos, bufsz - pos,
1889 "EVT_LOGT:%010u:0x%08x:%04u\n",
1892 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1894 trace_iwlwifi_dev_ucode_event(priv, time,
1900 /* Allow device to power down */
1901 iwl_release_nic_access(priv);
1902 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1907 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1909 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1910 u32 num_wraps, u32 next_entry,
1912 int pos, char **buf, size_t bufsz)
1915 * display the newest DEFAULT_LOG_ENTRIES entries
1916 * i.e the entries just before the next ont that uCode would fill.
1919 if (next_entry < size) {
1920 pos = iwl_print_event_log(priv,
1921 capacity - (size - next_entry),
1922 size - next_entry, mode,
1924 pos = iwl_print_event_log(priv, 0,
1928 pos = iwl_print_event_log(priv, next_entry - size,
1929 size, mode, pos, buf, bufsz);
1931 if (next_entry < size) {
1932 pos = iwl_print_event_log(priv, 0, next_entry,
1933 mode, pos, buf, bufsz);
1935 pos = iwl_print_event_log(priv, next_entry - size,
1936 size, mode, pos, buf, bufsz);
1942 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1943 #define MAX_EVENT_LOG_SIZE (512)
1945 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1947 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1948 char **buf, bool display)
1950 u32 base; /* SRAM byte address of event log header */
1951 u32 capacity; /* event log capacity in # entries */
1952 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1953 u32 num_wraps; /* # times uCode wrapped to top of log */
1954 u32 next_entry; /* index of next entry to be written by uCode */
1955 u32 size; /* # entries that we'll print */
1959 if (priv->ucode_type == UCODE_INIT)
1960 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1962 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1964 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1966 "Invalid event log pointer 0x%08X for %s uCode\n",
1967 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1971 /* event log header */
1972 capacity = iwl_read_targ_mem(priv, base);
1973 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1974 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1975 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1977 if (capacity > MAX_EVENT_LOG_SIZE) {
1978 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1979 capacity, MAX_EVENT_LOG_SIZE);
1980 capacity = MAX_EVENT_LOG_SIZE;
1983 if (next_entry > MAX_EVENT_LOG_SIZE) {
1984 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1985 next_entry, MAX_EVENT_LOG_SIZE);
1986 next_entry = MAX_EVENT_LOG_SIZE;
1989 size = num_wraps ? capacity : next_entry;
1991 /* bail out if nothing in log */
1993 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1997 #ifdef CONFIG_IWLWIFI_DEBUG
1998 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1999 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2000 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2002 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2003 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2005 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2008 #ifdef CONFIG_IWLWIFI_DEBUG
2011 bufsz = capacity * 48;
2014 *buf = kmalloc(bufsz, GFP_KERNEL);
2018 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2020 * if uCode has wrapped back to top of log,
2021 * start at the oldest entry,
2022 * i.e the next one that uCode would fill.
2025 pos = iwl_print_event_log(priv, next_entry,
2026 capacity - next_entry, mode,
2028 /* (then/else) start at top of log */
2029 pos = iwl_print_event_log(priv, 0,
2030 next_entry, mode, pos, buf, bufsz);
2032 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2033 next_entry, size, mode,
2036 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2037 next_entry, size, mode,
2044 * iwl_alive_start - called after REPLY_ALIVE notification received
2045 * from protocol/runtime uCode (initialization uCode's
2046 * Alive gets handled by iwl_init_alive_start()).
2048 static void iwl_alive_start(struct iwl_priv *priv)
2052 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2054 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2055 /* We had an error bringing up the hardware, so take it
2056 * all the way back down so we can try again */
2057 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2061 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2062 * This is a paranoid check, because we would not have gotten the
2063 * "runtime" alive if code weren't properly loaded. */
2064 if (iwl_verify_ucode(priv)) {
2065 /* Runtime instruction load was bad;
2066 * take it all the way back down so we can try again */
2067 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2071 iwl_clear_stations_table(priv);
2072 ret = priv->cfg->ops->lib->alive_notify(priv);
2075 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2079 /* After the ALIVE response, we can send host commands to the uCode */
2080 set_bit(STATUS_ALIVE, &priv->status);
2082 if (iwl_is_rfkill(priv))
2085 ieee80211_wake_queues(priv->hw);
2087 priv->active_rate = priv->rates_mask;
2088 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2090 /* Configure Tx antenna selection based on H/W config */
2091 if (priv->cfg->ops->hcmd->set_tx_ant)
2092 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2094 if (iwl_is_associated(priv)) {
2095 struct iwl_rxon_cmd *active_rxon =
2096 (struct iwl_rxon_cmd *)&priv->active_rxon;
2097 /* apply any changes in staging */
2098 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2099 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2101 /* Initialize our rx_config data */
2102 iwl_connection_init_rx_config(priv, priv->iw_mode);
2104 if (priv->cfg->ops->hcmd->set_rxon_chain)
2105 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2107 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2110 /* Configure Bluetooth device coexistence support */
2111 iwl_send_bt_config(priv);
2113 iwl_reset_run_time_calib(priv);
2115 /* Configure the adapter for unassociated operation */
2116 iwlcore_commit_rxon(priv);
2118 /* At this point, the NIC is initialized and operational */
2119 iwl_rf_kill_ct_config(priv);
2121 iwl_leds_init(priv);
2123 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2124 set_bit(STATUS_READY, &priv->status);
2125 wake_up_interruptible(&priv->wait_command_queue);
2127 iwl_power_update_mode(priv, true);
2129 /* reassociate for ADHOC mode */
2130 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2131 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2134 iwl_mac_beacon_update(priv->hw, beacon);
2138 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2139 iwl_set_mode(priv, priv->iw_mode);
2144 queue_work(priv->workqueue, &priv->restart);
2147 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2149 static void __iwl_down(struct iwl_priv *priv)
2151 unsigned long flags;
2152 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2154 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2157 set_bit(STATUS_EXIT_PENDING, &priv->status);
2159 iwl_clear_stations_table(priv);
2161 /* Unblock any waiting calls */
2162 wake_up_interruptible_all(&priv->wait_command_queue);
2164 /* Wipe out the EXIT_PENDING status bit if we are not actually
2165 * exiting the module */
2167 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2169 /* stop and reset the on-board processor */
2170 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2172 /* tell the device to stop sending interrupts */
2173 spin_lock_irqsave(&priv->lock, flags);
2174 iwl_disable_interrupts(priv);
2175 spin_unlock_irqrestore(&priv->lock, flags);
2176 iwl_synchronize_irq(priv);
2178 if (priv->mac80211_registered)
2179 ieee80211_stop_queues(priv->hw);
2181 /* If we have not previously called iwl_init() then
2182 * clear all bits but the RF Kill bit and return */
2183 if (!iwl_is_init(priv)) {
2184 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2186 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2187 STATUS_GEO_CONFIGURED |
2188 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2189 STATUS_EXIT_PENDING;
2193 /* ...otherwise clear out all the status bits but the RF Kill
2194 * bit and continue taking the NIC down. */
2195 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2197 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2198 STATUS_GEO_CONFIGURED |
2199 test_bit(STATUS_FW_ERROR, &priv->status) <<
2201 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2202 STATUS_EXIT_PENDING;
2204 /* device going down, Stop using ICT table */
2205 iwl_disable_ict(priv);
2207 iwl_txq_ctx_stop(priv);
2210 /* Power-down device's busmaster DMA clocks */
2211 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2214 /* Make sure (redundant) we've released our request to stay awake */
2215 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2217 /* Stop the device, and put it in low power state */
2218 priv->cfg->ops->lib->apm_ops.stop(priv);
2221 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2223 if (priv->ibss_beacon)
2224 dev_kfree_skb(priv->ibss_beacon);
2225 priv->ibss_beacon = NULL;
2227 /* clear out any free frames */
2228 iwl_clear_free_frames(priv);
2231 static void iwl_down(struct iwl_priv *priv)
2233 mutex_lock(&priv->mutex);
2235 mutex_unlock(&priv->mutex);
2237 iwl_cancel_deferred_work(priv);
2240 #define HW_READY_TIMEOUT (50)
2242 static int iwl_set_hw_ready(struct iwl_priv *priv)
2246 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2247 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2249 /* See if we got it */
2250 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2251 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2252 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2254 if (ret != -ETIMEDOUT)
2255 priv->hw_ready = true;
2257 priv->hw_ready = false;
2259 IWL_DEBUG_INFO(priv, "hardware %s\n",
2260 (priv->hw_ready == 1) ? "ready" : "not ready");
2264 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2268 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2270 ret = iwl_set_hw_ready(priv);
2274 /* If HW is not ready, prepare the conditions to check again */
2275 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2276 CSR_HW_IF_CONFIG_REG_PREPARE);
2278 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2279 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2280 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2282 /* HW should be ready by now, check again. */
2283 if (ret != -ETIMEDOUT)
2284 iwl_set_hw_ready(priv);
2289 #define MAX_HW_RESTARTS 5
2291 static int __iwl_up(struct iwl_priv *priv)
2296 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2297 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2301 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2302 IWL_ERR(priv, "ucode not available for device bringup\n");
2306 iwl_prepare_card_hw(priv);
2308 if (!priv->hw_ready) {
2309 IWL_WARN(priv, "Exit HW not ready\n");
2313 /* If platform's RF_KILL switch is NOT set to KILL */
2314 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2315 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2317 set_bit(STATUS_RF_KILL_HW, &priv->status);
2319 if (iwl_is_rfkill(priv)) {
2320 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2322 iwl_enable_interrupts(priv);
2323 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2327 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2329 ret = iwl_hw_nic_init(priv);
2331 IWL_ERR(priv, "Unable to init nic\n");
2335 /* make sure rfkill handshake bits are cleared */
2336 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2337 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2338 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2340 /* clear (again), then enable host interrupts */
2341 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2342 iwl_enable_interrupts(priv);
2344 /* really make sure rfkill handshake bits are cleared */
2345 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2346 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2348 /* Copy original ucode data image from disk into backup cache.
2349 * This will be used to initialize the on-board processor's
2350 * data SRAM for a clean start when the runtime program first loads. */
2351 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2352 priv->ucode_data.len);
2354 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2356 iwl_clear_stations_table(priv);
2358 /* load bootstrap state machine,
2359 * load bootstrap program into processor's memory,
2360 * prepare to load the "initialize" uCode */
2361 ret = priv->cfg->ops->lib->load_ucode(priv);
2364 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2369 /* start card; "initialize" will load runtime ucode */
2370 iwl_nic_start(priv);
2372 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2377 set_bit(STATUS_EXIT_PENDING, &priv->status);
2379 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2381 /* tried to restart and config the device for as long as our
2382 * patience could withstand */
2383 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2388 /*****************************************************************************
2390 * Workqueue callbacks
2392 *****************************************************************************/
2394 static void iwl_bg_init_alive_start(struct work_struct *data)
2396 struct iwl_priv *priv =
2397 container_of(data, struct iwl_priv, init_alive_start.work);
2399 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2402 mutex_lock(&priv->mutex);
2403 priv->cfg->ops->lib->init_alive_start(priv);
2404 mutex_unlock(&priv->mutex);
2407 static void iwl_bg_alive_start(struct work_struct *data)
2409 struct iwl_priv *priv =
2410 container_of(data, struct iwl_priv, alive_start.work);
2412 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2415 /* enable dram interrupt */
2416 iwl_reset_ict(priv);
2418 mutex_lock(&priv->mutex);
2419 iwl_alive_start(priv);
2420 mutex_unlock(&priv->mutex);
2423 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2425 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2426 run_time_calib_work);
2428 mutex_lock(&priv->mutex);
2430 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2431 test_bit(STATUS_SCANNING, &priv->status)) {
2432 mutex_unlock(&priv->mutex);
2436 if (priv->start_calib) {
2437 iwl_chain_noise_calibration(priv, &priv->statistics);
2439 iwl_sensitivity_calibration(priv, &priv->statistics);
2442 mutex_unlock(&priv->mutex);
2446 static void iwl_bg_up(struct work_struct *data)
2448 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2450 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2453 mutex_lock(&priv->mutex);
2455 mutex_unlock(&priv->mutex);
2458 static void iwl_bg_restart(struct work_struct *data)
2460 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2462 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2465 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2466 mutex_lock(&priv->mutex);
2469 mutex_unlock(&priv->mutex);
2471 ieee80211_restart_hw(priv->hw);
2474 queue_work(priv->workqueue, &priv->up);
2478 static void iwl_bg_rx_replenish(struct work_struct *data)
2480 struct iwl_priv *priv =
2481 container_of(data, struct iwl_priv, rx_replenish);
2483 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2486 mutex_lock(&priv->mutex);
2487 iwl_rx_replenish(priv);
2488 mutex_unlock(&priv->mutex);
2491 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2493 void iwl_post_associate(struct iwl_priv *priv)
2495 struct ieee80211_conf *conf = NULL;
2497 unsigned long flags;
2499 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2500 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2504 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2505 priv->assoc_id, priv->active_rxon.bssid_addr);
2508 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2512 if (!priv->vif || !priv->is_open)
2515 iwl_scan_cancel_timeout(priv, 200);
2517 conf = ieee80211_get_hw_conf(priv->hw);
2519 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2520 iwlcore_commit_rxon(priv);
2522 iwl_setup_rxon_timing(priv);
2523 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2524 sizeof(priv->rxon_timing), &priv->rxon_timing);
2526 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2527 "Attempting to continue.\n");
2529 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2531 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2533 if (priv->cfg->ops->hcmd->set_rxon_chain)
2534 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2536 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2538 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2539 priv->assoc_id, priv->beacon_int);
2541 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2542 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2544 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2546 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2547 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2548 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2550 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2552 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2553 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2557 iwlcore_commit_rxon(priv);
2559 switch (priv->iw_mode) {
2560 case NL80211_IFTYPE_STATION:
2563 case NL80211_IFTYPE_ADHOC:
2565 /* assume default assoc id */
2568 iwl_rxon_add_station(priv, priv->bssid, 0);
2569 iwl_send_beacon_cmd(priv);
2574 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2575 __func__, priv->iw_mode);
2579 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2580 priv->assoc_station_added = 1;
2582 spin_lock_irqsave(&priv->lock, flags);
2583 iwl_activate_qos(priv, 0);
2584 spin_unlock_irqrestore(&priv->lock, flags);
2586 /* the chain noise calibration will enabled PM upon completion
2587 * If chain noise has already been run, then we need to enable
2588 * power management here */
2589 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2590 iwl_power_update_mode(priv, false);
2592 /* Enable Rx differential gain and sensitivity calibrations */
2593 iwl_chain_noise_reset(priv);
2594 priv->start_calib = 1;
2598 /*****************************************************************************
2600 * mac80211 entry point functions
2602 *****************************************************************************/
2604 #define UCODE_READY_TIMEOUT (4 * HZ)
2607 * Not a mac80211 entry point function, but it fits in with all the
2608 * other mac80211 functions grouped here.
2610 static int iwl_setup_mac(struct iwl_priv *priv)
2613 struct ieee80211_hw *hw = priv->hw;
2614 hw->rate_control_algorithm = "iwl-agn-rs";
2616 /* Tell mac80211 our characteristics */
2617 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2618 IEEE80211_HW_NOISE_DBM |
2619 IEEE80211_HW_AMPDU_AGGREGATION |
2620 IEEE80211_HW_SPECTRUM_MGMT;
2622 if (!priv->cfg->broken_powersave)
2623 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2624 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2626 if (priv->cfg->sku & IWL_SKU_N)
2627 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2628 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2630 hw->sta_data_size = sizeof(struct iwl_station_priv);
2631 hw->wiphy->interface_modes =
2632 BIT(NL80211_IFTYPE_STATION) |
2633 BIT(NL80211_IFTYPE_ADHOC);
2635 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2636 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2639 * For now, disable PS by default because it affects
2640 * RX performance significantly.
2642 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2644 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2645 /* we create the 802.11 header and a zero-length SSID element */
2646 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2648 /* Default value; 4 EDCA QOS priorities */
2651 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2653 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2654 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2655 &priv->bands[IEEE80211_BAND_2GHZ];
2656 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2657 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2658 &priv->bands[IEEE80211_BAND_5GHZ];
2660 ret = ieee80211_register_hw(priv->hw);
2662 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2665 priv->mac80211_registered = 1;
2671 static int iwl_mac_start(struct ieee80211_hw *hw)
2673 struct iwl_priv *priv = hw->priv;
2676 IWL_DEBUG_MAC80211(priv, "enter\n");
2678 /* we should be verifying the device is ready to be opened */
2679 mutex_lock(&priv->mutex);
2681 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2682 * ucode filename and max sizes are card-specific. */
2684 if (!priv->ucode_code.len) {
2685 ret = iwl_read_ucode(priv);
2687 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2688 mutex_unlock(&priv->mutex);
2693 ret = __iwl_up(priv);
2695 mutex_unlock(&priv->mutex);
2700 if (iwl_is_rfkill(priv))
2703 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2705 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2706 * mac80211 will not be run successfully. */
2707 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2708 test_bit(STATUS_READY, &priv->status),
2709 UCODE_READY_TIMEOUT);
2711 if (!test_bit(STATUS_READY, &priv->status)) {
2712 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2713 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2718 iwl_led_start(priv);
2722 IWL_DEBUG_MAC80211(priv, "leave\n");
2726 static void iwl_mac_stop(struct ieee80211_hw *hw)
2728 struct iwl_priv *priv = hw->priv;
2730 IWL_DEBUG_MAC80211(priv, "enter\n");
2737 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2738 /* stop mac, cancel any scan request and clear
2739 * RXON_FILTER_ASSOC_MSK BIT
2741 mutex_lock(&priv->mutex);
2742 iwl_scan_cancel_timeout(priv, 100);
2743 mutex_unlock(&priv->mutex);
2748 flush_workqueue(priv->workqueue);
2750 /* enable interrupts again in order to receive rfkill changes */
2751 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2752 iwl_enable_interrupts(priv);
2754 IWL_DEBUG_MAC80211(priv, "leave\n");
2757 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2759 struct iwl_priv *priv = hw->priv;
2761 IWL_DEBUG_MACDUMP(priv, "enter\n");
2763 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2764 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2766 if (iwl_tx_skb(priv, skb))
2767 dev_kfree_skb_any(skb);
2769 IWL_DEBUG_MACDUMP(priv, "leave\n");
2770 return NETDEV_TX_OK;
2773 void iwl_config_ap(struct iwl_priv *priv)
2776 unsigned long flags;
2778 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2781 /* The following should be done only at AP bring up */
2782 if (!iwl_is_associated(priv)) {
2784 /* RXON - unassoc (to set timing command) */
2785 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2786 iwlcore_commit_rxon(priv);
2789 iwl_setup_rxon_timing(priv);
2790 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2791 sizeof(priv->rxon_timing), &priv->rxon_timing);
2793 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2794 "Attempting to continue.\n");
2796 /* AP has all antennas */
2797 priv->chain_noise_data.active_chains =
2798 priv->hw_params.valid_rx_ant;
2799 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2800 if (priv->cfg->ops->hcmd->set_rxon_chain)
2801 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2803 /* FIXME: what should be the assoc_id for AP? */
2804 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2805 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2806 priv->staging_rxon.flags |=
2807 RXON_FLG_SHORT_PREAMBLE_MSK;
2809 priv->staging_rxon.flags &=
2810 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2812 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2813 if (priv->assoc_capability &
2814 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2815 priv->staging_rxon.flags |=
2816 RXON_FLG_SHORT_SLOT_MSK;
2818 priv->staging_rxon.flags &=
2819 ~RXON_FLG_SHORT_SLOT_MSK;
2821 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2822 priv->staging_rxon.flags &=
2823 ~RXON_FLG_SHORT_SLOT_MSK;
2825 /* restore RXON assoc */
2826 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2827 iwlcore_commit_rxon(priv);
2828 iwl_reset_qos(priv);
2829 spin_lock_irqsave(&priv->lock, flags);
2830 iwl_activate_qos(priv, 1);
2831 spin_unlock_irqrestore(&priv->lock, flags);
2832 iwl_add_bcast_station(priv);
2834 iwl_send_beacon_cmd(priv);
2836 /* FIXME - we need to add code here to detect a totally new
2837 * configuration, reset the AP, unassoc, rxon timing, assoc,
2838 * clear sta table, add BCAST sta... */
2841 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2842 struct ieee80211_key_conf *keyconf, const u8 *addr,
2843 u32 iv32, u16 *phase1key)
2846 struct iwl_priv *priv = hw->priv;
2847 IWL_DEBUG_MAC80211(priv, "enter\n");
2849 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2851 IWL_DEBUG_MAC80211(priv, "leave\n");
2854 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2855 struct ieee80211_vif *vif,
2856 struct ieee80211_sta *sta,
2857 struct ieee80211_key_conf *key)
2859 struct iwl_priv *priv = hw->priv;
2863 bool is_default_wep_key = false;
2865 IWL_DEBUG_MAC80211(priv, "enter\n");
2867 if (priv->cfg->mod_params->sw_crypto) {
2868 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2871 addr = sta ? sta->addr : iwl_bcast_addr;
2872 sta_id = iwl_find_station(priv, addr);
2873 if (sta_id == IWL_INVALID_STATION) {
2874 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2880 mutex_lock(&priv->mutex);
2881 iwl_scan_cancel_timeout(priv, 100);
2882 mutex_unlock(&priv->mutex);
2884 /* If we are getting WEP group key and we didn't receive any key mapping
2885 * so far, we are in legacy wep mode (group key only), otherwise we are
2887 * In legacy wep mode, we use another host command to the uCode */
2888 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2889 priv->iw_mode != NL80211_IFTYPE_AP) {
2891 is_default_wep_key = !priv->key_mapping_key;
2893 is_default_wep_key =
2894 (key->hw_key_idx == HW_KEY_DEFAULT);
2899 if (is_default_wep_key)
2900 ret = iwl_set_default_wep_key(priv, key);
2902 ret = iwl_set_dynamic_key(priv, key, sta_id);
2904 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2907 if (is_default_wep_key)
2908 ret = iwl_remove_default_wep_key(priv, key);
2910 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2912 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2918 IWL_DEBUG_MAC80211(priv, "leave\n");
2923 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2924 struct ieee80211_vif *vif,
2925 enum ieee80211_ampdu_mlme_action action,
2926 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2928 struct iwl_priv *priv = hw->priv;
2931 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2934 if (!(priv->cfg->sku & IWL_SKU_N))
2938 case IEEE80211_AMPDU_RX_START:
2939 IWL_DEBUG_HT(priv, "start Rx\n");
2940 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2941 case IEEE80211_AMPDU_RX_STOP:
2942 IWL_DEBUG_HT(priv, "stop Rx\n");
2943 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2944 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2948 case IEEE80211_AMPDU_TX_START:
2949 IWL_DEBUG_HT(priv, "start Tx\n");
2950 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2951 case IEEE80211_AMPDU_TX_STOP:
2952 IWL_DEBUG_HT(priv, "stop Tx\n");
2953 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2954 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2958 case IEEE80211_AMPDU_TX_OPERATIONAL:
2962 IWL_DEBUG_HT(priv, "unknown\n");
2969 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2970 struct ieee80211_low_level_stats *stats)
2972 struct iwl_priv *priv = hw->priv;
2975 IWL_DEBUG_MAC80211(priv, "enter\n");
2976 IWL_DEBUG_MAC80211(priv, "leave\n");
2981 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2982 struct ieee80211_vif *vif,
2983 enum sta_notify_cmd cmd,
2984 struct ieee80211_sta *sta)
2986 struct iwl_priv *priv = hw->priv;
2987 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2991 * TODO: We really should use this callback to
2992 * actually maintain the station table in
2997 case STA_NOTIFY_ADD:
2998 atomic_set(&sta_priv->pending_frames, 0);
2999 if (vif->type == NL80211_IFTYPE_AP)
3000 sta_priv->client = true;
3002 case STA_NOTIFY_SLEEP:
3003 WARN_ON(!sta_priv->client);
3004 sta_priv->asleep = true;
3005 if (atomic_read(&sta_priv->pending_frames) > 0)
3006 ieee80211_sta_block_awake(hw, sta, true);
3008 case STA_NOTIFY_AWAKE:
3009 WARN_ON(!sta_priv->client);
3010 sta_priv->asleep = false;
3011 sta_id = iwl_find_station(priv, sta->addr);
3012 if (sta_id != IWL_INVALID_STATION)
3013 iwl_sta_modify_ps_wake(priv, sta_id);
3020 /*****************************************************************************
3024 *****************************************************************************/
3026 #ifdef CONFIG_IWLWIFI_DEBUG
3029 * The following adds a new attribute to the sysfs representation
3030 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3031 * used for controlling the debug level.
3033 * See the level definitions in iwl for details.
3035 * The debug_level being managed using sysfs below is a per device debug
3036 * level that is used instead of the global debug level if it (the per
3037 * device debug level) is set.
3039 static ssize_t show_debug_level(struct device *d,
3040 struct device_attribute *attr, char *buf)
3042 struct iwl_priv *priv = dev_get_drvdata(d);
3043 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3045 static ssize_t store_debug_level(struct device *d,
3046 struct device_attribute *attr,
3047 const char *buf, size_t count)
3049 struct iwl_priv *priv = dev_get_drvdata(d);
3053 ret = strict_strtoul(buf, 0, &val);
3055 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3057 priv->debug_level = val;
3058 if (iwl_alloc_traffic_mem(priv))
3060 "Not enough memory to generate traffic log\n");
3062 return strnlen(buf, count);
3065 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3066 show_debug_level, store_debug_level);
3069 #endif /* CONFIG_IWLWIFI_DEBUG */
3072 static ssize_t show_temperature(struct device *d,
3073 struct device_attribute *attr, char *buf)
3075 struct iwl_priv *priv = dev_get_drvdata(d);
3077 if (!iwl_is_alive(priv))
3080 return sprintf(buf, "%d\n", priv->temperature);
3083 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3085 static ssize_t show_tx_power(struct device *d,
3086 struct device_attribute *attr, char *buf)
3088 struct iwl_priv *priv = dev_get_drvdata(d);
3090 if (!iwl_is_ready_rf(priv))
3091 return sprintf(buf, "off\n");
3093 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3096 static ssize_t store_tx_power(struct device *d,
3097 struct device_attribute *attr,
3098 const char *buf, size_t count)
3100 struct iwl_priv *priv = dev_get_drvdata(d);
3104 ret = strict_strtoul(buf, 10, &val);
3106 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3108 ret = iwl_set_tx_power(priv, val, false);
3110 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3118 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3120 static ssize_t show_flags(struct device *d,
3121 struct device_attribute *attr, char *buf)
3123 struct iwl_priv *priv = dev_get_drvdata(d);
3125 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3128 static ssize_t store_flags(struct device *d,
3129 struct device_attribute *attr,
3130 const char *buf, size_t count)
3132 struct iwl_priv *priv = dev_get_drvdata(d);
3135 int ret = strict_strtoul(buf, 0, &val);
3140 mutex_lock(&priv->mutex);
3141 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3142 /* Cancel any currently running scans... */
3143 if (iwl_scan_cancel_timeout(priv, 100))
3144 IWL_WARN(priv, "Could not cancel scan.\n");
3146 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3147 priv->staging_rxon.flags = cpu_to_le32(flags);
3148 iwlcore_commit_rxon(priv);
3151 mutex_unlock(&priv->mutex);
3156 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3158 static ssize_t show_filter_flags(struct device *d,
3159 struct device_attribute *attr, char *buf)
3161 struct iwl_priv *priv = dev_get_drvdata(d);
3163 return sprintf(buf, "0x%04X\n",
3164 le32_to_cpu(priv->active_rxon.filter_flags));
3167 static ssize_t store_filter_flags(struct device *d,
3168 struct device_attribute *attr,
3169 const char *buf, size_t count)
3171 struct iwl_priv *priv = dev_get_drvdata(d);
3174 int ret = strict_strtoul(buf, 0, &val);
3177 filter_flags = (u32)val;
3179 mutex_lock(&priv->mutex);
3180 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3181 /* Cancel any currently running scans... */
3182 if (iwl_scan_cancel_timeout(priv, 100))
3183 IWL_WARN(priv, "Could not cancel scan.\n");
3185 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3186 "0x%04X\n", filter_flags);
3187 priv->staging_rxon.filter_flags =
3188 cpu_to_le32(filter_flags);
3189 iwlcore_commit_rxon(priv);
3192 mutex_unlock(&priv->mutex);
3197 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3198 store_filter_flags);
3201 static ssize_t show_statistics(struct device *d,
3202 struct device_attribute *attr, char *buf)
3204 struct iwl_priv *priv = dev_get_drvdata(d);
3205 u32 size = sizeof(struct iwl_notif_statistics);
3206 u32 len = 0, ofs = 0;
3207 u8 *data = (u8 *)&priv->statistics;
3210 if (!iwl_is_alive(priv))
3213 mutex_lock(&priv->mutex);
3214 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3215 mutex_unlock(&priv->mutex);
3219 "Error sending statistics request: 0x%08X\n", rc);
3223 while (size && (PAGE_SIZE - len)) {
3224 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3225 PAGE_SIZE - len, 1);
3227 if (PAGE_SIZE - len)
3231 size -= min(size, 16U);
3237 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3239 static ssize_t show_rts_ht_protection(struct device *d,
3240 struct device_attribute *attr, char *buf)
3242 struct iwl_priv *priv = dev_get_drvdata(d);
3244 return sprintf(buf, "%s\n",
3245 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3248 static ssize_t store_rts_ht_protection(struct device *d,
3249 struct device_attribute *attr,
3250 const char *buf, size_t count)
3252 struct iwl_priv *priv = dev_get_drvdata(d);
3256 ret = strict_strtoul(buf, 10, &val);
3258 IWL_INFO(priv, "Input is not in decimal form.\n");
3260 if (!iwl_is_associated(priv))
3261 priv->cfg->use_rts_for_ht = val ? true : false;
3263 IWL_ERR(priv, "Sta associated with AP - "
3264 "Change protection mechanism is not allowed\n");
3270 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3271 show_rts_ht_protection, store_rts_ht_protection);
3274 /*****************************************************************************
3276 * driver setup and teardown
3278 *****************************************************************************/
3280 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3282 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3284 init_waitqueue_head(&priv->wait_command_queue);
3286 INIT_WORK(&priv->up, iwl_bg_up);
3287 INIT_WORK(&priv->restart, iwl_bg_restart);
3288 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3289 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3290 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3291 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3292 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3294 iwl_setup_scan_deferred_work(priv);
3296 if (priv->cfg->ops->lib->setup_deferred_work)
3297 priv->cfg->ops->lib->setup_deferred_work(priv);
3299 init_timer(&priv->statistics_periodic);
3300 priv->statistics_periodic.data = (unsigned long)priv;
3301 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3303 init_timer(&priv->ucode_trace);
3304 priv->ucode_trace.data = (unsigned long)priv;
3305 priv->ucode_trace.function = iwl_bg_ucode_trace;
3307 if (!priv->cfg->use_isr_legacy)
3308 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3309 iwl_irq_tasklet, (unsigned long)priv);
3311 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3312 iwl_irq_tasklet_legacy, (unsigned long)priv);
3315 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3317 if (priv->cfg->ops->lib->cancel_deferred_work)
3318 priv->cfg->ops->lib->cancel_deferred_work(priv);
3320 cancel_delayed_work_sync(&priv->init_alive_start);
3321 cancel_delayed_work(&priv->scan_check);
3322 cancel_delayed_work(&priv->alive_start);
3323 cancel_work_sync(&priv->beacon_update);
3324 del_timer_sync(&priv->statistics_periodic);
3325 del_timer_sync(&priv->ucode_trace);
3328 static void iwl_init_hw_rates(struct iwl_priv *priv,
3329 struct ieee80211_rate *rates)
3333 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3334 rates[i].bitrate = iwl_rates[i].ieee * 5;
3335 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3336 rates[i].hw_value_short = i;
3338 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3340 * If CCK != 1M then set short preamble rate flag.
3343 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3344 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3349 static int iwl_init_drv(struct iwl_priv *priv)
3353 priv->ibss_beacon = NULL;
3355 spin_lock_init(&priv->sta_lock);
3356 spin_lock_init(&priv->hcmd_lock);
3358 INIT_LIST_HEAD(&priv->free_frames);
3360 mutex_init(&priv->mutex);
3362 /* Clear the driver's (not device's) station table */
3363 iwl_clear_stations_table(priv);
3365 priv->ieee_channels = NULL;
3366 priv->ieee_rates = NULL;
3367 priv->band = IEEE80211_BAND_2GHZ;
3369 priv->iw_mode = NL80211_IFTYPE_STATION;
3370 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3372 /* Choose which receivers/antennas to use */
3373 if (priv->cfg->ops->hcmd->set_rxon_chain)
3374 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3376 iwl_init_scan_params(priv);
3378 iwl_reset_qos(priv);
3380 priv->qos_data.qos_active = 0;
3381 priv->qos_data.qos_cap.val = 0;
3383 priv->rates_mask = IWL_RATES_MASK;
3384 /* Set the tx_power_user_lmt to the lowest power level
3385 * this value will get overwritten by channel max power avg
3387 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3389 ret = iwl_init_channel_map(priv);
3391 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3395 ret = iwlcore_init_geos(priv);
3397 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3398 goto err_free_channel_map;
3400 iwl_init_hw_rates(priv, priv->ieee_rates);
3404 err_free_channel_map:
3405 iwl_free_channel_map(priv);
3410 static void iwl_uninit_drv(struct iwl_priv *priv)
3412 iwl_calib_free_results(priv);
3413 iwlcore_free_geos(priv);
3414 iwl_free_channel_map(priv);
3418 static struct attribute *iwl_sysfs_entries[] = {
3419 &dev_attr_flags.attr,
3420 &dev_attr_filter_flags.attr,
3421 &dev_attr_statistics.attr,
3422 &dev_attr_temperature.attr,
3423 &dev_attr_tx_power.attr,
3424 &dev_attr_rts_ht_protection.attr,
3425 #ifdef CONFIG_IWLWIFI_DEBUG
3426 &dev_attr_debug_level.attr,
3431 static struct attribute_group iwl_attribute_group = {
3432 .name = NULL, /* put in device directory */
3433 .attrs = iwl_sysfs_entries,
3436 static struct ieee80211_ops iwl_hw_ops = {
3438 .start = iwl_mac_start,
3439 .stop = iwl_mac_stop,
3440 .add_interface = iwl_mac_add_interface,
3441 .remove_interface = iwl_mac_remove_interface,
3442 .config = iwl_mac_config,
3443 .configure_filter = iwl_configure_filter,
3444 .set_key = iwl_mac_set_key,
3445 .update_tkip_key = iwl_mac_update_tkip_key,
3446 .get_stats = iwl_mac_get_stats,
3447 .get_tx_stats = iwl_mac_get_tx_stats,
3448 .conf_tx = iwl_mac_conf_tx,
3449 .reset_tsf = iwl_mac_reset_tsf,
3450 .bss_info_changed = iwl_bss_info_changed,
3451 .ampdu_action = iwl_mac_ampdu_action,
3452 .hw_scan = iwl_mac_hw_scan,
3453 .sta_notify = iwl_mac_sta_notify,
3456 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3459 struct iwl_priv *priv;
3460 struct ieee80211_hw *hw;
3461 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3462 unsigned long flags;
3465 /************************
3466 * 1. Allocating HW data
3467 ************************/
3469 /* Disabling hardware scan means that mac80211 will perform scans
3470 * "the hard way", rather than using device's scan. */
3471 if (cfg->mod_params->disable_hw_scan) {
3472 if (iwl_debug_level & IWL_DL_INFO)
3473 dev_printk(KERN_DEBUG, &(pdev->dev),
3474 "Disabling hw_scan\n");
3475 iwl_hw_ops.hw_scan = NULL;
3478 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3484 /* At this point both hw and priv are allocated. */
3486 SET_IEEE80211_DEV(hw, &pdev->dev);
3488 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3490 priv->pci_dev = pdev;
3491 priv->inta_mask = CSR_INI_SET_MASK;
3493 #ifdef CONFIG_IWLWIFI_DEBUG
3494 atomic_set(&priv->restrict_refcnt, 0);
3496 if (iwl_alloc_traffic_mem(priv))
3497 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3499 /**************************
3500 * 2. Initializing PCI bus
3501 **************************/
3502 if (pci_enable_device(pdev)) {
3504 goto out_ieee80211_free_hw;
3507 pci_set_master(pdev);
3509 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3511 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3513 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3515 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3516 /* both attempts failed: */
3518 IWL_WARN(priv, "No suitable DMA available.\n");
3519 goto out_pci_disable_device;
3523 err = pci_request_regions(pdev, DRV_NAME);
3525 goto out_pci_disable_device;
3527 pci_set_drvdata(pdev, priv);
3530 /***********************
3531 * 3. Read REV register
3532 ***********************/
3533 priv->hw_base = pci_iomap(pdev, 0, 0);
3534 if (!priv->hw_base) {
3536 goto out_pci_release_regions;
3539 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3540 (unsigned long long) pci_resource_len(pdev, 0));
3541 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3543 /* these spin locks will be used in apm_ops.init and EEPROM access
3544 * we should init now
3546 spin_lock_init(&priv->reg_lock);
3547 spin_lock_init(&priv->lock);
3548 iwl_hw_detect(priv);
3549 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3550 priv->cfg->name, priv->hw_rev);
3552 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3553 * PCI Tx retries from interfering with C3 CPU state */
3554 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3556 iwl_prepare_card_hw(priv);
3557 if (!priv->hw_ready) {
3558 IWL_WARN(priv, "Failed, HW not ready\n");
3565 /* Read the EEPROM */
3566 err = iwl_eeprom_init(priv);
3568 IWL_ERR(priv, "Unable to init EEPROM\n");
3571 err = iwl_eeprom_check_version(priv);
3573 goto out_free_eeprom;
3575 /* extract MAC Address */
3576 iwl_eeprom_get_mac(priv, priv->mac_addr);
3577 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3578 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3580 /************************
3581 * 5. Setup HW constants
3582 ************************/
3583 if (iwl_set_hw_params(priv)) {
3584 IWL_ERR(priv, "failed to set hw parameters\n");
3585 goto out_free_eeprom;
3588 /*******************
3590 *******************/
3592 err = iwl_init_drv(priv);
3594 goto out_free_eeprom;
3595 /* At this point both hw and priv are initialized. */
3597 /********************
3599 ********************/
3600 spin_lock_irqsave(&priv->lock, flags);
3601 iwl_disable_interrupts(priv);
3602 spin_unlock_irqrestore(&priv->lock, flags);
3604 pci_enable_msi(priv->pci_dev);
3606 iwl_alloc_isr_ict(priv);
3607 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3608 IRQF_SHARED, DRV_NAME, priv);
3610 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3611 goto out_disable_msi;
3613 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3615 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3619 iwl_setup_deferred_work(priv);
3620 iwl_setup_rx_handlers(priv);
3622 /**********************************
3623 * 8. Setup and register mac80211
3624 **********************************/
3626 /* enable interrupts if needed: hw bug w/a */
3627 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3628 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3629 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3630 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3633 iwl_enable_interrupts(priv);
3635 err = iwl_setup_mac(priv);
3637 goto out_remove_sysfs;
3639 err = iwl_dbgfs_register(priv, DRV_NAME);
3641 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3643 /* If platform's RF_KILL switch is NOT set to KILL */
3644 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3645 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3647 set_bit(STATUS_RF_KILL_HW, &priv->status);
3649 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3650 test_bit(STATUS_RF_KILL_HW, &priv->status));
3652 iwl_power_initialize(priv);
3653 iwl_tt_initialize(priv);
3657 destroy_workqueue(priv->workqueue);
3658 priv->workqueue = NULL;
3659 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3661 free_irq(priv->pci_dev->irq, priv);
3662 iwl_free_isr_ict(priv);
3664 pci_disable_msi(priv->pci_dev);
3665 iwl_uninit_drv(priv);
3667 iwl_eeprom_free(priv);
3669 pci_iounmap(pdev, priv->hw_base);
3670 out_pci_release_regions:
3671 pci_set_drvdata(pdev, NULL);
3672 pci_release_regions(pdev);
3673 out_pci_disable_device:
3674 pci_disable_device(pdev);
3675 out_ieee80211_free_hw:
3676 iwl_free_traffic_mem(priv);
3677 ieee80211_free_hw(priv->hw);
3682 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3684 struct iwl_priv *priv = pci_get_drvdata(pdev);
3685 unsigned long flags;
3690 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3692 iwl_dbgfs_unregister(priv);
3693 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3695 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3696 * to be called and iwl_down since we are removing the device
3697 * we need to set STATUS_EXIT_PENDING bit.
3699 set_bit(STATUS_EXIT_PENDING, &priv->status);
3700 if (priv->mac80211_registered) {
3701 ieee80211_unregister_hw(priv->hw);
3702 priv->mac80211_registered = 0;
3708 * Make sure device is reset to low power before unloading driver.
3709 * This may be redundant with iwl_down(), but there are paths to
3710 * run iwl_down() without calling apm_ops.stop(), and there are
3711 * paths to avoid running iwl_down() at all before leaving driver.
3712 * This (inexpensive) call *makes sure* device is reset.
3714 priv->cfg->ops->lib->apm_ops.stop(priv);
3718 /* make sure we flush any pending irq or
3719 * tasklet for the driver
3721 spin_lock_irqsave(&priv->lock, flags);
3722 iwl_disable_interrupts(priv);
3723 spin_unlock_irqrestore(&priv->lock, flags);
3725 iwl_synchronize_irq(priv);
3727 iwl_dealloc_ucode_pci(priv);
3730 iwl_rx_queue_free(priv, &priv->rxq);
3731 iwl_hw_txq_ctx_free(priv);
3733 iwl_clear_stations_table(priv);
3734 iwl_eeprom_free(priv);
3737 /*netif_stop_queue(dev); */
3738 flush_workqueue(priv->workqueue);
3740 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3741 * priv->workqueue... so we can't take down the workqueue
3743 destroy_workqueue(priv->workqueue);
3744 priv->workqueue = NULL;
3745 iwl_free_traffic_mem(priv);
3747 free_irq(priv->pci_dev->irq, priv);
3748 pci_disable_msi(priv->pci_dev);
3749 pci_iounmap(pdev, priv->hw_base);
3750 pci_release_regions(pdev);
3751 pci_disable_device(pdev);
3752 pci_set_drvdata(pdev, NULL);
3754 iwl_uninit_drv(priv);
3756 iwl_free_isr_ict(priv);
3758 if (priv->ibss_beacon)
3759 dev_kfree_skb(priv->ibss_beacon);
3761 ieee80211_free_hw(priv->hw);
3765 /*****************************************************************************
3767 * driver and module entry point
3769 *****************************************************************************/
3771 /* Hardware specific file defines the PCI IDs table for that hardware module */
3772 static struct pci_device_id iwl_hw_card_ids[] = {
3773 #ifdef CONFIG_IWL4965
3774 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3775 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3776 #endif /* CONFIG_IWL4965 */
3777 #ifdef CONFIG_IWL5000
3778 /* 5100 Series WiFi */
3779 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3780 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3781 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3782 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3783 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3784 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3785 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3786 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3787 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3788 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3789 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3790 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3791 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3792 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3793 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3794 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3795 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3796 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3797 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3798 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3799 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3800 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3801 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3802 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3804 /* 5300 Series WiFi */
3805 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3806 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3807 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3809 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3810 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3811 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3813 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3814 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3815 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3816 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3818 /* 5350 Series WiFi/WiMax */
3819 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3820 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3821 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3823 /* 5150 Series Wifi/WiMax */
3824 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3825 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3826 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3827 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3828 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3829 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3831 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3832 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3833 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3834 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3837 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3838 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3839 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3840 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3841 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3842 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3843 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3844 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3845 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3846 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3848 /* 6x50 WiFi/WiMax Series */
3849 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3850 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3851 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3852 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3853 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3854 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3856 /* 1000 Series WiFi */
3857 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3858 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3859 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3860 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3861 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3862 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3863 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3864 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3865 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3866 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3867 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3868 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3869 #endif /* CONFIG_IWL5000 */
3873 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3875 static struct pci_driver iwl_driver = {
3877 .id_table = iwl_hw_card_ids,
3878 .probe = iwl_pci_probe,
3879 .remove = __devexit_p(iwl_pci_remove),
3881 .suspend = iwl_pci_suspend,
3882 .resume = iwl_pci_resume,
3886 static int __init iwl_init(void)
3890 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3891 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3893 ret = iwlagn_rate_control_register();
3895 printk(KERN_ERR DRV_NAME
3896 "Unable to register rate control algorithm: %d\n", ret);
3900 ret = pci_register_driver(&iwl_driver);
3902 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3903 goto error_register;
3909 iwlagn_rate_control_unregister();
3913 static void __exit iwl_exit(void)
3915 pci_unregister_driver(&iwl_driver);
3916 iwlagn_rate_control_unregister();
3919 module_exit(iwl_exit);
3920 module_init(iwl_init);
3922 #ifdef CONFIG_IWLWIFI_DEBUG
3923 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3924 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3925 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3926 MODULE_PARM_DESC(debug, "debug output mask");