3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/wireless.h>
39 #include <linux/workqueue.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/slab.h>
45 #include <asm/unaligned.h>
47 #include "b43legacy.h"
58 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
59 MODULE_AUTHOR("Martin Langer");
60 MODULE_AUTHOR("Stefano Brivio");
61 MODULE_AUTHOR("Michael Buesch");
62 MODULE_LICENSE("GPL");
64 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
65 MODULE_FIRMWARE("b43legacy/ucode2.fw");
66 MODULE_FIRMWARE("b43legacy/ucode4.fw");
68 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
69 static int modparam_pio;
70 module_param_named(pio, modparam_pio, int, 0444);
71 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
72 #elif defined(CONFIG_B43LEGACY_DMA)
73 # define modparam_pio 0
74 #elif defined(CONFIG_B43LEGACY_PIO)
75 # define modparam_pio 1
78 static int modparam_bad_frames_preempt;
79 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
80 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
83 static char modparam_fwpostfix[16];
84 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
85 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
87 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
88 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
89 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
90 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
93 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
96 /* Channel and ratetables are shared for all devices.
97 * They can't be const, because ieee80211 puts some precalculated
98 * data in there. This data is the same for all devices, so we don't
99 * get concurrency issues */
100 #define RATETAB_ENT(_rateid, _flags) \
102 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
103 .hw_value = (_rateid), \
107 * NOTE: When changing this, sync with xmit.c's
108 * b43legacy_plcp_get_bitrate_idx_* functions!
110 static struct ieee80211_rate __b43legacy_ratetable[] = {
111 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
112 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
113 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
114 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
115 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
119 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
120 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
121 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
122 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
124 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
125 #define b43legacy_b_ratetable_size 4
126 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
127 #define b43legacy_g_ratetable_size 12
129 #define CHANTAB_ENT(_chanid, _freq) \
131 .center_freq = (_freq), \
132 .hw_value = (_chanid), \
134 static struct ieee80211_channel b43legacy_bg_chantable[] = {
135 CHANTAB_ENT(1, 2412),
136 CHANTAB_ENT(2, 2417),
137 CHANTAB_ENT(3, 2422),
138 CHANTAB_ENT(4, 2427),
139 CHANTAB_ENT(5, 2432),
140 CHANTAB_ENT(6, 2437),
141 CHANTAB_ENT(7, 2442),
142 CHANTAB_ENT(8, 2447),
143 CHANTAB_ENT(9, 2452),
144 CHANTAB_ENT(10, 2457),
145 CHANTAB_ENT(11, 2462),
146 CHANTAB_ENT(12, 2467),
147 CHANTAB_ENT(13, 2472),
148 CHANTAB_ENT(14, 2484),
151 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
152 .channels = b43legacy_bg_chantable,
153 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
154 .bitrates = b43legacy_b_ratetable,
155 .n_bitrates = b43legacy_b_ratetable_size,
158 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
159 .channels = b43legacy_bg_chantable,
160 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
161 .bitrates = b43legacy_g_ratetable,
162 .n_bitrates = b43legacy_g_ratetable_size,
165 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
166 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
167 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
168 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
171 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
173 if (!wl || !wl->current_dev)
175 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
177 /* We are up and running.
178 * Ratelimit the messages to avoid DoS over the net. */
179 return net_ratelimit();
182 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
186 if (!b43legacy_ratelimit(wl))
189 printk(KERN_INFO "b43legacy-%s: ",
190 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
195 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
199 if (!b43legacy_ratelimit(wl))
202 printk(KERN_ERR "b43legacy-%s ERROR: ",
203 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
208 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
212 if (!b43legacy_ratelimit(wl))
215 printk(KERN_WARNING "b43legacy-%s warning: ",
216 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
222 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
227 printk(KERN_DEBUG "b43legacy-%s debug: ",
228 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
234 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
239 B43legacy_WARN_ON(offset % 4 != 0);
241 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
242 if (status & B43legacy_MACCTL_BE)
245 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
247 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
251 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
252 u16 routing, u16 offset)
256 /* "offset" is the WORD offset. */
261 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
264 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
265 u16 routing, u16 offset)
269 if (routing == B43legacy_SHM_SHARED) {
270 B43legacy_WARN_ON((offset & 0x0001) != 0);
271 if (offset & 0x0003) {
272 /* Unaligned access */
273 b43legacy_shm_control_word(dev, routing, offset >> 2);
274 ret = b43legacy_read16(dev,
275 B43legacy_MMIO_SHM_DATA_UNALIGNED);
277 b43legacy_shm_control_word(dev, routing,
279 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
285 b43legacy_shm_control_word(dev, routing, offset);
286 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
291 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
292 u16 routing, u16 offset)
296 if (routing == B43legacy_SHM_SHARED) {
297 B43legacy_WARN_ON((offset & 0x0001) != 0);
298 if (offset & 0x0003) {
299 /* Unaligned access */
300 b43legacy_shm_control_word(dev, routing, offset >> 2);
301 ret = b43legacy_read16(dev,
302 B43legacy_MMIO_SHM_DATA_UNALIGNED);
308 b43legacy_shm_control_word(dev, routing, offset);
309 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
314 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
315 u16 routing, u16 offset,
318 if (routing == B43legacy_SHM_SHARED) {
319 B43legacy_WARN_ON((offset & 0x0001) != 0);
320 if (offset & 0x0003) {
321 /* Unaligned access */
322 b43legacy_shm_control_word(dev, routing, offset >> 2);
324 b43legacy_write16(dev,
325 B43legacy_MMIO_SHM_DATA_UNALIGNED,
326 (value >> 16) & 0xffff);
328 b43legacy_shm_control_word(dev, routing,
331 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
337 b43legacy_shm_control_word(dev, routing, offset);
339 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
342 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
345 if (routing == B43legacy_SHM_SHARED) {
346 B43legacy_WARN_ON((offset & 0x0001) != 0);
347 if (offset & 0x0003) {
348 /* Unaligned access */
349 b43legacy_shm_control_word(dev, routing, offset >> 2);
351 b43legacy_write16(dev,
352 B43legacy_MMIO_SHM_DATA_UNALIGNED,
358 b43legacy_shm_control_word(dev, routing, offset);
360 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
364 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
368 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
369 B43legacy_SHM_SH_HOSTFHI);
371 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
372 B43legacy_SHM_SH_HOSTFLO);
377 /* Write HostFlags */
378 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
380 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
381 B43legacy_SHM_SH_HOSTFLO,
382 (value & 0x0000FFFF));
383 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
384 B43legacy_SHM_SH_HOSTFHI,
385 ((value & 0xFFFF0000) >> 16));
388 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
390 /* We need to be careful. As we read the TSF from multiple
391 * registers, we should take care of register overflows.
392 * In theory, the whole tsf read process should be atomic.
393 * We try to be atomic here, by restaring the read process,
394 * if any of the high registers changed (overflew).
396 if (dev->dev->id.revision >= 3) {
402 high = b43legacy_read32(dev,
403 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
404 low = b43legacy_read32(dev,
405 B43legacy_MMIO_REV3PLUS_TSF_LOW);
406 high2 = b43legacy_read32(dev,
407 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
408 } while (unlikely(high != high2));
424 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
425 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
426 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
427 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
429 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
430 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
431 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
432 } while (v3 != test3 || v2 != test2 || v1 != test1);
446 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
450 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
451 status |= B43legacy_MACCTL_TBTTHOLD;
452 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
456 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
460 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
461 status &= ~B43legacy_MACCTL_TBTTHOLD;
462 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
465 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
467 /* Be careful with the in-progress timer.
468 * First zero out the low register, so we have a full
469 * register-overflow duration to complete the operation.
471 if (dev->dev->id.revision >= 3) {
472 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
473 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
475 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
477 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
480 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
483 u16 v0 = (tsf & 0x000000000000FFFFULL);
484 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
485 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
486 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
488 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
490 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
492 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
494 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
496 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
500 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
502 b43legacy_time_lock(dev);
503 b43legacy_tsf_write_locked(dev, tsf);
504 b43legacy_time_unlock(dev);
508 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
509 u16 offset, const u8 *mac)
511 static const u8 zero_addr[ETH_ALEN] = { 0 };
518 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
522 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
525 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
528 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
531 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
533 static const u8 zero_addr[ETH_ALEN] = { 0 };
534 const u8 *mac = dev->wl->mac_addr;
535 const u8 *bssid = dev->wl->bssid;
536 u8 mac_bssid[ETH_ALEN * 2];
545 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
547 memcpy(mac_bssid, mac, ETH_ALEN);
548 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
550 /* Write our MAC address and BSSID to template ram */
551 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
552 tmp = (u32)(mac_bssid[i + 0]);
553 tmp |= (u32)(mac_bssid[i + 1]) << 8;
554 tmp |= (u32)(mac_bssid[i + 2]) << 16;
555 tmp |= (u32)(mac_bssid[i + 3]) << 24;
556 b43legacy_ram_write(dev, 0x20 + i, tmp);
557 b43legacy_ram_write(dev, 0x78 + i, tmp);
558 b43legacy_ram_write(dev, 0x478 + i, tmp);
562 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
564 b43legacy_write_mac_bssid_templates(dev);
565 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
569 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
572 /* slot_time is in usec. */
573 if (dev->phy.type != B43legacy_PHYTYPE_G)
575 b43legacy_write16(dev, 0x684, 510 + slot_time);
576 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
580 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
582 b43legacy_set_slot_time(dev, 9);
585 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
587 b43legacy_set_slot_time(dev, 20);
590 /* Synchronize IRQ top- and bottom-half.
591 * IRQs must be masked before calling this.
592 * This must not be called with the irq_lock held.
594 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
596 synchronize_irq(dev->dev->irq);
597 tasklet_kill(&dev->isr_tasklet);
600 /* DummyTransmission function, as documented on
601 * http://bcm-specs.sipsolutions.net/DummyTransmission
603 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
605 struct b43legacy_phy *phy = &dev->phy;
607 unsigned int max_loop;
618 case B43legacy_PHYTYPE_B:
619 case B43legacy_PHYTYPE_G:
621 buffer[0] = 0x000B846E;
628 for (i = 0; i < 5; i++)
629 b43legacy_ram_write(dev, i * 4, buffer[i]);
631 /* dummy read follows */
632 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
634 b43legacy_write16(dev, 0x0568, 0x0000);
635 b43legacy_write16(dev, 0x07C0, 0x0000);
636 b43legacy_write16(dev, 0x050C, 0x0000);
637 b43legacy_write16(dev, 0x0508, 0x0000);
638 b43legacy_write16(dev, 0x050A, 0x0000);
639 b43legacy_write16(dev, 0x054C, 0x0000);
640 b43legacy_write16(dev, 0x056A, 0x0014);
641 b43legacy_write16(dev, 0x0568, 0x0826);
642 b43legacy_write16(dev, 0x0500, 0x0000);
643 b43legacy_write16(dev, 0x0502, 0x0030);
645 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
646 b43legacy_radio_write16(dev, 0x0051, 0x0017);
647 for (i = 0x00; i < max_loop; i++) {
648 value = b43legacy_read16(dev, 0x050E);
653 for (i = 0x00; i < 0x0A; i++) {
654 value = b43legacy_read16(dev, 0x050E);
659 for (i = 0x00; i < 0x0A; i++) {
660 value = b43legacy_read16(dev, 0x0690);
661 if (!(value & 0x0100))
665 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
666 b43legacy_radio_write16(dev, 0x0051, 0x0037);
669 /* Turn the Analog ON/OFF */
670 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
672 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
675 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
680 flags |= B43legacy_TMSLOW_PHYCLKEN;
681 flags |= B43legacy_TMSLOW_PHYRESET;
682 ssb_device_enable(dev->dev, flags);
683 msleep(2); /* Wait for the PLL to turn on. */
685 /* Now take the PHY out of Reset again */
686 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
687 tmslow |= SSB_TMSLOW_FGC;
688 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
689 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
690 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
692 tmslow &= ~SSB_TMSLOW_FGC;
693 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
694 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
698 b43legacy_switch_analog(dev, 1);
700 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
701 macctl &= ~B43legacy_MACCTL_GMODE;
702 if (flags & B43legacy_TMSLOW_GMODE) {
703 macctl |= B43legacy_MACCTL_GMODE;
707 macctl |= B43legacy_MACCTL_IHR_ENABLED;
708 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
711 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
716 struct b43legacy_txstatus stat;
719 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
720 if (!(v0 & 0x00000001))
722 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
724 stat.cookie = (v0 >> 16);
725 stat.seq = (v1 & 0x0000FFFF);
726 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
727 tmp = (v0 & 0x0000FFFF);
728 stat.frame_count = ((tmp & 0xF000) >> 12);
729 stat.rts_count = ((tmp & 0x0F00) >> 8);
730 stat.supp_reason = ((tmp & 0x001C) >> 2);
731 stat.pm_indicated = !!(tmp & 0x0080);
732 stat.intermediate = !!(tmp & 0x0040);
733 stat.for_ampdu = !!(tmp & 0x0020);
734 stat.acked = !!(tmp & 0x0002);
736 b43legacy_handle_txstatus(dev, &stat);
740 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
744 if (dev->dev->id.revision < 5)
746 /* Read all entries from the microcode TXstatus FIFO
747 * and throw them away.
750 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
751 if (!(dummy & 0x00000001))
753 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
757 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
761 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
763 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
768 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
770 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
771 (jssi & 0x0000FFFF));
772 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
773 (jssi & 0xFFFF0000) >> 16);
776 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
778 b43legacy_jssi_write(dev, 0x7F7F7F7F);
779 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
780 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
781 | B43legacy_MACCMD_BGNOISE);
782 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
786 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
788 /* Top half of Link Quality calculation. */
790 if (dev->noisecalc.calculation_running)
792 dev->noisecalc.channel_at_start = dev->phy.channel;
793 dev->noisecalc.calculation_running = 1;
794 dev->noisecalc.nr_samples = 0;
796 b43legacy_generate_noise_sample(dev);
799 static void handle_irq_noise(struct b43legacy_wldev *dev)
801 struct b43legacy_phy *phy = &dev->phy;
808 /* Bottom half of Link Quality calculation. */
810 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
811 if (dev->noisecalc.channel_at_start != phy->channel)
812 goto drop_calculation;
813 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
814 if (noise[0] == 0x7F || noise[1] == 0x7F ||
815 noise[2] == 0x7F || noise[3] == 0x7F)
818 /* Get the noise samples. */
819 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
820 i = dev->noisecalc.nr_samples;
821 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
822 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
823 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
824 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
825 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
826 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
827 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
828 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
829 dev->noisecalc.nr_samples++;
830 if (dev->noisecalc.nr_samples == 8) {
831 /* Calculate the Link Quality by the noise samples. */
833 for (i = 0; i < 8; i++) {
834 for (j = 0; j < 4; j++)
835 average += dev->noisecalc.samples[i][j];
841 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
843 tmp = (tmp / 128) & 0x1F;
853 dev->stats.link_noise = average;
855 dev->noisecalc.calculation_running = 0;
859 b43legacy_generate_noise_sample(dev);
862 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
864 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
867 if (1/*FIXME: the last PSpoll frame was sent successfully */)
868 b43legacy_power_saving_ctl_bits(dev, -1, -1);
870 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
874 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
876 if (dev->dfq_valid) {
877 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
878 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
879 | B43legacy_MACCMD_DFQ_VALID);
884 static void handle_irq_pmq(struct b43legacy_wldev *dev)
891 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
892 if (!(tmp & 0x00000008))
895 /* 16bit write is odd, but correct. */
896 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
899 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
900 const u8 *data, u16 size,
902 u16 shm_size_offset, u8 rate)
906 struct b43legacy_plcp_hdr4 plcp;
909 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
910 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
911 ram_offset += sizeof(u32);
912 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
913 * So leave the first two bytes of the next write blank.
915 tmp = (u32)(data[0]) << 16;
916 tmp |= (u32)(data[1]) << 24;
917 b43legacy_ram_write(dev, ram_offset, tmp);
918 ram_offset += sizeof(u32);
919 for (i = 2; i < size; i += sizeof(u32)) {
920 tmp = (u32)(data[i + 0]);
922 tmp |= (u32)(data[i + 1]) << 8;
924 tmp |= (u32)(data[i + 2]) << 16;
926 tmp |= (u32)(data[i + 3]) << 24;
927 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
929 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
930 size + sizeof(struct b43legacy_plcp_hdr6));
933 /* Convert a b43legacy antenna number value to the PHY TX control value. */
934 static u16 b43legacy_antenna_to_phyctl(int antenna)
937 case B43legacy_ANTENNA0:
938 return B43legacy_TX4_PHY_ANT0;
939 case B43legacy_ANTENNA1:
940 return B43legacy_TX4_PHY_ANT1;
942 return B43legacy_TX4_PHY_ANTLAST;
945 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
950 unsigned int i, len, variable_len;
951 const struct ieee80211_mgmt *bcn;
957 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
959 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
960 len = min((size_t)dev->wl->current_beacon->len,
961 0x200 - sizeof(struct b43legacy_plcp_hdr6));
962 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
964 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
965 shm_size_offset, rate);
967 /* Write the PHY TX control parameters. */
968 antenna = B43legacy_ANTENNA_DEFAULT;
969 antenna = b43legacy_antenna_to_phyctl(antenna);
970 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
971 B43legacy_SHM_SH_BEACPHYCTL);
972 /* We can't send beacons with short preamble. Would get PHY errors. */
973 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
974 ctl &= ~B43legacy_TX4_PHY_ANT;
975 ctl &= ~B43legacy_TX4_PHY_ENC;
977 ctl |= B43legacy_TX4_PHY_ENC_CCK;
978 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
979 B43legacy_SHM_SH_BEACPHYCTL, ctl);
981 /* Find the position of the TIM and the DTIM_period value
982 * and write them to SHM. */
983 ie = bcn->u.beacon.variable;
984 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
985 for (i = 0; i < variable_len - 2; ) {
986 uint8_t ie_id, ie_len;
993 /* This is the TIM Information Element */
995 /* Check whether the ie_len is in the beacon data range. */
996 if (variable_len < ie_len + 2 + i)
998 /* A valid TIM is at least 4 bytes long. */
1003 tim_position = sizeof(struct b43legacy_plcp_hdr6);
1004 tim_position += offsetof(struct ieee80211_mgmt,
1008 dtim_period = ie[i + 3];
1010 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1011 B43legacy_SHM_SH_TIMPOS, tim_position);
1012 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1013 B43legacy_SHM_SH_DTIMP, dtim_period);
1019 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1020 "beacon template packet. AP or IBSS operation "
1021 "may be broken.\n");
1023 b43legacydbg(dev->wl, "Updated beacon template\n");
1026 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1027 u16 shm_offset, u16 size,
1028 struct ieee80211_rate *rate)
1030 struct b43legacy_plcp_hdr4 plcp;
1035 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1036 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1040 /* Write PLCP in two parts and timing for packet transfer */
1041 tmp = le32_to_cpu(plcp.data);
1042 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1044 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1046 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1050 /* Instead of using custom probe response template, this function
1051 * just patches custom beacon template by:
1052 * 1) Changing packet type
1053 * 2) Patching duration field
1056 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1058 struct ieee80211_rate *rate)
1062 u16 src_size, elem_size, src_pos, dest_pos;
1064 struct ieee80211_hdr *hdr;
1067 src_size = dev->wl->current_beacon->len;
1068 src_data = (const u8 *)dev->wl->current_beacon->data;
1070 /* Get the start offset of the variable IEs in the packet. */
1071 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1072 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1073 u.beacon.variable));
1075 if (B43legacy_WARN_ON(src_size < ie_start))
1078 dest_data = kmalloc(src_size, GFP_ATOMIC);
1079 if (unlikely(!dest_data))
1082 /* Copy the static data and all Information Elements, except the TIM. */
1083 memcpy(dest_data, src_data, ie_start);
1085 dest_pos = ie_start;
1086 for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1087 elem_size = src_data[src_pos + 1] + 2;
1088 if (src_data[src_pos] == 5) {
1089 /* This is the TIM. */
1092 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1093 dest_pos += elem_size;
1095 *dest_size = dest_pos;
1096 hdr = (struct ieee80211_hdr *)dest_data;
1098 /* Set the frame control. */
1099 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1100 IEEE80211_STYPE_PROBE_RESP);
1101 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1105 hdr->duration_id = dur;
1110 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1112 u16 shm_size_offset,
1113 struct ieee80211_rate *rate)
1115 const u8 *probe_resp_data;
1118 size = dev->wl->current_beacon->len;
1119 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1120 if (unlikely(!probe_resp_data))
1123 /* Looks like PLCP headers plus packet timings are stored for
1124 * all possible basic rates
1126 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1127 &b43legacy_b_ratetable[0]);
1128 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1129 &b43legacy_b_ratetable[1]);
1130 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1131 &b43legacy_b_ratetable[2]);
1132 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1133 &b43legacy_b_ratetable[3]);
1135 size = min((size_t)size,
1136 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1137 b43legacy_write_template_common(dev, probe_resp_data,
1139 shm_size_offset, rate->hw_value);
1140 kfree(probe_resp_data);
1143 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1145 struct b43legacy_wl *wl = dev->wl;
1147 if (wl->beacon0_uploaded)
1149 b43legacy_write_beacon_template(dev, 0x68, 0x18);
1150 /* FIXME: Probe resp upload doesn't really belong here,
1151 * but we don't use that feature anyway. */
1152 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1153 &__b43legacy_ratetable[3]);
1154 wl->beacon0_uploaded = 1;
1157 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1159 struct b43legacy_wl *wl = dev->wl;
1161 if (wl->beacon1_uploaded)
1163 b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1164 wl->beacon1_uploaded = 1;
1167 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1169 struct b43legacy_wl *wl = dev->wl;
1170 u32 cmd, beacon0_valid, beacon1_valid;
1172 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1175 /* This is the bottom half of the asynchronous beacon update. */
1177 /* Ignore interrupt in the future. */
1178 dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1180 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1181 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1182 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1184 /* Schedule interrupt manually, if busy. */
1185 if (beacon0_valid && beacon1_valid) {
1186 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1187 dev->irq_mask |= B43legacy_IRQ_BEACON;
1191 if (unlikely(wl->beacon_templates_virgin)) {
1192 /* We never uploaded a beacon before.
1193 * Upload both templates now, but only mark one valid. */
1194 wl->beacon_templates_virgin = 0;
1195 b43legacy_upload_beacon0(dev);
1196 b43legacy_upload_beacon1(dev);
1197 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1198 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1199 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1201 if (!beacon0_valid) {
1202 b43legacy_upload_beacon0(dev);
1203 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1205 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1206 } else if (!beacon1_valid) {
1207 b43legacy_upload_beacon1(dev);
1208 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1209 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1210 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1215 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1217 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1218 beacon_update_trigger);
1219 struct b43legacy_wldev *dev;
1221 mutex_lock(&wl->mutex);
1222 dev = wl->current_dev;
1223 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1224 spin_lock_irq(&wl->irq_lock);
1225 /* Update beacon right away or defer to IRQ. */
1226 handle_irq_beacon(dev);
1227 /* The handler might have updated the IRQ mask. */
1228 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1231 spin_unlock_irq(&wl->irq_lock);
1233 mutex_unlock(&wl->mutex);
1236 /* Asynchronously update the packet templates in template RAM.
1237 * Locking: Requires wl->irq_lock to be locked. */
1238 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1240 struct sk_buff *beacon;
1241 /* This is the top half of the ansynchronous beacon update. The bottom
1242 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1243 * sending an invalid beacon. This can happen for example, if the
1244 * firmware transmits a beacon while we are updating it. */
1246 /* We could modify the existing beacon and set the aid bit in the TIM
1247 * field, but that would probably require resizing and moving of data
1248 * within the beacon template. Simply request a new beacon and let
1249 * mac80211 do the hard work. */
1250 beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1251 if (unlikely(!beacon))
1254 if (wl->current_beacon)
1255 dev_kfree_skb_any(wl->current_beacon);
1256 wl->current_beacon = beacon;
1257 wl->beacon0_uploaded = 0;
1258 wl->beacon1_uploaded = 0;
1259 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1262 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1265 b43legacy_time_lock(dev);
1266 if (dev->dev->id.revision >= 3) {
1267 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1268 (beacon_int << 16));
1269 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1270 (beacon_int << 10));
1272 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1273 b43legacy_write16(dev, 0x610, beacon_int);
1275 b43legacy_time_unlock(dev);
1276 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1279 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1283 /* Interrupt handler bottom-half */
1284 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1287 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1288 u32 merged_dma_reason = 0;
1290 unsigned long flags;
1292 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1294 B43legacy_WARN_ON(b43legacy_status(dev) <
1295 B43legacy_STAT_INITIALIZED);
1297 reason = dev->irq_reason;
1298 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1299 dma_reason[i] = dev->dma_reason[i];
1300 merged_dma_reason |= dma_reason[i];
1303 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1304 b43legacyerr(dev->wl, "MAC transmission error\n");
1306 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1307 b43legacyerr(dev->wl, "PHY transmission error\n");
1309 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1310 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1311 "restarting the controller\n");
1312 b43legacy_controller_restart(dev, "PHY TX errors");
1316 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1317 B43legacy_DMAIRQ_NONFATALMASK))) {
1318 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1319 b43legacyerr(dev->wl, "Fatal DMA error: "
1320 "0x%08X, 0x%08X, 0x%08X, "
1321 "0x%08X, 0x%08X, 0x%08X\n",
1322 dma_reason[0], dma_reason[1],
1323 dma_reason[2], dma_reason[3],
1324 dma_reason[4], dma_reason[5]);
1325 b43legacy_controller_restart(dev, "DMA error");
1327 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1330 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1331 b43legacyerr(dev->wl, "DMA error: "
1332 "0x%08X, 0x%08X, 0x%08X, "
1333 "0x%08X, 0x%08X, 0x%08X\n",
1334 dma_reason[0], dma_reason[1],
1335 dma_reason[2], dma_reason[3],
1336 dma_reason[4], dma_reason[5]);
1339 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1340 handle_irq_ucode_debug(dev);
1341 if (reason & B43legacy_IRQ_TBTT_INDI)
1342 handle_irq_tbtt_indication(dev);
1343 if (reason & B43legacy_IRQ_ATIM_END)
1344 handle_irq_atim_end(dev);
1345 if (reason & B43legacy_IRQ_BEACON)
1346 handle_irq_beacon(dev);
1347 if (reason & B43legacy_IRQ_PMQ)
1348 handle_irq_pmq(dev);
1349 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1351 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1352 handle_irq_noise(dev);
1354 /* Check the DMA reason registers for received data. */
1355 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1356 if (b43legacy_using_pio(dev))
1357 b43legacy_pio_rx(dev->pio.queue0);
1359 b43legacy_dma_rx(dev->dma.rx_ring0);
1361 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1362 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1363 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1364 if (b43legacy_using_pio(dev))
1365 b43legacy_pio_rx(dev->pio.queue3);
1367 b43legacy_dma_rx(dev->dma.rx_ring3);
1369 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1370 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1372 if (reason & B43legacy_IRQ_TX_OK)
1373 handle_irq_transmit_status(dev);
1375 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1377 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1380 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1381 u16 base, int queueidx)
1385 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1386 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1387 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1389 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1392 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1394 if (b43legacy_using_pio(dev) &&
1395 (dev->dev->id.revision < 3) &&
1396 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1397 /* Apply a PIO specific workaround to the dma_reasons */
1398 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1399 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1400 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1401 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1404 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1406 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1407 dev->dma_reason[0]);
1408 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1409 dev->dma_reason[1]);
1410 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1411 dev->dma_reason[2]);
1412 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1413 dev->dma_reason[3]);
1414 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1415 dev->dma_reason[4]);
1416 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1417 dev->dma_reason[5]);
1420 /* Interrupt handler top-half */
1421 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1423 irqreturn_t ret = IRQ_NONE;
1424 struct b43legacy_wldev *dev = dev_id;
1427 B43legacy_WARN_ON(!dev);
1429 spin_lock(&dev->wl->irq_lock);
1431 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1432 /* This can only happen on shared IRQ lines. */
1434 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1435 if (reason == 0xffffffff) /* shared IRQ */
1438 reason &= dev->irq_mask;
1442 dev->dma_reason[0] = b43legacy_read32(dev,
1443 B43legacy_MMIO_DMA0_REASON)
1445 dev->dma_reason[1] = b43legacy_read32(dev,
1446 B43legacy_MMIO_DMA1_REASON)
1448 dev->dma_reason[2] = b43legacy_read32(dev,
1449 B43legacy_MMIO_DMA2_REASON)
1451 dev->dma_reason[3] = b43legacy_read32(dev,
1452 B43legacy_MMIO_DMA3_REASON)
1454 dev->dma_reason[4] = b43legacy_read32(dev,
1455 B43legacy_MMIO_DMA4_REASON)
1457 dev->dma_reason[5] = b43legacy_read32(dev,
1458 B43legacy_MMIO_DMA5_REASON)
1461 b43legacy_interrupt_ack(dev, reason);
1462 /* Disable all IRQs. They are enabled again in the bottom half. */
1463 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1464 /* Save the reason code and call our bottom half. */
1465 dev->irq_reason = reason;
1466 tasklet_schedule(&dev->isr_tasklet);
1469 spin_unlock(&dev->wl->irq_lock);
1474 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1476 release_firmware(dev->fw.ucode);
1477 dev->fw.ucode = NULL;
1478 release_firmware(dev->fw.pcm);
1480 release_firmware(dev->fw.initvals);
1481 dev->fw.initvals = NULL;
1482 release_firmware(dev->fw.initvals_band);
1483 dev->fw.initvals_band = NULL;
1486 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1488 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1489 "Drivers/b43#devicefirmware "
1490 "and download the correct firmware (version 3).\n");
1493 static int do_request_fw(struct b43legacy_wldev *dev,
1495 const struct firmware **fw)
1497 char path[sizeof(modparam_fwpostfix) + 32];
1498 struct b43legacy_fw_header *hdr;
1505 snprintf(path, ARRAY_SIZE(path),
1506 "b43legacy%s/%s.fw",
1507 modparam_fwpostfix, name);
1508 err = request_firmware(fw, path, dev->dev->dev);
1510 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1511 "or load failed.\n", path);
1514 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1516 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1517 switch (hdr->type) {
1518 case B43legacy_FW_TYPE_UCODE:
1519 case B43legacy_FW_TYPE_PCM:
1520 size = be32_to_cpu(hdr->size);
1521 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1524 case B43legacy_FW_TYPE_IV:
1535 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1539 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1541 struct b43legacy_firmware *fw = &dev->fw;
1542 const u8 rev = dev->dev->id.revision;
1543 const char *filename;
1547 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1550 filename = "ucode2";
1552 filename = "ucode4";
1554 filename = "ucode5";
1555 err = do_request_fw(dev, filename, &fw->ucode);
1564 err = do_request_fw(dev, filename, &fw->pcm);
1568 if (!fw->initvals) {
1569 switch (dev->phy.type) {
1570 case B43legacy_PHYTYPE_B:
1571 case B43legacy_PHYTYPE_G:
1572 if ((rev >= 5) && (rev <= 10))
1573 filename = "b0g0initvals5";
1574 else if (rev == 2 || rev == 4)
1575 filename = "b0g0initvals2";
1577 goto err_no_initvals;
1580 goto err_no_initvals;
1582 err = do_request_fw(dev, filename, &fw->initvals);
1586 if (!fw->initvals_band) {
1587 switch (dev->phy.type) {
1588 case B43legacy_PHYTYPE_B:
1589 case B43legacy_PHYTYPE_G:
1590 if ((rev >= 5) && (rev <= 10))
1591 filename = "b0g0bsinitvals5";
1594 else if (rev == 2 || rev == 4)
1597 goto err_no_initvals;
1600 goto err_no_initvals;
1602 err = do_request_fw(dev, filename, &fw->initvals_band);
1610 b43legacy_print_fw_helptext(dev->wl);
1615 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1616 "core rev %u\n", dev->phy.type, rev);
1620 b43legacy_release_firmware(dev);
1624 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1626 struct wiphy *wiphy = dev->wl->hw->wiphy;
1627 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1638 /* Jump the microcode PSM to offset 0 */
1639 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1640 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1641 macctl |= B43legacy_MACCTL_PSM_JMP0;
1642 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1643 /* Zero out all microcode PSM registers and shared memory. */
1644 for (i = 0; i < 64; i++)
1645 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1646 for (i = 0; i < 4096; i += 2)
1647 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1649 /* Upload Microcode. */
1650 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1651 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1652 b43legacy_shm_control_word(dev,
1653 B43legacy_SHM_UCODE |
1654 B43legacy_SHM_AUTOINC_W,
1656 for (i = 0; i < len; i++) {
1657 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1658 be32_to_cpu(data[i]));
1663 /* Upload PCM data. */
1664 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1665 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1666 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1667 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1668 /* No need for autoinc bit in SHM_HW */
1669 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1670 for (i = 0; i < len; i++) {
1671 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1672 be32_to_cpu(data[i]));
1677 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1680 /* Start the microcode PSM */
1681 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1682 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1683 macctl |= B43legacy_MACCTL_PSM_RUN;
1684 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1686 /* Wait for the microcode to load and respond */
1689 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1690 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1693 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1694 b43legacyerr(dev->wl, "Microcode not responding\n");
1695 b43legacy_print_fw_helptext(dev->wl);
1699 msleep_interruptible(50);
1700 if (signal_pending(current)) {
1705 /* dummy read follows */
1706 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1708 /* Get and check the revisions. */
1709 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1710 B43legacy_SHM_SH_UCODEREV);
1711 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1712 B43legacy_SHM_SH_UCODEPATCH);
1713 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1714 B43legacy_SHM_SH_UCODEDATE);
1715 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1716 B43legacy_SHM_SH_UCODETIME);
1718 if (fwrev > 0x128) {
1719 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1720 " Only firmware from binary drivers version 3.x"
1721 " is supported. You must change your firmware"
1723 b43legacy_print_fw_helptext(dev->wl);
1727 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1728 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1729 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1730 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1733 dev->fw.rev = fwrev;
1734 dev->fw.patch = fwpatch;
1736 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1737 dev->fw.rev, dev->fw.patch);
1738 wiphy->hw_version = dev->dev->id.coreid;
1743 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1744 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1745 macctl |= B43legacy_MACCTL_PSM_JMP0;
1746 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1751 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1752 const struct b43legacy_iv *ivals,
1756 const struct b43legacy_iv *iv;
1761 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1763 for (i = 0; i < count; i++) {
1764 if (array_size < sizeof(iv->offset_size))
1766 array_size -= sizeof(iv->offset_size);
1767 offset = be16_to_cpu(iv->offset_size);
1768 bit32 = !!(offset & B43legacy_IV_32BIT);
1769 offset &= B43legacy_IV_OFFSET_MASK;
1770 if (offset >= 0x1000)
1775 if (array_size < sizeof(iv->data.d32))
1777 array_size -= sizeof(iv->data.d32);
1779 value = get_unaligned_be32(&iv->data.d32);
1780 b43legacy_write32(dev, offset, value);
1782 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1788 if (array_size < sizeof(iv->data.d16))
1790 array_size -= sizeof(iv->data.d16);
1792 value = be16_to_cpu(iv->data.d16);
1793 b43legacy_write16(dev, offset, value);
1795 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1806 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1807 b43legacy_print_fw_helptext(dev->wl);
1812 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1814 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1815 const struct b43legacy_fw_header *hdr;
1816 struct b43legacy_firmware *fw = &dev->fw;
1817 const struct b43legacy_iv *ivals;
1821 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1822 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1823 count = be32_to_cpu(hdr->size);
1824 err = b43legacy_write_initvals(dev, ivals, count,
1825 fw->initvals->size - hdr_len);
1828 if (fw->initvals_band) {
1829 hdr = (const struct b43legacy_fw_header *)
1830 (fw->initvals_band->data);
1831 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1833 count = be32_to_cpu(hdr->size);
1834 err = b43legacy_write_initvals(dev, ivals, count,
1835 fw->initvals_band->size - hdr_len);
1844 /* Initialize the GPIOs
1845 * http://bcm-specs.sipsolutions.net/GPIO
1847 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1849 struct ssb_bus *bus = dev->dev->bus;
1850 struct ssb_device *gpiodev, *pcidev = NULL;
1854 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1855 b43legacy_read32(dev,
1856 B43legacy_MMIO_MACCTL)
1859 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1860 b43legacy_read16(dev,
1861 B43legacy_MMIO_GPIO_MASK)
1866 if (dev->dev->bus->chip_id == 0x4301) {
1870 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1871 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1872 b43legacy_read16(dev,
1873 B43legacy_MMIO_GPIO_MASK)
1878 if (dev->dev->id.revision >= 2)
1879 mask |= 0x0010; /* FIXME: This is redundant. */
1881 #ifdef CONFIG_SSB_DRIVER_PCICORE
1882 pcidev = bus->pcicore.dev;
1884 gpiodev = bus->chipco.dev ? : pcidev;
1887 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1888 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1894 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1895 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1897 struct ssb_bus *bus = dev->dev->bus;
1898 struct ssb_device *gpiodev, *pcidev = NULL;
1900 #ifdef CONFIG_SSB_DRIVER_PCICORE
1901 pcidev = bus->pcicore.dev;
1903 gpiodev = bus->chipco.dev ? : pcidev;
1906 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1909 /* http://bcm-specs.sipsolutions.net/EnableMac */
1910 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1912 dev->mac_suspended--;
1913 B43legacy_WARN_ON(dev->mac_suspended < 0);
1914 B43legacy_WARN_ON(irqs_disabled());
1915 if (dev->mac_suspended == 0) {
1916 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1917 b43legacy_read32(dev,
1918 B43legacy_MMIO_MACCTL)
1919 | B43legacy_MACCTL_ENABLED);
1920 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1921 B43legacy_IRQ_MAC_SUSPENDED);
1922 /* the next two are dummy reads */
1923 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1924 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1925 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1927 /* Re-enable IRQs. */
1928 spin_lock_irq(&dev->wl->irq_lock);
1929 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1931 spin_unlock_irq(&dev->wl->irq_lock);
1935 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1936 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1942 B43legacy_WARN_ON(irqs_disabled());
1943 B43legacy_WARN_ON(dev->mac_suspended < 0);
1945 if (dev->mac_suspended == 0) {
1946 /* Mask IRQs before suspending MAC. Otherwise
1947 * the MAC stays busy and won't suspend. */
1948 spin_lock_irq(&dev->wl->irq_lock);
1949 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1950 spin_unlock_irq(&dev->wl->irq_lock);
1951 b43legacy_synchronize_irq(dev);
1953 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1954 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1955 b43legacy_read32(dev,
1956 B43legacy_MMIO_MACCTL)
1957 & ~B43legacy_MACCTL_ENABLED);
1958 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1959 for (i = 40; i; i--) {
1960 tmp = b43legacy_read32(dev,
1961 B43legacy_MMIO_GEN_IRQ_REASON);
1962 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1966 b43legacyerr(dev->wl, "MAC suspend failed\n");
1969 dev->mac_suspended++;
1972 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1974 struct b43legacy_wl *wl = dev->wl;
1978 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1979 /* Reset status to STA infrastructure mode. */
1980 ctl &= ~B43legacy_MACCTL_AP;
1981 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1982 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1983 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1984 ctl &= ~B43legacy_MACCTL_PROMISC;
1985 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1986 ctl |= B43legacy_MACCTL_INFRA;
1988 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1989 ctl |= B43legacy_MACCTL_AP;
1990 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
1991 ctl &= ~B43legacy_MACCTL_INFRA;
1993 if (wl->filter_flags & FIF_CONTROL)
1994 ctl |= B43legacy_MACCTL_KEEP_CTL;
1995 if (wl->filter_flags & FIF_FCSFAIL)
1996 ctl |= B43legacy_MACCTL_KEEP_BAD;
1997 if (wl->filter_flags & FIF_PLCPFAIL)
1998 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1999 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
2000 ctl |= B43legacy_MACCTL_PROMISC;
2001 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2002 ctl |= B43legacy_MACCTL_BEACPROMISC;
2004 /* Workaround: On old hardware the HW-MAC-address-filter
2005 * doesn't work properly, so always run promisc in filter
2006 * it in software. */
2007 if (dev->dev->id.revision <= 4)
2008 ctl |= B43legacy_MACCTL_PROMISC;
2010 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2013 if ((ctl & B43legacy_MACCTL_INFRA) &&
2014 !(ctl & B43legacy_MACCTL_AP)) {
2015 if (dev->dev->bus->chip_id == 0x4306 &&
2016 dev->dev->bus->chip_rev == 3)
2021 b43legacy_write16(dev, 0x612, cfp_pretbtt);
2024 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2032 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2035 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2037 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2038 b43legacy_shm_read16(dev,
2039 B43legacy_SHM_SHARED, offset));
2042 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2044 switch (dev->phy.type) {
2045 case B43legacy_PHYTYPE_G:
2046 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2047 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2048 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2049 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2050 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2051 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2052 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2054 case B43legacy_PHYTYPE_B:
2055 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2056 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2057 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2058 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2061 B43legacy_BUG_ON(1);
2065 /* Set the TX-Antenna for management frames sent by firmware. */
2066 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2073 case B43legacy_ANTENNA0:
2074 ant |= B43legacy_TX4_PHY_ANT0;
2076 case B43legacy_ANTENNA1:
2077 ant |= B43legacy_TX4_PHY_ANT1;
2079 case B43legacy_ANTENNA_AUTO:
2080 ant |= B43legacy_TX4_PHY_ANTLAST;
2083 B43legacy_BUG_ON(1);
2086 /* FIXME We also need to set the other flags of the PHY control
2087 * field somewhere. */
2090 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2091 B43legacy_SHM_SH_BEACPHYCTL);
2092 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2093 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2094 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2096 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2097 B43legacy_SHM_SH_ACKCTSPHYCTL);
2098 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2099 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2100 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2101 /* For Probe Resposes */
2102 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2103 B43legacy_SHM_SH_PRPHYCTL);
2104 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2105 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2106 B43legacy_SHM_SH_PRPHYCTL, tmp);
2109 /* This is the opposite of b43legacy_chip_init() */
2110 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2112 b43legacy_radio_turn_off(dev, 1);
2113 b43legacy_gpio_cleanup(dev);
2114 /* firmware is released later */
2117 /* Initialize the chip
2118 * http://bcm-specs.sipsolutions.net/ChipInit
2120 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2122 struct b43legacy_phy *phy = &dev->phy;
2125 u32 value32, macctl;
2128 /* Initialize the MAC control */
2129 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2131 macctl |= B43legacy_MACCTL_GMODE;
2132 macctl |= B43legacy_MACCTL_INFRA;
2133 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2135 err = b43legacy_request_firmware(dev);
2138 err = b43legacy_upload_microcode(dev);
2140 goto out; /* firmware is released later */
2142 err = b43legacy_gpio_init(dev);
2144 goto out; /* firmware is released later */
2146 err = b43legacy_upload_initvals(dev);
2148 goto err_gpio_clean;
2149 b43legacy_radio_turn_on(dev);
2151 b43legacy_write16(dev, 0x03E6, 0x0000);
2152 err = b43legacy_phy_init(dev);
2156 /* Select initial Interference Mitigation. */
2157 tmp = phy->interfmode;
2158 phy->interfmode = B43legacy_INTERFMODE_NONE;
2159 b43legacy_radio_set_interference_mitigation(dev, tmp);
2161 b43legacy_phy_set_antenna_diversity(dev);
2162 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2164 if (phy->type == B43legacy_PHYTYPE_B) {
2165 value16 = b43legacy_read16(dev, 0x005E);
2167 b43legacy_write16(dev, 0x005E, value16);
2169 b43legacy_write32(dev, 0x0100, 0x01000000);
2170 if (dev->dev->id.revision < 5)
2171 b43legacy_write32(dev, 0x010C, 0x01000000);
2173 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2174 value32 &= ~B43legacy_MACCTL_INFRA;
2175 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2176 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2177 value32 |= B43legacy_MACCTL_INFRA;
2178 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2180 if (b43legacy_using_pio(dev)) {
2181 b43legacy_write32(dev, 0x0210, 0x00000100);
2182 b43legacy_write32(dev, 0x0230, 0x00000100);
2183 b43legacy_write32(dev, 0x0250, 0x00000100);
2184 b43legacy_write32(dev, 0x0270, 0x00000100);
2185 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2189 /* Probe Response Timeout value */
2190 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2191 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2193 /* Initially set the wireless operation mode. */
2194 b43legacy_adjust_opmode(dev);
2196 if (dev->dev->id.revision < 3) {
2197 b43legacy_write16(dev, 0x060E, 0x0000);
2198 b43legacy_write16(dev, 0x0610, 0x8000);
2199 b43legacy_write16(dev, 0x0604, 0x0000);
2200 b43legacy_write16(dev, 0x0606, 0x0200);
2202 b43legacy_write32(dev, 0x0188, 0x80000000);
2203 b43legacy_write32(dev, 0x018C, 0x02000000);
2205 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2206 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2207 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2208 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2209 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2210 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2211 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2213 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2214 value32 |= 0x00100000;
2215 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2217 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2218 dev->dev->bus->chipco.fast_pwrup_delay);
2220 /* PHY TX errors counter. */
2221 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2223 B43legacy_WARN_ON(err != 0);
2224 b43legacydbg(dev->wl, "Chip initialized\n");
2229 b43legacy_radio_turn_off(dev, 1);
2231 b43legacy_gpio_cleanup(dev);
2235 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2237 struct b43legacy_phy *phy = &dev->phy;
2239 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2242 b43legacy_mac_suspend(dev);
2243 b43legacy_phy_lo_g_measure(dev);
2244 b43legacy_mac_enable(dev);
2247 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2249 b43legacy_phy_lo_mark_all_unused(dev);
2250 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2251 b43legacy_mac_suspend(dev);
2252 b43legacy_calc_nrssi_slope(dev);
2253 b43legacy_mac_enable(dev);
2257 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2259 /* Update device statistics. */
2260 b43legacy_calculate_link_quality(dev);
2263 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2265 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2267 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2271 static void do_periodic_work(struct b43legacy_wldev *dev)
2275 state = dev->periodic_state;
2277 b43legacy_periodic_every120sec(dev);
2279 b43legacy_periodic_every60sec(dev);
2281 b43legacy_periodic_every30sec(dev);
2282 b43legacy_periodic_every15sec(dev);
2285 /* Periodic work locking policy:
2286 * The whole periodic work handler is protected by
2287 * wl->mutex. If another lock is needed somewhere in the
2288 * pwork callchain, it's acquired in-place, where it's needed.
2290 static void b43legacy_periodic_work_handler(struct work_struct *work)
2292 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2293 periodic_work.work);
2294 struct b43legacy_wl *wl = dev->wl;
2295 unsigned long delay;
2297 mutex_lock(&wl->mutex);
2299 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2301 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2304 do_periodic_work(dev);
2306 dev->periodic_state++;
2308 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2309 delay = msecs_to_jiffies(50);
2311 delay = round_jiffies_relative(HZ * 15);
2312 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2314 mutex_unlock(&wl->mutex);
2317 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2319 struct delayed_work *work = &dev->periodic_work;
2321 dev->periodic_state = 0;
2322 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2323 ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2326 /* Validate access to the chip (SHM) */
2327 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2332 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2333 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2334 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2337 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2338 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2341 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2343 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2344 if ((value | B43legacy_MACCTL_GMODE) !=
2345 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2348 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2354 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2358 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2360 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2361 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2362 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2364 /* KTP is a word address, but we address SHM bytewise.
2365 * So multiply by two.
2368 if (dev->dev->id.revision >= 5)
2369 /* Number of RCMTA address slots */
2370 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2371 dev->max_nr_keys - 8);
2374 #ifdef CONFIG_B43LEGACY_HWRNG
2375 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2377 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2378 unsigned long flags;
2380 /* Don't take wl->mutex here, as it could deadlock with
2381 * hwrng internal locking. It's not needed to take
2382 * wl->mutex here, anyway. */
2384 spin_lock_irqsave(&wl->irq_lock, flags);
2385 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2386 spin_unlock_irqrestore(&wl->irq_lock, flags);
2388 return (sizeof(u16));
2392 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2394 #ifdef CONFIG_B43LEGACY_HWRNG
2395 if (wl->rng_initialized)
2396 hwrng_unregister(&wl->rng);
2400 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2404 #ifdef CONFIG_B43LEGACY_HWRNG
2405 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2406 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2407 wl->rng.name = wl->rng_name;
2408 wl->rng.data_read = b43legacy_rng_read;
2409 wl->rng.priv = (unsigned long)wl;
2410 wl->rng_initialized = 1;
2411 err = hwrng_register(&wl->rng);
2413 wl->rng_initialized = 0;
2414 b43legacyerr(wl, "Failed to register the random "
2415 "number generator (%d)\n", err);
2422 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2423 struct sk_buff *skb)
2425 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2426 struct b43legacy_wldev *dev = wl->current_dev;
2428 unsigned long flags;
2432 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2434 /* DMA-TX is done without a global lock. */
2435 if (b43legacy_using_pio(dev)) {
2436 spin_lock_irqsave(&wl->irq_lock, flags);
2437 err = b43legacy_pio_tx(dev, skb);
2438 spin_unlock_irqrestore(&wl->irq_lock, flags);
2440 err = b43legacy_dma_tx(dev, skb);
2442 if (unlikely(err)) {
2443 /* Drop the packet. */
2444 dev_kfree_skb_any(skb);
2446 return NETDEV_TX_OK;
2449 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
2450 const struct ieee80211_tx_queue_params *params)
2455 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2456 struct ieee80211_low_level_stats *stats)
2458 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2459 unsigned long flags;
2461 spin_lock_irqsave(&wl->irq_lock, flags);
2462 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2463 spin_unlock_irqrestore(&wl->irq_lock, flags);
2468 static const char *phymode_to_string(unsigned int phymode)
2471 case B43legacy_PHYMODE_B:
2473 case B43legacy_PHYMODE_G:
2476 B43legacy_BUG_ON(1);
2481 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2482 unsigned int phymode,
2483 struct b43legacy_wldev **dev,
2486 struct b43legacy_wldev *d;
2488 list_for_each_entry(d, &wl->devlist, list) {
2489 if (d->phy.possible_phymodes & phymode) {
2490 /* Ok, this device supports the PHY-mode.
2491 * Set the gmode bit. */
2502 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2504 struct ssb_device *sdev = dev->dev;
2507 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2508 tmslow &= ~B43legacy_TMSLOW_GMODE;
2509 tmslow |= B43legacy_TMSLOW_PHYRESET;
2510 tmslow |= SSB_TMSLOW_FGC;
2511 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2514 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2515 tmslow &= ~SSB_TMSLOW_FGC;
2516 tmslow |= B43legacy_TMSLOW_PHYRESET;
2517 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2521 /* Expects wl->mutex locked */
2522 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2523 unsigned int new_mode)
2525 struct b43legacy_wldev *uninitialized_var(up_dev);
2526 struct b43legacy_wldev *down_dev;
2531 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2533 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2534 phymode_to_string(new_mode));
2537 if ((up_dev == wl->current_dev) &&
2538 (!!wl->current_dev->phy.gmode == !!gmode))
2539 /* This device is already running. */
2541 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2542 phymode_to_string(new_mode));
2543 down_dev = wl->current_dev;
2545 prev_status = b43legacy_status(down_dev);
2546 /* Shutdown the currently running core. */
2547 if (prev_status >= B43legacy_STAT_STARTED)
2548 b43legacy_wireless_core_stop(down_dev);
2549 if (prev_status >= B43legacy_STAT_INITIALIZED)
2550 b43legacy_wireless_core_exit(down_dev);
2552 if (down_dev != up_dev)
2553 /* We switch to a different core, so we put PHY into
2554 * RESET on the old core. */
2555 b43legacy_put_phy_into_reset(down_dev);
2557 /* Now start the new core. */
2558 up_dev->phy.gmode = gmode;
2559 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2560 err = b43legacy_wireless_core_init(up_dev);
2562 b43legacyerr(wl, "Fatal: Could not initialize device"
2563 " for newly selected %s-PHY mode\n",
2564 phymode_to_string(new_mode));
2568 if (prev_status >= B43legacy_STAT_STARTED) {
2569 err = b43legacy_wireless_core_start(up_dev);
2571 b43legacyerr(wl, "Fatal: Coult not start device for "
2572 "newly selected %s-PHY mode\n",
2573 phymode_to_string(new_mode));
2574 b43legacy_wireless_core_exit(up_dev);
2578 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2580 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2582 wl->current_dev = up_dev;
2586 /* Whoops, failed to init the new core. No core is operating now. */
2587 wl->current_dev = NULL;
2591 /* Write the short and long frame retry limit values. */
2592 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2593 unsigned int short_retry,
2594 unsigned int long_retry)
2596 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2597 * the chip-internal counter. */
2598 short_retry = min(short_retry, (unsigned int)0xF);
2599 long_retry = min(long_retry, (unsigned int)0xF);
2601 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2602 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2605 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2608 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2609 struct b43legacy_wldev *dev;
2610 struct b43legacy_phy *phy;
2611 struct ieee80211_conf *conf = &hw->conf;
2612 unsigned long flags;
2613 unsigned int new_phymode = 0xFFFF;
2618 antenna_tx = B43legacy_ANTENNA_DEFAULT;
2619 antenna_rx = B43legacy_ANTENNA_DEFAULT;
2621 mutex_lock(&wl->mutex);
2622 dev = wl->current_dev;
2625 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2626 b43legacy_set_retry_limits(dev,
2627 conf->short_frame_max_tx_count,
2628 conf->long_frame_max_tx_count);
2629 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2631 goto out_unlock_mutex;
2633 /* Switch the PHY mode (if necessary). */
2634 switch (conf->channel->band) {
2635 case IEEE80211_BAND_2GHZ:
2636 if (phy->type == B43legacy_PHYTYPE_B)
2637 new_phymode = B43legacy_PHYMODE_B;
2639 new_phymode = B43legacy_PHYMODE_G;
2642 B43legacy_WARN_ON(1);
2644 err = b43legacy_switch_phymode(wl, new_phymode);
2646 goto out_unlock_mutex;
2648 /* Disable IRQs while reconfiguring the device.
2649 * This makes it possible to drop the spinlock throughout
2650 * the reconfiguration process. */
2651 spin_lock_irqsave(&wl->irq_lock, flags);
2652 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2653 spin_unlock_irqrestore(&wl->irq_lock, flags);
2654 goto out_unlock_mutex;
2656 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2657 spin_unlock_irqrestore(&wl->irq_lock, flags);
2658 b43legacy_synchronize_irq(dev);
2660 /* Switch to the requested channel.
2661 * The firmware takes care of races with the TX handler. */
2662 if (conf->channel->hw_value != phy->channel)
2663 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2665 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2667 /* Adjust the desired TX power level. */
2668 if (conf->power_level != 0) {
2669 if (conf->power_level != phy->power_level) {
2670 phy->power_level = conf->power_level;
2671 b43legacy_phy_xmitpower(dev);
2675 /* Antennas for RX and management frame TX. */
2676 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2678 if (wl->radio_enabled != phy->radio_on) {
2679 if (wl->radio_enabled) {
2680 b43legacy_radio_turn_on(dev);
2681 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2682 if (!dev->radio_hw_enable)
2683 b43legacyinfo(dev->wl, "The hardware RF-kill"
2684 " button still turns the radio"
2685 " physically off. Press the"
2686 " button to turn it on.\n");
2688 b43legacy_radio_turn_off(dev, 0);
2689 b43legacyinfo(dev->wl, "Radio turned off by"
2694 spin_lock_irqsave(&wl->irq_lock, flags);
2695 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2697 spin_unlock_irqrestore(&wl->irq_lock, flags);
2699 mutex_unlock(&wl->mutex);
2704 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2706 struct ieee80211_supported_band *sband =
2707 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2708 struct ieee80211_rate *rate;
2710 u16 basic, direct, offset, basic_offset, rateptr;
2712 for (i = 0; i < sband->n_bitrates; i++) {
2713 rate = &sband->bitrates[i];
2715 if (b43legacy_is_cck_rate(rate->hw_value)) {
2716 direct = B43legacy_SHM_SH_CCKDIRECT;
2717 basic = B43legacy_SHM_SH_CCKBASIC;
2718 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2721 direct = B43legacy_SHM_SH_OFDMDIRECT;
2722 basic = B43legacy_SHM_SH_OFDMBASIC;
2723 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2727 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2729 if (b43legacy_is_cck_rate(rate->hw_value)) {
2730 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2731 basic_offset &= 0xF;
2733 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2734 basic_offset &= 0xF;
2738 * Get the pointer that we need to point to
2739 * from the direct map
2741 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2742 direct + 2 * basic_offset);
2743 /* and write it to the basic map */
2744 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2745 basic + 2 * offset, rateptr);
2749 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2750 struct ieee80211_vif *vif,
2751 struct ieee80211_bss_conf *conf,
2754 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2755 struct b43legacy_wldev *dev;
2756 struct b43legacy_phy *phy;
2757 unsigned long flags;
2759 mutex_lock(&wl->mutex);
2760 B43legacy_WARN_ON(wl->vif != vif);
2762 dev = wl->current_dev;
2765 /* Disable IRQs while reconfiguring the device.
2766 * This makes it possible to drop the spinlock throughout
2767 * the reconfiguration process. */
2768 spin_lock_irqsave(&wl->irq_lock, flags);
2769 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2770 spin_unlock_irqrestore(&wl->irq_lock, flags);
2771 goto out_unlock_mutex;
2773 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2775 if (changed & BSS_CHANGED_BSSID) {
2776 b43legacy_synchronize_irq(dev);
2779 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2781 memset(wl->bssid, 0, ETH_ALEN);
2784 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2785 if (changed & BSS_CHANGED_BEACON &&
2786 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2787 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2788 b43legacy_update_templates(wl);
2790 if (changed & BSS_CHANGED_BSSID)
2791 b43legacy_write_mac_bssid_templates(dev);
2793 spin_unlock_irqrestore(&wl->irq_lock, flags);
2795 b43legacy_mac_suspend(dev);
2797 if (changed & BSS_CHANGED_BEACON_INT &&
2798 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2799 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2800 b43legacy_set_beacon_int(dev, conf->beacon_int);
2802 if (changed & BSS_CHANGED_BASIC_RATES)
2803 b43legacy_update_basic_rates(dev, conf->basic_rates);
2805 if (changed & BSS_CHANGED_ERP_SLOT) {
2806 if (conf->use_short_slot)
2807 b43legacy_short_slot_timing_enable(dev);
2809 b43legacy_short_slot_timing_disable(dev);
2812 b43legacy_mac_enable(dev);
2814 spin_lock_irqsave(&wl->irq_lock, flags);
2815 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2818 spin_unlock_irqrestore(&wl->irq_lock, flags);
2820 mutex_unlock(&wl->mutex);
2823 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2824 unsigned int changed,
2825 unsigned int *fflags,u64 multicast)
2827 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2828 struct b43legacy_wldev *dev = wl->current_dev;
2829 unsigned long flags;
2836 spin_lock_irqsave(&wl->irq_lock, flags);
2837 *fflags &= FIF_PROMISC_IN_BSS |
2843 FIF_BCN_PRBRESP_PROMISC;
2845 changed &= FIF_PROMISC_IN_BSS |
2851 FIF_BCN_PRBRESP_PROMISC;
2853 wl->filter_flags = *fflags;
2855 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2856 b43legacy_adjust_opmode(dev);
2857 spin_unlock_irqrestore(&wl->irq_lock, flags);
2860 /* Locking: wl->mutex */
2861 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2863 struct b43legacy_wl *wl = dev->wl;
2864 unsigned long flags;
2866 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2869 /* Disable and sync interrupts. We must do this before than
2870 * setting the status to INITIALIZED, as the interrupt handler
2871 * won't care about IRQs then. */
2872 spin_lock_irqsave(&wl->irq_lock, flags);
2873 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2874 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2875 spin_unlock_irqrestore(&wl->irq_lock, flags);
2876 b43legacy_synchronize_irq(dev);
2878 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2880 mutex_unlock(&wl->mutex);
2881 /* Must unlock as it would otherwise deadlock. No races here.
2882 * Cancel the possibly running self-rearming periodic work. */
2883 cancel_delayed_work_sync(&dev->periodic_work);
2884 mutex_lock(&wl->mutex);
2886 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2888 b43legacy_mac_suspend(dev);
2889 free_irq(dev->dev->irq, dev);
2890 b43legacydbg(wl, "Wireless interface stopped\n");
2893 /* Locking: wl->mutex */
2894 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2898 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2900 drain_txstatus_queue(dev);
2901 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2902 IRQF_SHARED, KBUILD_MODNAME, dev);
2904 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2908 /* We are ready to run. */
2909 ieee80211_wake_queues(dev->wl->hw);
2910 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2912 /* Start data flow (TX/RX) */
2913 b43legacy_mac_enable(dev);
2914 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2916 /* Start maintenance work */
2917 b43legacy_periodic_tasks_setup(dev);
2919 b43legacydbg(dev->wl, "Wireless interface started\n");
2924 /* Get PHY and RADIO versioning numbers */
2925 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2927 struct b43legacy_phy *phy = &dev->phy;
2935 int unsupported = 0;
2937 /* Get PHY versioning */
2938 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2939 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2940 >> B43legacy_PHYVER_ANALOG_SHIFT;
2941 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2942 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2944 case B43legacy_PHYTYPE_B:
2945 if (phy_rev != 2 && phy_rev != 4
2946 && phy_rev != 6 && phy_rev != 7)
2949 case B43legacy_PHYTYPE_G:
2957 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2958 "(Analog %u, Type %u, Revision %u)\n",
2959 analog_type, phy_type, phy_rev);
2962 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2963 analog_type, phy_type, phy_rev);
2966 /* Get RADIO versioning */
2967 if (dev->dev->bus->chip_id == 0x4317) {
2968 if (dev->dev->bus->chip_rev == 0)
2970 else if (dev->dev->bus->chip_rev == 1)
2975 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2976 B43legacy_RADIOCTL_ID);
2977 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2979 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2980 B43legacy_RADIOCTL_ID);
2981 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2983 radio_manuf = (tmp & 0x00000FFF);
2984 radio_ver = (tmp & 0x0FFFF000) >> 12;
2985 radio_rev = (tmp & 0xF0000000) >> 28;
2987 case B43legacy_PHYTYPE_B:
2988 if ((radio_ver & 0xFFF0) != 0x2050)
2991 case B43legacy_PHYTYPE_G:
2992 if (radio_ver != 0x2050)
2996 B43legacy_BUG_ON(1);
2999 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3000 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3001 radio_manuf, radio_ver, radio_rev);
3004 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3005 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3008 phy->radio_manuf = radio_manuf;
3009 phy->radio_ver = radio_ver;
3010 phy->radio_rev = radio_rev;
3012 phy->analog = analog_type;
3013 phy->type = phy_type;
3019 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3020 struct b43legacy_phy *phy)
3022 struct b43legacy_lopair *lo;
3025 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3026 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3028 /* Assume the radio is enabled. If it's not enabled, the state will
3029 * immediately get fixed on the first periodic work run. */
3030 dev->radio_hw_enable = 1;
3032 phy->savedpctlreg = 0xFFFF;
3033 phy->aci_enable = 0;
3034 phy->aci_wlan_automatic = 0;
3035 phy->aci_hw_rssi = 0;
3037 lo = phy->_lo_pairs;
3039 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3040 B43legacy_LO_COUNT);
3041 phy->max_lb_gain = 0;
3042 phy->trsw_rx_gain = 0;
3044 /* Set default attenuation values. */
3045 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3046 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3047 phy->txctl1 = b43legacy_default_txctl1(dev);
3048 phy->txpwr_offset = 0;
3051 phy->nrssislope = 0;
3052 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3053 phy->nrssi[i] = -1000;
3054 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3055 phy->nrssi_lt[i] = i;
3057 phy->lofcal = 0xFFFF;
3058 phy->initval = 0xFFFF;
3060 phy->interfmode = B43legacy_INTERFMODE_NONE;
3061 phy->channel = 0xFF;
3064 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3070 memset(&dev->stats, 0, sizeof(dev->stats));
3072 setup_struct_phy_for_init(dev, &dev->phy);
3074 /* IRQ related flags */
3075 dev->irq_reason = 0;
3076 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3077 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3079 dev->mac_suspended = 1;
3081 /* Noise calculation context */
3082 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3085 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
3087 #ifdef CONFIG_SSB_DRIVER_PCICORE
3088 struct ssb_bus *bus = dev->dev->bus;
3091 if (bus->pcicore.dev &&
3092 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
3093 bus->pcicore.dev->id.revision <= 5) {
3094 /* IMCFGLO timeouts workaround. */
3095 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
3096 switch (bus->bustype) {
3097 case SSB_BUSTYPE_PCI:
3098 case SSB_BUSTYPE_PCMCIA:
3099 tmp &= ~SSB_IMCFGLO_REQTO;
3100 tmp &= ~SSB_IMCFGLO_SERTO;
3103 case SSB_BUSTYPE_SSB:
3104 tmp &= ~SSB_IMCFGLO_REQTO;
3105 tmp &= ~SSB_IMCFGLO_SERTO;
3111 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
3113 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3116 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3118 u16 pu_delay = 1050;
3120 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3122 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3123 pu_delay = max(pu_delay, (u16)2400);
3125 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3126 B43legacy_SHM_SH_SPUWKUP, pu_delay);
3129 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3130 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3134 /* The time value is in microseconds. */
3135 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3139 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3140 B43legacy_SHM_SH_PRETBTT, pretbtt);
3141 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3144 /* Shutdown a wireless core */
3145 /* Locking: wl->mutex */
3146 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3148 struct b43legacy_phy *phy = &dev->phy;
3151 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3152 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3154 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3156 /* Stop the microcode PSM. */
3157 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3158 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3159 macctl |= B43legacy_MACCTL_PSM_JMP0;
3160 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3162 b43legacy_leds_exit(dev);
3163 b43legacy_rng_exit(dev->wl);
3164 b43legacy_pio_free(dev);
3165 b43legacy_dma_free(dev);
3166 b43legacy_chip_exit(dev);
3167 b43legacy_radio_turn_off(dev, 1);
3168 b43legacy_switch_analog(dev, 0);
3169 if (phy->dyn_tssi_tbl)
3170 kfree(phy->tssi2dbm);
3171 kfree(phy->lo_control);
3172 phy->lo_control = NULL;
3173 if (dev->wl->current_beacon) {
3174 dev_kfree_skb_any(dev->wl->current_beacon);
3175 dev->wl->current_beacon = NULL;
3178 ssb_device_disable(dev->dev, 0);
3179 ssb_bus_may_powerdown(dev->dev->bus);
3182 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3184 struct b43legacy_phy *phy = &dev->phy;
3187 /* Set default attenuation values. */
3188 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3189 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3190 phy->txctl1 = b43legacy_default_txctl1(dev);
3191 phy->txctl2 = 0xFFFF;
3192 phy->txpwr_offset = 0;
3195 phy->nrssislope = 0;
3196 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3197 phy->nrssi[i] = -1000;
3198 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3199 phy->nrssi_lt[i] = i;
3201 phy->lofcal = 0xFFFF;
3202 phy->initval = 0xFFFF;
3204 phy->aci_enable = 0;
3205 phy->aci_wlan_automatic = 0;
3206 phy->aci_hw_rssi = 0;
3208 phy->antenna_diversity = 0xFFFF;
3209 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3210 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3213 phy->calibrated = 0;
3216 memset(phy->_lo_pairs, 0,
3217 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3218 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3221 /* Initialize a wireless core */
3222 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3224 struct b43legacy_wl *wl = dev->wl;
3225 struct ssb_bus *bus = dev->dev->bus;
3226 struct b43legacy_phy *phy = &dev->phy;
3227 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3232 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3234 err = ssb_bus_powerup(bus, 0);
3237 if (!ssb_device_is_enabled(dev->dev)) {
3238 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3239 b43legacy_wireless_core_reset(dev, tmp);
3242 if ((phy->type == B43legacy_PHYTYPE_B) ||
3243 (phy->type == B43legacy_PHYTYPE_G)) {
3244 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3245 * B43legacy_LO_COUNT,
3247 if (!phy->_lo_pairs)
3250 setup_struct_wldev_for_init(dev);
3252 err = b43legacy_phy_init_tssi2dbm_table(dev);
3254 goto err_kfree_lo_control;
3256 /* Enable IRQ routing to this device. */
3257 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3259 b43legacy_imcfglo_timeouts_workaround(dev);
3260 prepare_phy_data_for_init(dev);
3261 b43legacy_phy_calibrate(dev);
3262 err = b43legacy_chip_init(dev);
3264 goto err_kfree_tssitbl;
3265 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3266 B43legacy_SHM_SH_WLCOREREV,
3267 dev->dev->id.revision);
3268 hf = b43legacy_hf_read(dev);
3269 if (phy->type == B43legacy_PHYTYPE_G) {
3270 hf |= B43legacy_HF_SYMW;
3272 hf |= B43legacy_HF_GDCW;
3273 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3274 hf |= B43legacy_HF_OFDMPABOOST;
3275 } else if (phy->type == B43legacy_PHYTYPE_B) {
3276 hf |= B43legacy_HF_SYMW;
3277 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3278 hf &= ~B43legacy_HF_GDCW;
3280 b43legacy_hf_write(dev, hf);
3282 b43legacy_set_retry_limits(dev,
3283 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3284 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3286 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3288 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3291 /* Disable sending probe responses from firmware.
3292 * Setting the MaxTime to one usec will always trigger
3293 * a timeout, so we never send any probe resp.
3294 * A timeout of zero is infinite. */
3295 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3296 B43legacy_SHM_SH_PRMAXTIME, 1);
3298 b43legacy_rate_memory_init(dev);
3300 /* Minimum Contention Window */
3301 if (phy->type == B43legacy_PHYTYPE_B)
3302 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3305 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3307 /* Maximum Contention Window */
3308 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3312 if (b43legacy_using_pio(dev))
3313 err = b43legacy_pio_init(dev);
3315 err = b43legacy_dma_init(dev);
3317 b43legacy_qos_init(dev);
3319 } while (err == -EAGAIN);
3323 b43legacy_set_synth_pu_delay(dev, 1);
3325 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3326 b43legacy_upload_card_macaddress(dev);
3327 b43legacy_security_init(dev);
3328 b43legacy_rng_init(wl);
3330 ieee80211_wake_queues(dev->wl->hw);
3331 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3333 b43legacy_leds_init(dev);
3338 b43legacy_chip_exit(dev);
3340 if (phy->dyn_tssi_tbl)
3341 kfree(phy->tssi2dbm);
3342 err_kfree_lo_control:
3343 kfree(phy->lo_control);
3344 phy->lo_control = NULL;
3345 ssb_bus_may_powerdown(bus);
3346 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3350 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3351 struct ieee80211_vif *vif)
3353 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3354 struct b43legacy_wldev *dev;
3355 unsigned long flags;
3356 int err = -EOPNOTSUPP;
3358 /* TODO: allow WDS/AP devices to coexist */
3360 if (vif->type != NL80211_IFTYPE_AP &&
3361 vif->type != NL80211_IFTYPE_STATION &&
3362 vif->type != NL80211_IFTYPE_WDS &&
3363 vif->type != NL80211_IFTYPE_ADHOC)
3366 mutex_lock(&wl->mutex);
3368 goto out_mutex_unlock;
3370 b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3372 dev = wl->current_dev;
3375 wl->if_type = vif->type;
3376 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3378 spin_lock_irqsave(&wl->irq_lock, flags);
3379 b43legacy_adjust_opmode(dev);
3380 b43legacy_set_pretbtt(dev);
3381 b43legacy_set_synth_pu_delay(dev, 0);
3382 b43legacy_upload_card_macaddress(dev);
3383 spin_unlock_irqrestore(&wl->irq_lock, flags);
3387 mutex_unlock(&wl->mutex);
3392 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3393 struct ieee80211_vif *vif)
3395 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3396 struct b43legacy_wldev *dev = wl->current_dev;
3397 unsigned long flags;
3399 b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3401 mutex_lock(&wl->mutex);
3403 B43legacy_WARN_ON(!wl->operating);
3404 B43legacy_WARN_ON(wl->vif != vif);
3409 spin_lock_irqsave(&wl->irq_lock, flags);
3410 b43legacy_adjust_opmode(dev);
3411 memset(wl->mac_addr, 0, ETH_ALEN);
3412 b43legacy_upload_card_macaddress(dev);
3413 spin_unlock_irqrestore(&wl->irq_lock, flags);
3415 mutex_unlock(&wl->mutex);
3418 static int b43legacy_op_start(struct ieee80211_hw *hw)
3420 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3421 struct b43legacy_wldev *dev = wl->current_dev;
3425 /* Kill all old instance specific information to make sure
3426 * the card won't use it in the short timeframe between start
3427 * and mac80211 reconfiguring it. */
3428 memset(wl->bssid, 0, ETH_ALEN);
3429 memset(wl->mac_addr, 0, ETH_ALEN);
3430 wl->filter_flags = 0;
3431 wl->beacon0_uploaded = 0;
3432 wl->beacon1_uploaded = 0;
3433 wl->beacon_templates_virgin = 1;
3434 wl->radio_enabled = 1;
3436 mutex_lock(&wl->mutex);
3438 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3439 err = b43legacy_wireless_core_init(dev);
3441 goto out_mutex_unlock;
3445 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3446 err = b43legacy_wireless_core_start(dev);
3449 b43legacy_wireless_core_exit(dev);
3450 goto out_mutex_unlock;
3454 wiphy_rfkill_start_polling(hw->wiphy);
3457 mutex_unlock(&wl->mutex);
3462 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3464 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3465 struct b43legacy_wldev *dev = wl->current_dev;
3467 cancel_work_sync(&(wl->beacon_update_trigger));
3469 mutex_lock(&wl->mutex);
3470 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3471 b43legacy_wireless_core_stop(dev);
3472 b43legacy_wireless_core_exit(dev);
3473 wl->radio_enabled = 0;
3474 mutex_unlock(&wl->mutex);
3477 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3478 struct ieee80211_sta *sta, bool set)
3480 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3481 unsigned long flags;
3483 spin_lock_irqsave(&wl->irq_lock, flags);
3484 b43legacy_update_templates(wl);
3485 spin_unlock_irqrestore(&wl->irq_lock, flags);
3490 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3491 struct survey_info *survey)
3493 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3494 struct b43legacy_wldev *dev = wl->current_dev;
3495 struct ieee80211_conf *conf = &hw->conf;
3500 survey->channel = conf->channel;
3501 survey->filled = SURVEY_INFO_NOISE_DBM;
3502 survey->noise = dev->stats.link_noise;
3507 static const struct ieee80211_ops b43legacy_hw_ops = {
3508 .tx = b43legacy_op_tx,
3509 .conf_tx = b43legacy_op_conf_tx,
3510 .add_interface = b43legacy_op_add_interface,
3511 .remove_interface = b43legacy_op_remove_interface,
3512 .config = b43legacy_op_dev_config,
3513 .bss_info_changed = b43legacy_op_bss_info_changed,
3514 .configure_filter = b43legacy_op_configure_filter,
3515 .get_stats = b43legacy_op_get_stats,
3516 .start = b43legacy_op_start,
3517 .stop = b43legacy_op_stop,
3518 .set_tim = b43legacy_op_beacon_set_tim,
3519 .get_survey = b43legacy_op_get_survey,
3520 .rfkill_poll = b43legacy_rfkill_poll,
3523 /* Hard-reset the chip. Do not call this directly.
3524 * Use b43legacy_controller_restart()
3526 static void b43legacy_chip_reset(struct work_struct *work)
3528 struct b43legacy_wldev *dev =
3529 container_of(work, struct b43legacy_wldev, restart_work);
3530 struct b43legacy_wl *wl = dev->wl;
3534 mutex_lock(&wl->mutex);
3536 prev_status = b43legacy_status(dev);
3537 /* Bring the device down... */
3538 if (prev_status >= B43legacy_STAT_STARTED)
3539 b43legacy_wireless_core_stop(dev);
3540 if (prev_status >= B43legacy_STAT_INITIALIZED)
3541 b43legacy_wireless_core_exit(dev);
3543 /* ...and up again. */
3544 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3545 err = b43legacy_wireless_core_init(dev);
3549 if (prev_status >= B43legacy_STAT_STARTED) {
3550 err = b43legacy_wireless_core_start(dev);
3552 b43legacy_wireless_core_exit(dev);
3558 wl->current_dev = NULL; /* Failed to init the dev. */
3559 mutex_unlock(&wl->mutex);
3561 b43legacyerr(wl, "Controller restart FAILED\n");
3563 b43legacyinfo(wl, "Controller restarted\n");
3566 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3570 struct ieee80211_hw *hw = dev->wl->hw;
3571 struct b43legacy_phy *phy = &dev->phy;
3573 phy->possible_phymodes = 0;
3575 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3576 &b43legacy_band_2GHz_BPHY;
3577 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3581 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3582 &b43legacy_band_2GHz_GPHY;
3583 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3589 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3591 /* We release firmware that late to not be required to re-request
3592 * is all the time when we reinit the core. */
3593 b43legacy_release_firmware(dev);
3596 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3598 struct b43legacy_wl *wl = dev->wl;
3599 struct ssb_bus *bus = dev->dev->bus;
3600 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3606 /* Do NOT do any device initialization here.
3607 * Do it in wireless_core_init() instead.
3608 * This function is for gathering basic information about the HW, only.
3609 * Also some structs may be set up here. But most likely you want to
3610 * have that in core_init(), too.
3613 err = ssb_bus_powerup(bus, 0);
3615 b43legacyerr(wl, "Bus powerup failed\n");
3618 /* Get the PHY type. */
3619 if (dev->dev->id.revision >= 5) {
3622 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3623 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3626 } else if (dev->dev->id.revision == 4)
3631 dev->phy.gmode = (have_gphy || have_bphy);
3632 dev->phy.radio_on = 1;
3633 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3634 b43legacy_wireless_core_reset(dev, tmp);
3636 err = b43legacy_phy_versioning(dev);
3639 /* Check if this device supports multiband. */
3641 (pdev->device != 0x4312 &&
3642 pdev->device != 0x4319 &&
3643 pdev->device != 0x4324)) {
3644 /* No multiband support. */
3647 switch (dev->phy.type) {
3648 case B43legacy_PHYTYPE_B:
3651 case B43legacy_PHYTYPE_G:
3655 B43legacy_BUG_ON(1);
3658 dev->phy.gmode = (have_gphy || have_bphy);
3659 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3660 b43legacy_wireless_core_reset(dev, tmp);
3662 err = b43legacy_validate_chipaccess(dev);
3665 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3669 /* Now set some default "current_dev" */
3670 if (!wl->current_dev)
3671 wl->current_dev = dev;
3672 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3674 b43legacy_radio_turn_off(dev, 1);
3675 b43legacy_switch_analog(dev, 0);
3676 ssb_device_disable(dev->dev, 0);
3677 ssb_bus_may_powerdown(bus);
3683 ssb_bus_may_powerdown(bus);
3687 static void b43legacy_one_core_detach(struct ssb_device *dev)
3689 struct b43legacy_wldev *wldev;
3690 struct b43legacy_wl *wl;
3692 /* Do not cancel ieee80211-workqueue based work here.
3693 * See comment in b43legacy_remove(). */
3695 wldev = ssb_get_drvdata(dev);
3697 b43legacy_debugfs_remove_device(wldev);
3698 b43legacy_wireless_core_detach(wldev);
3699 list_del(&wldev->list);
3701 ssb_set_drvdata(dev, NULL);
3705 static int b43legacy_one_core_attach(struct ssb_device *dev,
3706 struct b43legacy_wl *wl)
3708 struct b43legacy_wldev *wldev;
3709 struct pci_dev *pdev;
3712 if (!list_empty(&wl->devlist)) {
3713 /* We are not the first core on this chip. */
3714 pdev = (dev->bus->bustype == SSB_BUSTYPE_PCI) ? dev->bus->host_pci : NULL;
3715 /* Only special chips support more than one wireless
3716 * core, although some of the other chips have more than
3717 * one wireless core as well. Check for this and
3721 ((pdev->device != 0x4321) &&
3722 (pdev->device != 0x4313) &&
3723 (pdev->device != 0x431A))) {
3724 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3729 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3735 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3736 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3737 tasklet_init(&wldev->isr_tasklet,
3738 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3739 (unsigned long)wldev);
3741 wldev->__using_pio = 1;
3742 INIT_LIST_HEAD(&wldev->list);
3744 err = b43legacy_wireless_core_attach(wldev);
3746 goto err_kfree_wldev;
3748 list_add(&wldev->list, &wl->devlist);
3750 ssb_set_drvdata(dev, wldev);
3751 b43legacy_debugfs_add_device(wldev);
3760 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3762 /* boardflags workarounds */
3763 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3764 bus->boardinfo.type == 0x4E &&
3765 bus->boardinfo.rev > 0x40)
3766 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3769 static void b43legacy_wireless_exit(struct ssb_device *dev,
3770 struct b43legacy_wl *wl)
3772 struct ieee80211_hw *hw = wl->hw;
3774 ssb_set_devtypedata(dev, NULL);
3775 ieee80211_free_hw(hw);
3778 static int b43legacy_wireless_init(struct ssb_device *dev)
3780 struct ssb_sprom *sprom = &dev->bus->sprom;
3781 struct ieee80211_hw *hw;
3782 struct b43legacy_wl *wl;
3785 b43legacy_sprom_fixup(dev->bus);
3787 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3789 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3794 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
3795 IEEE80211_HW_SIGNAL_DBM;
3796 hw->wiphy->interface_modes =
3797 BIT(NL80211_IFTYPE_AP) |
3798 BIT(NL80211_IFTYPE_STATION) |
3799 BIT(NL80211_IFTYPE_WDS) |
3800 BIT(NL80211_IFTYPE_ADHOC);
3801 hw->queues = 1; /* FIXME: hardware has more queues */
3803 SET_IEEE80211_DEV(hw, dev->dev);
3804 if (is_valid_ether_addr(sprom->et1mac))
3805 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3807 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3809 /* Get and initialize struct b43legacy_wl */
3810 wl = hw_to_b43legacy_wl(hw);
3811 memset(wl, 0, sizeof(*wl));
3813 spin_lock_init(&wl->irq_lock);
3814 spin_lock_init(&wl->leds_lock);
3815 mutex_init(&wl->mutex);
3816 INIT_LIST_HEAD(&wl->devlist);
3817 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3819 ssb_set_devtypedata(dev, wl);
3820 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3826 static int b43legacy_probe(struct ssb_device *dev,
3827 const struct ssb_device_id *id)
3829 struct b43legacy_wl *wl;
3833 wl = ssb_get_devtypedata(dev);
3835 /* Probing the first core - setup common struct b43legacy_wl */
3837 err = b43legacy_wireless_init(dev);
3840 wl = ssb_get_devtypedata(dev);
3841 B43legacy_WARN_ON(!wl);
3843 err = b43legacy_one_core_attach(dev, wl);
3845 goto err_wireless_exit;
3848 err = ieee80211_register_hw(wl->hw);
3850 goto err_one_core_detach;
3856 err_one_core_detach:
3857 b43legacy_one_core_detach(dev);
3860 b43legacy_wireless_exit(dev, wl);
3864 static void b43legacy_remove(struct ssb_device *dev)
3866 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3867 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3869 /* We must cancel any work here before unregistering from ieee80211,
3870 * as the ieee80211 unreg will destroy the workqueue. */
3871 cancel_work_sync(&wldev->restart_work);
3873 B43legacy_WARN_ON(!wl);
3874 if (wl->current_dev == wldev)
3875 ieee80211_unregister_hw(wl->hw);
3877 b43legacy_one_core_detach(dev);
3879 if (list_empty(&wl->devlist))
3880 /* Last core on the chip unregistered.
3881 * We can destroy common struct b43legacy_wl.
3883 b43legacy_wireless_exit(dev, wl);
3886 /* Perform a hardware reset. This can be called from any context. */
3887 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3890 /* Must avoid requeueing, if we are in shutdown. */
3891 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3893 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3894 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3899 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3901 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3902 struct b43legacy_wl *wl = wldev->wl;
3904 b43legacydbg(wl, "Suspending...\n");
3906 mutex_lock(&wl->mutex);
3907 wldev->suspend_init_status = b43legacy_status(wldev);
3908 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3909 b43legacy_wireless_core_stop(wldev);
3910 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3911 b43legacy_wireless_core_exit(wldev);
3912 mutex_unlock(&wl->mutex);
3914 b43legacydbg(wl, "Device suspended.\n");
3919 static int b43legacy_resume(struct ssb_device *dev)
3921 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3922 struct b43legacy_wl *wl = wldev->wl;
3925 b43legacydbg(wl, "Resuming...\n");
3927 mutex_lock(&wl->mutex);
3928 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3929 err = b43legacy_wireless_core_init(wldev);
3931 b43legacyerr(wl, "Resume failed at core init\n");
3935 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3936 err = b43legacy_wireless_core_start(wldev);
3938 b43legacy_wireless_core_exit(wldev);
3939 b43legacyerr(wl, "Resume failed at core start\n");
3944 b43legacydbg(wl, "Device resumed.\n");
3946 mutex_unlock(&wl->mutex);
3950 #else /* CONFIG_PM */
3951 # define b43legacy_suspend NULL
3952 # define b43legacy_resume NULL
3953 #endif /* CONFIG_PM */
3955 static struct ssb_driver b43legacy_ssb_driver = {
3956 .name = KBUILD_MODNAME,
3957 .id_table = b43legacy_ssb_tbl,
3958 .probe = b43legacy_probe,
3959 .remove = b43legacy_remove,
3960 .suspend = b43legacy_suspend,
3961 .resume = b43legacy_resume,
3964 static void b43legacy_print_driverinfo(void)
3966 const char *feat_pci = "", *feat_leds = "",
3967 *feat_pio = "", *feat_dma = "";
3969 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3972 #ifdef CONFIG_B43LEGACY_LEDS
3975 #ifdef CONFIG_B43LEGACY_PIO
3978 #ifdef CONFIG_B43LEGACY_DMA
3981 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3982 "[ Features: %s%s%s%s, Firmware-ID: "
3983 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3984 feat_pci, feat_leds, feat_pio, feat_dma);
3987 static int __init b43legacy_init(void)
3991 b43legacy_debugfs_init();
3993 err = ssb_driver_register(&b43legacy_ssb_driver);
3997 b43legacy_print_driverinfo();
4002 b43legacy_debugfs_exit();
4006 static void __exit b43legacy_exit(void)
4008 ssb_driver_unregister(&b43legacy_ssb_driver);
4009 b43legacy_debugfs_exit();
4012 module_init(b43legacy_init)
4013 module_exit(b43legacy_exit)