2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #include "ar9003_mac.h"
20 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
23 int mindelta, int main_rssi_avg,
24 int alt_rssi_avg, int pkt_count)
26 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
27 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
28 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
31 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
32 int curr_main_set, int curr_alt_set,
33 int alt_rssi_avg, int main_rssi_avg)
38 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
43 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
44 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
45 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
46 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
47 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
48 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
59 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
61 return sc->ps_enabled &&
62 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
66 * Setup and link descriptors.
68 * 11N: we can no longer afford to self link the last descriptor.
69 * MAC acknowledges BA status as long as it copies frames to host
70 * buffer (or rx fifo). This can incorrectly acknowledge packets
71 * to a sender if last desc is self-linked.
73 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
75 struct ath_hw *ah = sc->sc_ah;
76 struct ath_common *common = ath9k_hw_common(ah);
83 ds->ds_link = 0; /* link to null */
84 ds->ds_data = bf->bf_buf_addr;
86 /* virtual addr of the beginning of the buffer. */
89 ds->ds_vdata = skb->data;
92 * setup rx descriptors. The rx_bufsize here tells the hardware
93 * how much data it can DMA to us and that we are prepared
96 ath9k_hw_setuprxdesc(ah, ds,
100 if (sc->rx.rxlink == NULL)
101 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103 *sc->rx.rxlink = bf->bf_daddr;
105 sc->rx.rxlink = &ds->ds_link;
108 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
110 /* XXX block beacon interrupts */
111 ath9k_hw_setantenna(sc->sc_ah, antenna);
112 sc->rx.defant = antenna;
113 sc->rx.rxotherant = 0;
116 static void ath_opmode_init(struct ath_softc *sc)
118 struct ath_hw *ah = sc->sc_ah;
119 struct ath_common *common = ath9k_hw_common(ah);
123 /* configure rx filter */
124 rfilt = ath_calcrxfilter(sc);
125 ath9k_hw_setrxfilter(ah, rfilt);
127 /* configure bssid mask */
128 ath_hw_setbssidmask(common);
130 /* configure operational mode */
131 ath9k_hw_setopmode(ah);
133 /* calculate and install multicast filter */
134 mfilt[0] = mfilt[1] = ~0;
135 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
138 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
139 enum ath9k_rx_qtype qtype)
141 struct ath_hw *ah = sc->sc_ah;
142 struct ath_rx_edma *rx_edma;
146 rx_edma = &sc->rx.rx_edma[qtype];
147 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
150 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
151 list_del_init(&bf->list);
156 memset(skb->data, 0, ah->caps.rx_status_len);
157 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
158 ah->caps.rx_status_len, DMA_TO_DEVICE);
160 SKB_CB_ATHBUF(skb) = bf;
161 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
162 skb_queue_tail(&rx_edma->rx_fifo, skb);
167 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
168 enum ath9k_rx_qtype qtype, int size)
170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
173 if (list_empty(&sc->rx.rxbuf)) {
174 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
178 while (!list_empty(&sc->rx.rxbuf)) {
181 if (!ath_rx_edma_buf_link(sc, qtype))
189 static void ath_rx_remove_buffer(struct ath_softc *sc,
190 enum ath9k_rx_qtype qtype)
193 struct ath_rx_edma *rx_edma;
196 rx_edma = &sc->rx.rx_edma[qtype];
198 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
199 bf = SKB_CB_ATHBUF(skb);
201 list_add_tail(&bf->list, &sc->rx.rxbuf);
205 static void ath_rx_edma_cleanup(struct ath_softc *sc)
209 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
210 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
212 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
214 dev_kfree_skb_any(bf->bf_mpdu);
217 INIT_LIST_HEAD(&sc->rx.rxbuf);
219 kfree(sc->rx.rx_bufptr);
220 sc->rx.rx_bufptr = NULL;
223 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
225 skb_queue_head_init(&rx_edma->rx_fifo);
226 skb_queue_head_init(&rx_edma->rx_buffers);
227 rx_edma->rx_fifo_hwsize = size;
230 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
232 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
233 struct ath_hw *ah = sc->sc_ah;
239 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
240 ah->caps.rx_status_len);
242 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
243 ah->caps.rx_lp_qdepth);
244 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
245 ah->caps.rx_hp_qdepth);
247 size = sizeof(struct ath_buf) * nbufs;
248 bf = kzalloc(size, GFP_KERNEL);
252 INIT_LIST_HEAD(&sc->rx.rxbuf);
253 sc->rx.rx_bufptr = bf;
255 for (i = 0; i < nbufs; i++, bf++) {
256 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
262 memset(skb->data, 0, common->rx_bufsize);
265 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
268 if (unlikely(dma_mapping_error(sc->dev,
270 dev_kfree_skb_any(skb);
274 "dma_mapping_error() on RX init\n");
279 list_add_tail(&bf->list, &sc->rx.rxbuf);
285 ath_rx_edma_cleanup(sc);
289 static void ath_edma_start_recv(struct ath_softc *sc)
291 spin_lock_bh(&sc->rx.rxbuflock);
293 ath9k_hw_rxena(sc->sc_ah);
295 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
296 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
298 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
299 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
303 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
305 spin_unlock_bh(&sc->rx.rxbuflock);
308 static void ath_edma_stop_recv(struct ath_softc *sc)
310 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
311 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
314 int ath_rx_init(struct ath_softc *sc, int nbufs)
316 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
321 spin_lock_init(&sc->sc_pcu_lock);
322 sc->sc_flags &= ~SC_OP_RXFLUSH;
323 spin_lock_init(&sc->rx.rxbuflock);
325 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
326 sc->sc_ah->caps.rx_status_len;
328 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
329 return ath_rx_edma_init(sc, nbufs);
331 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
332 common->cachelsz, common->rx_bufsize);
334 /* Initialize rx descriptors */
336 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
340 "failed to allocate rx descriptors: %d\n",
345 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
346 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
354 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
357 if (unlikely(dma_mapping_error(sc->dev,
359 dev_kfree_skb_any(skb);
363 "dma_mapping_error() on RX init\n");
368 sc->rx.rxlink = NULL;
378 void ath_rx_cleanup(struct ath_softc *sc)
380 struct ath_hw *ah = sc->sc_ah;
381 struct ath_common *common = ath9k_hw_common(ah);
385 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
386 ath_rx_edma_cleanup(sc);
389 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
392 dma_unmap_single(sc->dev, bf->bf_buf_addr,
401 if (sc->rx.rxdma.dd_desc_len != 0)
402 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
407 * Calculate the receive filter according to the
408 * operating mode and state:
410 * o always accept unicast, broadcast, and multicast traffic
411 * o maintain current state of phy error reception (the hal
412 * may enable phy error frames for noise immunity work)
413 * o probe request frames are accepted only when operating in
414 * hostap, adhoc, or monitor modes
415 * o enable promiscuous mode according to the interface state
417 * - when operating in adhoc mode so the 802.11 layer creates
418 * node table entries for peers,
419 * - when operating in station mode for collecting rssi data when
420 * the station is otherwise quiet, or
421 * - when operating as a repeater so we see repeater-sta beacons
425 u32 ath_calcrxfilter(struct ath_softc *sc)
427 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
431 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
432 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
433 | ATH9K_RX_FILTER_MCAST;
435 if (sc->rx.rxfilter & FIF_PROBE_REQ)
436 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
439 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
440 * mode interface or when in monitor mode. AP mode does not need this
441 * since it receives all in-BSS frames anyway.
443 if (sc->sc_ah->is_monitoring)
444 rfilt |= ATH9K_RX_FILTER_PROM;
446 if (sc->rx.rxfilter & FIF_CONTROL)
447 rfilt |= ATH9K_RX_FILTER_CONTROL;
449 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
451 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
452 rfilt |= ATH9K_RX_FILTER_MYBEACON;
454 rfilt |= ATH9K_RX_FILTER_BEACON;
456 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
457 (sc->rx.rxfilter & FIF_PSPOLL))
458 rfilt |= ATH9K_RX_FILTER_PSPOLL;
460 if (conf_is_ht(&sc->hw->conf))
461 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
463 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
464 /* The following may also be needed for other older chips */
465 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
466 rfilt |= ATH9K_RX_FILTER_PROM;
467 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
472 #undef RX_FILTER_PRESERVE
475 int ath_startrecv(struct ath_softc *sc)
477 struct ath_hw *ah = sc->sc_ah;
478 struct ath_buf *bf, *tbf;
480 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
481 ath_edma_start_recv(sc);
485 spin_lock_bh(&sc->rx.rxbuflock);
486 if (list_empty(&sc->rx.rxbuf))
489 sc->rx.rxlink = NULL;
490 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
491 ath_rx_buf_link(sc, bf);
494 /* We could have deleted elements so the list may be empty now */
495 if (list_empty(&sc->rx.rxbuf))
498 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
499 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
504 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
506 spin_unlock_bh(&sc->rx.rxbuflock);
511 bool ath_stoprecv(struct ath_softc *sc)
513 struct ath_hw *ah = sc->sc_ah;
514 bool stopped, reset = false;
516 spin_lock_bh(&sc->rx.rxbuflock);
517 ath9k_hw_abortpcurecv(ah);
518 ath9k_hw_setrxfilter(ah, 0);
519 stopped = ath9k_hw_stopdmarecv(ah, &reset);
521 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
522 ath_edma_stop_recv(sc);
524 sc->rx.rxlink = NULL;
525 spin_unlock_bh(&sc->rx.rxbuflock);
527 if (!(ah->ah_flags & AH_UNPLUGGED) &&
528 unlikely(!stopped)) {
529 ath_err(ath9k_hw_common(sc->sc_ah),
530 "Could not stop RX, we could be "
531 "confusing the DMA engine when we start RX up\n");
532 ATH_DBG_WARN_ON_ONCE(!stopped);
534 return stopped && !reset;
537 void ath_flushrecv(struct ath_softc *sc)
539 sc->sc_flags |= SC_OP_RXFLUSH;
540 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
541 ath_rx_tasklet(sc, 1, true);
542 ath_rx_tasklet(sc, 1, false);
543 sc->sc_flags &= ~SC_OP_RXFLUSH;
546 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
548 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
549 struct ieee80211_mgmt *mgmt;
550 u8 *pos, *end, id, elen;
551 struct ieee80211_tim_ie *tim;
553 mgmt = (struct ieee80211_mgmt *)skb->data;
554 pos = mgmt->u.beacon.variable;
555 end = skb->data + skb->len;
557 while (pos + 2 < end) {
560 if (pos + elen > end)
563 if (id == WLAN_EID_TIM) {
564 if (elen < sizeof(*tim))
566 tim = (struct ieee80211_tim_ie *) pos;
567 if (tim->dtim_count != 0)
569 return tim->bitmap_ctrl & 0x01;
578 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
580 struct ieee80211_mgmt *mgmt;
581 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
583 if (skb->len < 24 + 8 + 2 + 2)
586 mgmt = (struct ieee80211_mgmt *)skb->data;
587 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
588 /* TODO: This doesn't work well if you have stations
589 * associated to two different APs because curbssid
590 * is just the last AP that any of the stations associated
593 return; /* not from our current AP */
596 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
598 if (sc->ps_flags & PS_BEACON_SYNC) {
599 sc->ps_flags &= ~PS_BEACON_SYNC;
600 ath_dbg(common, ATH_DBG_PS,
601 "Reconfigure Beacon timers based on timestamp from the AP\n");
603 sc->ps_flags &= ~PS_TSFOOR_SYNC;
606 if (ath_beacon_dtim_pending_cab(skb)) {
608 * Remain awake waiting for buffered broadcast/multicast
609 * frames. If the last broadcast/multicast frame is not
610 * received properly, the next beacon frame will work as
611 * a backup trigger for returning into NETWORK SLEEP state,
612 * so we are waiting for it as well.
614 ath_dbg(common, ATH_DBG_PS,
615 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
616 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
620 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
622 * This can happen if a broadcast frame is dropped or the AP
623 * fails to send a frame indicating that all CAB frames have
626 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
627 ath_dbg(common, ATH_DBG_PS,
628 "PS wait for CAB frames timed out\n");
632 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
634 struct ieee80211_hdr *hdr;
635 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
637 hdr = (struct ieee80211_hdr *)skb->data;
639 /* Process Beacon and CAB receive in PS state */
640 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
641 && ieee80211_is_beacon(hdr->frame_control))
642 ath_rx_ps_beacon(sc, skb);
643 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
644 (ieee80211_is_data(hdr->frame_control) ||
645 ieee80211_is_action(hdr->frame_control)) &&
646 is_multicast_ether_addr(hdr->addr1) &&
647 !ieee80211_has_moredata(hdr->frame_control)) {
649 * No more broadcast/multicast frames to be received at this
652 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
653 ath_dbg(common, ATH_DBG_PS,
654 "All PS CAB frames received, back to sleep\n");
655 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
656 !is_multicast_ether_addr(hdr->addr1) &&
657 !ieee80211_has_morefrags(hdr->frame_control)) {
658 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
659 ath_dbg(common, ATH_DBG_PS,
660 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
661 sc->ps_flags & (PS_WAIT_FOR_BEACON |
663 PS_WAIT_FOR_PSPOLL_DATA |
664 PS_WAIT_FOR_TX_ACK));
668 static bool ath_edma_get_buffers(struct ath_softc *sc,
669 enum ath9k_rx_qtype qtype)
671 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
672 struct ath_hw *ah = sc->sc_ah;
673 struct ath_common *common = ath9k_hw_common(ah);
678 skb = skb_peek(&rx_edma->rx_fifo);
682 bf = SKB_CB_ATHBUF(skb);
685 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
686 common->rx_bufsize, DMA_FROM_DEVICE);
688 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
689 if (ret == -EINPROGRESS) {
690 /*let device gain the buffer again*/
691 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
692 common->rx_bufsize, DMA_FROM_DEVICE);
696 __skb_unlink(skb, &rx_edma->rx_fifo);
697 if (ret == -EINVAL) {
698 /* corrupt descriptor, skip this one and the following one */
699 list_add_tail(&bf->list, &sc->rx.rxbuf);
700 ath_rx_edma_buf_link(sc, qtype);
701 skb = skb_peek(&rx_edma->rx_fifo);
705 bf = SKB_CB_ATHBUF(skb);
708 __skb_unlink(skb, &rx_edma->rx_fifo);
709 list_add_tail(&bf->list, &sc->rx.rxbuf);
710 ath_rx_edma_buf_link(sc, qtype);
713 skb_queue_tail(&rx_edma->rx_buffers, skb);
718 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
719 struct ath_rx_status *rs,
720 enum ath9k_rx_qtype qtype)
722 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
726 while (ath_edma_get_buffers(sc, qtype));
727 skb = __skb_dequeue(&rx_edma->rx_buffers);
731 bf = SKB_CB_ATHBUF(skb);
732 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
736 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
737 struct ath_rx_status *rs)
739 struct ath_hw *ah = sc->sc_ah;
740 struct ath_common *common = ath9k_hw_common(ah);
745 if (list_empty(&sc->rx.rxbuf)) {
746 sc->rx.rxlink = NULL;
750 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
754 * Must provide the virtual address of the current
755 * descriptor, the physical address, and the virtual
756 * address of the next descriptor in the h/w chain.
757 * This allows the HAL to look ahead to see if the
758 * hardware is done with a descriptor by checking the
759 * done bit in the following descriptor and the address
760 * of the current descriptor the DMA engine is working
761 * on. All this is necessary because of our use of
762 * a self-linked list to avoid rx overruns.
764 ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
765 if (ret == -EINPROGRESS) {
766 struct ath_rx_status trs;
768 struct ath_desc *tds;
770 memset(&trs, 0, sizeof(trs));
771 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
772 sc->rx.rxlink = NULL;
776 tbf = list_entry(bf->list.next, struct ath_buf, list);
779 * On some hardware the descriptor status words could
780 * get corrupted, including the done bit. Because of
781 * this, check if the next descriptor's done bit is
784 * If the next descriptor's done bit is set, the current
785 * descriptor has been corrupted. Force s/w to discard
786 * this descriptor and continue...
790 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
791 if (ret == -EINPROGRESS)
799 * Synchronize the DMA transfer with CPU before
800 * 1. accessing the frame
801 * 2. requeueing the same buffer to h/w
803 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
810 /* Assumes you've already done the endian to CPU conversion */
811 static bool ath9k_rx_accept(struct ath_common *common,
812 struct ieee80211_hdr *hdr,
813 struct ieee80211_rx_status *rxs,
814 struct ath_rx_status *rx_stats,
817 bool is_mc, is_valid_tkip, strip_mic, mic_error;
818 struct ath_hw *ah = common->ah;
820 u8 rx_status_len = ah->caps.rx_status_len;
822 fc = hdr->frame_control;
824 is_mc = !!is_multicast_ether_addr(hdr->addr1);
825 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
826 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
827 strip_mic = is_valid_tkip && !(rx_stats->rs_status &
828 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
830 if (!rx_stats->rs_datalen)
833 * rs_status follows rs_datalen so if rs_datalen is too large
834 * we can take a hint that hardware corrupted it, so ignore
837 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
840 /* Only use error bits from the last fragment */
841 if (rx_stats->rs_more)
844 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
845 !ieee80211_has_morefrags(fc) &&
846 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
847 (rx_stats->rs_status & ATH9K_RXERR_MIC);
850 * The rx_stats->rs_status will not be set until the end of the
851 * chained descriptors so it can be ignored if rs_more is set. The
852 * rs_more will be false at the last element of the chained
855 if (rx_stats->rs_status != 0) {
856 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
857 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
860 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
863 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
864 *decrypt_error = true;
869 * Reject error frames with the exception of
870 * decryption and MIC failures. For monitor mode,
871 * we also ignore the CRC error.
873 if (ah->is_monitoring) {
874 if (rx_stats->rs_status &
875 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
879 if (rx_stats->rs_status &
880 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
887 * For unicast frames the MIC error bit can have false positives,
888 * so all MIC error reports need to be validated in software.
889 * False negatives are not common, so skip software verification
890 * if the hardware considers the MIC valid.
893 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
894 else if (is_mc && mic_error)
895 rxs->flag |= RX_FLAG_MMIC_ERROR;
900 static int ath9k_process_rate(struct ath_common *common,
901 struct ieee80211_hw *hw,
902 struct ath_rx_status *rx_stats,
903 struct ieee80211_rx_status *rxs)
905 struct ieee80211_supported_band *sband;
906 enum ieee80211_band band;
909 band = hw->conf.channel->band;
910 sband = hw->wiphy->bands[band];
912 if (rx_stats->rs_rate & 0x80) {
914 rxs->flag |= RX_FLAG_HT;
915 if (rx_stats->rs_flags & ATH9K_RX_2040)
916 rxs->flag |= RX_FLAG_40MHZ;
917 if (rx_stats->rs_flags & ATH9K_RX_GI)
918 rxs->flag |= RX_FLAG_SHORT_GI;
919 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
923 for (i = 0; i < sband->n_bitrates; i++) {
924 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
928 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
929 rxs->flag |= RX_FLAG_SHORTPRE;
936 * No valid hardware bitrate found -- we should not get here
937 * because hardware has already validated this frame as OK.
939 ath_dbg(common, ATH_DBG_XMIT,
940 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
946 static void ath9k_process_rssi(struct ath_common *common,
947 struct ieee80211_hw *hw,
948 struct ieee80211_hdr *hdr,
949 struct ath_rx_status *rx_stats)
951 struct ath_softc *sc = hw->priv;
952 struct ath_hw *ah = common->ah;
956 if ((ah->opmode != NL80211_IFTYPE_STATION) &&
957 (ah->opmode != NL80211_IFTYPE_ADHOC))
960 fc = hdr->frame_control;
961 if (!ieee80211_is_beacon(fc) ||
962 compare_ether_addr(hdr->addr3, common->curbssid)) {
963 /* TODO: This doesn't work well if you have stations
964 * associated to two different APs because curbssid
965 * is just the last AP that any of the stations associated
971 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
972 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
974 last_rssi = sc->last_rssi;
975 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
976 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
977 ATH_RSSI_EP_MULTIPLIER);
978 if (rx_stats->rs_rssi < 0)
979 rx_stats->rs_rssi = 0;
981 /* Update Beacon RSSI, this is used by ANI. */
982 ah->stats.avgbrssi = rx_stats->rs_rssi;
986 * For Decrypt or Demic errors, we only mark packet status here and always push
987 * up the frame up to let mac80211 handle the actual error case, be it no
988 * decryption key or real decryption error. This let us keep statistics there.
990 static int ath9k_rx_skb_preprocess(struct ath_common *common,
991 struct ieee80211_hw *hw,
992 struct ieee80211_hdr *hdr,
993 struct ath_rx_status *rx_stats,
994 struct ieee80211_rx_status *rx_status,
997 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
1000 * everything but the rate is checked here, the rate check is done
1001 * separately to avoid doing two lookups for a rate for each frame.
1003 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1006 /* Only use status info from the last fragment */
1007 if (rx_stats->rs_more)
1010 ath9k_process_rssi(common, hw, hdr, rx_stats);
1012 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1015 rx_status->band = hw->conf.channel->band;
1016 rx_status->freq = hw->conf.channel->center_freq;
1017 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1018 rx_status->antenna = rx_stats->rs_antenna;
1019 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1024 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1025 struct sk_buff *skb,
1026 struct ath_rx_status *rx_stats,
1027 struct ieee80211_rx_status *rxs,
1030 struct ath_hw *ah = common->ah;
1031 struct ieee80211_hdr *hdr;
1032 int hdrlen, padpos, padsize;
1036 /* see if any padding is done by the hw and remove it */
1037 hdr = (struct ieee80211_hdr *) skb->data;
1038 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1039 fc = hdr->frame_control;
1040 padpos = ath9k_cmn_padpos(hdr->frame_control);
1042 /* The MAC header is padded to have 32-bit boundary if the
1043 * packet payload is non-zero. The general calculation for
1044 * padsize would take into account odd header lengths:
1045 * padsize = (4 - padpos % 4) % 4; However, since only
1046 * even-length headers are used, padding can only be 0 or 2
1047 * bytes and we can optimize this a bit. In addition, we must
1048 * not try to remove padding from short control frames that do
1049 * not have payload. */
1050 padsize = padpos & 3;
1051 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1052 memmove(skb->data + padsize, skb->data, padpos);
1053 skb_pull(skb, padsize);
1056 keyix = rx_stats->rs_keyix;
1058 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1059 ieee80211_has_protected(fc)) {
1060 rxs->flag |= RX_FLAG_DECRYPTED;
1061 } else if (ieee80211_has_protected(fc)
1062 && !decrypt_error && skb->len >= hdrlen + 4) {
1063 keyix = skb->data[hdrlen + 3] >> 6;
1065 if (test_bit(keyix, common->keymap))
1066 rxs->flag |= RX_FLAG_DECRYPTED;
1068 if (ah->sw_mgmt_crypto &&
1069 (rxs->flag & RX_FLAG_DECRYPTED) &&
1070 ieee80211_is_mgmt(fc))
1071 /* Use software decrypt for management frames. */
1072 rxs->flag &= ~RX_FLAG_DECRYPTED;
1075 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1076 struct ath_hw_antcomb_conf ant_conf,
1079 antcomb->quick_scan_cnt = 0;
1081 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1082 antcomb->rssi_lna2 = main_rssi_avg;
1083 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1084 antcomb->rssi_lna1 = main_rssi_avg;
1086 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1087 case 0x10: /* LNA2 A-B */
1088 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1089 antcomb->first_quick_scan_conf =
1090 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1091 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1093 case 0x20: /* LNA1 A-B */
1094 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1095 antcomb->first_quick_scan_conf =
1096 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1097 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1099 case 0x21: /* LNA1 LNA2 */
1100 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1101 antcomb->first_quick_scan_conf =
1102 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1103 antcomb->second_quick_scan_conf =
1104 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1106 case 0x12: /* LNA2 LNA1 */
1107 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1108 antcomb->first_quick_scan_conf =
1109 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1110 antcomb->second_quick_scan_conf =
1111 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1113 case 0x13: /* LNA2 A+B */
1114 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1115 antcomb->first_quick_scan_conf =
1116 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1117 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1119 case 0x23: /* LNA1 A+B */
1120 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1121 antcomb->first_quick_scan_conf =
1122 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1123 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1130 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1131 struct ath_hw_antcomb_conf *div_ant_conf,
1132 int main_rssi_avg, int alt_rssi_avg,
1136 switch (antcomb->quick_scan_cnt) {
1138 /* set alt to main, and alt to first conf */
1139 div_ant_conf->main_lna_conf = antcomb->main_conf;
1140 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1143 /* set alt to main, and alt to first conf */
1144 div_ant_conf->main_lna_conf = antcomb->main_conf;
1145 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1146 antcomb->rssi_first = main_rssi_avg;
1147 antcomb->rssi_second = alt_rssi_avg;
1149 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1151 if (ath_is_alt_ant_ratio_better(alt_ratio,
1152 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1153 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1154 main_rssi_avg, alt_rssi_avg,
1155 antcomb->total_pkt_count))
1156 antcomb->first_ratio = true;
1158 antcomb->first_ratio = false;
1159 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1160 if (ath_is_alt_ant_ratio_better(alt_ratio,
1161 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1162 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1163 main_rssi_avg, alt_rssi_avg,
1164 antcomb->total_pkt_count))
1165 antcomb->first_ratio = true;
1167 antcomb->first_ratio = false;
1169 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1170 (alt_rssi_avg > main_rssi_avg +
1171 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1172 (alt_rssi_avg > main_rssi_avg)) &&
1173 (antcomb->total_pkt_count > 50))
1174 antcomb->first_ratio = true;
1176 antcomb->first_ratio = false;
1180 antcomb->alt_good = false;
1181 antcomb->scan_not_start = false;
1182 antcomb->scan = false;
1183 antcomb->rssi_first = main_rssi_avg;
1184 antcomb->rssi_third = alt_rssi_avg;
1186 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1187 antcomb->rssi_lna1 = alt_rssi_avg;
1188 else if (antcomb->second_quick_scan_conf ==
1189 ATH_ANT_DIV_COMB_LNA2)
1190 antcomb->rssi_lna2 = alt_rssi_avg;
1191 else if (antcomb->second_quick_scan_conf ==
1192 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1193 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1194 antcomb->rssi_lna2 = main_rssi_avg;
1195 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1196 antcomb->rssi_lna1 = main_rssi_avg;
1199 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1200 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1201 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1203 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1205 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1206 if (ath_is_alt_ant_ratio_better(alt_ratio,
1207 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1208 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1209 main_rssi_avg, alt_rssi_avg,
1210 antcomb->total_pkt_count))
1211 antcomb->second_ratio = true;
1213 antcomb->second_ratio = false;
1214 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1215 if (ath_is_alt_ant_ratio_better(alt_ratio,
1216 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1217 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1218 main_rssi_avg, alt_rssi_avg,
1219 antcomb->total_pkt_count))
1220 antcomb->second_ratio = true;
1222 antcomb->second_ratio = false;
1224 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1225 (alt_rssi_avg > main_rssi_avg +
1226 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1227 (alt_rssi_avg > main_rssi_avg)) &&
1228 (antcomb->total_pkt_count > 50))
1229 antcomb->second_ratio = true;
1231 antcomb->second_ratio = false;
1234 /* set alt to the conf with maximun ratio */
1235 if (antcomb->first_ratio && antcomb->second_ratio) {
1236 if (antcomb->rssi_second > antcomb->rssi_third) {
1238 if ((antcomb->first_quick_scan_conf ==
1239 ATH_ANT_DIV_COMB_LNA1) ||
1240 (antcomb->first_quick_scan_conf ==
1241 ATH_ANT_DIV_COMB_LNA2))
1242 /* Set alt LNA1 or LNA2*/
1243 if (div_ant_conf->main_lna_conf ==
1244 ATH_ANT_DIV_COMB_LNA2)
1245 div_ant_conf->alt_lna_conf =
1246 ATH_ANT_DIV_COMB_LNA1;
1248 div_ant_conf->alt_lna_conf =
1249 ATH_ANT_DIV_COMB_LNA2;
1251 /* Set alt to A+B or A-B */
1252 div_ant_conf->alt_lna_conf =
1253 antcomb->first_quick_scan_conf;
1254 } else if ((antcomb->second_quick_scan_conf ==
1255 ATH_ANT_DIV_COMB_LNA1) ||
1256 (antcomb->second_quick_scan_conf ==
1257 ATH_ANT_DIV_COMB_LNA2)) {
1258 /* Set alt LNA1 or LNA2 */
1259 if (div_ant_conf->main_lna_conf ==
1260 ATH_ANT_DIV_COMB_LNA2)
1261 div_ant_conf->alt_lna_conf =
1262 ATH_ANT_DIV_COMB_LNA1;
1264 div_ant_conf->alt_lna_conf =
1265 ATH_ANT_DIV_COMB_LNA2;
1267 /* Set alt to A+B or A-B */
1268 div_ant_conf->alt_lna_conf =
1269 antcomb->second_quick_scan_conf;
1271 } else if (antcomb->first_ratio) {
1273 if ((antcomb->first_quick_scan_conf ==
1274 ATH_ANT_DIV_COMB_LNA1) ||
1275 (antcomb->first_quick_scan_conf ==
1276 ATH_ANT_DIV_COMB_LNA2))
1277 /* Set alt LNA1 or LNA2 */
1278 if (div_ant_conf->main_lna_conf ==
1279 ATH_ANT_DIV_COMB_LNA2)
1280 div_ant_conf->alt_lna_conf =
1281 ATH_ANT_DIV_COMB_LNA1;
1283 div_ant_conf->alt_lna_conf =
1284 ATH_ANT_DIV_COMB_LNA2;
1286 /* Set alt to A+B or A-B */
1287 div_ant_conf->alt_lna_conf =
1288 antcomb->first_quick_scan_conf;
1289 } else if (antcomb->second_ratio) {
1291 if ((antcomb->second_quick_scan_conf ==
1292 ATH_ANT_DIV_COMB_LNA1) ||
1293 (antcomb->second_quick_scan_conf ==
1294 ATH_ANT_DIV_COMB_LNA2))
1295 /* Set alt LNA1 or LNA2 */
1296 if (div_ant_conf->main_lna_conf ==
1297 ATH_ANT_DIV_COMB_LNA2)
1298 div_ant_conf->alt_lna_conf =
1299 ATH_ANT_DIV_COMB_LNA1;
1301 div_ant_conf->alt_lna_conf =
1302 ATH_ANT_DIV_COMB_LNA2;
1304 /* Set alt to A+B or A-B */
1305 div_ant_conf->alt_lna_conf =
1306 antcomb->second_quick_scan_conf;
1308 /* main is largest */
1309 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1310 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1311 /* Set alt LNA1 or LNA2 */
1312 if (div_ant_conf->main_lna_conf ==
1313 ATH_ANT_DIV_COMB_LNA2)
1314 div_ant_conf->alt_lna_conf =
1315 ATH_ANT_DIV_COMB_LNA1;
1317 div_ant_conf->alt_lna_conf =
1318 ATH_ANT_DIV_COMB_LNA2;
1320 /* Set alt to A+B or A-B */
1321 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1329 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1330 struct ath_ant_comb *antcomb, int alt_ratio)
1332 if (ant_conf->div_group == 0) {
1333 /* Adjust the fast_div_bias based on main and alt lna conf */
1334 switch ((ant_conf->main_lna_conf << 4) |
1335 ant_conf->alt_lna_conf) {
1336 case 0x01: /* A-B LNA2 */
1337 ant_conf->fast_div_bias = 0x3b;
1339 case 0x02: /* A-B LNA1 */
1340 ant_conf->fast_div_bias = 0x3d;
1342 case 0x03: /* A-B A+B */
1343 ant_conf->fast_div_bias = 0x1;
1345 case 0x10: /* LNA2 A-B */
1346 ant_conf->fast_div_bias = 0x7;
1348 case 0x12: /* LNA2 LNA1 */
1349 ant_conf->fast_div_bias = 0x2;
1351 case 0x13: /* LNA2 A+B */
1352 ant_conf->fast_div_bias = 0x7;
1354 case 0x20: /* LNA1 A-B */
1355 ant_conf->fast_div_bias = 0x6;
1357 case 0x21: /* LNA1 LNA2 */
1358 ant_conf->fast_div_bias = 0x0;
1360 case 0x23: /* LNA1 A+B */
1361 ant_conf->fast_div_bias = 0x6;
1363 case 0x30: /* A+B A-B */
1364 ant_conf->fast_div_bias = 0x1;
1366 case 0x31: /* A+B LNA2 */
1367 ant_conf->fast_div_bias = 0x3b;
1369 case 0x32: /* A+B LNA1 */
1370 ant_conf->fast_div_bias = 0x3d;
1375 } else if (ant_conf->div_group == 1) {
1376 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1377 switch ((ant_conf->main_lna_conf << 4) |
1378 ant_conf->alt_lna_conf) {
1379 case 0x01: /* A-B LNA2 */
1380 ant_conf->fast_div_bias = 0x1;
1381 ant_conf->main_gaintb = 0;
1382 ant_conf->alt_gaintb = 0;
1384 case 0x02: /* A-B LNA1 */
1385 ant_conf->fast_div_bias = 0x1;
1386 ant_conf->main_gaintb = 0;
1387 ant_conf->alt_gaintb = 0;
1389 case 0x03: /* A-B A+B */
1390 ant_conf->fast_div_bias = 0x1;
1391 ant_conf->main_gaintb = 0;
1392 ant_conf->alt_gaintb = 0;
1394 case 0x10: /* LNA2 A-B */
1395 if (!(antcomb->scan) &&
1396 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1397 ant_conf->fast_div_bias = 0x3f;
1399 ant_conf->fast_div_bias = 0x1;
1400 ant_conf->main_gaintb = 0;
1401 ant_conf->alt_gaintb = 0;
1403 case 0x12: /* LNA2 LNA1 */
1404 ant_conf->fast_div_bias = 0x1;
1405 ant_conf->main_gaintb = 0;
1406 ant_conf->alt_gaintb = 0;
1408 case 0x13: /* LNA2 A+B */
1409 if (!(antcomb->scan) &&
1410 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1411 ant_conf->fast_div_bias = 0x3f;
1413 ant_conf->fast_div_bias = 0x1;
1414 ant_conf->main_gaintb = 0;
1415 ant_conf->alt_gaintb = 0;
1417 case 0x20: /* LNA1 A-B */
1418 if (!(antcomb->scan) &&
1419 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1420 ant_conf->fast_div_bias = 0x3f;
1422 ant_conf->fast_div_bias = 0x1;
1423 ant_conf->main_gaintb = 0;
1424 ant_conf->alt_gaintb = 0;
1426 case 0x21: /* LNA1 LNA2 */
1427 ant_conf->fast_div_bias = 0x1;
1428 ant_conf->main_gaintb = 0;
1429 ant_conf->alt_gaintb = 0;
1431 case 0x23: /* LNA1 A+B */
1432 if (!(antcomb->scan) &&
1433 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1434 ant_conf->fast_div_bias = 0x3f;
1436 ant_conf->fast_div_bias = 0x1;
1437 ant_conf->main_gaintb = 0;
1438 ant_conf->alt_gaintb = 0;
1440 case 0x30: /* A+B A-B */
1441 ant_conf->fast_div_bias = 0x1;
1442 ant_conf->main_gaintb = 0;
1443 ant_conf->alt_gaintb = 0;
1445 case 0x31: /* A+B LNA2 */
1446 ant_conf->fast_div_bias = 0x1;
1447 ant_conf->main_gaintb = 0;
1448 ant_conf->alt_gaintb = 0;
1450 case 0x32: /* A+B LNA1 */
1451 ant_conf->fast_div_bias = 0x1;
1452 ant_conf->main_gaintb = 0;
1453 ant_conf->alt_gaintb = 0;
1458 } else if (ant_conf->div_group == 2) {
1459 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1460 switch ((ant_conf->main_lna_conf << 4) |
1461 ant_conf->alt_lna_conf) {
1462 case 0x01: /* A-B LNA2 */
1463 ant_conf->fast_div_bias = 0x1;
1464 ant_conf->main_gaintb = 0;
1465 ant_conf->alt_gaintb = 0;
1467 case 0x02: /* A-B LNA1 */
1468 ant_conf->fast_div_bias = 0x1;
1469 ant_conf->main_gaintb = 0;
1470 ant_conf->alt_gaintb = 0;
1472 case 0x03: /* A-B A+B */
1473 ant_conf->fast_div_bias = 0x1;
1474 ant_conf->main_gaintb = 0;
1475 ant_conf->alt_gaintb = 0;
1477 case 0x10: /* LNA2 A-B */
1478 if (!(antcomb->scan) &&
1479 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1480 ant_conf->fast_div_bias = 0x1;
1482 ant_conf->fast_div_bias = 0x2;
1483 ant_conf->main_gaintb = 0;
1484 ant_conf->alt_gaintb = 0;
1486 case 0x12: /* LNA2 LNA1 */
1487 ant_conf->fast_div_bias = 0x1;
1488 ant_conf->main_gaintb = 0;
1489 ant_conf->alt_gaintb = 0;
1491 case 0x13: /* LNA2 A+B */
1492 if (!(antcomb->scan) &&
1493 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1494 ant_conf->fast_div_bias = 0x1;
1496 ant_conf->fast_div_bias = 0x2;
1497 ant_conf->main_gaintb = 0;
1498 ant_conf->alt_gaintb = 0;
1500 case 0x20: /* LNA1 A-B */
1501 if (!(antcomb->scan) &&
1502 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1503 ant_conf->fast_div_bias = 0x1;
1505 ant_conf->fast_div_bias = 0x2;
1506 ant_conf->main_gaintb = 0;
1507 ant_conf->alt_gaintb = 0;
1509 case 0x21: /* LNA1 LNA2 */
1510 ant_conf->fast_div_bias = 0x1;
1511 ant_conf->main_gaintb = 0;
1512 ant_conf->alt_gaintb = 0;
1514 case 0x23: /* LNA1 A+B */
1515 if (!(antcomb->scan) &&
1516 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1517 ant_conf->fast_div_bias = 0x1;
1519 ant_conf->fast_div_bias = 0x2;
1520 ant_conf->main_gaintb = 0;
1521 ant_conf->alt_gaintb = 0;
1523 case 0x30: /* A+B A-B */
1524 ant_conf->fast_div_bias = 0x1;
1525 ant_conf->main_gaintb = 0;
1526 ant_conf->alt_gaintb = 0;
1528 case 0x31: /* A+B LNA2 */
1529 ant_conf->fast_div_bias = 0x1;
1530 ant_conf->main_gaintb = 0;
1531 ant_conf->alt_gaintb = 0;
1533 case 0x32: /* A+B LNA1 */
1534 ant_conf->fast_div_bias = 0x1;
1535 ant_conf->main_gaintb = 0;
1536 ant_conf->alt_gaintb = 0;
1544 /* Antenna diversity and combining */
1545 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1547 struct ath_hw_antcomb_conf div_ant_conf;
1548 struct ath_ant_comb *antcomb = &sc->ant_comb;
1549 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1551 int main_rssi = rs->rs_rssi_ctl0;
1552 int alt_rssi = rs->rs_rssi_ctl1;
1553 int rx_ant_conf, main_ant_conf;
1554 bool short_scan = false;
1556 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1558 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1561 /* Record packet only when both main_rssi and alt_rssi is positive */
1562 if (main_rssi > 0 && alt_rssi > 0) {
1563 antcomb->total_pkt_count++;
1564 antcomb->main_total_rssi += main_rssi;
1565 antcomb->alt_total_rssi += alt_rssi;
1566 if (main_ant_conf == rx_ant_conf)
1567 antcomb->main_recv_cnt++;
1569 antcomb->alt_recv_cnt++;
1572 /* Short scan check */
1573 if (antcomb->scan && antcomb->alt_good) {
1574 if (time_after(jiffies, antcomb->scan_start_time +
1575 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1578 if (antcomb->total_pkt_count ==
1579 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1580 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1581 antcomb->total_pkt_count);
1582 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1587 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1588 rs->rs_moreaggr) && !short_scan)
1591 if (antcomb->total_pkt_count) {
1592 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1593 antcomb->total_pkt_count);
1594 main_rssi_avg = (antcomb->main_total_rssi /
1595 antcomb->total_pkt_count);
1596 alt_rssi_avg = (antcomb->alt_total_rssi /
1597 antcomb->total_pkt_count);
1601 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1602 curr_alt_set = div_ant_conf.alt_lna_conf;
1603 curr_main_set = div_ant_conf.main_lna_conf;
1607 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1608 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1609 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1611 antcomb->alt_good = true;
1613 antcomb->alt_good = false;
1617 antcomb->scan = true;
1618 antcomb->scan_not_start = true;
1621 if (!antcomb->scan) {
1622 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1623 alt_ratio, curr_main_set, curr_alt_set,
1624 alt_rssi_avg, main_rssi_avg)) {
1625 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1626 /* Switch main and alt LNA */
1627 div_ant_conf.main_lna_conf =
1628 ATH_ANT_DIV_COMB_LNA2;
1629 div_ant_conf.alt_lna_conf =
1630 ATH_ANT_DIV_COMB_LNA1;
1631 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1632 div_ant_conf.main_lna_conf =
1633 ATH_ANT_DIV_COMB_LNA1;
1634 div_ant_conf.alt_lna_conf =
1635 ATH_ANT_DIV_COMB_LNA2;
1639 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1640 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1641 /* Set alt to another LNA */
1642 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1643 div_ant_conf.alt_lna_conf =
1644 ATH_ANT_DIV_COMB_LNA1;
1645 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1646 div_ant_conf.alt_lna_conf =
1647 ATH_ANT_DIV_COMB_LNA2;
1652 if ((alt_rssi_avg < (main_rssi_avg +
1653 div_ant_conf.lna1_lna2_delta)))
1657 if (!antcomb->scan_not_start) {
1658 switch (curr_alt_set) {
1659 case ATH_ANT_DIV_COMB_LNA2:
1660 antcomb->rssi_lna2 = alt_rssi_avg;
1661 antcomb->rssi_lna1 = main_rssi_avg;
1662 antcomb->scan = true;
1664 div_ant_conf.main_lna_conf =
1665 ATH_ANT_DIV_COMB_LNA1;
1666 div_ant_conf.alt_lna_conf =
1667 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1669 case ATH_ANT_DIV_COMB_LNA1:
1670 antcomb->rssi_lna1 = alt_rssi_avg;
1671 antcomb->rssi_lna2 = main_rssi_avg;
1672 antcomb->scan = true;
1674 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1675 div_ant_conf.alt_lna_conf =
1676 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1678 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1679 antcomb->rssi_add = alt_rssi_avg;
1680 antcomb->scan = true;
1682 div_ant_conf.alt_lna_conf =
1683 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1685 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1686 antcomb->rssi_sub = alt_rssi_avg;
1687 antcomb->scan = false;
1688 if (antcomb->rssi_lna2 >
1689 (antcomb->rssi_lna1 +
1690 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1691 /* use LNA2 as main LNA */
1692 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1693 (antcomb->rssi_add > antcomb->rssi_sub)) {
1695 div_ant_conf.main_lna_conf =
1696 ATH_ANT_DIV_COMB_LNA2;
1697 div_ant_conf.alt_lna_conf =
1698 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1699 } else if (antcomb->rssi_sub >
1700 antcomb->rssi_lna1) {
1702 div_ant_conf.main_lna_conf =
1703 ATH_ANT_DIV_COMB_LNA2;
1704 div_ant_conf.alt_lna_conf =
1705 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1708 div_ant_conf.main_lna_conf =
1709 ATH_ANT_DIV_COMB_LNA2;
1710 div_ant_conf.alt_lna_conf =
1711 ATH_ANT_DIV_COMB_LNA1;
1714 /* use LNA1 as main LNA */
1715 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1716 (antcomb->rssi_add > antcomb->rssi_sub)) {
1718 div_ant_conf.main_lna_conf =
1719 ATH_ANT_DIV_COMB_LNA1;
1720 div_ant_conf.alt_lna_conf =
1721 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1722 } else if (antcomb->rssi_sub >
1723 antcomb->rssi_lna1) {
1725 div_ant_conf.main_lna_conf =
1726 ATH_ANT_DIV_COMB_LNA1;
1727 div_ant_conf.alt_lna_conf =
1728 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1731 div_ant_conf.main_lna_conf =
1732 ATH_ANT_DIV_COMB_LNA1;
1733 div_ant_conf.alt_lna_conf =
1734 ATH_ANT_DIV_COMB_LNA2;
1742 if (!antcomb->alt_good) {
1743 antcomb->scan_not_start = false;
1744 /* Set alt to another LNA */
1745 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1746 div_ant_conf.main_lna_conf =
1747 ATH_ANT_DIV_COMB_LNA2;
1748 div_ant_conf.alt_lna_conf =
1749 ATH_ANT_DIV_COMB_LNA1;
1750 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1751 div_ant_conf.main_lna_conf =
1752 ATH_ANT_DIV_COMB_LNA1;
1753 div_ant_conf.alt_lna_conf =
1754 ATH_ANT_DIV_COMB_LNA2;
1760 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1761 main_rssi_avg, alt_rssi_avg,
1764 antcomb->quick_scan_cnt++;
1767 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1768 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1770 antcomb->scan_start_time = jiffies;
1771 antcomb->total_pkt_count = 0;
1772 antcomb->main_total_rssi = 0;
1773 antcomb->alt_total_rssi = 0;
1774 antcomb->main_recv_cnt = 0;
1775 antcomb->alt_recv_cnt = 0;
1778 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1781 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1782 struct ieee80211_rx_status *rxs;
1783 struct ath_hw *ah = sc->sc_ah;
1784 struct ath_common *common = ath9k_hw_common(ah);
1786 * The hw can technically differ from common->hw when using ath9k
1787 * virtual wiphy so to account for that we iterate over the active
1788 * wiphys and find the appropriate wiphy and therefore hw.
1790 struct ieee80211_hw *hw = sc->hw;
1791 struct ieee80211_hdr *hdr;
1793 bool decrypt_error = false;
1794 struct ath_rx_status rs;
1795 enum ath9k_rx_qtype qtype;
1796 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1798 u8 rx_status_len = ah->caps.rx_status_len;
1801 unsigned long flags;
1804 dma_type = DMA_BIDIRECTIONAL;
1806 dma_type = DMA_FROM_DEVICE;
1808 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1809 spin_lock_bh(&sc->rx.rxbuflock);
1811 tsf = ath9k_hw_gettsf64(ah);
1812 tsf_lower = tsf & 0xffffffff;
1815 /* If handling rx interrupt and flush is in progress => exit */
1816 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1819 memset(&rs, 0, sizeof(rs));
1821 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1823 bf = ath_get_next_rx_buf(sc, &rs);
1833 * Take frame header from the first fragment and RX status from
1837 hdr_skb = sc->rx.frag;
1841 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1842 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1844 ath_debug_stat_rx(sc, &rs);
1847 * If we're asked to flush receive queue, directly
1848 * chain it back at the queue without processing it.
1851 goto requeue_drop_frag;
1853 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1854 rxs, &decrypt_error);
1856 goto requeue_drop_frag;
1858 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1859 if (rs.rs_tstamp > tsf_lower &&
1860 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1861 rxs->mactime -= 0x100000000ULL;
1863 if (rs.rs_tstamp < tsf_lower &&
1864 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1865 rxs->mactime += 0x100000000ULL;
1867 /* Ensure we always have an skb to requeue once we are done
1868 * processing the current buffer's skb */
1869 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1871 /* If there is no memory we ignore the current RX'd frame,
1872 * tell hardware it can give us a new frame using the old
1873 * skb and put it at the tail of the sc->rx.rxbuf list for
1876 goto requeue_drop_frag;
1878 /* Unmap the frame */
1879 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1883 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1884 if (ah->caps.rx_status_len)
1885 skb_pull(skb, ah->caps.rx_status_len);
1888 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1889 rxs, decrypt_error);
1891 /* We will now give hardware our shiny new allocated skb */
1892 bf->bf_mpdu = requeue_skb;
1893 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1896 if (unlikely(dma_mapping_error(sc->dev,
1897 bf->bf_buf_addr))) {
1898 dev_kfree_skb_any(requeue_skb);
1900 bf->bf_buf_addr = 0;
1901 ath_err(common, "dma_mapping_error() on RX\n");
1902 ieee80211_rx(hw, skb);
1908 * rs_more indicates chained descriptors which can be
1909 * used to link buffers together for a sort of
1910 * scatter-gather operation.
1913 /* too many fragments - cannot handle frame */
1914 dev_kfree_skb_any(sc->rx.frag);
1915 dev_kfree_skb_any(skb);
1923 int space = skb->len - skb_tailroom(hdr_skb);
1927 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1929 goto requeue_drop_frag;
1932 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1934 dev_kfree_skb_any(skb);
1939 * change the default rx antenna if rx diversity chooses the
1940 * other antenna 3 times in a row.
1942 if (sc->rx.defant != rs.rs_antenna) {
1943 if (++sc->rx.rxotherant >= 3)
1944 ath_setdefantenna(sc, rs.rs_antenna);
1946 sc->rx.rxotherant = 0;
1949 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1950 skb_trim(skb, skb->len - 8);
1952 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1954 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1956 PS_WAIT_FOR_PSPOLL_DATA)) ||
1957 ath9k_check_auto_sleep(sc))
1959 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1961 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1962 ath_ant_comb_scan(sc, &rs);
1964 ieee80211_rx(hw, skb);
1968 dev_kfree_skb_any(sc->rx.frag);
1973 list_add_tail(&bf->list, &sc->rx.rxbuf);
1974 ath_rx_edma_buf_link(sc, qtype);
1976 list_move_tail(&bf->list, &sc->rx.rxbuf);
1977 ath_rx_buf_link(sc, bf);
1982 spin_unlock_bh(&sc->rx.rxbuflock);