2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
19 #include "ar9003_mac.h"
21 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24 int mindelta, int main_rssi_avg,
25 int alt_rssi_avg, int pkt_count)
27 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33 int curr_main_set, int curr_alt_set,
34 int alt_rssi_avg, int main_rssi_avg)
39 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
44 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
60 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
62 return sc->ps_enabled &&
63 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
67 * Setup and link descriptors.
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
74 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
76 struct ath_hw *ah = sc->sc_ah;
77 struct ath_common *common = ath9k_hw_common(ah);
84 ds->ds_link = 0; /* link to null */
85 ds->ds_data = bf->bf_buf_addr;
87 /* virtual addr of the beginning of the buffer. */
90 ds->ds_vdata = skb->data;
93 * setup rx descriptors. The rx_bufsize here tells the hardware
94 * how much data it can DMA to us and that we are prepared
97 ath9k_hw_setuprxdesc(ah, ds,
101 if (sc->rx.rxlink == NULL)
102 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
104 *sc->rx.rxlink = bf->bf_daddr;
106 sc->rx.rxlink = &ds->ds_link;
109 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc->sc_ah, antenna);
113 sc->rx.defant = antenna;
114 sc->rx.rxotherant = 0;
117 static void ath_opmode_init(struct ath_softc *sc)
119 struct ath_hw *ah = sc->sc_ah;
120 struct ath_common *common = ath9k_hw_common(ah);
124 /* configure rx filter */
125 rfilt = ath_calcrxfilter(sc);
126 ath9k_hw_setrxfilter(ah, rfilt);
128 /* configure bssid mask */
129 ath_hw_setbssidmask(common);
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah);
134 /* calculate and install multicast filter */
135 mfilt[0] = mfilt[1] = ~0;
136 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
139 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140 enum ath9k_rx_qtype qtype)
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_rx_edma *rx_edma;
147 rx_edma = &sc->rx.rx_edma[qtype];
148 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
151 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152 list_del_init(&bf->list);
157 memset(skb->data, 0, ah->caps.rx_status_len);
158 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159 ah->caps.rx_status_len, DMA_TO_DEVICE);
161 SKB_CB_ATHBUF(skb) = bf;
162 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163 skb_queue_tail(&rx_edma->rx_fifo, skb);
168 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169 enum ath9k_rx_qtype qtype, int size)
171 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
174 if (list_empty(&sc->rx.rxbuf)) {
175 ath_dbg(common, QUEUE, "No free rx buf available\n");
179 while (!list_empty(&sc->rx.rxbuf)) {
182 if (!ath_rx_edma_buf_link(sc, qtype))
190 static void ath_rx_remove_buffer(struct ath_softc *sc,
191 enum ath9k_rx_qtype qtype)
194 struct ath_rx_edma *rx_edma;
197 rx_edma = &sc->rx.rx_edma[qtype];
199 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
200 bf = SKB_CB_ATHBUF(skb);
202 list_add_tail(&bf->list, &sc->rx.rxbuf);
206 static void ath_rx_edma_cleanup(struct ath_softc *sc)
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
212 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
213 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
215 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
217 dma_unmap_single(sc->dev, bf->bf_buf_addr,
220 dev_kfree_skb_any(bf->bf_mpdu);
226 INIT_LIST_HEAD(&sc->rx.rxbuf);
228 kfree(sc->rx.rx_bufptr);
229 sc->rx.rx_bufptr = NULL;
232 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
234 skb_queue_head_init(&rx_edma->rx_fifo);
235 skb_queue_head_init(&rx_edma->rx_buffers);
236 rx_edma->rx_fifo_hwsize = size;
239 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
241 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
242 struct ath_hw *ah = sc->sc_ah;
248 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
249 ah->caps.rx_status_len);
251 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
252 ah->caps.rx_lp_qdepth);
253 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
254 ah->caps.rx_hp_qdepth);
256 size = sizeof(struct ath_buf) * nbufs;
257 bf = kzalloc(size, GFP_KERNEL);
261 INIT_LIST_HEAD(&sc->rx.rxbuf);
262 sc->rx.rx_bufptr = bf;
264 for (i = 0; i < nbufs; i++, bf++) {
265 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
271 memset(skb->data, 0, common->rx_bufsize);
274 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
277 if (unlikely(dma_mapping_error(sc->dev,
279 dev_kfree_skb_any(skb);
283 "dma_mapping_error() on RX init\n");
288 list_add_tail(&bf->list, &sc->rx.rxbuf);
294 ath_rx_edma_cleanup(sc);
298 static void ath_edma_start_recv(struct ath_softc *sc)
300 spin_lock_bh(&sc->rx.rxbuflock);
302 ath9k_hw_rxena(sc->sc_ah);
304 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
305 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
307 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
308 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
312 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
314 spin_unlock_bh(&sc->rx.rxbuflock);
317 static void ath_edma_stop_recv(struct ath_softc *sc)
319 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
320 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
323 int ath_rx_init(struct ath_softc *sc, int nbufs)
325 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
330 spin_lock_init(&sc->sc_pcu_lock);
331 sc->sc_flags &= ~SC_OP_RXFLUSH;
332 spin_lock_init(&sc->rx.rxbuflock);
334 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
335 sc->sc_ah->caps.rx_status_len;
337 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
338 return ath_rx_edma_init(sc, nbufs);
340 ath_dbg(common, CONFIG, "cachelsz %u rxbufsize %u\n",
341 common->cachelsz, common->rx_bufsize);
343 /* Initialize rx descriptors */
345 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
349 "failed to allocate rx descriptors: %d\n",
354 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
355 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
363 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
366 if (unlikely(dma_mapping_error(sc->dev,
368 dev_kfree_skb_any(skb);
372 "dma_mapping_error() on RX init\n");
377 sc->rx.rxlink = NULL;
387 void ath_rx_cleanup(struct ath_softc *sc)
389 struct ath_hw *ah = sc->sc_ah;
390 struct ath_common *common = ath9k_hw_common(ah);
394 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
395 ath_rx_edma_cleanup(sc);
398 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
401 dma_unmap_single(sc->dev, bf->bf_buf_addr,
410 if (sc->rx.rxdma.dd_desc_len != 0)
411 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
416 * Calculate the receive filter according to the
417 * operating mode and state:
419 * o always accept unicast, broadcast, and multicast traffic
420 * o maintain current state of phy error reception (the hal
421 * may enable phy error frames for noise immunity work)
422 * o probe request frames are accepted only when operating in
423 * hostap, adhoc, or monitor modes
424 * o enable promiscuous mode according to the interface state
426 * - when operating in adhoc mode so the 802.11 layer creates
427 * node table entries for peers,
428 * - when operating in station mode for collecting rssi data when
429 * the station is otherwise quiet, or
430 * - when operating as a repeater so we see repeater-sta beacons
434 u32 ath_calcrxfilter(struct ath_softc *sc)
438 rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
439 | ATH9K_RX_FILTER_MCAST;
441 if (sc->rx.rxfilter & FIF_PROBE_REQ)
442 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
445 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
446 * mode interface or when in monitor mode. AP mode does not need this
447 * since it receives all in-BSS frames anyway.
449 if (sc->sc_ah->is_monitoring)
450 rfilt |= ATH9K_RX_FILTER_PROM;
452 if (sc->rx.rxfilter & FIF_CONTROL)
453 rfilt |= ATH9K_RX_FILTER_CONTROL;
455 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
457 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
458 rfilt |= ATH9K_RX_FILTER_MYBEACON;
460 rfilt |= ATH9K_RX_FILTER_BEACON;
462 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
463 (sc->rx.rxfilter & FIF_PSPOLL))
464 rfilt |= ATH9K_RX_FILTER_PSPOLL;
466 if (conf_is_ht(&sc->hw->conf))
467 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
469 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
470 /* The following may also be needed for other older chips */
471 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
472 rfilt |= ATH9K_RX_FILTER_PROM;
473 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
480 int ath_startrecv(struct ath_softc *sc)
482 struct ath_hw *ah = sc->sc_ah;
483 struct ath_buf *bf, *tbf;
485 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
486 ath_edma_start_recv(sc);
490 spin_lock_bh(&sc->rx.rxbuflock);
491 if (list_empty(&sc->rx.rxbuf))
494 sc->rx.rxlink = NULL;
495 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
496 ath_rx_buf_link(sc, bf);
499 /* We could have deleted elements so the list may be empty now */
500 if (list_empty(&sc->rx.rxbuf))
503 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
504 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
509 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
511 spin_unlock_bh(&sc->rx.rxbuflock);
516 bool ath_stoprecv(struct ath_softc *sc)
518 struct ath_hw *ah = sc->sc_ah;
519 bool stopped, reset = false;
521 spin_lock_bh(&sc->rx.rxbuflock);
522 ath9k_hw_abortpcurecv(ah);
523 ath9k_hw_setrxfilter(ah, 0);
524 stopped = ath9k_hw_stopdmarecv(ah, &reset);
526 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
527 ath_edma_stop_recv(sc);
529 sc->rx.rxlink = NULL;
530 spin_unlock_bh(&sc->rx.rxbuflock);
532 if (!(ah->ah_flags & AH_UNPLUGGED) &&
533 unlikely(!stopped)) {
534 ath_err(ath9k_hw_common(sc->sc_ah),
535 "Could not stop RX, we could be "
536 "confusing the DMA engine when we start RX up\n");
537 ATH_DBG_WARN_ON_ONCE(!stopped);
539 return stopped && !reset;
542 void ath_flushrecv(struct ath_softc *sc)
544 sc->sc_flags |= SC_OP_RXFLUSH;
545 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
546 ath_rx_tasklet(sc, 1, true);
547 ath_rx_tasklet(sc, 1, false);
548 sc->sc_flags &= ~SC_OP_RXFLUSH;
551 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
553 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
554 struct ieee80211_mgmt *mgmt;
555 u8 *pos, *end, id, elen;
556 struct ieee80211_tim_ie *tim;
558 mgmt = (struct ieee80211_mgmt *)skb->data;
559 pos = mgmt->u.beacon.variable;
560 end = skb->data + skb->len;
562 while (pos + 2 < end) {
565 if (pos + elen > end)
568 if (id == WLAN_EID_TIM) {
569 if (elen < sizeof(*tim))
571 tim = (struct ieee80211_tim_ie *) pos;
572 if (tim->dtim_count != 0)
574 return tim->bitmap_ctrl & 0x01;
583 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
585 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
587 if (skb->len < 24 + 8 + 2 + 2)
590 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
592 if (sc->ps_flags & PS_BEACON_SYNC) {
593 sc->ps_flags &= ~PS_BEACON_SYNC;
595 "Reconfigure Beacon timers based on timestamp from the AP\n");
599 if (ath_beacon_dtim_pending_cab(skb)) {
601 * Remain awake waiting for buffered broadcast/multicast
602 * frames. If the last broadcast/multicast frame is not
603 * received properly, the next beacon frame will work as
604 * a backup trigger for returning into NETWORK SLEEP state,
605 * so we are waiting for it as well.
608 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
609 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
613 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
615 * This can happen if a broadcast frame is dropped or the AP
616 * fails to send a frame indicating that all CAB frames have
619 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
620 ath_dbg(common, PS, "PS wait for CAB frames timed out\n");
624 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb, bool mybeacon)
626 struct ieee80211_hdr *hdr;
627 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
629 hdr = (struct ieee80211_hdr *)skb->data;
631 /* Process Beacon and CAB receive in PS state */
632 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
634 ath_rx_ps_beacon(sc, skb);
635 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
636 (ieee80211_is_data(hdr->frame_control) ||
637 ieee80211_is_action(hdr->frame_control)) &&
638 is_multicast_ether_addr(hdr->addr1) &&
639 !ieee80211_has_moredata(hdr->frame_control)) {
641 * No more broadcast/multicast frames to be received at this
644 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
646 "All PS CAB frames received, back to sleep\n");
647 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
648 !is_multicast_ether_addr(hdr->addr1) &&
649 !ieee80211_has_morefrags(hdr->frame_control)) {
650 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
652 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
653 sc->ps_flags & (PS_WAIT_FOR_BEACON |
655 PS_WAIT_FOR_PSPOLL_DATA |
656 PS_WAIT_FOR_TX_ACK));
660 static bool ath_edma_get_buffers(struct ath_softc *sc,
661 enum ath9k_rx_qtype qtype)
663 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
664 struct ath_hw *ah = sc->sc_ah;
665 struct ath_common *common = ath9k_hw_common(ah);
670 skb = skb_peek(&rx_edma->rx_fifo);
674 bf = SKB_CB_ATHBUF(skb);
677 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
678 common->rx_bufsize, DMA_FROM_DEVICE);
680 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
681 if (ret == -EINPROGRESS) {
682 /*let device gain the buffer again*/
683 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
684 common->rx_bufsize, DMA_FROM_DEVICE);
688 __skb_unlink(skb, &rx_edma->rx_fifo);
689 if (ret == -EINVAL) {
690 /* corrupt descriptor, skip this one and the following one */
691 list_add_tail(&bf->list, &sc->rx.rxbuf);
692 ath_rx_edma_buf_link(sc, qtype);
693 skb = skb_peek(&rx_edma->rx_fifo);
697 bf = SKB_CB_ATHBUF(skb);
700 __skb_unlink(skb, &rx_edma->rx_fifo);
701 list_add_tail(&bf->list, &sc->rx.rxbuf);
702 ath_rx_edma_buf_link(sc, qtype);
705 skb_queue_tail(&rx_edma->rx_buffers, skb);
710 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
711 struct ath_rx_status *rs,
712 enum ath9k_rx_qtype qtype)
714 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
718 while (ath_edma_get_buffers(sc, qtype));
719 skb = __skb_dequeue(&rx_edma->rx_buffers);
723 bf = SKB_CB_ATHBUF(skb);
724 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
728 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
729 struct ath_rx_status *rs)
731 struct ath_hw *ah = sc->sc_ah;
732 struct ath_common *common = ath9k_hw_common(ah);
737 if (list_empty(&sc->rx.rxbuf)) {
738 sc->rx.rxlink = NULL;
742 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
746 * Must provide the virtual address of the current
747 * descriptor, the physical address, and the virtual
748 * address of the next descriptor in the h/w chain.
749 * This allows the HAL to look ahead to see if the
750 * hardware is done with a descriptor by checking the
751 * done bit in the following descriptor and the address
752 * of the current descriptor the DMA engine is working
753 * on. All this is necessary because of our use of
754 * a self-linked list to avoid rx overruns.
756 ret = ath9k_hw_rxprocdesc(ah, ds, rs);
757 if (ret == -EINPROGRESS) {
758 struct ath_rx_status trs;
760 struct ath_desc *tds;
762 memset(&trs, 0, sizeof(trs));
763 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
764 sc->rx.rxlink = NULL;
768 tbf = list_entry(bf->list.next, struct ath_buf, list);
771 * On some hardware the descriptor status words could
772 * get corrupted, including the done bit. Because of
773 * this, check if the next descriptor's done bit is
776 * If the next descriptor's done bit is set, the current
777 * descriptor has been corrupted. Force s/w to discard
778 * this descriptor and continue...
782 ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
783 if (ret == -EINPROGRESS)
791 * Synchronize the DMA transfer with CPU before
792 * 1. accessing the frame
793 * 2. requeueing the same buffer to h/w
795 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
802 /* Assumes you've already done the endian to CPU conversion */
803 static bool ath9k_rx_accept(struct ath_common *common,
804 struct ieee80211_hdr *hdr,
805 struct ieee80211_rx_status *rxs,
806 struct ath_rx_status *rx_stats,
809 struct ath_softc *sc = (struct ath_softc *) common->priv;
810 bool is_mc, is_valid_tkip, strip_mic, mic_error;
811 struct ath_hw *ah = common->ah;
813 u8 rx_status_len = ah->caps.rx_status_len;
815 fc = hdr->frame_control;
817 is_mc = !!is_multicast_ether_addr(hdr->addr1);
818 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
819 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
820 strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
821 !(rx_stats->rs_status &
822 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
823 ATH9K_RXERR_KEYMISS));
826 * Key miss events are only relevant for pairwise keys where the
827 * descriptor does contain a valid key index. This has been observed
828 * mostly with CCMP encryption.
830 if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID)
831 rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
833 if (!rx_stats->rs_datalen)
836 * rs_status follows rs_datalen so if rs_datalen is too large
837 * we can take a hint that hardware corrupted it, so ignore
840 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
843 /* Only use error bits from the last fragment */
844 if (rx_stats->rs_more)
847 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
848 !ieee80211_has_morefrags(fc) &&
849 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
850 (rx_stats->rs_status & ATH9K_RXERR_MIC);
853 * The rx_stats->rs_status will not be set until the end of the
854 * chained descriptors so it can be ignored if rs_more is set. The
855 * rs_more will be false at the last element of the chained
858 if (rx_stats->rs_status != 0) {
861 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
862 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
865 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
868 if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
869 (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
870 *decrypt_error = true;
875 * Reject error frames with the exception of
876 * decryption and MIC failures. For monitor mode,
877 * we also ignore the CRC error.
879 status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
882 if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
883 status_mask |= ATH9K_RXERR_CRC;
885 if (rx_stats->rs_status & ~status_mask)
890 * For unicast frames the MIC error bit can have false positives,
891 * so all MIC error reports need to be validated in software.
892 * False negatives are not common, so skip software verification
893 * if the hardware considers the MIC valid.
896 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
897 else if (is_mc && mic_error)
898 rxs->flag |= RX_FLAG_MMIC_ERROR;
903 static int ath9k_process_rate(struct ath_common *common,
904 struct ieee80211_hw *hw,
905 struct ath_rx_status *rx_stats,
906 struct ieee80211_rx_status *rxs)
908 struct ieee80211_supported_band *sband;
909 enum ieee80211_band band;
912 band = hw->conf.channel->band;
913 sband = hw->wiphy->bands[band];
915 if (rx_stats->rs_rate & 0x80) {
917 rxs->flag |= RX_FLAG_HT;
918 if (rx_stats->rs_flags & ATH9K_RX_2040)
919 rxs->flag |= RX_FLAG_40MHZ;
920 if (rx_stats->rs_flags & ATH9K_RX_GI)
921 rxs->flag |= RX_FLAG_SHORT_GI;
922 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
926 for (i = 0; i < sband->n_bitrates; i++) {
927 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
931 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
932 rxs->flag |= RX_FLAG_SHORTPRE;
939 * No valid hardware bitrate found -- we should not get here
940 * because hardware has already validated this frame as OK.
943 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
949 static void ath9k_process_rssi(struct ath_common *common,
950 struct ieee80211_hw *hw,
951 struct ieee80211_hdr *hdr,
952 struct ath_rx_status *rx_stats)
954 struct ath_softc *sc = hw->priv;
955 struct ath_hw *ah = common->ah;
958 if (!rx_stats->is_mybeacon ||
959 ((ah->opmode != NL80211_IFTYPE_STATION) &&
960 (ah->opmode != NL80211_IFTYPE_ADHOC)))
963 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
964 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
966 last_rssi = sc->last_rssi;
967 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
968 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
969 ATH_RSSI_EP_MULTIPLIER);
970 if (rx_stats->rs_rssi < 0)
971 rx_stats->rs_rssi = 0;
973 /* Update Beacon RSSI, this is used by ANI. */
974 ah->stats.avgbrssi = rx_stats->rs_rssi;
978 * For Decrypt or Demic errors, we only mark packet status here and always push
979 * up the frame up to let mac80211 handle the actual error case, be it no
980 * decryption key or real decryption error. This let us keep statistics there.
982 static int ath9k_rx_skb_preprocess(struct ath_common *common,
983 struct ieee80211_hw *hw,
984 struct ieee80211_hdr *hdr,
985 struct ath_rx_status *rx_stats,
986 struct ieee80211_rx_status *rx_status,
989 struct ath_hw *ah = common->ah;
991 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
994 * everything but the rate is checked here, the rate check is done
995 * separately to avoid doing two lookups for a rate for each frame.
997 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1000 /* Only use status info from the last fragment */
1001 if (rx_stats->rs_more)
1004 ath9k_process_rssi(common, hw, hdr, rx_stats);
1006 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1009 rx_status->band = hw->conf.channel->band;
1010 rx_status->freq = hw->conf.channel->center_freq;
1011 rx_status->signal = ah->noise + rx_stats->rs_rssi;
1012 rx_status->antenna = rx_stats->rs_antenna;
1013 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1018 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1019 struct sk_buff *skb,
1020 struct ath_rx_status *rx_stats,
1021 struct ieee80211_rx_status *rxs,
1024 struct ath_hw *ah = common->ah;
1025 struct ieee80211_hdr *hdr;
1026 int hdrlen, padpos, padsize;
1030 /* see if any padding is done by the hw and remove it */
1031 hdr = (struct ieee80211_hdr *) skb->data;
1032 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1033 fc = hdr->frame_control;
1034 padpos = ath9k_cmn_padpos(hdr->frame_control);
1036 /* The MAC header is padded to have 32-bit boundary if the
1037 * packet payload is non-zero. The general calculation for
1038 * padsize would take into account odd header lengths:
1039 * padsize = (4 - padpos % 4) % 4; However, since only
1040 * even-length headers are used, padding can only be 0 or 2
1041 * bytes and we can optimize this a bit. In addition, we must
1042 * not try to remove padding from short control frames that do
1043 * not have payload. */
1044 padsize = padpos & 3;
1045 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1046 memmove(skb->data + padsize, skb->data, padpos);
1047 skb_pull(skb, padsize);
1050 keyix = rx_stats->rs_keyix;
1052 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1053 ieee80211_has_protected(fc)) {
1054 rxs->flag |= RX_FLAG_DECRYPTED;
1055 } else if (ieee80211_has_protected(fc)
1056 && !decrypt_error && skb->len >= hdrlen + 4) {
1057 keyix = skb->data[hdrlen + 3] >> 6;
1059 if (test_bit(keyix, common->keymap))
1060 rxs->flag |= RX_FLAG_DECRYPTED;
1062 if (ah->sw_mgmt_crypto &&
1063 (rxs->flag & RX_FLAG_DECRYPTED) &&
1064 ieee80211_is_mgmt(fc))
1065 /* Use software decrypt for management frames. */
1066 rxs->flag &= ~RX_FLAG_DECRYPTED;
1069 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1070 struct ath_hw_antcomb_conf ant_conf,
1073 antcomb->quick_scan_cnt = 0;
1075 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1076 antcomb->rssi_lna2 = main_rssi_avg;
1077 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1078 antcomb->rssi_lna1 = main_rssi_avg;
1080 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1081 case 0x10: /* LNA2 A-B */
1082 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1083 antcomb->first_quick_scan_conf =
1084 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1085 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1087 case 0x20: /* LNA1 A-B */
1088 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1089 antcomb->first_quick_scan_conf =
1090 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1091 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1093 case 0x21: /* LNA1 LNA2 */
1094 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1095 antcomb->first_quick_scan_conf =
1096 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1097 antcomb->second_quick_scan_conf =
1098 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1100 case 0x12: /* LNA2 LNA1 */
1101 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1102 antcomb->first_quick_scan_conf =
1103 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1104 antcomb->second_quick_scan_conf =
1105 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1107 case 0x13: /* LNA2 A+B */
1108 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1109 antcomb->first_quick_scan_conf =
1110 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1111 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1113 case 0x23: /* LNA1 A+B */
1114 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1115 antcomb->first_quick_scan_conf =
1116 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1117 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1124 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1125 struct ath_hw_antcomb_conf *div_ant_conf,
1126 int main_rssi_avg, int alt_rssi_avg,
1130 switch (antcomb->quick_scan_cnt) {
1132 /* set alt to main, and alt to first conf */
1133 div_ant_conf->main_lna_conf = antcomb->main_conf;
1134 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1137 /* set alt to main, and alt to first conf */
1138 div_ant_conf->main_lna_conf = antcomb->main_conf;
1139 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1140 antcomb->rssi_first = main_rssi_avg;
1141 antcomb->rssi_second = alt_rssi_avg;
1143 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1145 if (ath_is_alt_ant_ratio_better(alt_ratio,
1146 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1147 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1148 main_rssi_avg, alt_rssi_avg,
1149 antcomb->total_pkt_count))
1150 antcomb->first_ratio = true;
1152 antcomb->first_ratio = false;
1153 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1154 if (ath_is_alt_ant_ratio_better(alt_ratio,
1155 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1156 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1157 main_rssi_avg, alt_rssi_avg,
1158 antcomb->total_pkt_count))
1159 antcomb->first_ratio = true;
1161 antcomb->first_ratio = false;
1163 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1164 (alt_rssi_avg > main_rssi_avg +
1165 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1166 (alt_rssi_avg > main_rssi_avg)) &&
1167 (antcomb->total_pkt_count > 50))
1168 antcomb->first_ratio = true;
1170 antcomb->first_ratio = false;
1174 antcomb->alt_good = false;
1175 antcomb->scan_not_start = false;
1176 antcomb->scan = false;
1177 antcomb->rssi_first = main_rssi_avg;
1178 antcomb->rssi_third = alt_rssi_avg;
1180 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1181 antcomb->rssi_lna1 = alt_rssi_avg;
1182 else if (antcomb->second_quick_scan_conf ==
1183 ATH_ANT_DIV_COMB_LNA2)
1184 antcomb->rssi_lna2 = alt_rssi_avg;
1185 else if (antcomb->second_quick_scan_conf ==
1186 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1187 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1188 antcomb->rssi_lna2 = main_rssi_avg;
1189 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1190 antcomb->rssi_lna1 = main_rssi_avg;
1193 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1194 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1195 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1197 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1199 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1200 if (ath_is_alt_ant_ratio_better(alt_ratio,
1201 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1202 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1203 main_rssi_avg, alt_rssi_avg,
1204 antcomb->total_pkt_count))
1205 antcomb->second_ratio = true;
1207 antcomb->second_ratio = false;
1208 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1209 if (ath_is_alt_ant_ratio_better(alt_ratio,
1210 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1211 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1212 main_rssi_avg, alt_rssi_avg,
1213 antcomb->total_pkt_count))
1214 antcomb->second_ratio = true;
1216 antcomb->second_ratio = false;
1218 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1219 (alt_rssi_avg > main_rssi_avg +
1220 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1221 (alt_rssi_avg > main_rssi_avg)) &&
1222 (antcomb->total_pkt_count > 50))
1223 antcomb->second_ratio = true;
1225 antcomb->second_ratio = false;
1228 /* set alt to the conf with maximun ratio */
1229 if (antcomb->first_ratio && antcomb->second_ratio) {
1230 if (antcomb->rssi_second > antcomb->rssi_third) {
1232 if ((antcomb->first_quick_scan_conf ==
1233 ATH_ANT_DIV_COMB_LNA1) ||
1234 (antcomb->first_quick_scan_conf ==
1235 ATH_ANT_DIV_COMB_LNA2))
1236 /* Set alt LNA1 or LNA2*/
1237 if (div_ant_conf->main_lna_conf ==
1238 ATH_ANT_DIV_COMB_LNA2)
1239 div_ant_conf->alt_lna_conf =
1240 ATH_ANT_DIV_COMB_LNA1;
1242 div_ant_conf->alt_lna_conf =
1243 ATH_ANT_DIV_COMB_LNA2;
1245 /* Set alt to A+B or A-B */
1246 div_ant_conf->alt_lna_conf =
1247 antcomb->first_quick_scan_conf;
1248 } else if ((antcomb->second_quick_scan_conf ==
1249 ATH_ANT_DIV_COMB_LNA1) ||
1250 (antcomb->second_quick_scan_conf ==
1251 ATH_ANT_DIV_COMB_LNA2)) {
1252 /* Set alt LNA1 or LNA2 */
1253 if (div_ant_conf->main_lna_conf ==
1254 ATH_ANT_DIV_COMB_LNA2)
1255 div_ant_conf->alt_lna_conf =
1256 ATH_ANT_DIV_COMB_LNA1;
1258 div_ant_conf->alt_lna_conf =
1259 ATH_ANT_DIV_COMB_LNA2;
1261 /* Set alt to A+B or A-B */
1262 div_ant_conf->alt_lna_conf =
1263 antcomb->second_quick_scan_conf;
1265 } else if (antcomb->first_ratio) {
1267 if ((antcomb->first_quick_scan_conf ==
1268 ATH_ANT_DIV_COMB_LNA1) ||
1269 (antcomb->first_quick_scan_conf ==
1270 ATH_ANT_DIV_COMB_LNA2))
1271 /* Set alt LNA1 or LNA2 */
1272 if (div_ant_conf->main_lna_conf ==
1273 ATH_ANT_DIV_COMB_LNA2)
1274 div_ant_conf->alt_lna_conf =
1275 ATH_ANT_DIV_COMB_LNA1;
1277 div_ant_conf->alt_lna_conf =
1278 ATH_ANT_DIV_COMB_LNA2;
1280 /* Set alt to A+B or A-B */
1281 div_ant_conf->alt_lna_conf =
1282 antcomb->first_quick_scan_conf;
1283 } else if (antcomb->second_ratio) {
1285 if ((antcomb->second_quick_scan_conf ==
1286 ATH_ANT_DIV_COMB_LNA1) ||
1287 (antcomb->second_quick_scan_conf ==
1288 ATH_ANT_DIV_COMB_LNA2))
1289 /* Set alt LNA1 or LNA2 */
1290 if (div_ant_conf->main_lna_conf ==
1291 ATH_ANT_DIV_COMB_LNA2)
1292 div_ant_conf->alt_lna_conf =
1293 ATH_ANT_DIV_COMB_LNA1;
1295 div_ant_conf->alt_lna_conf =
1296 ATH_ANT_DIV_COMB_LNA2;
1298 /* Set alt to A+B or A-B */
1299 div_ant_conf->alt_lna_conf =
1300 antcomb->second_quick_scan_conf;
1302 /* main is largest */
1303 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1304 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1305 /* Set alt LNA1 or LNA2 */
1306 if (div_ant_conf->main_lna_conf ==
1307 ATH_ANT_DIV_COMB_LNA2)
1308 div_ant_conf->alt_lna_conf =
1309 ATH_ANT_DIV_COMB_LNA1;
1311 div_ant_conf->alt_lna_conf =
1312 ATH_ANT_DIV_COMB_LNA2;
1314 /* Set alt to A+B or A-B */
1315 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1323 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1324 struct ath_ant_comb *antcomb, int alt_ratio)
1326 if (ant_conf->div_group == 0) {
1327 /* Adjust the fast_div_bias based on main and alt lna conf */
1328 switch ((ant_conf->main_lna_conf << 4) |
1329 ant_conf->alt_lna_conf) {
1330 case 0x01: /* A-B LNA2 */
1331 ant_conf->fast_div_bias = 0x3b;
1333 case 0x02: /* A-B LNA1 */
1334 ant_conf->fast_div_bias = 0x3d;
1336 case 0x03: /* A-B A+B */
1337 ant_conf->fast_div_bias = 0x1;
1339 case 0x10: /* LNA2 A-B */
1340 ant_conf->fast_div_bias = 0x7;
1342 case 0x12: /* LNA2 LNA1 */
1343 ant_conf->fast_div_bias = 0x2;
1345 case 0x13: /* LNA2 A+B */
1346 ant_conf->fast_div_bias = 0x7;
1348 case 0x20: /* LNA1 A-B */
1349 ant_conf->fast_div_bias = 0x6;
1351 case 0x21: /* LNA1 LNA2 */
1352 ant_conf->fast_div_bias = 0x0;
1354 case 0x23: /* LNA1 A+B */
1355 ant_conf->fast_div_bias = 0x6;
1357 case 0x30: /* A+B A-B */
1358 ant_conf->fast_div_bias = 0x1;
1360 case 0x31: /* A+B LNA2 */
1361 ant_conf->fast_div_bias = 0x3b;
1363 case 0x32: /* A+B LNA1 */
1364 ant_conf->fast_div_bias = 0x3d;
1369 } else if (ant_conf->div_group == 1) {
1370 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1371 switch ((ant_conf->main_lna_conf << 4) |
1372 ant_conf->alt_lna_conf) {
1373 case 0x01: /* A-B LNA2 */
1374 ant_conf->fast_div_bias = 0x1;
1375 ant_conf->main_gaintb = 0;
1376 ant_conf->alt_gaintb = 0;
1378 case 0x02: /* A-B LNA1 */
1379 ant_conf->fast_div_bias = 0x1;
1380 ant_conf->main_gaintb = 0;
1381 ant_conf->alt_gaintb = 0;
1383 case 0x03: /* A-B A+B */
1384 ant_conf->fast_div_bias = 0x1;
1385 ant_conf->main_gaintb = 0;
1386 ant_conf->alt_gaintb = 0;
1388 case 0x10: /* LNA2 A-B */
1389 if (!(antcomb->scan) &&
1390 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1391 ant_conf->fast_div_bias = 0x3f;
1393 ant_conf->fast_div_bias = 0x1;
1394 ant_conf->main_gaintb = 0;
1395 ant_conf->alt_gaintb = 0;
1397 case 0x12: /* LNA2 LNA1 */
1398 ant_conf->fast_div_bias = 0x1;
1399 ant_conf->main_gaintb = 0;
1400 ant_conf->alt_gaintb = 0;
1402 case 0x13: /* LNA2 A+B */
1403 if (!(antcomb->scan) &&
1404 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1405 ant_conf->fast_div_bias = 0x3f;
1407 ant_conf->fast_div_bias = 0x1;
1408 ant_conf->main_gaintb = 0;
1409 ant_conf->alt_gaintb = 0;
1411 case 0x20: /* LNA1 A-B */
1412 if (!(antcomb->scan) &&
1413 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1414 ant_conf->fast_div_bias = 0x3f;
1416 ant_conf->fast_div_bias = 0x1;
1417 ant_conf->main_gaintb = 0;
1418 ant_conf->alt_gaintb = 0;
1420 case 0x21: /* LNA1 LNA2 */
1421 ant_conf->fast_div_bias = 0x1;
1422 ant_conf->main_gaintb = 0;
1423 ant_conf->alt_gaintb = 0;
1425 case 0x23: /* LNA1 A+B */
1426 if (!(antcomb->scan) &&
1427 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1428 ant_conf->fast_div_bias = 0x3f;
1430 ant_conf->fast_div_bias = 0x1;
1431 ant_conf->main_gaintb = 0;
1432 ant_conf->alt_gaintb = 0;
1434 case 0x30: /* A+B A-B */
1435 ant_conf->fast_div_bias = 0x1;
1436 ant_conf->main_gaintb = 0;
1437 ant_conf->alt_gaintb = 0;
1439 case 0x31: /* A+B LNA2 */
1440 ant_conf->fast_div_bias = 0x1;
1441 ant_conf->main_gaintb = 0;
1442 ant_conf->alt_gaintb = 0;
1444 case 0x32: /* A+B LNA1 */
1445 ant_conf->fast_div_bias = 0x1;
1446 ant_conf->main_gaintb = 0;
1447 ant_conf->alt_gaintb = 0;
1452 } else if (ant_conf->div_group == 2) {
1453 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1454 switch ((ant_conf->main_lna_conf << 4) |
1455 ant_conf->alt_lna_conf) {
1456 case 0x01: /* A-B LNA2 */
1457 ant_conf->fast_div_bias = 0x1;
1458 ant_conf->main_gaintb = 0;
1459 ant_conf->alt_gaintb = 0;
1461 case 0x02: /* A-B LNA1 */
1462 ant_conf->fast_div_bias = 0x1;
1463 ant_conf->main_gaintb = 0;
1464 ant_conf->alt_gaintb = 0;
1466 case 0x03: /* A-B A+B */
1467 ant_conf->fast_div_bias = 0x1;
1468 ant_conf->main_gaintb = 0;
1469 ant_conf->alt_gaintb = 0;
1471 case 0x10: /* LNA2 A-B */
1472 if (!(antcomb->scan) &&
1473 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1474 ant_conf->fast_div_bias = 0x1;
1476 ant_conf->fast_div_bias = 0x2;
1477 ant_conf->main_gaintb = 0;
1478 ant_conf->alt_gaintb = 0;
1480 case 0x12: /* LNA2 LNA1 */
1481 ant_conf->fast_div_bias = 0x1;
1482 ant_conf->main_gaintb = 0;
1483 ant_conf->alt_gaintb = 0;
1485 case 0x13: /* LNA2 A+B */
1486 if (!(antcomb->scan) &&
1487 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1488 ant_conf->fast_div_bias = 0x1;
1490 ant_conf->fast_div_bias = 0x2;
1491 ant_conf->main_gaintb = 0;
1492 ant_conf->alt_gaintb = 0;
1494 case 0x20: /* LNA1 A-B */
1495 if (!(antcomb->scan) &&
1496 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1497 ant_conf->fast_div_bias = 0x1;
1499 ant_conf->fast_div_bias = 0x2;
1500 ant_conf->main_gaintb = 0;
1501 ant_conf->alt_gaintb = 0;
1503 case 0x21: /* LNA1 LNA2 */
1504 ant_conf->fast_div_bias = 0x1;
1505 ant_conf->main_gaintb = 0;
1506 ant_conf->alt_gaintb = 0;
1508 case 0x23: /* LNA1 A+B */
1509 if (!(antcomb->scan) &&
1510 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1511 ant_conf->fast_div_bias = 0x1;
1513 ant_conf->fast_div_bias = 0x2;
1514 ant_conf->main_gaintb = 0;
1515 ant_conf->alt_gaintb = 0;
1517 case 0x30: /* A+B A-B */
1518 ant_conf->fast_div_bias = 0x1;
1519 ant_conf->main_gaintb = 0;
1520 ant_conf->alt_gaintb = 0;
1522 case 0x31: /* A+B LNA2 */
1523 ant_conf->fast_div_bias = 0x1;
1524 ant_conf->main_gaintb = 0;
1525 ant_conf->alt_gaintb = 0;
1527 case 0x32: /* A+B LNA1 */
1528 ant_conf->fast_div_bias = 0x1;
1529 ant_conf->main_gaintb = 0;
1530 ant_conf->alt_gaintb = 0;
1538 /* Antenna diversity and combining */
1539 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1541 struct ath_hw_antcomb_conf div_ant_conf;
1542 struct ath_ant_comb *antcomb = &sc->ant_comb;
1543 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1545 int main_rssi = rs->rs_rssi_ctl0;
1546 int alt_rssi = rs->rs_rssi_ctl1;
1547 int rx_ant_conf, main_ant_conf;
1548 bool short_scan = false;
1550 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1552 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1555 /* Record packet only when both main_rssi and alt_rssi is positive */
1556 if (main_rssi > 0 && alt_rssi > 0) {
1557 antcomb->total_pkt_count++;
1558 antcomb->main_total_rssi += main_rssi;
1559 antcomb->alt_total_rssi += alt_rssi;
1560 if (main_ant_conf == rx_ant_conf)
1561 antcomb->main_recv_cnt++;
1563 antcomb->alt_recv_cnt++;
1566 /* Short scan check */
1567 if (antcomb->scan && antcomb->alt_good) {
1568 if (time_after(jiffies, antcomb->scan_start_time +
1569 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1572 if (antcomb->total_pkt_count ==
1573 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1574 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1575 antcomb->total_pkt_count);
1576 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1581 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1582 rs->rs_moreaggr) && !short_scan)
1585 if (antcomb->total_pkt_count) {
1586 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1587 antcomb->total_pkt_count);
1588 main_rssi_avg = (antcomb->main_total_rssi /
1589 antcomb->total_pkt_count);
1590 alt_rssi_avg = (antcomb->alt_total_rssi /
1591 antcomb->total_pkt_count);
1595 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1596 curr_alt_set = div_ant_conf.alt_lna_conf;
1597 curr_main_set = div_ant_conf.main_lna_conf;
1601 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1602 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1603 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1605 antcomb->alt_good = true;
1607 antcomb->alt_good = false;
1611 antcomb->scan = true;
1612 antcomb->scan_not_start = true;
1615 if (!antcomb->scan) {
1616 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1617 alt_ratio, curr_main_set, curr_alt_set,
1618 alt_rssi_avg, main_rssi_avg)) {
1619 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1620 /* Switch main and alt LNA */
1621 div_ant_conf.main_lna_conf =
1622 ATH_ANT_DIV_COMB_LNA2;
1623 div_ant_conf.alt_lna_conf =
1624 ATH_ANT_DIV_COMB_LNA1;
1625 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1626 div_ant_conf.main_lna_conf =
1627 ATH_ANT_DIV_COMB_LNA1;
1628 div_ant_conf.alt_lna_conf =
1629 ATH_ANT_DIV_COMB_LNA2;
1633 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1634 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1635 /* Set alt to another LNA */
1636 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1637 div_ant_conf.alt_lna_conf =
1638 ATH_ANT_DIV_COMB_LNA1;
1639 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1640 div_ant_conf.alt_lna_conf =
1641 ATH_ANT_DIV_COMB_LNA2;
1646 if ((alt_rssi_avg < (main_rssi_avg +
1647 div_ant_conf.lna1_lna2_delta)))
1651 if (!antcomb->scan_not_start) {
1652 switch (curr_alt_set) {
1653 case ATH_ANT_DIV_COMB_LNA2:
1654 antcomb->rssi_lna2 = alt_rssi_avg;
1655 antcomb->rssi_lna1 = main_rssi_avg;
1656 antcomb->scan = true;
1658 div_ant_conf.main_lna_conf =
1659 ATH_ANT_DIV_COMB_LNA1;
1660 div_ant_conf.alt_lna_conf =
1661 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1663 case ATH_ANT_DIV_COMB_LNA1:
1664 antcomb->rssi_lna1 = alt_rssi_avg;
1665 antcomb->rssi_lna2 = main_rssi_avg;
1666 antcomb->scan = true;
1668 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1669 div_ant_conf.alt_lna_conf =
1670 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1672 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1673 antcomb->rssi_add = alt_rssi_avg;
1674 antcomb->scan = true;
1676 div_ant_conf.alt_lna_conf =
1677 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1679 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1680 antcomb->rssi_sub = alt_rssi_avg;
1681 antcomb->scan = false;
1682 if (antcomb->rssi_lna2 >
1683 (antcomb->rssi_lna1 +
1684 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1685 /* use LNA2 as main LNA */
1686 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1687 (antcomb->rssi_add > antcomb->rssi_sub)) {
1689 div_ant_conf.main_lna_conf =
1690 ATH_ANT_DIV_COMB_LNA2;
1691 div_ant_conf.alt_lna_conf =
1692 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1693 } else if (antcomb->rssi_sub >
1694 antcomb->rssi_lna1) {
1696 div_ant_conf.main_lna_conf =
1697 ATH_ANT_DIV_COMB_LNA2;
1698 div_ant_conf.alt_lna_conf =
1699 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1702 div_ant_conf.main_lna_conf =
1703 ATH_ANT_DIV_COMB_LNA2;
1704 div_ant_conf.alt_lna_conf =
1705 ATH_ANT_DIV_COMB_LNA1;
1708 /* use LNA1 as main LNA */
1709 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1710 (antcomb->rssi_add > antcomb->rssi_sub)) {
1712 div_ant_conf.main_lna_conf =
1713 ATH_ANT_DIV_COMB_LNA1;
1714 div_ant_conf.alt_lna_conf =
1715 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1716 } else if (antcomb->rssi_sub >
1717 antcomb->rssi_lna1) {
1719 div_ant_conf.main_lna_conf =
1720 ATH_ANT_DIV_COMB_LNA1;
1721 div_ant_conf.alt_lna_conf =
1722 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1725 div_ant_conf.main_lna_conf =
1726 ATH_ANT_DIV_COMB_LNA1;
1727 div_ant_conf.alt_lna_conf =
1728 ATH_ANT_DIV_COMB_LNA2;
1736 if (!antcomb->alt_good) {
1737 antcomb->scan_not_start = false;
1738 /* Set alt to another LNA */
1739 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1740 div_ant_conf.main_lna_conf =
1741 ATH_ANT_DIV_COMB_LNA2;
1742 div_ant_conf.alt_lna_conf =
1743 ATH_ANT_DIV_COMB_LNA1;
1744 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1745 div_ant_conf.main_lna_conf =
1746 ATH_ANT_DIV_COMB_LNA1;
1747 div_ant_conf.alt_lna_conf =
1748 ATH_ANT_DIV_COMB_LNA2;
1754 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1755 main_rssi_avg, alt_rssi_avg,
1758 antcomb->quick_scan_cnt++;
1761 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1762 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1764 antcomb->scan_start_time = jiffies;
1765 antcomb->total_pkt_count = 0;
1766 antcomb->main_total_rssi = 0;
1767 antcomb->alt_total_rssi = 0;
1768 antcomb->main_recv_cnt = 0;
1769 antcomb->alt_recv_cnt = 0;
1772 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1775 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1776 struct ieee80211_rx_status *rxs;
1777 struct ath_hw *ah = sc->sc_ah;
1778 struct ath_common *common = ath9k_hw_common(ah);
1779 struct ieee80211_hw *hw = sc->hw;
1780 struct ieee80211_hdr *hdr;
1782 bool decrypt_error = false;
1783 struct ath_rx_status rs;
1784 enum ath9k_rx_qtype qtype;
1785 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1787 u8 rx_status_len = ah->caps.rx_status_len;
1790 unsigned long flags;
1793 dma_type = DMA_BIDIRECTIONAL;
1795 dma_type = DMA_FROM_DEVICE;
1797 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1798 spin_lock_bh(&sc->rx.rxbuflock);
1800 tsf = ath9k_hw_gettsf64(ah);
1801 tsf_lower = tsf & 0xffffffff;
1804 /* If handling rx interrupt and flush is in progress => exit */
1805 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1808 memset(&rs, 0, sizeof(rs));
1810 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1812 bf = ath_get_next_rx_buf(sc, &rs);
1822 * Take frame header from the first fragment and RX status from
1826 hdr_skb = sc->rx.frag;
1830 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1831 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1832 if (ieee80211_is_beacon(hdr->frame_control) &&
1833 !is_zero_ether_addr(common->curbssid) &&
1834 !compare_ether_addr(hdr->addr3, common->curbssid))
1835 rs.is_mybeacon = true;
1837 rs.is_mybeacon = false;
1839 ath_debug_stat_rx(sc, &rs);
1842 * If we're asked to flush receive queue, directly
1843 * chain it back at the queue without processing it.
1845 if (sc->sc_flags & SC_OP_RXFLUSH)
1846 goto requeue_drop_frag;
1848 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1849 if (rs.rs_tstamp > tsf_lower &&
1850 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1851 rxs->mactime -= 0x100000000ULL;
1853 if (rs.rs_tstamp < tsf_lower &&
1854 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1855 rxs->mactime += 0x100000000ULL;
1857 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1858 rxs, &decrypt_error);
1860 goto requeue_drop_frag;
1862 /* Ensure we always have an skb to requeue once we are done
1863 * processing the current buffer's skb */
1864 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1866 /* If there is no memory we ignore the current RX'd frame,
1867 * tell hardware it can give us a new frame using the old
1868 * skb and put it at the tail of the sc->rx.rxbuf list for
1871 goto requeue_drop_frag;
1873 /* Unmap the frame */
1874 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1878 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1879 if (ah->caps.rx_status_len)
1880 skb_pull(skb, ah->caps.rx_status_len);
1883 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1884 rxs, decrypt_error);
1886 /* We will now give hardware our shiny new allocated skb */
1887 bf->bf_mpdu = requeue_skb;
1888 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1891 if (unlikely(dma_mapping_error(sc->dev,
1892 bf->bf_buf_addr))) {
1893 dev_kfree_skb_any(requeue_skb);
1895 bf->bf_buf_addr = 0;
1896 ath_err(common, "dma_mapping_error() on RX\n");
1897 ieee80211_rx(hw, skb);
1903 * rs_more indicates chained descriptors which can be
1904 * used to link buffers together for a sort of
1905 * scatter-gather operation.
1908 /* too many fragments - cannot handle frame */
1909 dev_kfree_skb_any(sc->rx.frag);
1910 dev_kfree_skb_any(skb);
1918 int space = skb->len - skb_tailroom(hdr_skb);
1922 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1924 goto requeue_drop_frag;
1927 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1929 dev_kfree_skb_any(skb);
1934 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
1937 * change the default rx antenna if rx diversity
1938 * chooses the other antenna 3 times in a row.
1940 if (sc->rx.defant != rs.rs_antenna) {
1941 if (++sc->rx.rxotherant >= 3)
1942 ath_setdefantenna(sc, rs.rs_antenna);
1944 sc->rx.rxotherant = 0;
1949 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1950 skb_trim(skb, skb->len - 8);
1952 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1954 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1956 PS_WAIT_FOR_PSPOLL_DATA)) ||
1957 ath9k_check_auto_sleep(sc))
1958 ath_rx_ps(sc, skb, rs.is_mybeacon);
1959 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1961 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
1962 ath_ant_comb_scan(sc, &rs);
1964 ieee80211_rx(hw, skb);
1968 dev_kfree_skb_any(sc->rx.frag);
1973 list_add_tail(&bf->list, &sc->rx.rxbuf);
1974 ath_rx_edma_buf_link(sc, qtype);
1976 list_move_tail(&bf->list, &sc->rx.rxbuf);
1977 ath_rx_buf_link(sc, bf);
1983 spin_unlock_bh(&sc->rx.rxbuflock);
1985 if (!(ah->imask & ATH9K_INT_RXEOL)) {
1986 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
1987 ath9k_hw_set_interrupts(ah);